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| author | Ed Tanous <ed.tanous@intel.com> | 2019-07-31 20:59:18 +0300 |
|---|---|---|
| committer | Ed Tanous <ed.tanous@intel.com> | 2019-07-31 20:59:18 +0300 |
| commit | b4f66bacb1b8e661d794fa7a189e2f66f5092e2e (patch) | |
| tree | 5a8302cd349fdb68dadca003483c61917d4a6add /poky/meta/conf/machine/include/riscv/arch-riscv.inc | |
| parent | 43a183cc0926da36e3a218efa02ab4838ace316f (diff) | |
| parent | dd755025e33af27b059ea7ef3afbe850e4880b08 (diff) | |
| download | openbmc-b4f66bacb1b8e661d794fa7a189e2f66f5092e2e.tar.xz | |
Merge branch 'master' of ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into intel
Diffstat (limited to 'poky/meta/conf/machine/include/riscv/arch-riscv.inc')
| -rw-r--r-- | poky/meta/conf/machine/include/riscv/arch-riscv.inc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/poky/meta/conf/machine/include/riscv/arch-riscv.inc b/poky/meta/conf/machine/include/riscv/arch-riscv.inc new file mode 100644 index 000000000..19f8f3e21 --- /dev/null +++ b/poky/meta/conf/machine/include/riscv/arch-riscv.inc @@ -0,0 +1,10 @@ +# RISCV Architecture definition + +DEFAULTTUNE ?= "riscv64" + +TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}" +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" +TUNE_CCARGS .= "" + +# QEMU usermode fails with invalid instruction error (For riscv32) +MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}" |