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author | Ed Tanous <ed.tanous@intel.com> | 2019-04-15 23:11:05 +0300 |
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committer | Ed Tanous <ed.tanous@intel.com> | 2019-04-15 23:11:05 +0300 |
commit | a75bff085ba9443315222231c42692745e5781e9 (patch) | |
tree | e1aa422babae0dffc866af076a0274ff26c2c4b2 /poky/meta/conf/machine/include/tune-cortexa32.inc | |
parent | 3e809d0d5cf96c18c5720d1b6b3b53e9f4c0cfae (diff) | |
parent | 6d4bcf0a75b2a6055055c9ad8ed6b93599082385 (diff) | |
download | openbmc-a75bff085ba9443315222231c42692745e5781e9.tar.xz |
Merge branch 'master' of ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into intel
Diffstat (limited to 'poky/meta/conf/machine/include/tune-cortexa32.inc')
-rw-r--r-- | poky/meta/conf/machine/include/tune-cortexa32.inc | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/poky/meta/conf/machine/include/tune-cortexa32.inc b/poky/meta/conf/machine/include/tune-cortexa32.inc new file mode 100644 index 000000000..9c948f176 --- /dev/null +++ b/poky/meta/conf/machine/include/tune-cortexa32.inc @@ -0,0 +1,18 @@ +DEFAULTTUNE ?= "cortexa32" + + +TUNEVALID[cortexa32] = "Enable Cortex-A32 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa32', ' -mcpu=cortex-a32', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa32 cortexa32-crypto" +ARMPKGARCH_tune-cortexa32 = "cortexa32" +ARMPKGARCH_tune-cortexa32-crypto = "cortexa32" +TUNE_FEATURES_tune-cortexa32 = "aarch64 cortexa32 crc" +TUNE_FEATURES_tune-cortexa32-crypto = "aarch64 cortexa32 crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa32 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc} cortexa32" +PACKAGE_EXTRA_ARCHS_tune-cortexa32-crypto = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa32 cortexa32-crypto" +BASE_LIB_tune-cortexa32 = "lib64" +BASE_LIB_tune-cortexa32-crypto = "lib64" |