diff options
156 files changed, 12383 insertions, 6119 deletions
@@ -41,5 +41,4 @@ portions of this codebase that are approved for upstreaming. While the code is easily portable across different type of IA platforms, currently we use Intel’s Wolf Pass (S2600WP) platform for development and most -testing. - +testing. diff --git a/azure-pipelines.yml b/azure-pipelines.yml index 1ad839a88..57907a2d4 100644 --- a/azure-pipelines.yml +++ b/azure-pipelines.yml @@ -10,7 +10,12 @@ jobs: vmImage: 'Ubuntu-16.04' steps: + # Remove the ubuntu-toolchain-r/test PPA, which is added by default. Some + # packages were removed, and this is causing the g++multilib install to fail. + # Similar issue: https://github.com/scikit-learn/scikit-learn/issues/13928 - bash: | + sudo add-apt-repository --remove ppa:ubuntu-toolchain-r/test + sudo apt update sudo apt-get install gawk wget git-core diffstat unzip texinfo gcc-multilib build-essential chrpath socat rm -rf build source oe-init-build-env diff --git a/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass index f10b2389f..cff93d0ee 100644 --- a/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass +++ b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass @@ -31,6 +31,10 @@ IMAGE_INSTALL_append = " \ post-code-manager \ preinit-mounts \ mtd-utils-ubifs \ + special-mode-mgr \ + rsyslog \ + rsyslog-policy \ + static-mac-addr \ " # this package was flagged as a security risk diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch index cb61bd545..e16b0f158 100644 --- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch @@ -1,7 +1,7 @@ -From cf43453a75880cf53ea7bbf5859706f2a7cae292 Mon Sep 17 00:00:00 2001 +From c3b44c02392d33cfec85056fd323d93fdc6e523f Mon Sep 17 00:00:00 2001 From: Vernon Mauery <vernon.mauery@linux.intel.com> Date: Wed, 14 Nov 2018 12:09:52 -0800 -Subject: [PATCH 3/7] add sgio support for port80 snoop post LEDs +Subject: [PATCH] add sgio support for port80 snoop post LEDs This ties together the port 80 snooping to the SGPIO output that ultimately drives the POST code LEDs. @@ -10,15 +10,15 @@ Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> Change-Id: Iaa1b91cd40f4b6323dba0598da373cb631459e66 --- arch/arm/include/asm/arch-aspeed/ast_scu.h | 1 + - arch/arm/mach-aspeed/ast-scu.c | 8 ++ - board/aspeed/ast-g5/ast-g5-intel.c | 96 ++++++++++++++++++++++ + arch/arm/mach-aspeed/ast-scu.c | 8 +++ + board/aspeed/ast-g5/ast-g5-intel.c | 96 ++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h -index 98e63351f1..c10e6a9d4b 100644 +index 06825ce..369c4e3 100644 --- a/arch/arm/include/asm/arch-aspeed/ast_scu.h +++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h -@@ -44,6 +44,7 @@ extern u32 ast_scu_get_vga_memsize(void); +@@ -45,6 +45,7 @@ extern u32 ast_scu_get_vga_memsize(void); extern void ast_scu_init_eth(u8 num); extern void ast_scu_multi_func_eth(u8 num); extern void ast_scu_multi_func_romcs(u8 num); @@ -27,10 +27,10 @@ index 98e63351f1..c10e6a9d4b 100644 void ast_config_uart5_clk(void); diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c -index c83931ed54..63e9c7c167 100644 +index d27f3d3..3a9ba05 100644 --- a/arch/arm/mach-aspeed/ast-scu.c +++ b/arch/arm/mach-aspeed/ast-scu.c -@@ -407,6 +407,14 @@ void ast_scu_multi_func_romcs(u8 num) +@@ -449,6 +449,14 @@ void ast_scu_multi_func_romcs(u8 num) SCU_FUN_PIN_ROMCS(num), AST_SCU_FUN_PIN_CTRL3); } @@ -46,7 +46,7 @@ index c83931ed54..63e9c7c167 100644 { int i; diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c -index e79235c8d0..fca4d91115 100644 +index e79235c..c2a8b33 100644 --- a/board/aspeed/ast-g5/ast-g5-intel.c +++ b/board/aspeed/ast-g5/ast-g5-intel.c @@ -8,9 +8,105 @@ @@ -136,7 +136,7 @@ index e79235c8d0..fca4d91115 100644 + + /* enable lpc snoop #0 and SIOGIO */ + value = readl(AST_LPC_BASE + HICR5) & ~(HICR5_UNKVAL_MASK); -+ value |= HICR5_EN_SIOGIO | HICR5_EN_SNP0W | HICR5_ENINT_SNP0W; ++ value |= HICR5_EN_SIOGIO | HICR5_EN_SNP0W; + writel(value, AST_LPC_BASE + HICR5); + + @@ -156,5 +156,5 @@ index e79235c8d0..fca4d91115 100644 + sgpio_init(); } -- -2.17.1 +2.7.4 diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch new file mode 100644 index 000000000..f6f402bc9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch @@ -0,0 +1,121 @@ +From 6b4e1b3672433c0d7d392404e19d114ae25e0eb2 Mon Sep 17 00:00:00 2001 +From: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Date: Wed, 24 Apr 2019 22:35:43 +0530 +Subject: [PATCH] Manufacturing mode physical presence detection + +Support for physical presence of manufacturing mode added. +Front panel power button press for 8 seconds will be detected +and marked as special mode for manufacturing request + +Tested: +1. Verified by holding the power button when u-boot boots for +8 seconds, and confirmed that bootargs passed to linux has +special=mfg string +2. Verified in normal condition special=mfg string is not passed. + +Change-Id: Id7e7c7e7860c7ef3ae8e3a7a7cfda7ff506c0f2b +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +--- + board/aspeed/ast-g5/ast-g5-gpio.h | 2 +- + board/aspeed/ast-g5/ast-g5-intel.c | 39 ++++++++++++++++++++++++++++++++++++-- + 2 files changed, 38 insertions(+), 3 deletions(-) + +diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h +index a820c0f..ed2499f 100644 +--- a/board/aspeed/ast-g5/ast-g5-gpio.h ++++ b/board/aspeed/ast-g5/ast-g5-gpio.h +@@ -72,7 +72,7 @@ + #define AMB_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_5) + #define FORCE_BMC_UPDATE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_0) + #define TPM_EN_PULSE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_6) +- ++#define FP_PWR_BTN_PORT_PIN PORT_PIN(GPIO_PORT_E, GPIO_PIN_2) + + // GPIO Configuration Register bits + #define GPCFG_EVENT_TO_SMI (1 << 7) // 1 == enabled +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 881ab89..86b422f 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -24,6 +24,7 @@ enum gpio_names { + GPIO_AMBER_LED, + GPIO_FF_UPD_JUMPER, + GPIO_ENABLE_TPM_PULSE, ++ GPIO_FP_PWR_BTN, + }; + + #define GPIO_CFG_DEFAULT (GPCFG_ACTIVE_HIGH | GPCFG_LEVEL_TRIG) +@@ -55,6 +56,10 @@ static const GPIOValue gpio_table[] = { + /* Enable Pulse -- pin D6 */ + [GPIO_ENABLE_TPM_PULSE] = {TPM_EN_PULSE_PORT_PIN, GPCFG_OUTPUT_EN, 0, + GPIO_DEBOUNCE_NONE}, ++ /* Front Panel Power Button -- pin E2 */ ++ [GPIO_FP_PWR_BTN] = {FP_PWR_BTN_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ + }; + + #define LPC_SNOOP_ADDR 0x80 +@@ -313,12 +318,35 @@ static inline void ast_scu_write(uint32_t val, uint32_t reg) + #endif + } + ++static bool is_mfg_mode_phy_req(void) ++{ ++ /* ++ * Assume mfg mode physical request is made, if power button ++ * is pressed continously for 8 seconds, indicate the ++ * same in bootargs ++ */ ++ const uint32_t delay_in_ms = 100; ++ const uint32_t read_count = ((8 * 1000) / delay_in_ms); ++ for (uint32_t count = 0; count < read_count; ++count) { ++ if (!gpio_get_value(GPIO_FP_PWR_BTN)) ++ return false; ++ ++ mdelay(delay_in_ms); ++ } ++ debug("is_mfg_mode_phy_req : detected mfg mode request\n"); ++ ++ return true; ++} ++ + void ast_g5_intel_late_init(void) + { + char *cmdline = NULL; + char *cmdline_new = NULL; + char buf[32]; + u32 rest = 0; ++ const char *special_mfg_str = " special=mfg"; ++ const u32 special_str_size = strlen(special_mfg_str); ++ u32 buf_count = 0; + + /* By default host serail A and B use normal speed */ + uint32_t host_serial_cfg = 0; +@@ -367,14 +395,21 @@ void ast_g5_intel_late_init(void) + return; + } + +- cmdline_new = malloc(strlen(cmdline) + strlen(buf) + 1); ++ cmdline_new = malloc(strlen(cmdline) + strlen(buf) + ++ special_str_size + 1); + if (!cmdline_new) { + printf("Cannot malloc memory!\n"); + return; + } + + /* append the reset status into kernel command line */ +- snprintf(cmdline_new, strlen(cmdline) + strlen(buf) + 1, "%s%s", cmdline, buf); ++ buf_count = snprintf(cmdline_new, strlen(cmdline) + strlen(buf) + 1, ++ "%s%s", cmdline, buf); ++ ++ if (is_mfg_mode_phy_req()) ++ snprintf(cmdline_new + buf_count - 1, special_str_size + 1, ++ "%s", special_mfg_str); ++ + setenv("bootargs", cmdline_new); + free(cmdline_new); + } +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch new file mode 100644 index 000000000..950763d8e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch @@ -0,0 +1,1520 @@ +From a1626519109c9bda02119114224f3759add21f00 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 6 May 2019 03:01:55 +0530 +Subject: [PATCH] Aspeed I2C support in U-Boot + +Adding Aspeed I2C support in u-boot and enabled +i2c command. It is mainly used for PFR to +communicate with PFR CPLD while BMC is in +"Force Firmware Update" mode. + +Tested: +Using i2c command in u-boot, validated +i2c functionalities like probe, read and write. + +Change-Id: Iad9af4a57a58bc8dc5c470bfadad9dac1371c238 +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + arch/arm/include/asm/arch-aspeed/ast_g5_platform.h | 14 + + arch/arm/include/asm/arch-aspeed/ast_scu.h | 5 + + arch/arm/include/asm/arch-aspeed/regs-iic.h | 204 +++++ + arch/arm/mach-aspeed/ast-scu.c | 122 +++ + board/aspeed/ast-g5/ast-g5.c | 8 + + configs/ast_g5_phy_defconfig | 2 + + drivers/i2c/Kconfig | 5 + + drivers/i2c/Makefile | 1 + + drivers/i2c/ast_i2c.c | 849 +++++++++++++++++++++ + drivers/i2c/ast_i2c.h | 131 ++++ + include/configs/ast-common.h | 5 + + 11 files changed, 1346 insertions(+) + create mode 100644 arch/arm/include/asm/arch-aspeed/regs-iic.h + create mode 100644 drivers/i2c/ast_i2c.c + create mode 100644 drivers/i2c/ast_i2c.h + +diff --git a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h +index 4210873..a84f471 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h +@@ -105,6 +105,20 @@ + #define AST_LPC_BASE 0x1E789000 /* LPC */ + #define AST_MBX_BASE 0x1E789200 /* Mailbox */ + #define AST_I2C_BASE 0x1E78A000 /* I2C */ ++#define AST_I2C_DEV0_BASE 0x1E78A040 /* I2C DEV1 */ ++#define AST_I2C_DEV1_BASE 0x1E78A080 /* I2C DEV2 */ ++#define AST_I2C_DEV2_BASE 0x1E78A0C0 /* I2C DEV3 */ ++#define AST_I2C_DEV3_BASE 0x1E78A100 /* I2C DEV4 */ ++#define AST_I2C_DEV4_BASE 0x1E78A140 /* I2C DEV5 */ ++#define AST_I2C_DEV5_BASE 0x1E78A180 /* I2C DEV6 */ ++#define AST_I2C_DEV6_BASE 0x1E78A1C0 /* I2C DEV7 */ ++#define AST_I2C_DEV7_BASE 0x1E78A300 /* I2C DEV8 */ ++#define AST_I2C_DEV8_BASE 0x1E78A340 /* I2C DEV9 */ ++#define AST_I2C_DEV9_BASE 0x1E78A380 /* I2C DEV10 */ ++#define AST_I2C_DEV10_BASE 0x1E78A3C0 /* I2C DEV11 */ ++#define AST_I2C_DEV11_BASE 0x1E78A400 /* I2C DEV12 */ ++#define AST_I2C_DEV12_BASE 0x1E78A440 /* I2C DEV13 */ ++#define AST_I2C_DEV13_BASE 0x1E78A480 /* I2C DEV14 */ + #define AST_PECI_BASE 0x1E78B000 /* PECI */ + #define AST_PCIARBITER_BASE 0x1E78C000 /* PCI ARBITER */ + #define AST_UART2_BASE 0x1E78D000 /* UART2 */ +diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h +index 369c4e3..b94d13e 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_scu.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h +@@ -28,6 +28,8 @@ + #ifndef __AST_SCU_H + #define __AST_SCU_H + ++#include <common.h> ++ + extern void ast_scu_show_system_info (void); + extern void ast_scu_sys_rest_info(void); + extern void ast_scu_security_info(void); +@@ -39,13 +41,16 @@ extern u32 ast_get_clk_source(void); + extern u32 ast_get_h_pll_clk(void); + extern u32 ast_get_m_pll_clk(void); + extern u32 ast_get_ahbclk(void); ++extern u32 ast_get_pclk(void); + + extern u32 ast_scu_get_vga_memsize(void); + ++extern void ast_scu_init_i2c(void); + extern void ast_scu_init_eth(u8 num); + extern void ast_scu_multi_func_eth(u8 num); + extern void ast_scu_multi_func_romcs(u8 num); + extern void ast_scu_multi_func_sgpio(void); ++extern void ast_scu_multi_func_i2c(u8 bus_no); + + void ast_config_uart5_clk(void); + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-iic.h b/arch/arm/include/asm/arch-aspeed/regs-iic.h +new file mode 100644 +index 0000000..2847430 +--- /dev/null ++++ b/arch/arm/include/asm/arch-aspeed/regs-iic.h +@@ -0,0 +1,204 @@ ++/* arch/arm/plat-aspeed/include/mach/regs-iic.h ++ * ++ * Copyright (c) 2012 ASPEED Technology Inc. <ryan_chen@aspeedtech.com> ++ * http://www.aspeedtech.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * ASPEED I2C Controller ++*/ ++ ++#ifndef __ASM_ARCH_REGS_IIC_H ++#define __ASM_ARCH_REGS_IIC_H __FILE__ ++ ++#ifdef CONFIG_ARCH_AST1010 ++#define AST_I2C_DMA_SIZE 512 ++#else ++#define AST_I2C_DMA_SIZE 4096 ++#endif ++#define AST_I2C_PAGE_SIZE 256 ++ ++#if defined(CONFIG_ARCH_AST2300) ++#define NUM_BUS 9 ++#elif defined(CONFIG_ARCH_AST2400) ++#define NUM_BUS 14 ++#elif defined(CONFIG_ARCH_AST1010) ++#define NUM_BUS 15 ++#elif defined(CONFIG_ARCH_AST1520) || defined(CONFIG_ARCH_AST3200) || defined(CONFIG_ARCH_AST2500) ++#define NUM_BUS 14 ++#elif defined(CONFIG_ARCH_AST1220) ++#define NUM_BUS 10 ++#else ++#err "NO define NUM_BUS" ++#endif ++ ++/* I2C Register */ ++#define I2C_FUN_CTRL_REG 0x00 ++#define I2C_AC_TIMING_REG1 0x04 ++#define I2C_AC_TIMING_REG2 0x08 ++#define I2C_INTR_CTRL_REG 0x0c ++#define I2C_INTR_STS_REG 0x10 ++#define I2C_CMD_REG 0x14 ++#define I2C_DEV_ADDR_REG 0x18 ++#define I2C_BUF_CTRL_REG 0x1c ++#define I2C_BYTE_BUF_REG 0x20 ++#define I2C_DMA_BASE_REG 0x24 ++#define I2C_DMA_LEN_REG 0x28 ++ ++ ++/* Gloable Register Definition */ ++/* 0x00 : I2C Interrupt Status Register */ ++/* 0x08 : I2C Interrupt Target Assignment */ ++#if defined(CONFIG_ARCH_AST2400) ++#define AST_I2CG_INTR14 (0x1 << 13) ++#define AST_I2CG_INTR13 (0x1 << 12) ++#define AST_I2CG_INTR12 (0x1 << 11) ++#define AST_I2CG_INTR11 (0x1 << 10) ++#define AST_I2CG_INTR10 (0x1 << 9) ++#elif defined(CONFIG_ARCH_AST1010) ++#define AST_I2CG_INTR14 (0x1 << 13) ++#define AST_I2CG_INTR13 (0x1 << 12) ++#define AST_I2CG_INTR12 (0x1 << 11) ++#define AST_I2CG_INTR11 (0x1 << 10) ++#define AST_I2CG_INTR10 (0x1 << 9) ++#endif ++#define AST_I2CG_INTR09 (0x1 << 8) ++#define AST_I2CG_INTR08 (0x1 << 7) ++#define AST_I2CG_INTR07 (0x1 << 6) ++#define AST_I2CG_INTR06 (0x1 << 5) ++#define AST_I2CG_INTR05 (0x1 << 4) ++#define AST_I2CG_INTR04 (0x1 << 3) ++#define AST_I2CG_INTR03 (0x1 << 2) ++#define AST_I2CG_INTR02 (0x1 << 1) ++#define AST_I2CG_INTR01 (0x1 ) ++ ++/* Device Register Definition */ ++/* 0x00 : I2CD Function Control Register */ ++#define AST_I2CD_BUFF_SEL_MASK (0x7 << 20) ++#define AST_I2CD_BUFF_SEL(x) (x << 20) // page 0 ~ 7 ++#define AST_I2CD_M_SDA_LOCK_EN (0x1 << 16) ++#define AST_I2CD_MULTI_MASTER_DIS (0x1 << 15) ++#define AST_I2CD_M_SCL_DRIVE_EN (0x1 << 14) ++#define AST_I2CD_MSB_STS (0x1 << 9) ++#define AST_I2CD_SDA_DRIVE_1T_EN (0x1 << 8) ++#define AST_I2CD_M_SDA_DRIVE_1T_EN (0x1 << 7) ++#define AST_I2CD_M_HIGH_SPEED_EN (0x1 << 6) ++#define AST_I2CD_DEF_ADDR_EN (0x1 << 5) ++#define AST_I2CD_DEF_ALERT_EN (0x1 << 4) ++#define AST_I2CD_DEF_ARP_EN (0x1 << 3) ++#define AST_I2CD_DEF_GCALL_EN (0x1 << 2) ++#define AST_I2CD_SLAVE_EN (0x1 << 1) ++#define AST_I2CD_MASTER_EN (0x1 ) ++ ++/* 0x04 : I2CD Clock and AC Timing Control Register #1 */ ++#define AST_I2CD_tBUF (0x1 << 28) // 0~7 ++#define AST_I2CD_tHDSTA (0x1 << 24) // 0~7 ++#define AST_I2CD_tACST (0x1 << 20) // 0~7 ++#define AST_I2CD_tCKHIGH (0x1 << 16) // 0~7 ++#define AST_I2CD_tCKLOW (0x1 << 12) // 0~7 ++#define AST_I2CD_tHDDAT (0x1 << 10) // 0~7 ++#define AST_I2CD_CLK_TO_BASE_DIV (0x1 << 8) // 0~3 ++#define AST_I2CD_CLK_BASE_DIV (0x1 ) // 0~0xf ++ ++/* 0x08 : I2CD Clock and AC Timing Control Register #2 */ ++#define AST_I2CD_tTIMEOUT (0x1 ) // 0~7 ++#define AST_NO_TIMEOUT_CTRL 0x0 ++ ++ ++/* 0x0c : I2CD Interrupt Control Register */ ++#define AST_I2CD_SDA_DL_TO_INTR_EN (0x1 << 14) ++#define AST_I2CD_BUS_RECOVER_INTR_EN (0x1 << 13) ++#define AST_I2CD_SMBUS_ALT_INTR_EN (0x1 << 12) ++#define AST_I2CD_SLAVE_MATCH_INTR_EN (0x1 << 7) ++#define AST_I2CD_SCL_TO_INTR_EN (0x1 << 6) ++#define AST_I2CD_ABNORMAL_INTR_EN (0x1 << 5) ++#define AST_I2CD_NORMAL_STOP_INTR_EN (0x1 << 4) ++#define AST_I2CD_ARBIT_LOSS_INTR_EN (0x1 << 3) ++#define AST_I2CD_RX_DOWN_INTR_EN (0x1 << 2) ++#define AST_I2CD_TX_NAK_INTR_EN (0x1 << 1) ++#define AST_I2CD_TX_ACK_INTR_EN (0x1 ) ++ ++/* 0x10 : I2CD Interrupt Status Register : WC */ ++#define AST_I2CD_INTR_STS_SDA_DL_TO (0x1 << 14) ++#define AST_I2CD_INTR_STS_BUS_RECOVER (0x1 << 13) ++#define AST_I2CD_INTR_STS_SMBUS_ALT (0x1 << 12) ++#define AST_I2CD_INTR_STS_SMBUS_ARP_ADDR (0x1 << 11) ++#define AST_I2CD_INTR_STS_SMBUS_DEV_ALT (0x1 << 10) ++#define AST_I2CD_INTR_STS_SMBUS_DEF_ADDR (0x1 << 9) ++#define AST_I2CD_INTR_STS_GCALL_ADDR (0x1 << 8) ++#define AST_I2CD_INTR_STS_SLAVE_MATCH (0x1 << 7) ++#define AST_I2CD_INTR_STS_SCL_TO (0x1 << 6) ++#define AST_I2CD_INTR_STS_ABNORMAL (0x1 << 5) ++#define AST_I2CD_INTR_STS_NORMAL_STOP (0x1 << 4) ++#define AST_I2CD_INTR_STS_ARBIT_LOSS (0x1 << 3) ++#define AST_I2CD_INTR_STS_RX_DOWN (0x1 << 2) ++#define AST_I2CD_INTR_STS_TX_NAK (0x1 << 1) ++#define AST_I2CD_INTR_STS_TX_ACK (0x1 ) ++ ++/* 0x14 : I2CD Command/Status Register */ ++#define AST_I2CD_SDA_OE (0x1 << 28) ++#define AST_I2CD_SDA_O (0x1 << 27) ++#define AST_I2CD_SCL_OE (0x1 << 26) ++#define AST_I2CD_SCL_O (0x1 << 25) ++#define AST_I2CD_TX_TIMING (0x1 << 24) // 0 ~3 ++#define AST_I2CD_TX_STATUS (0x1 << 23) ++// Tx State Machine ++#define AST_I2CD_IDLE 0x0 ++#define AST_I2CD_MACTIVE 0x8 ++#define AST_I2CD_MSTART 0x9 ++#define AST_I2CD_MSTARTR 0xa ++#define AST_I2CD_MSTOP 0xb ++#define AST_I2CD_MTXD 0xc ++#define AST_I2CD_MRXACK 0xd ++#define AST_I2CD_MRXD 0xe ++#define AST_I2CD_MTXACK 0xf ++#define AST_I2CD_SWAIT 0x1 ++#define AST_I2CD_SRXD 0x4 ++#define AST_I2CD_STXACK 0x5 ++#define AST_I2CD_STXD 0x6 ++#define AST_I2CD_SRXACK 0x7 ++#define AST_I2CD_RECOVER 0x3 ++ ++#define AST_I2CD_SCL_LINE_STS (0x1 << 18) ++#define AST_I2CD_SDA_LINE_STS (0x1 << 17) ++#define AST_I2CD_BUS_BUSY_STS (0x1 << 16) ++#define AST_I2CD_SDA_OE_OUT_DIR (0x1 << 15) ++#define AST_I2CD_SDA_O_OUT_DIR (0x1 << 14) ++#define AST_I2CD_SCL_OE_OUT_DIR (0x1 << 13) ++#define AST_I2CD_SCL_O_OUT_DIR (0x1 << 12) ++#define AST_I2CD_BUS_RECOVER_CMD_EN (0x1 << 11) ++#define AST_I2CD_S_ALT_EN (0x1 << 10) ++// 0 : DMA Buffer, 1: Pool Buffer ++//AST1070 DMA register ++#define AST_I2CD_RX_DMA_ENABLE (0x1 << 9) ++#define AST_I2CD_TX_DMA_ENABLE (0x1 << 8) ++ ++/* Command Bit */ ++#define AST_I2CD_RX_BUFF_ENABLE (0x1 << 7) ++#define AST_I2CD_TX_BUFF_ENABLE (0x1 << 6) ++#define AST_I2CD_M_STOP_CMD (0x1 << 5) ++#define AST_I2CD_M_S_RX_CMD_LAST (0x1 << 4) ++#define AST_I2CD_M_RX_CMD (0x1 << 3) ++#define AST_I2CD_S_TX_CMD (0x1 << 2) ++#define AST_I2CD_M_TX_CMD (0x1 << 1) ++#define AST_I2CD_M_START_CMD (0x1 ) ++ ++/* 0x18 : I2CD Slave Device Address Register */ ++ ++/* 0x1C : I2CD Pool Buffer Control Register */ ++#define AST_I2CD_RX_BUF_ADDR_GET(x) ((x>> 24)& 0xff) ++#define AST_I2CD_RX_BUF_END_ADDR_SET(x) (x << 16) ++#define AST_I2CD_TX_DATA_BUF_END_SET(x) ((x&0xff) << 8) ++#define AST_I2CD_TX_DATA_BUF_GET(x) ((x >>8) & 0xff) ++#define AST_I2CD_BUF_BASE_ADDR_SET(x) (x & 0x3f) ++ ++/* 0x20 : I2CD Transmit/Receive Byte Buffer Register */ ++#define AST_I2CD_GET_MODE(x) ((x >> 8) & 0x1) ++ ++#define AST_I2CD_RX_BYTE_BUFFER (0xff << 8) ++#define AST_I2CD_TX_BYTE_BUFFER (0xff ) ++ ++ ++#endif /* __ASM_ARCH_REGS_IIC_H */ +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 976c59b..7e8d4c8 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -112,6 +112,12 @@ static struct soc_id soc_map_table[] = { + SOC_ID("AST2530-A2", 0x04030403), + }; + ++void ast_scu_init_i2c(void) ++{ ++ ast_scu_write(ast_scu_read(AST_SCU_RESET) & ~SCU_RESET_I2C, ++ AST_SCU_RESET); ++} ++ + void ast_scu_init_eth(u8 num) + { + /* Set MAC delay Timing */ +@@ -292,6 +298,23 @@ u32 ast_get_ahbclk(void) + return ((hpll / axi_div) / ahb_div); + } + ++u32 ast_get_pclk(void) ++{ ++ unsigned int div, hpll; ++ ++ hpll = ast_get_h_pll_clk(); ++ div = SCU_GET_PCLK_DIV(ast_scu_read(AST_SCU_CLK_SEL)); ++#ifdef AST_SOC_G5 ++ div = (div+1) << 2; ++#else ++ div = (div+1) << 1; ++#endif ++ ++ debug("HPLL=%d, Div=%d, PCLK=%d\n", hpll, div, hpll/div); ++ return (hpll/div); ++} ++ ++ + #else /* ! AST_SOC_G5 */ + + u32 ast_get_h_pll_clk(void) +@@ -457,6 +480,105 @@ void ast_scu_multi_func_sgpio(void) + AST_SCU_FUN_PIN_CTRL2); + } + ++extern void ast_scu_multi_func_i2c(u8 bus_no) ++{ ++#ifdef CONFIG_ARCH_AST1010 ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL4) | ++ SCU_FUN_PIN_SCL13 | ++ SCU_FUN_PIN_SDA13 | ++ SCU_FUN_PIN_SCL14 | ++ SCU_FUN_PIN_SDA14, ++ AST_SCU_FUN_PIN_CTRL4); ++ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL2) | ++ SCU_FUN_PIN_SCL1 | ++ SCU_FUN_PIN_SDA1 | ++ SCU_FUN_PIN_SCL2 | ++ SCU_FUN_PIN_SDA2 | ++ SCU_FUN_PIN_SCL3 | ++ SCU_FUN_PIN_SDA3 | ++ SCU_FUN_PIN_SCL4 | ++ SCU_FUN_PIN_SDA4 | ++ SCU_FUN_PIN_SCL5 | ++ SCU_FUN_PIN_SDA5 | ++ SCU_FUN_PIN_SCL6 | ++ SCU_FUN_PIN_SDA6 | ++ SCU_FUN_PIN_SCL7 | ++ SCU_FUN_PIN_SDA7 | ++ SCU_FUN_PIN_SCL8 | ++ SCU_FUN_PIN_SDA8 | ++ SCU_FUN_PIN_SALT1 | ++ SCU_FUN_PIN_SALT2 | ++ SCU_FUN_PIN_SALT3 | ++ SCU_FUN_PIN_SALT4, ++ AST_SCU_FUN_PIN_CTRL2); ++ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | ++ SCU_FUN_PIN_SCL9 | ++ SCU_FUN_PIN_SDA9 | ++ SCU_FUN_PIN_SCL10 | ++ SCU_FUN_PIN_SDA10 | ++ SCU_FUN_PIN_SCL11 | ++ SCU_FUN_PIN_SDA11 | ++ SCU_FUN_PIN_SCL12 | ++ SCU_FUN_PIN_SDA12, ++ AST_SCU_FUN_PIN_CTRL1); ++#else ++ //TODO check ... //In AST2400 Due to share pin with SD , please not enable I2C 10 ~14 ++ // AST 2400 have 14 , AST 2300 9 ... ++ u32 pin_ctrl = ast_scu_read(AST_SCU_FUN_PIN_CTRL5); ++ switch (bus_no) { ++ case 0: ++ break; ++ case 1: ++ break; ++ case 2: ++ pin_ctrl |= SCU_FUC_PIN_I2C3; ++ break; ++ case 3: ++ pin_ctrl |= SCU_FUC_PIN_I2C4; ++ break; ++ case 4: ++ pin_ctrl |= SCU_FUC_PIN_I2C5; ++ break; ++ case 5: ++ pin_ctrl |= SCU_FUC_PIN_I2C6; ++ break; ++ case 6: ++ pin_ctrl |= SCU_FUC_PIN_I2C7; ++ break; ++ case 7: ++ pin_ctrl |= SCU_FUC_PIN_I2C8; ++ break; ++ case 8: ++ pin_ctrl |= SCU_FUC_PIN_I2C9; ++ break; ++ case 9: ++ pin_ctrl |= SCU_FUC_PIN_I2C10; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 10: ++ pin_ctrl |= SCU_FUC_PIN_I2C11; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 11: ++ pin_ctrl |= SCU_FUC_PIN_I2C12; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 12: ++ pin_ctrl |= SCU_FUC_PIN_I2C13; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 13: ++ pin_ctrl |= SCU_FUC_PIN_I2C14; ++ break; ++ } ++ ++ ast_scu_write(pin_ctrl, AST_SCU_FUN_PIN_CTRL5); ++#endif ++} ++ ++ + u32 ast_scu_revision_id(void) + { + int i; +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 0953677..7309589 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -13,6 +13,7 @@ + #include <asm/arch/ast_scu.h> + #include <asm/arch/ast-sdmc.h> + #include <asm/io.h> ++#include <i2c.h> + + #include "ast-g5.h" + +@@ -37,6 +38,13 @@ int board_init(void) + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->flags = 0; + ++ /* Initialize I2C */ ++#if defined(CONFIG_SYS_I2C) ++ i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); ++#else ++ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); ++#endif ++ + ast_g5_intel(); + return 0; + } +diff --git a/configs/ast_g5_phy_defconfig b/configs/ast_g5_phy_defconfig +index 8f09190..47d9563 100644 +--- a/configs/ast_g5_phy_defconfig ++++ b/configs/ast_g5_phy_defconfig +@@ -15,3 +15,5 @@ CONFIG_SPI_FLASH_MACRONIX=y + CONFIG_SPI_FLASH_STMICRO=y + CONFIG_SYS_NS16550=y + CONFIG_USE_IRQ=y ++CONFIG_CMD_I2C=y ++CONFIG_SYS_I2C_AST=y +diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig +index 6e22bba..5368ba2 100644 +--- a/drivers/i2c/Kconfig ++++ b/drivers/i2c/Kconfig +@@ -58,6 +58,11 @@ config DM_I2C_GPIO + bindings are supported. + Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt + ++config SYS_I2C_AST ++ bool "Aspeed I2C bus driver" ++ help ++ Add support for Aspeed I2C busses on AST2500 processors. ++ + config SYS_I2C_FSL + bool "Freescale I2C bus driver" + depends on DM_I2C +diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile +index 167424d..b2a69ea 100644 +--- a/drivers/i2c/Makefile ++++ b/drivers/i2c/Makefile +@@ -11,6 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o + obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o + + obj-$(CONFIG_SYS_I2C_ADI) += adi_i2c.o ++obj-$(CONFIG_SYS_I2C_AST) += ast_i2c.o + obj-$(CONFIG_I2C_MV) += mv_i2c.o + obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o + obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o +diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c +new file mode 100644 +index 0000000..0b12fc2 +--- /dev/null ++++ b/drivers/i2c/ast_i2c.c +@@ -0,0 +1,849 @@ ++/* ++ * i2c_adap_ast.c ++ * ++ * I2C adapter for the ASPEED I2C bus access. ++ * ++ * Copyright (C) 2012-2020 ASPEED Technology Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * History: ++ * 2012.07.26: Initial version [Ryan Chen] ++ */ ++ ++#include <common.h> ++#include <configs/ast-common.h> ++#include <fdtdec.h> ++ ++#include <asm/arch/ast_scu.h> ++#include <i2c.h> ++ ++#include <asm/arch/regs-iic.h> ++#include <asm/io.h> ++ ++// AST2400 buffer mode issue , force I2C slave write use byte mode , read use ++// buffer mode ++/* Use platform_data instead of module parameters */ ++/* Fast Mode = 400 kHz, Standard = 100 kHz */ ++// static int clock = 100; /* Default: 100 kHz */ ++ ++/***************************************************************************/ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define I2C_TIMEOUT_COUNT 200 ++#define I2C_SLEEP_US 1000 ++ ++static unsigned int i2c_bus_num __attribute__((section(".data"))); ++ ++/* Information about i2c controller */ ++struct ast_i2c_bus { ++ u32 reg_base; /* virtual */ ++ u32 speed; ++ u32 state; /* I2C xfer mode state matchine */ ++ u16 addr; /* slave address */ ++ u16 flags; ++ u16 a_len; /* msg length */ ++ u8 *a_buf; /* pointer to msg data */ ++ u16 d_len; /* msg length */ ++ u8 *d_buf; /* pointer to msg data */ ++}; ++ ++static struct ast_i2c_bus ast_i2c[NUM_BUS] __attribute__((section(".data"))); ++ ++struct ast_i2c_timing_table { ++ u32 divisor; ++ u32 timing; ++}; ++ ++static struct ast_i2c_timing_table i2c_timing_table[] = { ++#if defined(AST_SOC_G5) ++ /* Divisor : Base Clock : tCK High : tCK Low */ ++ /* Divisor : [3:0] : [19:16]: [15:12] */ ++ { 6, 0x77700300 | (0x0) | (0x2 << 16) | (0x2 << 12) }, ++ { 7, 0x77700300 | (0x0) | (0x3 << 16) | (0x2 << 12) }, ++ { 8, 0x77700300 | (0x0) | (0x3 << 16) | (0x3 << 12) }, ++ { 9, 0x77700300 | (0x0) | (0x4 << 16) | (0x3 << 12) }, ++ { 10, 0x77700300 | (0x0) | (0x4 << 16) | (0x4 << 12) }, ++ { 11, 0x77700300 | (0x0) | (0x5 << 16) | (0x4 << 12) }, ++ { 12, 0x77700300 | (0x0) | (0x5 << 16) | (0x5 << 12) }, ++ { 13, 0x77700300 | (0x0) | (0x6 << 16) | (0x5 << 12) }, ++ { 14, 0x77700300 | (0x0) | (0x6 << 16) | (0x6 << 12) }, ++ { 15, 0x77700300 | (0x0) | (0x7 << 16) | (0x6 << 12) }, ++ { 16, 0x77700300 | (0x0) | (0x7 << 16) | (0x7 << 12) }, ++ { 17, 0x77700300 | (0x0) | (0x8 << 16) | (0x7 << 12) }, ++ { 18, 0x77700300 | (0x0) | (0x8 << 16) | (0x8 << 12) }, ++ { 19, 0x77700300 | (0x0) | (0x9 << 16) | (0x8 << 12) }, ++ { 20, 0x77700300 | (0x0) | (0x9 << 16) | (0x9 << 12) }, ++ { 21, 0x77700300 | (0x0) | (0xa << 16) | (0x9 << 12) }, ++ { 22, 0x77700300 | (0x0) | (0xa << 16) | (0xa << 12) }, ++ { 23, 0x77700300 | (0x0) | (0xb << 16) | (0xa << 12) }, ++ { 24, 0x77700300 | (0x0) | (0xb << 16) | (0xb << 12) }, ++ { 25, 0x77700300 | (0x0) | (0xc << 16) | (0xb << 12) }, ++ { 26, 0x77700300 | (0x0) | (0xc << 16) | (0xc << 12) }, ++ { 27, 0x77700300 | (0x0) | (0xd << 16) | (0xc << 12) }, ++ { 28, 0x77700300 | (0x0) | (0xd << 16) | (0xd << 12) }, ++ { 29, 0x77700300 | (0x0) | (0xe << 16) | (0xd << 12) }, ++ { 30, 0x77700300 | (0x0) | (0xe << 16) | (0xe << 12) }, ++ { 31, 0x77700300 | (0x0) | (0xf << 16) | (0xe << 12) }, ++ { 32, 0x77700300 | (0x0) | (0xf << 16) | (0xf << 12) }, ++ ++ { 34, 0x77700300 | (0x1) | (0x8 << 16) | (0x7 << 12) }, ++ { 36, 0x77700300 | (0x1) | (0x8 << 16) | (0x8 << 12) }, ++ { 38, 0x77700300 | (0x1) | (0x9 << 16) | (0x8 << 12) }, ++ { 40, 0x77700300 | (0x1) | (0x9 << 16) | (0x9 << 12) }, ++ { 42, 0x77700300 | (0x1) | (0xa << 16) | (0x9 << 12) }, ++ { 44, 0x77700300 | (0x1) | (0xa << 16) | (0xa << 12) }, ++ { 46, 0x77700300 | (0x1) | (0xb << 16) | (0xa << 12) }, ++ { 48, 0x77700300 | (0x1) | (0xb << 16) | (0xb << 12) }, ++ { 50, 0x77700300 | (0x1) | (0xc << 16) | (0xb << 12) }, ++ { 52, 0x77700300 | (0x1) | (0xc << 16) | (0xc << 12) }, ++ { 54, 0x77700300 | (0x1) | (0xd << 16) | (0xc << 12) }, ++ { 56, 0x77700300 | (0x1) | (0xd << 16) | (0xd << 12) }, ++ { 58, 0x77700300 | (0x1) | (0xe << 16) | (0xd << 12) }, ++ { 60, 0x77700300 | (0x1) | (0xe << 16) | (0xe << 12) }, ++ { 62, 0x77700300 | (0x1) | (0xf << 16) | (0xe << 12) }, ++ { 64, 0x77700300 | (0x1) | (0xf << 16) | (0xf << 12) }, ++ ++ { 68, 0x77700300 | (0x2) | (0x8 << 16) | (0x7 << 12) }, ++ { 72, 0x77700300 | (0x2) | (0x8 << 16) | (0x8 << 12) }, ++ { 76, 0x77700300 | (0x2) | (0x9 << 16) | (0x8 << 12) }, ++ { 80, 0x77700300 | (0x2) | (0x9 << 16) | (0x9 << 12) }, ++ { 84, 0x77700300 | (0x2) | (0xa << 16) | (0x9 << 12) }, ++ { 88, 0x77700300 | (0x2) | (0xa << 16) | (0xa << 12) }, ++ { 92, 0x77700300 | (0x2) | (0xb << 16) | (0xa << 12) }, ++ { 96, 0x77700300 | (0x2) | (0xb << 16) | (0xb << 12) }, ++ { 100, 0x77700300 | (0x2) | (0xc << 16) | (0xb << 12) }, ++ { 104, 0x77700300 | (0x2) | (0xc << 16) | (0xc << 12) }, ++ { 108, 0x77700300 | (0x2) | (0xd << 16) | (0xc << 12) }, ++ { 112, 0x77700300 | (0x2) | (0xd << 16) | (0xd << 12) }, ++ { 116, 0x77700300 | (0x2) | (0xe << 16) | (0xd << 12) }, ++ { 120, 0x77700300 | (0x2) | (0xe << 16) | (0xe << 12) }, ++ { 124, 0x77700300 | (0x2) | (0xf << 16) | (0xe << 12) }, ++ { 128, 0x77700300 | (0x2) | (0xf << 16) | (0xf << 12) }, ++ ++ { 136, 0x77700300 | (0x3) | (0x8 << 16) | (0x7 << 12) }, ++ { 144, 0x77700300 | (0x3) | (0x8 << 16) | (0x8 << 12) }, ++ { 152, 0x77700300 | (0x3) | (0x9 << 16) | (0x8 << 12) }, ++ { 160, 0x77700300 | (0x3) | (0x9 << 16) | (0x9 << 12) }, ++ { 168, 0x77700300 | (0x3) | (0xa << 16) | (0x9 << 12) }, ++ { 176, 0x77700300 | (0x3) | (0xa << 16) | (0xa << 12) }, ++ { 184, 0x77700300 | (0x3) | (0xb << 16) | (0xa << 12) }, ++ { 192, 0x77700300 | (0x3) | (0xb << 16) | (0xb << 12) }, ++ { 200, 0x77700300 | (0x3) | (0xc << 16) | (0xb << 12) }, ++ { 208, 0x77700300 | (0x3) | (0xc << 16) | (0xc << 12) }, ++ { 216, 0x77700300 | (0x3) | (0xd << 16) | (0xc << 12) }, ++ { 224, 0x77700300 | (0x3) | (0xd << 16) | (0xd << 12) }, ++ { 232, 0x77700300 | (0x3) | (0xe << 16) | (0xd << 12) }, ++ { 240, 0x77700300 | (0x3) | (0xe << 16) | (0xe << 12) }, ++ { 248, 0x77700300 | (0x3) | (0xf << 16) | (0xe << 12) }, ++ { 256, 0x77700300 | (0x3) | (0xf << 16) | (0xf << 12) }, ++ ++ { 272, 0x77700300 | (0x4) | (0x8 << 16) | (0x7 << 12) }, ++ { 288, 0x77700300 | (0x4) | (0x8 << 16) | (0x8 << 12) }, ++ { 304, 0x77700300 | (0x4) | (0x9 << 16) | (0x8 << 12) }, ++ { 320, 0x77700300 | (0x4) | (0x9 << 16) | (0x9 << 12) }, ++ { 336, 0x77700300 | (0x4) | (0xa << 16) | (0x9 << 12) }, ++ { 352, 0x77700300 | (0x4) | (0xa << 16) | (0xa << 12) }, ++ { 368, 0x77700300 | (0x4) | (0xb << 16) | (0xa << 12) }, ++ { 384, 0x77700300 | (0x4) | (0xb << 16) | (0xb << 12) }, ++ { 400, 0x77700300 | (0x4) | (0xc << 16) | (0xb << 12) }, ++ { 416, 0x77700300 | (0x4) | (0xc << 16) | (0xc << 12) }, ++ { 432, 0x77700300 | (0x4) | (0xd << 16) | (0xc << 12) }, ++ { 448, 0x77700300 | (0x4) | (0xd << 16) | (0xd << 12) }, ++ { 464, 0x77700300 | (0x4) | (0xe << 16) | (0xd << 12) }, ++ { 480, 0x77700300 | (0x4) | (0xe << 16) | (0xe << 12) }, ++ { 496, 0x77700300 | (0x4) | (0xf << 16) | (0xe << 12) }, ++ { 512, 0x77700300 | (0x4) | (0xf << 16) | (0xf << 12) }, ++ ++ { 544, 0x77700300 | (0x5) | (0x8 << 16) | (0x7 << 12) }, ++ { 576, 0x77700300 | (0x5) | (0x8 << 16) | (0x8 << 12) }, ++ { 608, 0x77700300 | (0x5) | (0x9 << 16) | (0x8 << 12) }, ++ { 640, 0x77700300 | (0x5) | (0x9 << 16) | (0x9 << 12) }, ++ { 672, 0x77700300 | (0x5) | (0xa << 16) | (0x9 << 12) }, ++ { 704, 0x77700300 | (0x5) | (0xa << 16) | (0xa << 12) }, ++ { 736, 0x77700300 | (0x5) | (0xb << 16) | (0xa << 12) }, ++ { 768, 0x77700300 | (0x5) | (0xb << 16) | (0xb << 12) }, ++ { 800, 0x77700300 | (0x5) | (0xc << 16) | (0xb << 12) }, ++ { 832, 0x77700300 | (0x5) | (0xc << 16) | (0xc << 12) }, ++ { 864, 0x77700300 | (0x5) | (0xd << 16) | (0xc << 12) }, ++ { 896, 0x77700300 | (0x5) | (0xd << 16) | (0xd << 12) }, ++ { 928, 0x77700300 | (0x5) | (0xe << 16) | (0xd << 12) }, ++ { 960, 0x77700300 | (0x5) | (0xe << 16) | (0xe << 12) }, ++ { 992, 0x77700300 | (0x5) | (0xf << 16) | (0xe << 12) }, ++ { 1024, 0x77700300 | (0x5) | (0xf << 16) | (0xf << 12) }, ++ ++ { 1088, 0x77700300 | (0x6) | (0x8 << 16) | (0x7 << 12) }, ++ { 1152, 0x77700300 | (0x6) | (0x8 << 16) | (0x8 << 12) }, ++ { 1216, 0x77700300 | (0x6) | (0x9 << 16) | (0x8 << 12) }, ++ { 1280, 0x77700300 | (0x6) | (0x9 << 16) | (0x9 << 12) }, ++ { 1344, 0x77700300 | (0x6) | (0xa << 16) | (0x9 << 12) }, ++ { 1408, 0x77700300 | (0x6) | (0xa << 16) | (0xa << 12) }, ++ { 1472, 0x77700300 | (0x6) | (0xb << 16) | (0xa << 12) }, ++ { 1536, 0x77700300 | (0x6) | (0xb << 16) | (0xb << 12) }, ++ { 1600, 0x77700300 | (0x6) | (0xc << 16) | (0xb << 12) }, ++ { 1664, 0x77700300 | (0x6) | (0xc << 16) | (0xc << 12) }, ++ { 1728, 0x77700300 | (0x6) | (0xd << 16) | (0xc << 12) }, ++ { 1792, 0x77700300 | (0x6) | (0xd << 16) | (0xd << 12) }, ++ { 1856, 0x77700300 | (0x6) | (0xe << 16) | (0xd << 12) }, ++ { 1920, 0x77700300 | (0x6) | (0xe << 16) | (0xe << 12) }, ++ { 1984, 0x77700300 | (0x6) | (0xf << 16) | (0xe << 12) }, ++ { 2048, 0x77700300 | (0x6) | (0xf << 16) | (0xf << 12) }, ++ ++ { 2176, 0x77700300 | (0x7) | (0x8 << 16) | (0x7 << 12) }, ++ { 2304, 0x77700300 | (0x7) | (0x8 << 16) | (0x8 << 12) }, ++ { 2432, 0x77700300 | (0x7) | (0x9 << 16) | (0x8 << 12) }, ++ { 2560, 0x77700300 | (0x7) | (0x9 << 16) | (0x9 << 12) }, ++ { 2688, 0x77700300 | (0x7) | (0xa << 16) | (0x9 << 12) }, ++ { 2816, 0x77700300 | (0x7) | (0xa << 16) | (0xa << 12) }, ++ { 2944, 0x77700300 | (0x7) | (0xb << 16) | (0xa << 12) }, ++ { 3072, 0x77700300 | (0x7) | (0xb << 16) | (0xb << 12) }, ++#else ++ /* Divisor : [3:0] : [18:16]: [13:12] */ ++ { 6, 0x77700300 | (0x0) | (0x2 << 16) | (0x2 << 12) }, ++ { 7, 0x77700300 | (0x0) | (0x3 << 16) | (0x2 << 12) }, ++ { 8, 0x77700300 | (0x0) | (0x3 << 16) | (0x3 << 12) }, ++ { 9, 0x77700300 | (0x0) | (0x4 << 16) | (0x3 << 12) }, ++ { 10, 0x77700300 | (0x0) | (0x4 << 16) | (0x4 << 12) }, ++ { 11, 0x77700300 | (0x0) | (0x5 << 16) | (0x4 << 12) }, ++ { 12, 0x77700300 | (0x0) | (0x5 << 16) | (0x5 << 12) }, ++ { 13, 0x77700300 | (0x0) | (0x6 << 16) | (0x5 << 12) }, ++ { 14, 0x77700300 | (0x0) | (0x6 << 16) | (0x6 << 12) }, ++ { 15, 0x77700300 | (0x0) | (0x7 << 16) | (0x6 << 12) }, ++ { 16, 0x77700300 | (0x0) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 18, 0x77700300 | (0x1) | (0x4 << 16) | (0x3 << 12) }, ++ { 20, 0x77700300 | (0x1) | (0x4 << 16) | (0x4 << 12) }, ++ { 22, 0x77700300 | (0x1) | (0x5 << 16) | (0x4 << 12) }, ++ { 24, 0x77700300 | (0x1) | (0x5 << 16) | (0x5 << 12) }, ++ { 26, 0x77700300 | (0x1) | (0x6 << 16) | (0x5 << 12) }, ++ { 28, 0x77700300 | (0x1) | (0x6 << 16) | (0x6 << 12) }, ++ { 30, 0x77700300 | (0x1) | (0x7 << 16) | (0x6 << 12) }, ++ { 32, 0x77700300 | (0x1) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 36, 0x77700300 | (0x2) | (0x4 << 16) | (0x3 << 12) }, ++ { 40, 0x77700300 | (0x2) | (0x4 << 16) | (0x4 << 12) }, ++ { 44, 0x77700300 | (0x2) | (0x5 << 16) | (0x4 << 12) }, ++ { 48, 0x77700300 | (0x2) | (0x5 << 16) | (0x5 << 12) }, ++ { 52, 0x77700300 | (0x2) | (0x6 << 16) | (0x5 << 12) }, ++ { 56, 0x77700300 | (0x2) | (0x6 << 16) | (0x6 << 12) }, ++ { 60, 0x77700300 | (0x2) | (0x7 << 16) | (0x6 << 12) }, ++ { 64, 0x77700300 | (0x2) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 72, 0x77700300 | (0x3) | (0x4 << 16) | (0x3 << 12) }, ++ { 80, 0x77700300 | (0x3) | (0x4 << 16) | (0x4 << 12) }, ++ { 88, 0x77700300 | (0x3) | (0x5 << 16) | (0x4 << 12) }, ++ { 96, 0x77700300 | (0x3) | (0x5 << 16) | (0x5 << 12) }, ++ { 104, 0x77700300 | (0x3) | (0x6 << 16) | (0x5 << 12) }, ++ { 112, 0x77700300 | (0x3) | (0x6 << 16) | (0x6 << 12) }, ++ { 120, 0x77700300 | (0x3) | (0x7 << 16) | (0x6 << 12) }, ++ { 128, 0x77700300 | (0x3) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 144, 0x77700300 | (0x4) | (0x4 << 16) | (0x3 << 12) }, ++ { 160, 0x77700300 | (0x4) | (0x4 << 16) | (0x4 << 12) }, ++ { 176, 0x77700300 | (0x4) | (0x5 << 16) | (0x4 << 12) }, ++ { 192, 0x77700300 | (0x4) | (0x5 << 16) | (0x5 << 12) }, ++ { 208, 0x77700300 | (0x4) | (0x6 << 16) | (0x5 << 12) }, ++ { 224, 0x77700300 | (0x4) | (0x6 << 16) | (0x6 << 12) }, ++ { 240, 0x77700300 | (0x4) | (0x7 << 16) | (0x6 << 12) }, ++ { 256, 0x77700300 | (0x4) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 288, 0x77700300 | (0x5) | (0x4 << 16) | (0x3 << 12) }, ++ { 320, 0x77700300 | (0x5) | (0x4 << 16) | (0x4 << 12) }, ++ { 352, 0x77700300 | (0x5) | (0x5 << 16) | (0x4 << 12) }, ++ { 384, 0x77700300 | (0x5) | (0x5 << 16) | (0x5 << 12) }, ++ { 416, 0x77700300 | (0x5) | (0x6 << 16) | (0x5 << 12) }, ++ { 448, 0x77700300 | (0x5) | (0x6 << 16) | (0x6 << 12) }, ++ { 480, 0x77700300 | (0x5) | (0x7 << 16) | (0x6 << 12) }, ++ { 512, 0x77700300 | (0x5) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 576, 0x77700300 | (0x6) | (0x4 << 16) | (0x3 << 12) }, ++ { 640, 0x77700300 | (0x6) | (0x4 << 16) | (0x4 << 12) }, ++ { 704, 0x77700300 | (0x6) | (0x5 << 16) | (0x4 << 12) }, ++ { 768, 0x77700300 | (0x6) | (0x5 << 16) | (0x5 << 12) }, ++ { 832, 0x77700300 | (0x6) | (0x6 << 16) | (0x5 << 12) }, ++ { 896, 0x77700300 | (0x6) | (0x6 << 16) | (0x6 << 12) }, ++ { 960, 0x77700300 | (0x6) | (0x7 << 16) | (0x6 << 12) }, ++ { 1024, 0x77700300 | (0x6) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 1152, 0x77700300 | (0x7) | (0x4 << 16) | (0x3 << 12) }, ++ { 1280, 0x77700300 | (0x7) | (0x4 << 16) | (0x4 << 12) }, ++ { 1408, 0x77700300 | (0x7) | (0x5 << 16) | (0x4 << 12) }, ++ { 1536, 0x77700300 | (0x7) | (0x5 << 16) | (0x5 << 12) }, ++ { 1664, 0x77700300 | (0x7) | (0x6 << 16) | (0x5 << 12) }, ++ { 1792, 0x77700300 | (0x7) | (0x6 << 16) | (0x6 << 12) }, ++ { 1920, 0x77700300 | (0x7) | (0x7 << 16) | (0x6 << 12) }, ++ { 2048, 0x77700300 | (0x7) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 2304, 0x77700300 | (0x8) | (0x4 << 16) | (0x3 << 12) }, ++ { 2560, 0x77700300 | (0x8) | (0x4 << 16) | (0x4 << 12) }, ++ { 2816, 0x77700300 | (0x8) | (0x5 << 16) | (0x4 << 12) }, ++ { 3072, 0x77700300 | (0x8) | (0x5 << 16) | (0x5 << 12) }, ++ { 3328, 0x77700300 | (0x8) | (0x6 << 16) | (0x5 << 12) }, ++ { 3584, 0x77700300 | (0x8) | (0x6 << 16) | (0x6 << 12) }, ++ { 3840, 0x77700300 | (0x8) | (0x7 << 16) | (0x6 << 12) }, ++ { 4096, 0x77700300 | (0x8) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 4608, 0x77700300 | (0x9) | (0x4 << 16) | (0x3 << 12) }, ++ { 5120, 0x77700300 | (0x9) | (0x4 << 16) | (0x4 << 12) }, ++ { 5632, 0x77700300 | (0x9) | (0x5 << 16) | (0x4 << 12) }, ++ { 6144, 0x77700300 | (0x9) | (0x5 << 16) | (0x5 << 12) }, ++ { 6656, 0x77700300 | (0x9) | (0x6 << 16) | (0x5 << 12) }, ++ { 7168, 0x77700300 | (0x9) | (0x6 << 16) | (0x6 << 12) }, ++ { 7680, 0x77700300 | (0x9) | (0x7 << 16) | (0x6 << 12) }, ++ { 8192, 0x77700300 | (0x9) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 9216, 0x77700300 | (0xa) | (0x4 << 16) | (0x3 << 12) }, ++ { 10240, 0x77700300 | (0xa) | (0x4 << 16) | (0x4 << 12) }, ++ { 11264, 0x77700300 | (0xa) | (0x5 << 16) | (0x4 << 12) }, ++ { 12288, 0x77700300 | (0xa) | (0x5 << 16) | (0x5 << 12) }, ++ { 13312, 0x77700300 | (0xa) | (0x6 << 16) | (0x5 << 12) }, ++ { 14336, 0x77700300 | (0xa) | (0x6 << 16) | (0x6 << 12) }, ++ { 15360, 0x77700300 | (0xa) | (0x7 << 16) | (0x6 << 12) }, ++ { 16384, 0x77700300 | (0xa) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 18432, 0x77700300 | (0xb) | (0x4 << 16) | (0x3 << 12) }, ++ { 20480, 0x77700300 | (0xb) | (0x4 << 16) | (0x4 << 12) }, ++ { 22528, 0x77700300 | (0xb) | (0x5 << 16) | (0x4 << 12) }, ++ { 24576, 0x77700300 | (0xb) | (0x5 << 16) | (0x5 << 12) }, ++ { 26624, 0x77700300 | (0xb) | (0x6 << 16) | (0x5 << 12) }, ++ { 28672, 0x77700300 | (0xb) | (0x6 << 16) | (0x6 << 12) }, ++ { 30720, 0x77700300 | (0xb) | (0x7 << 16) | (0x6 << 12) }, ++ { 32768, 0x77700300 | (0xb) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 36864, 0x77700300 | (0xc) | (0x4 << 16) | (0x3 << 12) }, ++ { 40960, 0x77700300 | (0xc) | (0x4 << 16) | (0x4 << 12) }, ++ { 45056, 0x77700300 | (0xc) | (0x5 << 16) | (0x4 << 12) }, ++ { 49152, 0x77700300 | (0xc) | (0x5 << 16) | (0x5 << 12) }, ++ { 53248, 0x77700300 | (0xc) | (0x6 << 16) | (0x5 << 12) }, ++ { 57344, 0x77700300 | (0xc) | (0x6 << 16) | (0x6 << 12) }, ++ { 61440, 0x77700300 | (0xc) | (0x7 << 16) | (0x6 << 12) }, ++ { 65536, 0x77700300 | (0xc) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 73728, 0x77700300 | (0xd) | (0x4 << 16) | (0x3 << 12) }, ++ { 81920, 0x77700300 | (0xd) | (0x4 << 16) | (0x4 << 12) }, ++ { 90112, 0x77700300 | (0xd) | (0x5 << 16) | (0x4 << 12) }, ++ { 98304, 0x77700300 | (0xd) | (0x5 << 16) | (0x5 << 12) }, ++ { 106496, 0x77700300 | (0xd) | (0x6 << 16) | (0x5 << 12) }, ++ { 114688, 0x77700300 | (0xd) | (0x6 << 16) | (0x6 << 12) }, ++ { 122880, 0x77700300 | (0xd) | (0x7 << 16) | (0x6 << 12) }, ++ { 131072, 0x77700300 | (0xd) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 147456, 0x77700300 | (0xe) | (0x4 << 16) | (0x3 << 12) }, ++ { 163840, 0x77700300 | (0xe) | (0x4 << 16) | (0x4 << 12) }, ++ { 180224, 0x77700300 | (0xe) | (0x5 << 16) | (0x4 << 12) }, ++ { 196608, 0x77700300 | (0xe) | (0x5 << 16) | (0x5 << 12) }, ++ { 212992, 0x77700300 | (0xe) | (0x6 << 16) | (0x5 << 12) }, ++ { 229376, 0x77700300 | (0xe) | (0x6 << 16) | (0x6 << 12) }, ++ { 245760, 0x77700300 | (0xe) | (0x7 << 16) | (0x6 << 12) }, ++ { 262144, 0x77700300 | (0xe) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 294912, 0x77700300 | (0xf) | (0x4 << 16) | (0x3 << 12) }, ++ { 327680, 0x77700300 | (0xf) | (0x4 << 16) | (0x4 << 12) }, ++ { 360448, 0x77700300 | (0xf) | (0x5 << 16) | (0x4 << 12) }, ++ { 393216, 0x77700300 | (0xf) | (0x5 << 16) | (0x5 << 12) }, ++ { 425984, 0x77700300 | (0xf) | (0x6 << 16) | (0x5 << 12) }, ++ { 458752, 0x77700300 | (0xf) | (0x6 << 16) | (0x6 << 12) }, ++ { 491520, 0x77700300 | (0xf) | (0x7 << 16) | (0x6 << 12) }, ++ { 524288, 0x77700300 | (0xf) | (0x7 << 16) | (0x7 << 12) }, ++#endif ++}; ++ ++static inline void ast_i2c_write(struct ast_i2c_bus *i2c_bus, u32 val, u32 reg) ++{ ++#if 0 ++ printf("%x: W : reg %x , val: %x \n",i2c_bus->reg_base, reg, val); ++#endif ++ __raw_writel(val, i2c_bus->reg_base + reg); ++} ++ ++static inline u32 ast_i2c_read(struct ast_i2c_bus *i2c_bus, u32 reg) ++{ ++#if 0 ++ u32 val = __raw_readl(i2c_bus->reg_base + reg); ++ printf("%x: R : reg %x , val: %x \n",i2c_bus->reg_base, reg, val); ++ return val; ++#else ++ return __raw_readl(i2c_bus->reg_base + reg); ++#endif ++} ++ ++static u32 select_i2c_clock(unsigned int bus_clk) ++{ ++#if 0 ++ unsigned int clk, inc = 0, div, divider_ratio; ++ u32 SCL_Low, SCL_High, data; ++ ++ clk = ast_get_pclk(); ++// debug("pclk = %d \n",clk); ++ divider_ratio = clk / bus_clk; ++ for (div = 0; divider_ratio >= 16; div++) ++ { ++ inc |= (divider_ratio & 1); ++ divider_ratio >>= 1; ++ } ++ divider_ratio += inc; ++ SCL_Low = (divider_ratio >> 1) - 1; ++ SCL_High = divider_ratio - SCL_Low - 2; ++ data = 0x77700300 | (SCL_High << 16) | (SCL_Low << 12) | div; ++// printk("I2CD04 for %d = %08X\n", target_speed, data); ++ return data; ++#else ++ int i; ++ unsigned int clk; ++ u32 data; ++ ++ clk = ast_get_pclk(); ++ // debug("pclk = %d \n",clk); ++ ++ for (i = 0; ++ i < sizeof(i2c_timing_table) / sizeof(struct ast_i2c_timing_table); ++ i++) { ++ if ((clk / i2c_timing_table[i].divisor) < bus_clk) { ++ break; ++ } ++ } ++ data = i2c_timing_table[i].timing; ++ // printk("divisor [%d], timing [%x] \n", i2c_timing_table[i].divisor, ++ // i2c_timing_table[i].timing); ++ return data; ++#endif ++} ++ ++static int ast_i2c_wait_isr(struct ast_i2c_bus *i2c_bus, u32 flag) ++{ ++ int timeout = 0; ++ ++ while (!(ast_i2c_read(i2c_bus, I2C_INTR_STS_REG) & flag) && ++ (timeout < I2C_TIMEOUT_COUNT)) { ++ udelay(I2C_SLEEP_US); ++ timeout++; ++ } ++ ++ /* Clear Interrupt */ ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ if (timeout >= I2C_TIMEOUT_COUNT) { ++ debug("%s timed out:- flag: %x\n", __func__, flag); ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static int ast_i2c_wait_tx(struct ast_i2c_bus *i2c_bus) ++{ ++ int sts; ++ int timeout = 0; ++ while (1) { ++ sts = ast_i2c_read(i2c_bus, I2C_INTR_STS_REG); ++ ++ if (timeout > I2C_TIMEOUT_COUNT) { ++ /* I2C Reset */ ++ debug("Timeout: Bus:%d, Addr:0x%02x\n", i2c_bus_num, ++ i2c_bus->addr); ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, ++ I2C_FUN_CTRL_REG); ++ ++ return -ETIMEDOUT; ++ } else if (sts & AST_I2CD_INTR_STS_TX_NAK) { ++ ast_i2c_write(i2c_bus, AST_I2CD_INTR_STS_TX_NAK, ++ I2C_INTR_STS_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, ++ I2C_CMD_REG); ++ ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_NORMAL_STOP); ++ ++ return -EREMOTEIO; ++ } else if (sts & AST_I2CD_INTR_STS_TX_ACK) { ++ ast_i2c_write(i2c_bus, AST_I2CD_INTR_STS_TX_ACK, ++ I2C_INTR_STS_REG); ++ break; ++ } else { ++ timeout++; ++ } ++ udelay(I2C_SLEEP_US); ++ } ++ ++ return 0; ++} ++ ++static int ast_i2c_deblock(struct ast_i2c_bus *i2c_bus) ++{ ++ u32 csr; ++ int ret = 0; ++ ++ if ((csr = ast_i2c_read(i2c_bus, I2C_CMD_REG)) & ++ AST_I2CD_BUS_BUSY_STS) { ++ if ((csr & AST_I2CD_SDA_LINE_STS) && ++ (csr & AST_I2CD_SCL_LINE_STS)) { ++ /* Bus idle */ ++ debug("Bus(%d) idle\n", i2c_bus_num); ++ ret = 0; ++ } else if (csr & AST_I2CD_SDA_LINE_STS) { ++ /* send stop command */ ++ debug("Unterminated TXN in (%x), sending stop...\n", ++ csr); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_NORMAL_STOP); ++ } else if (csr & AST_I2CD_SCL_LINE_STS) { ++ /* Possibly stuck slave */ ++ debug("Bus stuck (%x), attempting recovery...\n", csr); ++ ast_i2c_write(i2c_bus, AST_I2CD_BUS_RECOVER_CMD_EN, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_BUS_RECOVER); ++ } else { ++ debug("Bus(%d) slave(0x%02x) busy. Reseting bus...\n", ++ i2c_bus_num, i2c_bus->addr); ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, ++ I2C_FUN_CTRL_REG); ++ ret = 0; ++ } ++ } ++ ++ return ret; ++} ++ ++static int ast_i2c_xfer(struct ast_i2c_bus *i2c_bus) ++{ ++ int sts, i, ret = 0; ++ ++ /* Clear Interrupt */ ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ /* Check for bus busy */ ++ ret = ast_i2c_deblock(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ // first start ++ debug(" %sing %d byte%s %s 0x%02x\n", i2c_bus->flags ? "read" : "write", ++ i2c_bus->d_len, i2c_bus->d_len > 1 ? "s" : "", ++ i2c_bus->flags ? "from" : "to", i2c_bus->addr); ++ ++ if (i2c_bus->flags) { ++ // READ ++ if (i2c_bus->a_len) { ++ // send start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1), ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, ++ AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ++ /* Wait for ACK */ ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ /* Send Offset */ ++ for (i = 0; i < i2c_bus->a_len; i++) { ++ debug("offset [%x] \n", i2c_bus->a_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->a_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ } ++ ++ // repeat-start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1) | 0x1, ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ for (i = 0; i < i2c_bus->d_len; i++) { ++ if (i == (i2c_bus->d_len - 1)) { ++ ast_i2c_write(i2c_bus, ++ AST_I2CD_M_RX_CMD | ++ AST_I2CD_M_S_RX_CMD_LAST, ++ I2C_CMD_REG); ++ } else { ++ ast_i2c_write(i2c_bus, AST_I2CD_M_RX_CMD, ++ I2C_CMD_REG); ++ } ++ ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_RX_DOWN); ++ if (ret != 0) ++ return ret; ++ ++ i2c_bus->d_buf[i] = ++ (ast_i2c_read(i2c_bus, I2C_BYTE_BUF_REG) & ++ AST_I2CD_RX_BYTE_BUFFER) >> ++ 8; ++ } ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, AST_I2CD_INTR_STS_NORMAL_STOP); ++ if (ret != 0) ++ return ret; ++ ++ } else { ++ // Write ++ // send start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1), I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ++ /* Wait for ACK */ ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ /* Send Offset */ ++ for (i = 0; i < i2c_bus->a_len; i++) { ++ debug("offset [%x] \n", i2c_bus->a_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->a_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ ++ /* Tx data */ ++ for (i = 0; i < i2c_bus->d_len; i++) { ++ debug("Tx data [%x] \n", i2c_bus->d_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->d_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, AST_I2CD_INTR_STS_NORMAL_STOP); ++ if (ret != 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++/*****************************************************************************/ ++ ++unsigned int i2c_get_bus_speed(void) ++{ ++ return ast_i2c[i2c_bus_num].speed; ++} ++ ++int i2c_set_bus_speed(unsigned int speed) ++{ ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ /* Set AC Timing */ ++ ast_i2c_write(i2c_bus, select_i2c_clock(speed), I2C_AC_TIMING_REG1); ++ ast_i2c_write(i2c_bus, AST_NO_TIMEOUT_CTRL, I2C_AC_TIMING_REG2); ++ ++ i2c_bus->speed = speed; ++ ++ return 0; ++} ++ ++unsigned int i2c_get_base(int bus_no) ++{ ++ switch (bus_no) { ++ case 0: ++ return AST_I2C_DEV0_BASE; ++ break; ++ case 1: ++ return AST_I2C_DEV1_BASE; ++ break; ++ case 2: ++ return AST_I2C_DEV2_BASE; ++ break; ++ case 3: ++ return AST_I2C_DEV3_BASE; ++ break; ++ case 4: ++ return AST_I2C_DEV4_BASE; ++ break; ++ case 5: ++ return AST_I2C_DEV5_BASE; ++ break; ++ case 6: ++ return AST_I2C_DEV6_BASE; ++ break; ++ case 7: ++ return AST_I2C_DEV7_BASE; ++ break; ++ case 8: ++ return AST_I2C_DEV8_BASE; ++ break; ++ case 9: ++ return AST_I2C_DEV9_BASE; ++ break; ++ case 10: ++ return AST_I2C_DEV10_BASE; ++ break; ++ case 11: ++ return AST_I2C_DEV11_BASE; ++ break; ++ case 12: ++ return AST_I2C_DEV12_BASE; ++ break; ++ case 13: ++ return AST_I2C_DEV13_BASE; ++ break; ++ default: ++ printf("i2c base error \n"); ++ break; ++ }; ++ return 0; ++} ++ ++void i2c_init(int speed, int slaveaddr) ++{ ++ int i = 0; ++ struct ast_i2c_bus *i2c_bus; ++ ++ // SCU I2C Reset ++ ast_scu_init_i2c(); ++ ++ /* This will override the speed selected in the fdt for that port */ ++ debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr); ++ ++ for (i = 0; i < CONFIG_SYS_MAX_I2C_BUS; i++) { ++ i2c_bus = &ast_i2c[i]; ++ i2c_bus->reg_base = i2c_get_base(i); ++ ++ i2c_bus->speed = CONFIG_SYS_I2C_SPEED; ++ i2c_bus->state = 0; ++ ++ // I2C Multi-Pin ++ ast_scu_multi_func_i2c(i); ++ ++ // I2CG Reset ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ++ // Enable Master Mode ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, I2C_FUN_CTRL_REG); ++ ++ // SLAVE mode enable ++#if 0 ++ if(slaveaddr) { ++ ast_i2c_write(i2c_bus, slaveaddr, I2C_DEV_ADDR_REG); ++ ast_i2c_write(i2c_bus, ast_i2c_read(i2c_bus,I2C_FUN_CTRL_REG) | AST_I2CD_SLAVE_EN, I2C_FUN_CTRL_REG); ++ } ++#endif ++ ++ /* Set AC Timing */ ++ i2c_set_bus_speed(speed); ++ ++ // Clear Interrupt ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ /* Set interrupt generation of I2C controller */ ++ ast_i2c_write(i2c_bus, 0, I2C_INTR_CTRL_REG); ++ } ++ ++ i2c_bus_num = 0; ++ debug("end\n"); ++} ++ ++/* Probe to see if a chip is present. */ ++int i2c_probe(uchar addr) ++{ ++ uchar a_buf[1] = { 0 }; ++ ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_probe[bus:%d]: addr=0x%x\n", i2c_bus_num, addr); ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 1; ++ i2c_bus->a_len = 1; ++ i2c_bus->a_buf = (u8 *)&a_buf; ++ i2c_bus->d_len = 1; ++ i2c_bus->d_buf = (u8 *)&a_buf; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++/* Read bytes */ ++int i2c_read(uchar addr, uint offset, int alen, uchar *buffer, int len) ++{ ++ uchar xoffset[4]; ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_read[bus:%d]: addr=0x%x, offset=0x%x, alen=0x%x len=0x%x\n", ++ i2c_bus_num, addr, offset, alen, len); ++ ++ if (alen > 4) { ++ debug("I2C read: addr len %d not supported\n", alen); ++ return 1; ++ } ++ ++ if (alen > 0) { ++ xoffset[0] = (offset >> 24) & 0xFF; ++ xoffset[1] = (offset >> 16) & 0xFF; ++ xoffset[2] = (offset >> 8) & 0xFF; ++ xoffset[3] = offset & 0xFF; ++ } ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 1; ++ i2c_bus->a_len = alen; ++ i2c_bus->a_buf = &xoffset[4 - alen]; ++ i2c_bus->d_len = len; ++ i2c_bus->d_buf = buffer; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++/* Write bytes */ ++int i2c_write(uchar addr, uint offset, int alen, uchar *buffer, int len) ++{ ++ uchar xoffset[4]; ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_write[bus:%d]: addr=0x%x, offset=0x%x, alen=0x%x len=0x%x\n", ++ i2c_bus_num, addr, offset, alen, len); ++ ++ if (alen > 0) { ++ xoffset[0] = (offset >> 24) & 0xFF; ++ xoffset[1] = (offset >> 16) & 0xFF; ++ xoffset[2] = (offset >> 8) & 0xFF; ++ xoffset[3] = offset & 0xFF; ++ } ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 0; ++ i2c_bus->a_len = alen; ++ i2c_bus->a_buf = &xoffset[4 - alen]; ++ i2c_bus->d_len = len; ++ i2c_bus->d_buf = buffer; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++#if defined(CONFIG_I2C_MULTI_BUS) ++/* ++ * Functions for multiple I2C bus handling ++ */ ++unsigned int i2c_get_bus_num(void) ++{ ++ return i2c_bus_num; ++} ++ ++int i2c_set_bus_num(unsigned int bus) ++{ ++ if (bus >= NUM_BUS) ++ return -1; ++ i2c_bus_num = bus; ++ ++ return 0; ++} ++#endif +diff --git a/drivers/i2c/ast_i2c.h b/drivers/i2c/ast_i2c.h +new file mode 100644 +index 0000000..7cff0e5 +--- /dev/null ++++ b/drivers/i2c/ast_i2c.h +@@ -0,0 +1,131 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2012-2020 ASPEED Technology Inc. ++ * Copyright 2016 IBM Corporation ++ * Copyright 2017 Google, Inc. ++ */ ++#ifndef __AST_I2C_H_ ++#define __AST_I2C_H_ ++ ++struct ast_i2c_regs { ++ u32 fcr; ++ u32 cactcr1; ++ u32 cactcr2; ++ u32 icr; ++ u32 isr; ++ u32 csr; ++ u32 sdar; ++ u32 pbcr; ++ u32 trbbr; ++#ifdef CONFIG_ASPEED_AST2500 ++ u32 dma_mbar; ++ u32 dma_tlr; ++#endif ++}; ++ ++/* Device Register Definition */ ++/* 0x00 : I2CD Function Control Register */ ++#define I2CD_BUFF_SEL_MASK (0x7 << 20) ++#define I2CD_BUFF_SEL(x) (x << 20) ++#define I2CD_M_SDA_LOCK_EN (0x1 << 16) ++#define I2CD_MULTI_MASTER_DIS (0x1 << 15) ++#define I2CD_M_SCL_DRIVE_EN (0x1 << 14) ++#define I2CD_MSB_STS (0x1 << 9) ++#define I2CD_SDA_DRIVE_1T_EN (0x1 << 8) ++#define I2CD_M_SDA_DRIVE_1T_EN (0x1 << 7) ++#define I2CD_M_HIGH_SPEED_EN (0x1 << 6) ++#define I2CD_DEF_ADDR_EN (0x1 << 5) ++#define I2CD_DEF_ALERT_EN (0x1 << 4) ++#define I2CD_DEF_ARP_EN (0x1 << 3) ++#define I2CD_DEF_GCALL_EN (0x1 << 2) ++#define I2CD_SLAVE_EN (0x1 << 1) ++#define I2CD_MASTER_EN (0x1) ++ ++/* 0x04 : I2CD Clock and AC Timing Control Register #1 */ ++/* Base register value. These bits are always set by the driver. */ ++#define I2CD_CACTC_BASE 0xfff00300 ++#define I2CD_TCKHIGH_SHIFT 16 ++#define I2CD_TCKLOW_SHIFT 12 ++#define I2CD_THDDAT_SHIFT 10 ++#define I2CD_TO_DIV_SHIFT 8 ++#define I2CD_BASE_DIV_SHIFT 0 ++ ++/* 0x08 : I2CD Clock and AC Timing Control Register #2 */ ++#define I2CD_tTIMEOUT 1 ++#define I2CD_NO_TIMEOUT_CTRL 0 ++ ++/* 0x0c : I2CD Interrupt Control Register & ++ * 0x10 : I2CD Interrupt Status Register ++ * ++ * These share bit definitions, so use the same values for the enable & ++ * status bits. ++ */ ++#define I2CD_INTR_SDA_DL_TIMEOUT (0x1 << 14) ++#define I2CD_INTR_BUS_RECOVER_DONE (0x1 << 13) ++#define I2CD_INTR_SMBUS_ALERT (0x1 << 12) ++#define I2CD_INTR_SMBUS_ARP_ADDR (0x1 << 11) ++#define I2CD_INTR_SMBUS_DEV_ALERT_ADDR (0x1 << 10) ++#define I2CD_INTR_SMBUS_DEF_ADDR (0x1 << 9) ++#define I2CD_INTR_GCALL_ADDR (0x1 << 8) ++#define I2CD_INTR_SLAVE_MATCH (0x1 << 7) ++#define I2CD_INTR_SCL_TIMEOUT (0x1 << 6) ++#define I2CD_INTR_ABNORMAL (0x1 << 5) ++#define I2CD_INTR_NORMAL_STOP (0x1 << 4) ++#define I2CD_INTR_ARBIT_LOSS (0x1 << 3) ++#define I2CD_INTR_RX_DONE (0x1 << 2) ++#define I2CD_INTR_TX_NAK (0x1 << 1) ++#define I2CD_INTR_TX_ACK (0x1 << 0) ++ ++/* 0x14 : I2CD Command/Status Register */ ++#define I2CD_SDA_OE (0x1 << 28) ++#define I2CD_SDA_O (0x1 << 27) ++#define I2CD_SCL_OE (0x1 << 26) ++#define I2CD_SCL_O (0x1 << 25) ++#define I2CD_TX_TIMING (0x1 << 24) ++#define I2CD_TX_STATUS (0x1 << 23) ++ ++/* Tx State Machine */ ++#define I2CD_IDLE 0x0 ++#define I2CD_MACTIVE 0x8 ++#define I2CD_MSTART 0x9 ++#define I2CD_MSTARTR 0xa ++#define I2CD_MSTOP 0xb ++#define I2CD_MTXD 0xc ++#define I2CD_MRXACK 0xd ++#define I2CD_MRXD 0xe ++#define I2CD_MTXACK 0xf ++#define I2CD_SWAIT 0x1 ++#define I2CD_SRXD 0x4 ++#define I2CD_STXACK 0x5 ++#define I2CD_STXD 0x6 ++#define I2CD_SRXACK 0x7 ++#define I2CD_RECOVER 0x3 ++ ++#define I2CD_SCL_LINE_STS (0x1 << 18) ++#define I2CD_SDA_LINE_STS (0x1 << 17) ++#define I2CD_BUS_BUSY_STS (0x1 << 16) ++#define I2CD_SDA_OE_OUT_DIR (0x1 << 15) ++#define I2CD_SDA_O_OUT_DIR (0x1 << 14) ++#define I2CD_SCL_OE_OUT_DIR (0x1 << 13) ++#define I2CD_SCL_O_OUT_DIR (0x1 << 12) ++#define I2CD_BUS_RECOVER_CMD (0x1 << 11) ++#define I2CD_S_ALT_EN (0x1 << 10) ++#define I2CD_RX_DMA_ENABLE (0x1 << 9) ++#define I2CD_TX_DMA_ENABLE (0x1 << 8) ++ ++/* Command Bit */ ++#define I2CD_RX_BUFF_ENABLE (0x1 << 7) ++#define I2CD_TX_BUFF_ENABLE (0x1 << 6) ++#define I2CD_M_STOP_CMD (0x1 << 5) ++#define I2CD_M_S_RX_CMD_LAST (0x1 << 4) ++#define I2CD_M_RX_CMD (0x1 << 3) ++#define I2CD_S_TX_CMD (0x1 << 2) ++#define I2CD_M_TX_CMD (0x1 << 1) ++#define I2CD_M_START_CMD 0x1 ++ ++#define I2CD_RX_DATA_SHIFT 8 ++#define I2CD_RX_DATA_MASK (0xff << I2CD_RX_DATA_SHIFT) ++ ++#define I2C_HIGHSPEED_RATE 400000 ++ ++#endif /* __AST_I2C_H_ */ +diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h +index b7d7192..0bc7f2d 100644 +--- a/include/configs/ast-common.h ++++ b/include/configs/ast-common.h +@@ -84,6 +84,11 @@ + #define CONFIG_SYS_MAXARGS 16 + #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + ++/* I2C config */ ++#define CONFIG_I2C_MULTI_BUS 1 ++#define CONFIG_SYS_MAX_I2C_BUS 8 ++#define CONFIG_SYS_I2C_SPEED 100000 ++ + /* + * Optional MTD and UBI support + */ +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch new file mode 100644 index 000000000..d8e7c4645 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch @@ -0,0 +1,300 @@ +From 35a50c959b290ba8a6f0e70a42ae952b65df8a9d Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Tue, 7 May 2019 11:26:35 +0530 +Subject: [PATCH] CPLD u-boot commands support for PFR + +Implemented the cpld command in u-boot for +communicating with PFR CPLD. + +Tested: +Simulated test on different I2C bus and slave +as we don't have hardware available yet. +ast# cpld dump +*** Dumping CPLD Registers *** +0x0000 | 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f +---------------------------------------------------------- +0x0000 | 03 00 00 00 01 09 00 f5 01 09 19 cb 46 4c 45 -- +0x0001 | -- 52 4f 4e 49 43 53 cf 53 2d 31 31 30 30 41 44 +0x0002 | 55 -- 30 2d 32 30 31 ca 47 38 34 30 32 -- 2d -- +0x0003 | 30 37 c2 30 31 cc 45 58 57 44 36 34 39 30 30 38 +............................. +ast# cpld read 0x00 +CPLD read successful. Reg:0x00 Val:0x03 +ast# cpld write 0x00 0x04 +CPLD write successful. Reg:0x00 Val:0x04 +ast# cpld read 0x00 +CPLD read successful. Reg:0x00 Val:0x04 +ast# + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + cmd/Makefile | 1 + + cmd/cpld.c | 244 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 245 insertions(+) + create mode 100644 cmd/cpld.c + +diff --git a/cmd/Makefile b/cmd/Makefile +index a1731be..c8ac0af 100644 +--- a/cmd/Makefile ++++ b/cmd/Makefile +@@ -66,6 +66,7 @@ obj-$(CONFIG_CMD_FUSE) += fuse.o + obj-$(CONFIG_CMD_GETTIME) += gettime.o + obj-$(CONFIG_CMD_GPIO) += gpio.o + obj-$(CONFIG_CMD_I2C) += i2c.o ++obj-$(CONFIG_CMD_I2C) += cpld.o + obj-$(CONFIG_CMD_IOTRACE) += iotrace.o + obj-$(CONFIG_CMD_HASH) += hash.o + obj-$(CONFIG_CMD_IDE) += ide.o +diff --git a/cmd/cpld.c b/cmd/cpld.c +new file mode 100644 +index 0000000..63220cb +--- /dev/null ++++ b/cmd/cpld.c +@@ -0,0 +1,244 @@ ++/* ++ * Copyright (c) 2018-2019 Intel Corporation ++ * Written by AppaRao Puli <apparao.puli@intel.com> ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include <common.h> ++#include <command.h> ++#include <cli.h> ++#include <i2c.h> ++#include <errno.h> ++#include <linux/compiler.h> ++ ++#define PFR_CPLD_I2C_BUSNO 5 ++#define PFR_CPLD_SLAVE_ADDR 0x0E ++ ++#define CPLD_READ_TIMEOUT_ATTEMPTS 5 ++ ++/* Some CPLD registers are self cleared after read. ++ * We should skip them reading to avoid functionality impact.*/ ++/* TODO: Need to get this list from CPLD team. */ ++static uchar cpld_reg_skip_read[] = {}; ++ ++static bool skip_cpld_reg_read(u32 reg) ++{ ++ int size = ARRAY_SIZE(cpld_reg_skip_read); ++ for (int i = 0; i < size; i++) { ++ if (reg == cpld_reg_skip_read[i]) ++ return true; ++ } ++ ++ return false; ++} ++ ++static int do_cpld_write(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr; ++ uchar value; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 3) ++ return CMD_RET_USAGE; ++ ++ reg_addr = simple_strtoul(argv[1], NULL, 16); ++ if (reg_addr > 0xFF) { ++ printf("Invalid register. Valid range[0x00-0xFF]."); ++ return CMD_RET_FAILURE; ++ } ++ value = simple_strtoul(argv[2], NULL, 16); ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ ret = i2c_write(chip, reg_addr, 1, &value, 1); ++ if (ret) { ++ printf("Error writing the chip: %d\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("CPLD write successful. Reg:0x%02x Val:0x%02x\n", reg_addr, ++ value); ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++ ++static int do_cpld_read(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr; ++ uchar value[1]; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 2) ++ return CMD_RET_USAGE; ++ ++ reg_addr = simple_strtoul(argv[1], NULL, 16); ++ if (reg_addr > 0xFF) { ++ printf("Invalid register. Valid range[0x00-0xFF]."); ++ return CMD_RET_FAILURE; ++ } ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ if (skip_cpld_reg_read(reg_addr)) { ++ printf("CPLD register(0x%02x) reading is not allowed.\n", ++ reg_addr); ++ ret = 0; ++ goto done; ++ } ++ ++ ret = i2c_read(chip, reg_addr, 1, value, 1); ++ if (ret) { ++ printf("Error reading the chip: %d\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("CPLD read successful. Reg:0x%02x Val:0x%02x\n", reg_addr, ++ value[0]); ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++ ++static int do_cpld_dump(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr = 0x00; ++ uchar value[1]; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 1) ++ return CMD_RET_USAGE; ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("*** Dumping CPLD Registers ***\n", reg_addr, value); ++ printf("0x%04x | ", reg_addr); ++ for (int i = 0; i < 0x10; i++) ++ printf(" %02x", i); ++ printf("\n----------------------------------------------------------\n"); ++ ++ while (reg_addr <= 0xFF) { ++ if ((reg_addr % 16) == 0) ++ printf("0x%04x | ", (reg_addr / 16)); ++ ++ if (skip_cpld_reg_read(reg_addr)) { ++ printf(" --"); ++ } else { ++ int timeout = 0; ++ while (i2c_read(chip, reg_addr, 1, value, 1) != 0) { ++ if (timeout++ >= CPLD_READ_TIMEOUT_ATTEMPTS) { ++ printf("\nERROR: Reading the chip: %d\n", ++ ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ /* Need delay for I2C devices continous read */ ++ mdelay(3 * timeout); ++ } ++ printf(" %02x", value[0]); ++ } ++ ++ reg_addr++; ++ if ((reg_addr % 16) == 0) ++ printf("\n"); ++ } ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++static cmd_tbl_t cmd_cpld_sub[] = { ++ U_BOOT_CMD_MKENT(dump, 1, 1, do_cpld_dump, "", ""), ++ U_BOOT_CMD_MKENT(read, 2, 1, do_cpld_read, "", ""), ++ U_BOOT_CMD_MKENT(write, 3, 1, do_cpld_write, "", "") ++}; ++ ++/** ++ * do_cpld() - Handle the "cpld" command-line command ++ * @cmdtp: Command data struct pointer ++ * @flag: Command flag ++ * @argc: Command-line argument count ++ * @argv: Array of command-line arguments ++ * ++ * Returns zero on success, CMD_RET_USAGE in case of misuse and negative ++ * on error. ++ */ ++static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ cmd_tbl_t *c = NULL; ++ ++ if (argc < 2) ++ return CMD_RET_USAGE; ++ ++ /* Strip off leading 'cpld' command argument */ ++ argc--; ++ argv++; ++ ++ if (argc) ++ c = find_cmd_tbl(argv[0], cmd_cpld_sub, ++ ARRAY_SIZE(cmd_cpld_sub)); ++ ++ if (c) ++ return c->cmd(cmdtp, flag, argc, argv); ++ else ++ return CMD_RET_USAGE; ++} ++ ++#ifdef CONFIG_SYS_LONGHELP ++static char cpld_help_text[] = ++ "cpld dump - Dump all CPLD registers.\n" ++ "cpld read <reg> - Read CPLD register.\n" ++ "cpld write <reg> <val> - Write CPLD register.\n"; ++#endif ++ ++U_BOOT_CMD(cpld, 4, 1, do_cpld, "PFR CPLD information", cpld_help_text); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch new file mode 100644 index 000000000..7601f6dea --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch @@ -0,0 +1,61 @@ +From 56d13790a713659e34eca884ce36dca76b3bdf3d Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 13 May 2019 23:49:02 +0530 +Subject: [PATCH] Enabling uart1&uart2 in u-boot for BIOS messages + +Added uart init function in u-boot aspeed code +to enable uart1 and uart2 for BIOS serial messages. + +Tested: +Forced BMC to stop in u-boot( using Force Firmware Update +Jumper), AC cycled system for multiple times, booted system +to uefi, checked bios serial logs working fine and accessed +keyboard in uefi without any issues. + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + board/aspeed/ast-g5/ast-g5-intel.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 86b422f..fe5128f 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -414,6 +414,26 @@ void ast_g5_intel_late_init(void) + free(cmdline_new); + } + ++static void uart_init(void) ++{ ++ u32 val; ++ ++ /* Enable UART1 and UART2 for BIOS messages */ ++ val = ast_scu_read(AST_SCU_FUN_PIN_CTRL2); ++ ++ /* UART1 */ ++ val |= (SCU_FUN_PIN_UART1_NCTS | SCU_FUN_PIN_UART1_NDCD | ++ SCU_FUN_PIN_UART1_NDSR | SCU_FUN_PIN_UART1_NRI | ++ SCU_FUN_PIN_UART1_NDTR | SCU_FUN_PIN_UART1_NRTS | ++ SCU_FUN_PIN_UART1_TXD | SCU_FUN_PIN_UART1_RXD); ++ /* UART2 */ ++ val |= (SCU_FUN_PIN_UART2_NCTS | SCU_FUN_PIN_UART2_NDCD | ++ SCU_FUN_PIN_UART2_NDSR | SCU_FUN_PIN_UART2_NRI | ++ SCU_FUN_PIN_UART2_NDTR | SCU_FUN_PIN_UART2_NRTS | ++ SCU_FUN_PIN_UART2_TXD | SCU_FUN_PIN_UART2_RXD); ++ ast_scu_write(val, AST_SCU_FUN_PIN_CTRL2); ++} ++ + static void pwm_init(void) + { + uint32_t val; +@@ -482,6 +502,7 @@ extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) + { ++ uart_init(); + pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend index 8eb06b622..6026f8d91 100644 --- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend @@ -29,5 +29,9 @@ SRC_URI_append_wolfpass = " \ file://0022-KCS-driver-support-in-uBoot.patch \ file://0023-Add-TPM-enable-pulse-triggering.patch \ file://0024-IPMI-command-handler-implementation-in-uboot.patch \ + file://0025-Manufacturing-mode-physical-presence-detection.patch \ + file://0026-Aspeed-I2C-support-in-U-Boot.patch \ + file://0027-CPLD-u-boot-commands-support-for-PFR.patch \ + file://0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch \ " SRC_URI_append_wolfpass += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'file://0022-u-boot-env-change-for-PFR-image.patch', '', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend new file mode 100644 index 000000000..6026f8d91 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend @@ -0,0 +1,37 @@ +FILESEXTRAPATHS_append_wolfpass:= "${THISDIR}/files:" + +# the meta-phosphor layer adds this patch, which conflicts +# with the intel layout for environment +SRC_URI_remove_wolfpass = " file://0001-configs-ast-Add-redundnant-env.patch" + +SRC_URI_append_wolfpass = " \ + file://0001-flash-use-readX-writeX-not-udelay.patch \ + file://0002-intel-layout-environment-addr.patch \ + file://0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch \ + file://0005-enable-passthrough-in-uboot.patch \ + file://0006-Add-Aspeed-g5-interrupt-support.patch \ + file://0007-Add-espi-support.patch \ + file://0008-add-sgio-support-for-port80-snoop-post-LEDs.patch \ + file://0009-Add-basic-GPIO-support.patch \ + file://0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch \ + file://0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch \ + file://0012-Add-status-and-ID-LED-support.patch \ + file://0013-aspeed-Add-Pwm-Driver.patch \ + file://0014-Keep-interrupts-enabled-until-last-second.patch \ + file://0015-Rewrite-memmove-to-optimize-on-word-transfers.patch \ + file://0016-Add-support-for-128MB-Macronix-spi-flash-MX66L1G45G.patch \ + file://0017-Enable-Macronix-and-Micron-SPI-support.patch \ + file://0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch \ + file://0019-u-boot-full-platform-reset-espi-oob-ready.patch \ + file://0020-Enable-PCIe-L1-support.patch \ + file://0020-Add-system-reset-status-support.patch \ + file://0021-Config-host-uart-clock-source-using-environment-vari.patch \ + file://0022-KCS-driver-support-in-uBoot.patch \ + file://0023-Add-TPM-enable-pulse-triggering.patch \ + file://0024-IPMI-command-handler-implementation-in-uboot.patch \ + file://0025-Manufacturing-mode-physical-presence-detection.patch \ + file://0026-Aspeed-I2C-support-in-U-Boot.patch \ + file://0027-CPLD-u-boot-commands-support-for-PFR.patch \ + file://0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch \ + " +SRC_URI_append_wolfpass += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'file://0022-u-boot-env-change-for-PFR-image.patch', '', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb index 4b445ce0f..fd71e0abf 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb +++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb @@ -3,17 +3,18 @@ inherit obmc-phosphor-systemd SUMMARY = "At Scale Debug Service" DESCRIPTION = "At Scale Debug Service exposes remote JTAG target debug capabilities" -LICENSE = "Apache-2.0" -LIC_FILES_CHKSUM = "file://LICENSE;md5=40c94c59cbbc218afdd64eec899ad2f6" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://LICENSE;md5=0d1c657b2ba1e8877940a8d1614ec560" + inherit cmake DEPENDS = "sdbusplus openssl libpam" do_configure[depends] += "virtual/kernel:do_shared_workdir" -SRC_URI = "git://git@github.com/Intel-BMC/at-scale-debug;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/at-scale-debug;protocol=ssh" -SRCREV = "71a38355f46ee52620be7304c3712a47c00dad1e" +SRCREV = "acf016bebe2cada610eb4aab7b97fdcd03e2200d" S = "${WORKDIR}/git" SYSTEMD_SERVICE_${PN} += "com.intel.AtScaleDebug.service" @@ -21,4 +22,5 @@ SYSTEMD_SERVICE_${PN} += "com.intel.AtScaleDebug.service" # Specify any options you want to pass to cmake using EXTRA_OECMAKE: EXTRA_OECMAKE = "-DBUILD_UT=OFF" +CFLAGS_append = " -I ${STAGING_KERNEL_DIR}/include/uapi" CFLAGS_append = " -I ${STAGING_KERNEL_DIR}/include/" diff --git a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb b/meta-openbmc-mods/meta-common/recipes-core/crashdump/crashdump_git.bb index 1d2a6e9df..bbf4f0183 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb +++ b/meta-openbmc-mods/meta-common/recipes-core/crashdump/crashdump_git.bb @@ -1,8 +1,8 @@ inherit obmc-phosphor-dbus-service inherit obmc-phosphor-systemd -SUMMARY = "CPU Log Utils" -DESCRIPTION = "CPU utilities for dumping CPU registers over PECI" +SUMMARY = "CPU Crashdump" +DESCRIPTION = "CPU utilities for dumping CPU Crashdump and registers over PECI" DEPENDS = "boost cjson sdbusplus " inherit cmake @@ -10,14 +10,14 @@ inherit cmake LICENSE = "CLOSED" LIC_FILES_CHKSUM = "" -SRC_URI = "git://git@github.com/Intel-BMC/at-scale-debug;protocol=ssh" -SRCREV = "71a38355f46ee52620be7304c3712a47c00dad1e" +SRC_URI = "git://github.com/Intel-BMC/at-scale-debug;protocol=ssh" +SRCREV = "acf016bebe2cada610eb4aab7b97fdcd03e2200d" -S = "${WORKDIR}/git/cpu-log-util" +S = "${WORKDIR}/git/crashdump" PACKAGES += "libpeci" -SYSTEMD_SERVICE_${PN} += "com.intel.CpuDebugLog.service" -DBUS_SERVICE_${PN} += "com.intel.CpuDebugLog.service" +SYSTEMD_SERVICE_${PN} += "com.intel.crashdump.service" +DBUS_SERVICE_${PN} += "com.intel.crashdump.service" # linux-libc-headers guides this way to include custom uapi headers CFLAGS_append = " -I ${STAGING_KERNEL_DIR}/include/uapi" diff --git a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/files/com.intel.CpuDebugLog.service b/meta-openbmc-mods/meta-common/recipes-core/crashdump/files/com.intel.crashdump.service index 13d2c860e..6f79573f0 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/files/com.intel.CpuDebugLog.service +++ b/meta-openbmc-mods/meta-common/recipes-core/crashdump/files/com.intel.crashdump.service @@ -1,9 +1,9 @@ [Unit] -Description=Intel BMC CPU Debug Log +Description=Intel BMC CPU Crashdump [Service] Restart=always -ExecStart={bindir}/cpu_log +ExecStart={bindir}/crashdump Type=simple [Install] diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend index 8e06bcbf2..01cc72e69 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend @@ -1,2 +1,2 @@ SRC_URI = "git://github.com/openbmc/intel-ipmi-oem.git" -SRCREV = "acc8a4ebf38231765175fe30a075c62643983748" +SRCREV = "1f2eb5eac4a75a219ece15850a3c2dfc0fdc5991" diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb b/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb index 39bf2b966..d4ad9c4e6 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb +++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb @@ -1,8 +1,8 @@ SUMMARY = "Intel IPMI Providers" DESCRIPTION = "IPMI Provider Libraries" -SRC_URI = "git://git@github.com/Intel-BMC/intel-ipmi-providers;protocol=ssh" -SRCREV = "91d0178dc4fe513cdfd0e3d52e5eb41193b2bf57" +SRC_URI = "git://github.com/Intel-BMC/intel-ipmi-providers;protocol=ssh" +SRCREV = "3f8aa7959d2e8475e50743d32ff178257aafc1e7" S = "${WORKDIR}/git" PV = "0.1+git${SRCPV}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb b/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb index 71909e69c..506484311 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb +++ b/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb @@ -5,12 +5,12 @@ LICENSE = "CLOSED" LIC_FILES_CHKSUM = "" inherit cmake systemd -SRC_URI = "git://git@github.com/Intel-BMC/provingground;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/at-scale-debug;protocol=ssh" -DEPENDS = "boost sdbusplus cpu-log-util" +DEPENDS = "boost sdbusplus crashdump" PV = "0.1+git${SRCPV}" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRCREV = "acf016bebe2cada610eb4aab7b97fdcd03e2200d" S = "${WORKDIR}/git/peci_pcie" diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend index 3fe1c3f38..3d4e594a4 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend @@ -1,6 +1,7 @@ # Remove these files since they are provided by obmc-intel-targets SYSTEMD_SERVICE_${PN}_remove += " obmc-host-start@.target" SYSTEMD_SERVICE_${PN}_remove += " obmc-host-stop@.target" +SYSTEMD_SERVICE_${PN}_remove += " obmc-host-shutdown@.target" SYSTEMD_SERVICE_${PN}_remove += " obmc-host-reboot@.target" SYSTEMD_SERVICE_${PN}_remove += " obmc-host-startmin@.target" SYSTEMD_SERVICE_${PN}_remove += " obmc-chassis-poweron@.target" diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf index 5d4134cbd..48c60d36b 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf @@ -12,18 +12,18 @@ # See journald.conf(5) for details. [Journal] -Storage=persistent +Storage=volatile #Compress=yes #Seal=yes #SplitMode=uid #SyncIntervalSec=5m #RateLimitIntervalSec=30s #RateLimitBurst=10000 -SystemMaxUse=6M +#SystemMaxUse=6M #SystemKeepFree= -SystemMaxFileSize=512K -# SystemMaxFiles=32 -#RuntimeMaxUse=32M +#SystemMaxFileSize=512K +#SystemMaxFiles=32 +RuntimeMaxUse=32M #RuntimeKeepFree= #RuntimeMaxFileSize= #RuntimeMaxFiles=4 @@ -34,7 +34,7 @@ SystemMaxFileSize=512K #ForwardToConsole=no #ForwardToWall=yes #TTYPath=/dev/console -MaxLevelStore=notice +#MaxLevelStore=notice #MaxLevelSyslog=debug #MaxLevelKMsg=notice #MaxLevelConsole=info diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend index 8f26d784b..b3c318e15 100644 --- a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend @@ -7,6 +7,5 @@ SRC_URI += "file://journald.conf \ FILES_${PN} += " ${systemd_system_unitdir}/systemd-timesyncd.service.d/systemd-timesyncd-save-time.conf" do_install_append() { - install -m 644 -D ${WORKDIR}/journald.conf ${D}${sysconfdir}/systemd/journald.conf install -m 644 -D ${WORKDIR}/systemd-timesyncd-save-time.conf ${D}${systemd_system_unitdir}/systemd-timesyncd.service.d/systemd-timesyncd-save-time.conf } diff --git a/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb b/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb index f973acac6..3e88648b4 100644 --- a/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb +++ b/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb @@ -3,10 +3,10 @@ DESCRIPTION = "OpenBMC mtd-util" LICENSE = "MIT" LIC_FILES_CHKSUM = "file://COPYING;md5=b77c43ae4eaf67bd73fb6452b2f113a3" -SRC_URI = "git://git@github.com/Intel-BMC/mtd-util;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/mtd-util;protocol=ssh" PV = "1.0+git${SRCPV}" -SRCREV = "22a0216b5e197bb8c7264fd0be0a4bb2d5d25b90" +SRCREV = "0414bd37ba324867c5c89fc91ab80714309f4c80" S = "${WORKDIR}/git" diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy.bbappend new file mode 100644 index 000000000..58512234d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://rsyslog-override.conf \ +" diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy/rsyslog-override.conf b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy/rsyslog-override.conf new file mode 100644 index 000000000..14bcc0781 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog-policy/rsyslog-override.conf @@ -0,0 +1,2 @@ +[Service] +ExecReload=/bin/kill -HUP $MAINPID diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.service b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.service new file mode 100644 index 000000000..fdeefd417 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.service @@ -0,0 +1,9 @@ +[Unit] +Description=Rotates the event logs + +[Service] +Type=oneshot +ExecStart=/usr/sbin/logrotate /etc/logrotate.d/logrotate.rsyslog + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.timer b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.timer new file mode 100644 index 000000000..148f8e4ae --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rotate-event-logs.timer @@ -0,0 +1,8 @@ +[Unit] +Description=Run rotate-event-logs.service every minute + +[Timer] +OnCalendar=*-*-* *:*:00 + +[Install] +WantedBy=timers.target diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.conf b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.conf new file mode 100644 index 000000000..f00046b45 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.conf @@ -0,0 +1,62 @@ +# if you experience problems, check +# http://www.rsyslog.com/troubleshoot for assistance + +# rsyslog v3: load input modules +# If you do not load inputs, nothing happens! +# You may need to set the module load path if modules are not found. +# +# Ported from debian's sysklogd.conf + +# Journal-style logging +# Limit to no more than 2000 entries in one minute and enable the +# journal workaround to avoid duplicate entries +module(load="imjournal" StateFile="/var/log/state" + RateLimit.Interval="60" + RateLimit.Burst="2000") + +# Template for IPMI SEL messages +# "<timestamp> <ID>,<Type>,<EventData>,[<Generator ID>,<Path>,<Direction>]" +template(name="IPMISELTemplate" type="list") { + property(name="timereported" dateFormat="rfc3339") + constant(value=" ") + property(name="$!IPMI_SEL_RECORD_ID") + constant(value=",") + property(name="$!IPMI_SEL_RECORD_TYPE") + constant(value=",") + property(name="$!IPMI_SEL_DATA") + constant(value=",") + property(name="$!IPMI_SEL_GENERATOR_ID") + constant(value=",") + property(name="$!IPMI_SEL_SENSOR_PATH") + constant(value=",") + property(name="$!IPMI_SEL_EVENT_DIR") + constant(value="\n") +} + +# Template for Redfish messages +# "<timestamp> <MessageId>,<MessageArgs>" +template(name="RedfishTemplate" type="list") { + property(name="timereported" dateFormat="rfc3339") + constant(value=" ") + property(name="$!REDFISH_MESSAGE_ID") + constant(value=",") + property(name="$!REDFISH_MESSAGE_ARGS") + constant(value="\n") +} + +# If the journal entry has the IPMI SEL MESSAGE_ID, save as IPMI SEL +# The MESSAGE_ID string is generated using journalctl and must match the +# MESSAGE_ID used in IPMI to correctly find the SEL entries. +if ($!MESSAGE_ID == "b370836ccf2f4850ac5bee185b77893a") then { + action(type="omfile" file="/var/log/ipmi_sel" template="IPMISELTemplate") +} + +# If the journal entry has a Redfish MessageId, save as a Redfish event +if ($!REDFISH_MESSAGE_ID != "") then { + action(type="omfile" file="/var/log/redfish" template="RedfishTemplate") +} + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.logrotate b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.logrotate new file mode 100644 index 000000000..a6ba28d86 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog/rsyslog.logrotate @@ -0,0 +1,22 @@ +# /etc/logrotate.d/rsyslog - Ported from Debian + +# Keep up to four 64k files for ipmi_sel (256k total) +/var/log/ipmi_sel +{ + rotate 3 + size 64k + missingok + postrotate + systemctl reload rsyslog 2> /dev/null || true + endscript +} +# Keep up to four 64k files for redfish (256k total) +/var/log/redfish +{ + rotate 3 + size 64k + missingok + postrotate + systemctl reload rsyslog 2> /dev/null || true + endscript +} diff --git a/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog_%.bbappend new file mode 100644 index 000000000..03a81e2cb --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/rsyslog/rsyslog_%.bbappend @@ -0,0 +1,25 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +# Pin to rsyslog v8.1904.0 for now +# v8.1903.0 has a couple issues with the imjournal module: +# 1. Enabling the "WorkAroundJournalBug" option causes rsyslogd to fail to start +# 2. Logging data especially while rotating the journal causes a double free error +PV = "8.1904.0" +SRC_URI[md5sum] = "b9398b5aa68a829bf2c18a87490d30c0" +SRC_URI[sha256sum] = "7098b459dfc3f8bfc35d5b114c56e7945614ba76efa4e513b1db9c38b0ff9c3d" + +SRC_URI += "file://rsyslog.conf \ + file://rsyslog.logrotate \ + file://rotate-event-logs.service \ + file://rotate-event-logs.timer \ +" + +PACKAGECONFIG_append = " imjournal" + +do_install_append() { + install -m 0644 ${WORKDIR}/rotate-event-logs.service ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/rotate-event-logs.timer ${D}${systemd_system_unitdir} + rm ${D}${sysconfdir}/rsyslog.d/imjournal.conf +} + +SYSTEMD_SERVICE_${PN} += " rotate-event-logs.service rotate-event-logs.timer" diff --git a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend index 5a2301d40..995f99cfd 100644 --- a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend @@ -1,4 +1,4 @@ #SRC_URI += "git://github.com/openbmc/sdbusplus" -SRCREV = "4274c117dd2866ac60508f438e7427f99dee6be4" +SRCREV = "66ef099b5a77315bb531300dfcc81a53867cd5fa" diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver/0001-rfbserver-add-a-hooking-function-to-deliver-rfbFrame.patch b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver/0001-rfbserver-add-a-hooking-function-to-deliver-rfbFrame.patch new file mode 100644 index 000000000..6dd1c93f0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver/0001-rfbserver-add-a-hooking-function-to-deliver-rfbFrame.patch @@ -0,0 +1,54 @@ +From 6d7c437f4d111ed183627c11e9bfc77ad2abc752 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Thu, 9 May 2019 15:33:55 -0700 +Subject: [PATCH] rfbserver: add a hooking function to deliver + rfbFramebufferUpdateRequest messages. + +This commit adds a hooking function to deliver +rfbFramebufferUpdateRequest messages from clients to the frame +producer for a case the producer needs to handle the messages for +flow control or etc. +--- + libvncserver/rfbserver.c | 2 ++ + rfb/rfb.h | 5 +++++ + 2 files changed, 7 insertions(+) + +diff --git a/libvncserver/rfbserver.c b/libvncserver/rfbserver.c +index 42209cf29a0d..3a546f2ed330 100644 +--- a/libvncserver/rfbserver.c ++++ b/libvncserver/rfbserver.c +@@ -2381,6 +2381,8 @@ rfbProcessClientNormalMessage(rfbClientPtr cl) + return; + } + ++ if (cl->clientFURHook) ++ cl->clientFURHook(cl, &msg.fur); + + tmpRegion = + sraRgnCreateRect(msg.fur.x, +diff --git a/rfb/rfb.h b/rfb/rfb.h +index 2a5600e25375..1a2294428288 100644 +--- a/rfb/rfb.h ++++ b/rfb/rfb.h +@@ -412,6 +412,8 @@ typedef struct sraRegion* sraRegionPtr; + */ + + typedef void (*ClientGoneHookPtr)(struct _rfbClientRec* cl); ++typedef void (*ClientFURHookPtr)(struct _rfbClientRec* cl, ++ rfbFramebufferUpdateRequestMsg* furMsg); + + typedef struct _rfbFileTransferData { + int fd; +@@ -457,6 +459,9 @@ typedef struct _rfbClientRec { + void* clientData; + ClientGoneHookPtr clientGoneHook; + ++ /** clientFURHook is called when a client requests a frame buffer update. */ ++ ClientFURHookPtr clientFURHook; ++ + SOCKET sock; + char *host; + +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend index b018ad53e..e367e97b9 100644 --- a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend @@ -1,20 +1,7 @@ -PACKAGECONFIG_remove = "gcrypt gnutls png sdl" - -do_install_append() { - rm -rf ${D}${libdir}/libvncclient* -} - -# Use the latest to support obmc-ikvm -DEPENDS += "openssl lzo" +FILESEXTRAPATHS_append := ":${THISDIR}/${PN}" +# Use the latest to support obmc-ikvm properly #SRC_URI = "git://github.com/LibVNC/libvncserver" -SRCREV = "f007b685b6c4201b445029ac3d459de38d30d94c" -S = "${WORKDIR}/git" - -# Remove x11 and gtk+ that cause big image size -# Actually, these aren't needed to support obmc-ikvm -REQUIRED_DISTRO_FEATURES_remove = "x11" -DEPENDS_remove = "gtk+" -RDEPENDS_${PN}_remove = "gtk+" +SRCREV = "f12b14f275f019673b3ace8fa4d46c8a79beb388" -FULL_OPTIMIZATION = "-Os -flto -fno-fat-lto-objects" +SRC_URI += "file://0001-rfbserver-add-a-hooking-function-to-deliver-rfbFrame.patch" diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Add-flow-control-to-prevent-buffer-over-run.patch b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Add-flow-control-to-prevent-buffer-over-run.patch new file mode 100644 index 000000000..1340e845b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Add-flow-control-to-prevent-buffer-over-run.patch @@ -0,0 +1,119 @@ +From 336d0e9163a027b2b35ed240c2995f06684637b8 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Thu, 9 May 2019 16:26:53 -0700 +Subject: [PATCH] Add flow control to prevent buffer over run + +This service uses direct frame update with bypassing image +compression and invalidating logic in libvncserver to achieve +better performance by using of H/W compressed JPEG frames as those +come from the video engine driver. + +This behavior helps quick frame update using very small amount of +CPU resources but it causes a side effect which crashes bmcweb +by OOM killer due to a buffer over run issue. Usually, this issue +happens often in a slow speed connection because this service +keeps sending all frames without any handshaking with clients so +a session buffer in the bmcweb gets bigger and bigger since the +low speed connection can't send all stream data on time. + +To fix this issue, this commit adds flow control logic to make +frame updating handshakes with client so that it'll send frames +only when it recieved client frame update messages. All other +frames when the client doesn't request will be dropped out to +prevent the buffer over run issue. + +Tested: +bmcweb didn't keep increasing its KVM session buffer. +KVM worked well with showing good refresh speed. + +resolves https://github.com/openbmc/bmcweb/issues/80 + +Change-Id: I6b09a711137d15a38fce59adada9bf3d00afde86 +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + ikvm_server.cpp | 19 +++++++++++++++++++ + ikvm_server.hpp | 10 ++++++++++ + 2 files changed, 29 insertions(+) + +diff --git a/ikvm_server.cpp b/ikvm_server.cpp +index 35310da292be..363eab7e000d 100644 +--- a/ikvm_server.cpp ++++ b/ikvm_server.cpp +@@ -119,6 +119,12 @@ void Server::sendFrame() + continue; + } + ++ if (!cd->needUpdate) ++ { ++ continue; ++ } ++ cd->needUpdate = false; ++ + if (cl->enableLastRectEncoding) + { + fu->nRects = 0xFFFF; +@@ -149,6 +155,18 @@ void Server::sendFrame() + rfbReleaseClientIterator(it); + } + ++void Server::clientFUR(rfbClientPtr cl, rfbFramebufferUpdateRequestMsg* furMsg) ++{ ++ ClientData* cd = (ClientData*)cl->clientData; ++ ++ if (!cd) ++ return; ++ ++ // Ignore the furMsg info. This service uses full frame update always. ++ ++ cd->needUpdate = true; ++} ++ + void Server::clientGone(rfbClientPtr cl) + { + Server* server = (Server*)cl->screen->screenData; +@@ -170,6 +188,7 @@ enum rfbNewClientAction Server::newClient(rfbClientPtr cl) + cl->clientData = + new ClientData(server->video.getFrameRate(), &server->input); + cl->clientGoneHook = clientGone; ++ cl->clientFURHook = clientFUR; + if (!server->numClients++) + { + server->pendingResize = false; +diff --git a/ikvm_server.hpp b/ikvm_server.hpp +index b8062017b8ca..e51e57a19722 100644 +--- a/ikvm_server.hpp ++++ b/ikvm_server.hpp +@@ -32,6 +32,7 @@ class Server + */ + ClientData(int s, Input* i) : skipFrame(s), input(i) + { ++ needUpdate = false; + } + ~ClientData() = default; + ClientData(const ClientData&) = default; +@@ -41,6 +42,7 @@ class Server + + int skipFrame; + Input* input; ++ bool needUpdate; + }; + + /* +@@ -85,6 +87,14 @@ class Server + + private: + /* ++ * @brief Handler for a client frame update message ++ * ++ * @param[in] cl - Handle to the client object ++ * @param[in] furMsg - Pointer of the FUR message ++ */ ++ static void clientFUR(rfbClientPtr cl, ++ rfbFramebufferUpdateRequestMsg* furMsg); ++ /* + * @brief Handler for a client disconnecting + * + * @param[in] cl - Handle to the client object +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/start-ipkvm.service b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/start-ipkvm.service deleted file mode 100644 index 61d6cf213..000000000 --- a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm/start-ipkvm.service +++ /dev/null @@ -1,11 +0,0 @@ -[Unit] -Description=OpenBMC ipKVM daemon -StopWhenUnneeded=false - -[Service] -Restart=always -ExecStartPre=/usr/bin/create_usbhid.sh -ExecStart=/usr/bin/env obmc-ikvm -v /dev/video0 -f 10 -k /dev/hidg0 -p /dev/hidg1 - -[Install] -WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend new file mode 100644 index 000000000..577a78601 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend @@ -0,0 +1,6 @@ +FILESEXTRAPATHS_append := ":${THISDIR}/${PN}" + +#SRC_URI = "git://github.com/openbmc/obmc-ikvm" +SRCREV = "133bfa2d5b1b3af0b8e819b4cd210a0e1ac0445c" + +SRC_URI += "file://0001-Add-flow-control-to-prevent-buffer-over-run.patch" diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb deleted file mode 100644 index 37ab24b8a..000000000 --- a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb +++ /dev/null @@ -1,18 +0,0 @@ -SUMMARY = "OpenBMC VNC server and ipKVM daemon" -DESCRIPTION = "obmc-ikvm is a vncserver for JPEG-serving V4L2 devices to allow ipKVM" -LICENSE = "GPLv2" -LIC_FILES_CHKSUM = "file://LICENSE;md5=75859989545e37968a99b631ef42722e" - -DEPENDS = " libvncserver sdbusplus sdbusplus-native phosphor-logging phosphor-dbus-interfaces autoconf-archive-native" - -SRC_URI = "git://github.com/openbmc/obmc-ikvm" -SRCREV = "fb6a8e1e727a8ece5eb0350d3962dd3056a6f608" - -PR = "r1" -PR_append = "+gitr${SRCPV}" - -SYSTEMD_SERVICE_${PN} += "start-ipkvm.service" - -S = "${WORKDIR}/git" - -inherit autotools pkgconfig obmc-phosphor-systemd diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb index a44b31efe..61dfce853 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb @@ -1,8 +1,14 @@ SUMMARY = "Chassis Power Control service for Intel based platform" DESCRIPTION = "Chassis Power Control service for Intel based platfrom" -SRC_URI = "git://git@github.com/Intel-BMC/intel-chassis-control.git;protocol=ssh" -SRCREV = "feb401242a38d8fb9301dc8e3cb50d7a9c2b4cd1" +SRC_URI = "git://github.com/Intel-BMC/intel-chassis-control.git;protocol=ssh" +SRCREV = "7cbb2153afedf3b7d3fa7856f0a306138c4b4297" + +SRC_URI += "file://intel-wait-power-on.sh \ + file://intel-wait-power-off.sh \ + file://intel-wait-host-on.sh \ + file://intel-wait-host-off.sh \ + " S = "${WORKDIR}/git/services/chassis/" @@ -43,6 +49,7 @@ SYSTEMD_SERVICE_${PN} += " \ obmc-host-start@.target \ obmc-host-startmin@.target \ obmc-host-stop@.target \ + obmc-host-shutdown@.target \ obmc-host-reboot@.target \ obmc-chassis-poweroff@.target \ obmc-chassis-poweron@.target \ @@ -79,6 +86,18 @@ START_INSTFMT = "intel-power-start@{0}.service" START_FMT = "../${START_TMPL}:${START_TGTFMT}.requires/${START_INSTFMT}" SYSTEMD_SERVICE_${PN} += "${START_TMPL}" +ON_TMPL = "intel-wait-power-on@.service" +ON_TGTFMT = "obmc-chassis-poweron@{0}.target" +ON_INSTFMT = "intel-wait-power-on@{0}.service" +ON_FMT = "../${ON_TMPL}:${ON_TGTFMT}.requires/${ON_INSTFMT}" +SYSTEMD_SERVICE_${PN} += "${ON_TMPL}" + +OFF_TMPL = "intel-wait-power-off@.service" +OFF_TGTFMT = "obmc-chassis-poweroff@{0}.target" +OFF_INSTFMT = "intel-wait-power-off@{0}.service" +OFF_FMT = "../${OFF_TMPL}:${OFF_TGTFMT}.requires/${OFF_INSTFMT}" +SYSTEMD_SERVICE_${PN} += "${OFF_TMPL}" + STOP_TMPL = "intel-power-stop@.service" STOP_TGTFMT = "obmc-chassis-poweroff@{0}.target" STOP_INSTFMT = "intel-power-stop@{0}.service" @@ -98,6 +117,9 @@ SYSTEMD_LINK_${PN} += "${@compose_list(d, 'STOP_FMT', 'OBMC_CHASSIS_INSTANCES') SYSTEMD_LINK_${PN} += "${@compose_list(d, 'WARM_RESET_FMT', 'OBMC_CHASSIS_INSTANCES')}" SYSTEMD_LINK_${PN} += "${@compose_list(d, 'WARM_RESET_LINK_FMT', 'OBMC_CHASSIS_INSTANCES')}" +SYSTEMD_LINK_${PN} += "${@compose_list(d, 'ON_FMT', 'OBMC_CHASSIS_INSTANCES')}" +SYSTEMD_LINK_${PN} += "${@compose_list(d, 'OFF_FMT', 'OBMC_CHASSIS_INSTANCES')}" + #The main control target requires these power targets START_TMPL_CTRL = "obmc-chassis-poweron@.target" START_TGTFMT_CTRL = "obmc-host-startmin@{0}.target" @@ -105,6 +127,20 @@ START_INSTFMT_CTRL = "obmc-chassis-poweron@{0}.target" START_FMT_CTRL = "../${START_TMPL_CTRL}:${START_TGTFMT_CTRL}.requires/${START_INSTFMT_CTRL}" SYSTEMD_LINK_${PN} += "${@compose_list(d, 'START_FMT_CTRL', 'OBMC_CHASSIS_INSTANCES')}" +HOSTON_TMPL_CTRL = "intel-wait-host-on@.service" +START_TGTFMT_CTRL = "obmc-host-startmin@{0}.target" +HOSTON_INSTFMT_CTRL = "intel-wait-host-on@{0}.service" +HOSTON_FMT_CTRL = "../${HOSTON_TMPL_CTRL}:${START_TGTFMT_CTRL}.requires/${HOSTON_INSTFMT_CTRL}" +SYSTEMD_LINK_${PN} += "${@compose_list(d, 'HOSTON_FMT_CTRL', 'OBMC_CHASSIS_INSTANCES')}" +SYSTEMD_SERVICE_${PN} += "${HOSTON_TMPL_CTRL}" + +HOSTOFF_TMPL_CTRL = "intel-wait-host-off@.service" +HOSTSTOP_TGTFMT_CTRL = "obmc-host-stop@{0}.target" +HOSTOFF_INSTFMT_CTRL = "intel-wait-host-off@{0}.service" +HOSTOFF_FMT_CTRL = "../${HOSTOFF_TMPL_CTRL}:${HOSTSTOP_TGTFMT_CTRL}.requires/${HOSTOFF_INSTFMT_CTRL}" +SYSTEMD_LINK_${PN} += "${@compose_list(d, 'HOSTOFF_FMT_CTRL', 'OBMC_CHASSIS_INSTANCES')}" +SYSTEMD_SERVICE_${PN} += "${HOSTOFF_TMPL_CTRL}" + # Chassis off requires host off STOP_TMPL_CTRL = "obmc-host-stop@.target" STOP_TGTFMT_CTRL = "obmc-chassis-poweroff@{0}.target" @@ -119,6 +155,14 @@ HARD_OFF_INSTFMT_CTRL = "obmc-chassis-poweroff@{0}.target" HARD_OFF_FMT_CTRL = "../${HARD_OFF_TMPL_CTRL}:${HARD_OFF_TGTFMT_CTRL}.requires/${HARD_OFF_INSTFMT_CTRL}" SYSTEMD_LINK_${PN} += "${@compose_list_zip(d, 'HARD_OFF_FMT_CTRL', 'OBMC_CHASSIS_INSTANCES')}" +# Hard power off requires the forceoff flag service +FORCE_OFF_TMPL_CTRL = "intel-power-forceoff@.service" +HARD_OFF_TGTFMT_CTRL = "obmc-chassis-hard-poweroff@{0}.target" +FORCE_OFF_INSTFMT_CTRL = "intel-power-forceoff@{0}.service" +FORCE_OFF_FMT_CTRL = "../${FORCE_OFF_TMPL_CTRL}:${HARD_OFF_TGTFMT_CTRL}.requires/${FORCE_OFF_INSTFMT_CTRL}" +SYSTEMD_LINK_${PN} += "${@compose_list_zip(d, 'FORCE_OFF_FMT_CTRL', 'OBMC_CHASSIS_INSTANCES')}" +SYSTEMD_SERVICE_${PN} += "${FORCE_OFF_TMPL_CTRL}" + # Host soft reboot to run the shutdown target HOST_SHUTDOWN_TMPL = "obmc-host-shutdown@.target" HOST_SOFT_REBOOT_TMPL = "obmc-host-soft-reboot@.target" @@ -179,6 +223,7 @@ DEPENDS += " \ autoconf-archive-native \ boost \ i2c-tools \ + libgpiod \ systemd \ sdbusplus \ sdbusplus-native \ @@ -191,6 +236,7 @@ RDEPENDS_${PN} += " \ sdbusplus \ phosphor-dbus-interfaces \ phosphor-logging \ + bash \ " EXTRA_OECMAKE = " -DENABLE_GTEST=OFF -DCMAKE_SKIP_RPATH=ON" @@ -199,3 +245,11 @@ EXTRA_OECMAKE = " -DENABLE_GTEST=OFF -DCMAKE_SKIP_RPATH=ON" CXXFLAGS_append = " -I ${STAGING_KERNEL_DIR}/include/uapi" CXXFLAGS_append = " -I ${STAGING_KERNEL_DIR}/include" do_configure[depends] += "virtual/kernel:do_shared_workdir" + +do_install_append() { + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/intel-wait-power-on.sh ${D}/${bindir}/intel-wait-power-on.sh + install -m 0755 ${WORKDIR}/intel-wait-power-off.sh ${D}/${bindir}/intel-wait-power-off.sh + install -m 0755 ${WORKDIR}/intel-wait-host-on.sh ${D}/${bindir}/intel-wait-host-on.sh + install -m 0755 ${WORKDIR}/intel-wait-host-off.sh ${D}/${bindir}/intel-wait-host-off.sh +} diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-forceoff@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-forceoff@.service new file mode 100644 index 000000000..54b9befa4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-forceoff@.service @@ -0,0 +1,15 @@ +[Unit] +Description=Add force power offf flag for Power%i +Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +Conflicts=obmc-chassis-poweron@%i.target +Conflicts=obmc-host-start@%i.target + +[Service] +Type=oneshot +ExecStart=/bin/sh -c "mkdir -p /run/openbmc && touch /run/openbmc/host@%i-request" +SyslogIdentifier=intel-power-forceoff +StartLimitInterval=0 + +[Install] +WantedBy=obmc-chassis-poweroff@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-stop@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-stop@.service index 5d0e46f82..d0476e9b2 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-stop@.service +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-power-stop@.service @@ -4,6 +4,7 @@ Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service Conflicts=obmc-chassis-poweron@%i.target Conflicts=obmc-host-start@%i.target +ConditionPathExists=/run/openbmc/chassis@%i-on [Service] Type=oneshot @@ -12,9 +13,5 @@ ExecStart=/bin/sh -c "busctl call `mapper get-service /xyz/openbmc_project/Chass SyslogIdentifier=intel-power-stop StartLimitInterval=0 -ExecStart=/bin/rm -f /run/openbmc/chassis@%i-on -ExecStart=/bin/rm -f /run/openbmc/host@%i-on -ExecStart=/bin/rm -f /run/openbmc/host@%i-request - [Install] WantedBy=obmc-chassis-poweroff@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off.sh b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off.sh new file mode 100755 index 000000000..983f1bc8d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off.sh @@ -0,0 +1,32 @@ +#!/bin/bash + +# Copyright 2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# + +echo "wait for vrd_good = OFF" +SERVICE=$(mapper get-service /xyz/openbmc_project/Chassis/Control/Power0) +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power vrd_good \ + | sed 's/i\s*[0]/off/' | grep off | wc -l) + +while [ $PGOOD == 0 ]; do + echo "!OFF" +sleep 1 +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power vrd_good \ + | sed 's/i\s*[0]/off/' | grep off | wc -l) +done +echo "vrd_good = OFF"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off@.service new file mode 100644 index 000000000..eedfcc78a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-off@.service @@ -0,0 +1,21 @@ +[Unit] +Description=Wait for Host%i to turn off +Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +#After=obmc-chassis-poweroff@%i.target +Before=intel-wait-power-off@%i.service +After=intel-power-stop@%i.service +Conflicts=obmc-chassis-poweron@%i.target +ConditionPathExists=/run/openbmc/host@%i-on + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/intel-wait-host-off.sh +ExecStartPost=/bin/sh -c "rm -rf /run/openbmc/host@%i-on" + +SyslogIdentifier=intel-wait-host-off +TimeoutSec=30 + +[Install] +RequiredBy=obmc-host-stop@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on.sh b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on.sh new file mode 100755 index 000000000..74f6bd47b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on.sh @@ -0,0 +1,32 @@ +#!/bin/bash + +# Copyright 2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# + +echo "wait for vrd_good = ON" +SERVICE=$(mapper get-service /xyz/openbmc_project/Chassis/Control/Power0) +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power vrd_good \ + | sed 's/i\s*[1]/on/' | grep on | wc -l) + +while [ $PGOOD == 0 ]; do + echo "!ON" +sleep 1 +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power vrd_good \ + | sed 's/i\s*[1]/on/' | grep on | wc -l) +done +echo "vrd_good = ON"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on@.service new file mode 100644 index 000000000..a1fc316c2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-host-on@.service @@ -0,0 +1,19 @@ +[Unit] +Description=Wait for Host%i to turn on +Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=intel-wait-power-on@%i.service +Conflicts=obmc-chassis-poweroff@%i.target +ConditionPathExists=!/run/openbmc/host@%i-on + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/intel-wait-host-on.sh +ExecStartPost=/bin/sh -c "mkdir -p /run/openbmc/ && touch /run/openbmc/host@%i-on" + +SyslogIdentifier=intel-wait-host-on +TimeoutSec=30 + +[Install] +RequiredBy=obmc-host-startmin@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off.sh b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off.sh new file mode 100755 index 000000000..be58682cc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off.sh @@ -0,0 +1,32 @@ +#!/bin/bash + +# Copyright 2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# + +echo "wait for pgood = OFF" +SERVICE=$(mapper get-service /xyz/openbmc_project/Chassis/Control/Power0) +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power pgood \ + | sed 's/i\s*[0]/off/' | grep off | wc -l) + +while [ $PGOOD == 0 ]; do + echo "!OFF" +sleep 1 +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power pgood \ + | sed 's/i\s*[0]/off/' | grep off | wc -l) +done +echo "pgood = OFF"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off@.service new file mode 100644 index 000000000..0dcc897ce --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-off@.service @@ -0,0 +1,23 @@ +[Unit] +Description=Wait for Power%i to turn off +Before=obmc-power-off@%i.target +Wants=obmc-power-stop@%i.target +Before=obmc-power-stop@%i.target +Wants=obmc-power-stop-pre@%i.target +After=obmc-power-stop-pre@%i.target +Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=intel-wait-host-off@%i.service +Conflicts=obmc-chassis-poweron@%i.target + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/intel-wait-power-off.sh +ExecStartPost=/bin/rm -f /run/openbmc/chassis@%i-on +ExecStartPost=/bin/rm -f /run/openbmc/host@%i-request +SyslogIdentifier=intel-wait-power-off +TimeoutSec=15 + +[Install] +WantedBy=obmc-host-stop@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on.sh b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on.sh new file mode 100755 index 000000000..970e5a420 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on.sh @@ -0,0 +1,32 @@ +#!/bin/bash + +# Copyright 2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# + +echo "wait for pgood = ON" +SERVICE=$(mapper get-service /xyz/openbmc_project/Chassis/Control/Power0) +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power pgood \ + | sed 's/i\s*[1]/on/' | grep on | wc -l) + +while [ $PGOOD == 0 ]; do + echo "!ON" +sleep 1 +PGOOD=$(busctl get-property $SERVICE \ + /xyz/openbmc_project/Chassis/Control/Power0 xyz.openbmc_project.Chassis.Control.Power pgood \ + | sed 's/i\s*[1]/on/' | grep on | wc -l) +done +echo "pgood = ON"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on@.service new file mode 100644 index 000000000..140ee5b8d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/intel-wait-power-on@.service @@ -0,0 +1,21 @@ +[Unit] +Description=Wait for Power%i to turn on +Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Power%i.service +After=intel-power-start@%i.service +Before=intel-wait-host-on@%i.service +Conflicts=obmc-chassis-poweroff@%i.target +ConditionPathExists=!/run/openbmc/chassis@%i-on + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/intel-wait-power-on.sh + +ExecStartPost=/bin/sh -c "mkdir -p /run/openbmc/ && touch /run/openbmc/chassis@%i-on" + +SyslogIdentifier=intel-wait-power-on +TimeoutSec=15 + +[Install] +WantedBy=obmc-host-start@%i.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-hard-poweroff@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-hard-poweroff@.target index 9a9902f7c..265a48982 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-hard-poweroff@.target +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-hard-poweroff@.target @@ -7,6 +7,5 @@ After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service Conflicts=obmc-chassis-poweron@%i.target Conflicts=obmc-chassis-reset@%i.target Conflicts=obmc-host-shutdown@%i.target -Conflicts=xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service RefuseManualStop=yes diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-poweron@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-poweron@.target index f8fecf2a6..e95e46353 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-poweron@.target +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-chassis-poweron@.target @@ -6,5 +6,4 @@ Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service Conflicts=obmc-chassis-poweroff@%i.target RefuseManualStop=yes -OnFailure=obmc-chassis-poweroff@%i.target OnFailureJobMode=flush diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-shutdown@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-shutdown@.target new file mode 100644 index 000000000..585886b26 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-shutdown@.target @@ -0,0 +1,5 @@ +[Unit] +Description=Power%i Host Off +Wants=multi-user.target +RefuseManualStop=yes +OnFailureJobMode=flush diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-start@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-start@.target index 425953d4d..2f8c24929 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-start@.target +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-start@.target @@ -6,5 +6,4 @@ Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service Conflicts=obmc-host-stop@%i.target RefuseManualStop=yes -OnFailure=obmc-host-quiesce@%i.target OnFailureJobMode=flush
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-stop@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-stop@.target index 0693db6e5..625eda8ee 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-stop@.target +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-stop@.target @@ -6,5 +6,4 @@ Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service Conflicts=obmc-host-startmin@%i.target RefuseManualStop=yes -OnFailure=obmc-chassis-poweroff@%i.target OnFailureJobMode=flush
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-warm-reset@.target b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-warm-reset@.target index 8aed937e7..8fc9358e2 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-warm-reset@.target +++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/obmc-host-warm-reset@.target @@ -6,5 +6,4 @@ Wants=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service After=mapper-wait@-xyz-openbmc_project-Chassis-Control-Chassis%i.service Conflicts=obmc-host-stop@%i.target RefuseManualStop=yes -OnFailure=obmc-host-quiesce@%i.target OnFailureJobMode=flush diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb index b44b3f3ec..3abbb16fb 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb +++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb @@ -1,8 +1,8 @@ SUMMARY = "SMBIOS MDR version 1 service for Intel based platform" DESCRIPTION = "SMBIOS MDR version 1 service for Intel based platfrom" -SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" S = "${WORKDIR}/git/services/smbios/" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb index ab696c051..1a39c0017 100644 --- a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb +++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb @@ -1,8 +1,8 @@ SUMMARY = "SMBIOS MDR version 2 service for Intel based platform" DESCRIPTION = "SMBIOS MDR version 2 service for Intel based platfrom" -SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" S = "${WORKDIR}/git/services/smbios-mdrv2/" diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch index db21250bb..d2ecdfd72 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch @@ -1,4 +1,4 @@ -From 63ccbbe64f7e6560233971b886f6166fc59d20ef Mon Sep 17 00:00:00 2001 +From 9c27803dd432c7a9fc57dd3e16f0fd724919575e Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Date: Mon, 7 Jan 2019 09:56:10 -0800 Subject: [PATCH] Update PECI drivers to sync with linux upstreaming version @@ -10,28 +10,32 @@ Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> --- Documentation/hwmon/peci-cputemp | 34 +- drivers/hwmon/Kconfig | 4 +- - drivers/hwmon/peci-cputemp.c | 156 ++++-- + drivers/hwmon/peci-cputemp.c | 162 ++++-- drivers/hwmon/peci-dimmtemp.c | 69 +-- drivers/hwmon/peci-hwmon.h | 9 +- drivers/mfd/Kconfig | 5 +- - drivers/mfd/intel-peci-client.c | 43 +- - drivers/peci/Kconfig | 35 +- - drivers/peci/Makefile | 6 +- - drivers/peci/busses/Kconfig | 19 + - drivers/peci/busses/Makefile | 6 + + drivers/mfd/intel-peci-client.c | 49 +- + drivers/peci/Kconfig | 46 +- + drivers/peci/Makefile | 7 +- + drivers/peci/busses/Kconfig | 32 ++ + drivers/peci/busses/Makefile | 7 + drivers/peci/busses/peci-aspeed.c | 494 +++++++++++++++++++ + drivers/peci/busses/peci-npcm.c | 410 +++++++++++++++ drivers/peci/peci-aspeed.c | 505 ------------------- - drivers/peci/peci-core.c | 889 ++++++++++++++++++---------------- - drivers/peci/peci-dev.c | 340 +++++++++++++ - include/linux/mfd/intel-peci-client.h | 6 +- + drivers/peci/peci-core.c | 905 +++++++++++++++++++--------------- + drivers/peci/peci-dev.c | 346 +++++++++++++ + drivers/peci/peci-npcm.c | 410 --------------- + include/linux/mfd/intel-peci-client.h | 32 +- include/linux/peci.h | 30 +- - include/uapi/linux/peci-ioctl.h | 394 ++++++++------- - 18 files changed, 1805 insertions(+), 1239 deletions(-) + include/uapi/linux/peci-ioctl.h | 416 +++++++++------- + 20 files changed, 2296 insertions(+), 1676 deletions(-) create mode 100644 drivers/peci/busses/Kconfig create mode 100644 drivers/peci/busses/Makefile create mode 100644 drivers/peci/busses/peci-aspeed.c + create mode 100644 drivers/peci/busses/peci-npcm.c delete mode 100644 drivers/peci/peci-aspeed.c create mode 100644 drivers/peci/peci-dev.c + delete mode 100644 drivers/peci/peci-npcm.c diff --git a/Documentation/hwmon/peci-cputemp b/Documentation/hwmon/peci-cputemp index 821a9258f2e6..a3a3e465c888 100644 @@ -89,7 +93,7 @@ index 821a9258f2e6..a3a3e465c888 100644 +temp[6-*]_crit_hyst Provides the hysteresis value from Tcontrol to Tjmax of the core. diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 996e80590b5b..93945eb19261 100644 +index 18cd3b17f660..0bd06a938526 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1321,7 +1321,7 @@ config SENSORS_PECI_CPUTEMP @@ -111,7 +115,7 @@ index 996e80590b5b..93945eb19261 100644 source "drivers/hwmon/pmbus/Kconfig" diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c -index 11880c86a854..30ba1638e358 100644 +index 11880c86a854..3cb2db2fdf0a 100644 --- a/drivers/hwmon/peci-cputemp.c +++ b/drivers/hwmon/peci-cputemp.c @@ -1,5 +1,5 @@ @@ -214,7 +218,7 @@ index 11880c86a854..30ba1638e358 100644 /* Note that the tjmax should be available before calling it */ priv->temp.die.value = priv->temp.tjmax.value + -@@ -144,24 +151,67 @@ static int get_die_temp(struct peci_cputemp *priv) +@@ -144,24 +151,70 @@ static int get_die_temp(struct peci_cputemp *priv) return 0; } @@ -237,6 +241,9 @@ index 11880c86a854..30ba1638e358 100644 + if (ret) + return ret; + ++ if (msg.cc != PECI_DEV_CC_SUCCESS) ++ return -EAGAIN; ++ + dts_margin = (msg.pkg_config[1] << 8) | msg.pkg_config[0]; + + /** @@ -289,7 +296,7 @@ index 11880c86a854..30ba1638e358 100644 * Processors return a value of the core DTS reading in 10.6 format * (10 bits signed decimal, 6 bits fractional). * Error codes: -@@ -192,6 +242,7 @@ static int cputemp_read_string(struct device *dev, +@@ -192,6 +245,7 @@ static int cputemp_read_string(struct device *dev, return -EOPNOTSUPP; *str = cputemp_label[channel]; @@ -297,7 +304,7 @@ index 11880c86a854..30ba1638e358 100644 return 0; } -@@ -200,26 +251,33 @@ static int cputemp_read(struct device *dev, +@@ -200,26 +254,33 @@ static int cputemp_read(struct device *dev, u32 attr, int channel, long *val) { struct peci_cputemp *priv = dev_get_drvdata(dev); @@ -337,7 +344,7 @@ index 11880c86a854..30ba1638e358 100644 case channel_tcontrol: *val = priv->temp.tcontrol.value; break; -@@ -231,8 +289,8 @@ static int cputemp_read(struct device *dev, +@@ -231,8 +292,8 @@ static int cputemp_read(struct device *dev, break; default: core_index = channel - DEFAULT_CHANNEL_NUMS; @@ -348,7 +355,7 @@ index 11880c86a854..30ba1638e358 100644 break; *val = priv->temp.core[core_index].value; -@@ -249,11 +307,11 @@ static int cputemp_read(struct device *dev, +@@ -249,11 +310,11 @@ static int cputemp_read(struct device *dev, *val = priv->temp.tjmax.value - priv->temp.tcontrol.value; break; default: @@ -362,7 +369,7 @@ index 11880c86a854..30ba1638e358 100644 } static umode_t cputemp_is_visible(const void *data, -@@ -262,11 +320,11 @@ static umode_t cputemp_is_visible(const void *data, +@@ -262,11 +323,11 @@ static umode_t cputemp_is_visible(const void *data, { const struct peci_cputemp *priv = data; @@ -379,7 +386,7 @@ index 11880c86a854..30ba1638e358 100644 return 0; } -@@ -280,7 +338,7 @@ static const struct hwmon_ops cputemp_ops = { +@@ -280,7 +341,7 @@ static const struct hwmon_ops cputemp_ops = { static int check_resolved_cores(struct peci_cputemp *priv) { struct peci_rd_pci_cfg_local_msg msg; @@ -388,7 +395,7 @@ index 11880c86a854..30ba1638e358 100644 /* Get the RESOLVED_CORES register value */ msg.addr = priv->mgr->client->addr; -@@ -290,30 +348,31 @@ static int check_resolved_cores(struct peci_cputemp *priv) +@@ -290,30 +351,34 @@ static int check_resolved_cores(struct peci_cputemp *priv) msg.reg = REG_RESOLVED_CORES_OFFSET; msg.rx_len = 4; @@ -400,6 +407,9 @@ index 11880c86a854..30ba1638e358 100644 + PECI_CMD_RD_PCI_CFG_LOCAL, &msg); + if (ret) + return ret; ++ ++ if (msg.cc != PECI_DEV_CC_SUCCESS) ++ return -EAGAIN; priv->core_mask = le32_to_cpup((__le32 *)msg.pci_config); if (!priv->core_mask) @@ -429,7 +439,7 @@ index 11880c86a854..30ba1638e358 100644 priv->temp_config[priv->config_idx++] = config_table[channel_core]; -@@ -326,7 +385,7 @@ static int peci_cputemp_probe(struct platform_device *pdev) +@@ -326,7 +391,7 @@ static int peci_cputemp_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct peci_cputemp *priv; struct device *hwmon_dev; @@ -438,7 +448,7 @@ index 11880c86a854..30ba1638e358 100644 if ((mgr->client->adapter->cmd_mask & (BIT(PECI_CMD_GET_TEMP) | BIT(PECI_CMD_RD_PKG_CFG))) != -@@ -346,12 +405,13 @@ static int peci_cputemp_probe(struct platform_device *pdev) +@@ -346,12 +411,13 @@ static int peci_cputemp_probe(struct platform_device *pdev) mgr->client->addr - PECI_BASE_ADDR); priv->temp_config[priv->config_idx++] = config_table[channel_die]; @@ -686,7 +696,7 @@ index 9af5730ad7ba..28087e9cd4da 100644 bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support" depends on SA1100_H3100 || SA1100_H3600 diff --git a/drivers/mfd/intel-peci-client.c b/drivers/mfd/intel-peci-client.c -index d53e4f1078ac..d62442438512 100644 +index d53e4f1078ac..466085fd43b9 100644 --- a/drivers/mfd/intel-peci-client.c +++ b/drivers/mfd/intel-peci-client.c @@ -1,12 +1,12 @@ @@ -717,7 +727,7 @@ index d53e4f1078ac..d62442438512 100644 static struct mfd_cell peci_functions[] = { { .name = "peci-cputemp", }, { .name = "peci-dimmtemp", }, -@@ -31,19 +25,19 @@ static struct mfd_cell peci_functions[] = { +@@ -31,19 +25,25 @@ static struct mfd_cell peci_functions[] = { }; static const struct cpu_gen_info cpu_gen_info_table[] = { @@ -736,11 +746,17 @@ index d53e4f1078ac..d62442438512 100644 .chan_rank_max = CHAN_RANK_MAX_ON_BDX, .dimm_idx_max = DIMM_IDX_MAX_ON_BDX }, - [CPU_GEN_SKX] = { ++ { /* Broadwell Xeon D */ ++ .family = 6, /* Family code */ ++ .model = INTEL_FAM6_BROADWELL_XEON_D, ++ .core_max = CORE_MAX_ON_XD, ++ .chan_rank_max = CHAN_RANK_MAX_ON_XD, ++ .dimm_idx_max = DIMM_IDX_MAX_ON_XD }, + { /* Skylake Xeon */ .family = 6, /* Family code */ .model = INTEL_FAM6_SKYLAKE_X, .core_max = CORE_MAX_ON_SKX, -@@ -53,16 +47,17 @@ static const struct cpu_gen_info cpu_gen_info_table[] = { +@@ -53,16 +53,17 @@ static const struct cpu_gen_info cpu_gen_info_table[] = { static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv) { @@ -763,7 +779,7 @@ index d53e4f1078ac..d62442438512 100644 family = FIELD_PREP(LOWER_BYTE_MASK, FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id)) | -@@ -83,11 +78,11 @@ static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv) +@@ -83,11 +84,11 @@ static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv) } if (!priv->gen_info) { @@ -778,7 +794,7 @@ index d53e4f1078ac..d62442438512 100644 } static int peci_client_probe(struct peci_client *client) -@@ -103,31 +98,29 @@ static int peci_client_probe(struct peci_client *client) +@@ -103,31 +104,29 @@ static int peci_client_probe(struct peci_client *client) dev_set_drvdata(dev, priv); priv->client = client; @@ -815,7 +831,7 @@ index d53e4f1078ac..d62442438512 100644 static const struct peci_device_id peci_client_ids[] = { { .name = "peci-client" }, diff --git a/drivers/peci/Kconfig b/drivers/peci/Kconfig -index 9e9845ebcff4..9752feee2454 100644 +index 7293108fb543..9752feee2454 100644 --- a/drivers/peci/Kconfig +++ b/drivers/peci/Kconfig @@ -2,10 +2,12 @@ @@ -833,7 +849,7 @@ index 9e9845ebcff4..9752feee2454 100644 help The Platform Environment Control Interface (PECI) is a one-wire bus interface that provides a communication channel from Intel processors -@@ -14,26 +16,23 @@ config PECI +@@ -14,37 +16,23 @@ config PECI If you want PECI support, you should say Y here and also to the specific driver for your bus adapter(s) below. @@ -842,42 +858,53 @@ index 9e9845ebcff4..9752feee2454 100644 -# -# PECI hardware bus configuration -# +- +-menu "PECI Hardware Bus support" +- +-config PECI_ASPEED +- tristate "ASPEED PECI support" +- select REGMAP_MMIO +- depends on OF +- depends on ARCH_ASPEED || COMPILE_TEST +- help +- Say Y here if you want support for the Platform Environment Control +- Interface (PECI) bus adapter driver on the ASPEED SoCs. + This support is also available as a module. If so, the module + will be called peci-core. --menu "PECI Hardware Bus support" +- This support is also available as a module. If so, the module +- will be called peci-aspeed. +if PECI --config PECI_ASPEED -- tristate "ASPEED PECI support" +-config PECI_NPCM +- tristate "Nuvoton NPCM PECI support" - select REGMAP_MMIO - depends on OF -- depends on ARCH_ASPEED || COMPILE_TEST +- depends on ARCH_NPCM || COMPILE_TEST +config PECI_CHARDEV + tristate "PECI device interface" help - Say Y here if you want support for the Platform Environment Control -- Interface (PECI) bus adapter driver on the ASPEED SoCs. +- Interface (PECI) bus adapter driver on the Nuvoton NPCM SoCs. + Say Y here to use peci-* device files, usually found in the /dev + directory on your system. They make it possible to have user-space + programs use the PECI bus. -- This support is also available as a module. If so, the module -- will be called peci-aspeed. -+ This support is also available as a module. If so, the module -+ will be called peci-dev. - + This support is also available as a module. If so, the module +- will be called peci-npcm. -endmenu ++ will be called peci-dev. ++ +source "drivers/peci/busses/Kconfig" endif # PECI + +endmenu diff --git a/drivers/peci/Makefile b/drivers/peci/Makefile -index 886285e69765..da8b0a33fa42 100644 +index 3326da54a21a..da8b0a33fa42 100644 --- a/drivers/peci/Makefile +++ b/drivers/peci/Makefile -@@ -1,9 +1,11 @@ +@@ -1,10 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0 # -# Makefile for the PECI core and bus drivers. @@ -890,13 +917,14 @@ index 886285e69765..da8b0a33fa42 100644 # Hardware specific bus drivers -obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o +-obj-$(CONFIG_PECI_NPCM) += peci-npcm.o +obj-y += busses/ diff --git a/drivers/peci/busses/Kconfig b/drivers/peci/busses/Kconfig new file mode 100644 -index 000000000000..a20d470b4250 +index 000000000000..bfacafb7a7ba --- /dev/null +++ b/drivers/peci/busses/Kconfig -@@ -0,0 +1,19 @@ +@@ -0,0 +1,32 @@ +# +# PECI hardware bus configuration +# @@ -912,22 +940,36 @@ index 000000000000..a20d470b4250 + Say Y here if you want support for the Platform Environment Control + Interface (PECI) bus adapter driver on the ASPEED SoCs. + -+ This support is also available as a module. If so, the module ++ This support is also available as a module. If so, the module + will be called peci-aspeed. + ++config PECI_NPCM ++ tristate "Nuvoton NPCM PECI support" ++ select REGMAP_MMIO ++ depends on OF ++ depends on ARCH_NPCM || COMPILE_TEST ++ depends on PECI ++ help ++ Say Y here if you want support for the Platform Environment Control ++ Interface (PECI) bus adapter driver on the Nuvoton NPCM SoCs. ++ ++ This support is also available as a module. If so, the module ++ will be called peci-npcm. ++ +endmenu diff --git a/drivers/peci/busses/Makefile b/drivers/peci/busses/Makefile new file mode 100644 -index 000000000000..69e31dfaca19 +index 000000000000..aa8ce3ae5947 --- /dev/null +++ b/drivers/peci/busses/Makefile -@@ -0,0 +1,6 @@ +@@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the PECI hardware bus drivers. +# + +obj-$(CONFIG_PECI_ASPEED) += peci-aspeed.o ++obj-$(CONFIG_PECI_NPCM) += peci-npcm.o diff --git a/drivers/peci/busses/peci-aspeed.c b/drivers/peci/busses/peci-aspeed.c new file mode 100644 index 000000000000..8a0dd40730cc @@ -1428,6 +1470,422 @@ index 000000000000..8a0dd40730cc +MODULE_AUTHOR("Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>"); +MODULE_DESCRIPTION("ASPEED PECI driver"); +MODULE_LICENSE("GPL v2"); +diff --git a/drivers/peci/busses/peci-npcm.c b/drivers/peci/busses/peci-npcm.c +new file mode 100644 +index 000000000000..f632365b1416 +--- /dev/null ++++ b/drivers/peci/busses/peci-npcm.c +@@ -0,0 +1,410 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2019 Nuvoton Technology corporation. ++ ++#include <linux/bitfield.h> ++#include <linux/clk.h> ++#include <linux/interrupt.h> ++#include <linux/jiffies.h> ++#include <linux/module.h> ++#include <linux/of.h> ++#include <linux/peci.h> ++#include <linux/platform_device.h> ++#include <linux/regmap.h> ++#include <linux/mfd/syscon.h> ++#include <linux/reset.h> ++ ++/* NPCM7xx GCR module */ ++#define NPCM7XX_INTCR3_OFFSET 0x9C ++#define NPCM7XX_INTCR3_PECIVSEL BIT(19) ++ ++/* NPCM PECI Registers */ ++#define NPCM_PECI_CTL_STS 0x00 ++#define NPCM_PECI_RD_LENGTH 0x04 ++#define NPCM_PECI_ADDR 0x08 ++#define NPCM_PECI_CMD 0x0C ++#define NPCM_PECI_CTL2 0x10 ++#define NPCM_PECI_WR_LENGTH 0x1C ++#define NPCM_PECI_PDDR 0x2C ++#define NPCM_PECI_DAT_INOUT(n) (0x100 + ((n) * 4)) ++ ++#define NPCM_PECI_MAX_REG 0x200 ++ ++/* NPCM_PECI_CTL_STS - 0x00 : Control Register */ ++#define NPCM_PECI_CTRL_DONE_INT_EN BIT(6) ++#define NPCM_PECI_CTRL_ABRT_ERR BIT(4) ++#define NPCM_PECI_CTRL_CRC_ERR BIT(3) ++#define NPCM_PECI_CTRL_DONE BIT(1) ++#define NPCM_PECI_CTRL_START_BUSY BIT(0) ++ ++/* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */ ++#define NPCM_PECI_RD_LEN_MASK GENMASK(6, 0) ++ ++/* NPCM_PECI_CMD - 0x10 : Command Register */ ++#define NPCM_PECI_CTL2_MASK GENMASK(7, 6) ++ ++/* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */ ++#define NPCM_PECI_WR_LEN_MASK GENMASK(6, 0) ++ ++/* NPCM_PECI_PDDR - 0x2C : Command Register */ ++#define NPCM_PECI_PDDR_MASK GENMASK(4, 0) ++ ++#define NPCM_PECI_INT_MASK (NPCM_PECI_CTRL_ABRT_ERR | \ ++ NPCM_PECI_CTRL_CRC_ERR | \ ++ NPCM_PECI_CTRL_DONE) ++ ++#define NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC 50000 ++#define NPCM_PECI_IDLE_CHECK_INTERVAL_USEC 10000 ++#define NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT 1000 ++#define NPCM_PECI_CMD_TIMEOUT_MS_MAX 60000 ++#define NPCM_PECI_HOST_NEG_BIT_RATE_MAX 31 ++#define NPCM_PECI_HOST_NEG_BIT_RATE_MIN 7 ++#define NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT 15 ++#define NPCM_PECI_PULL_DOWN_DEFAULT 0 ++#define NPCM_PECI_PULL_DOWN_MAX 2 ++ ++struct npcm_peci { ++ u32 cmd_timeout_ms; ++ u32 host_bit_rate; ++ struct completion xfer_complete; ++ struct regmap *gcr_regmap; ++ struct peci_adapter *adapter; ++ struct regmap *regmap; ++ u32 status; ++ spinlock_t lock; /* to sync completion status handling */ ++ struct device *dev; ++ struct clk *clk; ++ int irq; ++}; ++ ++static int npcm_peci_xfer_native(struct npcm_peci *priv, ++ struct peci_xfer_msg *msg) ++{ ++ long err, timeout = msecs_to_jiffies(priv->cmd_timeout_ms); ++ unsigned long flags; ++ unsigned int msg_rd; ++ u32 cmd_sts; ++ int i, rc; ++ ++ /* Check command sts and bus idle state */ ++ rc = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, ++ !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), ++ NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, ++ NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); ++ if (rc) ++ return rc; /* -ETIMEDOUT */ ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ reinit_completion(&priv->xfer_complete); ++ ++ regmap_write(priv->regmap, NPCM_PECI_ADDR, msg->addr); ++ regmap_write(priv->regmap, NPCM_PECI_RD_LENGTH, ++ NPCM_PECI_WR_LEN_MASK & msg->rx_len); ++ regmap_write(priv->regmap, NPCM_PECI_WR_LENGTH, ++ NPCM_PECI_WR_LEN_MASK & msg->tx_len); ++ ++ if (msg->tx_len) { ++ regmap_write(priv->regmap, NPCM_PECI_CMD, msg->tx_buf[0]); ++ ++ for (i = 0; i < (msg->tx_len - 1); i++) ++ regmap_write(priv->regmap, NPCM_PECI_DAT_INOUT(i), ++ msg->tx_buf[i + 1]); ++ } ++ ++ priv->status = 0; ++ regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, ++ NPCM_PECI_CTRL_START_BUSY, ++ NPCM_PECI_CTRL_START_BUSY); ++ ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ err = wait_for_completion_interruptible_timeout(&priv->xfer_complete, ++ timeout); ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ ++ regmap_write(priv->regmap, NPCM_PECI_CMD, 0); ++ ++ if (err <= 0 || priv->status != NPCM_PECI_CTRL_DONE) { ++ if (err < 0) { /* -ERESTARTSYS */ ++ rc = (int)err; ++ goto err_irqrestore; ++ } else if (err == 0) { ++ dev_dbg(priv->dev, "Timeout waiting for a response!\n"); ++ rc = -ETIMEDOUT; ++ goto err_irqrestore; ++ } ++ ++ dev_dbg(priv->dev, "No valid response!\n"); ++ rc = -EIO; ++ goto err_irqrestore; ++ } ++ ++ for (i = 0; i < msg->rx_len; i++) { ++ regmap_read(priv->regmap, NPCM_PECI_DAT_INOUT(i), &msg_rd); ++ msg->rx_buf[i] = (u8)msg_rd; ++ } ++ ++err_irqrestore: ++ spin_unlock_irqrestore(&priv->lock, flags); ++ return rc; ++} ++ ++static irqreturn_t npcm_peci_irq_handler(int irq, void *arg) ++{ ++ struct npcm_peci *priv = arg; ++ u32 status_ack = 0; ++ u32 status; ++ ++ spin_lock(&priv->lock); ++ regmap_read(priv->regmap, NPCM_PECI_CTL_STS, &status); ++ priv->status |= (status & NPCM_PECI_INT_MASK); ++ ++ if (status & NPCM_PECI_CTRL_CRC_ERR) { ++ dev_dbg(priv->dev, "PECI_INT_W_FCS_BAD\n"); ++ status_ack |= NPCM_PECI_CTRL_CRC_ERR; ++ } ++ ++ if (status & NPCM_PECI_CTRL_ABRT_ERR) { ++ dev_dbg(priv->dev, "NPCM_PECI_CTRL_ABRT_ERR\n"); ++ status_ack |= NPCM_PECI_CTRL_ABRT_ERR; ++ } ++ ++ /* ++ * All commands should be ended up with a NPCM_PECI_CTRL_DONE ++ * bit set even in an error case. ++ */ ++ if (status & NPCM_PECI_CTRL_DONE) { ++ dev_dbg(priv->dev, "NPCM_PECI_CTRL_DONE\n"); ++ status_ack |= NPCM_PECI_CTRL_DONE; ++ complete(&priv->xfer_complete); ++ } ++ ++ regmap_write_bits(priv->regmap, NPCM_PECI_CTL_STS, ++ NPCM_PECI_INT_MASK, status_ack); ++ ++ spin_unlock(&priv->lock); ++ return IRQ_HANDLED; ++} ++ ++static int npcm_peci_init_ctrl(struct npcm_peci *priv) ++{ ++ u32 cmd_sts, host_neg_bit_rate = 0, pull_down = 0; ++ int ret; ++ bool volt; ++ ++ priv->clk = devm_clk_get(priv->dev, NULL); ++ if (IS_ERR(priv->clk)) { ++ dev_err(priv->dev, "Failed to get clk source.\n"); ++ return PTR_ERR(priv->clk); ++ } ++ ++ ret = clk_prepare_enable(priv->clk); ++ if (ret) { ++ dev_err(priv->dev, "Failed to enable clock.\n"); ++ return ret; ++ } ++ ++ ret = of_property_read_u32(priv->dev->of_node, "cmd-timeout-ms", ++ &priv->cmd_timeout_ms); ++ if (ret || priv->cmd_timeout_ms > NPCM_PECI_CMD_TIMEOUT_MS_MAX || ++ priv->cmd_timeout_ms == 0) { ++ if (ret) ++ dev_warn(priv->dev, ++ "cmd-timeout-ms not found, use default : %u\n", ++ NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT); ++ else ++ dev_warn(priv->dev, ++ "Invalid cmd-timeout-ms : %u. Use default : %u\n", ++ priv->cmd_timeout_ms, ++ NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT); ++ ++ priv->cmd_timeout_ms = NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT; ++ } ++ ++ if (of_device_is_compatible(priv->dev->of_node, ++ "nuvoton,npcm750-peci")) { ++ priv->gcr_regmap = syscon_regmap_lookup_by_compatible ++ ("nuvoton,npcm750-gcr"); ++ if (!IS_ERR(priv->gcr_regmap)) { ++ volt = of_property_read_bool(priv->dev->of_node, ++ "high-volt-range"); ++ if (volt) ++ regmap_update_bits(priv->gcr_regmap, ++ NPCM7XX_INTCR3_OFFSET, ++ NPCM7XX_INTCR3_PECIVSEL, ++ NPCM7XX_INTCR3_PECIVSEL); ++ else ++ regmap_update_bits(priv->gcr_regmap, ++ NPCM7XX_INTCR3_OFFSET, ++ NPCM7XX_INTCR3_PECIVSEL, 0); ++ } ++ } ++ ++ ret = of_property_read_u32(priv->dev->of_node, "pull-down", ++ &pull_down); ++ if (ret || pull_down > NPCM_PECI_PULL_DOWN_MAX) { ++ if (ret) ++ dev_warn(priv->dev, ++ "pull-down not found, use default : %u\n", ++ NPCM_PECI_PULL_DOWN_DEFAULT); ++ else ++ dev_warn(priv->dev, ++ "Invalid pull-down : %u. Use default : %u\n", ++ pull_down, ++ NPCM_PECI_PULL_DOWN_DEFAULT); ++ pull_down = NPCM_PECI_PULL_DOWN_DEFAULT; ++ } ++ ++ regmap_update_bits(priv->regmap, NPCM_PECI_CTL2, NPCM_PECI_CTL2_MASK, ++ pull_down << 6); ++ ++ ret = of_property_read_u32(priv->dev->of_node, "host-neg-bit-rate", ++ &host_neg_bit_rate); ++ if (ret || host_neg_bit_rate > NPCM_PECI_HOST_NEG_BIT_RATE_MAX || ++ host_neg_bit_rate < NPCM_PECI_HOST_NEG_BIT_RATE_MIN) { ++ if (ret) ++ dev_warn(priv->dev, ++ "host-neg-bit-rate not found, use default : %u\n", ++ NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT); ++ else ++ dev_warn(priv->dev, ++ "Invalid host-neg-bit-rate : %u. Use default : %u\n", ++ host_neg_bit_rate, ++ NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT); ++ host_neg_bit_rate = NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT; ++ } ++ ++ regmap_update_bits(priv->regmap, NPCM_PECI_PDDR, NPCM_PECI_PDDR_MASK, ++ host_neg_bit_rate); ++ ++ priv->host_bit_rate = clk_get_rate(priv->clk) / ++ (4 * (host_neg_bit_rate + 1)); ++ ++ ret = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, ++ !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), ++ NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, ++ NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); ++ if (ret) ++ return ret; /* -ETIMEDOUT */ ++ ++ /* PECI interrupt enable */ ++ regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, ++ NPCM_PECI_CTRL_DONE_INT_EN, ++ NPCM_PECI_CTRL_DONE_INT_EN); ++ ++ return 0; ++} ++ ++static const struct regmap_config npcm_peci_regmap_config = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = NPCM_PECI_MAX_REG, ++ .fast_io = true, ++}; ++ ++static int npcm_peci_xfer(struct peci_adapter *adapter, ++ struct peci_xfer_msg *msg) ++{ ++ struct npcm_peci *priv = peci_get_adapdata(adapter); ++ ++ return npcm_peci_xfer_native(priv, msg); ++} ++ ++static int npcm_peci_probe(struct platform_device *pdev) ++{ ++ struct peci_adapter *adapter; ++ struct npcm_peci *priv; ++ struct resource *res; ++ void __iomem *base; ++ int ret; ++ ++ adapter = peci_alloc_adapter(&pdev->dev, sizeof(*priv)); ++ if (!adapter) ++ return -ENOMEM; ++ ++ priv = peci_get_adapdata(adapter); ++ priv->adapter = adapter; ++ priv->dev = &pdev->dev; ++ dev_set_drvdata(&pdev->dev, priv); ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(base)) { ++ ret = PTR_ERR(base); ++ goto err_put_adapter_dev; ++ } ++ ++ priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, ++ &npcm_peci_regmap_config); ++ if (IS_ERR(priv->regmap)) { ++ ret = PTR_ERR(priv->regmap); ++ goto err_put_adapter_dev; ++ } ++ ++ priv->irq = platform_get_irq(pdev, 0); ++ if (!priv->irq) { ++ ret = -ENODEV; ++ goto err_put_adapter_dev; ++ } ++ ++ ret = devm_request_irq(&pdev->dev, priv->irq, npcm_peci_irq_handler, ++ 0, "peci-npcm-irq", priv); ++ if (ret) ++ goto err_put_adapter_dev; ++ ++ init_completion(&priv->xfer_complete); ++ spin_lock_init(&priv->lock); ++ ++ priv->adapter->owner = THIS_MODULE; ++ priv->adapter->dev.of_node = of_node_get(dev_of_node(priv->dev)); ++ strlcpy(priv->adapter->name, pdev->name, sizeof(priv->adapter->name)); ++ priv->adapter->xfer = npcm_peci_xfer; ++ ++ ret = npcm_peci_init_ctrl(priv); ++ if (ret) ++ goto err_put_adapter_dev; ++ ++ ret = peci_add_adapter(priv->adapter); ++ if (ret) ++ goto err_put_adapter_dev; ++ ++ dev_info(&pdev->dev, "peci bus %d registered, host negotiation bit rate %dHz", ++ priv->adapter->nr, priv->host_bit_rate); ++ ++ return 0; ++ ++err_put_adapter_dev: ++ put_device(&adapter->dev); ++ return ret; ++} ++ ++static int npcm_peci_remove(struct platform_device *pdev) ++{ ++ struct npcm_peci *priv = dev_get_drvdata(&pdev->dev); ++ ++ clk_disable_unprepare(priv->clk); ++ peci_del_adapter(priv->adapter); ++ of_node_put(priv->adapter->dev.of_node); ++ ++ return 0; ++} ++ ++static const struct of_device_id npcm_peci_of_table[] = { ++ { .compatible = "nuvoton,npcm750-peci", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, npcm_peci_of_table); ++ ++static struct platform_driver npcm_peci_driver = { ++ .probe = npcm_peci_probe, ++ .remove = npcm_peci_remove, ++ .driver = { ++ .name = "peci-npcm", ++ .of_match_table = of_match_ptr(npcm_peci_of_table), ++ }, ++}; ++module_platform_driver(npcm_peci_driver); ++ ++MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>"); ++MODULE_DESCRIPTION("NPCM Platform Environment Control Interface (PECI) driver"); ++MODULE_LICENSE("GPL v2"); diff --git a/drivers/peci/peci-aspeed.c b/drivers/peci/peci-aspeed.c deleted file mode 100644 index 51cb2563ceb6..000000000000 @@ -1940,7 +2398,7 @@ index 51cb2563ceb6..000000000000 -MODULE_DESCRIPTION("ASPEED PECI driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c -index 6f241469ec7e..e2ef013e5002 100644 +index 6f241469ec7e..d1f0df8b139a 100644 --- a/drivers/peci/peci-core.c +++ b/drivers/peci/peci-core.c @@ -1,38 +1,31 @@ @@ -2040,7 +2498,8 @@ index 6f241469ec7e..e2ef013e5002 100644 + * This function must only be called from process context! + */ +struct peci_xfer_msg *peci_get_xfer_msg(u8 tx_len, u8 rx_len) -+{ + { +- return crc8(peci_crc8_table, data, (size_t)len, 0); + struct peci_xfer_msg *msg; + u8 *tx_buf, *rx_buf; + @@ -2097,8 +2556,7 @@ index 6f241469ec7e..e2ef013e5002 100644 + +/* Calculate an Assured Write Frame Check Sequence byte */ +static int peci_aw_fcs(struct peci_xfer_msg *msg, int len, u8 *aw_fcs) - { -- return crc8(peci_crc8_table, data, (size_t)len, 0); ++{ + u8 *tmp_buf; + + /* Allocate a temporary buffer to use a contiguous byte array */ @@ -2127,8 +2585,7 @@ index 6f241469ec7e..e2ef013e5002 100644 + ulong timeout = jiffies; + u8 aw_fcs; + int ret; - -- /** ++ + /* + * In case if adapter uses DMA, check at here whether tx and rx buffers + * are DMA capable or not. @@ -2144,12 +2601,13 @@ index 6f241469ec7e..e2ef013e5002 100644 + return -EAGAIN; + } + } -+ + +- /** + /* * For some commands, the PECI originator may need to retry a command if * the processor PECI client responds with a 0x8x completion code. In * each instance, the processor PECI client may have started the -@@ -125,55 +223,56 @@ static int __peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg, +@@ -125,55 +223,51 @@ static int __peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg, */ if (do_retry) @@ -2162,11 +2620,10 @@ index 6f241469ec7e..e2ef013e5002 100644 + ret = adapter->xfer(adapter, msg); - if (!do_retry || rc) -+ if (!do_retry || ret) - break; - +- break; +- - if (msg->rx_buf[0] == DEV_PECI_CC_SUCCESS) -+ if (msg->rx_buf[0] == PECI_DEV_CC_SUCCESS) ++ if (!do_retry || ret || !msg->rx_buf) break; /* Retry is needed when completion code is 0x8x */ @@ -2174,10 +2631,9 @@ index 6f241469ec7e..e2ef013e5002 100644 - DEV_PECI_CC_NEED_RETRY) { - rc = -EIO; + if ((msg->rx_buf[0] & PECI_DEV_CC_RETRY_CHECK_MASK) != -+ PECI_DEV_CC_NEED_RETRY) { -+ ret = -EIO; ++ PECI_DEV_CC_NEED_RETRY) break; - } +- } /* Set the retry bit to indicate a retry attempt */ - msg->tx_buf[1] |= DEV_PECI_RETRY_BIT; @@ -2192,11 +2648,11 @@ index 6f241469ec7e..e2ef013e5002 100644 + ret = peci_aw_fcs(msg, 2 + msg->tx_len, &aw_fcs); + if (ret) + break; - -- /** ++ + msg->tx_buf[msg->tx_len - 1] = 0x80 ^ aw_fcs; + } -+ + +- /** + /* * Retry for at least 250ms before returning an error. * Retry interval guideline: @@ -2230,7 +2686,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } static int peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg) -@@ -190,34 +289,37 @@ static int peci_xfer_with_retries(struct peci_adapter *adapter, +@@ -190,34 +284,37 @@ static int peci_xfer_with_retries(struct peci_adapter *adapter, static int peci_scan_cmd_mask(struct peci_adapter *adapter) { @@ -2274,13 +2730,14 @@ index 6f241469ec7e..e2ef013e5002 100644 + goto out; } - /** +- /** - * Setting up the supporting commands based on minor revision number. ++ /* + * Setting up the supporting commands based on revision number. * See PECI Spec Table 3-1. */ revision = FIELD_GET(REVISION_NUM_MASK, dib); -@@ -243,10 +345,14 @@ static int peci_scan_cmd_mask(struct peci_adapter *adapter) +@@ -243,10 +340,14 @@ static int peci_scan_cmd_mask(struct peci_adapter *adapter) adapter->cmd_mask |= BIT(PECI_CMD_GET_DIB); adapter->cmd_mask |= BIT(PECI_CMD_PING); @@ -2297,7 +2754,7 @@ index 6f241469ec7e..e2ef013e5002 100644 { if (!(adapter->cmd_mask & BIT(PECI_CMD_PING)) && peci_scan_cmd_mask(adapter) < 0) { -@@ -262,70 +368,87 @@ static int peci_cmd_support(struct peci_adapter *adapter, enum peci_cmd cmd) +@@ -262,70 +363,87 @@ static int peci_cmd_support(struct peci_adapter *adapter, enum peci_cmd cmd) return 0; } @@ -2316,19 +2773,19 @@ index 6f241469ec7e..e2ef013e5002 100644 - struct peci_xfer_msg msg; + struct peci_xfer_msg *msg; + int ret; ++ ++ msg = peci_get_xfer_msg(0, 0); ++ if (!msg) ++ return -ENOMEM; ++ ++ msg->addr = umsg->addr; - msg.addr = umsg->addr; - msg.tx_len = 0; - msg.rx_len = 0; -+ msg = peci_get_xfer_msg(0, 0); -+ if (!msg) -+ return -ENOMEM; ++ ret = peci_xfer(adapter, msg); - return peci_xfer(adapter, &msg); -+ msg->addr = umsg->addr; -+ -+ ret = peci_xfer(adapter, msg); -+ + peci_put_xfer_msg(msg); + + return ret; @@ -2419,7 +2876,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Per the PECI spec, the read length must be a byte, word, or dword */ if (umsg->rx_len != 1 && umsg->rx_len != 2 && umsg->rx_len != 4) { -@@ -334,29 +457,34 @@ static int peci_ioctl_rd_pkg_cfg(struct peci_adapter *adapter, void *vmsg) +@@ -334,29 +452,35 @@ static int peci_ioctl_rd_pkg_cfg(struct peci_adapter *adapter, void *vmsg) return -EINVAL; } @@ -2445,17 +2902,18 @@ index 6f241469ec7e..e2ef013e5002 100644 + msg->tx_buf[2] = umsg->index; /* RdPkgConfig index */ + msg->tx_buf[3] = (u8)umsg->param; /* LSB - Config parameter */ + msg->tx_buf[4] = (u8)(umsg->param >> 8); /* MSB - Config parameter */ -+ -+ ret = peci_xfer_with_retries(adapter, msg, false); -+ if (!ret) -+ memcpy(umsg->pkg_config, &msg->rx_buf[1], umsg->rx_len); - rc = peci_xfer_with_retries(adapter, &msg, false); - if (!rc) - memcpy(umsg->pkg_config, &msg.rx_buf[1], umsg->rx_len); -+ peci_put_xfer_msg(msg); ++ ret = peci_xfer_with_retries(adapter, msg, false); ++ if (!ret) ++ memcpy(umsg->pkg_config, &msg->rx_buf[1], umsg->rx_len); - return rc; ++ umsg->cc = msg->rx_buf[0]; ++ peci_put_xfer_msg(msg); ++ + return ret; } @@ -2471,7 +2929,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Per the PECI spec, the write length must be a dword */ if (umsg->tx_len != 4) { -@@ -365,86 +493,113 @@ static int peci_ioctl_wr_pkg_cfg(struct peci_adapter *adapter, void *vmsg) +@@ -365,86 +489,116 @@ static int peci_ioctl_wr_pkg_cfg(struct peci_adapter *adapter, void *vmsg) return -EINVAL; } @@ -2504,19 +2962,20 @@ index 6f241469ec7e..e2ef013e5002 100644 + ret = peci_aw_fcs(msg, 8 + umsg->tx_len, &aw_fcs); + if (ret) + goto out; -+ -+ msg->tx_buf[5 + i] = 0x80 ^ aw_fcs; - /* Add an Assure Write Frame Check Sequence byte */ - msg.tx_buf[5 + i] = 0x80 ^ - peci_aw_fcs((u8 *)&msg, 8 + umsg->tx_len); -+ ret = peci_xfer_with_retries(adapter, msg, true); ++ msg->tx_buf[5 + i] = 0x80 ^ aw_fcs; - rc = peci_xfer_with_retries(adapter, &msg, true); -+out: -+ peci_put_xfer_msg(msg); ++ ret = peci_xfer_with_retries(adapter, msg, true); - return rc; ++out: ++ umsg->cc = msg->rx_buf[0]; ++ peci_put_xfer_msg(msg); ++ + return ret; } @@ -2559,17 +3018,18 @@ index 6f241469ec7e..e2ef013e5002 100644 + if (!ret) + memcpy(&umsg->value, &msg->rx_buf[1], sizeof(uint64_t)); + ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); + + return ret; -+} -+ -+static int peci_cmd_wr_ia_msr(struct peci_adapter *adapter, void *vmsg) -+{ -+ return -ENOSYS; /* Not implemented yet */ } -static int peci_ioctl_rd_pci_cfg(struct peci_adapter *adapter, void *vmsg) ++static int peci_cmd_wr_ia_msr(struct peci_adapter *adapter, void *vmsg) ++{ ++ return -ENOSYS; /* Not implemented yet */ ++} ++ +static int peci_cmd_rd_pci_cfg(struct peci_adapter *adapter, void *vmsg) { struct peci_rd_pci_cfg_msg *umsg = vmsg; @@ -2614,6 +3074,7 @@ index 6f241469ec7e..e2ef013e5002 100644 - rc = peci_xfer_with_retries(adapter, &msg, false); - if (!rc) - memcpy(umsg->pci_config, &msg.rx_buf[1], 4); ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); - return rc; @@ -2637,7 +3098,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Per the PECI spec, the read length must be a byte, word, or dword */ if (umsg->rx_len != 1 && umsg->rx_len != 2 && umsg->rx_len != 4) { -@@ -453,34 +608,41 @@ static int peci_ioctl_rd_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) +@@ -453,34 +607,42 @@ static int peci_ioctl_rd_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) return -EINVAL; } @@ -2676,6 +3137,7 @@ index 6f241469ec7e..e2ef013e5002 100644 - rc = peci_xfer_with_retries(adapter, &msg, false); - if (!rc) - memcpy(umsg->pci_config, &msg.rx_buf[1], umsg->rx_len); ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); - return rc; @@ -2695,7 +3157,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Per the PECI spec, the write length must be a byte, word, or dword */ if (umsg->tx_len != 1 && umsg->tx_len != 2 && umsg->tx_len != 4) { -@@ -489,47 +651,56 @@ static int peci_ioctl_wr_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) +@@ -489,47 +651,57 @@ static int peci_ioctl_wr_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) return -EINVAL; } @@ -2743,6 +3205,7 @@ index 6f241469ec7e..e2ef013e5002 100644 - rc = peci_xfer_with_retries(adapter, &msg, true); +out: ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); - return rc; @@ -2782,7 +3245,7 @@ index 6f241469ec7e..e2ef013e5002 100644 }; /** -@@ -545,109 +716,28 @@ static const peci_ioctl_fn_type peci_ioctl_fn[PECI_CMD_MAX] = { +@@ -545,109 +717,28 @@ static const peci_ioctl_fn_type peci_ioctl_fn[PECI_CMD_MAX] = { */ int peci_command(struct peci_adapter *adapter, enum peci_cmd cmd, void *vmsg) { @@ -2901,7 +3364,7 @@ index 6f241469ec7e..e2ef013e5002 100644 static int peci_detect(struct peci_adapter *adapter, u8 addr) { struct peci_ping_msg msg; -@@ -666,9 +756,9 @@ peci_of_match_device(const struct of_device_id *matches, +@@ -666,9 +757,9 @@ peci_of_match_device(const struct of_device_id *matches, return NULL; return of_match_device(matches, &client->dev); @@ -2913,7 +3376,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } static const struct peci_device_id * -@@ -737,6 +827,7 @@ static int peci_device_probe(struct device *dev) +@@ -737,6 +828,7 @@ static int peci_device_probe(struct device *dev) err_detach_pm_domain: dev_pm_domain_detach(&client->dev, true); @@ -2921,7 +3384,7 @@ index 6f241469ec7e..e2ef013e5002 100644 return status; } -@@ -775,13 +866,14 @@ static void peci_device_shutdown(struct device *dev) +@@ -775,13 +867,14 @@ static void peci_device_shutdown(struct device *dev) driver->shutdown(client); } @@ -2937,7 +3400,7 @@ index 6f241469ec7e..e2ef013e5002 100644 static int peci_check_addr_validity(u8 addr) { -@@ -814,18 +906,18 @@ static int peci_check_client_busy(struct device *dev, void *client_new_p) +@@ -814,18 +907,23 @@ static int peci_check_client_busy(struct device *dev, void *client_new_p) int peci_get_cpu_id(struct peci_adapter *adapter, u8 addr, u32 *cpu_id) { struct peci_rd_pkg_cfg_msg msg; @@ -2953,16 +3416,22 @@ index 6f241469ec7e..e2ef013e5002 100644 - rc = peci_command(adapter, PECI_CMD_RD_PKG_CFG, &msg); - if (!rc) +- *cpu_id = le32_to_cpup((__le32 *)msg.pkg_config); + ret = peci_command(adapter, PECI_CMD_RD_PKG_CFG, &msg); -+ if (!ret) - *cpu_id = le32_to_cpup((__le32 *)msg.pkg_config); ++ if (ret) ++ return ret; ++ ++ if (msg.cc != PECI_DEV_CC_SUCCESS) ++ return -EAGAIN; ++ ++ *cpu_id = le32_to_cpup((__le32 *)msg.pkg_config); - return rc; -+ return ret; ++ return 0; } EXPORT_SYMBOL_GPL(peci_get_cpu_id); -@@ -833,7 +925,7 @@ static struct peci_client *peci_new_device(struct peci_adapter *adapter, +@@ -833,7 +931,7 @@ static struct peci_client *peci_new_device(struct peci_adapter *adapter, struct peci_board_info const *info) { struct peci_client *client; @@ -2971,7 +3440,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Increase reference count for the adapter assigned */ if (!peci_get_adapter(adapter->nr)) -@@ -847,46 +939,49 @@ static struct peci_client *peci_new_device(struct peci_adapter *adapter, +@@ -847,46 +945,49 @@ static struct peci_client *peci_new_device(struct peci_adapter *adapter, client->addr = info->addr; strlcpy(client->name, info->type, sizeof(client->name)); @@ -3033,7 +3502,7 @@ index 6f241469ec7e..e2ef013e5002 100644 return NULL; } -@@ -895,8 +990,10 @@ static void peci_unregister_device(struct peci_client *client) +@@ -895,8 +996,10 @@ static void peci_unregister_device(struct peci_client *client) if (!client) return; @@ -3045,7 +3514,7 @@ index 6f241469ec7e..e2ef013e5002 100644 device_unregister(&client->dev); } -@@ -916,7 +1013,7 @@ static void peci_adapter_dev_release(struct device *dev) +@@ -916,7 +1019,7 @@ static void peci_adapter_dev_release(struct device *dev) dev_dbg(dev, "%s: %s\n", __func__, adapter->name); mutex_destroy(&adapter->userspace_clients_lock); @@ -3054,7 +3523,7 @@ index 6f241469ec7e..e2ef013e5002 100644 kfree(adapter); } -@@ -928,7 +1025,8 @@ static ssize_t peci_sysfs_new_device(struct device *dev, +@@ -928,7 +1031,8 @@ static ssize_t peci_sysfs_new_device(struct device *dev, struct peci_board_info info = {}; struct peci_client *client; char *blank, end; @@ -3064,7 +3533,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Parse device type */ blank = strchr(buf, ' '); -@@ -943,16 +1041,17 @@ static ssize_t peci_sysfs_new_device(struct device *dev, +@@ -943,16 +1047,17 @@ static ssize_t peci_sysfs_new_device(struct device *dev, memcpy(info.type, buf, blank - buf); /* Parse remaining parameters, reject extra parameters */ @@ -3085,7 +3554,7 @@ index 6f241469ec7e..e2ef013e5002 100644 client = peci_new_device(adapter, &info); if (!client) return -EINVAL; -@@ -961,8 +1060,8 @@ static ssize_t peci_sysfs_new_device(struct device *dev, +@@ -961,8 +1066,8 @@ static ssize_t peci_sysfs_new_device(struct device *dev, mutex_lock(&adapter->userspace_clients_lock); list_add_tail(&client->detected, &adapter->userspace_clients); mutex_unlock(&adapter->userspace_clients_lock); @@ -3096,7 +3565,7 @@ index 6f241469ec7e..e2ef013e5002 100644 return count; } -@@ -975,9 +1074,9 @@ static ssize_t peci_sysfs_delete_device(struct device *dev, +@@ -975,9 +1080,9 @@ static ssize_t peci_sysfs_delete_device(struct device *dev, struct peci_adapter *adapter = to_peci_adapter(dev); struct peci_client *client, *next; struct peci_board_info info = {}; @@ -3108,7 +3577,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Parse device type */ blank = strchr(buf, ' '); -@@ -992,41 +1091,41 @@ static ssize_t peci_sysfs_delete_device(struct device *dev, +@@ -992,41 +1097,41 @@ static ssize_t peci_sysfs_delete_device(struct device *dev, memcpy(info.type, buf, blank - buf); /* Parse remaining parameters, reject extra parameters */ @@ -3162,7 +3631,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } static DEVICE_ATTR_IGNORE_LOCKDEP(delete_device, 0200, NULL, peci_sysfs_delete_device); -@@ -1039,10 +1138,11 @@ static struct attribute *peci_adapter_attrs[] = { +@@ -1039,10 +1144,11 @@ static struct attribute *peci_adapter_attrs[] = { }; ATTRIBUTE_GROUPS(peci_adapter); @@ -3175,7 +3644,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /** * peci_verify_adapter - return parameter as peci_adapter, or NULL -@@ -1063,32 +1163,26 @@ static struct peci_client *peci_of_register_device(struct peci_adapter *adapter, +@@ -1063,32 +1169,26 @@ static struct peci_client *peci_of_register_device(struct peci_adapter *adapter, struct device_node *node) { struct peci_board_info info = {}; @@ -3220,7 +3689,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } static void peci_of_register_devices(struct peci_adapter *adapter) -@@ -1119,7 +1213,7 @@ static void peci_of_register_devices(struct peci_adapter *adapter) +@@ -1119,7 +1219,7 @@ static void peci_of_register_devices(struct peci_adapter *adapter) of_node_put(bus); } @@ -3229,7 +3698,7 @@ index 6f241469ec7e..e2ef013e5002 100644 static void peci_of_register_devices(struct peci_adapter *adapter) { } #endif /* CONFIG_OF */ -@@ -1163,9 +1257,7 @@ static struct peci_adapter *peci_of_find_adapter(struct device_node *node) +@@ -1163,9 +1263,7 @@ static struct peci_adapter *peci_of_find_adapter(struct device_node *node) return adapter; } @@ -3240,7 +3709,7 @@ index 6f241469ec7e..e2ef013e5002 100644 { struct of_reconfig_data *rd = arg; struct peci_adapter *adapter; -@@ -1216,7 +1308,7 @@ static int peci_of_notify(struct notifier_block *nb, +@@ -1216,7 +1314,7 @@ static int peci_of_notify(struct notifier_block *nb, static struct notifier_block peci_of_notifier = { .notifier_call = peci_of_notify, }; @@ -3249,7 +3718,7 @@ index 6f241469ec7e..e2ef013e5002 100644 extern struct notifier_block peci_of_notifier; #endif /* CONFIG_OF_DYNAMIC */ -@@ -1240,7 +1332,7 @@ extern struct notifier_block peci_of_notifier; +@@ -1240,7 +1338,7 @@ extern struct notifier_block peci_of_notifier; * * Return: the peci_adapter structure on success, else NULL. */ @@ -3258,7 +3727,7 @@ index 6f241469ec7e..e2ef013e5002 100644 { struct peci_adapter *adapter; -@@ -1263,7 +1355,7 @@ EXPORT_SYMBOL_GPL(peci_alloc_adapter); +@@ -1263,7 +1361,7 @@ EXPORT_SYMBOL_GPL(peci_alloc_adapter); static int peci_register_adapter(struct peci_adapter *adapter) { @@ -3267,7 +3736,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Can't register until after driver model init */ if (WARN_ON(!is_registered)) -@@ -1275,27 +1367,17 @@ static int peci_register_adapter(struct peci_adapter *adapter) +@@ -1275,27 +1373,17 @@ static int peci_register_adapter(struct peci_adapter *adapter) if (WARN(!adapter->xfer, "peci adapter has no xfer function\n")) goto err_free_idr; @@ -3300,7 +3769,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } dev_dbg(&adapter->dev, "adapter [%s] registered\n", adapter->name); -@@ -1309,13 +1391,11 @@ static int peci_register_adapter(struct peci_adapter *adapter) +@@ -1309,13 +1397,11 @@ static int peci_register_adapter(struct peci_adapter *adapter) return 0; @@ -3315,7 +3784,7 @@ index 6f241469ec7e..e2ef013e5002 100644 } static int peci_add_numbered_adapter(struct peci_adapter *adapter) -@@ -1411,7 +1491,7 @@ void peci_del_adapter(struct peci_adapter *adapter) +@@ -1411,7 +1497,7 @@ void peci_del_adapter(struct peci_adapter *adapter) } mutex_unlock(&adapter->userspace_clients_lock); @@ -3324,7 +3793,7 @@ index 6f241469ec7e..e2ef013e5002 100644 * Detach any active clients. This can't fail, thus we do not * check the returned value. */ -@@ -1420,13 +1500,8 @@ void peci_del_adapter(struct peci_adapter *adapter) +@@ -1420,13 +1506,8 @@ void peci_del_adapter(struct peci_adapter *adapter) /* device name is gone after device_unregister */ dev_dbg(&adapter->dev, "adapter [%s] unregistered\n", adapter->name); @@ -3338,7 +3807,7 @@ index 6f241469ec7e..e2ef013e5002 100644 device_unregister(&adapter->dev); /* free bus id */ -@@ -1436,6 +1511,18 @@ void peci_del_adapter(struct peci_adapter *adapter) +@@ -1436,6 +1517,18 @@ void peci_del_adapter(struct peci_adapter *adapter) } EXPORT_SYMBOL_GPL(peci_del_adapter); @@ -3357,7 +3826,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /** * peci_register_driver - register a PECI driver * @owner: owner module of the driver being registered -@@ -1446,7 +1533,7 @@ EXPORT_SYMBOL_GPL(peci_del_adapter); +@@ -1446,7 +1539,7 @@ EXPORT_SYMBOL_GPL(peci_del_adapter); */ int peci_register_driver(struct module *owner, struct peci_driver *driver) { @@ -3366,7 +3835,7 @@ index 6f241469ec7e..e2ef013e5002 100644 /* Can't register until after driver model init */ if (WARN_ON(!is_registered)) -@@ -1456,13 +1543,13 @@ int peci_register_driver(struct module *owner, struct peci_driver *driver) +@@ -1456,13 +1549,13 @@ int peci_register_driver(struct module *owner, struct peci_driver *driver) driver->driver.owner = owner; driver->driver.bus = &peci_bus_type; @@ -3384,7 +3853,7 @@ index 6f241469ec7e..e2ef013e5002 100644 pr_debug("driver [%s] registered\n", driver->driver.name); -@@ -1492,13 +1579,6 @@ static int __init peci_init(void) +@@ -1492,13 +1585,6 @@ static int __init peci_init(void) return ret; } @@ -3398,7 +3867,7 @@ index 6f241469ec7e..e2ef013e5002 100644 crc8_populate_msb(peci_crc8_table, PECI_CRC8_POLYNOMIAL); if (IS_ENABLED(CONFIG_OF_DYNAMIC)) -@@ -1514,11 +1594,10 @@ static void __exit peci_exit(void) +@@ -1514,11 +1600,10 @@ static void __exit peci_exit(void) if (IS_ENABLED(CONFIG_OF_DYNAMIC)) WARN_ON(of_reconfig_notifier_unregister(&peci_of_notifier)); @@ -3413,10 +3882,10 @@ index 6f241469ec7e..e2ef013e5002 100644 MODULE_AUTHOR("Jason M Biils <jason.m.bills@linux.intel.com>"); diff --git a/drivers/peci/peci-dev.c b/drivers/peci/peci-dev.c new file mode 100644 -index 000000000000..5de0683206bc +index 000000000000..ac9cba0fb429 --- /dev/null +++ b/drivers/peci/peci-dev.c -@@ -0,0 +1,340 @@ +@@ -0,0 +1,346 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018-2019 Intel Corporation + @@ -3517,9 +3986,9 @@ index 000000000000..5de0683206bc +static long peci_dev_ioctl(struct file *file, uint iocmd, ulong arg) +{ + struct peci_dev *peci_dev = file->private_data; -+ struct peci_xfer_msg __user *uxmsg; ++ void __user *umsg = (void __user *)arg; + struct peci_xfer_msg *xmsg = NULL; -+ void __user *umsg; ++ struct peci_xfer_msg uxmsg; + enum peci_cmd cmd; + u8 *msg = NULL; + uint msg_len; @@ -3535,30 +4004,35 @@ index 000000000000..5de0683206bc + break; + } + -+ uxmsg = (struct peci_xfer_msg __user *)arg; -+ xmsg = peci_get_xfer_msg(uxmsg->tx_len, uxmsg->rx_len); ++ if (copy_from_user(&uxmsg, umsg, msg_len)) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ xmsg = peci_get_xfer_msg(uxmsg.tx_len, uxmsg.rx_len); + if (IS_ERR(xmsg)) { + ret = PTR_ERR(xmsg); + break; + } + -+ if (uxmsg->tx_len && -+ copy_from_user(uxmsg->tx_buf, xmsg->tx_buf, -+ uxmsg->tx_len)) { ++ if (uxmsg.tx_len && ++ copy_from_user(xmsg->tx_buf, uxmsg.tx_buf, uxmsg.tx_len)) { + ret = -EFAULT; + break; + } + ++ xmsg->addr = uxmsg.addr; ++ xmsg->tx_len = uxmsg.tx_len; ++ xmsg->rx_len = uxmsg.rx_len; ++ + ret = peci_command(peci_dev->adapter, cmd, xmsg); -+ if (!ret && uxmsg->rx_len && -+ copy_to_user(xmsg->rx_buf, uxmsg->rx_buf, -+ uxmsg->rx_len)) ++ if (!ret && xmsg->rx_len && ++ copy_to_user(uxmsg.rx_buf, xmsg->rx_buf, xmsg->rx_len)) + ret = -EFAULT; + + break; + + default: -+ umsg = (void __user *)arg; + msg = memdup_user(umsg, msg_len); + if (IS_ERR(msg)) { + ret = PTR_ERR(msg); @@ -3566,7 +4040,8 @@ index 000000000000..5de0683206bc + } + + ret = peci_command(peci_dev->adapter, cmd, msg); -+ if (!ret && copy_to_user(umsg, msg, msg_len)) ++ if ((!ret || ret == -ETIMEDOUT) && ++ copy_to_user(umsg, msg, msg_len)) + ret = -EFAULT; + + break; @@ -3757,8 +4232,424 @@ index 000000000000..5de0683206bc +MODULE_AUTHOR("Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>"); +MODULE_DESCRIPTION("PECI /dev entries driver"); +MODULE_LICENSE("GPL v2"); +diff --git a/drivers/peci/peci-npcm.c b/drivers/peci/peci-npcm.c +deleted file mode 100644 +index f632365b1416..000000000000 +--- a/drivers/peci/peci-npcm.c ++++ /dev/null +@@ -1,410 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-// Copyright (c) 2019 Nuvoton Technology corporation. +- +-#include <linux/bitfield.h> +-#include <linux/clk.h> +-#include <linux/interrupt.h> +-#include <linux/jiffies.h> +-#include <linux/module.h> +-#include <linux/of.h> +-#include <linux/peci.h> +-#include <linux/platform_device.h> +-#include <linux/regmap.h> +-#include <linux/mfd/syscon.h> +-#include <linux/reset.h> +- +-/* NPCM7xx GCR module */ +-#define NPCM7XX_INTCR3_OFFSET 0x9C +-#define NPCM7XX_INTCR3_PECIVSEL BIT(19) +- +-/* NPCM PECI Registers */ +-#define NPCM_PECI_CTL_STS 0x00 +-#define NPCM_PECI_RD_LENGTH 0x04 +-#define NPCM_PECI_ADDR 0x08 +-#define NPCM_PECI_CMD 0x0C +-#define NPCM_PECI_CTL2 0x10 +-#define NPCM_PECI_WR_LENGTH 0x1C +-#define NPCM_PECI_PDDR 0x2C +-#define NPCM_PECI_DAT_INOUT(n) (0x100 + ((n) * 4)) +- +-#define NPCM_PECI_MAX_REG 0x200 +- +-/* NPCM_PECI_CTL_STS - 0x00 : Control Register */ +-#define NPCM_PECI_CTRL_DONE_INT_EN BIT(6) +-#define NPCM_PECI_CTRL_ABRT_ERR BIT(4) +-#define NPCM_PECI_CTRL_CRC_ERR BIT(3) +-#define NPCM_PECI_CTRL_DONE BIT(1) +-#define NPCM_PECI_CTRL_START_BUSY BIT(0) +- +-/* NPCM_PECI_RD_LENGTH - 0x04 : Command Register */ +-#define NPCM_PECI_RD_LEN_MASK GENMASK(6, 0) +- +-/* NPCM_PECI_CMD - 0x10 : Command Register */ +-#define NPCM_PECI_CTL2_MASK GENMASK(7, 6) +- +-/* NPCM_PECI_WR_LENGTH - 0x1C : Command Register */ +-#define NPCM_PECI_WR_LEN_MASK GENMASK(6, 0) +- +-/* NPCM_PECI_PDDR - 0x2C : Command Register */ +-#define NPCM_PECI_PDDR_MASK GENMASK(4, 0) +- +-#define NPCM_PECI_INT_MASK (NPCM_PECI_CTRL_ABRT_ERR | \ +- NPCM_PECI_CTRL_CRC_ERR | \ +- NPCM_PECI_CTRL_DONE) +- +-#define NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC 50000 +-#define NPCM_PECI_IDLE_CHECK_INTERVAL_USEC 10000 +-#define NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT 1000 +-#define NPCM_PECI_CMD_TIMEOUT_MS_MAX 60000 +-#define NPCM_PECI_HOST_NEG_BIT_RATE_MAX 31 +-#define NPCM_PECI_HOST_NEG_BIT_RATE_MIN 7 +-#define NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT 15 +-#define NPCM_PECI_PULL_DOWN_DEFAULT 0 +-#define NPCM_PECI_PULL_DOWN_MAX 2 +- +-struct npcm_peci { +- u32 cmd_timeout_ms; +- u32 host_bit_rate; +- struct completion xfer_complete; +- struct regmap *gcr_regmap; +- struct peci_adapter *adapter; +- struct regmap *regmap; +- u32 status; +- spinlock_t lock; /* to sync completion status handling */ +- struct device *dev; +- struct clk *clk; +- int irq; +-}; +- +-static int npcm_peci_xfer_native(struct npcm_peci *priv, +- struct peci_xfer_msg *msg) +-{ +- long err, timeout = msecs_to_jiffies(priv->cmd_timeout_ms); +- unsigned long flags; +- unsigned int msg_rd; +- u32 cmd_sts; +- int i, rc; +- +- /* Check command sts and bus idle state */ +- rc = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, +- !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), +- NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, +- NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); +- if (rc) +- return rc; /* -ETIMEDOUT */ +- +- spin_lock_irqsave(&priv->lock, flags); +- reinit_completion(&priv->xfer_complete); +- +- regmap_write(priv->regmap, NPCM_PECI_ADDR, msg->addr); +- regmap_write(priv->regmap, NPCM_PECI_RD_LENGTH, +- NPCM_PECI_WR_LEN_MASK & msg->rx_len); +- regmap_write(priv->regmap, NPCM_PECI_WR_LENGTH, +- NPCM_PECI_WR_LEN_MASK & msg->tx_len); +- +- if (msg->tx_len) { +- regmap_write(priv->regmap, NPCM_PECI_CMD, msg->tx_buf[0]); +- +- for (i = 0; i < (msg->tx_len - 1); i++) +- regmap_write(priv->regmap, NPCM_PECI_DAT_INOUT(i), +- msg->tx_buf[i + 1]); +- } +- +- priv->status = 0; +- regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, +- NPCM_PECI_CTRL_START_BUSY, +- NPCM_PECI_CTRL_START_BUSY); +- +- spin_unlock_irqrestore(&priv->lock, flags); +- +- err = wait_for_completion_interruptible_timeout(&priv->xfer_complete, +- timeout); +- +- spin_lock_irqsave(&priv->lock, flags); +- +- regmap_write(priv->regmap, NPCM_PECI_CMD, 0); +- +- if (err <= 0 || priv->status != NPCM_PECI_CTRL_DONE) { +- if (err < 0) { /* -ERESTARTSYS */ +- rc = (int)err; +- goto err_irqrestore; +- } else if (err == 0) { +- dev_dbg(priv->dev, "Timeout waiting for a response!\n"); +- rc = -ETIMEDOUT; +- goto err_irqrestore; +- } +- +- dev_dbg(priv->dev, "No valid response!\n"); +- rc = -EIO; +- goto err_irqrestore; +- } +- +- for (i = 0; i < msg->rx_len; i++) { +- regmap_read(priv->regmap, NPCM_PECI_DAT_INOUT(i), &msg_rd); +- msg->rx_buf[i] = (u8)msg_rd; +- } +- +-err_irqrestore: +- spin_unlock_irqrestore(&priv->lock, flags); +- return rc; +-} +- +-static irqreturn_t npcm_peci_irq_handler(int irq, void *arg) +-{ +- struct npcm_peci *priv = arg; +- u32 status_ack = 0; +- u32 status; +- +- spin_lock(&priv->lock); +- regmap_read(priv->regmap, NPCM_PECI_CTL_STS, &status); +- priv->status |= (status & NPCM_PECI_INT_MASK); +- +- if (status & NPCM_PECI_CTRL_CRC_ERR) { +- dev_dbg(priv->dev, "PECI_INT_W_FCS_BAD\n"); +- status_ack |= NPCM_PECI_CTRL_CRC_ERR; +- } +- +- if (status & NPCM_PECI_CTRL_ABRT_ERR) { +- dev_dbg(priv->dev, "NPCM_PECI_CTRL_ABRT_ERR\n"); +- status_ack |= NPCM_PECI_CTRL_ABRT_ERR; +- } +- +- /* +- * All commands should be ended up with a NPCM_PECI_CTRL_DONE +- * bit set even in an error case. +- */ +- if (status & NPCM_PECI_CTRL_DONE) { +- dev_dbg(priv->dev, "NPCM_PECI_CTRL_DONE\n"); +- status_ack |= NPCM_PECI_CTRL_DONE; +- complete(&priv->xfer_complete); +- } +- +- regmap_write_bits(priv->regmap, NPCM_PECI_CTL_STS, +- NPCM_PECI_INT_MASK, status_ack); +- +- spin_unlock(&priv->lock); +- return IRQ_HANDLED; +-} +- +-static int npcm_peci_init_ctrl(struct npcm_peci *priv) +-{ +- u32 cmd_sts, host_neg_bit_rate = 0, pull_down = 0; +- int ret; +- bool volt; +- +- priv->clk = devm_clk_get(priv->dev, NULL); +- if (IS_ERR(priv->clk)) { +- dev_err(priv->dev, "Failed to get clk source.\n"); +- return PTR_ERR(priv->clk); +- } +- +- ret = clk_prepare_enable(priv->clk); +- if (ret) { +- dev_err(priv->dev, "Failed to enable clock.\n"); +- return ret; +- } +- +- ret = of_property_read_u32(priv->dev->of_node, "cmd-timeout-ms", +- &priv->cmd_timeout_ms); +- if (ret || priv->cmd_timeout_ms > NPCM_PECI_CMD_TIMEOUT_MS_MAX || +- priv->cmd_timeout_ms == 0) { +- if (ret) +- dev_warn(priv->dev, +- "cmd-timeout-ms not found, use default : %u\n", +- NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT); +- else +- dev_warn(priv->dev, +- "Invalid cmd-timeout-ms : %u. Use default : %u\n", +- priv->cmd_timeout_ms, +- NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT); +- +- priv->cmd_timeout_ms = NPCM_PECI_CMD_TIMEOUT_MS_DEFAULT; +- } +- +- if (of_device_is_compatible(priv->dev->of_node, +- "nuvoton,npcm750-peci")) { +- priv->gcr_regmap = syscon_regmap_lookup_by_compatible +- ("nuvoton,npcm750-gcr"); +- if (!IS_ERR(priv->gcr_regmap)) { +- volt = of_property_read_bool(priv->dev->of_node, +- "high-volt-range"); +- if (volt) +- regmap_update_bits(priv->gcr_regmap, +- NPCM7XX_INTCR3_OFFSET, +- NPCM7XX_INTCR3_PECIVSEL, +- NPCM7XX_INTCR3_PECIVSEL); +- else +- regmap_update_bits(priv->gcr_regmap, +- NPCM7XX_INTCR3_OFFSET, +- NPCM7XX_INTCR3_PECIVSEL, 0); +- } +- } +- +- ret = of_property_read_u32(priv->dev->of_node, "pull-down", +- &pull_down); +- if (ret || pull_down > NPCM_PECI_PULL_DOWN_MAX) { +- if (ret) +- dev_warn(priv->dev, +- "pull-down not found, use default : %u\n", +- NPCM_PECI_PULL_DOWN_DEFAULT); +- else +- dev_warn(priv->dev, +- "Invalid pull-down : %u. Use default : %u\n", +- pull_down, +- NPCM_PECI_PULL_DOWN_DEFAULT); +- pull_down = NPCM_PECI_PULL_DOWN_DEFAULT; +- } +- +- regmap_update_bits(priv->regmap, NPCM_PECI_CTL2, NPCM_PECI_CTL2_MASK, +- pull_down << 6); +- +- ret = of_property_read_u32(priv->dev->of_node, "host-neg-bit-rate", +- &host_neg_bit_rate); +- if (ret || host_neg_bit_rate > NPCM_PECI_HOST_NEG_BIT_RATE_MAX || +- host_neg_bit_rate < NPCM_PECI_HOST_NEG_BIT_RATE_MIN) { +- if (ret) +- dev_warn(priv->dev, +- "host-neg-bit-rate not found, use default : %u\n", +- NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT); +- else +- dev_warn(priv->dev, +- "Invalid host-neg-bit-rate : %u. Use default : %u\n", +- host_neg_bit_rate, +- NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT); +- host_neg_bit_rate = NPCM_PECI_HOST_NEG_BIT_RATE_DEFAULT; +- } +- +- regmap_update_bits(priv->regmap, NPCM_PECI_PDDR, NPCM_PECI_PDDR_MASK, +- host_neg_bit_rate); +- +- priv->host_bit_rate = clk_get_rate(priv->clk) / +- (4 * (host_neg_bit_rate + 1)); +- +- ret = regmap_read_poll_timeout(priv->regmap, NPCM_PECI_CTL_STS, cmd_sts, +- !(cmd_sts & NPCM_PECI_CTRL_START_BUSY), +- NPCM_PECI_IDLE_CHECK_INTERVAL_USEC, +- NPCM_PECI_IDLE_CHECK_TIMEOUT_USEC); +- if (ret) +- return ret; /* -ETIMEDOUT */ +- +- /* PECI interrupt enable */ +- regmap_update_bits(priv->regmap, NPCM_PECI_CTL_STS, +- NPCM_PECI_CTRL_DONE_INT_EN, +- NPCM_PECI_CTRL_DONE_INT_EN); +- +- return 0; +-} +- +-static const struct regmap_config npcm_peci_regmap_config = { +- .reg_bits = 8, +- .val_bits = 8, +- .max_register = NPCM_PECI_MAX_REG, +- .fast_io = true, +-}; +- +-static int npcm_peci_xfer(struct peci_adapter *adapter, +- struct peci_xfer_msg *msg) +-{ +- struct npcm_peci *priv = peci_get_adapdata(adapter); +- +- return npcm_peci_xfer_native(priv, msg); +-} +- +-static int npcm_peci_probe(struct platform_device *pdev) +-{ +- struct peci_adapter *adapter; +- struct npcm_peci *priv; +- struct resource *res; +- void __iomem *base; +- int ret; +- +- adapter = peci_alloc_adapter(&pdev->dev, sizeof(*priv)); +- if (!adapter) +- return -ENOMEM; +- +- priv = peci_get_adapdata(adapter); +- priv->adapter = adapter; +- priv->dev = &pdev->dev; +- dev_set_drvdata(&pdev->dev, priv); +- +- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- base = devm_ioremap_resource(&pdev->dev, res); +- if (IS_ERR(base)) { +- ret = PTR_ERR(base); +- goto err_put_adapter_dev; +- } +- +- priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, +- &npcm_peci_regmap_config); +- if (IS_ERR(priv->regmap)) { +- ret = PTR_ERR(priv->regmap); +- goto err_put_adapter_dev; +- } +- +- priv->irq = platform_get_irq(pdev, 0); +- if (!priv->irq) { +- ret = -ENODEV; +- goto err_put_adapter_dev; +- } +- +- ret = devm_request_irq(&pdev->dev, priv->irq, npcm_peci_irq_handler, +- 0, "peci-npcm-irq", priv); +- if (ret) +- goto err_put_adapter_dev; +- +- init_completion(&priv->xfer_complete); +- spin_lock_init(&priv->lock); +- +- priv->adapter->owner = THIS_MODULE; +- priv->adapter->dev.of_node = of_node_get(dev_of_node(priv->dev)); +- strlcpy(priv->adapter->name, pdev->name, sizeof(priv->adapter->name)); +- priv->adapter->xfer = npcm_peci_xfer; +- +- ret = npcm_peci_init_ctrl(priv); +- if (ret) +- goto err_put_adapter_dev; +- +- ret = peci_add_adapter(priv->adapter); +- if (ret) +- goto err_put_adapter_dev; +- +- dev_info(&pdev->dev, "peci bus %d registered, host negotiation bit rate %dHz", +- priv->adapter->nr, priv->host_bit_rate); +- +- return 0; +- +-err_put_adapter_dev: +- put_device(&adapter->dev); +- return ret; +-} +- +-static int npcm_peci_remove(struct platform_device *pdev) +-{ +- struct npcm_peci *priv = dev_get_drvdata(&pdev->dev); +- +- clk_disable_unprepare(priv->clk); +- peci_del_adapter(priv->adapter); +- of_node_put(priv->adapter->dev.of_node); +- +- return 0; +-} +- +-static const struct of_device_id npcm_peci_of_table[] = { +- { .compatible = "nuvoton,npcm750-peci", }, +- { } +-}; +-MODULE_DEVICE_TABLE(of, npcm_peci_of_table); +- +-static struct platform_driver npcm_peci_driver = { +- .probe = npcm_peci_probe, +- .remove = npcm_peci_remove, +- .driver = { +- .name = "peci-npcm", +- .of_match_table = of_match_ptr(npcm_peci_of_table), +- }, +-}; +-module_platform_driver(npcm_peci_driver); +- +-MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>"); +-MODULE_DESCRIPTION("NPCM Platform Environment Control Interface (PECI) driver"); +-MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/intel-peci-client.h b/include/linux/mfd/intel-peci-client.h -index 8f6d823a59cd..1f1b07a9aeab 100644 +index 8f6d823a59cd..7b62a02e46ee 100644 --- a/include/linux/mfd/intel-peci-client.h +++ b/include/linux/mfd/intel-peci-client.h @@ -1,5 +1,5 @@ @@ -3768,7 +4659,7 @@ index 8f6d823a59cd..1f1b07a9aeab 100644 #ifndef __LINUX_MFD_INTEL_PECI_CLIENT_H #define __LINUX_MFD_INTEL_PECI_CLIENT_H -@@ -9,7 +9,7 @@ +@@ -9,14 +9,15 @@ #if IS_ENABLED(CONFIG_X86) #include <asm/intel-family.h> #else @@ -3777,7 +4668,29 @@ index 8f6d823a59cd..1f1b07a9aeab 100644 * Architectures other than x86 cannot include the header file so define these * at here. These are needed for detecting type of client x86 CPUs behind a PECI * connection. -@@ -58,7 +58,6 @@ struct cpu_gen_info { + */ +-#define INTEL_FAM6_HASWELL_X 0x3F +-#define INTEL_FAM6_BROADWELL_X 0x4F +-#define INTEL_FAM6_SKYLAKE_X 0x55 ++#define INTEL_FAM6_HASWELL_X 0x3F ++#define INTEL_FAM6_BROADWELL_X 0x4F ++#define INTEL_FAM6_BROADWELL_XEON_D 0x56 ++#define INTEL_FAM6_SKYLAKE_X 0x55 + #endif + + #define CORE_MAX_ON_HSX 18 /* Max number of cores on Haswell */ +@@ -27,6 +28,10 @@ + #define CHAN_RANK_MAX_ON_BDX 4 /* Max number of channel ranks on Broadwell */ + #define DIMM_IDX_MAX_ON_BDX 3 /* Max DIMM index per channel on Broadwell */ + ++#define CORE_MAX_ON_XD 16 /* Max number of cores on Xeon D */ ++#define CHAN_RANK_MAX_ON_XD 2 /* Max number of channel ranks on Xeon D */ ++#define DIMM_IDX_MAX_ON_XD 2 /* Max DIMM index per channel on Xeon D */ ++ + #define CORE_MAX_ON_SKX 28 /* Max number of cores on Skylake */ + #define CHAN_RANK_MAX_ON_SKX 6 /* Max number of channel ranks on Skylake */ + #define DIMM_IDX_MAX_ON_SKX 2 /* Max DIMM index per channel on Skylake */ +@@ -58,7 +63,6 @@ struct cpu_gen_info { /** * struct peci_client_manager - PECI client manager information * @client; pointer to the PECI client @@ -3785,7 +4698,7 @@ index 8f6d823a59cd..1f1b07a9aeab 100644 * @name: PECI client manager name * @gen_info: CPU generation info of the detected CPU * -@@ -67,7 +66,6 @@ struct cpu_gen_info { +@@ -67,7 +71,6 @@ struct cpu_gen_info { */ struct peci_client_manager { struct peci_client *client; @@ -3793,6 +4706,35 @@ index 8f6d823a59cd..1f1b07a9aeab 100644 char name[PECI_NAME_SIZE]; const struct cpu_gen_info *gen_info; }; +@@ -93,18 +96,23 @@ peci_client_read_package_config(struct peci_client_manager *priv, + u8 index, u16 param, u8 *data) + { + struct peci_rd_pkg_cfg_msg msg; +- int rc; ++ int ret; + + msg.addr = priv->client->addr; + msg.index = index; + msg.param = param; + msg.rx_len = 4; + +- rc = peci_command(priv->client->adapter, PECI_CMD_RD_PKG_CFG, &msg); +- if (!rc) +- memcpy(data, msg.pkg_config, 4); ++ ret = peci_command(priv->client->adapter, PECI_CMD_RD_PKG_CFG, &msg); ++ if (ret) ++ return ret; ++ ++ if (msg.cc != PECI_DEV_CC_SUCCESS) ++ return -EAGAIN; ++ ++ memcpy(data, msg.pkg_config, 4); + +- return rc; ++ return 0; + } + + #endif /* __LINUX_MFD_INTEL_PECI_CLIENT_H */ diff --git a/include/linux/peci.h b/include/linux/peci.h index d0e47d45d1d0..6fc424dc2a73 100644 --- a/include/linux/peci.h @@ -3890,7 +4832,7 @@ index d0e47d45d1d0..6fc424dc2a73 100644 int peci_get_cpu_id(struct peci_adapter *adapter, u8 addr, u32 *cpu_id); diff --git a/include/uapi/linux/peci-ioctl.h b/include/uapi/linux/peci-ioctl.h -index a6dae71cbff5..8467b2fbee1f 100644 +index a6dae71cbff5..253fb42e38b7 100644 --- a/include/uapi/linux/peci-ioctl.h +++ b/include/uapi/linux/peci-ioctl.h @@ -1,5 +1,5 @@ @@ -3900,7 +4842,7 @@ index a6dae71cbff5..8467b2fbee1f 100644 #ifndef __PECI_IOCTL_H #define __PECI_IOCTL_H -@@ -7,136 +7,34 @@ +@@ -7,136 +7,35 @@ #include <linux/ioctl.h> #include <linux/types.h> @@ -3981,13 +4923,13 @@ index a6dae71cbff5..8467b2fbee1f 100644 -#define MBX_INDEX_DIMM_AMBIENT 19 -#define MBX_INDEX_DIMM_TEMP 24 +/* The PECI client's default address of 0x30 */ -+#define PECI_BASE_ADDR 0x30 ++#define PECI_BASE_ADDR 0x30 + +/* Max number of CPU clients */ -+#define PECI_OFFSET_MAX 8 ++#define PECI_OFFSET_MAX 8 + +/* PECI read/write data buffer size max */ -+#define PECI_BUFFER_SIZE 255 ++#define PECI_BUFFER_SIZE 255 /* Device Specific Completion Code (CC) Definition */ -#define DEV_PECI_CC_SUCCESS 0x40 @@ -3995,17 +4937,22 @@ index a6dae71cbff5..8467b2fbee1f 100644 -#define DEV_PECI_CC_OUT_OF_RESOURCE 0x81 -#define DEV_PECI_CC_UNAVAIL_RESOURCE 0x82 -#define DEV_PECI_CC_INVALID_REQ 0x90 -+#define PECI_DEV_CC_SUCCESS 0x40 -+#define PECI_DEV_CC_TIMEOUT 0x80 -+#define PECI_DEV_CC_OUT_OF_RESOURCE 0x81 -+#define PECI_DEV_CC_UNAVAIL_RESOURCE 0x82 -+#define PECI_DEV_CC_INVALID_REQ 0x90 ++#define PECI_DEV_CC_SUCCESS 0x40 ++#define PECI_DEV_CC_NEED_RETRY 0x80 ++#define PECI_DEV_CC_OUT_OF_RESOURCE 0x81 ++#define PECI_DEV_CC_UNAVAIL_RESOURCE 0x82 ++#define PECI_DEV_CC_INVALID_REQ 0x90 ++#define PECI_DEV_CC_MCA_ERROR 0x91 ++#define PECI_DEV_CC_CATASTROPHIC_MCA_ERROR 0x93 ++#define PECI_DEV_CC_FATAL_MCA_DETECTED 0x94 ++#define PECI_DEV_CC_PARITY_ERROR_ON_GPSB_OR_PMSB 0x98 ++#define PECI_DEV_CC_PARITY_ERROR_ON_GPSB_OR_PMSB_IERR 0x9B ++#define PECI_DEV_CC_PARITY_ERROR_ON_GPSB_OR_PMSB_MCA 0x9C /* Completion Code mask to check retry needs */ -#define DEV_PECI_CC_RETRY_CHECK_MASK 0xf0 -#define DEV_PECI_CC_NEED_RETRY 0x80 -+#define PECI_DEV_CC_RETRY_CHECK_MASK 0xf0 -+#define PECI_DEV_CC_NEED_RETRY 0x80 ++#define PECI_DEV_CC_RETRY_CHECK_MASK 0xf0 /* Skylake EDS says to retry for 250ms */ -#define DEV_PECI_RETRY_TIME_MS 250 @@ -4037,13 +4984,9 @@ index a6dae71cbff5..8467b2fbee1f 100644 -#define RDPCICFG_WRITE_LEN 6 -#define RDPCICFG_READ_LEN 5 -#define RDPCICFG_PECI_CMD 0x61 -+#define PECI_DEV_RETRY_TIME_MS 250 -+#define PECI_DEV_RETRY_INTERVAL_USEC 10000 -+#define PECI_DEV_RETRY_BIT 0x01 - +- -#define WRPCICFG_PECI_CMD 0x65 -+#define PECI_WRIAMSR_CMD 0xb5 - +- -#define RDPCICFGLOCAL_WRITE_LEN 5 -#define RDPCICFGLOCAL_READ_LEN_BASE 1 -#define RDPCICFGLOCAL_PECI_CMD 0xe1 @@ -4053,11 +4996,13 @@ index a6dae71cbff5..8467b2fbee1f 100644 -#define WRPCICFGLOCAL_PECI_CMD 0xe5 - -#define PECI_BUFFER_SIZE 32 -+#define PECI_WRPCICFG_CMD 0x65 ++#define PECI_DEV_RETRY_TIME_MS 250 ++#define PECI_DEV_RETRY_INTERVAL_USEC 10000 ++#define PECI_DEV_RETRY_BIT 0x01 /** * enum peci_cmd - PECI client commands -@@ -186,11 +84,12 @@ enum peci_cmd { +@@ -186,11 +85,12 @@ enum peci_cmd { * raw PECI transfer */ struct peci_xfer_msg { @@ -4075,7 +5020,7 @@ index a6dae71cbff5..8467b2fbee1f 100644 } __attribute__((__packed__)); /** -@@ -202,7 +101,8 @@ struct peci_xfer_msg { +@@ -202,7 +102,8 @@ struct peci_xfer_msg { * powered-off, etc. */ struct peci_ping_msg { @@ -4085,7 +5030,7 @@ index a6dae71cbff5..8467b2fbee1f 100644 } __attribute__((__packed__)); /** -@@ -216,8 +116,13 @@ struct peci_ping_msg { +@@ -216,8 +117,13 @@ struct peci_ping_msg { * command. */ struct peci_get_dib_msg { @@ -4101,7 +5046,7 @@ index a6dae71cbff5..8467b2fbee1f 100644 } __attribute__((__packed__)); /** -@@ -232,8 +137,14 @@ struct peci_get_dib_msg { +@@ -232,8 +138,13 @@ struct peci_get_dib_msg { * below the maximum processor junction temperature. */ struct peci_get_temp_msg { @@ -4112,13 +5057,20 @@ index a6dae71cbff5..8467b2fbee1f 100644 +#define PECI_GET_TEMP_CMD 0x01 + + __u8 addr; -+ __u8 padding0[3]; ++ __u8 padding; + __s16 temp_raw; -+ __u8 padding1[2]; } __attribute__((__packed__)); /** -@@ -251,11 +162,72 @@ struct peci_get_temp_msg { +@@ -242,6 +153,7 @@ struct peci_get_temp_msg { + * @index: encoding index for the requested service + * @param: specific data being requested + * @rx_len: number of data to be read in bytes ++ * @cc: completion code + * @pkg_config: package config data to be read + * + * The RdPkgConfig() command provides read access to the Package Configuration +@@ -251,11 +163,73 @@ struct peci_get_temp_msg { * DIMM temperatures and so on. */ struct peci_rd_pkg_cfg_msg { @@ -4191,12 +5143,21 @@ index a6dae71cbff5..8467b2fbee1f 100644 +#define PECI_PKG_ID_MACHINE_CHECK_STATUS 0x0005 /* Machine Check Status */ + + __u8 rx_len; -+ __u8 padding[3]; ++ __u8 cc; ++ __u8 padding[2]; + __u8 pkg_config[4]; } __attribute__((__packed__)); /** -@@ -272,11 +244,19 @@ struct peci_rd_pkg_cfg_msg { +@@ -264,6 +238,7 @@ struct peci_rd_pkg_cfg_msg { + * @index: encoding index for the requested service + * @param: specific data being requested + * @tx_len: number of data to be written in bytes ++ * @cc: completion code + * @value: package config data to be written + * + * The WrPkgConfig() command provides write access to the Package Configuration +@@ -272,11 +247,20 @@ struct peci_rd_pkg_cfg_msg { * may include power limiting, thermal averaging constant programming and so on. */ struct peci_wr_pkg_cfg_msg { @@ -4216,12 +5177,20 @@ index a6dae71cbff5..8467b2fbee1f 100644 + + __u16 param; + __u8 tx_len; -+ __u8 padding[3]; ++ __u8 cc; ++ __u8 padding[2]; + __u32 value; } __attribute__((__packed__)); /** -@@ -290,10 +270,34 @@ struct peci_wr_pkg_cfg_msg { +@@ -284,16 +268,47 @@ struct peci_wr_pkg_cfg_msg { + * @addr: address of the client + * @thread_id: ID of the specific logical processor + * @address: address of MSR to read from ++ * @cc: completion code + * @value: data to be read + * + * The RdIAMSR() PECI command provides read access to Model Specific Registers * (MSRs) defined in the processor's Intel Architecture (IA). */ struct peci_rd_ia_msr_msg { @@ -4236,6 +5205,8 @@ index a6dae71cbff5..8467b2fbee1f 100644 + __u8 addr; + __u8 thread_id; + __u16 address; ++ __u8 cc; ++ __u8 padding[3]; + __u64 value; +} __attribute__((__packed__)); + @@ -4245,22 +5216,34 @@ index a6dae71cbff5..8467b2fbee1f 100644 + * @thread_id: ID of the specific logical processor + * @address: address of MSR to write to + * @tx_len: number of data to be written in bytes ++ * @cc: completion code + * @value: data to be written + * + * The WrIAMSR() PECI command provides write access to Model Specific Registers + * (MSRs) defined in the processor's Intel Architecture (IA). + */ +struct peci_wr_ia_msr_msg { ++#define PECI_WRIAMSR_CMD 0xb5 ++ + __u8 addr; + __u8 thread_id; + __u16 address; + __u8 tx_len; -+ __u8 padding[3]; ++ __u8 cc; ++ __u8 padding[2]; + __u64 value; } __attribute__((__packed__)); /** -@@ -310,12 +314,52 @@ struct peci_rd_ia_msr_msg { +@@ -303,6 +318,7 @@ struct peci_rd_ia_msr_msg { + * @device: PCI device number + * @function: specific function to read from + * @reg: specific register to read from ++ * @cc: completion code + * @pci_config: config data to be read + * + * The RdPCIConfig() command provides sideband read access to the PCI +@@ -310,12 +326,56 @@ struct peci_rd_ia_msr_msg { * processor. */ struct peci_rd_pci_cfg_msg { @@ -4289,7 +5272,8 @@ index a6dae71cbff5..8467b2fbee1f 100644 + __u8 device; + __u8 function; + __u16 reg; -+ __u8 padding[2]; ++ __u8 cc; ++ __u8 padding[1]; + __u8 pci_config[4]; +} __attribute__((__packed__)); + @@ -4301,6 +5285,7 @@ index a6dae71cbff5..8467b2fbee1f 100644 + * @function: specific function to write to + * @reg: specific register to write to + * @tx_len: number of data to be written in bytes ++ * @cc: completion code + * @pci_config: config data to be written + * + * The RdPCIConfig() command provides sideband write access to the PCI @@ -4308,18 +5293,28 @@ index a6dae71cbff5..8467b2fbee1f 100644 + * processor. + */ +struct peci_wr_pci_cfg_msg { ++#define PECI_WRPCICFG_CMD 0x65 ++ + __u8 addr; + __u8 bus; + __u8 device; + __u8 function; + __u16 reg; + __u8 tx_len; -+ __u8 padding; ++ __u8 cc; + __u8 pci_config[4]; } __attribute__((__packed__)); /** -@@ -333,13 +377,18 @@ struct peci_rd_pci_cfg_msg { +@@ -326,6 +386,7 @@ struct peci_rd_pci_cfg_msg { + * @function: specific function to read from + * @reg: specific register to read from + * @rx_len: number of data to be read in bytes ++ * @cc: completion code + * @pci_config: config data to be read + * + * The RdPCIConfigLocal() command provides sideband read access to the PCI +@@ -333,13 +394,18 @@ struct peci_rd_pci_cfg_msg { * processor IIO and uncore registers within the PCI configuration space. */ struct peci_rd_pci_cfg_local_msg { @@ -4340,12 +5335,20 @@ index a6dae71cbff5..8467b2fbee1f 100644 + __u8 function; + __u16 reg; + __u8 rx_len; -+ __u8 padding[3]; ++ __u8 cc; + __u8 pci_config[4]; } __attribute__((__packed__)); /** -@@ -357,13 +406,18 @@ struct peci_rd_pci_cfg_local_msg { +@@ -350,6 +416,7 @@ struct peci_rd_pci_cfg_local_msg { + * @function: specific function to read from + * @reg: specific register to read from + * @tx_len: number of data to be written in bytes ++ * @cc: completion code + * @value: config data to be written + * + * The WrPCIConfigLocal() command provides sideband write access to the PCI +@@ -357,13 +424,18 @@ struct peci_rd_pci_cfg_local_msg { * access this space even before BIOS enumeration of the system buses. */ struct peci_wr_pci_cfg_local_msg { @@ -4366,12 +5369,12 @@ index a6dae71cbff5..8467b2fbee1f 100644 + __u8 function; + __u16 reg; + __u8 tx_len; -+ __u8 padding[3]; ++ __u8 cc; + __u32 value; } __attribute__((__packed__)); #define PECI_IOC_BASE 0xb7 -@@ -389,9 +443,15 @@ struct peci_wr_pci_cfg_local_msg { +@@ -389,9 +461,15 @@ struct peci_wr_pci_cfg_local_msg { #define PECI_IOC_RD_IA_MSR \ _IOWR(PECI_IOC_BASE, PECI_CMD_RD_IA_MSR, struct peci_rd_ia_msr_msg) diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch index e6dd44cd7..d1745ce5f 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch @@ -104,17 +104,14 @@ diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 768278b059c3..de2d5c6d186c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile -@@ -56,6 +56,7 @@ obj-$(CONFIG_CXL_BASE) += cxl/ +@@ -53,6 +53,7 @@ obj-$(CONFIG_GENWQE) += genwqe/ + obj-$(CONFIG_ECHO) += echo/ + obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o + obj-$(CONFIG_CXL_BASE) += cxl/ ++obj-$(CONFIG_ASPEED_LPC_SIO) += aspeed-lpc-sio.o obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o obj-$(CONFIG_ASPEED_LPC_MBOX) += aspeed-lpc-mbox.o -+obj-$(CONFIG_ASPEED_LPC_SIO) += aspeed-lpc-sio.o - obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o - obj-$(CONFIG_OCXL) += ocxl/ - obj-y += cardreader/ -diff --git a/drivers/misc/aspeed-lpc-sio.c b/drivers/misc/aspeed-lpc-sio.c -new file mode 100644 -index 000000000000..c717a3182320 --- /dev/null +++ b/drivers/misc/aspeed-lpc-sio.c @@ -0,0 +1,450 @@ diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch index 216c750de..303bff0b1 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch @@ -225,10 +225,10 @@ diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 7b018962cad3..89b051f82391 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile -@@ -53,6 +53,7 @@ obj-$(CONFIG_GENWQE) += genwqe/ - obj-$(CONFIG_ECHO) += echo/ +@@ -54,6 +54,7 @@ obj-$(CONFIG_ECHO) += echo/ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o obj-$(CONFIG_CXL_BASE) += cxl/ + obj-$(CONFIG_ASPEED_LPC_SIO) += aspeed-lpc-sio.o +obj-$(CONFIG_ASPEED_ESPI_SLAVE) += aspeed-espi-slave.o obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0026-Add-support-for-new-PECI-commands.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0026-Add-support-for-new-PECI-commands.patch index 922a45787..1532a5642 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0026-Add-support-for-new-PECI-commands.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0026-Add-support-for-new-PECI-commands.patch @@ -1,19 +1,19 @@ -From 23a7407c3f1bab7c01b93eeced4e137601ac1c94 Mon Sep 17 00:00:00 2001 +From d1d221aedb9b366e3477f253386b1cf829c56193 Mon Sep 17 00:00:00 2001 From: "Jason M. Bills" <jason.m.bills@intel.com> Date: Wed, 4 Apr 2018 13:52:39 -0700 Subject: [PATCH] Add support for new PECI commands Signed-off-by: Jason M. Bills <jason.m.bills@intel.com> --- - drivers/peci/peci-core.c | 223 ++++++++++++++++++++++++++++++++++++++++ - include/uapi/linux/peci-ioctl.h | 102 ++++++++++++++++++ - 2 files changed, 325 insertions(+) + drivers/peci/peci-core.c | 226 ++++++++++++++++++++++++++++++++++++++++ + include/uapi/linux/peci-ioctl.h | 104 ++++++++++++++++++ + 2 files changed, 330 insertions(+) diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c -index 14048a13ef8a..2f7e795158ce 100644 +index e282f9ef383b..9af11accc1d4 100644 --- a/drivers/peci/peci-core.c +++ b/drivers/peci/peci-core.c -@@ -344,6 +344,9 @@ static int peci_scan_cmd_mask(struct peci_adapter *adapter) +@@ -345,6 +345,9 @@ static int peci_scan_cmd_mask(struct peci_adapter *adapter) adapter->cmd_mask |= BIT(PECI_CMD_GET_TEMP); adapter->cmd_mask |= BIT(PECI_CMD_GET_DIB); adapter->cmd_mask |= BIT(PECI_CMD_PING); @@ -23,7 +23,7 @@ index 14048a13ef8a..2f7e795158ce 100644 out: peci_put_xfer_msg(msg); -@@ -686,6 +689,223 @@ static int peci_cmd_wr_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) +@@ -693,6 +696,226 @@ static int peci_cmd_wr_pci_cfg_local(struct peci_adapter *adapter, void *vmsg) return ret; } @@ -157,6 +157,7 @@ index 14048a13ef8a..2f7e795158ce 100644 + if (!ret) + memcpy(umsg->data, &msg->rx_buf[1], umsg->rx_len); + ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); + + return ret; @@ -197,6 +198,7 @@ index 14048a13ef8a..2f7e795158ce 100644 + if (!ret) + memcpy(umsg->data, &msg->rx_buf[1], umsg->rx_len); + ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); + + return ret; @@ -239,6 +241,7 @@ index 14048a13ef8a..2f7e795158ce 100644 + if (!ret) + memcpy(umsg->data, &msg->rx_buf[1], umsg->rx_len); + ++ umsg->cc = msg->rx_buf[0]; + peci_put_xfer_msg(msg); + + return ret; @@ -247,7 +250,7 @@ index 14048a13ef8a..2f7e795158ce 100644 typedef int (*peci_cmd_fn_type)(struct peci_adapter *, void *); static const peci_cmd_fn_type peci_cmd_fn[PECI_CMD_MAX] = { -@@ -701,6 +921,9 @@ static const peci_cmd_fn_type peci_cmd_fn[PECI_CMD_MAX] = { +@@ -708,6 +931,9 @@ static const peci_cmd_fn_type peci_cmd_fn[PECI_CMD_MAX] = { peci_cmd_wr_pci_cfg, peci_cmd_rd_pci_cfg_local, peci_cmd_wr_pci_cfg_local, @@ -258,10 +261,10 @@ index 14048a13ef8a..2f7e795158ce 100644 /** diff --git a/include/uapi/linux/peci-ioctl.h b/include/uapi/linux/peci-ioctl.h -index 8467b2fbee1f..090b02c4de49 100644 +index 4c28abe2c17a..e67b0735f606 100644 --- a/include/uapi/linux/peci-ioctl.h +++ b/include/uapi/linux/peci-ioctl.h -@@ -70,6 +70,9 @@ enum peci_cmd { +@@ -72,6 +72,9 @@ enum peci_cmd { PECI_CMD_WR_PCI_CFG, PECI_CMD_RD_PCI_CFG_LOCAL, PECI_CMD_WR_PCI_CFG_LOCAL, @@ -271,7 +274,7 @@ index 8467b2fbee1f..090b02c4de49 100644 PECI_CMD_MAX }; -@@ -420,6 +423,93 @@ struct peci_wr_pci_cfg_local_msg { +@@ -439,6 +442,95 @@ struct peci_wr_pci_cfg_local_msg { __u32 value; } __attribute__((__packed__)); @@ -311,7 +314,8 @@ index 8467b2fbee1f..090b02c4de49 100644 + } mmio; + } params; + __u8 rx_len; -+ __u8 padding[3]; ++ __u8 cc; ++ __u8 padding[2]; + __u8 data[8]; +} __attribute__((__packed__)); + @@ -333,8 +337,8 @@ index 8467b2fbee1f..090b02c4de49 100644 +#define PECI_CRASHDUMP_NUM_AGENTS 0x01 +#define PECI_CRASHDUMP_AGENT_DATA 0x02 + ++ __u8 cc; + __u8 param0; -+ __u8 padding; + __u16 param1; + __u8 param2; + __u8 rx_len; @@ -344,11 +348,11 @@ index 8467b2fbee1f..090b02c4de49 100644 +struct peci_crashdump_get_frame_msg { +#define PECI_CRASHDUMP_DISC_WRITE_LEN 9 +#define PECI_CRASHDUMP_DISC_READ_LEN_BASE 1 -+#define PECI_CRASHDUMP_DISC_VERSION 1 ++#define PECI_CRASHDUMP_DISC_VERSION 0 +#define PECI_CRASHDUMP_DISC_OPCODE 1 +#define PECI_CRASHDUMP_GET_FRAME_WRITE_LEN 10 +#define PECI_CRASHDUMP_GET_FRAME_READ_LEN_BASE 1 -+#define PECI_CRASHDUMP_GET_FRAME_VERSION 3 ++#define PECI_CRASHDUMP_GET_FRAME_VERSION 0 +#define PECI_CRASHDUMP_GET_FRAME_OPCODE 3 +#define PECI_CRASHDUMP_CMD 0x71 + @@ -358,14 +362,15 @@ index 8467b2fbee1f..090b02c4de49 100644 + __u16 param1; + __u16 param2; + __u8 rx_len; -+ __u8 padding1[3]; ++ __u8 cc; ++ __u8 padding1[2]; + __u8 data[16]; +} __attribute__((__packed__)); + #define PECI_IOC_BASE 0xb7 #define PECI_IOC_XFER \ -@@ -460,4 +550,16 @@ struct peci_wr_pci_cfg_local_msg { +@@ -479,4 +571,16 @@ struct peci_wr_pci_cfg_local_msg { _IOWR(PECI_IOC_BASE, PECI_CMD_WR_PCI_CFG_LOCAL, \ struct peci_wr_pci_cfg_local_msg) diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch index 89a667e95..56dca7345 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch @@ -1,1059 +1,14 @@ -From 409ea2cede8588a59badd5dd7cf8721879d4c68a Mon Sep 17 00:00:00 2001 -From: "Hunt, Bryan" <bryan.hunt@intel.com> -Date: Fri, 30 Mar 2018 10:48:01 -0700 -Subject: [PATCH] Add AST2500d JTAG driver +From 43470f186979483ba6c1e6374c7ea3a129622862 Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Mon, 1 Mar 2019 11:46:09 -0700 +Subject: [PATCH] Update AST2500d JTAG driver. Step 1 -Adding aspeed jtag driver +Update AST2500d JTAG driver. Remove Legacy driver but keep headers. -Signed-off-by: Hunt, Bryan <bryan.hunt@intel.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> --- - arch/arm/boot/dts/aspeed-g5.dtsi | 9 + - drivers/Kconfig | 1 + - drivers/Makefile | 1 + - drivers/jtag/Kconfig | 13 + - drivers/jtag/Makefile | 1 + - drivers/jtag/jtag_aspeed.c | 963 +++++++++++++++++++++++++++++++++++++++ - include/uapi/linux/jtag_drv.h | 73 +++ - 7 files changed, 1061 insertions(+) - create mode 100644 drivers/jtag/Kconfig - create mode 100644 drivers/jtag/Makefile - create mode 100644 drivers/jtag/jtag_aspeed.c create mode 100644 include/uapi/linux/jtag_drv.h -diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi -index 01d27e845982..adde826ac1d9 100644 ---- a/arch/arm/boot/dts/aspeed-g5.dtsi -+++ b/arch/arm/boot/dts/aspeed-g5.dtsi -@@ -367,6 +367,15 @@ - pinctrl-0 = <&pinctrl_espi_default>; - }; - -+ jtag: jtag@1e6e4000 { -+ compatible = "aspeed,ast2500-jtag"; -+ reg = <0x1e6e2004 0x4 0x1e6e4000 0x1c>; -+ clocks = <&syscon ASPEED_CLK_APB>; -+ resets = <&syscon ASPEED_RESET_JTAG_MASTER>; -+ interrupts = <43>; -+ status = "disabled"; -+ }; -+ - lpc: lpc@1e789000 { - compatible = "aspeed,ast2500-lpc", "simple-mfd"; - reg = <0x1e789000 0x1000>; -diff --git a/drivers/Kconfig b/drivers/Kconfig -index bbb66439a307..a1579d66f47d 100644 ---- a/drivers/Kconfig -+++ b/drivers/Kconfig -@@ -230,4 +230,5 @@ source "drivers/slimbus/Kconfig" - - source "drivers/peci/Kconfig" - -+source "drivers/jtag/Kconfig" - endmenu -diff --git a/drivers/Makefile b/drivers/Makefile -index 9ec44c032a42..69b201766154 100644 ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -187,3 +187,4 @@ obj-$(CONFIG_UNISYS_VISORBUS) += visorbus/ - obj-$(CONFIG_SIOX) += siox/ - obj-$(CONFIG_GNSS) += gnss/ - obj-$(CONFIG_PECI) += peci/ -+obj-$(CONFIG_JTAG_ASPEED) += jtag/ -diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig -new file mode 100644 -index 000000000000..2e5d0a5bea90 ---- /dev/null -+++ b/drivers/jtag/Kconfig -@@ -0,0 +1,13 @@ -+menuconfig JTAG_ASPEED -+ tristate "ASPEED SoC JTAG controller support" -+ depends on HAS_IOMEM -+ depends on ARCH_ASPEED || COMPILE_TEST -+ help -+ This provides a support for ASPEED JTAG device, equipped on -+ ASPEED SoC 24xx and 25xx families. Drivers allows programming -+ of hardware devices, connected to SoC through the JTAG interface. -+ -+ If you want this support, you should say Y here. -+ -+ To compile this driver as a module, choose M here: the module will -+ be called jtag_aspeed. -diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile -new file mode 100644 -index 000000000000..db9b660e9f90 ---- /dev/null -+++ b/drivers/jtag/Makefile -@@ -0,0 +1 @@ -+obj-$(CONFIG_JTAG_ASPEED) += jtag_aspeed.o -diff --git a/drivers/jtag/jtag_aspeed.c b/drivers/jtag/jtag_aspeed.c -new file mode 100644 -index 000000000000..42e2a131873c ---- /dev/null -+++ b/drivers/jtag/jtag_aspeed.c -@@ -0,0 +1,963 @@ -+// SPDX-License-Identifier: GPL-2.0 -+// Copyright (C) 2012-2017 ASPEED Technology Inc. -+// Copyright (c) 2018 Intel Corporation -+ -+#include <linux/bitfield.h> -+#include <linux/delay.h> -+#include <linux/fs.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/jtag_drv.h> -+#include <linux/miscdevice.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/platform_device.h> -+#include <linux/slab.h> -+#include <linux/uaccess.h> -+ -+#define SCU_RESET_JTAG BIT(22) -+ -+#define AST_JTAG_DATA 0x00 -+#define AST_JTAG_INST 0x04 -+#define AST_JTAG_CTRL 0x08 -+#define AST_JTAG_ISR 0x0C -+#define AST_JTAG_SW 0x10 -+#define AST_JTAG_TCK 0x14 -+#define AST_JTAG_IDLE 0x18 -+ -+/* AST_JTAG_CTRL - 0x08 : Engine Control */ -+#define JTAG_ENG_EN BIT(31) -+#define JTAG_ENG_OUT_EN BIT(30) -+#define JTAG_ENGINE_EN (JTAG_ENG_EN | JTAG_ENG_OUT_EN) -+#define JTAG_FORCE_TMS BIT(29) -+ -+#define JTAG_IR_UPDATE BIT(26) /* AST2500 only */ -+#define JTAG_INST_LEN_MASK GENMASK(25, 20) -+#define JTAG_LAST_INST BIT(17) -+#define JTAG_INST_EN BIT(16) -+#define JTAG_DATA_LEN_MASK GENMASK(9, 4) -+ -+#define JTAG_DR_UPDATE BIT(10) /* AST2500 only */ -+#define JTAG_LAST_DATA BIT(1) -+#define JTAG_DATA_EN BIT(0) -+ -+/* AST_JTAG_ISR - 0x0C : Interrupt status and enable */ -+#define JTAG_INST_PAUSE BIT(19) -+#define JTAG_INST_COMPLETE BIT(18) -+#define JTAG_DATA_PAUSE BIT(17) -+#define JTAG_DATA_COMPLETE BIT(16) -+ -+#define JTAG_INST_PAUSE_EN BIT(3) -+#define JTAG_INST_COMPLETE_EN BIT(2) -+#define JTAG_DATA_PAUSE_EN BIT(1) -+#define JTAG_DATA_COMPLETE_EN BIT(0) -+ -+/* AST_JTAG_SW - 0x10 : Software Mode and Status */ -+#define JTAG_SW_MODE_EN BIT(19) -+#define JTAG_SW_MODE_TCK BIT(18) -+#define JTAG_SW_MODE_TMS BIT(17) -+#define JTAG_SW_MODE_TDIO BIT(16) -+ -+/* AST_JTAG_TCK - 0x14 : TCK Control */ -+#define JTAG_TCK_DIVISOR_MASK GENMASK(10, 0) -+ -+/* #define USE_INTERRUPTS */ -+#define AST_JTAG_NAME "jtag" -+ -+static DEFINE_SPINLOCK(jtag_state_lock); -+ -+struct ast_jtag_info { -+ void __iomem *reg_base; -+ void __iomem *reg_base_scu; -+ int irq; -+ u32 flag; -+ wait_queue_head_t jtag_wq; -+ bool is_open; -+ struct device *dev; -+ struct miscdevice miscdev; -+}; -+ -+/* -+ * This structure represents a TMS cycle, as expressed in a set of bits and a -+ * count of bits (note: there are no start->end state transitions that require -+ * more than 1 byte of TMS cycles) -+ */ -+struct tms_cycle { -+ unsigned char tmsbits; -+ unsigned char count; -+}; -+ -+/* -+ * These are the string representations of the TAP states corresponding to the -+ * enums literals in JtagStateEncode -+ */ -+static const char * const c_statestr[] = {"TLR", "RTI", "SelDR", "CapDR", -+ "ShfDR", "Ex1DR", "PauDR", "Ex2DR", -+ "UpdDR", "SelIR", "CapIR", "ShfIR", -+ "Ex1IR", "PauIR", "Ex2IR", "UpdIR"}; -+ -+/* -+ * This is the complete set TMS cycles for going from any TAP state to any -+ * other TAP state, following a “shortest path” rule. -+ */ -+static const struct tms_cycle _tms_cycle_lookup[][16] = { -+/* TLR RTI SelDR CapDR SDR Ex1DR PDR Ex2DR UpdDR SelIR CapIR SIR Ex1IR PIR Ex2IR UpdIR*/ -+/* TLR */{ {0x00, 0}, {0x00, 1}, {0x02, 2}, {0x02, 3}, {0x02, 4}, {0x0a, 4}, {0x0a, 5}, {0x2a, 6}, {0x1a, 5}, {0x06, 3}, {0x06, 4}, {0x06, 5}, {0x16, 5}, {0x16, 6}, {0x56, 7}, {0x36, 6} }, -+/* RTI */{ {0x07, 3}, {0x00, 0}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, {0x05, 4}, {0x15, 5}, {0x0d, 4}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5} }, -+/* SelDR*/{ {0x03, 2}, {0x03, 3}, {0x00, 0}, {0x00, 1}, {0x00, 2}, {0x02, 2}, {0x02, 3}, {0x0a, 4}, {0x06, 3}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, {0x05, 4}, {0x15, 5}, {0x0d, 4} }, -+/* CapDR*/{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x00, 0}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, -+/* SDR */{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x00, 0}, {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, -+/* Ex1DR*/{ {0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x02, 3}, {0x00, 0}, {0x00, 1}, {0x02, 2}, {0x01, 1}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6} }, -+/* PDR */{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x01, 2}, {0x05, 3}, {0x00, 0}, {0x01, 1}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, -+/* Ex2DR*/{ {0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x00, 1}, {0x02, 2}, {0x02, 3}, {0x00, 0}, {0x01, 1}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6} }, -+/* UpdDR*/{ {0x07, 3}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, {0x05, 4}, {0x15, 5}, {0x00, 0}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5} }, -+/* SelIR*/{ {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x05, 4}, {0x05, 5}, {0x15, 5}, {0x15, 6}, {0x55, 7}, {0x35, 6}, {0x00, 0}, {0x00, 1}, {0x00, 2}, {0x02, 2}, {0x02, 3}, {0x0a, 4}, {0x06, 3} }, -+/* CapIR*/{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x00, 0}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2} }, -+/* SIR */{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x0f, 5}, {0x00, 0}, {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2} }, -+/* Ex1IR*/{ {0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5}, {0x07, 3}, {0x07, 4}, {0x02, 3}, {0x00, 0}, {0x00, 1}, {0x02, 2}, {0x01, 1} }, -+/* PIR */{ {0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x0f, 5}, {0x01, 2}, {0x05, 3}, {0x00, 0}, {0x01, 1}, {0x03, 2} }, -+/* Ex2IR*/{ {0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5}, {0x07, 3}, {0x07, 4}, {0x00, 1}, {0x02, 2}, {0x02, 3}, {0x00, 0}, {0x01, 1} }, -+/* UpdIR*/{ {0x07, 3}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, {0x05, 4}, {0x15, 5}, {0x0d, 4}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x00, 0} }, -+}; -+ -+static const char * const regnames[] = { -+ [AST_JTAG_DATA] = "AST_JTAG_DATA", -+ [AST_JTAG_INST] = "AST_JTAG_INST", -+ [AST_JTAG_CTRL] = "AST_JTAG_CTRL", -+ [AST_JTAG_ISR] = "AST_JTAG_ISR", -+ [AST_JTAG_SW] = "AST_JTAG_SW", -+ [AST_JTAG_TCK] = "AST_JTAG_TCK", -+ [AST_JTAG_IDLE] = "AST_JTAG_IDLE", -+}; -+ -+static inline u32 ast_jtag_read(struct ast_jtag_info *ast_jtag, u32 reg) -+{ -+ u32 val = readl(ast_jtag->reg_base + reg); -+ -+ dev_dbg(ast_jtag->dev, "read:%s val = 0x%08x\n", regnames[reg], val); -+ return val; -+} -+ -+static inline void ast_jtag_write(struct ast_jtag_info *ast_jtag, u32 val, -+ u32 reg) -+{ -+ dev_dbg(ast_jtag->dev, "write:%s val = 0x%08x\n", regnames[reg], val); -+ writel(val, ast_jtag->reg_base + reg); -+} -+ -+static void ast_jtag_set_tck(struct ast_jtag_info *ast_jtag, -+ enum xfer_mode mode, uint tck) -+{ -+ u32 read_value; -+ -+ if (tck == 0) -+ tck = 1; -+ else if (tck > JTAG_TCK_DIVISOR_MASK) -+ tck = JTAG_TCK_DIVISOR_MASK; -+ read_value = ast_jtag_read(ast_jtag, AST_JTAG_TCK); -+ ast_jtag_write(ast_jtag, -+ ((read_value & ~JTAG_TCK_DIVISOR_MASK) | tck), -+ AST_JTAG_TCK); -+} -+ -+static void ast_jtag_get_tck(struct ast_jtag_info *ast_jtag, -+ enum xfer_mode mode, uint *tck) -+{ -+ *tck = FIELD_GET(JTAG_TCK_DIVISOR_MASK, -+ ast_jtag_read(ast_jtag, AST_JTAG_TCK)); -+} -+ -+/* -+ * Used only in SW mode to walk the JTAG state machine. -+ */ -+static u8 tck_cycle(struct ast_jtag_info *ast_jtag, u8 TMS, u8 TDI, -+ bool do_read) -+{ -+ u8 result = 0; -+ u32 regwriteval = JTAG_SW_MODE_EN | (TMS * JTAG_SW_MODE_TMS) -+ | (TDI * JTAG_SW_MODE_TDIO); -+ -+ /* TCK = 0 */ -+ ast_jtag_write(ast_jtag, regwriteval, AST_JTAG_SW); -+ -+ ast_jtag_read(ast_jtag, AST_JTAG_SW); -+ -+ /* TCK = 1 */ -+ ast_jtag_write(ast_jtag, JTAG_SW_MODE_TCK | regwriteval, AST_JTAG_SW); -+ -+ if (do_read) { -+ result = (ast_jtag_read(ast_jtag, AST_JTAG_SW) -+ & JTAG_SW_MODE_TDIO) ? 1 : 0; -+ } -+ return result; -+} -+ -+#define WAIT_ITERATIONS 75 -+ -+static int ast_jtag_wait_instr_pause_complete(struct ast_jtag_info *ast_jtag) -+{ -+ int res = 0; -+#ifdef USE_INTERRUPTS -+ res = wait_event_interruptible(ast_jtag->jtag_wq, -+ (ast_jtag->flag == JTAG_INST_PAUSE)); -+ ast_jtag->flag = 0; -+#else -+ u32 status = 0; -+ u32 iterations = 0; -+ -+ while ((status & JTAG_INST_PAUSE) == 0) { -+ status = ast_jtag_read(ast_jtag, AST_JTAG_ISR); -+ dev_dbg(ast_jtag->dev, "%s = 0x%08x\n", __func__, status); -+ iterations++; -+ if (iterations > WAIT_ITERATIONS) { -+ dev_err(ast_jtag->dev, -+ "ast_jtag driver timed out waiting for instruction pause complete\n"); -+ res = -EFAULT; -+ break; -+ } -+ if ((status & JTAG_DATA_COMPLETE) == 0) { -+ if (iterations % 25 == 0) -+ usleep_range(1, 5); -+ else -+ udelay(1); -+ } -+ } -+ ast_jtag_write(ast_jtag, JTAG_INST_PAUSE | (status & 0xf), -+ AST_JTAG_ISR); -+#endif -+ return res; -+} -+ -+static int ast_jtag_wait_instr_complete(struct ast_jtag_info *ast_jtag) -+{ -+ int res = 0; -+#ifdef USE_INTERRUPTS -+ res = wait_event_interruptible(ast_jtag->jtag_wq, -+ (ast_jtag->flag == JTAG_INST_COMPLETE)); -+ ast_jtag->flag = 0; -+#else -+ u32 status = 0; -+ u32 iterations = 0; -+ -+ while ((status & JTAG_INST_COMPLETE) == 0) { -+ status = ast_jtag_read(ast_jtag, AST_JTAG_ISR); -+ dev_dbg(ast_jtag->dev, "%s = 0x%08x\n", __func__, status); -+ iterations++; -+ if (iterations > WAIT_ITERATIONS) { -+ dev_err(ast_jtag->dev, -+ "ast_jtag driver timed out waiting for instruction complete\n"); -+ res = -EFAULT; -+ break; -+ } -+ if ((status & JTAG_DATA_COMPLETE) == 0) { -+ if (iterations % 25 == 0) -+ usleep_range(1, 5); -+ else -+ udelay(1); -+ } -+ } -+ ast_jtag_write(ast_jtag, JTAG_INST_COMPLETE | (status & 0xf), -+ AST_JTAG_ISR); -+#endif -+ return res; -+} -+ -+static int ast_jtag_wait_data_pause_complete(struct ast_jtag_info *ast_jtag) -+{ -+ int res = 0; -+#ifdef USE_INTERRUPTS -+ res = wait_event_interruptible(ast_jtag->jtag_wq, -+ (ast_jtag->flag == JTAG_DATA_PAUSE)); -+ ast_jtag->flag = 0; -+#else -+ u32 status = 0; -+ u32 iterations = 0; -+ -+ while ((status & JTAG_DATA_PAUSE) == 0) { -+ status = ast_jtag_read(ast_jtag, AST_JTAG_ISR); -+ dev_dbg(ast_jtag->dev, "%s = 0x%08x\n", __func__, status); -+ iterations++; -+ if (iterations > WAIT_ITERATIONS) { -+ dev_err(ast_jtag->dev, -+ "ast_jtag driver timed out waiting for data pause complete\n"); -+ res = -EFAULT; -+ break; -+ } -+ if ((status & JTAG_DATA_COMPLETE) == 0) { -+ if (iterations % 25 == 0) -+ usleep_range(1, 5); -+ else -+ udelay(1); -+ } -+ } -+ ast_jtag_write(ast_jtag, JTAG_DATA_PAUSE | (status & 0xf), -+ AST_JTAG_ISR); -+#endif -+ return res; -+} -+ -+static int ast_jtag_wait_data_complete(struct ast_jtag_info *ast_jtag) -+{ -+ int res = 0; -+#ifdef USE_INTERRUPTS -+ res = wait_event_interruptible(ast_jtag->jtag_wq, -+ (ast_jtag->flag == JTAG_DATA_COMPLETE)); -+ ast_jtag->flag = 0; -+#else -+ u32 status = 0; -+ u32 iterations = 0; -+ -+ while ((status & JTAG_DATA_COMPLETE) == 0) { -+ status = ast_jtag_read(ast_jtag, AST_JTAG_ISR); -+ dev_dbg(ast_jtag->dev, "%s = 0x%08x\n", __func__, status); -+ iterations++; -+ if (iterations > WAIT_ITERATIONS) { -+ dev_err(ast_jtag->dev, -+ "ast_jtag driver timed out waiting for data complete\n"); -+ res = -EFAULT; -+ break; -+ } -+ if ((status & JTAG_DATA_COMPLETE) == 0) { -+ if (iterations % 25 == 0) -+ usleep_range(1, 5); -+ else -+ udelay(1); -+ } -+ } -+ ast_jtag_write(ast_jtag, -+ JTAG_DATA_COMPLETE | (status & 0xf), -+ AST_JTAG_ISR); -+#endif -+ return res; -+} -+ -+static void ast_jtag_bitbang(struct ast_jtag_info *ast_jtag, -+ struct tck_bitbang *bit_bang) -+{ -+ bit_bang->tdo = tck_cycle(ast_jtag, bit_bang->tms, bit_bang->tdi, true); -+} -+ -+static void reset_tap(struct ast_jtag_info *ast_jtag, enum xfer_mode mode) -+{ -+ unsigned char i; -+ -+ if (mode == SW_MODE) { -+ for (i = 0; i < 9; i++) -+ tck_cycle(ast_jtag, 1, 0, false); -+ } else { -+ ast_jtag_write(ast_jtag, 0, AST_JTAG_SW); -+ mdelay(1); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_FORCE_TMS, -+ AST_JTAG_CTRL); -+ mdelay(1); -+ ast_jtag_write(ast_jtag, -+ JTAG_SW_MODE_EN | JTAG_SW_MODE_TDIO, -+ AST_JTAG_SW); -+ } -+} -+ -+static int ast_jtag_set_tapstate(struct ast_jtag_info *ast_jtag, -+ enum xfer_mode mode, uint from, uint to) -+{ -+ unsigned char num_cycles; -+ unsigned char cycle; -+ unsigned char tms_bits; -+ -+ /* -+ * Ensure that the requested and current tap states are within -+ * 0 to 15. -+ */ -+ if (from >= ARRAY_SIZE(_tms_cycle_lookup[0]) || /* Column */ -+ to >= ARRAY_SIZE(_tms_cycle_lookup)) { /* row */ -+ return -1; -+ } -+ -+ dev_dbg(ast_jtag->dev, "Set TAP state: %s\n", c_statestr[to]); -+ -+ if (mode == SW_MODE) { -+ ast_jtag_write(ast_jtag, -+ JTAG_SW_MODE_EN | JTAG_SW_MODE_TDIO, -+ AST_JTAG_SW); -+ -+ if (to == jtag_tlr) { -+ reset_tap(ast_jtag, mode); -+ } else { -+ tms_bits = _tms_cycle_lookup[from][to].tmsbits; -+ num_cycles = _tms_cycle_lookup[from][to].count; -+ -+ if (num_cycles == 0) -+ return 0; -+ -+ for (cycle = 0; cycle < num_cycles; cycle++) { -+ tck_cycle(ast_jtag, (tms_bits & 1), 0, false); -+ tms_bits >>= 1; -+ } -+ } -+ } else if (to == jtag_tlr) { -+ reset_tap(ast_jtag, mode); -+ } -+ return 0; -+} -+ -+static void software_readwrite_scan(struct ast_jtag_info *ast_jtag, -+ struct scan_xfer *scan_xfer) -+{ -+ uint bit_index = 0; -+ bool is_IR = (scan_xfer->tap_state == jtag_shf_ir); -+ uint exit_tap_state = is_IR ? jtag_ex1_ir : jtag_ex1_dr; -+ unsigned char *tdi = scan_xfer->tdi; -+ unsigned char *tdo = scan_xfer->tdo; -+ -+ dev_dbg(ast_jtag->dev, "SW JTAG SHIFT %s, length = %d\n", -+ is_IR ? "IR" : "DR", scan_xfer->length); -+ -+ ast_jtag_write(ast_jtag, -+ JTAG_SW_MODE_EN | JTAG_SW_MODE_TDIO, -+ AST_JTAG_SW); -+ -+ while (bit_index < scan_xfer->length) { -+ int bit_offset = (bit_index % 8); -+ int this_input_bit = 0; -+ int tms_high_or_low; -+ int this_output_bit; -+ -+ if (bit_index / 8 < scan_xfer->tdi_bytes) { -+ /* -+ * If we are on a byte boundary, increment the byte -+ * pointers. Don't increment on 0, pointer is already -+ * on the first byte. -+ */ -+ if (bit_index % 8 == 0 && bit_index != 0) -+ tdi++; -+ this_input_bit = (*tdi >> bit_offset) & 1; -+ } -+ /* If this is the last bit, leave TMS high */ -+ tms_high_or_low = (bit_index == scan_xfer->length - 1) && -+ (scan_xfer->end_tap_state != jtag_shf_dr) && -+ (scan_xfer->end_tap_state != jtag_shf_ir); -+ this_output_bit = tck_cycle(ast_jtag, tms_high_or_low, -+ this_input_bit, !!tdo); -+ /* -+ * If it was the last bit in the scan and the end_tap_state is -+ * something other than shiftDR or shiftIR then go to Exit1. -+ * IMPORTANT Note: if the end_tap_state is ShiftIR/DR and -+ * the next call to this function is a shiftDR/IR then the -+ * driver will not change state! -+ */ -+ if (tms_high_or_low) -+ scan_xfer->tap_state = exit_tap_state; -+ if (tdo && bit_index / 8 < scan_xfer->tdo_bytes) { -+ if (bit_index % 8 == 0) { -+ if (bit_index != 0) -+ tdo++; -+ *tdo = 0; -+ } -+ *tdo |= this_output_bit << bit_offset; -+ } -+ bit_index++; -+ } -+ ast_jtag_set_tapstate(ast_jtag, scan_xfer->mode, scan_xfer->tap_state, -+ scan_xfer->end_tap_state); -+} -+ -+static int fire_ir_command(struct ast_jtag_info *ast_jtag, bool last, -+ u32 length) -+{ -+ int res; -+ -+ if (last) { -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_LAST_INST -+ | FIELD_PREP(JTAG_INST_LEN_MASK, length), -+ AST_JTAG_CTRL); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_LAST_INST -+ | FIELD_PREP(JTAG_INST_LEN_MASK, length) -+ | JTAG_INST_EN, -+ AST_JTAG_CTRL); -+ res = ast_jtag_wait_instr_complete(ast_jtag); -+ } else { -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_IR_UPDATE -+ | FIELD_PREP(JTAG_INST_LEN_MASK, length), -+ AST_JTAG_CTRL); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_IR_UPDATE -+ | FIELD_PREP(JTAG_INST_LEN_MASK, length) -+ | JTAG_INST_EN, -+ AST_JTAG_CTRL); -+ res = ast_jtag_wait_instr_pause_complete(ast_jtag); -+ } -+ return res; -+} -+ -+static int fire_dr_command(struct ast_jtag_info *ast_jtag, bool last, -+ u32 length) -+{ -+ int res; -+ -+ if (last) { -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_LAST_DATA -+ | FIELD_PREP(JTAG_DATA_LEN_MASK, length), -+ AST_JTAG_CTRL); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_LAST_DATA -+ | FIELD_PREP(JTAG_DATA_LEN_MASK, length) -+ | JTAG_DATA_EN, -+ AST_JTAG_CTRL); -+ res = ast_jtag_wait_data_complete(ast_jtag); -+ } else { -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_DR_UPDATE -+ | FIELD_PREP(JTAG_DATA_LEN_MASK, length), -+ AST_JTAG_CTRL); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN | JTAG_DR_UPDATE -+ | FIELD_PREP(JTAG_DATA_LEN_MASK, length) -+ | JTAG_DATA_EN, -+ AST_JTAG_CTRL); -+ res = ast_jtag_wait_data_pause_complete(ast_jtag); -+ } -+ return res; -+} -+ -+static int hardware_readwrite_scan(struct ast_jtag_info *ast_jtag, -+ struct scan_xfer *scan_xfer) -+{ -+ int res = 0; -+ u32 bits_received = 0; -+ u32 bits_to_send = 0; -+ u32 chunk_len = 0; -+ bool is_IR = (scan_xfer->tap_state == jtag_shf_ir); -+ bool is_last = false; -+ u32 length = scan_xfer->length; -+ u32 *tdi = (u32 *)scan_xfer->tdi; -+ u32 *tdo = (u32 *)scan_xfer->tdo; -+ u32 remaining_bytes; -+ int scan_end = 0; -+ u32 ast_reg = is_IR ? AST_JTAG_INST : AST_JTAG_DATA; -+ -+ dev_dbg(ast_jtag->dev, "HW JTAG SHIFT %s, length = %d\n", -+ is_IR ? "IR" : "DR", length); -+ -+ ast_jtag_write(ast_jtag, 0, AST_JTAG_SW); -+ if (scan_xfer->end_tap_state == jtag_pau_dr || -+ scan_xfer->end_tap_state == jtag_pau_ir || -+ scan_xfer->end_tap_state == jtag_shf_dr || -+ scan_xfer->end_tap_state == jtag_shf_ir) { -+ scan_end = 0; -+ } else { -+ scan_end = 1; -+ } -+ -+ while (length > 0) { -+ chunk_len = (length > 32) ? 32 : length; -+ -+ if (length <= 32 && scan_end == 1) -+ is_last = true; -+ -+ dev_dbg(ast_jtag->dev, "HW SHIFT, length=%d, scan_end=%d, chunk_len=%d, is_last=%d\n", -+ length, scan_end, chunk_len, is_last); -+ -+ remaining_bytes = (scan_xfer->length - length) / 8; -+ if (tdi && remaining_bytes < scan_xfer->tdi_bytes) { -+ bits_to_send = *tdi++; -+ ast_jtag_write(ast_jtag, bits_to_send, ast_reg); -+ } else { -+ bits_to_send = 0; -+ ast_jtag_write(ast_jtag, 0, ast_reg); -+ } -+ -+ dev_dbg(ast_jtag->dev, "HW SHIFT, len=%d chunk_len=%d is_last=%x bits_to_send=%x\n", -+ length, chunk_len, is_last, bits_to_send); -+ -+ if (is_IR) -+ res = fire_ir_command(ast_jtag, is_last, chunk_len); -+ else -+ res = fire_dr_command(ast_jtag, is_last, chunk_len); -+ if (res != 0) -+ break; -+ -+ if (tdo) { -+ bits_received = ast_jtag_read(ast_jtag, ast_reg); -+ bits_received >>= (32 - chunk_len); -+ *tdo++ = bits_received; -+ } -+ dev_dbg(ast_jtag->dev, -+ "HW SHIFT, len=%d chunk_len=%d is_last=%x bits_received=%x\n", -+ length, chunk_len, is_last, -+ bits_received); -+ length -= chunk_len; -+ } -+ return res; -+} -+ -+static int ast_jtag_readwrite_scan(struct ast_jtag_info *ast_jtag, -+ struct scan_xfer *scan_xfer) -+{ -+ int res = 0; -+ -+ if (scan_xfer->tap_state != jtag_shf_dr && -+ scan_xfer->tap_state != jtag_shf_ir) { -+ if (scan_xfer->tap_state < ARRAY_SIZE(c_statestr)) -+ dev_err(ast_jtag->dev, -+ "readwrite_scan bad current tap state = %s\n", -+ c_statestr[scan_xfer->tap_state]); -+ else -+ dev_err(ast_jtag->dev, -+ "readwrite_scan bad current tap state = %u\n", -+ scan_xfer->tap_state); -+ return -EFAULT; -+ } -+ -+ if (scan_xfer->length == 0) { -+ dev_err(ast_jtag->dev, "readwrite_scan bad length 0\n"); -+ return -EFAULT; -+ } -+ -+ if (!scan_xfer->tdi && scan_xfer->tdi_bytes != 0) { -+ dev_err(ast_jtag->dev, -+ "readwrite_scan null tdi with non-zero length %u!\n", -+ scan_xfer->tdi_bytes); -+ return -EFAULT; -+ } -+ -+ if (!scan_xfer->tdo && scan_xfer->tdo_bytes != 0) { -+ dev_err(ast_jtag->dev, -+ "readwrite_scan null tdo with non-zero length %u!\n", -+ scan_xfer->tdo_bytes); -+ return -EFAULT; -+ } -+ -+ if (!scan_xfer->tdi && !scan_xfer->tdo) { -+ dev_err(ast_jtag->dev, "readwrite_scan null tdo and tdi!\n"); -+ return -EFAULT; -+ } -+ -+ if (scan_xfer->mode == SW_MODE) -+ software_readwrite_scan(ast_jtag, scan_xfer); -+ else -+ res = hardware_readwrite_scan(ast_jtag, scan_xfer); -+ return res; -+} -+ -+#ifdef USE_INTERRUPTS -+static irqreturn_t ast_jtag_interrupt(int this_irq, void *dev_id) -+{ -+ u32 status; -+ struct ast_jtag_info *ast_jtag = dev_id; -+ -+ status = ast_jtag_read(ast_jtag, AST_JTAG_ISR); -+ -+ if (status & JTAG_INST_PAUSE) { -+ ast_jtag_write(ast_jtag, -+ JTAG_INST_PAUSE | (status & 0xf), -+ AST_JTAG_ISR); -+ ast_jtag->flag = JTAG_INST_PAUSE; -+ } -+ -+ if (status & JTAG_INST_COMPLETE) { -+ ast_jtag_write(ast_jtag, -+ JTAG_INST_COMPLETE | (status & 0xf), -+ AST_JTAG_ISR); -+ ast_jtag->flag = JTAG_INST_COMPLETE; -+ } -+ -+ if (status & JTAG_DATA_PAUSE) { -+ ast_jtag_write(ast_jtag, -+ JTAG_DATA_PAUSE | (status & 0xf), AST_JTAG_ISR); -+ ast_jtag->flag = JTAG_DATA_PAUSE; -+ } -+ -+ if (status & JTAG_DATA_COMPLETE) { -+ ast_jtag_write(ast_jtag, -+ JTAG_DATA_COMPLETE | (status & 0xf), -+ AST_JTAG_ISR); -+ ast_jtag->flag = JTAG_DATA_COMPLETE; -+ } -+ -+ if (ast_jtag->flag) { -+ wake_up_interruptible(&ast_jtag->jtag_wq); -+ return IRQ_HANDLED; -+ } else { -+ return IRQ_NONE; -+ } -+} -+#endif -+ -+static inline void ast_jtag_slave(struct ast_jtag_info *ast_jtag) -+{ -+ u32 currReg = readl((void *)(ast_jtag->reg_base_scu)); -+ -+ writel(currReg | SCU_RESET_JTAG, (void *)ast_jtag->reg_base_scu); -+} -+ -+static inline void ast_jtag_master(struct ast_jtag_info *ast_jtag) -+{ -+ u32 currReg = readl((void *)(ast_jtag->reg_base_scu)); -+ -+ writel(currReg & ~SCU_RESET_JTAG, (void *)ast_jtag->reg_base_scu); -+ ast_jtag_write(ast_jtag, JTAG_ENGINE_EN, AST_JTAG_CTRL); -+ ast_jtag_write(ast_jtag, JTAG_SW_MODE_EN | JTAG_SW_MODE_TDIO, -+ AST_JTAG_SW); -+ ast_jtag_write(ast_jtag, JTAG_INST_PAUSE | JTAG_INST_COMPLETE | -+ JTAG_DATA_PAUSE | JTAG_DATA_COMPLETE | -+ JTAG_INST_PAUSE_EN | JTAG_INST_COMPLETE_EN | -+ JTAG_DATA_PAUSE_EN | JTAG_DATA_COMPLETE_EN, -+ AST_JTAG_ISR); /* Enable Interrupt */ -+} -+ -+static long jtag_ioctl(struct file *file, uint cmd, ulong arg) -+{ -+ int ret = 0; -+ struct ast_jtag_info *ast_jtag = file->private_data; -+ void __user *argp = (void __user *)arg; -+ struct tck_bitbang bitbang; -+ struct scan_xfer xfer; -+ struct set_tck_param set_tck_param; -+ struct get_tck_param get_tck_param; -+ struct tap_state_param tap_state_param; -+ unsigned char *kern_tdi = NULL; -+ unsigned char *kern_tdo = NULL; -+ unsigned char *user_tdi; -+ unsigned char *user_tdo; -+ -+ switch (cmd) { -+ case AST_JTAG_SET_TCK: -+ if (copy_from_user(&set_tck_param, argp, -+ sizeof(struct set_tck_param))) { -+ ret = -EFAULT; -+ } else { -+ ast_jtag_set_tck(ast_jtag, -+ set_tck_param.mode, -+ set_tck_param.tck); -+ } -+ break; -+ case AST_JTAG_GET_TCK: -+ if (copy_from_user(&get_tck_param, argp, -+ sizeof(struct get_tck_param))) -+ ret = -EFAULT; -+ else -+ ast_jtag_get_tck(ast_jtag, -+ get_tck_param.mode, -+ &get_tck_param.tck); -+ if (copy_to_user(argp, &get_tck_param, -+ sizeof(struct get_tck_param))) -+ ret = -EFAULT; -+ break; -+ case AST_JTAG_BITBANG: -+ if (copy_from_user(&bitbang, argp, -+ sizeof(struct tck_bitbang))) { -+ ret = -EFAULT; -+ } else { -+ if (bitbang.tms > 1 || bitbang.tdi > 1) -+ ret = -EFAULT; -+ else -+ ast_jtag_bitbang(ast_jtag, &bitbang); -+ } -+ if (copy_to_user(argp, &bitbang, sizeof(struct tck_bitbang))) -+ ret = -EFAULT; -+ break; -+ case AST_JTAG_SET_TAPSTATE: -+ if (copy_from_user(&tap_state_param, argp, -+ sizeof(struct tap_state_param))) -+ ret = -EFAULT; -+ else -+ ast_jtag_set_tapstate(ast_jtag, tap_state_param.mode, -+ tap_state_param.from_state, -+ tap_state_param.to_state); -+ break; -+ case AST_JTAG_READWRITESCAN: -+ if (copy_from_user(&xfer, argp, -+ sizeof(struct scan_xfer))) { -+ ret = -EFAULT; -+ } else { -+ if (xfer.tdi) { -+ user_tdi = xfer.tdi; -+ kern_tdi = memdup_user(user_tdi, -+ xfer.tdi_bytes); -+ if (IS_ERR(kern_tdi)) -+ ret = -EFAULT; -+ else -+ xfer.tdi = kern_tdi; -+ } -+ -+ if (ret == 0 && xfer.tdo) { -+ user_tdo = xfer.tdo; -+ kern_tdo = memdup_user(user_tdo, -+ xfer.tdo_bytes); -+ if (IS_ERR(kern_tdo)) -+ ret = -EFAULT; -+ else -+ xfer.tdo = kern_tdo; -+ } -+ -+ if (ret == 0) -+ ret = ast_jtag_readwrite_scan(ast_jtag, &xfer); -+ -+ kfree(kern_tdi); -+ if (kern_tdo) { -+ if (ret == 0) { -+ if (copy_to_user(user_tdo, -+ xfer.tdo, -+ xfer.tdo_bytes)) -+ ret = -EFAULT; -+ } -+ kfree(kern_tdo); -+ } -+ } -+ break; -+ default: -+ return -ENOTTY; -+ } -+ -+ return ret; -+} -+ -+static int jtag_open(struct inode *inode, struct file *file) -+{ -+ struct ast_jtag_info *ast_jtag = container_of(file->private_data, -+ struct ast_jtag_info, -+ miscdev); -+ -+ spin_lock(&jtag_state_lock); -+ if (ast_jtag->is_open) { -+ spin_unlock(&jtag_state_lock); -+ return -EBUSY; -+ } -+ -+ ast_jtag->is_open = true; -+ file->private_data = ast_jtag; -+ ast_jtag_master(ast_jtag); -+ spin_unlock(&jtag_state_lock); -+ -+ return 0; -+} -+ -+static int jtag_release(struct inode *inode, struct file *file) -+{ -+ struct ast_jtag_info *ast_jtag = file->private_data; -+ -+ spin_lock(&jtag_state_lock); -+ ast_jtag_slave(ast_jtag); -+ ast_jtag->is_open = false; -+ -+ spin_unlock(&jtag_state_lock); -+ -+ return 0; -+} -+ -+static const struct file_operations ast_jtag_fops = { -+ .owner = THIS_MODULE, -+ .unlocked_ioctl = jtag_ioctl, -+ .open = jtag_open, -+ .release = jtag_release, -+}; -+ -+static int ast_jtag_probe(struct platform_device *pdev) -+{ -+ struct resource *scu_res; -+ struct resource *jtag_res; -+ int ret = 0; -+ struct ast_jtag_info *ast_jtag; -+ -+ dev_dbg(&pdev->dev, "%s started\n", __func__); -+ -+ scu_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!scu_res) { -+ dev_err(&pdev->dev, "cannot get IORESOURCE_MEM for SCU\n"); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ jtag_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ if (!jtag_res) { -+ dev_err(&pdev->dev, "cannot get IORESOURCE_MEM for JTAG\n"); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ ast_jtag = devm_kzalloc(&pdev->dev, sizeof(*ast_jtag), GFP_KERNEL); -+ if (!ast_jtag) -+ return -ENOMEM; -+ -+ ast_jtag->reg_base_scu = devm_ioremap_resource(&pdev->dev, scu_res); -+ if (!ast_jtag->reg_base_scu) { -+ ret = -EIO; -+ goto out; -+ } -+ -+ ast_jtag->reg_base = devm_ioremap_resource(&pdev->dev, jtag_res); -+ if (!ast_jtag->reg_base) { -+ ret = -EIO; -+ goto out; -+ } -+ -+ ast_jtag->dev = &pdev->dev; -+ -+#ifdef USE_INTERRUPTS -+ ast_jtag->irq = platform_get_irq(pdev, 0); -+ if (ast_jtag->irq < 0) { -+ dev_err(&pdev->dev, "no irq specified.\n"); -+ ret = -ENOENT; -+ goto out; -+ } -+ -+ ret = devm_request_irq(&pdev->dev, ast_jtag->irq, ast_jtag_interrupt, -+ IRQF_SHARED, "ast-jtag", ast_jtag); -+ if (ret) { -+ dev_err(ast_jtag->dev, "JTAG Unable to get IRQ.\n"); -+ goto out; -+ } -+#endif -+ -+ ast_jtag->flag = 0; -+ init_waitqueue_head(&ast_jtag->jtag_wq); -+ -+ ast_jtag->miscdev.minor = MISC_DYNAMIC_MINOR, -+ ast_jtag->miscdev.name = AST_JTAG_NAME, -+ ast_jtag->miscdev.fops = &ast_jtag_fops, -+ ast_jtag->miscdev.parent = &pdev->dev; -+ ret = misc_register(&ast_jtag->miscdev); -+ if (ret) { -+ dev_err(ast_jtag->dev, "Unable to register misc device.\n"); -+ goto out; -+ } -+ -+ platform_set_drvdata(pdev, ast_jtag); -+ -+ ast_jtag_slave(ast_jtag); -+ -+ dev_dbg(&pdev->dev, "%s completed\n", __func__); -+ return 0; -+ -+out: -+ dev_warn(&pdev->dev, "ast_jtag: driver init failed (ret=%d).\n", ret); -+ return ret; -+} -+ -+static int ast_jtag_remove(struct platform_device *pdev) -+{ -+ dev_dbg(&pdev->dev, "%s\n", __func__); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ dev_dbg(&pdev->dev, "JTAG driver removed successfully.\n"); -+ -+ return 0; -+} -+ -+static const struct of_device_id ast_jtag_of_match[] = { -+ { .compatible = "aspeed,ast2400-jtag", }, -+ { .compatible = "aspeed,ast2500-jtag", }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, ast_jtag_of_match); -+ -+static struct platform_driver ast_jtag_driver = { -+ .probe = ast_jtag_probe, -+ .remove = ast_jtag_remove, -+ .driver = { -+ .name = AST_JTAG_NAME, -+ .of_match_table = of_match_ptr(ast_jtag_of_match), -+ }, -+}; -+module_platform_driver(ast_jtag_driver); -+ -+MODULE_AUTHOR("Ryan Chen <ryan_chen@aspeedtech.com>"); -+MODULE_AUTHOR("Bryan Hunt <bryan.hunt@intel.com>"); -+MODULE_DESCRIPTION("ASPEED JTAG driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/include/uapi/linux/jtag_drv.h b/include/uapi/linux/jtag_drv.h new file mode 100644 index 000000000000..4df638f8fa43 diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0029-i2c-aspeed-Improve-driver-to-support-multi-master-us.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0029-i2c-aspeed-Improve-driver-to-support-multi-master-us.patch deleted file mode 100644 index e2dee0d5b..000000000 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0029-i2c-aspeed-Improve-driver-to-support-multi-master-us.patch +++ /dev/null @@ -1,291 +0,0 @@ -From a7ad8d09cdf0ec86612df0714d3e69ee92e6140b Mon Sep 17 00:00:00 2001 -From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Date: Tue, 20 Nov 2018 09:30:17 -0800 -Subject: [PATCH] i2c: aspeed: Improve driver to support multi-master use cases - stably - -In multi-master environment, this driver's master cannot know -exactly when peer master sends data to this driver's slave so -cases can be happened that this master tries to send data through -the master_xfer function but slave data from a peer master is still -being processed or slave xfer is started by a peer very after it -queues a master command. - -To prevent state corruption in these cases, this patch adds the -'pending' state of master and its handling code so that the pending -master xfer can be continued after slave mode session. - -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> ---- - drivers/i2c/busses/i2c-aspeed.c | 119 ++++++++++++++++++++++++++++++---------- - 1 file changed, 91 insertions(+), 28 deletions(-) - -diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c -index 8dc9161ced38..d11b2ea97259 100644 ---- a/drivers/i2c/busses/i2c-aspeed.c -+++ b/drivers/i2c/busses/i2c-aspeed.c -@@ -117,6 +117,7 @@ - - enum aspeed_i2c_master_state { - ASPEED_I2C_MASTER_INACTIVE, -+ ASPEED_I2C_MASTER_PENDING, - ASPEED_I2C_MASTER_START, - ASPEED_I2C_MASTER_TX_FIRST, - ASPEED_I2C_MASTER_TX, -@@ -126,12 +127,13 @@ enum aspeed_i2c_master_state { - }; - - enum aspeed_i2c_slave_state { -- ASPEED_I2C_SLAVE_STOP, -+ ASPEED_I2C_SLAVE_INACTIVE, - ASPEED_I2C_SLAVE_START, - ASPEED_I2C_SLAVE_READ_REQUESTED, - ASPEED_I2C_SLAVE_READ_PROCESSED, - ASPEED_I2C_SLAVE_WRITE_REQUESTED, - ASPEED_I2C_SLAVE_WRITE_RECEIVED, -+ ASPEED_I2C_SLAVE_STOP, - }; - - struct aspeed_i2c_bus { -@@ -156,6 +158,8 @@ struct aspeed_i2c_bus { - int cmd_err; - /* Protected only by i2c_lock_bus */ - int master_xfer_result; -+ /* Multi-master */ -+ bool multi_master; - #if IS_ENABLED(CONFIG_I2C_SLAVE) - struct i2c_client *slave; - enum aspeed_i2c_slave_state slave_state; -@@ -251,7 +255,7 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - } - - /* Slave is not currently active, irq was for someone else. */ -- if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) -+ if (bus->slave_state == ASPEED_I2C_SLAVE_INACTIVE) - return irq_handled; - - dev_dbg(bus->dev, "slave irq status 0x%08x, cmd 0x%08x\n", -@@ -277,16 +281,15 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - irq_handled |= ASPEED_I2CD_INTR_NORMAL_STOP; - bus->slave_state = ASPEED_I2C_SLAVE_STOP; - } -- if (irq_status & ASPEED_I2CD_INTR_TX_NAK) { -+ if (irq_status & ASPEED_I2CD_INTR_TX_NAK && -+ bus->slave_state == ASPEED_I2C_SLAVE_READ_PROCESSED) { - irq_handled |= ASPEED_I2CD_INTR_TX_NAK; - bus->slave_state = ASPEED_I2C_SLAVE_STOP; - } -- if (irq_status & ASPEED_I2CD_INTR_TX_ACK) -- irq_handled |= ASPEED_I2CD_INTR_TX_ACK; - - switch (bus->slave_state) { - case ASPEED_I2C_SLAVE_READ_REQUESTED: -- if (irq_status & ASPEED_I2CD_INTR_TX_ACK) -+ if (unlikely(irq_status & ASPEED_I2CD_INTR_TX_ACK)) - dev_err(bus->dev, "Unexpected ACK on read request.\n"); - bus->slave_state = ASPEED_I2C_SLAVE_READ_PROCESSED; - i2c_slave_event(slave, I2C_SLAVE_READ_REQUESTED, &value); -@@ -294,9 +297,12 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG); - break; - case ASPEED_I2C_SLAVE_READ_PROCESSED: -- if (!(irq_status & ASPEED_I2CD_INTR_TX_ACK)) -+ if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) { - dev_err(bus->dev, - "Expected ACK after processed read.\n"); -+ break; -+ } -+ irq_handled |= ASPEED_I2CD_INTR_TX_ACK; - i2c_slave_event(slave, I2C_SLAVE_READ_PROCESSED, &value); - writel(value, bus->base + ASPEED_I2C_BYTE_BUF_REG); - writel(ASPEED_I2CD_S_TX_CMD, bus->base + ASPEED_I2C_CMD_REG); -@@ -310,10 +316,15 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - break; - case ASPEED_I2C_SLAVE_STOP: - i2c_slave_event(slave, I2C_SLAVE_STOP, &value); -+ bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE; -+ break; -+ case ASPEED_I2C_SLAVE_START: -+ /* Slave was just started. Waiting for the next event. */; - break; - default: -- dev_err(bus->dev, "unhandled slave_state: %d\n", -+ dev_err(bus->dev, "unknown slave_state: %d\n", - bus->slave_state); -+ bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE; - break; - } - -@@ -328,7 +339,17 @@ static void aspeed_i2c_do_start(struct aspeed_i2c_bus *bus) - struct i2c_msg *msg = &bus->msgs[bus->msgs_index]; - u8 slave_addr = i2c_8bit_addr_from_msg(msg); - -- bus->master_state = ASPEED_I2C_MASTER_START; -+#if IS_ENABLED(CONFIG_I2C_SLAVE) -+ /* -+ * If it's requested in the middle of a slave session, set the master -+ * state to 'pending' then H/W will continue handling this master -+ * command when the bus comes back to idle state. -+ */ -+ if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE) -+ bus->master_state = ASPEED_I2C_MASTER_PENDING; -+ else -+#endif /* CONFIG_I2C_SLAVE */ -+ bus->master_state = ASPEED_I2C_MASTER_START; - bus->buf_index = 0; - - if (msg->flags & I2C_M_RD) { -@@ -384,10 +405,6 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - bus->master_state = ASPEED_I2C_MASTER_INACTIVE; - irq_handled |= ASPEED_I2CD_INTR_BUS_RECOVER_DONE; - goto out_complete; -- } else { -- /* Master is not currently active, irq was for someone else. */ -- if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE) -- goto out_no_complete; - } - - /* -@@ -399,12 +416,33 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - if (ret) { - dev_dbg(bus->dev, "received error interrupt: 0x%08x\n", - irq_status); -- bus->cmd_err = ret; -- bus->master_state = ASPEED_I2C_MASTER_INACTIVE; - irq_handled |= (irq_status & ASPEED_I2CD_INTR_MASTER_ERRORS); -- goto out_complete; -+ if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE) { -+ bus->cmd_err = ret; -+ bus->master_state = ASPEED_I2C_MASTER_INACTIVE; -+ goto out_complete; -+ } - } - -+#if IS_ENABLED(CONFIG_I2C_SLAVE) -+ /* -+ * A pending master command will be started by H/W when the bus comes -+ * back to idle state after completing a slave operation so change the -+ * master state from 'pending' to 'start' at here if slave is inactive. -+ */ -+ if (bus->master_state == ASPEED_I2C_MASTER_PENDING) { -+ if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE) -+ goto out_no_complete; -+ -+ bus->master_state = ASPEED_I2C_MASTER_START; -+ } -+#endif /* CONFIG_I2C_SLAVE */ -+ -+ /* Master is not currently active, irq was for someone else. */ -+ if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE || -+ bus->master_state == ASPEED_I2C_MASTER_PENDING) -+ goto out_no_complete; -+ - /* We are in an invalid state; reset bus to a known state. */ - if (!bus->msgs) { - dev_err(bus->dev, "bus in unknown state. irq_status: 0x%x\n", -@@ -423,6 +461,20 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - * then update the state and handle the new state below. - */ - if (bus->master_state == ASPEED_I2C_MASTER_START) { -+#if IS_ENABLED(CONFIG_I2C_SLAVE) -+ /* -+ * If a peer master starts a xfer very after it queues a master -+ * command, change its state to 'pending' then H/W will continue -+ * the queued master xfer just after completing the slave mode -+ * session. -+ */ -+ if (unlikely(irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH)) { -+ bus->master_state = ASPEED_I2C_MASTER_PENDING; -+ dev_dbg(bus->dev, -+ "master goes pending due to a slave start\n"); -+ goto out_no_complete; -+ } -+#endif /* CONFIG_I2C_SLAVE */ - if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_ACK))) { - if (unlikely(!(irq_status & ASPEED_I2CD_INTR_TX_NAK))) { - bus->cmd_err = -ENXIO; -@@ -566,7 +618,8 @@ static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id) - * interrupt bits. Each case needs to be handled using corresponding - * handlers depending on the current state. - */ -- if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE) { -+ if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE && -+ bus->master_state != ASPEED_I2C_MASTER_PENDING) { - irq_handled = aspeed_i2c_master_irq(bus, irq_remaining); - irq_remaining &= ~irq_handled; - if (irq_remaining) -@@ -601,15 +654,14 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, - { - struct aspeed_i2c_bus *bus = i2c_get_adapdata(adap); - unsigned long time_left, flags; -- int ret = 0; -+ int ret; - - spin_lock_irqsave(&bus->lock, flags); - bus->cmd_err = 0; - -- /* If bus is busy, attempt recovery. We assume a single master -- * environment. -- */ -- if (readl(bus->base + ASPEED_I2C_CMD_REG) & ASPEED_I2CD_BUS_BUSY_STS) { -+ /* If bus is busy in a single master environment, attempt recovery. */ -+ if (!bus->multi_master && -+ (readl(bus->base + ASPEED_I2C_CMD_REG) & ASPEED_I2CD_BUS_BUSY_STS)) { - spin_unlock_irqrestore(&bus->lock, flags); - ret = aspeed_i2c_recover_bus(bus); - if (ret) -@@ -629,10 +681,20 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, - time_left = wait_for_completion_timeout(&bus->cmd_complete, - bus->adap.timeout); - -- if (time_left == 0) -+ if (time_left == 0) { -+ /* -+ * If timed out and bus is still busy in a multi master -+ * environment, attempt recovery at here. -+ */ -+ if (bus->multi_master && -+ (readl(bus->base + ASPEED_I2C_CMD_REG) & -+ ASPEED_I2CD_BUS_BUSY_STS)) -+ ret = aspeed_i2c_recover_bus(bus); -+ - return -ETIMEDOUT; -- else -- return bus->master_xfer_result; -+ } -+ -+ return bus->master_xfer_result; - } - - static u32 aspeed_i2c_functionality(struct i2c_adapter *adap) -@@ -672,7 +734,7 @@ static int aspeed_i2c_reg_slave(struct i2c_client *client) - __aspeed_i2c_reg_slave(bus, client->addr); - - bus->slave = client; -- bus->slave_state = ASPEED_I2C_SLAVE_STOP; -+ bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE; - spin_unlock_irqrestore(&bus->lock, flags); - - return 0; -@@ -827,7 +889,9 @@ static int aspeed_i2c_init(struct aspeed_i2c_bus *bus, - if (ret < 0) - return ret; - -- if (!of_property_read_bool(pdev->dev.of_node, "multi-master")) -+ if (of_property_read_bool(pdev->dev.of_node, "multi-master")) -+ bus->multi_master = true; -+ else - fun_ctrl_reg |= ASPEED_I2CD_MULTI_MASTER_DIS; - - /* Enable Master Mode */ -@@ -930,7 +994,6 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) - init_completion(&bus->cmd_complete); - bus->adap.owner = THIS_MODULE; - bus->adap.retries = 0; -- bus->adap.timeout = 5 * HZ; - bus->adap.algo = &aspeed_i2c_algo; - bus->adap.dev.parent = &pdev->dev; - bus->adap.dev.of_node = pdev->dev.of_node; --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0030-Add-dump-debug-code-into-I2C-drivers.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0030-Add-dump-debug-code-into-I2C-drivers.patch index b735ab38b..e984623ba 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0030-Add-dump-debug-code-into-I2C-drivers.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0030-Add-dump-debug-code-into-I2C-drivers.patch @@ -1,4 +1,4 @@ -From 577b65960842f4098cdfc85a311261477c051d84 Mon Sep 17 00:00:00 2001 +From f4c13be7b95899d6eca3fa7ae38224bc9c7d7902 Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Date: Fri, 29 Jun 2018 11:00:02 -0700 Subject: [PATCH] Add dump debug code into I2C drivers @@ -16,11 +16,11 @@ echo 1 > /sys/module/i2c_slave_mqueue/parameters/dump_debug Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> --- drivers/i2c/busses/i2c-aspeed.c | 25 +++++++++++++++++++++++++ - drivers/i2c/i2c-slave-mqueue.c | 24 ++++++++++++++++++++++++ - 2 files changed, 49 insertions(+) + drivers/i2c/i2c-slave-mqueue.c | 22 ++++++++++++++++++++++ + 2 files changed, 47 insertions(+) diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c -index d11b2ea97259..506d867b43d9 100644 +index 6c8b38fd6e64..77dbd37b7b51 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c @@ -166,6 +166,19 @@ struct aspeed_i2c_bus { @@ -44,14 +44,14 @@ index d11b2ea97259..506d867b43d9 100644 static int aspeed_i2c_recover_bus(struct aspeed_i2c_bus *bus) @@ -655,6 +668,7 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, + { struct aspeed_i2c_bus *bus = i2c_get_adapdata(adap); unsigned long time_left, flags; - int ret; + int i; spin_lock_irqsave(&bus->lock, flags); bus->cmd_err = 0; -@@ -694,6 +708,11 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, +@@ -697,6 +711,11 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap, return -ETIMEDOUT; } @@ -63,7 +63,7 @@ index d11b2ea97259..506d867b43d9 100644 return bus->master_xfer_result; } -@@ -1061,6 +1080,12 @@ static struct platform_driver aspeed_i2c_bus_driver = { +@@ -1064,6 +1083,12 @@ static struct platform_driver aspeed_i2c_bus_driver = { }; module_platform_driver(aspeed_i2c_bus_driver); @@ -77,7 +77,7 @@ index d11b2ea97259..506d867b43d9 100644 MODULE_DESCRIPTION("Aspeed I2C Bus Driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/i2c-slave-mqueue.c b/drivers/i2c/i2c-slave-mqueue.c -index 6014bca0ff2a..0140c0dc4c03 100644 +index 6014bca0ff2a..4548088e1922 100644 --- a/drivers/i2c/i2c-slave-mqueue.c +++ b/drivers/i2c/i2c-slave-mqueue.c @@ -21,6 +21,7 @@ struct mq_msg { @@ -88,7 +88,7 @@ index 6014bca0ff2a..0140c0dc4c03 100644 spinlock_t lock; /* spinlock for queue index handling */ int in; -@@ -31,6 +32,19 @@ struct mq_queue { +@@ -31,6 +32,18 @@ struct mq_queue { struct mq_msg *queue; }; @@ -99,8 +99,7 @@ index 6014bca0ff2a..0140c0dc4c03 100644 + if (dump_debug && client->adapter->nr == dump_debug_bus_id) { \ + char dump_info[100] = {0,}; \ + snprintf(dump_info, sizeof(dump_info), \ -+ "%s (bus_id:%d, addr:0x%02x): ", \ -+ __func__, client->adapter->nr, client->addr); \ ++ "%s (bus_id:%d): ", __func__, client->adapter->nr); \ + print_hex_dump(KERN_ERR, dump_info, DUMP_PREFIX_NONE, 16, 1, \ + buf, len, true); \ + } @@ -108,15 +107,7 @@ index 6014bca0ff2a..0140c0dc4c03 100644 static int i2c_slave_mqueue_callback(struct i2c_client *client, enum i2c_slave_event event, u8 *val) { -@@ -49,6 +63,7 @@ static int i2c_slave_mqueue_callback(struct i2c_client *client, - case I2C_SLAVE_WRITE_RECEIVED: - if (msg->len < MQ_MSGBUF_SIZE) { - msg->buf[msg->len++] = *val; -+ I2C_HEX_DUMP(client, val, 1); - } else { - dev_err(&client->dev, "message is truncated!\n"); - mq->truncated = 1; -@@ -101,6 +116,7 @@ static ssize_t i2c_slave_mqueue_bin_read(struct file *filp, +@@ -101,6 +114,7 @@ static ssize_t i2c_slave_mqueue_bin_read(struct file *filp, if (msg->len <= count) { ret = msg->len; memcpy(buf, msg->buf, ret); @@ -124,7 +115,7 @@ index 6014bca0ff2a..0140c0dc4c03 100644 } else { ret = -EOVERFLOW; /* Drop this HUGE one. */ } -@@ -131,6 +147,8 @@ static int i2c_slave_mqueue_probe(struct i2c_client *client, +@@ -131,6 +145,8 @@ static int i2c_slave_mqueue_probe(struct i2c_client *client, BUILD_BUG_ON(!is_power_of_2(MQ_QUEUE_SIZE)); @@ -133,7 +124,7 @@ index 6014bca0ff2a..0140c0dc4c03 100644 buf = devm_kmalloc_array(dev, MQ_QUEUE_SIZE, MQ_MSGBUF_SIZE, GFP_KERNEL); if (!buf) -@@ -212,6 +230,12 @@ static struct i2c_driver i2c_slave_mqueue_driver = { +@@ -212,6 +228,12 @@ static struct i2c_driver i2c_slave_mqueue_driver = { }; module_i2c_driver(i2c_slave_mqueue_driver); diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch index 3863ea8f6..bb6465023 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch @@ -69,14 +69,14 @@ diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 8f70b888a9ca..30ee065491ef 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o - obj-$(CONFIG_ASPEED_UART_ROUTING) += aspeed-uart-routing.o - obj-$(CONFIG_ASPEED_LPC_MBOX) += aspeed-lpc-mbox.o - obj-$(CONFIG_ASPEED_LPC_SIO) += aspeed-lpc-sio.o +@@ -55,6 +55,7 @@ obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpres + obj-$(CONFIG_CXL_BASE) += cxl/ + obj-$(CONFIG_ASPEED_LPC_SIO) += aspeed-lpc-sio.o + obj-$(CONFIG_ASPEED_ESPI_SLAVE) += aspeed-espi-slave.o +obj-$(CONFIG_ASPEED_VGA_SHAREDMEM) += aspeed-vga-sharedmem.o - obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o - obj-$(CONFIG_OCXL) += ocxl/ - obj-y += cardreader/ + obj-$(CONFIG_ASPEED_LPC_CTRL) += aspeed-lpc-ctrl.o + obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o + obj-$(CONFIG_ASPEED_UART_ROUTING) += aspeed-uart-routing.o diff --git a/drivers/misc/aspeed-vga-sharedmem.c b/drivers/misc/aspeed-vga-sharedmem.c new file mode 100644 index 000000000000..76f60cd67d3a diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch deleted file mode 100644 index 92d0a045d..000000000 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 13d6fd0f71b3d0d69370878613bf7eb78fefa18f Mon Sep 17 00:00:00 2001 -From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Date: Fri, 9 Nov 2018 11:32:27 -0800 -Subject: [PATCH] Add Aspeed Video Engine Driver - -media: platform: Fix missing spin_lock_init() - -The driver allocates the spinlock but not initialize it. -Use spin_lock_init() on it to initialize it correctly. - -This is detected by Coccinelle semantic patch. - -Fixes: d2b4387f3bdf ("media: platform: Add Aspeed Video Engine driver") - -Signed-off-by: Eddie James <eajames@linux.ibm.com> -Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> -Reviewed-by: Rob Herring <robh@kernel.org> -Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> -Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> ---- - arch/arm/boot/dts/aspeed-g5.dtsi | 11 +++++++++ - drivers/clk/clk-aspeed.c | 41 ++++++++++++++++++++++++++++++-- - drivers/media/platform/aspeed-video.c | 1 + - include/dt-bindings/clock/aspeed-clock.h | 1 + - 4 files changed, 52 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi -index 6f26e0d323d6..d5783eaf30ae 100644 ---- a/arch/arm/boot/dts/aspeed-g5.dtsi -+++ b/arch/arm/boot/dts/aspeed-g5.dtsi -@@ -243,6 +243,17 @@ - interrupts = <0x19>; - }; - -+ video: video@1e700000 { -+ compatible = "aspeed,ast2500-video-engine"; -+ reg = <0x1e700000 0x20000>; -+ clocks = <&syscon ASPEED_CLK_GATE_VCLK>, -+ <&syscon ASPEED_CLK_GATE_ECLK>; -+ clock-names = "vclk", "eclk"; -+ resets = <&syscon ASPEED_RESET_VIDEO>; -+ interrupts = <7>; -+ status = "disabled"; -+ }; -+ - adc: adc@1e6e9000 { - compatible = "aspeed,ast2500-adc"; - reg = <0x1e6e9000 0xb0>; -diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c -index 3bbb4fbf00c9..6cea55de485f 100644 ---- a/drivers/clk/clk-aspeed.c -+++ b/drivers/clk/clk-aspeed.c -@@ -95,7 +95,7 @@ struct aspeed_clk_gate { - /* TODO: ask Aspeed about the actual parent data */ - static const struct aspeed_gate_data aspeed_gates[] = { - /* clk rst name parent flags */ -- [ASPEED_CLK_GATE_ECLK] = { 0, -1, "eclk-gate", "eclk", 0 }, /* Video Engine */ -+ [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */ - [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */ - [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */ - [ASPEED_CLK_GATE_VCLK] = { 3, 6, "vclk-gate", NULL, 0 }, /* Video Capture */ -@@ -121,6 +121,24 @@ static const struct aspeed_gate_data aspeed_gates[] = { - [ASPEED_CLK_GATE_LHCCLK] = { 28, -1, "lhclk-gate", "lhclk", 0 }, /* LPC master/LPC+ */ - }; - -+static const char * const eclk_parent_names[] = { -+ "mpll", -+ "hpll", -+ "dpll", -+}; -+ -+static const struct clk_div_table ast2500_eclk_div_table[] = { -+ { 0x0, 2 }, -+ { 0x1, 2 }, -+ { 0x2, 3 }, -+ { 0x3, 4 }, -+ { 0x4, 5 }, -+ { 0x5, 6 }, -+ { 0x6, 7 }, -+ { 0x7, 8 }, -+ { 0 } -+}; -+ - static const struct clk_div_table ast2500_mac_div_table[] = { - { 0x0, 4 }, /* Yep, really. Aspeed confirmed this is correct */ - { 0x1, 4 }, -@@ -200,18 +218,21 @@ static struct clk_hw *aspeed_ast2500_calc_pll(const char *name, u32 val) - - struct aspeed_clk_soc_data { - const struct clk_div_table *div_table; -+ const struct clk_div_table *eclk_div_table; - const struct clk_div_table *mac_div_table; - struct clk_hw *(*calc_pll)(const char *name, u32 val); - }; - - static const struct aspeed_clk_soc_data ast2500_data = { - .div_table = ast2500_div_table, -+ .eclk_div_table = ast2500_eclk_div_table, - .mac_div_table = ast2500_mac_div_table, - .calc_pll = aspeed_ast2500_calc_pll, - }; - - static const struct aspeed_clk_soc_data ast2400_data = { - .div_table = ast2400_div_table, -+ .eclk_div_table = ast2400_div_table, - .mac_div_table = ast2400_div_table, - .calc_pll = aspeed_ast2400_calc_pll, - }; -@@ -325,6 +346,7 @@ static const u8 aspeed_resets[] = { - [ASPEED_RESET_PECI] = 10, - [ASPEED_RESET_I2C] = 2, - [ASPEED_RESET_AHB] = 1, -+ [ASPEED_RESET_VIDEO] = 6, - - /* - * SCUD4 resets start at an offset to separate them from -@@ -538,6 +560,22 @@ static int aspeed_clk_probe(struct platform_device *pdev) - return PTR_ERR(hw); - aspeed_clk_data->hws[ASPEED_CLK_24M] = hw; - -+ hw = clk_hw_register_mux(dev, "eclk-mux", eclk_parent_names, -+ ARRAY_SIZE(eclk_parent_names), 0, -+ scu_base + ASPEED_CLK_SELECTION, 2, 0x3, 0, -+ &aspeed_clk_lock); -+ if (IS_ERR(hw)) -+ return PTR_ERR(hw); -+ aspeed_clk_data->hws[ASPEED_CLK_ECLK_MUX] = hw; -+ -+ hw = clk_hw_register_divider_table(dev, "eclk", "eclk-mux", 0, -+ scu_base + ASPEED_CLK_SELECTION, 28, -+ 3, 0, soc_data->eclk_div_table, -+ &aspeed_clk_lock); -+ if (IS_ERR(hw)) -+ return PTR_ERR(hw); -+ aspeed_clk_data->hws[ASPEED_CLK_ECLK] = hw; -+ - /* - * TODO: There are a number of clocks that not included in this driver - * as more information is required: -@@ -547,7 +585,6 @@ static int aspeed_clk_probe(struct platform_device *pdev) - * RGMII - * RMII - * UART[1..5] clock source mux -- * Video Engine (ECLK) mux and clock divider - */ - - /* Get the uart clock source configuration from SCU4C*/ -diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c -index dfec813f50a9..692e08ef38c0 100644 ---- a/drivers/media/platform/aspeed-video.c -+++ b/drivers/media/platform/aspeed-video.c -@@ -1661,6 +1661,7 @@ static int aspeed_video_probe(struct platform_device *pdev) - - video->frame_rate = 30; - video->dev = &pdev->dev; -+ spin_lock_init(&video->lock); - mutex_init(&video->video_lock); - init_waitqueue_head(&video->wait); - INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work); -diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h -index 335879505a72..0b0f3a0ebe9b 100644 ---- a/include/dt-bindings/clock/aspeed-clock.h -+++ b/include/dt-bindings/clock/aspeed-clock.h -@@ -52,5 +52,6 @@ - #define ASPEED_RESET_I2C 7 - #define ASPEED_RESET_AHB 8 - #define ASPEED_RESET_CRT1 9 -+#define ASPEED_RESET_VIDEO 10 - - #endif --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch index 02ca65e9f..3e8f86666 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch @@ -1,4 +1,4 @@ -From 95bae3d3051ee13627e5ef92bb9d60cfb5731118 Mon Sep 17 00:00:00 2001 +From ef2e1d9d2e8c97daf806f4da74738a84de054116 Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> Date: Mon, 11 Feb 2019 17:02:35 -0800 Subject: [PATCH] Add Aspeed PWM driver which uses FTTMR010 timer IP @@ -10,21 +10,18 @@ structure changes only for Aspeed SoCs. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> --- - arch/arm/boot/dts/aspeed-g5.dtsi | 2 +- - drivers/clocksource/timer-fttmr010.c | 25 ++ - drivers/pwm/Kconfig | 9 + - drivers/pwm/Makefile | 1 + - drivers/pwm/pwm-fttmr010.c | 465 +++++++++++++++++++++++++++++++++++ - include/clocksource/timer-fttmr010.h | 17 ++ - 6 files changed, 514 insertions(+), 5 deletions(-) + arch/arm/boot/dts/aspeed-g5.dtsi | 2 +- + drivers/pwm/Kconfig | 9 + + drivers/pwm/Makefile | 1 + + drivers/pwm/pwm-fttmr010.c | 437 +++++++++++++++++++++++++++++++++++++++ + 4 files changed, 448 insertions(+), 1 deletion(-) create mode 100644 drivers/pwm/pwm-fttmr010.c - create mode 100644 include/clocksource/timer-fttmr010.h diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi -index d5783eaf30ae..992de63d7a19 100644 +index 8a7c4257b917..c24197232385 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi -@@ -301,7 +301,7 @@ +@@ -300,7 +300,7 @@ timer: timer@1e782000 { /* This timer is a Faraday FTTMR010 derivative */ @@ -33,109 +30,6 @@ index d5783eaf30ae..992de63d7a19 100644 reg = <0x1e782000 0x90>; interrupts = <16 17 18 35 36 37 38 39>; clocks = <&syscon ASPEED_CLK_APB>; -diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c -index fadff7915dd9..49a790924360 100644 ---- a/drivers/clocksource/timer-fttmr010.c -+++ b/drivers/clocksource/timer-fttmr010.c -@@ -20,6 +20,8 @@ - #include <linux/bitops.h> - #include <linux/delay.h> - -+#include <clocksource/timer-fttmr010.h> -+ - /* - * Register definitions common for all the timer variants. - */ -@@ -91,6 +93,9 @@ - #define TIMER_3_INT_OVERFLOW BIT(8) - #define TIMER_INT_ALL_MASK 0x1ff - -+DEFINE_SPINLOCK(timer_fttmr010_lock); -+EXPORT_SYMBOL(timer_fttmr010_lock); -+ - struct fttmr010 { - void __iomem *base; - unsigned int tick_rate; -@@ -137,8 +142,11 @@ static int fttmr010_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) - { - struct fttmr010 *fttmr010 = to_fttmr010(evt); -+ unsigned long flags; - u32 cr; - -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ - /* Stop */ - cr = readl(fttmr010->base + TIMER_CR); - cr &= ~fttmr010->t1_enable_val; -@@ -161,27 +169,37 @@ static int fttmr010_timer_set_next_event(unsigned long cycles, - cr |= fttmr010->t1_enable_val; - writel(cr, fttmr010->base + TIMER_CR); - -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ - return 0; - } - - static int fttmr010_timer_shutdown(struct clock_event_device *evt) - { - struct fttmr010 *fttmr010 = to_fttmr010(evt); -+ unsigned long flags; - u32 cr; - -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ - /* Stop */ - cr = readl(fttmr010->base + TIMER_CR); - cr &= ~fttmr010->t1_enable_val; - writel(cr, fttmr010->base + TIMER_CR); - -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ - return 0; - } - - static int fttmr010_timer_set_oneshot(struct clock_event_device *evt) - { - struct fttmr010 *fttmr010 = to_fttmr010(evt); -+ unsigned long flags; - u32 cr; - -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ - /* Stop */ - cr = readl(fttmr010->base + TIMER_CR); - cr &= ~fttmr010->t1_enable_val; -@@ -201,6 +219,8 @@ static int fttmr010_timer_set_oneshot(struct clock_event_device *evt) - writel(cr, fttmr010->base + TIMER_INTR_MASK); - } - -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ - return 0; - } - -@@ -208,8 +228,11 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt) - { - struct fttmr010 *fttmr010 = to_fttmr010(evt); - u32 period = DIV_ROUND_CLOSEST(fttmr010->tick_rate, HZ); -+ unsigned long flags; - u32 cr; - -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ - /* Stop */ - cr = readl(fttmr010->base + TIMER_CR); - cr &= ~fttmr010->t1_enable_val; -@@ -235,6 +258,8 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt) - cr |= fttmr010->t1_enable_val; - writel(cr, fttmr010->base + TIMER_CR); - -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ - return 0; - } - diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index a8f47df0655a..92a8fbebe2d9 100644 --- a/drivers/pwm/Kconfig @@ -170,10 +64,10 @@ index 9c676a0dadf5..13b7b20ad5ab 100644 obj-$(CONFIG_PWM_IMX) += pwm-imx.o diff --git a/drivers/pwm/pwm-fttmr010.c b/drivers/pwm/pwm-fttmr010.c new file mode 100644 -index 000000000000..459ace3eba6a +index 000000000000..32e508c962dc --- /dev/null +++ b/drivers/pwm/pwm-fttmr010.c -@@ -0,0 +1,465 @@ +@@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2019 Intel Corporation + @@ -185,9 +79,6 @@ index 000000000000..459ace3eba6a +#include <linux/platform_device.h> +#include <linux/pwm.h> + -+/* For timer_fttmr010_lock */ -+#include <clocksource/timer-fttmr010.h> -+ +#define TIMER_CR 0x30 + +#define TIMER5_ASPEED_COUNT 0x50 @@ -265,21 +156,6 @@ index 000000000000..459ace3eba6a + u32 clk_tick_ns; +}; + -+#if !defined(CONFIG_FTTMR010_TIMER) -+/* -+ * Timer block is shared between timer-fttmr010 and pwm-fttmr010 drivers -+ * and some registers need access synchronization. If both drivers are -+ * compiled in, the spinlock is defined in the clocksource driver, -+ * otherwise following definition is used. -+ * -+ * Currently we do not need any more complex synchronization method -+ * because all the supported SoCs contain only one instance of the Timer -+ * IP. Once this changes, both drivers will need to be modified to -+ * properly synchronize accesses to particular instances. -+ */ -+static DEFINE_SPINLOCK(timer_fttmr010_lock); -+#endif -+ +static inline +struct pwm_fttmr010 *to_pwm_fttmr010(struct pwm_chip *chip) +{ @@ -319,8 +195,6 @@ index 000000000000..459ace3eba6a + ulong flags; + u32 cr; + -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ + cr = readl(priv->base + TIMER_CR); + + switch (pwm->hwpwm) { @@ -339,9 +213,6 @@ index 000000000000..459ace3eba6a + } + + writel(cr, priv->base + TIMER_CR); -+ -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ + priv->disabled_mask &= ~BIT(pwm->hwpwm); + + return 0; @@ -353,8 +224,6 @@ index 000000000000..459ace3eba6a + ulong flags; + u32 cr; + -+ spin_lock_irqsave(&timer_fttmr010_lock, flags); -+ + cr = readl(priv->base + TIMER_CR); + + switch (pwm->hwpwm) { @@ -373,9 +242,6 @@ index 000000000000..459ace3eba6a + } + + writel(cr, priv->base + TIMER_CR); -+ -+ spin_unlock_irqrestore(&timer_fttmr010_lock, flags); -+ + priv->disabled_mask |= BIT(pwm->hwpwm); +} + @@ -639,29 +505,6 @@ index 000000000000..459ace3eba6a +MODULE_AUTHOR("Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>"); +MODULE_DESCRIPTION("FTTMR010 PWM Driver for timer pulse outputs"); +MODULE_LICENSE("GPL v2"); -diff --git a/include/clocksource/timer-fttmr010.h b/include/clocksource/timer-fttmr010.h -new file mode 100644 -index 000000000000..d8d6a2f14130 ---- /dev/null -+++ b/include/clocksource/timer-fttmr010.h -@@ -0,0 +1,17 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+ -+#ifndef __CLOCKSOURCE_TIMER_FTTMR010_H -+#define __CLOCKSOURCE_TIMER_FTTMR010_H -+ -+#include <linux/spinlock.h> -+ -+/* -+ * Following declaration must be in an ifdef due to this symbol being static -+ * in timer-fttmr010 driver if the clocksource driver is not compiled in and the -+ * spinlock is not shared between both drivers. -+ */ -+#ifdef CONFIG_FTTMR010_TIMER -+extern spinlock_t timer_fttmr010_lock; -+#endif -+ -+#endif /* __CLOCKSOURCE_TIMER_FTTMR010_H */ -- 2.7.4 diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch index 9aee6f0c0..7a4b090ec 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch @@ -198,10 +198,10 @@ index d1adfdf50fb3..4f9fdd25c6d7 100644 + val = !!val; + if (test_bit(FLAG_PASS_THROUGH, &desc->flags)) { + if (val) -+ gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc), ++ gpio_set_config(gc, gpio_chip_hwgpio(desc), + PIN_CONFIG_PASS_THROUGH_ENABLE); + else -+ gpio_set_drive_single_ended(gc, gpio_chip_hwgpio(desc), ++ gpio_set_config(gc, gpio_chip_hwgpio(desc), + PIN_CONFIG_PASS_THROUGH_DISABLE); + } else { + gpiod_err(desc, diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch deleted file mode 100644 index a0168c889..000000000 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 1775e41d085b24a672dc271d08bfc83401288f0b Mon Sep 17 00:00:00 2001 -From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Date: Fri, 22 Mar 2019 16:34:54 -0700 -Subject: [PATCH] media: platform: Fix a kernel warning on clk control - -Video engine clock control functions in the Aspeed video engine driver are -being called from multiple context without any protection so video clocks -can be disabled twice and eventually it causes a kernel warning with stack -dump printing out like below: - -[ 120.034729] WARNING: CPU: 0 PID: 1334 at drivers/clk/clk.c:684 clk_core_unprepare+0x13c/0x170 -[ 120.043252] eclk-gate already unprepared -[ 120.047283] CPU: 0 PID: 1334 Comm: obmc-ikvm Tainted: G W 5.0.3-b94b74e8b52db91fe4e99e0bb481ec8bf2b5b47c #1 -[ 120.058417] Hardware name: Generic DT based system -[ 120.063219] Backtrace: -[ 120.065787] [<80107cdc>] (dump_backtrace) from [<80107f10>] (show_stack+0x20/0x24) -[ 120.073371] r7:803a4ff0 r6:00000009 r5:00000000 r4:96197e1c -[ 120.079152] [<80107ef0>] (show_stack) from [<8068f7d8>] (dump_stack+0x20/0x28) -[ 120.086479] [<8068f7b8>] (dump_stack) from [<8011604c>] (__warn.part.3+0xb4/0xdc) -[ 120.094068] [<80115f98>] (__warn.part.3) from [<801160e0>] (warn_slowpath_fmt+0x6c/0x90) -[ 120.102164] r6:000002ac r5:8080c0b8 r4:80a07008 -[ 120.106893] [<80116078>] (warn_slowpath_fmt) from [<803a4ff0>] (clk_core_unprepare+0x13c/0x170) -[ 120.115686] r3:8080cf8c r2:8080c17c -[ 120.119276] r7:97d68e58 r6:9df23200 r5:9668c260 r4:96459260 -[ 120.125046] [<803a4eb4>] (clk_core_unprepare) from [<803a707c>] (clk_unprepare+0x34/0x3c) -[ 120.133226] r5:9668c260 r4:96459260 -[ 120.136932] [<803a7048>] (clk_unprepare) from [<804f34bc>] (aspeed_video_off+0x44/0x48) -[ 120.145031] r5:9668c260 r4:9668cbc0 -[ 120.148647] [<804f3478>] (aspeed_video_off) from [<804f3fd0>] (aspeed_video_release+0x94/0x118) -[ 120.157435] r5:966a0cb8 r4:966a0800 -[ 120.161049] [<804f3f3c>] (aspeed_video_release) from [<804d2c58>] (v4l2_release+0xd4/0xe8) -[ 120.169404] r7:97d68e58 r6:9d087810 r5:9df23200 r4:966a0b20 -[ 120.175168] [<804d2b84>] (v4l2_release) from [<80236224>] (__fput+0x98/0x1c4) -[ 120.182316] r5:96698e78 r4:9df23200 -[ 120.185994] [<8023618c>] (__fput) from [<802363b8>] (____fput+0x18/0x1c) -[ 120.192712] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64bbc r5:961dd560 r4:961dd89c -[ 120.200562] [<802363a0>] (____fput) from [<80131c08>] (task_work_run+0x7c/0xa4) -[ 120.207994] [<80131b8c>] (task_work_run) from [<80106884>] (do_work_pending+0x4a8/0x578) -[ 120.216163] r7:801011e4 r6:80a07008 r5:96197fb0 r4:ffffe000 -[ 120.221856] [<801063dc>] (do_work_pending) from [<8010106c>] (slow_work_pending+0xc/0x20) -[ 120.230116] Exception stack(0x96197fb0 to 0x96197ff8) -[ 120.235254] 7fa0: 00000000 76ccf094 00000000 00000000 -[ 120.243438] 7fc0: 00000008 00a11978 7eab3c30 00000006 00000000 00000000 475b0fa4 00000000 -[ 120.251692] 7fe0: 00000002 7eab3a40 00000000 47720e38 80000010 00000008 -[ 120.258396] r10:00000000 r9:96196000 r8:801011e4 r7:00000006 r6:7eab3c30 r5:00a11978 -[ 120.266291] r4:00000008 - -To prevent this issue, this commit adds spinlock protection and clock -status checking logic into the Aspeed video engine driver. - -Fixes: d2b4387f3bdf ("media: platform: Add Aspeed Video Engine driver") -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Cc: Eddie James <eajames@linux.ibm.com> -Cc: Mauro Carvalho Chehab <mchehab@kernel.org> -Cc: Joel Stanley <joel@jms.id.au> -Cc: Andrew Jeffery <andrew@aj.id.au> ---- - drivers/media/platform/aspeed-video.c | 32 +++++++++++++++++++++++++++++--- - 1 file changed, 29 insertions(+), 3 deletions(-) - -diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c -index 8144fe36ad48..e70be8fdbde5 100644 ---- a/drivers/media/platform/aspeed-video.c -+++ b/drivers/media/platform/aspeed-video.c -@@ -187,6 +187,7 @@ enum { - VIDEO_STREAMING, - VIDEO_FRAME_INPRG, - VIDEO_STOPPED, -+ VIDEO_CLOCKS_ON, - }; - - struct aspeed_video_addr { -@@ -483,19 +484,29 @@ static void aspeed_video_enable_mode_detect(struct aspeed_video *video) - - static void aspeed_video_off(struct aspeed_video *video) - { -+ if (!test_bit(VIDEO_CLOCKS_ON, &video->flags)) -+ return; -+ - /* Disable interrupts */ - aspeed_video_write(video, VE_INTERRUPT_CTRL, 0); - - /* Turn off the relevant clocks */ - clk_disable_unprepare(video->vclk); - clk_disable_unprepare(video->eclk); -+ -+ clear_bit(VIDEO_CLOCKS_ON, &video->flags); - } - - static void aspeed_video_on(struct aspeed_video *video) - { -+ if (test_bit(VIDEO_CLOCKS_ON, &video->flags)) -+ return; -+ - /* Turn on the relevant clocks */ - clk_prepare_enable(video->eclk); - clk_prepare_enable(video->vclk); -+ -+ set_bit(VIDEO_CLOCKS_ON, &video->flags); - } - - static void aspeed_video_bufs_done(struct aspeed_video *video, -@@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct aspeed_video *video, - - static void aspeed_video_irq_res_change(struct aspeed_video *video) - { -+ spin_lock(&video->lock); - dev_dbg(video->dev, "Resolution changed; resetting\n"); - - set_bit(VIDEO_RES_CHANGE, &video->flags); - clear_bit(VIDEO_FRAME_INPRG, &video->flags); - - aspeed_video_off(video); -+ spin_unlock(&video->lock); - aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR); - - schedule_delayed_work(&video->res_work, RESOLUTION_CHANGE_DELAY); -@@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct aspeed_video *video) - - static void aspeed_video_start(struct aspeed_video *video) - { -+ unsigned long flags; -+ -+ spin_lock_irqsave(&video->lock, flags); - aspeed_video_on(video); - - aspeed_video_init_regs(video); -+ spin_unlock_irqrestore(&video->lock, flags); - - /* Resolution set to 640x480 if no signal found */ - aspeed_video_get_resolution(video); -@@ -956,6 +973,9 @@ static void aspeed_video_start(struct aspeed_video *video) - - static void aspeed_video_stop(struct aspeed_video *video) - { -+ unsigned long flags; -+ -+ spin_lock_irqsave(&video->lock, flags); - set_bit(VIDEO_STOPPED, &video->flags); - cancel_delayed_work_sync(&video->res_work); - -@@ -969,6 +989,7 @@ static void aspeed_video_stop(struct aspeed_video *video) - - video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL; - video->flags = 0; -+ spin_unlock_irqrestore(&video->lock, flags); - } - - static int aspeed_video_querycap(struct file *file, void *fh, -@@ -1306,16 +1327,21 @@ static void aspeed_video_resolution_work(struct work_struct *work) - struct delayed_work *dwork = to_delayed_work(work); - struct aspeed_video *video = container_of(dwork, struct aspeed_video, - res_work); -- u32 input_status = video->v4l2_input_status; -+ unsigned long flags; -+ u32 input_status; - -+ spin_lock_irqsave(&video->lock, flags); -+ input_status = video->v4l2_input_status; - aspeed_video_on(video); - - /* Exit early in case no clients remain */ -- if (test_bit(VIDEO_STOPPED, &video->flags)) -+ if (test_bit(VIDEO_STOPPED, &video->flags)) { -+ spin_unlock_irqrestore(&video->lock, flags); - goto done; -+ } - - aspeed_video_init_regs(video); -- -+ spin_unlock_irqrestore(&video->lock, flags); - aspeed_video_get_resolution(video); - - if (video->detected_timings.width != video->active_timings.width || --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0051-Add-AST2500-JTAG-device.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0051-Add-AST2500-JTAG-device.patch new file mode 100644 index 000000000..d66facdfa --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0051-Add-AST2500-JTAG-device.patch @@ -0,0 +1,35 @@ +From a2e0020ef6e03abde6819fb7fc328dcf23d0bd71 Mon Sep 17 00:00:00 2001 +From: "Hunt, Bryan" <bryan.hunt@intel.com> +Date: Mon, 6 May 2019 10:02:14 -0700 +Subject: [PATCH] Add AST2500d JTAG driver + +Adding aspeed jtag device + +Signed-off-by: Hunt, Bryan <bryan.hunt@intel.com> +--- + arch/arm/boot/dts/aspeed-g5.dtsi | 9 + + 1 files changed, 15 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi +index bf7ae631a458..2c9f287759ce 100644 +--- a/arch/arm/boot/dts/aspeed-g5.dtsi ++++ b/arch/arm/boot/dts/aspeed-g5.dtsi +@@ -366,6 +366,15 @@ + pinctrl-0 = <&pinctrl_espi_default>; + }; + ++ jtag: jtag@1e6e4000 { ++ compatible = "aspeed,ast2500-jtag"; ++ reg = <0x1e6e4000 0x1c>; ++ clocks = <&syscon ASPEED_CLK_APB>; ++ resets = <&syscon ASPEED_RESET_JTAG_MASTER>; ++ interrupts = <43>; ++ status = "disabled"; ++ }; ++ + lpc: lpc@1e789000 { + compatible = "aspeed,ast2500-lpc", "simple-mfd"; + reg = <0x1e789000 0x1000>; +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0052-drivers-jtag-Add-JTAG-core-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0052-drivers-jtag-Add-JTAG-core-driver.patch new file mode 100644 index 000000000..7ba94a7bc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0052-drivers-jtag-Add-JTAG-core-driver.patch @@ -0,0 +1,904 @@ +From 0b8b93851bb79e70e91159f310afd4b56084977f Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Mon, 6 May 2019 10:05:51 -0800 +Subject: [PATCH v29 1/6] drivers: jtag: Add JTAG core driver + +JTAG class driver provide infrastructure to support hardware/software +JTAG platform drivers. It provide user layer API interface for flashing +and debugging external devices which equipped with JTAG interface +using standard transactions. + +Driver exposes set of IOCTL to user space for: +- XFER: + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); +- GIOCSTATUS read the current TAPC state of the JTAG controller +- SIOCSTATE Forces the JTAG TAPC to go into a particular state. +- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency. +- IOCBITBANG for low level control of JTAG signals. + +Driver core provides set of internal APIs for allocation and +registration: +- jtag_register; +- jtag_unregister; +- jtag_alloc; +- jtag_free; + +Platform driver on registration with jtag-core creates the next +entry in dev folder: +/dev/jtagX + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Jiri Pirko <jiri@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Philippe Ombredanne <pombredanne@nexb.com> +Cc: Vadim Pasternak <vadimp@mellanox.com> +Cc: Masahiro Yamada <yamada.masahiro@socionext.com> +Cc: Paul Burton <paul.burton@mips.com> +Cc: Thomas Gleixner <tglx@linutronix.de> +Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +Cc: Arnd Bergmann <arnd@arndb.de> +Cc: Boris Brezillon <bbrezillon@kernel.org> +Cc: Randy Dunlap <rdunlap@infradead.org> +Cc: Johan Hovold <johan@kernel.org> +Cc: Jens Axboe <axboe@kernel.dk> +Cc: Joel Stanley <joel@jms.id.au> +Cc: Palmer Dabbelt <palmer@sifive.com> +Cc: Kees Cook <keescook@chromium.org> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- +v28->v29 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Expand bitbang function to accept multiples bitbang operations within a + single JTAG_IOCBITBANG call. It will receive a buffer with TDI and TMS + values and it is expected that driver fills TDO fields with its + corresponding output value for every transaction. +- Always setup JTAG controller to master mode but disable JTAG output when + the driver is not in use to allow other HW to own the JTAG bus. Remove SCU + register accesses. This register controls the JTAG controller mode + (master/slave). + +v27->v28 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Replace JTAG_IOCRUNTEST with JTAG_SIOCSTATE adding support for all TAPC + end states in SW mode using a lookup table to navigate across states. +- Add support for simultaneous READ/WRITE transfers(JTAG_READ_WRITE_XFER). +- Support for switching JTAG controller mode between slave and master + mode. +- Setup JTAG controller mode to master only when the driver is opened, + letting + other HW to own the JTAG bus when it isn't in use. +- Include JTAG bit bang IOCTL for low level JTAG control usage + (JTAG_IOCBITBANG). + +v24->v25 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- set values to enums in jtag.h + +v23->v24 +Notifications from kbuild test robot <lkp@intel.com> +- Add include types.h header to jtag.h +- remove unecessary jtag_release + +v22->v23 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- remove restriction of allocated JTAG devs- +- add validation fo idle values +- remove unnecessary blank line +- change retcode for xfer +- remove unecessary jtag_release callback +- remove unecessary defined fron jtag.h +- align in one line define JTAG_IOCRUNTEST + +v21->v22 +Comments pointed by Andy Shevchenko <andy.shevchenko@gmail.com> +- Fix 0x0f -> 0x0F in ioctl-number.txt +- Add description to #define MAX_JTAG_NAME_LEN +- Remove unnecessary entry *dev from struct jtag +- Remove redundant parens +- Described mandatory callbacks and removed unnecessary +- Set JTAG_MAX_XFER_DATA_LEN to power of 2 +- rework driver alloc/register to devm_ variant +- increasing line length up to 84 in order to improve readability. + +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- fix spell in ABI doccumentation + +v20->v21 + Comments pointed by Randy Dunlap <rdunlap@infradead.org> + - Fix JTAG dirver help in Kconfig + +v19->v20 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- Fix JTAG dirver help in Kconfig + +Notifications from kbuild test robot <lkp@intel.com> +- fix incompatible type casts + +v18->v19 +Comments pointed by Julia Cartwright <juliac@eso.teric.us> +- Fix memory leak on jtag_alloc exit + +v17->v18 +Comments pointed by Julia Cartwright <juliac@eso.teric.us> +- Change to return -EOPNOTSUPP in case of error in JTAG_GIOCFREQ +- Add ops callbacks check to jtag_alloc +- Add err check for copy_to_user +- Move the kfree() above the if (err) in JTAG_IOCXFER +- remove unnecessary check for error after put_user +- add padding to struct jtag_xfer + +v16->v17 +Comments pointed by Julia Cartwright <juliac@eso.teric.us> +- Fix memory allocation on jtag alloc +- Move out unnecessary form lock on jtag open +- Rework jtag register behavior + +v15->v16 +Comments pointed by Florian Fainelli <f.fainelli@gmail.com> +- move check jtag->ops->* in ioctl before get_user() +- change error type -EINVAL --> -EBUSY on open already opened jtag +- remove unnecessary ARCH_DMA_MINALIGN flag from kzalloc +- remove define ARCH_DMA_MINALIGN + +v14->v15 +v13->v14 +Comments pointed by Philippe Ombredanne <pombredanne@nexb.com> +- Change style of head block comment from /**/ to // + +v12->v13 +Comments pointed by Philippe Ombredanne <pombredanne@nexb.com> +- Change jtag.c licence type to + SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note + and reorder line with license in description + +v11->v12 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- Change jtag.h licence type to + SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note + and reorder line with license in description + +Comments pointed by Chip Bilbrey <chip@bilbrey.org> +- Remove Apeed reference from uapi jtag.h header +- Remove access mode from xfer and idle transactions +- Add new ioctl JTAG_SIOCMODE for set hw mode +- Add single open per device blocking + +v10->v11 +Notifications from kbuild test robot <lkp@intel.com> +- Add include types.h header to jtag.h +- fix incompatible type of xfer callback +- remove rdundant class defination +- Fix return order in case of xfer error + +V9->v10 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- remove unnecessary alignment for pirv data +- move jtag_copy_to_user and jtag_copy_from_user code just to ioctl +- move int jtag_run_test_idle_op and jtag_xfer_op code + just to ioctl +- change return error codes to more applicable +- add missing error checks +- fix error check order in ioctl +- remove unnecessary blank lines +- add param validation to ioctl +- remove compat_ioctl +- remove only one open per JTAG port blocking. + User will care about this. +- Fix idr memory leak on jtag_exit +- change cdev device type to misc + +V8->v9 +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- use get_user() instead of __get_user(). +- change jtag->open type from int to atomic_t +- remove spinlock on jtg_open +- remove mutex on jtag_register +- add unregister_chrdev_region on jtag_init err +- add unregister_chrdev_region on jtag_exit +- remove unnecessary pointer casts +- add *data parameter to xfer function prototype + +v7->v8 +Comments pointed by Moritz Fischer <moritz.fischer@ettus.com> +- Fix misspelling s/friver/driver + +v6->v7 +Notifications from kbuild test robot <lkp@intel.com> +- Remove include asm/types.h from jtag.h +- Add include <linux/types.h> to jtag.c + +v5->v6 +v4->v5 + +v3->v4 +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- change transaction pointer tdio type to __u64 +- change internal status type from enum to __u32 +- reorder jtag_xfer members to avoid the implied padding +- add __packed attribute to jtag_xfer and jtag_run_test_idle + +v2->v3 +Notifications from kbuild test robot <lkp@intel.com> +- Change include path to <linux/types.h> in jtag.h + +v1->v2 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- Change license type from GPLv2/BSD to GPLv2 +- Change type of variables which crossed user/kernel to __type +- Remove "default n" from Kconfig + +Comments pointed by Andrew Lunn <andrew@lunn.ch> +- Change list_add_tail in jtag_unregister to list_del + +Comments pointed by Neil Armstrong <narmstrong@baylibre.com> +- Add SPDX-License-Identifier instead of license text + +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- Change __copy_to_user to memdup_user +- Change __put_user to put_user +- Change type of variables to __type for compatible 32 and 64-bit systems +- Add check for maximum xfer data size +- Change lookup data mechanism to get jtag data from inode +- Add .compat_ioctl to file ops +- Add mem alignment for jtag priv data + +Comments pointed by Tobias Klauser <tklauser@distanz.ch> +- Change function names to avoid match with variable types +- Fix description for jtag_ru_test_idle in uapi jtag.h +- Fix misprints IDEL/IDLE, trough/through +--- + drivers/Kconfig | 1 + + drivers/Makefile | 1 + + drivers/jtag/Kconfig | 17 +++ + drivers/jtag/Makefile | 1 + + drivers/jtag/jtag.c | 314 ++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/jtag.h | 47 +++++++ + include/uapi/linux/jtag.h | 208 ++++++++++++++++++++++++++++++ + 7 files changed, 589 insertions(+) + create mode 100644 drivers/jtag/Kconfig + create mode 100644 drivers/jtag/Makefile + create mode 100644 drivers/jtag/jtag.c + create mode 100644 include/linux/jtag.h + create mode 100644 include/uapi/linux/jtag.h + +diff --git a/drivers/Kconfig b/drivers/Kconfig +index 4f9f990..0102bae 100644 +--- a/drivers/Kconfig ++++ b/drivers/Kconfig +@@ -228,4 +228,5 @@ source "drivers/siox/Kconfig" + + source "drivers/slimbus/Kconfig" + ++source "drivers/jtag/Kconfig" + endmenu +diff --git a/drivers/Makefile b/drivers/Makefile +index e1ce029..6d756c2 100644 +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -186,3 +186,4 @@ obj-$(CONFIG_MULTIPLEXER) += mux/ + obj-$(CONFIG_SIOX) += siox/ + obj-$(CONFIG_GNSS) += gnss/ + obj-$(CONFIG_PECI) += peci/ ++obj-$(CONFIG_JTAG) += jtag/ +diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig +new file mode 100644 +index 0000000..47771fc +--- /dev/null ++++ b/drivers/jtag/Kconfig +@@ -0,0 +1,17 @@ ++menuconfig JTAG ++ tristate "JTAG support" ++ help ++ This provides basic core functionality support for JTAG class devices. ++ Hardware that is equipped with a JTAG microcontroller can be ++ supported by using this driver's interfaces. ++ This driver exposes a set of IOCTLs to the user space for ++ the following commands: ++ SDR: Performs an IEEE 1149.1 Data Register scan ++ SIR: Performs an IEEE 1149.1 Instruction Register scan. ++ RUNTEST: Forces the IEEE 1149.1 bus to a run state for a specified ++ number of clocks or a specified time period. ++ ++ If you want this support, you should say Y here. ++ ++ To compile this driver as a module, choose M here: the module will ++ be called jtag. +diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile +new file mode 100644 +index 0000000..af37493 +--- /dev/null ++++ b/drivers/jtag/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_JTAG) += jtag.o +diff --git a/drivers/jtag/jtag.c b/drivers/jtag/jtag.c +new file mode 100644 +index 0000000..47503a1 +--- /dev/null ++++ b/drivers/jtag/jtag.c +@@ -0,0 +1,314 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Copyright (c) 2018 Mellanox Technologies. All rights reserved. ++// Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com> ++// Copyright (c) 2019 Intel Corporation ++ ++#include <linux/cdev.h> ++#include <linux/device.h> ++#include <linux/jtag.h> ++#include <linux/kernel.h> ++#include <linux/list.h> ++#include <linux/miscdevice.h> ++#include <linux/module.h> ++#include <linux/rtnetlink.h> ++#include <linux/spinlock.h> ++#include <linux/types.h> ++#include <uapi/linux/jtag.h> ++ ++struct jtag { ++ struct miscdevice miscdev; ++ const struct jtag_ops *ops; ++ int id; ++ unsigned long priv[0]; ++}; ++ ++static DEFINE_IDA(jtag_ida); ++ ++void *jtag_priv(struct jtag *jtag) ++{ ++ return jtag->priv; ++} ++EXPORT_SYMBOL_GPL(jtag_priv); ++ ++static long jtag_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ struct jtag *jtag = file->private_data; ++ struct jtag_end_tap_state endstate; ++ struct jtag_xfer xfer; ++ struct bitbang_packet bitbang; ++ struct tck_bitbang *bitbang_data; ++ struct jtag_mode mode; ++ u8 *xfer_data; ++ u32 data_size; ++ u32 value; ++ int err; ++ ++ if (!arg) ++ return -EINVAL; ++ ++ switch (cmd) { ++ case JTAG_GIOCFREQ: ++ if (!jtag->ops->freq_get) ++ return -EOPNOTSUPP; ++ ++ err = jtag->ops->freq_get(jtag, &value); ++ if (err) ++ break; ++ ++ if (put_user(value, (__u32 __user *)arg)) ++ err = -EFAULT; ++ break; ++ ++ case JTAG_SIOCFREQ: ++ if (!jtag->ops->freq_set) ++ return -EOPNOTSUPP; ++ ++ if (get_user(value, (__u32 __user *)arg)) ++ return -EFAULT; ++ if (value == 0) ++ return -EINVAL; ++ ++ err = jtag->ops->freq_set(jtag, value); ++ break; ++ ++ case JTAG_SIOCSTATE: ++ if (copy_from_user(&endstate, (const void __user *)arg, ++ sizeof(struct jtag_end_tap_state))) ++ return -EFAULT; ++ ++ if (endstate.endstate > JTAG_STATE_UPDATEIR) ++ return -EINVAL; ++ ++ if (endstate.reset > JTAG_FORCE_RESET) ++ return -EINVAL; ++ ++ err = jtag->ops->status_set(jtag, &endstate); ++ break; ++ ++ case JTAG_IOCXFER: ++ if (copy_from_user(&xfer, (const void __user *)arg, ++ sizeof(struct jtag_xfer))) ++ return -EFAULT; ++ ++ if (xfer.length >= JTAG_MAX_XFER_DATA_LEN) ++ return -EINVAL; ++ ++ if (xfer.type > JTAG_SDR_XFER) ++ return -EINVAL; ++ ++ if (xfer.direction > JTAG_READ_WRITE_XFER) ++ return -EINVAL; ++ ++ if (xfer.endstate > JTAG_STATE_UPDATEIR) ++ return -EINVAL; ++ ++ data_size = DIV_ROUND_UP(xfer.length, BITS_PER_BYTE); ++ xfer_data = memdup_user(u64_to_user_ptr(xfer.tdio), data_size); ++ if (IS_ERR(xfer_data)) ++ return -EFAULT; ++ ++ err = jtag->ops->xfer(jtag, &xfer, xfer_data); ++ if (err) { ++ kfree(xfer_data); ++ return err; ++ } ++ ++ err = copy_to_user(u64_to_user_ptr(xfer.tdio), ++ (void *)xfer_data, data_size); ++ kfree(xfer_data); ++ if (err) ++ return -EFAULT; ++ ++ if (copy_to_user((void __user *)arg, (void *)&xfer, ++ sizeof(struct jtag_xfer))) ++ return -EFAULT; ++ break; ++ ++ case JTAG_GIOCSTATUS: ++ err = jtag->ops->status_get(jtag, &value); ++ if (err) ++ break; ++ ++ err = put_user(value, (__u32 __user *)arg); ++ break; ++ case JTAG_IOCBITBANG: ++ if (copy_from_user(&bitbang, (const void __user *)arg, ++ sizeof(struct bitbang_packet))) ++ return -EFAULT; ++ ++ if (bitbang.length >= JTAG_MAX_XFER_DATA_LEN) ++ return -EINVAL; ++ ++ data_size = bitbang.length * sizeof(struct tck_bitbang); ++ bitbang_data = memdup_user((void __user *)bitbang.data, ++ data_size); ++ if (IS_ERR(bitbang_data)) ++ return -EFAULT; ++ ++ err = jtag->ops->bitbang(jtag, &bitbang, bitbang_data); ++ if (err) { ++ kfree(bitbang_data); ++ return err; ++ } ++ err = copy_to_user((void __user *)bitbang.data, ++ (void *)bitbang_data, data_size); ++ kfree(bitbang_data); ++ if (err) ++ return -EFAULT; ++ break; ++ case JTAG_SIOCMODE: ++ if (!jtag->ops->mode_set) ++ return -EOPNOTSUPP; ++ ++ if (copy_from_user(&mode, (const void __user *)arg, ++ sizeof(struct jtag_mode))) ++ return -EFAULT; ++ ++ err = jtag->ops->mode_set(jtag, &mode); ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ return err; ++} ++ ++static int jtag_open(struct inode *inode, struct file *file) ++{ ++ struct jtag *jtag = container_of(file->private_data, ++ struct jtag, ++ miscdev); ++ ++ file->private_data = jtag; ++ if (jtag->ops->enable(jtag)) ++ return -EBUSY; ++ return nonseekable_open(inode, file); ++} ++ ++static int jtag_release(struct inode *inode, struct file *file) ++{ ++ struct jtag *jtag = file->private_data; ++ ++ if (jtag->ops->disable(jtag)) ++ return -EBUSY; ++ return 0; ++} ++ ++static const struct file_operations jtag_fops = { ++ .owner = THIS_MODULE, ++ .open = jtag_open, ++ .llseek = noop_llseek, ++ .unlocked_ioctl = jtag_ioctl, ++ .release = jtag_release, ++}; ++ ++struct jtag *jtag_alloc(struct device *host, size_t priv_size, ++ const struct jtag_ops *ops) ++{ ++ struct jtag *jtag; ++ ++ if (!host) ++ return NULL; ++ ++ if (!ops) ++ return NULL; ++ ++ if (!ops->status_set || !ops->status_get || !ops->xfer) ++ return NULL; ++ ++ jtag = kzalloc(sizeof(*jtag) + priv_size, GFP_KERNEL); ++ if (!jtag) ++ return NULL; ++ ++ jtag->ops = ops; ++ jtag->miscdev.parent = host; ++ ++ return jtag; ++} ++EXPORT_SYMBOL_GPL(jtag_alloc); ++ ++void jtag_free(struct jtag *jtag) ++{ ++ kfree(jtag); ++} ++EXPORT_SYMBOL_GPL(jtag_free); ++ ++static int jtag_register(struct jtag *jtag) ++{ ++ struct device *dev = jtag->miscdev.parent; ++ int err; ++ int id; ++ ++ if (!dev) ++ return -ENODEV; ++ ++ id = ida_simple_get(&jtag_ida, 0, 0, GFP_KERNEL); ++ if (id < 0) ++ return id; ++ ++ jtag->id = id; ++ ++ jtag->miscdev.fops = &jtag_fops; ++ jtag->miscdev.minor = MISC_DYNAMIC_MINOR; ++ jtag->miscdev.name = kasprintf(GFP_KERNEL, "jtag%d", id); ++ if (!jtag->miscdev.name) { ++ err = -ENOMEM; ++ goto err_jtag_alloc; ++ } ++ ++ err = misc_register(&jtag->miscdev); ++ if (err) { ++ dev_err(jtag->miscdev.parent, "Unable to register device\n"); ++ goto err_jtag_name; ++ } ++ return 0; ++ ++err_jtag_name: ++ kfree(jtag->miscdev.name); ++err_jtag_alloc: ++ ida_simple_remove(&jtag_ida, id); ++ return err; ++} ++ ++static void jtag_unregister(struct jtag *jtag) ++{ ++ misc_deregister(&jtag->miscdev); ++ kfree(jtag->miscdev.name); ++ ida_simple_remove(&jtag_ida, jtag->id); ++} ++ ++static void devm_jtag_unregister(struct device *dev, void *res) ++{ ++ jtag_unregister(*(struct jtag **)res); ++} ++ ++int devm_jtag_register(struct device *dev, struct jtag *jtag) ++{ ++ struct jtag **ptr; ++ int ret; ++ ++ ptr = devres_alloc(devm_jtag_unregister, sizeof(*ptr), GFP_KERNEL); ++ if (!ptr) ++ return -ENOMEM; ++ ++ ret = jtag_register(jtag); ++ if (!ret) { ++ *ptr = jtag; ++ devres_add(dev, ptr); ++ } else { ++ devres_free(ptr); ++ } ++ return ret; ++} ++EXPORT_SYMBOL_GPL(devm_jtag_register); ++ ++static void __exit jtag_exit(void) ++{ ++ ida_destroy(&jtag_ida); ++} ++ ++module_exit(jtag_exit); ++ ++MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>"); ++MODULE_DESCRIPTION("Generic jtag support"); ++MODULE_LICENSE("GPL v2"); +diff --git a/include/linux/jtag.h b/include/linux/jtag.h +new file mode 100644 +index 0000000..4153c90 +--- /dev/null ++++ b/include/linux/jtag.h +@@ -0,0 +1,47 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018 Mellanox Technologies. All rights reserved. */ ++/* Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com> */ ++/* Copyright (c) 2019 Intel Corporation */ ++ ++#ifndef __LINUX_JTAG_H ++#define __LINUX_JTAG_H ++ ++#include <linux/types.h> ++#include <uapi/linux/jtag.h> ++ ++#define JTAG_MAX_XFER_DATA_LEN 65535 ++ ++struct jtag; ++/** ++ * struct jtag_ops - callbacks for JTAG control functions: ++ * ++ * @freq_get: get frequency function. Filled by dev driver ++ * @freq_set: set frequency function. Filled by dev driver ++ * @status_get: get JTAG TAPC state function. Mandatory, Filled by dev driver ++ * @status_set: set JTAG TAPC state function. Mandatory, Filled by dev driver ++ * @xfer: send JTAG xfer function. Mandatory func. Filled by dev driver ++ * @mode_set: set specific work mode for JTAG. Filled by dev driver ++ * @bitbang: set low level bitbang operations. Filled by dev driver ++ * @enable: enables JTAG interface in master mode. Filled by dev driver ++ * @disable: disables JTAG interface master mode. Filled by dev driver ++ */ ++struct jtag_ops { ++ int (*freq_get)(struct jtag *jtag, u32 *freq); ++ int (*freq_set)(struct jtag *jtag, u32 freq); ++ int (*status_get)(struct jtag *jtag, u32 *state); ++ int (*status_set)(struct jtag *jtag, struct jtag_end_tap_state *endst); ++ int (*xfer)(struct jtag *jtag, struct jtag_xfer *xfer, u8 *xfer_data); ++ int (*mode_set)(struct jtag *jtag, struct jtag_mode *jtag_mode); ++ int (*bitbang)(struct jtag *jtag, struct bitbang_packet *bitbang, ++ struct tck_bitbang *bitbang_data); ++ int (*enable)(struct jtag *jtag); ++ int (*disable)(struct jtag *jtag); ++}; ++ ++void *jtag_priv(struct jtag *jtag); ++int devm_jtag_register(struct device *dev, struct jtag *jtag); ++struct jtag *jtag_alloc(struct device *host, size_t priv_size, ++ const struct jtag_ops *ops); ++void jtag_free(struct jtag *jtag); ++ ++#endif /* __LINUX_JTAG_H */ +diff --git a/include/uapi/linux/jtag.h b/include/uapi/linux/jtag.h +new file mode 100644 +index 0000000..3f9e195 +--- /dev/null ++++ b/include/uapi/linux/jtag.h +@@ -0,0 +1,208 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018 Mellanox Technologies. All rights reserved. */ ++/* Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com> */ ++/* Copyright (c) 2019 Intel Corporation */ ++ ++#ifndef __UAPI_LINUX_JTAG_H ++#define __UAPI_LINUX_JTAG_H ++ ++/* ++ * JTAG_XFER_MODE: JTAG transfer mode. Used to set JTAG controller transfer mode ++ * This is bitmask for feature param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_XFER_MODE 0 ++/* ++ * JTAG_CONTROL_MODE: JTAG controller mode. Used to set JTAG controller mode ++ * This is bitmask for feature param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_CONTROL_MODE 1 ++/* ++ * JTAG_MASTER_OUTPUT_DISABLE: JTAG master mode output disable, it is used to ++ * enable other devices to own the JTAG bus. ++ * This is bitmask for mode param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_MASTER_OUTPUT_DISABLE 0 ++/* ++ * JTAG_MASTER_MODE: JTAG master mode. Used to set JTAG controller master mode ++ * This is bitmask for mode param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_MASTER_MODE 1 ++/* ++ * JTAG_XFER_HW_MODE: JTAG hardware mode. Used to set HW drived or bitbang ++ * mode. This is bitmask for mode param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_XFER_HW_MODE 1 ++/* ++ * JTAG_XFER_SW_MODE: JTAG software mode. Used to set SW drived or bitbang ++ * mode. This is bitmask for mode param in jtag_mode for ioctl JTAG_SIOCMODE ++ */ ++#define JTAG_XFER_SW_MODE 0 ++ ++/** ++ * enum jtag_endstate: ++ * ++ * @JTAG_STATE_TLRESET: JTAG state machine Test Logic Reset state ++ * @JTAG_STATE_IDLE: JTAG state machine IDLE state ++ * @JTAG_STATE_SELECTDR: JTAG state machine SELECT_DR state ++ * @JTAG_STATE_CAPTUREDR: JTAG state machine CAPTURE_DR state ++ * @JTAG_STATE_SHIFTDR: JTAG state machine SHIFT_DR state ++ * @JTAG_STATE_EXIT1DR: JTAG state machine EXIT-1 DR state ++ * @JTAG_STATE_PAUSEDR: JTAG state machine PAUSE_DR state ++ * @JTAG_STATE_EXIT2DR: JTAG state machine EXIT-2 DR state ++ * @JTAG_STATE_UPDATEDR: JTAG state machine UPDATE DR state ++ * @JTAG_STATE_SELECTIR: JTAG state machine SELECT_IR state ++ * @JTAG_STATE_CAPTUREIR: JTAG state machine CAPTURE_IR state ++ * @JTAG_STATE_SHIFTIR: JTAG state machine SHIFT_IR state ++ * @JTAG_STATE_EXIT1IR: JTAG state machine EXIT-1 IR state ++ * @JTAG_STATE_PAUSEIR: JTAG state machine PAUSE_IR state ++ * @JTAG_STATE_EXIT2IR: JTAG state machine EXIT-2 IR state ++ * @JTAG_STATE_UPDATEIR: JTAG state machine UPDATE IR state ++ */ ++enum jtag_endstate { ++ JTAG_STATE_TLRESET, ++ JTAG_STATE_IDLE, ++ JTAG_STATE_SELECTDR, ++ JTAG_STATE_CAPTUREDR, ++ JTAG_STATE_SHIFTDR, ++ JTAG_STATE_EXIT1DR, ++ JTAG_STATE_PAUSEDR, ++ JTAG_STATE_EXIT2DR, ++ JTAG_STATE_UPDATEDR, ++ JTAG_STATE_SELECTIR, ++ JTAG_STATE_CAPTUREIR, ++ JTAG_STATE_SHIFTIR, ++ JTAG_STATE_EXIT1IR, ++ JTAG_STATE_PAUSEIR, ++ JTAG_STATE_EXIT2IR, ++ JTAG_STATE_UPDATEIR ++}; ++ ++/** ++ * enum jtag_reset: ++ * ++ * @JTAG_NO_RESET: JTAG run TAP from current state ++ * @JTAG_FORCE_RESET: JTAG force TAP to reset state ++ */ ++enum jtag_reset { ++ JTAG_NO_RESET = 0, ++ JTAG_FORCE_RESET = 1, ++}; ++ ++/** ++ * enum jtag_xfer_type: ++ * ++ * @JTAG_SIR_XFER: SIR transfer ++ * @JTAG_SDR_XFER: SDR transfer ++ */ ++enum jtag_xfer_type { ++ JTAG_SIR_XFER = 0, ++ JTAG_SDR_XFER = 1, ++}; ++ ++/** ++ * enum jtag_xfer_direction: ++ * ++ * @JTAG_READ_XFER: read transfer ++ * @JTAG_WRITE_XFER: write transfer ++ * @JTAG_READ_WRITE_XFER: read & write transfer ++ */ ++enum jtag_xfer_direction { ++ JTAG_READ_XFER = 1, ++ JTAG_WRITE_XFER = 2, ++ JTAG_READ_WRITE_XFER = 3, ++}; ++ ++/** ++ * struct jtag_end_tap_state - forces JTAG state machine to go into a TAPC ++ * state ++ * ++ * @reset: 0 - run IDLE/PAUSE from current state ++ * 1 - go through TEST_LOGIC/RESET state before IDLE/PAUSE ++ * @end: completion flag ++ * @tck: clock counter ++ * ++ * Structure provide interface to JTAG device for JTAG set state execution. ++ */ ++struct jtag_end_tap_state { ++ __u8 reset; ++ __u8 endstate; ++ __u8 tck; ++}; ++ ++/** ++ * struct jtag_xfer - jtag xfer: ++ * ++ * @type: transfer type ++ * @direction: xfer direction ++ * @length: xfer bits len ++ * @tdio : xfer data array ++ * @endir: xfer end state ++ * ++ * Structure provide interface to JTAG device for JTAG SDR/SIR xfer execution. ++ */ ++struct jtag_xfer { ++ __u8 type; ++ __u8 direction; ++ __u8 endstate; ++ __u8 padding; ++ __u32 length; ++ __u64 tdio; ++}; ++ ++/** ++ * struct bitbang_packet - jtag bitbang array packet: ++ * ++ * @data: JTAG Bitbang struct array pointer(input/output) ++ * @length: array size (input) ++ * ++ * Structure provide interface to JTAG device for JTAG bitbang bundle execution ++ */ ++struct bitbang_packet { ++ struct tck_bitbang *data; ++ __u32 length; ++} __attribute__((__packed__)); ++ ++/** ++ * struct jtag_bitbang - jtag bitbang: ++ * ++ * @tms: JTAG TMS ++ * @tdi: JTAG TDI (input) ++ * @tdo: JTAG TDO (output) ++ * ++ * Structure provide interface to JTAG device for JTAG bitbang execution. ++ */ ++struct tck_bitbang { ++ __u8 tms; ++ __u8 tdi; ++ __u8 tdo; ++} __attribute__((__packed__)); ++ ++/** ++ * struct jtag_mode - jtag mode: ++ * ++ * @feature: 0 - JTAG feature setting selector for JTAG controller HW/SW ++ * 1 - JTAG feature setting selector for controller bus master ++ * mode output (enable / disable). ++ * @mode: (0 - SW / 1 - HW) for JTAG_XFER_MODE feature(0) ++ * (0 - output disable / 1 - output enable) for JTAG_CONTROL_MODE ++ * feature(1) ++ * ++ * Structure provide configuration modes to JTAG device. ++ */ ++struct jtag_mode { ++ __u32 feature; ++ __u32 mode; ++}; ++ ++/* ioctl interface */ ++#define __JTAG_IOCTL_MAGIC 0xb2 ++ ++#define JTAG_SIOCSTATE _IOW(__JTAG_IOCTL_MAGIC, 0, struct jtag_end_tap_state) ++#define JTAG_SIOCFREQ _IOW(__JTAG_IOCTL_MAGIC, 1, unsigned int) ++#define JTAG_GIOCFREQ _IOR(__JTAG_IOCTL_MAGIC, 2, unsigned int) ++#define JTAG_IOCXFER _IOWR(__JTAG_IOCTL_MAGIC, 3, struct jtag_xfer) ++#define JTAG_GIOCSTATUS _IOWR(__JTAG_IOCTL_MAGIC, 4, enum jtag_endstate) ++#define JTAG_SIOCMODE _IOW(__JTAG_IOCTL_MAGIC, 5, unsigned int) ++#define JTAG_IOCBITBANG _IOW(__JTAG_IOCTL_MAGIC, 6, unsigned int) ++ ++#endif /* __UAPI_LINUX_JTAG_H */ +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0053-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0053-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG.patch new file mode 100644 index 000000000..d5d43f31b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0053-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG.patch @@ -0,0 +1,1282 @@ +From 817a43d1b1e197e7eff43492599469bbc23bf0fd Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Fri, 17 May 2019 11:18:13 -0800 +Subject: [PATCH v29 2/6] Add Aspeed SoC 24xx and 25xx families JTAG master + driver + +Driver adds support of Aspeed 2500/2400 series SOC JTAG master controller. + +Driver implements the following jtag ops: +- freq_get; +- freq_set; +- status_get; +- status_set +- xfer; +- mode_set; +- bitbang; +- enable; +- disable; + +It has been tested on Mellanox system with BMC equipped with +Aspeed 2520 SoC for programming CPLD devices. + +It has also been tested on Intel system using Aspeed 25xx SoC +for JTAG communication. + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Jiri Pirko <jiri@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Arnd Bergmann <arnd@arndb.de> +Acked-by: Philippe Ombredanne <pombredanne@nexb.com> +Acked-by: Joel Stanley <joel@jms.id.au> +Cc: Vadim Pasternak <vadimp@mellanox.com> +Cc: Andrew Jeffery <andrew@aj.id.au> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- +v28->v29 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Expand bitbang function to accept multiples bitbang operations within a + single JTAG_IOCBITBANG call. It will receive a buffer with TDI and TMS + values and it is expected that driver fills TDO fields with its + corresponding output value for every transaction. +- Always setup JTAG controller to master mode but disable JTAG output when + the driver is not in use to allow other HW to own the JTAG bus. Remove SCU + register accesses. This register controls the JTAG controller mode + (master/slave). +- Encansulate dev_dgb message into DEBUG_JTAG macros to improve driver's JTAG + performace. + +v27->v28 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Replace JTAG_IOCRUNTEST with JTAG_SIOCSTATE adding support for all TAPC + end states in SW mode using a lookup table to navigate across states. +- Add support for simultaneous READ/WRITE transfers(JTAG_READ_WRITE_XFER). +- Support for switching JTAG controller mode between slave and master + mode. +- Setup JTAG controller mode to master only when the driver is opened, + letting other HW to own the JTAG bus when it isn't in use. +- Include JTAG bit bang IOCTL for low level JTAG control usage + (JTAG_IOCBITBANG). +- Add debug traces. +- Add support for register polling (default) due it is 3 times faster than + interrupt mode. Define USE_INTERRUPTS macro to enable interrupt usage. +- Remove unnecessary delays for aspeed_jtag_status_set function. It makes + SW mode 4 times faster. +- Clean data buffer on aspeed_jtag_xfer_sw before tdo writes to avoid data + output corruption for read operations in SW mode. +- Correct register settings for HW mode transfer operations. +- Propagate ret codes all the way from low level functions up to + JTAG_IOCXFER call. +- Support for partitioned transfers. Single JTAG transfer through + multiples JTAG_IOCXFER calls. Now end transmission(scan_end) also + evaluates transfer end state. + +v26->v27 +Changes made by Oleksandr Shamray <oleksandrs@mellamnox.com> +- change aspeed_jtag_sw_delay to udelay function in bit-bang operation + +v25->v26 +v24->v25 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- reduced debug printouts + +v23->v24 +v22->v23 +v21->v22 +Comments pointed by Andy Shevchenko <andy.shevchenko@gmail.com> +- rearrange ASPEED register defines +- simplified JTAG divider calculation formula +- change delay function in bit-bang operation +- add helper functions for TAP states switching +- remove unnecessary comments +- remove redundant debug messages +- make dines for repetative register bit sets +- fixed indentation +- change checks from negative to positive +- add error check for clk_prepare_enable +- rework driver alloc/register to devm_ variant +- Increasing line length up to 85 in order to improve readability + +v20->v21 +v19->v20 +Notifications from kbuild test robot <lkp@intel.com> +- add static declaration to 'aspeed_jtag_init' and + 'aspeed_jtag_deinit' functions + +v18->v19 +v17->v18 +v16->v17 +v15->v16 +Comments pointed by Joel Stanley <joel.stan@gmail.com> +- Add reset_control on Jtag init/deinit + +v14->v15 +Comments pointed by Joel Stanley <joel.stan@gmail.com> +- Add ARCH_ASPEED || COMPILE_TEST to Kconfig +- remove unused offset variable +- remove "aspeed_jtag" from dev_err and dev_dbg messages +- change clk_prepare_enable initialisation order + +v13->v14 +Comments pointed by Philippe Ombredanne <pombredanne@nexb.com> +- Change style of head block comment from /**/ to // + +v12->v13 +Comments pointed by Philippe Ombredanne <pombredanne@nexb.com> +- Change jtag-aspeed.c licence type to + SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note + and reorder line with license- add reset descriptions in bndings file + in description +Comments pointed by Kun Yi <kunyi@google.com> +- Changed capability check for aspeed,ast2400-jtag/ast200-jtag + +v11->v12 +Comments pointed by Chip Bilbrey <chip@bilbrey.org> +- Remove access mode from xfer and idle transactions +- Add new ioctl JTAG_SIOCMODE for set hw mode + +v10->v11 +v9->v10 +V8->v9 +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- add *data parameter to xfer function prototype + +v7->v8 +Comments pointed by Joel Stanley <joel.stan@gmail.com> +- aspeed_jtag_init replace goto to return; +- change input variables type from __u32 to u32 + in functios freq_get, freq_set, status_get +- change sm_ variables type from char to u8 +- in jatg_init add disable clocks on error case +- remove release_mem_region on error case +- remove devm_free_irq on jtag_deinit +- Fix misspelling Disabe/Disable +- Change compatible string to ast2400 and ast2000 + +v6->v7 +Notifications from kbuild test robot <lkp@intel.com> +- Add include <linux/types.h> to jtag-asapeed.c + +v5->v6 +v4->v5 +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- Added HAS_IOMEM dependence in Kconfig to avoid + "undefined reference to `devm_ioremap_resource'" error, + because in some arch this not supported + +v3->v4 +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- change transaction pointer tdio type to __u64 +- change internal status type from enum to __u32 + +v2->v3 + +v1->v2 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- change license type from GPLv2/BSD to GPLv2 + +Comments pointed by Neil Armstrong <narmstrong@baylibre.com> +- Add clk_prepare_enable/clk_disable_unprepare in clock init/deinit +- Change .compatible to soc-specific compatible names + aspeed,aspeed4000-jtag/aspeed5000-jtag +- Added dt-bindings + +Comments pointed by Arnd Bergmann <arnd@arndb.de> +- Reorder functions and removed the forward declarations +- Add static const qualifier to state machine states transitions +- Change .compatible to soc-specific compatible names + aspeed,aspeed4000-jtag/aspeed5000-jtag +- Add dt-bindings + +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- Change module name jtag-aspeed in description in Kconfig + +Comments pointed by kbuild test robot <lkp@intel.com> +- Remove invalid include <asm/mach-types.h> +- add resource_size instead of calculation +--- + drivers/jtag/Kconfig | 14 + + drivers/jtag/Makefile | 1 + + drivers/jtag/jtag-aspeed.c | 1040 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 1055 insertions(+) + create mode 100644 drivers/jtag/jtag-aspeed.c + +diff --git a/drivers/jtag/Kconfig b/drivers/jtag/Kconfig +index 47771fc..0cc163f 100644 +--- a/drivers/jtag/Kconfig ++++ b/drivers/jtag/Kconfig +@@ -15,3 +15,17 @@ menuconfig JTAG + + To compile this driver as a module, choose M here: the module will + be called jtag. ++ ++menuconfig JTAG_ASPEED ++ tristate "Aspeed SoC JTAG controller support" ++ depends on JTAG && HAS_IOMEM ++ depends on ARCH_ASPEED || COMPILE_TEST ++ help ++ This provides a support for Aspeed JTAG device, equipped on ++ Aspeed SoC 24xx and 25xx families. Drivers allows programming ++ of hardware devices, connected to SoC through the JTAG interface. ++ ++ If you want this support, you should say Y here. ++ ++ To compile this driver as a module, choose M here: the module will ++ be called jtag-aspeed. +diff --git a/drivers/jtag/Makefile b/drivers/jtag/Makefile +index af37493..04a855e 100644 +--- a/drivers/jtag/Makefile ++++ b/drivers/jtag/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_JTAG) += jtag.o ++obj-$(CONFIG_JTAG_ASPEED) += jtag-aspeed.o +diff --git a/drivers/jtag/jtag-aspeed.c b/drivers/jtag/jtag-aspeed.c +new file mode 100644 +index 0000000..1d41a66 +--- /dev/null ++++ b/drivers/jtag/jtag-aspeed.c +@@ -0,0 +1,1040 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018 Mellanox Technologies. All rights reserved. ++// Copyright (c) 2018 Oleksandr Shamray <oleksandrs@mellanox.com> ++// Copyright (c) 2019 Intel Corporation ++ ++#include <linux/clk.h> ++#include <linux/device.h> ++#include <linux/interrupt.h> ++#include <linux/jtag.h> ++#include <linux/kernel.h> ++#include <linux/module.h> ++#include <linux/of_address.h> ++#include <linux/platform_device.h> ++#include <linux/reset.h> ++#include <linux/slab.h> ++#include <linux/types.h> ++#include <linux/delay.h> ++#include <uapi/linux/jtag.h> ++ ++#define ASPEED_SCU_RESET_JTAG BIT(22) ++ ++#define ASPEED_JTAG_DATA 0x00 ++#define ASPEED_JTAG_INST 0x04 ++#define ASPEED_JTAG_CTRL 0x08 ++#define ASPEED_JTAG_ISR 0x0C ++#define ASPEED_JTAG_SW 0x10 ++#define ASPEED_JTAG_TCK 0x14 ++#define ASPEED_JTAG_EC 0x18 ++ ++#define ASPEED_JTAG_DATA_MSB 0x01 ++#define ASPEED_JTAG_DATA_CHUNK_SIZE 0x20 ++ ++/* ASPEED_JTAG_CTRL: Engine Control */ ++#define ASPEED_JTAG_CTL_ENG_EN BIT(31) ++#define ASPEED_JTAG_CTL_ENG_OUT_EN BIT(30) ++#define ASPEED_JTAG_CTL_FORCE_TMS BIT(29) ++#define ASPEED_JTAG_CTL_IR_UPDATE BIT(26) ++#define ASPEED_JTAG_CTL_INST_LEN(x) ((x) << 20) ++#define ASPEED_JTAG_CTL_LASPEED_INST BIT(17) ++#define ASPEED_JTAG_CTL_INST_EN BIT(16) ++#define ASPEED_JTAG_CTL_DR_UPDATE BIT(10) ++#define ASPEED_JTAG_CTL_DATA_LEN(x) ((x) << 4) ++#define ASPEED_JTAG_CTL_LASPEED_DATA BIT(1) ++#define ASPEED_JTAG_CTL_DATA_EN BIT(0) ++ ++/* ASPEED_JTAG_ISR : Interrupt status and enable */ ++#define ASPEED_JTAG_ISR_INST_PAUSE BIT(19) ++#define ASPEED_JTAG_ISR_INST_COMPLETE BIT(18) ++#define ASPEED_JTAG_ISR_DATA_PAUSE BIT(17) ++#define ASPEED_JTAG_ISR_DATA_COMPLETE BIT(16) ++#define ASPEED_JTAG_ISR_INST_PAUSE_EN BIT(3) ++#define ASPEED_JTAG_ISR_INST_COMPLETE_EN BIT(2) ++#define ASPEED_JTAG_ISR_DATA_PAUSE_EN BIT(1) ++#define ASPEED_JTAG_ISR_DATA_COMPLETE_EN BIT(0) ++#define ASPEED_JTAG_ISR_INT_EN_MASK GENMASK(3, 0) ++#define ASPEED_JTAG_ISR_INT_MASK GENMASK(19, 16) ++ ++/* ASPEED_JTAG_SW : Software Mode and Status */ ++#define ASPEED_JTAG_SW_MODE_EN BIT(19) ++#define ASPEED_JTAG_SW_MODE_TCK BIT(18) ++#define ASPEED_JTAG_SW_MODE_TMS BIT(17) ++#define ASPEED_JTAG_SW_MODE_TDIO BIT(16) ++ ++/* ASPEED_JTAG_TCK : TCK Control */ ++#define ASPEED_JTAG_TCK_DIVISOR_MASK GENMASK(10, 0) ++#define ASPEED_JTAG_TCK_GET_DIV(x) ((x) & ASPEED_JTAG_TCK_DIVISOR_MASK) ++ ++/* ASPEED_JTAG_EC : Controller set for go to IDLE */ ++#define ASPEED_JTAG_EC_GO_IDLE BIT(0) ++ ++#define ASPEED_JTAG_IOUT_LEN(len) \ ++ (ASPEED_JTAG_CTL_ENG_EN | \ ++ ASPEED_JTAG_CTL_ENG_OUT_EN | \ ++ ASPEED_JTAG_CTL_INST_LEN(len)) ++ ++#define ASPEED_JTAG_DOUT_LEN(len) \ ++ (ASPEED_JTAG_CTL_ENG_EN | \ ++ ASPEED_JTAG_CTL_ENG_OUT_EN | \ ++ ASPEED_JTAG_CTL_DATA_LEN(len)) ++ ++#define ASPEED_JTAG_SW_TDIO (ASPEED_JTAG_SW_MODE_EN | ASPEED_JTAG_SW_MODE_TDIO) ++ ++#define ASPEED_JTAG_GET_TDI(direction, byte) \ ++ (((direction) & JTAG_WRITE_XFER) ? byte : UINT_MAX) ++ ++#define ASPEED_JTAG_TCK_WAIT 10 ++#define ASPEED_JTAG_RESET_CNTR 10 ++#define WAIT_ITERATIONS 75 ++ ++/*#define USE_INTERRUPTS*/ ++ ++static const char * const regnames[] = { ++ [ASPEED_JTAG_DATA] = "ASPEED_JTAG_DATA", ++ [ASPEED_JTAG_INST] = "ASPEED_JTAG_INST", ++ [ASPEED_JTAG_CTRL] = "ASPEED_JTAG_CTRL", ++ [ASPEED_JTAG_ISR] = "ASPEED_JTAG_ISR", ++ [ASPEED_JTAG_SW] = "ASPEED_JTAG_SW", ++ [ASPEED_JTAG_TCK] = "ASPEED_JTAG_TCK", ++ [ASPEED_JTAG_EC] = "ASPEED_JTAG_EC", ++}; ++ ++#define ASPEED_JTAG_NAME "jtag-aspeed" ++ ++struct aspeed_jtag { ++ void __iomem *reg_base; ++ struct device *dev; ++ struct clk *pclk; ++ enum jtag_endstate status; ++ int irq; ++ struct reset_control *rst; ++ u32 flag; ++ wait_queue_head_t jtag_wq; ++ u32 mode; ++}; ++ ++/* ++ * This structure represents a TMS cycle, as expressed in a set of bits and a ++ * count of bits (note: there are no start->end state transitions that require ++ * more than 1 byte of TMS cycles) ++ */ ++struct tms_cycle { ++ unsigned char tmsbits; ++ unsigned char count; ++}; ++ ++/* ++ * This is the complete set TMS cycles for going from any TAP state to any ++ * other TAP state, following a "shortest path" rule. ++ */ ++static const struct tms_cycle _tms_cycle_lookup[][16] = { ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* TLR */{{0x00, 0}, {0x00, 1}, {0x02, 2}, {0x02, 3}, {0x02, 4}, {0x0a, 4}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x0a, 5}, {0x2a, 6}, {0x1a, 5}, {0x06, 3}, {0x06, 4}, {0x06, 5}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x16, 5}, {0x16, 6}, {0x56, 7}, {0x36, 6} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* RTI */{{0x07, 3}, {0x00, 0}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x05, 4}, {0x15, 5}, {0x0d, 4}, {0x03, 2}, {0x03, 3}, {0x03, 4}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* SelDR*/{{0x03, 2}, {0x03, 3}, {0x00, 0}, {0x00, 1}, {0x00, 2}, {0x02, 2}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x02, 3}, {0x0a, 4}, {0x06, 3}, {0x01, 1}, {0x01, 2}, {0x01, 3}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x05, 3}, {0x05, 4}, {0x15, 5}, {0x0d, 4} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* CapDR*/{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x00, 0}, {0x00, 1}, {0x01, 1}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x01, 2}, {0x05, 3}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* SDR */{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x00, 0}, {0x01, 1}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x01, 2}, {0x05, 3}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* Ex1DR*/{{0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x02, 3}, {0x00, 0}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x00, 1}, {0x02, 2}, {0x01, 1}, {0x07, 3}, {0x07, 4}, {0x07, 5}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* PDR */{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x01, 2}, {0x05, 3}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x00, 0}, {0x01, 1}, {0x03, 2}, {0x0f, 4}, {0x0f, 5}, {0x0f, 6}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x2f, 6}, {0x2f, 7}, {0xaf, 8}, {0x6f, 7} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* Ex2DR*/{{0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x00, 1}, {0x02, 2}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x02, 3}, {0x00, 0}, {0x01, 1}, {0x07, 3}, {0x07, 4}, {0x07, 5}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x17, 5}, {0x17, 6}, {0x57, 7}, {0x37, 6} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* UpdDR*/{{0x07, 3}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x05, 4}, {0x15, 5}, {0x00, 0}, {0x03, 2}, {0x03, 3}, {0x03, 4}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x1b, 5} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* SelIR*/{{0x01, 1}, {0x01, 2}, {0x05, 3}, {0x05, 4}, {0x05, 5}, {0x15, 5}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x15, 6}, {0x55, 7}, {0x35, 6}, {0x00, 0}, {0x00, 1}, {0x00, 2}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x02, 2}, {0x02, 3}, {0x0a, 4}, {0x06, 3} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* CapIR*/{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x00, 0}, {0x00, 1}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* SIR */{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x0f, 5}, {0x00, 0}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x01, 1}, {0x01, 2}, {0x05, 3}, {0x03, 2} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* Ex1IR*/{{0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x0b, 5}, {0x2b, 6}, {0x1b, 5}, {0x07, 3}, {0x07, 4}, {0x02, 3}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x00, 0}, {0x00, 1}, {0x02, 2}, {0x01, 1} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* PIR */{{0x1f, 5}, {0x03, 3}, {0x07, 3}, {0x07, 4}, {0x07, 5}, {0x17, 5}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x17, 6}, {0x57, 7}, {0x37, 6}, {0x0f, 4}, {0x0f, 5}, {0x01, 2}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x05, 3}, {0x00, 0}, {0x01, 1}, {0x03, 2} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* Ex2IR*/{{0x0f, 4}, {0x01, 2}, {0x03, 2}, {0x03, 3}, {0x03, 4}, {0x0b, 4}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x0b, 5}, {0x2b, 6}, {0x1b, 5}, {0x07, 3}, {0x07, 4}, {0x00, 1}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x02, 2}, {0x02, 3}, {0x00, 0}, {0x01, 1} }, ++ ++/* TLR RTI SelDR CapDR SDR Ex1DR*/ ++/* UpdIR*/{{0x07, 3}, {0x00, 1}, {0x01, 1}, {0x01, 2}, {0x01, 3}, {0x05, 3}, ++/* PDR Ex2DR UpdDR SelIR CapIR SIR*/ ++ {0x05, 4}, {0x15, 5}, {0x0d, 4}, {0x03, 2}, {0x03, 3}, {0x03, 4}, ++/* Ex1IR PIR Ex2IR UpdIR*/ ++ {0x0b, 4}, {0x0b, 5}, {0x2b, 6}, {0x00, 0} }, ++}; ++ ++static char *end_status_str[] = { ++ "tlr", "idle", "selDR", "capDR", "sDR", "ex1DR", "pDR", "ex2DR", ++ "updDR", "selIR", "capIR", "sIR", "ex1IR", "pIR", "ex2IR", "updIR" ++}; ++ ++static u32 aspeed_jtag_read(struct aspeed_jtag *aspeed_jtag, u32 reg) ++{ ++ u32 val = readl(aspeed_jtag->reg_base + reg); ++ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "read:%s val = 0x%08x\n", regnames[reg], val); ++#endif ++ return val; ++} ++ ++static void ++aspeed_jtag_write(struct aspeed_jtag *aspeed_jtag, u32 val, u32 reg) ++{ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "write:%s val = 0x%08x\n", ++ regnames[reg], val); ++#endif ++ writel(val, aspeed_jtag->reg_base + reg); ++} ++ ++static int aspeed_jtag_freq_set(struct jtag *jtag, u32 freq) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ unsigned long apb_frq; ++ u32 tck_val; ++ u16 div; ++ ++ apb_frq = clk_get_rate(aspeed_jtag->pclk); ++ if (!apb_frq) ++ return -ENOTSUPP; ++ ++ div = (apb_frq - 1) / freq; ++ tck_val = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK); ++ aspeed_jtag_write(aspeed_jtag, ++ (tck_val & ~ASPEED_JTAG_TCK_DIVISOR_MASK) | div, ++ ASPEED_JTAG_TCK); ++ return 0; ++} ++ ++static int aspeed_jtag_freq_get(struct jtag *jtag, u32 *frq) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ u32 pclk; ++ u32 tck; ++ ++ pclk = clk_get_rate(aspeed_jtag->pclk); ++ tck = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_TCK); ++ *frq = pclk / (ASPEED_JTAG_TCK_GET_DIV(tck) + 1); ++ ++ return 0; ++} ++ ++static inline void aspeed_jtag_output_disable(struct aspeed_jtag *aspeed_jtag) ++{ ++ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL); ++} ++ ++static inline void aspeed_jtag_master(struct aspeed_jtag *aspeed_jtag) ++{ ++ aspeed_jtag_write(aspeed_jtag, (ASPEED_JTAG_CTL_ENG_EN | ++ ASPEED_JTAG_CTL_ENG_OUT_EN), ++ ASPEED_JTAG_CTRL); ++ ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN | ++ ASPEED_JTAG_SW_MODE_TDIO, ++ ASPEED_JTAG_SW); ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE | ++ ASPEED_JTAG_ISR_INST_COMPLETE | ++ ASPEED_JTAG_ISR_DATA_PAUSE | ++ ASPEED_JTAG_ISR_DATA_COMPLETE | ++ ASPEED_JTAG_ISR_INST_PAUSE_EN | ++ ASPEED_JTAG_ISR_INST_COMPLETE_EN | ++ ASPEED_JTAG_ISR_DATA_PAUSE_EN | ++ ASPEED_JTAG_ISR_DATA_COMPLETE_EN, ++ ASPEED_JTAG_ISR); /* Enable Interrupt */ ++} ++ ++static int aspeed_jtag_mode_set(struct jtag *jtag, struct jtag_mode *jtag_mode) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++ switch (jtag_mode->feature) { ++ case JTAG_XFER_MODE: ++ aspeed_jtag->mode = jtag_mode->mode; ++ break; ++ case JTAG_CONTROL_MODE: ++ if (jtag_mode->mode == JTAG_MASTER_OUTPUT_DISABLE) ++ aspeed_jtag_output_disable(aspeed_jtag); ++ else if (jtag_mode->mode == JTAG_MASTER_MODE) ++ aspeed_jtag_master(aspeed_jtag); ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static char aspeed_jtag_tck_cycle(struct aspeed_jtag *aspeed_jtag, ++ u8 tms, u8 tdi) ++{ ++ char tdo = 0; ++ ++ /* TCK = 0 */ ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN | ++ (tms * ASPEED_JTAG_SW_MODE_TMS) | ++ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW); ++ ++ aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW); ++ ++ /* TCK = 1 */ ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_MODE_EN | ++ ASPEED_JTAG_SW_MODE_TCK | ++ (tms * ASPEED_JTAG_SW_MODE_TMS) | ++ (tdi * ASPEED_JTAG_SW_MODE_TDIO), ASPEED_JTAG_SW); ++ ++ if (aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_SW) & ++ ASPEED_JTAG_SW_MODE_TDIO) ++ tdo = 1; ++ ++ return tdo; ++} ++ ++static int aspeed_jtag_bitbang(struct jtag *jtag, ++ struct bitbang_packet *bitbang, ++ struct tck_bitbang *bitbang_data) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ int i = 0; ++ ++ for (i = 0; i < bitbang->length; i++) { ++ bitbang_data[i].tdo = ++ aspeed_jtag_tck_cycle(aspeed_jtag, bitbang_data[i].tms, ++ bitbang_data[i].tdi); ++ } ++ return 0; ++} ++ ++static int aspeed_jtag_wait_instruction_pause(struct aspeed_jtag *aspeed_jtag) ++{ ++ int res = 0; ++#ifdef USE_INTERRUPTS ++ res = wait_event_interruptible(aspeed_jtag->jtag_wq, ++ aspeed_jtag->flag & ++ ASPEED_JTAG_ISR_INST_PAUSE); ++ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_PAUSE; ++#else ++ u32 status = 0; ++ u32 iterations = 0; ++ ++ while ((status & ASPEED_JTAG_ISR_INST_PAUSE) == 0) { ++ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR); ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "%s = 0x%08x\n", __func__, status); ++#endif ++ iterations++; ++ if (iterations > WAIT_ITERATIONS) { ++ dev_err(aspeed_jtag->dev, ++ "aspeed_jtag driver timed out waiting for instruction pause complete\n"); ++ res = -EFAULT; ++ break; ++ } ++ if ((status & ASPEED_JTAG_ISR_DATA_COMPLETE) == 0) { ++ if (iterations % 25 == 0) ++ usleep_range(1, 5); ++ else ++ udelay(1); ++ } ++ } ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_PAUSE | ++ (status & 0xf), ++ ASPEED_JTAG_ISR); ++#endif ++ return res; ++} ++ ++static int ++aspeed_jtag_wait_instruction_complete(struct aspeed_jtag *aspeed_jtag) ++{ ++ int res = 0; ++#ifdef USE_INTERRUPTS ++ res = wait_event_interruptible(aspeed_jtag->jtag_wq, ++ aspeed_jtag->flag & ++ ASPEED_JTAG_ISR_INST_COMPLETE); ++ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_INST_COMPLETE; ++#else ++ u32 status = 0; ++ u32 iterations = 0; ++ ++ while ((status & ASPEED_JTAG_ISR_INST_COMPLETE) == 0) { ++ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR); ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "%s = 0x%08x\n", __func__, status); ++#endif ++ iterations++; ++ if (iterations > WAIT_ITERATIONS) { ++ dev_err(aspeed_jtag->dev, ++ "aspeed_jtag driver timed out waiting for instruction complete\n"); ++ res = -EFAULT; ++ break; ++ } ++ if ((status & ASPEED_JTAG_ISR_DATA_COMPLETE) == 0) { ++ if (iterations % 25 == 0) ++ usleep_range(1, 5); ++ else ++ udelay(1); ++ } ++ } ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_INST_COMPLETE | ++ (status & 0xf), ++ ASPEED_JTAG_ISR); ++#endif ++ return res; ++} ++ ++static int ++aspeed_jtag_wait_data_pause_complete(struct aspeed_jtag *aspeed_jtag) ++{ ++ int res = 0; ++#ifdef USE_INTERRUPTS ++ res = wait_event_interruptible(aspeed_jtag->jtag_wq, ++ aspeed_jtag->flag & ++ ASPEED_JTAG_ISR_DATA_PAUSE); ++ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_PAUSE; ++#else ++ u32 status = 0; ++ u32 iterations = 0; ++ ++ while ((status & ASPEED_JTAG_ISR_DATA_PAUSE) == 0) { ++ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR); ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "%s = 0x%08x\n", __func__, status); ++#endif ++ iterations++; ++ if (iterations > WAIT_ITERATIONS) { ++ dev_err(aspeed_jtag->dev, ++ "aspeed_jtag driver timed out waiting for data pause complete\n"); ++ res = -EFAULT; ++ break; ++ } ++ if ((status & ASPEED_JTAG_ISR_DATA_COMPLETE) == 0) { ++ if (iterations % 25 == 0) ++ usleep_range(1, 5); ++ else ++ udelay(1); ++ } ++ } ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_ISR_DATA_PAUSE | ++ (status & 0xf), ASPEED_JTAG_ISR); ++#endif ++ return res; ++} ++ ++static int aspeed_jtag_wait_data_complete(struct aspeed_jtag *aspeed_jtag) ++{ ++ int res = 0; ++#ifdef USE_INTERRUPTS ++ res = wait_event_interruptible(aspeed_jtag->jtag_wq, ++ aspeed_jtag->flag & ++ ASPEED_JTAG_ISR_DATA_COMPLETE); ++ aspeed_jtag->flag &= ~ASPEED_JTAG_ISR_DATA_COMPLETE; ++#else ++ u32 status = 0; ++ u32 iterations = 0; ++ ++ while ((status & ASPEED_JTAG_ISR_DATA_COMPLETE) == 0) { ++ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR); ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "%s = 0x%08x\n", __func__, status); ++#endif ++ iterations++; ++ if (iterations > WAIT_ITERATIONS) { ++ dev_err(aspeed_jtag->dev, ++ "ast_jtag driver timed out waiting for data complete\n"); ++ res = -EFAULT; ++ break; ++ } ++ if ((status & ASPEED_JTAG_ISR_DATA_COMPLETE) == 0) { ++ if (iterations % 25 == 0) ++ usleep_range(1, 5); ++ else ++ udelay(1); ++ } ++ } ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_ISR_DATA_COMPLETE | (status & 0xf), ++ ASPEED_JTAG_ISR); ++#endif ++ return res; ++} ++ ++static void aspeed_jtag_set_tap_state(struct aspeed_jtag *aspeed_jtag, ++ enum jtag_endstate endstate) ++{ ++ int i = 0; ++ enum jtag_endstate from, to; ++ ++ from = aspeed_jtag->status; ++ to = endstate; ++ for (i = 0; i < _tms_cycle_lookup[from][to].count; i++) ++ aspeed_jtag_tck_cycle(aspeed_jtag, ++ ((_tms_cycle_lookup[from][to].tmsbits >> i) & 0x1), 0); ++ aspeed_jtag->status = endstate; ++} ++ ++static void aspeed_jtag_end_tap_state_sw(struct aspeed_jtag *aspeed_jtag, ++ struct jtag_end_tap_state *endstate) ++{ ++ /* SW mode from curent tap state -> to end_state */ ++ if (endstate->reset) { ++ int i = 0; ++ ++ for (i = 0; i < ASPEED_JTAG_RESET_CNTR; i++) ++ aspeed_jtag_tck_cycle(aspeed_jtag, 1, 0); ++ aspeed_jtag->status = JTAG_STATE_TLRESET; ++ } ++ ++ aspeed_jtag_set_tap_state(aspeed_jtag, endstate->endstate); ++} ++ ++static int aspeed_jtag_status_set(struct jtag *jtag, ++ struct jtag_end_tap_state *endstate) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "Set TAP state: %s\n", ++ end_status_str[endstate->endstate]); ++#endif ++ ++ if (!(aspeed_jtag->mode & JTAG_XFER_HW_MODE)) { ++ aspeed_jtag_end_tap_state_sw(aspeed_jtag, endstate); ++ return 0; ++ } ++ ++ /* x TMS high + 1 TMS low */ ++ if (endstate->reset) { ++ /* Disable sw mode */ ++ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW); ++ mdelay(1); ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_CTL_ENG_EN | ++ ASPEED_JTAG_CTL_ENG_OUT_EN | ++ ASPEED_JTAG_CTL_FORCE_TMS, ASPEED_JTAG_CTRL); ++ mdelay(1); ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_SW_TDIO, ASPEED_JTAG_SW); ++ aspeed_jtag->status = JTAG_STATE_TLRESET; ++ } ++ ++ return 0; ++} ++ ++static void aspeed_jtag_xfer_sw(struct aspeed_jtag *aspeed_jtag, ++ struct jtag_xfer *xfer, u32 *data) ++{ ++ unsigned long remain_xfer = xfer->length; ++ unsigned long shift_bits = 0; ++ unsigned long index = 0; ++ unsigned long tdi; ++ char tdo; ++ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "SW JTAG SHIFT %s, length = %d\n", ++ (xfer->type == JTAG_SIR_XFER) ? "IR" : "DR", xfer->length); ++#endif ++ ++ if (xfer->type == JTAG_SIR_XFER) ++ aspeed_jtag_set_tap_state(aspeed_jtag, JTAG_STATE_SHIFTIR); ++ else ++ aspeed_jtag_set_tap_state(aspeed_jtag, JTAG_STATE_SHIFTDR); ++ ++ tdi = ASPEED_JTAG_GET_TDI(xfer->direction, data[index]); ++ data[index] = 0; ++ while (remain_xfer > 1) { ++ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0, ++ tdi & ASPEED_JTAG_DATA_MSB); ++ data[index] |= tdo << (shift_bits % ++ ASPEED_JTAG_DATA_CHUNK_SIZE); ++ tdi >>= 1; ++ shift_bits++; ++ remain_xfer--; ++ ++ if (shift_bits % ASPEED_JTAG_DATA_CHUNK_SIZE == 0) { ++ tdo = 0; ++ index++; ++ tdi = ASPEED_JTAG_GET_TDI(xfer->direction, data[index]); ++ data[index] = 0; ++ } ++ } ++ ++ if ((xfer->endstate == (xfer->type == JTAG_SIR_XFER ? ++ JTAG_STATE_SHIFTIR : JTAG_STATE_SHIFTDR))) { ++ /* Stay in Shift IR/DR*/ ++ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 0, ++ tdi & ASPEED_JTAG_DATA_MSB); ++ data[index] |= tdo << (shift_bits % ++ ASPEED_JTAG_DATA_CHUNK_SIZE); ++ } else { ++ /* Goto end state */ ++ tdo = aspeed_jtag_tck_cycle(aspeed_jtag, 1, ++ tdi & ASPEED_JTAG_DATA_MSB); ++ data[index] |= tdo << (shift_bits % ++ ASPEED_JTAG_DATA_CHUNK_SIZE); ++ aspeed_jtag->status = (xfer->type == JTAG_SIR_XFER) ? ++ JTAG_STATE_EXIT1IR : JTAG_STATE_EXIT1DR; ++ aspeed_jtag_set_tap_state(aspeed_jtag, xfer->endstate); ++ } ++} ++ ++static int aspeed_jtag_xfer_push_data(struct aspeed_jtag *aspeed_jtag, ++ enum jtag_xfer_type type, u32 bits_len) ++{ ++ int res = 0; ++ ++ if (type == JTAG_SIR_XFER) { ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len), ++ ASPEED_JTAG_CTRL); ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_IOUT_LEN(bits_len) | ++ ASPEED_JTAG_CTL_INST_EN, ASPEED_JTAG_CTRL); ++ res = aspeed_jtag_wait_instruction_pause(aspeed_jtag); ++ } else { ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len), ++ ASPEED_JTAG_CTRL); ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_DOUT_LEN(bits_len) | ++ ASPEED_JTAG_CTL_DATA_EN, ASPEED_JTAG_CTRL); ++ res = aspeed_jtag_wait_data_pause_complete(aspeed_jtag); ++ } ++ return res; ++} ++ ++static int aspeed_jtag_xfer_push_data_last(struct aspeed_jtag *aspeed_jtag, ++ enum jtag_xfer_type type, ++ u32 shift_bits, ++ enum jtag_endstate endstate) ++{ ++ int res = 0; ++ ++ if (type == JTAG_SIR_XFER) { ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_IOUT_LEN(shift_bits) | ++ ASPEED_JTAG_CTL_LASPEED_INST, ++ ASPEED_JTAG_CTRL); ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_IOUT_LEN(shift_bits) | ++ ASPEED_JTAG_CTL_LASPEED_INST | ++ ASPEED_JTAG_CTL_INST_EN, ++ ASPEED_JTAG_CTRL); ++ res = aspeed_jtag_wait_instruction_complete(aspeed_jtag); ++ } else { ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_DOUT_LEN(shift_bits) | ++ ASPEED_JTAG_CTL_LASPEED_DATA, ++ ASPEED_JTAG_CTRL); ++ aspeed_jtag_write(aspeed_jtag, ++ ASPEED_JTAG_DOUT_LEN(shift_bits) | ++ ASPEED_JTAG_CTL_LASPEED_DATA | ++ ASPEED_JTAG_CTL_DATA_EN, ++ ASPEED_JTAG_CTRL); ++ res = aspeed_jtag_wait_data_complete(aspeed_jtag); ++ } ++ return res; ++} ++ ++static int aspeed_jtag_xfer_hw(struct aspeed_jtag *aspeed_jtag, ++ struct jtag_xfer *xfer, u32 *data) ++{ ++ unsigned long remain_xfer = xfer->length; ++ unsigned long index = 0; ++ char shift_bits; ++ u32 data_reg; ++ u32 scan_end; ++ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, "HW JTAG SHIFT %s, length = %d\n", ++ (xfer->type == JTAG_SIR_XFER) ? "IR" : "DR", xfer->length); ++#endif ++ data_reg = xfer->type == JTAG_SIR_XFER ? ++ ASPEED_JTAG_INST : ASPEED_JTAG_DATA; ++ if (xfer->endstate == JTAG_STATE_SHIFTIR || ++ xfer->endstate == JTAG_STATE_SHIFTDR || ++ xfer->endstate == JTAG_STATE_PAUSEIR || ++ xfer->endstate == JTAG_STATE_PAUSEDR) { ++ scan_end = 0; ++ } else { ++ scan_end = 1; ++ } ++ ++ while (remain_xfer) { ++ if (xfer->direction & JTAG_WRITE_XFER) ++ aspeed_jtag_write(aspeed_jtag, data[index], data_reg); ++ else ++ aspeed_jtag_write(aspeed_jtag, 0, data_reg); ++ ++ if (remain_xfer > ASPEED_JTAG_DATA_CHUNK_SIZE) { ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, ++ "Chunk len=%d chunk_size=%d remain_xfer=%lu\n", ++ xfer->length, ASPEED_JTAG_DATA_CHUNK_SIZE, ++ remain_xfer); ++#endif ++ shift_bits = ASPEED_JTAG_DATA_CHUNK_SIZE; ++ ++ /* ++ * Transmit bytes that were not equals to column length ++ * and after the transfer go to Pause IR/DR. ++ */ ++ if (aspeed_jtag_xfer_push_data(aspeed_jtag, xfer->type, ++ shift_bits) != 0) { ++ return -EFAULT; ++ } ++ } else { ++ /* ++ * Read bytes equals to column length ++ */ ++ shift_bits = remain_xfer; ++ if (scan_end) { ++ /* ++ * If this data is the end of the transmission ++ * send remaining bits and go to endstate ++ */ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, ++ "Last len=%d chunk_size=%d remain_xfer=%lu\n", ++ xfer->length, ++ ASPEED_JTAG_DATA_CHUNK_SIZE, ++ remain_xfer); ++#endif ++ if (aspeed_jtag_xfer_push_data_last( ++ aspeed_jtag, ++ xfer->type, ++ shift_bits, ++ xfer->endstate) != 0) { ++ return -EFAULT; ++ } ++ } else { ++ /* ++ * If transmission is waiting for additional ++ * data send remaining bits and then go to ++ * Pause IR/DR. ++ */ ++#ifdef DEBUG_JTAG ++ dev_dbg(aspeed_jtag->dev, ++ "Tail len=%d chunk_size=%d remain_xfer=%lu\n", ++ xfer->length, ++ ASPEED_JTAG_DATA_CHUNK_SIZE, ++ remain_xfer); ++#endif ++ if (aspeed_jtag_xfer_push_data(aspeed_jtag, ++ xfer->type, ++ shift_bits) ++ != 0) { ++ return -EFAULT; ++ } ++ } ++ } ++ ++ if (xfer->direction & JTAG_READ_XFER) { ++ if (shift_bits < ASPEED_JTAG_DATA_CHUNK_SIZE) { ++ data[index] = aspeed_jtag_read(aspeed_jtag, ++ data_reg); ++ ++ data[index] >>= ASPEED_JTAG_DATA_CHUNK_SIZE - ++ shift_bits; ++ } else { ++ data[index] = aspeed_jtag_read(aspeed_jtag, ++ data_reg); ++ } ++ } ++ ++ remain_xfer = remain_xfer - shift_bits; ++ index++; ++ } ++ return 0; ++} ++ ++static int aspeed_jtag_xfer(struct jtag *jtag, struct jtag_xfer *xfer, ++ u8 *xfer_data) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++ if (!(aspeed_jtag->mode & JTAG_XFER_HW_MODE)) { ++ /* SW mode */ ++ aspeed_jtag_write(aspeed_jtag, ASPEED_JTAG_SW_TDIO, ++ ASPEED_JTAG_SW); ++ ++ aspeed_jtag_xfer_sw(aspeed_jtag, xfer, (u32 *)xfer_data); ++ } else { ++ /* HW mode */ ++ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_SW); ++ if (aspeed_jtag_xfer_hw(aspeed_jtag, xfer, ++ (u32 *)xfer_data) != 0) ++ return -EFAULT; ++ } ++ ++ aspeed_jtag->status = xfer->endstate; ++ return 0; ++} ++ ++static int aspeed_jtag_status_get(struct jtag *jtag, u32 *status) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++ *status = aspeed_jtag->status; ++ return 0; ++} ++ ++#ifdef USE_INTERRUPTS ++static irqreturn_t aspeed_jtag_interrupt(s32 this_irq, void *dev_id) ++{ ++ struct aspeed_jtag *aspeed_jtag = dev_id; ++ irqreturn_t ret = IRQ_HANDLED; ++ u32 status; ++ ++ status = aspeed_jtag_read(aspeed_jtag, ASPEED_JTAG_ISR); ++ ++ if (status & ASPEED_JTAG_ISR_INT_MASK) { ++ aspeed_jtag_write(aspeed_jtag, ++ (status & ASPEED_JTAG_ISR_INT_MASK) ++ | (status & ASPEED_JTAG_ISR_INT_EN_MASK), ++ ASPEED_JTAG_ISR); ++ aspeed_jtag->flag |= status & ASPEED_JTAG_ISR_INT_MASK; ++ } ++ ++ if (aspeed_jtag->flag) { ++ wake_up_interruptible(&aspeed_jtag->jtag_wq); ++ ret = IRQ_HANDLED; ++ } else { ++ dev_err(aspeed_jtag->dev, "irq status:%x\n", ++ status); ++ ret = IRQ_NONE; ++ } ++ return ret; ++} ++#endif ++ ++static int aspeed_jtag_enable(struct jtag *jtag) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++ aspeed_jtag_master(aspeed_jtag); ++ return 0; ++} ++ ++static int aspeed_jtag_disable(struct jtag *jtag) ++{ ++ struct aspeed_jtag *aspeed_jtag = jtag_priv(jtag); ++ ++ aspeed_jtag_output_disable(aspeed_jtag); ++ return 0; ++} ++ ++static int aspeed_jtag_init(struct platform_device *pdev, ++ struct aspeed_jtag *aspeed_jtag) ++{ ++ struct resource *res; ++#ifdef USE_INTERRUPTS ++ int err; ++#endif ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ aspeed_jtag->reg_base = devm_ioremap_resource(aspeed_jtag->dev, res); ++ if (IS_ERR(aspeed_jtag->reg_base)) ++ return -ENOMEM; ++ ++ aspeed_jtag->pclk = devm_clk_get(aspeed_jtag->dev, NULL); ++ if (IS_ERR(aspeed_jtag->pclk)) { ++ dev_err(aspeed_jtag->dev, "devm_clk_get failed\n"); ++ return PTR_ERR(aspeed_jtag->pclk); ++ } ++ ++#ifdef USE_INTERRUPTS ++ aspeed_jtag->irq = platform_get_irq(pdev, 0); ++ if (aspeed_jtag->irq < 0) { ++ dev_err(aspeed_jtag->dev, "no irq specified\n"); ++ return -ENOENT; ++ } ++#endif ++ ++ if (clk_prepare_enable(aspeed_jtag->pclk)) { ++ dev_err(aspeed_jtag->dev, "no irq specified\n"); ++ return -ENOENT; ++ } ++ ++ aspeed_jtag->rst = devm_reset_control_get_shared(&pdev->dev, NULL); ++ if (IS_ERR(aspeed_jtag->rst)) { ++ dev_err(aspeed_jtag->dev, ++ "missing or invalid reset controller device tree entry"); ++ return PTR_ERR(aspeed_jtag->rst); ++ } ++ reset_control_deassert(aspeed_jtag->rst); ++ ++#ifdef USE_INTERRUPTS ++ err = devm_request_irq(aspeed_jtag->dev, aspeed_jtag->irq, ++ aspeed_jtag_interrupt, 0, ++ "aspeed-jtag", aspeed_jtag); ++ if (err) { ++ dev_err(aspeed_jtag->dev, "unable to get IRQ"); ++ clk_disable_unprepare(aspeed_jtag->pclk); ++ return err; ++ } ++#endif ++ ++ aspeed_jtag_output_disable(aspeed_jtag); ++ ++ aspeed_jtag->flag = 0; ++ aspeed_jtag->mode = 0; ++ init_waitqueue_head(&aspeed_jtag->jtag_wq); ++ return 0; ++} ++ ++static int aspeed_jtag_deinit(struct platform_device *pdev, ++ struct aspeed_jtag *aspeed_jtag) ++{ ++ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_ISR); ++ /* Disable clock */ ++ aspeed_jtag_write(aspeed_jtag, 0, ASPEED_JTAG_CTRL); ++ reset_control_assert(aspeed_jtag->rst); ++ clk_disable_unprepare(aspeed_jtag->pclk); ++ return 0; ++} ++ ++static const struct jtag_ops aspeed_jtag_ops = { ++ .freq_get = aspeed_jtag_freq_get, ++ .freq_set = aspeed_jtag_freq_set, ++ .status_get = aspeed_jtag_status_get, ++ .status_set = aspeed_jtag_status_set, ++ .xfer = aspeed_jtag_xfer, ++ .mode_set = aspeed_jtag_mode_set, ++ .bitbang = aspeed_jtag_bitbang, ++ .enable = aspeed_jtag_enable, ++ .disable = aspeed_jtag_disable ++}; ++ ++static int aspeed_jtag_probe(struct platform_device *pdev) ++{ ++ struct aspeed_jtag *aspeed_jtag; ++ struct jtag *jtag; ++ int err; ++ ++ jtag = jtag_alloc(&pdev->dev, sizeof(*aspeed_jtag), &aspeed_jtag_ops); ++ if (!jtag) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, jtag); ++ aspeed_jtag = jtag_priv(jtag); ++ aspeed_jtag->dev = &pdev->dev; ++ ++ /* Initialize device*/ ++ err = aspeed_jtag_init(pdev, aspeed_jtag); ++ if (err) ++ goto err_jtag_init; ++ ++ /* Initialize JTAG core structure*/ ++ err = devm_jtag_register(aspeed_jtag->dev, jtag); ++ if (err) ++ goto err_jtag_register; ++ ++ return 0; ++ ++err_jtag_register: ++ aspeed_jtag_deinit(pdev, aspeed_jtag); ++err_jtag_init: ++ jtag_free(jtag); ++ return err; ++} ++ ++static int aspeed_jtag_remove(struct platform_device *pdev) ++{ ++ struct jtag *jtag = platform_get_drvdata(pdev); ++ ++ aspeed_jtag_deinit(pdev, jtag_priv(jtag)); ++ return 0; ++} ++ ++static const struct of_device_id aspeed_jtag_of_match[] = { ++ { .compatible = "aspeed,ast2400-jtag", }, ++ { .compatible = "aspeed,ast2500-jtag", }, ++ {} ++}; ++ ++static struct platform_driver aspeed_jtag_driver = { ++ .probe = aspeed_jtag_probe, ++ .remove = aspeed_jtag_remove, ++ .driver = { ++ .name = ASPEED_JTAG_NAME, ++ .of_match_table = aspeed_jtag_of_match, ++ }, ++}; ++module_platform_driver(aspeed_jtag_driver); ++ ++MODULE_AUTHOR("Oleksandr Shamray <oleksandrs@mellanox.com>"); ++MODULE_DESCRIPTION("ASPEED JTAG driver"); ++MODULE_LICENSE("GPL v2"); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0054-Documentation-jtag-Add-bindings-for-Aspeed-SoC.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0054-Documentation-jtag-Add-bindings-for-Aspeed-SoC.patch new file mode 100644 index 000000000..f17bdcd68 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0054-Documentation-jtag-Add-bindings-for-Aspeed-SoC.patch @@ -0,0 +1,108 @@ +From 2a22feac440070b7feaf0a6fe7e7e555d57ca19b Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Wed, 10 Mar 2019 11:45:04 -0800 +Subject: [PATCH v29 3/6] Documentation: jtag: Add bindings for Aspeed SoC + 24xx and 25xx families JTAG master driver + +It has been tested on Mellanox system with BMC equipped with +Aspeed 2520 SoC for programming CPLD devices. + +It also has been tested on Intel systems with BMC equipped with +Aspeed 25x0 SoC for JTAG board communication. + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Jiri Pirko <jiri@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Rob Herring <robh@kernel.org> +Cc: Mark Rutland <mark.rutland@arm.com> +Cc: Joel Stanley <joel@jms.id.au> +Cc: Andrew Jeffery <andrew@aj.id.au> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- +v28->v29 +v27->v28 +v26->v27 +v25->v26 +v24->v25 +v23->v24 +v22->v23 +v21->v22 +v20->v21 +v19->v20 +v18->v19 + +v17->v18 +v16->v17 +v15->v16 +Comments pointed by Joel Stanley <joel.stan@gmail.com> +- change clocks = <&clk_apb> to proper clocks = <&syscon ASPEED_CLK_APB> +- add reset descriptions in bindings file + +v14->v15 +v13->v14 +v12->v13 +v11->v12 +v10->v11 +v9->v10 +v8->v9 +v7->v8 +Comments pointed by pointed by Joel Stanley <joel.stan@gmail.com> +- Change compatible string to ast2400 and ast2000 + +V6->v7 +Comments pointed by Tobias Klauser <tklauser@distanz.ch> + - Fix spell "Doccumentation" -> "Documentation" + +v5->v6 +Comments pointed by Tobias Klauser <tklauser@distanz.ch> +- Small nit: s/documentation/Documentation/ + +v4->v5 + +V3->v4 +Comments pointed by Rob Herring <robh@kernel.org> +- delete unnecessary "status" and "reg-shift" descriptions in + bindings file + +v2->v3 +Comments pointed by Rob Herring <robh@kernel.org> +- split Aspeed jtag driver and binding to separate patches +- delete unnecessary "status" and "reg-shift" descriptions in + bindings file +--- + .../devicetree/bindings/jtag/aspeed-jtag.txt | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt + +diff --git a/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt b/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt +new file mode 100644 +index 0000000..7c36eb6 +--- /dev/null ++++ b/Documentation/devicetree/bindings/jtag/aspeed-jtag.txt +@@ -0,0 +1,22 @@ ++Aspeed JTAG driver for ast2400 and ast2500 SoC ++ ++Required properties: ++- compatible: Should be one of ++ - "aspeed,ast2400-jtag" ++ - "aspeed,ast2500-jtag" ++- reg contains the offset and length of the JTAG memory ++ region ++- clocks root clock of bus, should reference the APB ++ clock in the second cell ++- resets phandle to reset controller with the reset number in ++ the second cell ++- interrupts should contain JTAG controller interrupt ++ ++Example: ++jtag: jtag@1e6e4000 { ++ compatible = "aspeed,ast2500-jtag"; ++ reg = <0x1e6e4000 0x1c>; ++ clocks = <&syscon ASPEED_CLK_APB>; ++ resets = <&syscon ASPEED_RESET_JTAG_MASTER>; ++ interrupts = <43>; ++}; +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0055-Documentation-jtag-Add-ABI-documentation.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0055-Documentation-jtag-Add-ABI-documentation.patch new file mode 100644 index 000000000..af641ffe2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0055-Documentation-jtag-Add-ABI-documentation.patch @@ -0,0 +1,303 @@ +From c2d57900820475b50affd171f4dc423a278887ae Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Wed, 10 Mar 2019 11:47:40 -0800 +Subject: [PATCH v29 4/6] Documentation: jtag: Add ABI documentation + +Added document that describe the ABI for JTAG class driver + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Arnd Bergmann <arnd@arndb.de> +Cc: Jonathan Corbet <corbet@lwn.net> +Cc: Jiri Pirko <jiri@mellanox.com> +Cc: Vadim Pasternak <vadimp@mellanox.com> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- +v28->v29 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Expand bitbang function to accept multiples bitbang operations within a + single JTAG_IOCBITBANG call. It will receive a buffer with TDI and TMS + values and it is expected that driver fills TDO fields with its + corresponding output value for every transaction. + +v27->v28 +Comments pointed by Steven Filary <steven.a.filary@intel.com> +- Replace JTAG_IOCRUNTEST with JTAG_SIOCSTATE adding support for all TAPC + end states in SW mode using a lookup table to navigate across states. +- Add support for simultaneous READ/WRITE transfers(JTAG_READ_WRITE_XFER). +- Support for switching JTAG controller mode between slave and master + mode. +- Setup JTAG controller mode to master only when the driver is opened, + letting other HW to own the JTAG bus when it isn't in use. +- Include JTAG bit bang IOCTL for low level JTAG control usage + (JTAG_IOCBITBANG). + +v26->v27 +v25->v26 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- fix spell in ABI documentation + +v24->v25 +Comments pointed by Greg KH <gregkh@linuxfoundation.org> +- Fixed documentation according to new open() behavior + +v23->v24 +v22->v23 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- fix spell in ABI doccumentation + +v21->v22 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- fix spell in ABI doccumentation + +v20->v21 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- Fix JTAG dirver help in Kconfig + +v19->v20 +Comments pointed by Randy Dunlap <rdunlap@infradead.org> +- Fix JTAG doccumentation + +v18->v19 +Pavel Machek <pavel@ucw.cz> +- Added JTAG doccumentation to Documentation/jtag + +v17->v18 +v16->v17 +v15->v16 +v14->v15 +v13->v14 +v12->v13 +v11->v12 Tobias Klauser <tklauser@distanz.ch> +Comments pointed by +- rename /Documentation/ABI/testing/jatg-dev -> jtag-dev +- Typo: s/interfase/interface +v10->v11 +v9->v10 +Fixes added by Oleksandr: +- change jtag-cdev to jtag-dev in documentation +- update KernelVersion and Date in jtag-dev documentation; +v8->v9 +v7->v8 +v6->v7 +Comments pointed by Pavel Machek <pavel@ucw.cz> +- Added jtag-cdev documentation to Documentation/ABI/testing folder +--- + Documentation/ABI/testing/jtag-dev | 23 +++++++ + Documentation/jtag/overview | 27 ++++++++ + Documentation/jtag/transactions | 138 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 Documentation/ABI/testing/jtag-dev + create mode 100644 Documentation/jtag/overview + create mode 100644 Documentation/jtag/transactions + +diff --git a/Documentation/ABI/testing/jtag-dev b/Documentation/ABI/testing/jtag-dev +new file mode 100644 +index 0000000..423baab +--- /dev/null ++++ b/Documentation/ABI/testing/jtag-dev +@@ -0,0 +1,23 @@ ++What: /dev/jtag[0-9]+ ++Date: July 2018 ++KernelVersion: 4.20 ++Contact: oleksandrs@mellanox.com ++Description: ++ The misc device files /dev/jtag* are the interface ++ between JTAG master interface and userspace. ++ ++ The ioctl(2)-based ABI is defined and documented in ++ [include/uapi]<linux/jtag.h>. ++ ++ The following file operations are supported: ++ ++ open(2) ++ Opens and allocates file descriptor. ++ ++ ioctl(2) ++ Initiate various actions. ++ See the inline documentation in [include/uapi]<linux/jtag.h> ++ for descriptions of all ioctls. ++ ++Users: ++ userspace tools which wants to access to JTAG bus +diff --git a/Documentation/jtag/overview b/Documentation/jtag/overview +new file mode 100644 +index 0000000..6a5ec33 +--- /dev/null ++++ b/Documentation/jtag/overview +@@ -0,0 +1,27 @@ ++Linux kernel JTAG support ++========================= ++ ++JTAG is an industry standard for verifying hardware. JTAG provides access to ++many logic signals of a complex integrated circuit, including the device pins. ++ ++A JTAG interface is a special interface added to a chip. ++Depending on the version of JTAG, two, four, or five pins are added. ++ ++The connector pins are: ++ TDI (Test Data In) ++ TDO (Test Data Out) ++ TCK (Test Clock) ++ TMS (Test Mode Select) ++ TRST (Test Reset) optional ++ ++JTAG interface is designed to have two parts - basic core driver and ++hardware specific driver. The basic driver introduces a general interface ++which is not dependent of specific hardware. It provides communication ++between user space and hardware specific driver. ++Each JTAG device is represented as a char device from (jtag0, jtag1, ...). ++Access to a JTAG device is performed through IOCTL calls. ++ ++Call flow example: ++User: open -> /dev/jatgX -> JTAG core driver -> JTAG hardware specific driver ++User: ioctl -> /dev/jtagX -> JTAG core driver -> JTAG hardware specific driver ++User: close -> /dev/jatgX -> JTAG core driver -> JTAG hardware specific driver +diff --git a/Documentation/jtag/transactions b/Documentation/jtag/transactions +new file mode 100644 +index 0000000..76fd0b1 +--- /dev/null ++++ b/Documentation/jtag/transactions +@@ -0,0 +1,138 @@ ++The JTAG API ++============= ++ ++JTAG master devices can be accessed through a character misc-device. ++Each JTAG master interface can be accessed by using /dev/jtagN. ++ ++JTAG system calls set: ++- SIR (Scan Instruction Register, IEEE 1149.1 Instruction Register scan); ++- SDR (Scan Data Register, IEEE 1149.1 Data Register scan); ++- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified ++number of clocks. ++ ++open(), close() ++------- ++open() opens JTAG device. ++ ++Open/Close device: ++- jtag_fd = open("/dev/jtag0", O_RDWR); ++- close(jtag_fd); ++ ++ioctl() ++------- ++All access operations to JTAG devices are performed through ioctl interface. ++The IOCTL interface supports these requests: ++ JTAG_SIOCSTATE - Force JTAG state machine to go into a TAPC state ++ JTAG_SIOCFREQ - Set JTAG TCK frequency ++ JTAG_GIOCFREQ - Get JTAG TCK frequency ++ JTAG_IOCXFER - send/receive JTAG data Xfer ++ JTAG_GIOCSTATUS - get current JTAG TAP state ++ JTAG_SIOCMODE - set JTAG mode flags. ++ JTAG_IOCBITBANG - JTAG bitbang low level control. ++ ++JTAG_SIOCFREQ, JTAG_GIOCFREQ ++------ ++Set/Get JTAG clock speed: ++ ++ unsigned int jtag_fd; ++ ioctl(jtag_fd, JTAG_SIOCFREQ, &frq); ++ ioctl(jtag_fd, JTAG_GIOCFREQ, &frq); ++ ++JTAG_SIOCSTATE ++------ ++Force JTAG state machine to go into a TAPC state ++ ++struct jtag_end_tap_state { ++ __u8 reset; ++ __u8 endstate; ++ __u8 tck; ++}; ++ ++reset: ++ JTAG_NO_RESET - go through selected endstate from current state ++ JTAG_FORCE_RESET - go through TEST_LOGIC/RESET state before selected endstate ++endstate: completion flag ++tck: clock counter ++ ++Example: ++ struct jtag_end_tap_state end_state; ++ ++ end_state.endstate = JTAG_STATE_IDLE; ++ end_state.reset = 0; ++ end_state.tck = data_p->tck; ++ usleep(25 * 1000); ++ ioctl(jtag_fd, JTAG_SIOCSTATE, &end_state); ++ ++JTAG_GIOCSTATUS ++------ ++Get JTAG TAPC machine state ++ ++ unsigned int jtag_fd; ++ jtag_endstate endstate; ++ ioctl(jtag_fd, JTAG_GIOCSTATUS, &endstate); ++ ++JTAG_IOCXFER ++------ ++Send SDR/SIR transaction ++ ++struct jtag_xfer { ++ __u8 type; ++ __u8 direction; ++ __u8 endstate; ++ __u8 padding; ++ __u32 length; ++ __u64 tdio; ++}; ++ ++type: transfer type - JTAG_SIR_XFER/JTAG_SDR_XFER ++direction: xfer direction - JTAG_READ_XFER/JTAG_WRITE_XFER/JTAG_READ_WRITE_XFER ++length: xfer data length in bits ++tdio : xfer data array ++endstate: xfer end state after transaction finish ++ can be: any state listed in jtag_endstate struct ++ ++Example: ++ struct jtag_xfer xfer; ++ static char buf[64]; ++ static unsigned int buf_len = 0; ++ [...] ++ xfer.type = JTAG_SDR_XFER; ++ xfer.tdio = (__u64)buf; ++ xfer.length = buf_len; ++ xfer.endstate = JTAG_STATE_IDLE; ++ ++ if (is_read) ++ xfer.direction = JTAG_READ_XFER; ++ else if (is_write) ++ xfer.direction = JTAG_WRITE_XFER; ++ else ++ xfer.direction = JTAG_READ_WRITE_XFER; ++ ++ ioctl(jtag_fd, JTAG_IOCXFER, &xfer); ++ ++JTAG_SIOCMODE ++------ ++If hardware driver can support different running modes you can change it. ++ ++Example: ++ struct jtag_mode mode; ++ mode.feature = JTAG_XFER_MODE; ++ mode.mode = JTAG_XFER_HW_MODE; ++ ioctl(jtag_fd, JTAG_SIOCMODE, &mode); ++ ++JTAG_IOCBITBANG ++------ ++JTAG Bitbang low level operation. ++ ++Example: ++ struct bitbang_packet bitbang; ++ struct tck_bitbang bitbang_data[2]; ++ bitbang_data[0].tms = 0; ++ bitbang_data[0].tdi = 1; ++ bitbang_data[1].tms = 0; ++ bitbang_data[1].tdi = 1; ++ bitbang.data = bitbang_data; ++ bitbang.length = 2; ++ ioctl(jtag_fd, JTAG_IOCBITBANG, &bitbang); ++ tdo0 = bitbang_data[0].tdo; ++ tdo1 = bitbang_data[1].tdo; +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0056-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0056-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch new file mode 100644 index 000000000..a7dccc4b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0056-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch @@ -0,0 +1,57 @@ +From ba0c35ae070cffcb384fc76e23a38e00142b128d Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Wed, 10 Mar 2019 11:48:18 -0800 +Subject: [PATCH v29 5/6] Documentation jtag: Add JTAG core driver ioctl number + +JTAG class driver provide infrastructure to support hardware/software +JTAG platform drivers. It provide user layer API interface for flashing +and debugging external devices which equipped with JTAG interface +using standard transactions. + +Driver exposes set of IOCTL to user space for: +- XFER: + SIR (Scan Instruction Register, IEEE 1149.1 Data Register scan); + SDR (Scan Data Register, IEEE 1149.1 Instruction Register scan); +- GIOCSTATUS read the current TAPC state of the JTAG controller +- SIOCSTATE Forces the JTAG TAPC to go into a particular state. +- SIOCFREQ/GIOCFREQ for setting and reading JTAG frequency. +- IOCBITBANG for low level control of JTAG signals. + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Philippe Ombredanne <pombredanne@nexb.com> +Cc: Jiri Pirko <jiri@mellanox.com> +Cc: Vadim Pasternak <vadimp@mellanox.com> +Cc: Jonathan Corbet <corbet@lwn.net> +Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> +Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> +Cc: Kishon Vijay Abraham I <kishon@ti.com> +Cc: Darrick J. Wong <darrick.wong@oracle.com> +Cc: Bryant G. Ly <bryantly@linux.vnet.ibm.com> +Cc: Eric Sandeen <sandeen@redhat.com> +Cc: Randy Dunlap <rdunlap@infradead.org> +Cc: Tomohiro Kusumi <kusumi.tomohiro@gmail.com> +Cc: Arnd Bergmann <arnd@arndb.de> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- + Documentation/ioctl/ioctl-number.txt | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt +index c955814..f732118 100644 +--- a/Documentation/ioctl/ioctl-number.txt ++++ b/Documentation/ioctl/ioctl-number.txt +@@ -323,6 +323,8 @@ Code Seq#(hex) Include File Comments + 0xB0 all RATIO devices in development: + <mailto:vgo@ratio.de> + 0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca> ++0xB2 00-0F linux/jtag.h JTAG driver ++ <mailto:oleksandrs@mellanox.com> + 0xB3 00 linux/mmc/ioctl.h + 0xB4 00-0F linux/gpio.h <mailto:linux-gpio@vger.kernel.org> + 0xB5 00-0F uapi/linux/rpmsg.h <mailto:linux-remoteproc@vger.kernel.org> +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0057-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0057-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch new file mode 100644 index 000000000..8ab4615f0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0057-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch @@ -0,0 +1,50 @@ +From 0a563429bc3c34a951db92600681e799b606a01f Mon Sep 17 00:00:00 2001 +From: "Corona, Ernesto" <ernesto.corona@intel.com> +Date: Wed, 10 Mar 2019 11:49:37 -0800 +Subject: [PATCH v29 6/6] drivers: jtag: Add JTAG core driver Maintainers + +JTAG class driver provide infrastructure to support hardware/software +JTAG platform drivers. It provide user layer API interface for flashing +and debugging external devices which equipped with JTAG interface +using standard transactions. + +Signed-off-by: Oleksandr Shamray <oleksandrs@mellanox.com> +Signed-off-by: Corona, Ernesto <ernesto.corona@intel.com> +Acked-by: Arnd Bergmann <arnd@arndb.de> +Cc: Jiri Pirko <jiri@mellanox.com> +Cc: Vadim Pasternak <vadimp@mellanox.com> +Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> +Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +Cc: David S. Miller <davem@davemloft.net> +Cc: Nicolas Ferre <nicolas.ferre@microchip.com> +Cc: Steven A Filary <steven.a.filary@intel.com> +Cc: Bryan Hunt <bryan.hunt@intel.com> +--- + MAINTAINERS | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/MAINTAINERS b/MAINTAINERS +index dce5c09..eb710a6 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -8173,6 +8173,17 @@ L: linux-serial@vger.kernel.org + S: Orphan + F: drivers/tty/serial/jsm/ + ++JTAG SUBSYSTEM ++M: Oleksandr Shamray <oleksandrs@mellanox.com> ++M: Vadim Pasternak <vadimp@mellanox.com> ++M Ernesto Corona <ernesto.corona@intel.com> ++S: Maintained ++F: include/linux/jtag.h ++F: include/uapi/linux/jtag.h ++F: drivers/jtag/ ++F: Documentation/devicetree/bindings/jtag/ ++F: Documentation/ABI/testing/jtag-dev ++ + K10TEMP HARDWARE MONITORING DRIVER + M: Clemens Ladisch <clemens@ladisch.de> + L: linux-hwmon@vger.kernel.org +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0058-i2c-aspeed-add-general-call-support.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0058-i2c-aspeed-add-general-call-support.patch new file mode 100644 index 000000000..de8bf2355 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0058-i2c-aspeed-add-general-call-support.patch @@ -0,0 +1,182 @@ +From 551b5192b1074679ca9411cdedb9137d38f7de3d Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 1 May 2019 13:27:34 -0700 +Subject: [PATCH] i2c: aspeed: add general call support + +This commit adds general call support into Aspeed I2C driver. +This is downstream only customization so it should not go into +upstream. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + .../devicetree/bindings/i2c/i2c-aspeed.txt | 1 + + drivers/i2c/busses/i2c-aspeed.c | 39 ++++++++++++++++++++++ + drivers/i2c/i2c-slave-mqueue.c | 4 ++- + include/linux/i2c.h | 1 + + 4 files changed, 44 insertions(+), 1 deletion(-) + +diff --git a/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt b/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt +index 7da7e813b2b0..724ee9f35c10 100644 +--- a/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt ++++ b/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt +@@ -16,6 +16,7 @@ Optional Properties: + - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not + specified + - multi-master : states that there is another master active on this bus. ++- general-call : enables general call receiving. + - bus-timeout-ms: bus timeout in milliseconds defaults to 1 second when not + specified. + - #retries : Number of retries for master transfer. +diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c +index 0060193e1aa4..f96160e01a69 100644 +--- a/drivers/i2c/busses/i2c-aspeed.c ++++ b/drivers/i2c/busses/i2c-aspeed.c +@@ -50,6 +50,7 @@ + #define ASPEED_I2CD_SDA_DRIVE_1T_EN BIT(8) + #define ASPEED_I2CD_M_SDA_DRIVE_1T_EN BIT(7) + #define ASPEED_I2CD_M_HIGH_SPEED_EN BIT(6) ++#define ASPEED_I2CD_GCALL_EN BIT(2) + #define ASPEED_I2CD_SLAVE_EN BIT(1) + #define ASPEED_I2CD_MASTER_EN BIT(0) + +@@ -74,6 +75,7 @@ + */ + #define ASPEED_I2CD_INTR_SDA_DL_TIMEOUT BIT(14) + #define ASPEED_I2CD_INTR_BUS_RECOVER_DONE BIT(13) ++#define ASPEED_I2CD_INTR_GCALL_ADDR BIT(8) + #define ASPEED_I2CD_INTR_SLAVE_MATCH BIT(7) + #define ASPEED_I2CD_INTR_SCL_TIMEOUT BIT(6) + #define ASPEED_I2CD_INTR_ABNORMAL BIT(5) +@@ -133,6 +135,8 @@ enum aspeed_i2c_slave_state { + ASPEED_I2C_SLAVE_READ_PROCESSED, + ASPEED_I2C_SLAVE_WRITE_REQUESTED, + ASPEED_I2C_SLAVE_WRITE_RECEIVED, ++ ASPEED_I2C_SLAVE_GCALL_START, ++ ASPEED_I2C_SLAVE_GCALL_REQUESTED, + ASPEED_I2C_SLAVE_STOP, + }; + +@@ -163,6 +167,8 @@ struct aspeed_i2c_bus { + #if IS_ENABLED(CONFIG_I2C_SLAVE) + struct i2c_client *slave; + enum aspeed_i2c_slave_state slave_state; ++ /* General call */ ++ bool general_call; + #endif /* CONFIG_I2C_SLAVE */ + }; + +@@ -267,6 +273,12 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) + bus->slave_state = ASPEED_I2C_SLAVE_START; + } + ++ /* General call was requested, restart state machine. */ ++ if (irq_status & ASPEED_I2CD_INTR_GCALL_ADDR) { ++ irq_handled |= ASPEED_I2CD_INTR_GCALL_ADDR; ++ bus->slave_state = ASPEED_I2C_SLAVE_GCALL_START; ++ } ++ + /* Slave is not currently active, irq was for someone else. */ + if (bus->slave_state == ASPEED_I2C_SLAVE_INACTIVE) + return irq_handled; +@@ -285,6 +297,21 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) + else + bus->slave_state = + ASPEED_I2C_SLAVE_WRITE_REQUESTED; ++ } else if (bus->slave_state == ASPEED_I2C_SLAVE_GCALL_START) { ++ /* ++ * I2C spec defines the second byte meaning like below. ++ * 0x06 : Reset and write programmable part of slave ++ * address by hardware. ++ * 0x04 : Write programmable part of slave address by ++ * hardware. ++ * 0x00 : No allowed. ++ * ++ * But in OpenBMC, we are going to use this ++ * 'General call' feature for IPMB message broadcasting ++ * so it delivers all data as is without any specific ++ * handling of the second byte. ++ */ ++ bus->slave_state = ASPEED_I2C_SLAVE_GCALL_REQUESTED; + } + irq_handled |= ASPEED_I2CD_INTR_RX_DONE; + } +@@ -324,6 +351,10 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) + bus->slave_state = ASPEED_I2C_SLAVE_WRITE_RECEIVED; + i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value); + break; ++ case ASPEED_I2C_SLAVE_GCALL_REQUESTED: ++ bus->slave_state = ASPEED_I2C_SLAVE_WRITE_RECEIVED; ++ i2c_slave_event(slave, I2C_SLAVE_GCALL_REQUESTED, &value); ++ break; + case ASPEED_I2C_SLAVE_WRITE_RECEIVED: + i2c_slave_event(slave, I2C_SLAVE_WRITE_RECEIVED, &value); + break; +@@ -332,6 +363,7 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) + bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE; + break; + case ASPEED_I2C_SLAVE_START: ++ case ASPEED_I2C_SLAVE_GCALL_START: + /* Slave was just started. Waiting for the next event. */; + break; + default: +@@ -739,6 +771,8 @@ static void __aspeed_i2c_reg_slave(struct aspeed_i2c_bus *bus, u16 slave_addr) + /* Turn on slave mode. */ + func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG); + func_ctrl_reg_val |= ASPEED_I2CD_SLAVE_EN; ++ if (bus->general_call) ++ func_ctrl_reg_val |= ASPEED_I2CD_GCALL_EN; + writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG); + } + +@@ -777,6 +811,8 @@ static int aspeed_i2c_unreg_slave(struct i2c_client *client) + /* Turn off slave mode. */ + func_ctrl_reg_val = readl(bus->base + ASPEED_I2C_FUN_CTRL_REG); + func_ctrl_reg_val &= ~ASPEED_I2CD_SLAVE_EN; ++ if (bus->general_call) ++ func_ctrl_reg_val &= ~ASPEED_I2CD_GCALL_EN; + writel(func_ctrl_reg_val, bus->base + ASPEED_I2C_FUN_CTRL_REG); + + bus->slave = NULL; +@@ -921,6 +957,9 @@ static int aspeed_i2c_init(struct aspeed_i2c_bus *bus, + bus->base + ASPEED_I2C_FUN_CTRL_REG); + + #if IS_ENABLED(CONFIG_I2C_SLAVE) ++ if (of_property_read_bool(pdev->dev.of_node, "general-call")) ++ bus->general_call = true; ++ + /* If slave has already been registered, re-enable it. */ + if (bus->slave) + __aspeed_i2c_reg_slave(bus, bus->slave->addr); +diff --git a/drivers/i2c/i2c-slave-mqueue.c b/drivers/i2c/i2c-slave-mqueue.c +index 4548088e1922..a608846cb1db 100644 +--- a/drivers/i2c/i2c-slave-mqueue.c ++++ b/drivers/i2c/i2c-slave-mqueue.c +@@ -53,10 +53,12 @@ static int i2c_slave_mqueue_callback(struct i2c_client *client, + + switch (event) { + case I2C_SLAVE_WRITE_REQUESTED: ++ case I2C_SLAVE_GCALL_REQUESTED: + mq->truncated = 0; + + msg->len = 1; +- msg->buf[0] = client->addr << 1; ++ msg->buf[0] = event == I2C_SLAVE_GCALL_REQUESTED ? ++ 0 : client->addr << 1; + break; + + case I2C_SLAVE_WRITE_RECEIVED: +diff --git a/include/linux/i2c.h b/include/linux/i2c.h +index e1c6b78bdaf1..03ffb70d75f2 100644 +--- a/include/linux/i2c.h ++++ b/include/linux/i2c.h +@@ -371,6 +371,7 @@ enum i2c_slave_event { + I2C_SLAVE_WRITE_REQUESTED, + I2C_SLAVE_READ_PROCESSED, + I2C_SLAVE_WRITE_RECEIVED, ++ I2C_SLAVE_GCALL_REQUESTED, + I2C_SLAVE_STOP, + }; + +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0059-media-aspeed-remove-source-buffer-allocation-before-.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0059-media-aspeed-remove-source-buffer-allocation-before-.patch new file mode 100644 index 000000000..e4161961e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0059-media-aspeed-remove-source-buffer-allocation-before-.patch @@ -0,0 +1,49 @@ +From aa8f405609038693481bad4393d58f0c665569a6 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Tue, 21 May 2019 16:00:28 -0700 +Subject: [PATCH 1/4] media: aspeed: remove source buffer allocation before + mode detection + +Mode detection doesn't require source buffer allocation so this +commit removes that. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + drivers/media/platform/aspeed-video.c | 21 --------------------- + 1 file changed, 21 deletions(-) + +diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c +index 1bb863b32836..ee1f87a08c7c 100644 +--- a/drivers/media/platform/aspeed-video.c ++++ b/drivers/media/platform/aspeed-video.c +@@ -733,27 +733,6 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) + det->height = MIN_HEIGHT; + video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL; + +- /* +- * Since we need max buffer size for detection, free the second source +- * buffer first. +- */ +- if (video->srcs[1].size) +- aspeed_video_free_buf(video, &video->srcs[1]); +- +- if (video->srcs[0].size < VE_MAX_SRC_BUFFER_SIZE) { +- if (video->srcs[0].size) +- aspeed_video_free_buf(video, &video->srcs[0]); +- +- if (!aspeed_video_alloc_buf(video, &video->srcs[0], +- VE_MAX_SRC_BUFFER_SIZE)) { +- dev_err(video->dev, +- "Failed to allocate source buffers\n"); +- return; +- } +- } +- +- aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma); +- + do { + if (tries) { + set_current_state(TASK_INTERRUPTIBLE); +-- +2.21.0 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0060-media-aspeed-use-different-delays-for-triggering-VE-.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0060-media-aspeed-use-different-delays-for-triggering-VE-.patch new file mode 100644 index 000000000..3e158c628 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0060-media-aspeed-use-different-delays-for-triggering-VE-.patch @@ -0,0 +1,60 @@ +From 431c7974302fad5ae835adb46d3c8fa4034c845a Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Tue, 21 May 2019 16:06:56 -0700 +Subject: [PATCH 2/4] media: aspeed: use different delays for triggering VE H/W + reset + +In case of watchdog timeout detected while doing mode detection, +it's better triggering video engine hardware reset immediately so +this commit fixes code for the case. Other than the case, it will +trigger video engine hardware reset after RESOLUTION_CHANGE_DELAY. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + drivers/media/platform/aspeed-video.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c +index ee1f87a08c7c..b8540cc7848d 100644 +--- a/drivers/media/platform/aspeed-video.c ++++ b/drivers/media/platform/aspeed-video.c +@@ -522,7 +522,7 @@ static void aspeed_video_bufs_done(struct aspeed_video *video, + spin_unlock_irqrestore(&video->lock, flags); + } + +-static void aspeed_video_irq_res_change(struct aspeed_video *video) ++static void aspeed_video_irq_res_change(struct aspeed_video *video, ulong delay) + { + spin_lock(&video->lock); + dev_dbg(video->dev, "Resolution changed; resetting\n"); +@@ -534,7 +534,7 @@ static void aspeed_video_irq_res_change(struct aspeed_video *video) + spin_unlock(&video->lock); + aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR); + +- schedule_delayed_work(&video->res_work, RESOLUTION_CHANGE_DELAY); ++ schedule_delayed_work(&video->res_work, delay); + } + + static irqreturn_t aspeed_video_irq(int irq, void *arg) +@@ -547,7 +547,7 @@ static irqreturn_t aspeed_video_irq(int irq, void *arg) + * re-initialize + */ + if (sts & VE_INTERRUPT_MODE_DETECT_WD) { +- aspeed_video_irq_res_change(video); ++ aspeed_video_irq_res_change(video, 0); + return IRQ_HANDLED; + } + +@@ -565,7 +565,8 @@ static irqreturn_t aspeed_video_irq(int irq, void *arg) + * Signal acquired while NOT doing resolution + * detection; reset the engine and re-initialize + */ +- aspeed_video_irq_res_change(video); ++ aspeed_video_irq_res_change(video, ++ RESOLUTION_CHANGE_DELAY); + return IRQ_HANDLED; + } + } +-- +2.21.0 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0061-media-aspeed-fix-an-incorrect-timeout-checking-in-mo.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0061-media-aspeed-fix-an-incorrect-timeout-checking-in-mo.patch new file mode 100644 index 000000000..7739d5214 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0061-media-aspeed-fix-an-incorrect-timeout-checking-in-mo.patch @@ -0,0 +1,30 @@ +From 294391f66df034de8dc63ac2e78f3a00d14075d9 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Thu, 23 May 2019 14:24:25 -0700 +Subject: [PATCH 3/4] media: aspeed: fix an incorrect timeout checking in mode + detection + +There is an incorrect timeout checking in mode detection logic so +it misses resolution detecting chances. This commit fixes the bug. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + drivers/media/platform/aspeed-video.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c +index b8540cc7848d..da20e93f58d3 100644 +--- a/drivers/media/platform/aspeed-video.c ++++ b/drivers/media/platform/aspeed-video.c +@@ -737,7 +737,7 @@ static void aspeed_video_get_resolution(struct aspeed_video *video) + do { + if (tries) { + set_current_state(TASK_INTERRUPTIBLE); +- if (schedule_timeout(INVALID_RESOLUTION_DELAY)) ++ if (!schedule_timeout(INVALID_RESOLUTION_DELAY)) + return; + } + +-- +2.21.0 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0062-media-aspeed-add-a-workaround-to-fix-a-silicon-bug.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0062-media-aspeed-add-a-workaround-to-fix-a-silicon-bug.patch new file mode 100644 index 000000000..efa6f5023 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0062-media-aspeed-add-a-workaround-to-fix-a-silicon-bug.patch @@ -0,0 +1,66 @@ +From 09ec380a1d6ae66b2a8124c8fdd984ff829b41d1 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Thu, 23 May 2019 14:33:03 -0700 +Subject: [PATCH 4/4] media: aspeed: add a workaround to fix a silicon bug + +AST2500 silicon revision A1 and A2 have a silicon bug which causes +extremly long capturing time on specific resolutions (1680 width). +To fix the bug, this commit adjusts the capturing window register +setting to 1728 if detected width is 1680. The compression window +register setting will be kept as the original width so output +result will be the same. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + drivers/media/platform/aspeed-video.c | 26 +++++++++++++++++++------- + 1 file changed, 19 insertions(+), 7 deletions(-) + +diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c +index da20e93f58d3..c2d4a2e6f20f 100644 +--- a/drivers/media/platform/aspeed-video.c ++++ b/drivers/media/platform/aspeed-video.c +@@ -826,8 +826,27 @@ static void aspeed_video_set_resolution(struct aspeed_video *video) + struct v4l2_bt_timings *act = &video->active_timings; + unsigned int size = act->width * act->height; + ++ /* Set capture/compression frame sizes */ + aspeed_video_calc_compressed_size(video, size); + ++ if (video->active_timings.width == 1680) { ++ /* ++ * This is a workaround to fix a silicon bug on A1 and A2 ++ * revisions. Since it doesn't break capturing operation on A0 ++ * revision, use it for all revisions without checking the ++ * revision ID. ++ */ ++ aspeed_video_write(video, VE_CAP_WINDOW, ++ 1728 << 16 | act->height); ++ size += (1728 - 1680) * video->active_timings.height; ++ } else { ++ aspeed_video_write(video, VE_CAP_WINDOW, ++ act->width << 16 | act->height); ++ } ++ aspeed_video_write(video, VE_COMP_WINDOW, ++ act->width << 16 | act->height); ++ aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4); ++ + /* Don't use direct mode below 1024 x 768 (irqs don't fire) */ + if (size < DIRECT_FETCH_THRESHOLD) { + aspeed_video_write(video, VE_TGS_0, +@@ -844,13 +863,6 @@ static void aspeed_video_set_resolution(struct aspeed_video *video) + aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH); + } + +- /* Set capture/compression frame sizes */ +- aspeed_video_write(video, VE_CAP_WINDOW, +- act->width << 16 | act->height); +- aspeed_video_write(video, VE_COMP_WINDOW, +- act->width << 16 | act->height); +- aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4); +- + size *= 4; + + if (size == video->srcs[0].size / 2) { +-- +2.21.0 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend index 2a9984661..c5d48eb90 100644 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -17,7 +17,6 @@ SRC_URI += " \ file://0022-Add-AST2500-eSPI-driver.patch \ file://0026-Add-support-for-new-PECI-commands.patch \ file://0028-Add-AST2500-JTAG-driver.patch \ - file://0029-i2c-aspeed-Improve-driver-to-support-multi-master-us.patch \ file://0030-Add-dump-debug-code-into-I2C-drivers.patch \ file://0031-Add-high-speed-baud-rate-support-for-UART.patch \ file://0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch \ @@ -34,5 +33,16 @@ SRC_URI += " \ file://0047-misc-Block-error-printing-on-probe-defer-case-in-Asp.patch \ file://0048-ARM-dts-aspeed-Set-default-status-of-LPC-BT-as-disab.patch \ file://0049-Suppress-excessive-HID-gadget-error-logs.patch \ - file://0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch \ + file://0051-Add-AST2500-JTAG-device.patch \ + file://0052-drivers-jtag-Add-JTAG-core-driver.patch \ + file://0053-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG.patch \ + file://0054-Documentation-jtag-Add-bindings-for-Aspeed-SoC.patch \ + file://0055-Documentation-jtag-Add-ABI-documentation.patch \ + file://0056-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch \ + file://0057-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch \ + file://0058-i2c-aspeed-add-general-call-support.patch \ + file://0059-media-aspeed-remove-source-buffer-allocation-before-.patch \ + file://0060-media-aspeed-use-different-delays-for-triggering-VE-.patch \ + file://0061-media-aspeed-fix-an-incorrect-timeout-checking-in-mo.patch \ + file://0062-media-aspeed-add-a-workaround-to-fix-a-silicon-bug.patch \ " diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch deleted file mode 100644 index 03460302d..000000000 --- a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch +++ /dev/null @@ -1,456 +0,0 @@ -From 15f9ba436815307c1df7ace505e6f6ee04a4762b Mon Sep 17 00:00:00 2001 -From: David Cobbley <david.j.cobbley@linux.intel.com> -Date: Thu, 8 Mar 2018 12:18:00 -0800 -Subject: [PATCH 1/3] Patch to keep consistent MAC and IP address inbetween - power cycles - -Currently, your mac will reset upon AC cycle unless you ask systemd use -a MAC provided in your network configuration file. This will write your -randomly generate MAC to the config file upond first boot up. - -Change-Id: Id47d24c62e459cde101add18be2f46c0b010e7fe -Signed-off-by: David Cobbley <david.j.cobbley@linux.intel.com> -Signed-off-by: James Feist <james.feist@linux.intel.com> ---- - ethernet_interface.cpp | 4 +- - ethernet_interface.hpp | 360 +++++++++++++++++++++-------------------- - network_config.cpp | 22 +-- - 3 files changed, 195 insertions(+), 191 deletions(-) - -diff --git a/ethernet_interface.cpp b/ethernet_interface.cpp -index 3fd7835..fd09b7a 100644 ---- a/ethernet_interface.cpp -+++ b/ethernet_interface.cpp -@@ -200,8 +200,8 @@ InterfaceInfo EthernetInterface::getInterfaceInfo() const - * @return macaddress on success - */ - --std::string -- EthernetInterface::getMACAddress(const std::string& interfaceName) const -+std::string EthernetInterface::getMACAddress( -+ const std::string& interfaceName) - { - ifreq ifr{}; - char macAddress[mac_address::size]{}; -diff --git a/ethernet_interface.hpp b/ethernet_interface.hpp -index bfe1d54..d62ca34 100644 ---- a/ethernet_interface.hpp -+++ b/ethernet_interface.hpp -@@ -59,185 +59,187 @@ using VlanInterfaceMap = - */ - class EthernetInterface : public Ifaces - { -- public: -- EthernetInterface() = delete; -- EthernetInterface(const EthernetInterface&) = delete; -- EthernetInterface& operator=(const EthernetInterface&) = delete; -- EthernetInterface(EthernetInterface&&) = delete; -- EthernetInterface& operator=(EthernetInterface&&) = delete; -- virtual ~EthernetInterface() = default; -- -- /** @brief Constructor to put object onto bus at a dbus path. -- * @param[in] bus - Bus to attach to. -- * @param[in] objPath - Path to attach at. -- * @param[in] dhcpEnabled - is dhcp enabled(true/false). -- * @param[in] parent - parent object. -- * @param[in] emitSignal - true if the object added signal needs to be -- * send. -- */ -- EthernetInterface(sdbusplus::bus::bus& bus, const std::string& objPath, -- bool dhcpEnabled, Manager& parent, -- bool emitSignal = true); -- -- /** @brief Function to create ipaddress dbus object. -- * @param[in] addressType - Type of ip address. -- * @param[in] ipaddress- IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway ip address. -- */ -- -- void iP(IP::Protocol addressType, std::string ipaddress, -- uint8_t prefixLength, std::string gateway) override; -- -- /* @brief delete the dbus object of the given ipaddress. -- * @param[in] ipaddress - IP address. -- */ -- void deleteObject(const std::string& ipaddress); -- -- /* @brief delete the vlan dbus object of the given interface. -- * Also deletes the device file and the network file. -- * @param[in] interface - VLAN Interface. -- */ -- void deleteVLANObject(const std::string& interface); -- -- /* @brief creates the dbus object(IPaddres) given in the address list. -- * @param[in] addrs - address list for which dbus objects needs -- * to create. -- */ -- void createIPAddressObjects(); -- -- /* @brief Gets all the ip addresses. -- * @returns the list of ipaddress. -- */ -- const AddressMap& getAddresses() const -- { -- return addrs; -- } -- -- /** Set value of DHCPEnabled */ -- bool dHCPEnabled(bool value) override; -- -- /** @brief sets the MAC address. -- * @param[in] value - MAC address which needs to be set on the system. -- * @returns macAddress of the interface or throws an error. -- */ -- std::string mACAddress(std::string value) override; -- -- /** @brief sets the NTP servers. -- * @param[in] value - vector of NTP servers. -- */ -- ServerList nTPServers(ServerList value) override; -- -- /** @brief sets the DNS/nameservers. -- * @param[in] value - vector of DNS servers. -- */ -- ServerList nameservers(ServerList value) override; -- -- /** @brief create Vlan interface. -- * @param[in] id- VLAN identifier. -- */ -- void createVLAN(VlanId id); -- -- /** @brief load the vlan info from the system -- * and creates the ip address dbus objects. -- * @param[in] vlanID- VLAN identifier. -- */ -- void loadVLAN(VlanId vlanID); -- -- /** @brief write the network conf file with the in-memory objects. -- */ -- void writeConfigurationFile(); -- -- /** @brief delete all dbus objects. -- */ -- void deleteAll(); -- -- using EthernetInterfaceIntf::dHCPEnabled; -- using EthernetInterfaceIntf::interfaceName; -- using MacAddressIntf::mACAddress; -- -- /** @brief Absolute path of the resolv conf file */ -- static constexpr auto resolvConfFile = "/etc/resolv.conf"; -- -- protected: -- /** @brief get the info of the ethernet interface. -- * @return tuple having the link speed,autonegotiation,duplexmode . -- */ -- InterfaceInfo getInterfaceInfo() const; -- -- /* @brief delete the vlan interface from system. -- * @param[in] interface - vlan Interface. -- */ -- void deleteVLANFromSystem(const std::string& interface); -- -- /** @brief get the mac address of the interface. -- * @param[in] interfaceName - Network interface name. -- * @return macaddress on success -- */ -- -- std::string getMACAddress(const std::string& interfaceName) const; -- -- /** @brief construct the ip address dbus object path. -- * @param[in] addressType - Type of ip address. -- * @param[in] ipaddress - IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway address. -- -- * @return path of the address object. -- */ -- -- std::string generateObjectPath(IP::Protocol addressType, -- const std::string& ipaddress, -- uint8_t prefixLength, -- const std::string& gateway) const; -- -- /** @brief generates the id by doing hash of ipaddress, -- * prefixlength and the gateway. -- * @param[in] ipaddress - IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway address. -- * @return hash string. -- */ -- -- static std::string generateId(const std::string& ipaddress, -- uint8_t prefixLength, -- const std::string& gateway); -- -- /** @brief write the dhcp section **/ -- void writeDHCPSection(std::fstream& stream); -- -- /** @brief get the NTP server list from the network conf -- * -- */ -- ServerList getNTPServersFromConf(); -- -- /** @brief write the DNS entries to resolver file. -- * @param[in] dnsList - DNS server list which needs to be written. -- * @param[in] file - File to write the name server entries to. -- */ -- void writeDNSEntries(const ServerList& dnsList, const std::string& file); -- -- /** @brief get the name server details from the network conf -- * -- */ -- ServerList getNameServerFromConf(); -- -- /** @brief Persistent sdbusplus DBus bus connection. */ -- sdbusplus::bus::bus& bus; -- -- /** @brief Network Manager object. */ -- Manager& manager; -- -- /** @brief Persistent map of IPAddress dbus objects and their names */ -- AddressMap addrs; -- -- /** @brief Persistent map of VLAN interface dbus objects and their names */ -- VlanInterfaceMap vlanInterfaces; -- -- /** @brief Dbus object path */ -- std::string objPath; -- -- friend class TestEthernetInterface; -+ public: -+ EthernetInterface() = delete; -+ EthernetInterface(const EthernetInterface&) = delete; -+ EthernetInterface& operator=(const EthernetInterface&) = delete; -+ EthernetInterface(EthernetInterface&&) = delete; -+ EthernetInterface& operator=(EthernetInterface&&) = delete; -+ virtual ~EthernetInterface() = default; -+ -+ /** @brief Constructor to put object onto bus at a dbus path. -+ * @param[in] bus - Bus to attach to. -+ * @param[in] objPath - Path to attach at. -+ * @param[in] dhcpEnabled - is dhcp enabled(true/false). -+ * @param[in] parent - parent object. -+ * @param[in] emitSignal - true if the object added signal needs to be -+ * send. -+ */ -+ EthernetInterface(sdbusplus::bus::bus& bus, -+ const std::string& objPath, -+ bool dhcpEnabled, -+ Manager& parent, -+ bool emitSignal = true); -+ -+ /** @brief Function to create ipaddress dbus object. -+ * @param[in] addressType - Type of ip address. -+ * @param[in] ipaddress- IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway ip address. -+ */ -+ -+ void iP(IP::Protocol addressType, -+ std::string ipaddress, -+ uint8_t prefixLength, -+ std::string gateway) override; -+ -+ /* @brief delete the dbus object of the given ipaddress. -+ * @param[in] ipaddress - IP address. -+ */ -+ void deleteObject(const std::string& ipaddress); -+ -+ /* @brief delete the vlan dbus object of the given interface. -+ * Also deletes the device file and the network file. -+ * @param[in] interface - VLAN Interface. -+ */ -+ void deleteVLANObject(const std::string& interface); -+ -+ /* @brief creates the dbus object(IPaddres) given in the address list. -+ * @param[in] addrs - address list for which dbus objects needs -+ * to create. -+ */ -+ void createIPAddressObjects(); -+ -+ /* @brief Gets all the ip addresses. -+ * @returns the list of ipaddress. -+ */ -+ const AddressMap& getAddresses() const { return addrs; } -+ -+ /** Set value of DHCPEnabled */ -+ bool dHCPEnabled(bool value) override; -+ -+ /** @brief sets the MAC address. -+ * @param[in] value - MAC address which needs to be set on the system. -+ * @returns macAddress of the interface or throws an error. -+ */ -+ std::string mACAddress(std::string value) override; -+ -+ /** @brief sets the NTP servers. -+ * @param[in] value - vector of NTP servers. -+ */ -+ ServerList nTPServers(ServerList value) override; -+ -+ /** @brief sets the DNS/nameservers. -+ * @param[in] value - vector of DNS servers. -+ */ -+ ServerList nameservers(ServerList value) override; -+ -+ /** @brief create Vlan interface. -+ * @param[in] id- VLAN identifier. -+ */ -+ void createVLAN(VlanId id); -+ -+ /** @brief load the vlan info from the system -+ * and creates the ip address dbus objects. -+ * @param[in] vlanID- VLAN identifier. -+ */ -+ void loadVLAN(VlanId vlanID); -+ -+ /** @brief write the network conf file with the in-memory objects. -+ */ -+ void writeConfigurationFile(); -+ -+ /** @brief delete all dbus objects. -+ */ -+ void deleteAll(); -+ -+ /** @brief get the mac address of the interface. -+ * @param[in] interfaceName - Network interface name. -+ * @return macaddress on success -+ */ -+ -+ static std::string getMACAddress(const std::string& interfaceName); -+ -+ using EthernetInterfaceIntf::dHCPEnabled; -+ using EthernetInterfaceIntf::interfaceName; -+ using MacAddressIntf::mACAddress; -+ -+ /** @brief Absolute path of the resolv conf file */ -+ static constexpr auto resolvConfFile = "/etc/resolv.conf"; -+ -+ protected: -+ /** @brief get the info of the ethernet interface. -+ * @return tuple having the link speed,autonegotiation,duplexmode . -+ */ -+ InterfaceInfo getInterfaceInfo() const; -+ -+ /* @brief delete the vlan interface from system. -+ * @param[in] interface - vlan Interface. -+ */ -+ void deleteVLANFromSystem(const std::string& interface); -+ -+ /** @brief construct the ip address dbus object path. -+ * @param[in] addressType - Type of ip address. -+ * @param[in] ipaddress - IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway address. -+ -+ * @return path of the address object. -+ */ -+ -+ std::string generateObjectPath(IP::Protocol addressType, -+ const std::string& ipaddress, -+ uint8_t prefixLength, -+ const std::string& gateway) const; -+ -+ /** @brief generates the id by doing hash of ipaddress, -+ * prefixlength and the gateway. -+ * @param[in] ipaddress - IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway address. -+ * @return hash string. -+ */ -+ -+ static std::string generateId(const std::string& ipaddress, -+ uint8_t prefixLength, -+ const std::string& gateway); -+ -+ /** @brief write the dhcp section **/ -+ void writeDHCPSection(std::fstream& stream);; -+ -+ /** @brief get the NTP server list from the network conf -+ * -+ */ -+ ServerList getNTPServersFromConf(); -+ -+ /** @brief write the DNS entries to resolver file. -+ * @param[in] dnsList - DNS server list which needs to be written. -+ * @param[in] file - File to write the name server entries to. -+ */ -+ void writeDNSEntries(const ServerList& dnsList, -+ const std::string& file); -+ -+ /** @brief get the name server details from the network conf -+ * -+ */ -+ ServerList getNameServerFromConf(); -+ -+ /** @brief Persistent sdbusplus DBus bus connection. */ -+ sdbusplus::bus::bus& bus; -+ -+ /** @brief Network Manager object. */ -+ Manager& manager; -+ -+ /** @brief Persistent map of IPAddress dbus objects and their names */ -+ AddressMap addrs; -+ -+ /** @brief Persistent map of VLAN interface dbus objects and their names */ -+ VlanInterfaceMap vlanInterfaces; -+ -+ /** @brief Dbus object path */ -+ std::string objPath; -+ -+ friend class TestEthernetInterface; - }; - - } // namespace network -diff --git a/network_config.cpp b/network_config.cpp -index e83b16c..8ebad54 100644 ---- a/network_config.cpp -+++ b/network_config.cpp -@@ -1,3 +1,5 @@ -+#include "network_config.hpp" -+#include "ethernet_interface.hpp" - #include "config.h" - - #include "network_config.hpp" -@@ -5,27 +7,27 @@ - #include <fstream> - #include <string> - --namespace phosphor --{ --namespace network --{ -+namespace phosphor { -+namespace network { - --namespace bmc --{ --void writeDHCPDefault(const std::string& filename, const std::string& interface) -+namespace bmc { -+void writeDHCPDefault(const std::string &filename, const std::string &interface) - { -+ - std::ofstream filestream; - - filestream.open(filename); - filestream << "[Match]\nName=" << interface << -- "\n[Network]\nDHCP=true\n" -+ "\n[Network]\nDHCP=true\n" - #ifdef LINK_LOCAL_AUTOCONFIGURATION - "LinkLocalAddressing=yes\n" - #else - "LinkLocalAddressing=no\n" - #endif -- "IPv6AcceptRA=false\n" -- "[DHCP]\nClientIdentifier=mac\n"; -+ "IPv6AcceptRA=false\n" -+ "[DHCP]\nClientIdentifier=mac\n" -+ "[Link]\nMACAddress=" -+ << EthernetInterface::getMACAddress(interface) << "\n"; - filestream.close(); - } - } // namespace bmc --- -2.17.1 - diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch index 251f68319..b46702902 100644 --- a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch @@ -1,19 +1,19 @@ -From ebb359773b8a5c03a25c3a48c5080bb246c07c71 Mon Sep 17 00:00:00 2001 +From 53dbefc9f31dcfca06d7c7705ea3dcfc5e93ae72 Mon Sep 17 00:00:00 2001 From: David Cobbley <david.j.cobbley@linux.intel.com> Date: Wed, 6 Jun 2018 11:11:43 -0700 -Subject: [PATCH 2/3] IPv6 Network changes to configuration file +Subject: [PATCH 1/2] IPv6 Network changes to configuration file Allow Additional parameters to be set for IPv6 Change-Id: If662f1ce2d265bc525073890c49231bf6f2b8a30 --- ethernet_interface.cpp | 109 +++++++++++++++++++++++++++++++++++++++-- - ethernet_interface.hpp | 19 ++++++- + ethernet_interface.hpp | 17 +++++++ util.cpp | 3 +- - 3 files changed, 124 insertions(+), 7 deletions(-) + 3 files changed, 123 insertions(+), 6 deletions(-) diff --git a/ethernet_interface.cpp b/ethernet_interface.cpp -index fd09b7a..63f1160 100644 +index 154efcb..aa1c895 100644 --- a/ethernet_interface.cpp +++ b/ethernet_interface.cpp @@ -46,6 +46,8 @@ EthernetInterface::EthernetInterface(sdbusplus::bus::bus& bus, @@ -25,7 +25,7 @@ index fd09b7a..63f1160 100644 MacAddressIntf::mACAddress(getMACAddress(intfName)); EthernetInterfaceIntf::nTPServers(getNTPServersFromConf()); EthernetInterfaceIntf::nameservers(getNameServerFromConf()); -@@ -322,7 +324,16 @@ std::string EthernetInterface::generateObjectPath( +@@ -329,7 +331,16 @@ std::string EthernetInterface::generateObjectPath( objectPath /= generateId(ipaddress, prefixLength, gateway); return objectPath.string(); } @@ -43,9 +43,9 @@ index fd09b7a..63f1160 100644 bool EthernetInterface::dHCPEnabled(bool value) { if (value == EthernetInterfaceIntf::dHCPEnabled()) -@@ -433,7 +444,80 @@ void EthernetInterface::createVLAN(VlanId id) - // write the new vlan device entry to the configuration(network) file. - manager.writeToConfigurationFile(); +@@ -442,7 +453,80 @@ ObjectPath EthernetInterface::createVLAN(VlanId id) + + return path; } +bool EthernetInterface::getIPv6AcceptRAFromConf() +{ @@ -124,7 +124,7 @@ index fd09b7a..63f1160 100644 ServerList EthernetInterface::getNTPServersFromConf() { fs::path confPath = manager.getConfDir(); -@@ -515,7 +599,8 @@ void EthernetInterface::writeConfigurationFile() +@@ -524,7 +608,8 @@ void EthernetInterface::writeConfigurationFile() #else stream << "LinkLocalAddressing=no\n"; #endif @@ -134,7 +134,7 @@ index fd09b7a..63f1160 100644 // Add the VLAN entry for (const auto& intf : vlanInterfaces) -@@ -524,8 +609,24 @@ void EthernetInterface::writeConfigurationFile() +@@ -533,8 +618,24 @@ void EthernetInterface::writeConfigurationFile() << "\n"; } // Add the DHCP entry @@ -162,40 +162,38 @@ index fd09b7a..63f1160 100644 // When the interface configured as dhcp, we don't need below given entries // in config file. diff --git a/ethernet_interface.hpp b/ethernet_interface.hpp -index d62ca34..7116b47 100644 +index c65726a..55fd7d9 100644 --- a/ethernet_interface.hpp +++ b/ethernet_interface.hpp -@@ -205,7 +205,24 @@ class EthernetInterface : public Ifaces - const std::string& gateway); +@@ -207,6 +207,23 @@ class EthernetInterface : public Ifaces + /** @brief write the dhcp section **/ + void writeDHCPSection(std::fstream& stream); - /** @brief write the dhcp section **/ -- void writeDHCPSection(std::fstream& stream);; -+ void writeDHCPSection(std::fstream& stream); ++ /** @brief get the IPv6AcceptRA flag from the network configuration file ++ * ++ */ ++ bool getIPv6AcceptRAFromConf(); + -+ /** @brief get the IPv6AcceptRA flag from the network configuration file -+ * -+ */ -+ bool getIPv6AcceptRAFromConf(); ++ /** @brief check conf file for Router Advertisements ++ * ++ */ ++ bool iPv6AcceptRA(bool value) override; + -+ /** @brief check conf file for Router Advertisements -+ * -+ */ -+ bool iPv6AcceptRA(bool value) override; ++ /** @brief get the allowed network modes. Similar to DHCP enabled, but ++ * more specific ++ */ ++ IPAllowed getIPAddressEnablesFromConf(); + -+ /** @brief get the allowed network modes. Similar to DHCP enabled, but -+ * more specific -+ */ -+ IPAllowed getIPAddressEnablesFromConf(); ++ IPAllowed iPAddressEnables(IPAllowed) override; + -+ IPAllowed iPAddressEnables(IPAllowed) override; - - /** @brief get the NTP server list from the network conf - * + /** @brief get the NTP server list from the network conf + * + */ diff --git a/util.cpp b/util.cpp -index b66f908..9f06e2e 100644 +index 6bc1497..6c60d54 100644 --- a/util.cpp +++ b/util.cpp -@@ -405,8 +405,7 @@ bool getDHCPValue(const std::string& confDir, const std::string& intf) +@@ -461,8 +461,7 @@ bool getDHCPValue(const std::string& confDir, const std::string& intf) entry("RC=%d", rc)); return dhcp; } diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch index 4610b8b32..79e8d96cc 100755..100644 --- a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch @@ -1,7 +1,7 @@ -From 64fff77b31de705a42c5061e9d14946255c6aca1 Mon Sep 17 00:00:00 2001 +From f28e3694f4b15c6eee58733f57213d360fc5ac7a Mon Sep 17 00:00:00 2001 From: AppaRao Puli <apparao.puli@linux.intel.com> Date: Wed, 5 Sep 2018 14:16:54 +0530 -Subject: [PATCH] Adding channel specific privilege to network +Subject: [PATCH 2/2] Adding channel specific privilege to network - Adding the channel access information to the network interface object. This privilege will be used in @@ -18,14 +18,14 @@ Change-Id: I3b592a19363eef684e31d5f7c34dad8f2f9211df Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> Signed-off-by: Yong Li <yong.b.li@linux.intel.com> --- - ethernet_interface.cpp | 119 +++++++++++++- - ethernet_interface.hpp | 433 ++++++++++++++++++++++++++----------------------- - network_manager.cpp | 104 ++++++++++++ - network_manager.hpp | 9 + - 4 files changed, 464 insertions(+), 201 deletions(-) + ethernet_interface.cpp | 116 +++++++++++++++++++++++++++++++++++++++++ + ethernet_interface.hpp | 39 +++++++++++++- + network_manager.cpp | 104 ++++++++++++++++++++++++++++++++++++ + network_manager.hpp | 9 ++++ + 4 files changed, 267 insertions(+), 1 deletion(-) diff --git a/ethernet_interface.cpp b/ethernet_interface.cpp -index 9437b4c..6d23b3d 100644 +index aa1c895..e3ea33c 100644 --- a/ethernet_interface.cpp +++ b/ethernet_interface.cpp @@ -35,6 +35,9 @@ using namespace phosphor::logging; @@ -46,17 +46,7 @@ index 9437b4c..6d23b3d 100644 // Emit deferred signal. if (emitSignal) -@@ -208,8 +212,7 @@ InterfaceInfo EthernetInterface::getInterfaceInfo() const - * @return macaddress on success - */ - --std::string EthernetInterface::getMACAddress( -- const std::string& interfaceName) -+std::string EthernetInterface::getMACAddress(const std::string& interfaceName) - { - ifreq ifr{}; - char macAddress[mac_address::size]{}; -@@ -829,5 +832,117 @@ void EthernetInterface::deleteAll() +@@ -837,5 +841,117 @@ void EthernetInterface::deleteAll() manager.writeToConfigurationFile(); } @@ -175,7 +165,7 @@ index 9437b4c..6d23b3d 100644 } // namespace network } // namespace phosphor diff --git a/ethernet_interface.hpp b/ethernet_interface.hpp -index 7116b47..7b1da9a 100644 +index 55fd7d9..7bf93a6 100644 --- a/ethernet_interface.hpp +++ b/ethernet_interface.hpp @@ -2,10 +2,13 @@ @@ -202,7 +192,7 @@ index 7116b47..7b1da9a 100644 using IP = sdbusplus::xyz::openbmc_project::Network::server::IP; -@@ -29,9 +33,14 @@ using EthernetInterfaceIntf = +@@ -29,10 +33,15 @@ using EthernetInterfaceIntf = sdbusplus::xyz::openbmc_project::Network::server::EthernetInterface; using MacAddressIntf = sdbusplus::xyz::openbmc_project::Network::server::MACAddress; @@ -210,6 +200,7 @@ index 7116b47..7b1da9a 100644 + sdbusplus::xyz::openbmc_project::Channel::server::ChannelAccess; using ServerList = std::vector<std::string>; + using ObjectPath = sdbusplus::message::object_path; +using DbusVariant = + sdbusplus::message::variant<std::string, std::vector<std::string>>; @@ -217,308 +208,10 @@ index 7116b47..7b1da9a 100644 namespace fs = std::experimental::filesystem; class Manager; // forward declaration of network manager. -@@ -59,204 +68,230 @@ using VlanInterfaceMap = - */ - class EthernetInterface : public Ifaces - { -- public: -- EthernetInterface() = delete; -- EthernetInterface(const EthernetInterface&) = delete; -- EthernetInterface& operator=(const EthernetInterface&) = delete; -- EthernetInterface(EthernetInterface&&) = delete; -- EthernetInterface& operator=(EthernetInterface&&) = delete; -- virtual ~EthernetInterface() = default; -- -- /** @brief Constructor to put object onto bus at a dbus path. -- * @param[in] bus - Bus to attach to. -- * @param[in] objPath - Path to attach at. -- * @param[in] dhcpEnabled - is dhcp enabled(true/false). -- * @param[in] parent - parent object. -- * @param[in] emitSignal - true if the object added signal needs to be -- * send. -- */ -- EthernetInterface(sdbusplus::bus::bus& bus, -- const std::string& objPath, -- bool dhcpEnabled, -- Manager& parent, -- bool emitSignal = true); -- -- /** @brief Function to create ipaddress dbus object. -- * @param[in] addressType - Type of ip address. -- * @param[in] ipaddress- IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway ip address. -- */ -- -- void iP(IP::Protocol addressType, -- std::string ipaddress, -- uint8_t prefixLength, -- std::string gateway) override; -- -- /* @brief delete the dbus object of the given ipaddress. -- * @param[in] ipaddress - IP address. -- */ -- void deleteObject(const std::string& ipaddress); -- -- /* @brief delete the vlan dbus object of the given interface. -- * Also deletes the device file and the network file. -- * @param[in] interface - VLAN Interface. -- */ -- void deleteVLANObject(const std::string& interface); -- -- /* @brief creates the dbus object(IPaddres) given in the address list. -- * @param[in] addrs - address list for which dbus objects needs -- * to create. -- */ -- void createIPAddressObjects(); -- -- /* @brief Gets all the ip addresses. -- * @returns the list of ipaddress. -- */ -- const AddressMap& getAddresses() const { return addrs; } -- -- /** Set value of DHCPEnabled */ -- bool dHCPEnabled(bool value) override; -- -- /** @brief sets the MAC address. -- * @param[in] value - MAC address which needs to be set on the system. -- * @returns macAddress of the interface or throws an error. -- */ -- std::string mACAddress(std::string value) override; -- -- /** @brief sets the NTP servers. -- * @param[in] value - vector of NTP servers. -- */ -- ServerList nTPServers(ServerList value) override; -- -- /** @brief sets the DNS/nameservers. -- * @param[in] value - vector of DNS servers. -- */ -- ServerList nameservers(ServerList value) override; -- -- /** @brief create Vlan interface. -- * @param[in] id- VLAN identifier. -- */ -- void createVLAN(VlanId id); -- -- /** @brief load the vlan info from the system -- * and creates the ip address dbus objects. -- * @param[in] vlanID- VLAN identifier. -- */ -- void loadVLAN(VlanId vlanID); -- -- /** @brief write the network conf file with the in-memory objects. -- */ -- void writeConfigurationFile(); -- -- /** @brief delete all dbus objects. -- */ -- void deleteAll(); -- -- /** @brief get the mac address of the interface. -- * @param[in] interfaceName - Network interface name. -- * @return macaddress on success -- */ -- -- static std::string getMACAddress(const std::string& interfaceName); -- -- using EthernetInterfaceIntf::dHCPEnabled; -- using EthernetInterfaceIntf::interfaceName; -- using MacAddressIntf::mACAddress; -- -- /** @brief Absolute path of the resolv conf file */ -- static constexpr auto resolvConfFile = "/etc/resolv.conf"; -- -- protected: -- /** @brief get the info of the ethernet interface. -- * @return tuple having the link speed,autonegotiation,duplexmode . -- */ -- InterfaceInfo getInterfaceInfo() const; -- -- /* @brief delete the vlan interface from system. -- * @param[in] interface - vlan Interface. -- */ -- void deleteVLANFromSystem(const std::string& interface); -- -- /** @brief construct the ip address dbus object path. -- * @param[in] addressType - Type of ip address. -- * @param[in] ipaddress - IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway address. -- -- * @return path of the address object. -- */ -- -- std::string generateObjectPath(IP::Protocol addressType, -- const std::string& ipaddress, -- uint8_t prefixLength, -- const std::string& gateway) const; -- -- /** @brief generates the id by doing hash of ipaddress, -- * prefixlength and the gateway. -- * @param[in] ipaddress - IP address. -- * @param[in] prefixLength - Length of prefix. -- * @param[in] gateway - Gateway address. -- * @return hash string. -- */ -- -- static std::string generateId(const std::string& ipaddress, -- uint8_t prefixLength, -- const std::string& gateway); -- -- /** @brief write the dhcp section **/ -- void writeDHCPSection(std::fstream& stream); -- -- /** @brief get the IPv6AcceptRA flag from the network configuration file -- * -- */ -- bool getIPv6AcceptRAFromConf(); -- -- /** @brief check conf file for Router Advertisements -- * -- */ -- bool iPv6AcceptRA(bool value) override; -- -- /** @brief get the allowed network modes. Similar to DHCP enabled, but -- * more specific -- */ -- IPAllowed getIPAddressEnablesFromConf(); -- -- IPAllowed iPAddressEnables(IPAllowed) override; -- -- /** @brief get the NTP server list from the network conf -- * -- */ -- ServerList getNTPServersFromConf(); -- -- /** @brief write the DNS entries to resolver file. -- * @param[in] dnsList - DNS server list which needs to be written. -- * @param[in] file - File to write the name server entries to. -- */ -- void writeDNSEntries(const ServerList& dnsList, -- const std::string& file); -- -- /** @brief get the name server details from the network conf -- * -- */ -- ServerList getNameServerFromConf(); -- -- /** @brief Persistent sdbusplus DBus bus connection. */ -- sdbusplus::bus::bus& bus; -- -- /** @brief Network Manager object. */ -- Manager& manager; -- -- /** @brief Persistent map of IPAddress dbus objects and their names */ -- AddressMap addrs; -- -- /** @brief Persistent map of VLAN interface dbus objects and their names */ -- VlanInterfaceMap vlanInterfaces; -- -- /** @brief Dbus object path */ -- std::string objPath; -- -- friend class TestEthernetInterface; -+ public: -+ EthernetInterface() = delete; -+ EthernetInterface(const EthernetInterface&) = delete; -+ EthernetInterface& operator=(const EthernetInterface&) = delete; -+ EthernetInterface(EthernetInterface&&) = delete; -+ EthernetInterface& operator=(EthernetInterface&&) = delete; -+ virtual ~EthernetInterface() = default; -+ -+ /** @brief Constructor to put object onto bus at a dbus path. -+ * @param[in] bus - Bus to attach to. -+ * @param[in] objPath - Path to attach at. -+ * @param[in] dhcpEnabled - is dhcp enabled(true/false). -+ * @param[in] parent - parent object. -+ * @param[in] emitSignal - true if the object added signal needs to be -+ * send. -+ */ -+ EthernetInterface(sdbusplus::bus::bus& bus, const std::string& objPath, -+ bool dhcpEnabled, Manager& parent, -+ bool emitSignal = true); -+ -+ /** @brief Function to create ipaddress dbus object. -+ * @param[in] addressType - Type of ip address. -+ * @param[in] ipaddress- IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway ip address. -+ */ -+ -+ void iP(IP::Protocol addressType, std::string ipaddress, -+ uint8_t prefixLength, std::string gateway) override; -+ -+ /* @brief delete the dbus object of the given ipaddress. -+ * @param[in] ipaddress - IP address. -+ */ -+ void deleteObject(const std::string& ipaddress); -+ -+ /* @brief delete the vlan dbus object of the given interface. -+ * Also deletes the device file and the network file. -+ * @param[in] interface - VLAN Interface. -+ */ -+ void deleteVLANObject(const std::string& interface); -+ -+ /* @brief creates the dbus object(IPaddres) given in the address list. -+ * @param[in] addrs - address list for which dbus objects needs -+ * to create. -+ */ -+ void createIPAddressObjects(); -+ -+ /* @brief Gets all the ip addresses. -+ * @returns the list of ipaddress. -+ */ -+ const AddressMap& getAddresses() const -+ { -+ return addrs; -+ } -+ -+ /** Set value of DHCPEnabled */ -+ bool dHCPEnabled(bool value) override; -+ -+ /** @brief sets the MAC address. -+ * @param[in] value - MAC address which needs to be set on the system. -+ * @returns macAddress of the interface or throws an error. -+ */ -+ std::string mACAddress(std::string value) override; -+ -+ /** @brief sets the NTP servers. -+ * @param[in] value - vector of NTP servers. -+ */ -+ ServerList nTPServers(ServerList value) override; -+ -+ /** @brief sets the DNS/nameservers. -+ * @param[in] value - vector of DNS servers. -+ */ -+ ServerList nameservers(ServerList value) override; -+ -+ /** @brief create Vlan interface. -+ * @param[in] id- VLAN identifier. -+ */ -+ void createVLAN(VlanId id); -+ -+ /** @brief load the vlan info from the system -+ * and creates the ip address dbus objects. -+ * @param[in] vlanID- VLAN identifier. -+ */ -+ void loadVLAN(VlanId vlanID); -+ -+ /** @brief write the network conf file with the in-memory objects. -+ */ -+ void writeConfigurationFile(); -+ -+ /** @brief delete all dbus objects. -+ */ -+ void deleteAll(); -+ -+ /** @brief get the mac address of the interface. -+ * @param[in] interfaceName - Network interface name. -+ * @return macaddress on success -+ */ -+ -+ static std::string getMACAddress(const std::string& interfaceName); -+ +@@ -153,6 +162,14 @@ class EthernetInterface : public Ifaces + */ + void deleteAll(); + + /** @brief sets the channel maxium privilege. + * @param[in] value - Channel privilege which needs to be set on the + * system. @@ -527,102 +220,13 @@ index 7116b47..7b1da9a 100644 + std::string maxPrivilege(std::string value) override; + + using ChannelAccessIntf::maxPrivilege; -+ using EthernetInterfaceIntf::dHCPEnabled; -+ using EthernetInterfaceIntf::interfaceName; -+ using MacAddressIntf::mACAddress; -+ -+ /** @brief Absolute path of the resolv conf file */ -+ static constexpr auto resolvConfFile = "/etc/resolv.conf"; -+ -+ protected: -+ /** @brief get the info of the ethernet interface. -+ * @return tuple having the link speed,autonegotiation,duplexmode . -+ */ -+ InterfaceInfo getInterfaceInfo() const; -+ -+ /* @brief delete the vlan interface from system. -+ * @param[in] interface - vlan Interface. -+ */ -+ void deleteVLANFromSystem(const std::string& interface); -+ -+ /** @brief construct the ip address dbus object path. -+ * @param[in] addressType - Type of ip address. -+ * @param[in] ipaddress - IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway address. -+ -+ * @return path of the address object. -+ */ -+ -+ std::string generateObjectPath(IP::Protocol addressType, -+ const std::string& ipaddress, -+ uint8_t prefixLength, -+ const std::string& gateway) const; -+ -+ /** @brief generates the id by doing hash of ipaddress, -+ * prefixlength and the gateway. -+ * @param[in] ipaddress - IP address. -+ * @param[in] prefixLength - Length of prefix. -+ * @param[in] gateway - Gateway address. -+ * @return hash string. -+ */ -+ -+ static std::string generateId(const std::string& ipaddress, -+ uint8_t prefixLength, -+ const std::string& gateway); -+ -+ /** @brief write the dhcp section **/ -+ void writeDHCPSection(std::fstream& stream); -+ -+ /** @brief get the IPv6AcceptRA flag from the network configuration file -+ * -+ */ -+ bool getIPv6AcceptRAFromConf(); -+ -+ /** @brief check conf file for Router Advertisements -+ * -+ */ -+ bool iPv6AcceptRA(bool value) override; -+ -+ /** @brief get the allowed network modes. Similar to DHCP enabled, but -+ * more specific -+ */ -+ IPAllowed getIPAddressEnablesFromConf(); -+ -+ IPAllowed iPAddressEnables(IPAllowed) override; -+ -+ /** @brief get the NTP server list from the network conf -+ * -+ */ -+ ServerList getNTPServersFromConf(); -+ -+ /** @brief write the DNS entries to resolver file. -+ * @param[in] dnsList - DNS server list which needs to be written. -+ * @param[in] file - File to write the name server entries to. -+ */ -+ void writeDNSEntries(const ServerList& dnsList, const std::string& file); -+ -+ /** @brief get the name server details from the network conf -+ * -+ */ -+ ServerList getNameServerFromConf(); -+ -+ /** @brief Persistent sdbusplus DBus bus connection. */ -+ sdbusplus::bus::bus& bus; -+ -+ /** @brief Network Manager object. */ -+ Manager& manager; -+ -+ /** @brief Persistent map of IPAddress dbus objects and their names */ -+ AddressMap addrs; -+ -+ /** @brief Persistent map of VLAN interface dbus objects and their names */ -+ VlanInterfaceMap vlanInterfaces; -+ -+ /** @brief Dbus object path */ -+ std::string objPath; -+ -+ friend class TestEthernetInterface; + using EthernetInterfaceIntf::dHCPEnabled; + using EthernetInterfaceIntf::interfaceName; + using MacAddressIntf::mACAddress; +@@ -256,6 +273,26 @@ class EthernetInterface : public Ifaces + std::string objPath; + + friend class TestEthernetInterface; + + /** @brief gets the channel privilege. + * @param[in] interfaceName - Network interface name. @@ -647,10 +251,10 @@ index 7116b47..7b1da9a 100644 } // namespace network diff --git a/network_manager.cpp b/network_manager.cpp -index c4ab0da..c573d01 100644 +index fa5da0f..a5020f0 100644 --- a/network_manager.cpp +++ b/network_manager.cpp -@@ -30,6 +30,13 @@ extern std::unique_ptr<Timer> restartTimer; +@@ -34,6 +34,13 @@ extern std::unique_ptr<Timer> restartTimer; using namespace phosphor::logging; using namespace sdbusplus::xyz::openbmc_project::Common::Error; @@ -664,7 +268,7 @@ index c4ab0da..c573d01 100644 Manager::Manager(sdbusplus::bus::bus& bus, const char* objPath, const std::string& path) : details::VLANCreateIface(bus, objPath, true), -@@ -37,6 +44,103 @@ Manager::Manager(sdbusplus::bus::bus& bus, const char* objPath, +@@ -41,6 +48,103 @@ Manager::Manager(sdbusplus::bus::bus& bus, const char* objPath, { fs::path confDir(path); setConfDir(confDir); @@ -769,7 +373,7 @@ index c4ab0da..c573d01 100644 bool Manager::createDefaultNetworkFiles(bool force) diff --git a/network_manager.hpp b/network_manager.hpp -index e2dfea9..22eef04 100644 +index edb341f..e16b205 100644 --- a/network_manager.hpp +++ b/network_manager.hpp @@ -137,6 +137,9 @@ class Manager : public details::VLANCreateIface @@ -796,5 +400,5 @@ index e2dfea9..22eef04 100644 } // namespace network -- -2.7.4 +2.17.1 diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend index 275051e19..afec5d41f 100644 --- a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend @@ -2,8 +2,8 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" DEPENDS += "nlohmann-json" -SRC_URI += "file://0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch \ - file://0002-IPv6-Network-changes-to-configuration-file.patch \ +SRC_URI += "file://0002-IPv6-Network-changes-to-configuration-file.patch \ file://0003-Adding-channel-specific-privilege-to-network.patch \ " +SRCREV = "f273d2b5629d2a7d96802dc7a7ddb92e303ac8de" diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb new file mode 100644 index 000000000..0dab0fc1a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb @@ -0,0 +1,24 @@ +SUMMARY = "Enforce static MAC addresses" +DESCRIPTION = "Set a priority on MAC addresses to run with: \ + factory-specified > u-boot-specified > random" + +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" + +PV = "1.0" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SRC_URI = "\ + file://mac-check \ + file://${PN}.service \ + " + +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE_${PN} += "${PN}.service" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/mac-check ${D}${bindir} +} diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check new file mode 100644 index 000000000..67b8afd5e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check @@ -0,0 +1,78 @@ +#!/bin/sh +# Copyright 2018 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +read_hw_mac() { + local iface="$1" + cat /sys/class/net/"$iface"/address +} + +set_hw_mac() { + local iface="$1" + local mac="$2" + ip link show dev "$iface" | grep -q "${iface}:.*\<UP\>" 2>/dev/null + local up=$? + [[ $up -eq 0 ]] && ip link set dev "$iface" down + ip link set dev "$iface" address "$mac" + [[ $up -eq 0 ]] && ip link set dev "$iface" up +} + +SOFS_MNT=/var/sofs +read_sofs_mac() { + local iface="$1" + cat "${SOFS_MNT}/factory-settings/network/mac/${iface}" 2>/dev/null +} + +read_fw_env_mac() { + local envname="$1" + fw_printenv "$envname" 2>/dev/null | sed "s/^$envname=//" +} + +set_fw_env_mac() { + local envname="$1" + local mac="$2" + fw_setenv "$envname" "$mac" +} + +mac_check() { + local iface="$1" + local envname="$2" + + # read current HW MAC addr + local hw_mac=$(read_hw_mac "$iface") + + # read saved sofs MAC addr + local sofs_mac=$(read_sofs_mac "$iface") + + # if set and not the same as HW addr, set HW addr + if [ -n "$sofs_mac" ] && [ "$hw_mac" != "$sofs_mac" ]; then + set_hw_mac "$iface" "$sofs_mac" + hw_mac="$sofs_mac" + fi + + # read saved fw_env MAC addr + local fw_env_mac=$(read_fw_env_mac "$envname") + + # save to fw_env if not the same as HW addr + if [ -z "$fw_env_mac" ] || [ "$fw_env_mac" != "$hw_mac" ]; then + set_fw_env_mac "$envname" "$hw_mac" + fi +} + +while read IFACE UBDEV; do + mac_check "$IFACE" "$UBDEV" +done <<-END_CONF + eth0 eth1addr + eth1 ethaddr +END_CONF diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service new file mode 100644 index 000000000..86371db11 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service @@ -0,0 +1,11 @@ +[Unit] +Description=Enforce Static MAC addr mapping + +[Service] +Type=oneshot +Restart=no +ExecStart=/usr/bin/mac-check + +[Install] +WantedBy=network.target + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend index 2a6b5abb0..77ef33c29 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend @@ -1,6 +1,6 @@ # this is here just to bump faster than upstream SRC_URI = "git://github.com/openbmc/entity-manager.git" -SRCREV = "a218ddb84c5cb6f6d07c3febd14bb0395ce38e5f" +SRCREV = "24b01fdd5681726c71ddab73b2b9dfc89ee3de70" FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0002-Modify-Dbus-for-IPv6.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0002-Modify-Dbus-for-IPv6.patch index 5b86d3154..3ca81c388 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0002-Modify-Dbus-for-IPv6.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0002-Modify-Dbus-for-IPv6.patch @@ -1,22 +1,22 @@ -From 066ecddebc29a87b05f8c66491eec19bb27d1d33 Mon Sep 17 00:00:00 2001 +From 068b816b3c9bf75dcd2a808fc81c67a32fbe29ea Mon Sep 17 00:00:00 2001 From: David Cobbley <david.j.cobbley@linux.intel.com> Date: Wed, 6 Jun 2018 10:11:58 -0700 -Subject: [PATCH 3/3] Modify Dbus for IPv6. +Subject: [PATCH] Modify Dbus for IPv6. Add additional interfaces for IPv6 use. --- - .../Network/EthernetInterface.interface.yaml | 18 ++++++++++++++++++ - xyz/openbmc_project/Network/IP.interface.yaml | 4 ++++ - 2 files changed, 22 insertions(+) + .../Network/EthernetInterface.interface.yaml | 17 ++++++++++++++++- + xyz/openbmc_project/Network/IP.interface.yaml | 4 ++++ + 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/xyz/openbmc_project/Network/EthernetInterface.interface.yaml b/xyz/openbmc_project/Network/EthernetInterface.interface.yaml -index fc744fc..fd19e27 100644 +index 744ac77..6b7cd9a 100644 --- a/xyz/openbmc_project/Network/EthernetInterface.interface.yaml +++ b/xyz/openbmc_project/Network/EthernetInterface.interface.yaml -@@ -37,3 +37,21 @@ properties: - Implementation of this Dbus-interface is required to implement this property. - This property supports read/write operation. - Configure the NTP servers on the system during write operation. +@@ -42,6 +42,14 @@ properties: + description: > + This indicates link local auto configuration on this ethernet + interface and configured on this ethernet interface. + - name: IPv6AcceptRA + type: boolean + description: > @@ -25,8 +25,14 @@ index fc744fc..fd19e27 100644 + type: enum[self.IPAllowed] + description: > + The type of IP connection is allowed on this channel -+ -+enumerations: + + enumerations: + - name: LinkLocalConf +@@ -52,4 +60,11 @@ enumerations: + - name: v4 + - name: v6 + - name: none +- + - name: IPAllowed + description: > + Determines whether the system allows both IPv6 & IPv4, or disables on diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0006-dbus-interface-add-boot-option-support-for-floppy-an.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0006-dbus-interface-add-boot-option-support-for-floppy-an.patch deleted file mode 100644 index f0d7b03f8..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0006-dbus-interface-add-boot-option-support-for-floppy-an.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 643772fc7f6021fbfba3b14de0c86501ae3e7f3a Mon Sep 17 00:00:00 2001 -From: "Jia, Chunhui" <chunhui.jia@intel.com> -Date: Fri, 13 Jul 2018 15:22:05 +0800 -Subject: [PATCH] [dbus interface]add boot option support for floppy and USB - -Current implementations use ExternalMedia type to specify both CD/DVD/USB -/Floppy. But in IPMI spec, they are different. CD/DVD type is 0x5 and -USB/Floppy type is 0xF. - -This causes a bug that we can not force BIOS boots into USB/Floppy. - -Test: -$ ipmitool -H 10.239.56.91 -P 0penBmc -I lanplus raw - 0x0 0x8 0x5 0x80 0x14 0x00 0x00 0x00 -$ ipmitool -H 10.239.56.91 -P 0penBmc -I lanplus chassis bootparam get 5 -Boot parameter version: 1 -Boot parameter 5 is valid/unlocked -Boot parameter data: 8014000000 - Boot Flags : - - Boot Flag Valid - - Options apply to only next boot - - BIOS PC Compatible (legacy) boot - - Boot Device Selector : Force Boot from CD/DVD - - Console Redirection control : System Default - - BIOS verbosity : Console redirection occurs per BIOS - configuration setting (default) - - BIOS Mux Control Override : - BIOS uses recommended setting of the mux at the end of POST - -$ipmitool -H 10.239.56.91 -P 0penBmc -I lanplus raw - 0x0 0x8 0x5 0x80 0x3c 0x00 0x00 0x00 -$ipmitool -H 10.239.56.91 -P 0penBmc -I lanplus chassis bootparam get 5 -Boot parameter version: 1 -Boot parameter 5 is valid/unlocked -Boot parameter data: 803c000000 - Boot Flags : - - Boot Flag Valid - - Options apply to only next boot - - BIOS PC Compatible (legacy) boot - - Boot Device Selector : Force Boot from Floppy/primary removable media - - Console Redirection control : System Default - - BIOS verbosity : - Console redirection occurs per BIOS configuration setting (default) - - - BIOS Mux Control Override : - BIOS uses recommended setting of the mux at the end of POST - -Signed-off-by: Jia, Chunhui <chunhui.jia@intel.com> ---- - xyz/openbmc_project/Control/Boot/Source.interface.yaml | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/xyz/openbmc_project/Control/Boot/Source.interface.yaml b/xyz/openbmc_project/Control/Boot/Source.interface.yaml -index ea811bd..8e5916f 100644 ---- a/xyz/openbmc_project/Control/Boot/Source.interface.yaml -+++ b/xyz/openbmc_project/Control/Boot/Source.interface.yaml -@@ -15,12 +15,15 @@ enumerations: - - name: Disk - description: > - Boot from the local hard disk. -- - name: ExternalMedia -+ - name: DVD - description: > -- Boot from CD/DVD/USB, etc. -+ Boot from CD/DVD. - - name: Network - description: > - Boot from a remote source over a network. - - name: Default - description: > - Boot from an implementation defined source. -+ - name: Removable -+ description: > -+ Boot from floppy/primary removable media(USB). --- -2.16.2 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0017-Add-shutdown-policy-interface-for-get-set-shutdown-p.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0017-Add-shutdown-policy-interface-for-get-set-shutdown-p.patch deleted file mode 100644 index 587bcebf1..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0017-Add-shutdown-policy-interface-for-get-set-shutdown-p.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7ebb72a93922a0163a5b35c277f3bbd241bdf78c Mon Sep 17 00:00:00 2001 -From: Yong Li <yong.b.li@linux.intel.com> -Date: Mon, 22 Oct 2018 16:20:36 +0800 -Subject: [PATCH] Add shutdown policy interface for get/set shutdown policy OEM - IPMI commands - -The policy property is used to store the shutdown policy. - -Tested by: -busctl get-property "xyz.openbmc_project.Settings" \ -"/xyz/openbmc_project/control/shutdown_policy_config" \ -"xyz.openbmc_project.Control.ShutdownPolicy" "Policy" - -busctl set-property "xyz.openbmc_project.Settings" \ -"/xyz/openbmc_project/control/shutdown_policy_config" \ -"xyz.openbmc_project.Control.ShutdownPolicy" "Policy" y 1 - -Signed-off-by: Yong Li <yong.b.li@linux.intel.com> ---- - xyz/openbmc_project/Control/ShutdownPolicy.interface.yaml | 10 ++++++++++ - 1 file changed, 10 insertions(+) - create mode 100644 xyz/openbmc_project/Control/ShutdownPolicy.interface.yaml - -diff --git a/xyz/openbmc_project/Control/ShutdownPolicy.interface.yaml b/xyz/openbmc_project/Control/ShutdownPolicy.interface.yaml -new file mode 100644 -index 0000000..e562ea8 ---- /dev/null -+++ b/xyz/openbmc_project/Control/ShutdownPolicy.interface.yaml -@@ -0,0 +1,10 @@ -+description: > -+ An interface for node shutdown policy on multi-node products. -+properties: -+ - name: Policy -+ type: byte -+ description: > -+ 0: Do not shutdown node on a power supply over current(OC) -+ or a power supply over temperature(OT) event. -+ 1: Shutdown node on an OC/OT event. -+ Only available on multi-node products. --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch deleted file mode 100644 index 9fe383fda..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 2e265e85777345a318084c2f1f3b684f7e7ff4a4 Mon Sep 17 00:00:00 2001 -From: Cheng C Yang <cheng.c.yang@intel.com> -Date: Thu, 28 Mar 2019 18:06:54 +0800 -Subject: [PATCH] Change some properties name in SOL Dbus - -Change some properties name in SOL D-Bus interface to make the meaning -of the properties more clearly. - -Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> ---- - xyz/openbmc_project/Ipmi/SOL.interface.yaml | 25 +++++++++++++++++-------- - 1 file changed, 17 insertions(+), 8 deletions(-) - -diff --git a/xyz/openbmc_project/Ipmi/SOL.interface.yaml b/xyz/openbmc_project/Ipmi/SOL.interface.yaml -index 94db59f..96c8c87 100644 ---- a/xyz/openbmc_project/Ipmi/SOL.interface.yaml -+++ b/xyz/openbmc_project/Ipmi/SOL.interface.yaml -@@ -2,8 +2,8 @@ description: > - SOL properties use for Get/Set SOL config parameter command in host-ipmid - sending config to SOL process in net-ipmid. - Since some platforms need to access Get/Set SOL config parameter command -- through KCS, and current sol manager is implemented in net-ipmid and -- cannot be accessed by host-ipmid, add a dbus interface for host-ipmid -+ through KCS, and current SOL manager is implemented in net-ipmid and -+ cannot be accessed by host-ipmid, add a D-Bus interface for host-ipmid - command to transfer properties to net-ipmid. - This interface will be implemented in phosphor-settings. - properties: -@@ -17,12 +17,20 @@ properties: - description: > - SOL Enable property, this controls whether the SOL payload type - can be activated. -- - name: Authentication -+ - name: ForceEncryption -+ type: boolean -+ description: > -+ If SOL enable Force Payload Encryption. -+ - name: ForceAuthentication -+ type: boolean -+ description: > -+ If SOL enable Force Payload Authentication -+ - name: Privilege - type: byte - description: > -- If SOL enable Force Payload Encryption and Authenticaton. -- And the minimun operating privilege level SOL required. -- - name: Accumulate -+ Sets the minimum operating privilege level that is required to -+ be able to activate SOL by Activate Payload command. -+ - name: AccumulateIntervalMS - type: byte - description: > - Character Accumulate Interval in 5ms increments. -@@ -31,13 +39,14 @@ properties: - type: byte - description: > - BMC will automatically send an SOL character data packet containing -- this number of characters. -+ this number of characters as soon as this number of characters -+ (or greater) has been accepted from the baseboard serial controller. - - name: RetryCount - type: byte - description: > - Packet will be dropped if no ACK/NACK received by time retries - expire. -- - name: RetryInterval -+ - name: RetryIntervalMS - type: byte - description: > - Retry Interval in 10ms increments. --- -2.16.2 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend index e46c06bcd..8521f6839 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend @@ -1,12 +1,11 @@ SRC_URI = "git://github.com/openbmc/phosphor-dbus-interfaces.git" -SRCREV = "4623908c8c0e82d5831fca562c6f5a8430d494c8" +SRCREV = "b8a82d92bb6e1727257d745189215b03016a39c6" FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" SRC_URI += "file://0002-Modify-Dbus-for-IPv6.patch \ file://0003-Chassis-Power-Control-are-implemented.patch \ file://0005-Add-DBUS-interface-of-CPU-and-Memory-s-properties.patch \ - file://0006-dbus-interface-add-boot-option-support-for-floppy-an.patch \ file://0007-ipmi-set-BIOS-id.patch \ file://0009-Add-host-restart-cause-property.patch \ file://0010-Increase-the-default-watchdog-timeout-value.patch \ @@ -14,9 +13,7 @@ SRC_URI += "file://0002-Modify-Dbus-for-IPv6.patch \ file://0013-Add-ErrConfig.yaml-interface-for-processor-error-config.patch \ file://0014-Add-multiple-state-signal-for-host-start-and-stop.patch \ file://0016-Add-DBUS-interface-of-SMBIOS-MDR-V2.patch \ - file://0017-Add-shutdown-policy-interface-for-get-set-shutdown-p.patch \ file://0018-Define-post-code-interfaces-for-post-code-manager.patch \ file://0019-Creating-the-Session-interface-for-Host-and-LAN.patch \ - file://0020-Change-some-properties-name-in-SOL-Dbus.patch \ file://0021-Add-interface-suppot-for-provisioning-modes.patch \ " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service index 99494717f..e8baaa23e 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service @@ -1,5 +1,7 @@ [Unit] Description=Phosphor-Pid-Control Margin-based Fan Control Daemon +After=xyz.openbmc_project.EntityManager +After=xyz.openbmc_project.ObjectMapper [Service] Restart=always diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend index efaccb590..2706f8508 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend @@ -5,6 +5,6 @@ SYSTEMD_SERVICE_${PN} = "phosphor-pid-control.service" EXTRA_OECONF = "--enable-configure-dbus=yes" SRC_URI = "git://github.com/openbmc/phosphor-pid-control.git" -SRCREV = "5782ab81367e22e87d719c9fef6e85ecdc6cf95e" +SRCREV = "ded0ab5662212155e5d209343375e34ce9d34cdb" FILES_${PN} = "${bindir}/swampd ${bindir}/setsensor" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch new file mode 100644 index 000000000..2a4c7e9b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch @@ -0,0 +1,44 @@ +From b6b3051c8078267153712ed8cf514373924fd07a Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Mon, 16 Jul 2018 19:15:04 -0700 +Subject: [PATCH 2/6] Redfish firmware activation -- Modified flash.cpp to + call to customized flash service + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I81c3185e9c4c2ee907feeb53620faa22723c04d4 +--- + ubi/flash.cpp | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/ubi/flash.cpp b/ubi/flash.cpp +index ffa9348..5af2a17 100644 +--- a/ubi/flash.cpp ++++ b/ubi/flash.cpp +@@ -15,10 +15,13 @@ void Activation::flashWrite() + { + auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); +- method.append("obmc-flash-bmc-ubirw.service", "replace"); ++ std::string rwServiceFile = ++ "obmc-flash-bmc-ubirw@" + versionId + ".service"; ++ method.append(rwServiceFile, "replace"); + bus.call_noreply(method); + +- auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; ++ std::string roServiceFile = ++ "obmc-flash-bmc-ubiro@" + versionId + ".service"; + method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); + method.append(roServiceFile, "replace"); +@@ -37,7 +40,7 @@ void Activation::onStateChanges(sdbusplus::message::message& msg) + // Read the msg and populate each variable + msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); + +- auto rwServiceFile = "obmc-flash-bmc-ubirw.service"; ++ auto rwServiceFile = "obmc-flash-bmc-ubirw@" + versionId + ".service"; + auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + auto ubootVarsServiceFile = + "obmc-flash-bmc-updateubootvars@" + versionId + ".service"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch new file mode 100644 index 000000000..3fc3907ba --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch @@ -0,0 +1,41 @@ +From 1b00440d0c8fabfa2e3eda984a21c0f004ca2150 Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Fri, 26 Oct 2018 11:54:05 -0700 +Subject: [PATCH 4/6] Changed the condition of software version service + watching deamon + + Originally it watches only files that are "written" into /tmp/images directory. +This change modified the condition to also watch files that are "moved" into this directory. + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I3e9cf1ffc3f5350d4649d32d3d3837991322a65b +--- + watch.cpp | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/watch.cpp b/watch.cpp +index e46b8aa..eee1bc3 100644 +--- a/watch.cpp ++++ b/watch.cpp +@@ -45,7 +45,7 @@ Watch::Watch(sd_event* loop, std::function<int(std::string&)> imageCallback) : + std::strerror(error)); + } + +- wd = inotify_add_watch(fd, IMG_UPLOAD_DIR, IN_CLOSE_WRITE); ++ wd = inotify_add_watch(fd, IMG_UPLOAD_DIR, IN_CLOSE_WRITE | IN_MOVED_TO); + if (-1 == wd) + { + auto error = errno; +@@ -96,7 +96,8 @@ int Watch::callback(sd_event_source* s, int fd, uint32_t revents, + while (offset < bytes) + { + auto event = reinterpret_cast<inotify_event*>(&buffer[offset]); +- if ((event->mask & IN_CLOSE_WRITE) && !(event->mask & IN_ISDIR)) ++ if ((event->mask & (IN_CLOSE_WRITE | IN_MOVED_TO)) && ++ !(event->mask & IN_ISDIR)) + { + auto tarballPath = std::string{IMG_UPLOAD_DIR} + '/' + event->name; + auto rc = static_cast<Watch*>(userdata)->imageCallback(tarballPath); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch new file mode 100644 index 000000000..aa5d900e0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch @@ -0,0 +1,188 @@ +From 7f29c255dd2af7fa6d38b02ad63a8b8940fbce84 Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Mon, 10 Dec 2018 10:36:44 -0800 +Subject: [PATCH 5/6] Modified firmware activation to launch fwupd.sh through + non-ubi fs code path to match more closely to the upstream design - + Added option FWUPD_SCRIPT to saperate intel customized code - Adopted + ActivationProgress from ubi fs activation code mainly for progress indicator + for ipmi update + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: Id805deea75b21fab86f6bb6edbf50ddb3be42564 +--- + activation.cpp | 44 ++++++++++++++++++++++++++++++++++++++++++++ + configure.ac | 7 +++++++ + static/flash.cpp | 41 +++++++++++++++++++++++++++++++++++++++-- + ubi/flash.cpp | 9 +++------ + 4 files changed, 93 insertions(+), 8 deletions(-) + +diff --git a/activation.cpp b/activation.cpp +index f918221..f2923ae 100644 +--- a/activation.cpp ++++ b/activation.cpp +@@ -163,6 +163,50 @@ auto Activation::activation(Activations value) -> Activations + softwareServer::Activation::Activations::Active); + } + } ++#elif defined(FWUPD_SCRIPT) ++ if (!activationProgress) ++ { ++ // Enable systemd signals ++ Activation::subscribeToSystemdSignals(); ++ parent.freeSpace(*this); ++ ++ activationProgress = ++ std::make_unique<ActivationProgress>(bus, path); ++ ++#ifdef WANT_SIGNATURE_VERIFY ++ fs::path uploadDir(IMG_UPLOAD_DIR); ++ if (!verifySignature(uploadDir / versionId, SIGNED_IMAGE_CONF_PATH)) ++ { ++ onVerifyFailed(); ++ // Stop the activation process, if fieldMode is enabled. ++ if (parent.control::FieldMode::fieldModeEnabled()) ++ { ++ return softwareServer::Activation::activation( ++ softwareServer::Activation::Activations::Failed); ++ } ++ } ++#endif ++ flashWrite(); ++ activationProgress->progress(10); ++ } ++ else if (activationProgress->progress() == 100) ++ { ++ log<level::ERR>("[Jennifer] progress == 100..."); ++ if (!redundancyPriority) ++ { ++ redundancyPriority = ++ std::make_unique<RedundancyPriority>(bus, path, *this, 0); ++ } ++ ++ // Remove version object from image manager ++ Activation::deleteImageManagerObject(); ++ ++ // Create active association ++ parent.createActiveAssociation(path); ++ ++ return softwareServer::Activation::activation( ++ softwareServer::Activation::Activations::Active); ++ } + #else // !UBIFS_LAYOUT + + #ifdef WANT_SIGNATURE_VERIFY +diff --git a/configure.ac b/configure.ac +index 2da97ad..720e704 100755 +--- a/configure.ac ++++ b/configure.ac +@@ -184,6 +184,13 @@ AS_IF([test "x$enable_ubifs_layout" == "xyes"], \ + [AC_DEFINE([UBIFS_LAYOUT],[],[Enable ubifs support.])]) + AM_CONDITIONAL([UBIFS_LAYOUT], [test "x$enable_ubifs_layout" == "xyes"]) + ++# setup fwupd script support ++AC_ARG_ENABLE([fwupd_script], ++ AS_HELP_STRING([--enable-fwupd_script], [Enable fwupd script support.])) ++AS_IF([test "x$enable_fwupd_script" == "xyes"], \ ++ [AC_DEFINE([FWUPD_SCRIPT],[],[Enable fwupd script support.])]) ++AM_CONDITIONAL([FWUPD_SCRIPT], [test "x$enable_fwupd_script" == "xyes"]) ++ + # Check for header files. + AC_CHECK_HEADER(systemd/sd-bus.h, ,[AC_MSG_ERROR([Could not find systemd/sd-bus.h...systemd development package required])]) + AC_CHECK_HEADER(sdbusplus/server.hpp, ,[AC_MSG_ERROR([Could not find sdbusplus/server.hpp...openbmc/sdbusplus package required])]) +diff --git a/static/flash.cpp b/static/flash.cpp +index 82c2393..1bf29d5 100644 +--- a/static/flash.cpp ++++ b/static/flash.cpp +@@ -20,9 +20,11 @@ namespace updater + { + + namespace fs = std::experimental::filesystem; ++namespace softwareServer = sdbusplus::xyz::openbmc_project::Software::server; + + void Activation::flashWrite() + { ++#ifndef FWUPD_SCRIPT + // For static layout code update, just put images in /run/initramfs. + // It expects user to trigger a reboot and an updater script will program + // the image to flash during reboot. +@@ -33,11 +35,46 @@ void Activation::flashWrite() + fs::copy_file(uploadDir / versionId / bmcImage, toPath / bmcImage, + fs::copy_options::overwrite_existing); + } ++ ++#else ++ auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, ++ SYSTEMD_INTERFACE, "StartUnit"); ++ method.append("fwupd@" + versionId + ".service", "replace"); ++ bus.call_noreply(method); ++#endif + } + +-void Activation::onStateChanges(sdbusplus::message::message& /*msg*/) ++void Activation::onStateChanges(sdbusplus::message::message& msg) + { +- // Empty ++#ifndef FWUPD_SCRIPT ++ uint32_t newStateID{}; ++ sdbusplus::message::object_path newStateObjPath; ++ std::string newStateUnit{}; ++ std::string newStateResult{}; ++ ++ msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); ++ ++ auto rwServiceFile = "fwupdw@" + versionId + ".service"; ++ ++ if (newStateUnit == rwServiceFile && newStateResult == "done") ++ { ++ activationProgress->progress(100); ++ } ++ ++ if (newStateUnit == rwServiceFile) ++ { ++ if (newStateResult == "failed" || newStateResult == "dependency") ++ { ++ Activation::activation( ++ softwareServer::Activation::Activations::Failed); ++ } ++ else ++ { ++ Activation::activation( ++ softwareServer::Activation::Activations::Activating); ++ } ++ } ++#endif + } + + } // namespace updater +diff --git a/ubi/flash.cpp b/ubi/flash.cpp +index 5af2a17..ffa9348 100644 +--- a/ubi/flash.cpp ++++ b/ubi/flash.cpp +@@ -15,13 +15,10 @@ void Activation::flashWrite() + { + auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); +- std::string rwServiceFile = +- "obmc-flash-bmc-ubirw@" + versionId + ".service"; +- method.append(rwServiceFile, "replace"); ++ method.append("obmc-flash-bmc-ubirw.service", "replace"); + bus.call_noreply(method); + +- std::string roServiceFile = +- "obmc-flash-bmc-ubiro@" + versionId + ".service"; ++ auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); + method.append(roServiceFile, "replace"); +@@ -40,7 +37,7 @@ void Activation::onStateChanges(sdbusplus::message::message& msg) + // Read the msg and populate each variable + msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); + +- auto rwServiceFile = "obmc-flash-bmc-ubirw@" + versionId + ".service"; ++ auto rwServiceFile = "obmc-flash-bmc-ubirw.service"; + auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + auto ubootVarsServiceFile = + "obmc-flash-bmc-updateubootvars@" + versionId + ".service"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch new file mode 100644 index 000000000..2d2ac2673 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch @@ -0,0 +1,44 @@ +From 9b3c44e9fb3d907c0152f14b967e23ab964c0e0b Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Thu, 14 Feb 2019 14:54:45 -0800 +Subject: [PATCH 6/6] Modify the ID of software image updater object on DBus to + allow force update onto same version image + +In the original design of image update, it does not allow the same version of image to be flashed onto itself. +But this blocks validation tests and in most of the cases we don't prevent user from doing such update. + +This patch appends a random number after the version ID hash string to unblock such limitation. + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I16aba4804ae1bc2e8784320f91c0419fb8b23c35 +--- + image_manager.cpp | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/image_manager.cpp b/image_manager.cpp +index 5b2ff49..e3d26e3 100644 +--- a/image_manager.cpp ++++ b/image_manager.cpp +@@ -9,6 +9,7 @@ + #include <stdlib.h> + #include <sys/stat.h> + #include <sys/wait.h> ++#include <time.h> + #include <unistd.h> + + #include <algorithm> +@@ -129,6 +130,11 @@ int Manager::processImage(const std::string& tarFilePath) + // Compute id + auto id = Version::getId(version); + ++ // Append a random number after the original version hash ++ // This will allow forcing image update onto the same version ++ srand(time(NULL)); ++ id = id + "_" + std::to_string(rand()); ++ + fs::path imageDirPath = std::string{IMG_UPLOAD_DIR}; + imageDirPath /= id; + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend index 80c5ea9d3..719c2562a 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend @@ -3,9 +3,11 @@ EXTRA_OECONF += "--enable-fwupd_script" SYSTEMD_SERVICE_${PN}-updater += "fwupd@.service" -SRC_URI_remove = "git://github.com/openbmc/phosphor-bmc-code-mgmt" -SRC_URI += "git://git@github.com/Intel-BMC/phosphor-bmc-code-mgmt;protocol=ssh" -SRCREV = "f8f76c29dbe2806a6eacd15847563cdf7f7567f4" - #Currently enforcing image signature validation only for PFR images PACKAGECONFIG_append = "${@bb.utils.contains('IMAGE_TYPE', 'pfr', ' verify_signature', '', d)}" + +SRC_URI += "file://0002-Redfish-firmware-activation.patch \ + file://0004-Changed-the-condition-of-software-version-service-wa.patch \ + file://0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch \ + file://0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb index 7347fe483..588ae46b6 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb @@ -8,9 +8,9 @@ S = "${WORKDIR}/git/gpiodaemon" LICENSE = "Apache-2.0" LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" -SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" inherit cmake systemd SYSTEMD_SERVICE_${PN} = "gpiodaemon.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend index 3ff46cdc9..62e332e2e 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend @@ -1,5 +1,5 @@ SRC_URI = "git://github.com/openbmc/bmcweb.git" -SRCREV = "0e7de46f9b6365bad4e79a3933112750c5bf7853" +SRCREV = "22c33710fed78a5c47446ee91ececf8b8ab104db" FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json index 13b945fd0..a7815a9a9 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json @@ -55,12 +55,12 @@ } }, "5" : { - "name" : "ICMB", + "name" : "RESERVED", "is_valid" : false, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "reserved", + "protocol_type" : "na", "session_supported" : "session-less", "is_ipmi" : true } @@ -77,12 +77,12 @@ } }, "7" : { - "name" : "SMM", + "name" : "ipmi-kcs4", "is_valid" : true, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "system-interface", + "protocol_type" : "kcs", "session_supported" : "session-less", "is_ipmi" : true } @@ -92,8 +92,8 @@ "is_valid" : true, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "oem", + "protocol_type" : "oem", "session_supported" : "session-less", "is_ipmi" : true } @@ -125,8 +125,8 @@ "is_valid" : false, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "reserved", + "protocol_type" : "na", "session_supported" : "session-less", "is_ipmi" : true } @@ -147,8 +147,8 @@ "is_valid" : false, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "reserved", + "protocol_type" : "na", "session_supported" : "session-less", "is_ipmi" : true } @@ -158,19 +158,19 @@ "is_valid" : false, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "unknown", + "protocol_type" : "na", "session_supported" : "session-less", "is_ipmi" : true } }, "15" : { - "name" : "SMS", + "name" : "ipmi-kcs3", "is_valid" : true, "active_sessions" : 0, "channel_info" : { - "medium_type" : "ipmb", - "protocol_type" : "ipmb-1.0", + "medium_type" : "system-interface", + "protocol_type" : "kcs", "session_supported" : "session-less", "is_ipmi" : true } diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json index 9fdb3c916..6fc46f452 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json @@ -1,49 +1,76 @@ { "filters": [ { + "Description": "Allow full read - ignore first byte write value", "busId": "0x01", "slaveAddr": "0x4d", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x01", "slaveAddr": "0x57", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x02", "slaveAddr": "0x40", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x02", "slaveAddr": "0x49", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x02", "slaveAddr": "0x51", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x03", "slaveAddr": "0x44", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x03", "slaveAddr": "0x68", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x06", "slaveAddr": "0x40", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" }, { + "Description": "Allow full read - ignore first byte write value", "busId": "0x07", "slaveAddr": "0x51", - "command": "0x00" + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" } ] } diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0003-Modify-dbus-interface-for-chassis-control.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0003-Modify-dbus-interface-for-chassis-control.patch deleted file mode 100644 index 9061481ac..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0003-Modify-dbus-interface-for-chassis-control.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 48ac37551cd51415deafe8b1dcb23ebeef1e8ade Mon Sep 17 00:00:00 2001 -From: Yong Li <yong.b.li@linux.intel.com> -Date: Mon, 17 Sep 2018 13:04:42 +0800 -Subject: [PATCH] Modify-dbus-interface-for-chassis-control - -Switch chassis control service namespace from "org" to "xyz", -to compatible with new intel-chassis services - -Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> -Signed-off-by: Yong Li <yong.b.li@linux.intel.com> ---- - apphandler.cpp | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/apphandler.cpp b/apphandler.cpp -index b089331..f2889c5 100644 ---- a/apphandler.cpp -+++ b/apphandler.cpp -@@ -393,9 +393,9 @@ ipmi_ret_t ipmi_app_get_device_guid(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - ipmi_data_len_t data_len, - ipmi_context_t context) - { -- const char* objname = "/org/openbmc/control/chassis0"; -+ const char* objname = "/xyz/openbmc_project/Chassis/Control/Chassis"; - const char* iface = "org.freedesktop.DBus.Properties"; -- const char* chassis_iface = "org.openbmc.control.Chassis"; -+ const char* chassis_iface = "xyz.openbmc_project.Chassis.Control.Chassis"; - sd_bus_message* reply = NULL; - sd_bus_error error = SD_BUS_ERROR_NULL; - int r = 0; --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0012-ipmi-set-get-boot-options.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0012-ipmi-set-get-boot-options.patch index 243015c95..fb5dcee09 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0012-ipmi-set-get-boot-options.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0012-ipmi-set-get-boot-options.patch @@ -21,9 +21,8 @@ index 666addb..77af2dc 100644 std::map<IpmiValue, Source::Sources> sourceIpmiToDbus = { {0x01, Source::Sources::Network}, {0x02, Source::Sources::Disk}, -- {0x05, Source::Sources::ExternalMedia}, -+ {0x05, Source::Sources::DVD}, -+ {0x0f, Source::Sources::Removable}, + {0x05, Source::Sources::ExternalMedia}, ++ {0x0f, Source::Sources::RemovableMedia}, {ipmiDefault, Source::Sources::Default}}; std::map<IpmiValue, Mode::Modes> modeIpmiToDbus = { @@ -31,9 +30,8 @@ index 666addb..77af2dc 100644 std::map<Source::Sources, IpmiValue> sourceDbusToIpmi = { {Source::Sources::Network, 0x01}, {Source::Sources::Disk, 0x02}, -- {Source::Sources::ExternalMedia, 0x05}, -+ {Source::Sources::DVD, 0x05}, -+ {Source::Sources::Removable, 0x0f}, + {Source::Sources::ExternalMedia, 0x05}, ++ {Source::Sources::RemovableMedia, 0x0f}, {Source::Sources::Default, ipmiDefault}}; std::map<Mode::Modes, IpmiValue> modeDbusToIpmi = { diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0014-Enable-get-device-guid-ipmi-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0014-Enable-get-device-guid-ipmi-command.patch deleted file mode 100644 index 46dd99466..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0014-Enable-get-device-guid-ipmi-command.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 482a6cc52d0ec514d6da5f4bcb04b4991f3cc36e Mon Sep 17 00:00:00 2001 -From: Yong Li <yong.b.li@linux.intel.com> -Date: Mon, 17 Sep 2018 13:41:25 +0800 -Subject: [PATCH] Enable get device guid ipmi command - -The UUID interface is changed, modify the API to get the correct UUID -for device guid - -Change-Id: I0c0c7bd350992ac03f928707986a7180407d8f3f -Signed-off-by: Yong Li <yong.b.li@linux.intel.com> ---- - apphandler.cpp | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - -diff --git a/apphandler.cpp b/apphandler.cpp -index 937be71..89d797a 100644 ---- a/apphandler.cpp -+++ b/apphandler.cpp -@@ -392,9 +392,10 @@ ipmi_ret_t ipmi_app_get_device_guid(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - ipmi_data_len_t data_len, - ipmi_context_t context) - { -- const char* objname = "/xyz/openbmc_project/Chassis/Control/Chassis"; -+ const char* objname = -+ "/xyz/openbmc_project/inventory/system/chassis/motherboard/bmc"; - const char* iface = "org.freedesktop.DBus.Properties"; -- const char* chassis_iface = "xyz.openbmc_project.Chassis.Control.Chassis"; -+ const char* uuid_iface = "xyz.openbmc_project.Common.UUID"; - sd_bus_message* reply = NULL; - sd_bus_error error = SD_BUS_ERROR_NULL; - int r = 0; -@@ -426,8 +427,9 @@ ipmi_ret_t ipmi_app_get_device_guid(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - entry("ERRNO=0x%X", -r)); - goto finish; - } -+ - r = sd_bus_call_method(bus, busname, objname, iface, "Get", &error, &reply, -- "ss", chassis_iface, "uuid"); -+ "ss", uuid_iface, "UUID"); - if (r < 0) - { - log<level::ERR>("Failed to call Get Method", entry("ERRNO=0x%X", -r)); --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch index af526c177..cba0cde32 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch @@ -1,4 +1,4 @@ -From c14e31ebc35e0bb7b843d84683f9f2698c9c08d7 Mon Sep 17 00:00:00 2001 +From 6d5a372e0cf98de4d97a88d2cd42a00b7a8f034f Mon Sep 17 00:00:00 2001 From: Yong Li <yong.b.li@linux.intel.com> Date: Sun, 16 Sep 2018 21:32:38 +0800 Subject: [PATCH] Implement IPMI Commmand - Get Host Restart Cause. @@ -25,16 +25,16 @@ Change-Id: Id3b32e271b85b5fc4c69d5ca40227f8f9c08ce48 Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> Signed-off-by: Yong Li <yong.b.li@linux.intel.com> --- - chassishandler.cpp | 54 +++++++++++++++++++++++++++++++++++++++++++++++ - chassishandler.hpp | 1 + + chassishandler.cpp | 54 +++++++++++++++++++++++++++++++++++++++ + chassishandler.hpp | 1 + host-ipmid-whitelist.conf | 1 + 3 files changed, 56 insertions(+) diff --git a/chassishandler.cpp b/chassishandler.cpp -index 77af2dc..2a29755 100644 +index d20b220..8a8cb26 100644 --- a/chassishandler.cpp +++ b/chassishandler.cpp -@@ -107,6 +107,11 @@ static constexpr auto chassisPOHStateIntf = +@@ -90,6 +90,11 @@ static constexpr auto chassisPOHStateIntf = "xyz.openbmc_project.State.PowerOnHours"; static constexpr auto pOHCounterProperty = "POHCounter"; static constexpr auto match = "chassis0"; @@ -46,7 +46,7 @@ index 77af2dc..2a29755 100644 const static constexpr char chassisCapIntf[] = "xyz.openbmc_project.Control.ChassisCapabilities"; const static constexpr char chassisCapFlagsProp[] = "CapabilitiesFlags"; -@@ -324,6 +329,13 @@ struct set_sys_boot_options_t +@@ -176,6 +181,13 @@ struct set_sys_boot_options_t uint8_t data[SIZE_BOOT_OPTION]; } __attribute__((packed)); @@ -60,7 +60,7 @@ index 77af2dc..2a29755 100644 int getHostNetworkData(get_sys_boot_options_response_t* respptr) { ipmi::PropertyMap properties; -@@ -1598,6 +1610,44 @@ ipmi_ret_t ipmi_chassis_set_sys_boot_options(ipmi_netfn_t netfn, ipmi_cmd_t cmd, +@@ -1584,6 +1596,44 @@ ipmi_ret_t ipmi_chassis_set_sys_boot_options(ipmi_netfn_t netfn, ipmi_cmd_t cmd, return rc; } @@ -102,20 +102,20 @@ index 77af2dc..2a29755 100644 + return rc; +} + - ipmi_ret_t ipmiGetPOHCounter(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - ipmi_request_t request, ipmi_response_t response, - ipmi_data_len_t data_len, ipmi_context_t context) + /** @brief implements Get POH counter command + * @parameter + * - none @@ -1739,4 +1789,8 @@ void register_netfn_chassis_functions() - ipmi_register_callback(NETFUN_CHASSIS, IPMI_CMD_SET_RESTORE_POLICY, NULL, - ipmi_chassis_set_power_restore_policy, - PRIVILEGE_OPERATOR); + ipmi::chassis::cmdSetPowerRestorePolicy, + ipmi::Privilege::Operator, + ipmiChassisSetPowerRestorePolicy); + + // <get Host Restart Cause> + ipmi_register_callback(NETFUN_CHASSIS, IPMI_CMD_GET_SYS_RESTART_CAUSE, NULL, + ipmi_chassis_get_sys_restart_cause, PRIVILEGE_USER); } diff --git a/chassishandler.hpp b/chassishandler.hpp -index 0c6d5a2..e37c4f1 100644 +index 49b5ef8..2c42b11 100644 --- a/chassishandler.hpp +++ b/chassishandler.hpp @@ -17,6 +17,7 @@ enum ipmi_netfn_chassis_cmds @@ -127,10 +127,10 @@ index 0c6d5a2..e37c4f1 100644 IPMI_CMD_GET_SYS_BOOT_OPTIONS = 0x09, IPMI_CMD_GET_POH_COUNTER = 0x0F, diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf -index db54a49..827e2dc 100644 +index c1fca1d..94232de 100644 --- a/host-ipmid-whitelist.conf +++ b/host-ipmid-whitelist.conf -@@ -3,6 +3,7 @@ +@@ -4,6 +4,7 @@ 0x00:0x02 //<Chassis>:<Chassis Control> 0x00:0x05 //<Chassis>:<Set Chassis Capabilities> 0x00:0x06 //<Chassis>:<Set Power Restore Policy> @@ -139,5 +139,5 @@ index db54a49..827e2dc 100644 0x00:0x09 //<Chassis>:<Get System Boot Options> 0x00:0x0F //<Chassis>:<Get POH Counter Command> -- -2.7.4 +2.17.1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch deleted file mode 100644 index 542c4f667..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch +++ /dev/null @@ -1,351 +0,0 @@ -From a8d7429b7bd9dea33d59c6e83f17372e77fe6145 Mon Sep 17 00:00:00 2001 -From: Yong Li <yong.b.li@linux.intel.com> -Date: Fri, 21 Sep 2018 09:21:14 +0800 -Subject: [PATCH] Implement IPMI Master Write-Read command - -This command can be used for low-level I2C/SMBus write, read, or write-read -accesses to the IPMB or private busses behind a management controller. - -The command can also be used for providing low-level access to devices -that provide an SMBus slave interface. - -Signed-off-by: Yong Li <yong.b.li@linux.intel.com> ---- - apphandler.cpp | 276 +++++++++++++++++++++++++++++++++++++- - apphandler.hpp | 1 + - host-ipmid-whitelist.conf | 1 + - 3 files changed, 274 insertions(+), 4 deletions(-) - -diff --git a/apphandler.cpp b/apphandler.cpp -index 15965ca..d8fb23d 100644 ---- a/apphandler.cpp -+++ b/apphandler.cpp -@@ -1,6 +1,19 @@ -+#include "apphandler.hpp" -+ -+#include "app/watchdog.hpp" -+#include "sys_info_param.hpp" -+#include "transporthandler.hpp" -+ - #include <arpa/inet.h> -+#include <fcntl.h> -+#include <ipmid/api.h> - #include <limits.h> -+#include <linux/i2c-dev.h> -+#include <linux/i2c.h> - #include <mapper.h> -+#include <sys/ioctl.h> -+#include <sys/stat.h> -+#include <sys/types.h> - #include <systemd/sd-bus.h> - #include <unistd.h> - -@@ -41,6 +54,8 @@ constexpr auto bmc_guid_interface = "xyz.openbmc_project.Common.UUID"; - constexpr auto bmc_guid_property = "UUID"; - constexpr auto bmc_guid_len = 16; - -+static constexpr uint8_t maxIPMIWriteReadSize = 144; -+ - static constexpr auto redundancyIntf = - "xyz.openbmc_project.Software.RedundancyPriority"; - static constexpr auto versionIntf = "xyz.openbmc_project.Software.Version"; -@@ -59,6 +74,47 @@ using BMC = sdbusplus::xyz::openbmc_project::State::server::BMC; - namespace fs = std::filesystem; - namespace variant_ns = sdbusplus::message::variant_ns; - -+// Offset in get device id command. -+typedef struct -+{ -+ uint8_t id; -+ uint8_t revision; -+ uint8_t fw[2]; -+ uint8_t ipmi_ver; -+ uint8_t addn_dev_support; -+ uint8_t manuf_id[3]; -+ uint8_t prod_id[2]; -+ uint8_t aux[4]; -+} __attribute__((packed)) ipmi_device_id_t; -+ -+typedef struct -+{ -+ uint8_t busId; -+ uint8_t slaveAddr; -+ uint8_t readCount; -+} __attribute__((packed)) ipmiI2cRwReq; -+ -+typedef struct -+{ -+ uint8_t busId; -+ uint8_t slaveAddr; -+ std::vector<uint8_t> data; -+} ipmiMasterRwWhitelist; -+ -+static std::vector<ipmiMasterRwWhitelist>& getWhiteList() -+{ -+ static std::vector<ipmiMasterRwWhitelist> rwWhiteList; -+ return rwWhiteList; -+} -+ -+static constexpr const char* whiteListFilename = -+ "/usr/share/ipmi-providers/master_write_read_white_list.json"; -+ -+static constexpr const char* filtersStr = "filters"; -+static constexpr const char* busIdStr = "busId"; -+static constexpr const char* slaveAddrStr = "slaveAddr"; -+static constexpr const char* cmdStr = "command"; -+ - /** - * @brief Returns the Version info from primary s/w object - * -@@ -1022,6 +1078,192 @@ writeResponse: - return IPMI_CC_OK; - } - -+static int loadI2CWhiteList() -+{ -+ nlohmann::json data = nullptr; -+ std::ifstream jsonFile(whiteListFilename); -+ -+ if (!jsonFile.good()) -+ { -+ log<level::WARNING>("whitelist file not found!"); -+ return -1; -+ } -+ -+ try -+ { -+ data = nlohmann::json::parse(jsonFile, nullptr, false); -+ } -+ catch (nlohmann::json::parse_error& e) -+ { -+ log<level::ERR>("Corrupted whitelist config file", -+ entry("MSG: %s", e.what())); -+ return -1; -+ } -+ -+ try -+ { -+ unsigned int i = 0; -+ nlohmann::json filters = data[filtersStr].get<nlohmann::json>(); -+ getWhiteList().resize(filters.size()); -+ -+ for (const auto& it : filters.items()) -+ { -+ nlohmann::json filter = it.value(); -+ if (filter.is_null()) -+ { -+ log<level::ERR>("Incorrect filter"); -+ return -1; -+ } -+ -+ getWhiteList()[i].busId = -+ std::stoul(filter[busIdStr].get<std::string>(), nullptr, 16); -+ -+ getWhiteList()[i].slaveAddr = std::stoul( -+ filter[slaveAddrStr].get<std::string>(), nullptr, 16); -+ -+ std::string command = filter[cmdStr].get<std::string>(); -+ -+ log<level::DEBUG>("IPMI I2C whitelist ", entry("INDEX=%d", i), -+ entry("BUS=%d", getWhiteList()[i].busId), -+ entry("ADDR=0x%x", getWhiteList()[i].slaveAddr), -+ entry("LEN=0x%x", command.length()), -+ entry("COMMAND=[%s]", command.c_str())); -+ -+ // convert data string -+ std::istringstream iss(command); -+ std::string token; -+ while (std::getline(iss, token, ' ')) -+ { -+ log<level::DEBUG>("IPMI I2C command\n", -+ entry("TOKEN=%s", token.c_str())); -+ getWhiteList()[i].data.emplace_back( -+ std::stoul(token, nullptr, 16)); -+ } -+ i++; -+ } -+ } -+ catch (std::exception& e) -+ { -+ log<level::ERR>("unexpected exception", entry("ERROR=%s", e.what())); -+ return -1; -+ } -+ return 0; -+} -+ -+ipmi_ret_t ipmiMasterWriteRead(ipmi_netfn_t netfn, ipmi_cmd_t cmd, -+ ipmi_request_t request, ipmi_response_t response, -+ ipmi_data_len_t data_len, ipmi_context_t context) -+{ -+ bool foundInList = false; -+ int ret = 0; -+ i2c_rdwr_ioctl_data msgRdwr = {0}; -+ i2c_msg i2cmsg[2] = {0}; -+ ipmiI2cRwReq* reqi2c = reinterpret_cast<ipmiI2cRwReq*>(request); -+ -+ if (*data_len <= sizeof(ipmiI2cRwReq)) -+ { -+ log<level::ERR>("Failed in request", entry("LEN=%d", *data_len)); -+ *data_len = 0; -+ return IPMI_CC_REQ_DATA_LEN_INVALID; -+ } -+ -+ if (reqi2c->readCount > maxIPMIWriteReadSize) -+ { -+ log<level::ERR>("Failed in request", entry("R=%d", reqi2c->readCount)); -+ *data_len = 0; -+ return IPMI_CC_PARM_OUT_OF_RANGE; -+ } -+ -+ uint8_t* resptr = reinterpret_cast<uint8_t*>(response); -+ uint8_t busId = (reqi2c->busId & 0xFF) >> 1; -+ // Convert the I2C address from 7-bit format -+ uint8_t i2cAddr = reqi2c->slaveAddr >> 1; -+ size_t writeCount = *data_len - sizeof(ipmiI2cRwReq); -+ -+ log<level::DEBUG>( -+ "INPUT: ", entry("LEN=%d", *data_len), entry("ID=0x%x", busId), -+ entry("ADDR=0x%x", reqi2c->slaveAddr), entry("R=%d", reqi2c->readCount), -+ entry("W=%d", writeCount)); -+ -+ *data_len = 0; -+ -+ std::vector<uint8_t> inBuf(reqi2c->readCount); -+ std::vector<uint8_t> outBuf(writeCount); -+ uint8_t* reqptr = reinterpret_cast<uint8_t*>(request); -+ -+ reqptr += sizeof(ipmiI2cRwReq); -+ std::copy(reqptr, reqptr + writeCount, outBuf.begin()); -+ -+ log<level::DEBUG>("checking list ", -+ entry("SIZE=%d", getWhiteList().size())); -+ // command whitelist checking -+ for (unsigned int i = 0; i < getWhiteList().size(); i++) -+ { -+ // TODO add wildchard/regex support -+ if ((busId == getWhiteList()[i].busId) && -+ (i2cAddr == getWhiteList()[i].slaveAddr) && -+ (outBuf == getWhiteList()[i].data)) -+ { -+ log<level::DEBUG>("In whitelist"); -+ foundInList = true; -+ break; -+ } -+ } -+ -+ if (!foundInList) -+ { -+ log<level::ERR>("Request blocked!", entry("BUS=%d", busId), -+ entry("ADDR=0x%x", reqi2c->slaveAddr)); -+ return IPMI_CC_INVALID_FIELD_REQUEST; -+ } -+ -+ log<level::DEBUG>("IPMI Master WriteRead ", entry("BUS=%d", busId), -+ entry("ADDR=0x%x", reqi2c->slaveAddr), -+ entry("R=%d", reqi2c->readCount), -+ entry("W=%d", writeCount)); -+ -+ std::string i2cBus = "/dev/i2c-" + std::to_string(busId); -+ -+ int i2cDev = ::open(i2cBus.c_str(), O_RDWR | O_CLOEXEC); -+ if (i2cDev < 0) -+ { -+ log<level::ERR>("Failed in opening i2c device", -+ entry("BUS=%s", i2cBus.c_str())); -+ return IPMI_CC_UNSPECIFIED_ERROR; -+ } -+ -+ // write message -+ i2cmsg[0].addr = i2cAddr; -+ i2cmsg[0].flags = 0x00; -+ i2cmsg[0].len = writeCount; -+ i2cmsg[0].buf = outBuf.data(); -+ -+ // read message -+ i2cmsg[1].addr = i2cAddr; -+ i2cmsg[1].flags = I2C_M_RD; -+ i2cmsg[1].len = reqi2c->readCount; -+ i2cmsg[1].buf = inBuf.data(); -+ -+ msgRdwr.msgs = i2cmsg; -+ msgRdwr.nmsgs = 2; -+ -+ ret = ::ioctl(i2cDev, I2C_RDWR, &msgRdwr); -+ ::close(i2cDev); -+ -+ // TODO add completion code support -+ if (ret < 0) -+ { -+ log<level::ERR>("RDWR ioctl error", entry("RET=%d", ret)); -+ return IPMI_CC_UNSPECIFIED_ERROR; -+ } -+ -+ *data_len = msgRdwr.msgs[1].len; -+ std::copy(msgRdwr.msgs[1].buf, msgRdwr.msgs[1].buf + msgRdwr.msgs[1].len, -+ resptr); -+ -+ return IPMI_CC_OK; -+} -+ - void register_netfn_app_functions() - { - // <Get Device ID> -@@ -1063,6 +1306,31 @@ void register_netfn_app_functions() - ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_ACPI, NULL, - ipmi_app_get_acpi_power_state, PRIVILEGE_ADMIN); - -+// TODO: Below code and associated api's need to be removed later. -+// Its commented for now to avoid merge conflicts with upstream -+// changes and smooth upstream upgrades. -+#if 0 -+>>>>>>> IPMI Channel commands implementation -+ // <Get Channel Access> -+ ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_CHANNEL_ACCESS, NULL, -+ ipmi_get_channel_access, PRIVILEGE_USER); -+ -+ // <Get Channel Info Command> -+ ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_CHAN_INFO, NULL, -+ ipmi_app_channel_info, PRIVILEGE_USER); -+#endif -+ -+ int ret = loadI2CWhiteList(); -+ log<level::DEBUG>("i2c white list is loaded", entry("RET=%d", ret), -+ entry("SIZE=%d", getWhiteList().size())); -+ if (ret == 0) -+ { -+ log<level::DEBUG>("Register Master RW command"); -+ // <Master Write Read Command> -+ ipmi_register_callback(NETFUN_APP, IPMI_CMD_MASTER_WRITE_READ, NULL, -+ ipmiMasterWriteRead, PRIVILEGE_OPERATOR); -+ } -+ - // <Get System GUID Command> - ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_SYS_GUID, NULL, - ipmi_app_get_sys_guid, PRIVILEGE_USER); -diff --git a/apphandler.hpp b/apphandler.hpp -index d4dd8e8..f9e5c59 100644 ---- a/apphandler.hpp -+++ b/apphandler.hpp -@@ -19,6 +19,7 @@ enum ipmi_netfn_app_cmds - IPMI_CMD_SET_CHAN_ACCESS = 0x40, - IPMI_CMD_GET_CHANNEL_ACCESS = 0x41, - IPMI_CMD_GET_CHAN_INFO = 0x42, -+ IPMI_CMD_MASTER_WRITE_READ = 0x52, - IPMI_CMD_GET_CHAN_CIPHER_SUITES = 0x54, - IPMI_CMD_SET_SYSTEM_INFO = 0x58, - IPMI_CMD_GET_SYSTEM_INFO = 0x59, -diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf -index 49ff7b0..1ae79fd 100644 ---- a/host-ipmid-whitelist.conf -+++ b/host-ipmid-whitelist.conf -@@ -27,6 +27,7 @@ - 0x06:0x37 //<App>:<Get System GUID> - 0x06:0x42 //<App>:<Get Channel Info Command> - 0x06:0x4E //<App>:<Get Channel Payload Support> -+0x06:0x52 //<App>:<Master Write Read Command> - 0x06:0x54 //<App>:<Get Channel Cipher Suites> - 0x0A:0x10 //<Storage>:<Get FRU Inventory Area Info> - 0x0A:0x11 //<Storage>:<Read FRU Data> --- -2.17.1 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0055-Implement-set-front-panel-button-enables-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0055-Implement-set-front-panel-button-enables-command.patch index 170e530f9..fd7cf1851 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0055-Implement-set-front-panel-button-enables-command.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0055-Implement-set-front-panel-button-enables-command.patch @@ -29,12 +29,12 @@ index 4b42b3c..1a5b805 100644 static constexpr uint8_t chassisCapAddrMask = 0xfe; +static constexpr uint8_t disableResetButton = 0x2; +static constexpr uint8_t disablePowerButton = 0x1; - - typedef struct - { + static constexpr const char* powerButtonIntf = + "xyz.openbmc_project.Chassis.Buttons.Power"; + static constexpr const char* powerButtonPath = @@ -140,6 +142,19 @@ struct GetPOHCountResponse - uint8_t counterReading[4]; ///< Counter reading - } __attribute__((packed)); + uint8_t front_panel_button_cap_status; + } __attribute__((packed)) ipmi_get_chassis_status_t; +typedef struct +{ @@ -52,17 +52,8 @@ index 4b42b3c..1a5b805 100644 // Phosphor Host State manager namespace State = sdbusplus::xyz::openbmc_project::State::server; -@@ -948,6 +963,8 @@ ipmi_ret_t ipmi_get_chassis_status(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - - // Front Panel Button Capabilities and disable/enable status(Optional) - // set to 0, for we don't support them. -+ // TODO, it is tracked by an issue: -+ // https://github.com/openbmc/phosphor-host-ipmid/issues/122 - chassis_status.front_panel_button_cap_status = 0; - - // Pack the actual response @@ -1721,6 +1738,82 @@ ipmi_ret_t ipmi_chassis_set_power_restore_policy( - return IPMI_CC_OK; + return ipmi::responseSuccess(power_policy::allSupport); } +ipmi_ret_t ipmiSetFrontPanelButtonEnables(ipmi_netfn_t netfn, ipmi_cmd_t cmd, @@ -161,7 +152,7 @@ index 49b5ef8..f4a6bff 100644 --- a/chassishandler.hpp +++ b/chassishandler.hpp @@ -19,6 +19,7 @@ enum ipmi_netfn_chassis_cmds - // Get capability bits + IPMI_CMD_GET_SYS_RESTART_CAUSE = 0x07, IPMI_CMD_SET_SYS_BOOT_OPTIONS = 0x08, IPMI_CMD_GET_SYS_BOOT_OPTIONS = 0x09, + IPMI_CMD_SET_FRONT_PANEL_BUTTON_ENABLES = 0x0A, @@ -173,13 +164,13 @@ index e5cd0b5..d96d9ed 100644 --- a/host-ipmid-whitelist.conf +++ b/host-ipmid-whitelist.conf @@ -6,6 +6,7 @@ - 0x00:0x06 //<Chassis>:<Set Power Restore Policy> + 0x00:0x07 //<Chassis>:<Get System Restart Cause> 0x00:0x08 //<Chassis>:<Set System Boot Options> 0x00:0x09 //<Chassis>:<Get System Boot Options> +0x00:0x0A //<Chassis>:<Set Front Panel Button Enables> 0x00:0x0F //<Chassis>:<Get POH Counter Command> + 0x04:0x02 //<Sensor/Event>:<Platform event> 0x04:0x2D //<Sensor/Event>:<Get Sensor Reading> - 0x04:0x2F //<Sensor/Event>:<Get Sensor Type> -- 2.19.1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0057-Add-timer-use-actions-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0057-Add-timer-use-actions-support.patch index 5813cceae..a96707d44 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0057-Add-timer-use-actions-support.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0057-Add-timer-use-actions-support.patch @@ -144,14 +144,14 @@ index e65ea63..8b1aa47 100644 +++ b/app/watchdog_service.cpp @@ -83,6 +83,9 @@ WatchdogService::Properties WatchdogService::getProperties() wd_prop.timerUse = Watchdog::convertTimerUseFromString( - get<std::string>(properties.at("CurrentTimerUse"))); + std::get<std::string>(properties.at("CurrentTimerUse"))); + wd_prop.expiredTimerUse = Watchdog::convertTimerUseFromString( -+ get<std::string>(properties.at("ExpiredTimerUse"))); ++ std::get<std::string>(properties.at("ExpiredTimerUse"))); + - wd_prop.interval = get<uint64_t>(properties.at("Interval")); - wd_prop.timeRemaining = get<uint64_t>(properties.at("TimeRemaining")); - return wd_prop; + wd_prop.interval = std::get<uint64_t>(properties.at("Interval")); + wd_prop.timeRemaining = + std::get<uint64_t>(properties.at("TimeRemaining")); @@ -187,6 +190,11 @@ void WatchdogService::setTimerUse(TimerUse timerUse) setProperty("CurrentTimerUse", convertForMessage(timerUse)); } diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch index 49a2c01ba..24f355d80 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch @@ -1,43 +1,93 @@ -From 973865687325c6563fd6b729a3a220661066f635 Mon Sep 17 00:00:00 2001 +From 3c95de833eba73b3585941ade42ad1775e723280 Mon Sep 17 00:00:00 2001 From: Cheng C Yang <cheng.c.yang@intel.com> -Date: Wed, 3 Apr 2019 15:55:04 +0800 +Date: Tue, 7 May 2019 08:03:56 +0800 Subject: [PATCH] Move Get SOL config parameter to host-ipmid Move Get SOL config parameter command from net-ipmid to host-ipmid. -Tested By: +Tested: Run command ipmitool sol info Set in progress : set-complete Enabled : true Force Encryption : false Force Authentication : false -Privilege Level : USER -Character Accumulate Level (ms) : 100 -Character Send Threshold : 1 -Retry Count : 3 -Retry Interval (ms) : 100 +Privilege Level : ADMINISTRATOR +Character Accumulate Level (ms) : 60 +Character Send Threshold : 96 +Retry Count : 6 +Retry Interval (ms) : 200 Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting -Non-Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Non-Volatile Bit Rate (kbps) : 115.2 Payload Channel : 14 (0x0e) Payload Port : 623 Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> --- - transporthandler.cpp | 139 ++++++++++++++++++++++++++++++++++++++++++++++++--- - transporthandler.hpp | 26 +++++++++- - 2 files changed, 156 insertions(+), 9 deletions(-) + host-ipmid-whitelist.conf | 1 + + transporthandler.cpp | 198 ++++++++++++++++++++++++++++++++++++++++++++-- + transporthandler.hpp | 27 ++++++- + 3 files changed, 217 insertions(+), 9 deletions(-) +diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf +index 2ce44c6..383b412 100644 +--- a/host-ipmid-whitelist.conf ++++ b/host-ipmid-whitelist.conf +@@ -43,6 +43,7 @@ + 0x0A:0x49 //<Storage>:<Set SEL Time> + 0x0C:0x02 //<Transport>:<Get LAN Configuration Parameters> + 0x0C:0x21 //<Transport>:<Set SOL Configuration Parameters> ++0x0C:0x22 //<Transport>:<Get SOL Configuration Parameters> + 0x2C:0x00 //<Group Extension>:<Group Extension Command> + 0x2C:0x01 //<Group Extension>:<Get DCMI Capabilities> + 0x2C:0x02 //<Group Extension>:<Get Power Reading> diff --git a/transporthandler.cpp b/transporthandler.cpp -index 2111acf..b18f522 100644 +index 850172d..0c1223a 100644 --- a/transporthandler.cpp +++ b/transporthandler.cpp -@@ -1715,11 +1715,133 @@ void initializeSOLInProgress() +@@ -38,6 +38,8 @@ static const std::array<std::string, 3> ipAddressEnablesType = { + + constexpr const char* solInterface = "xyz.openbmc_project.Ipmi.SOL"; + constexpr const char* solPath = "/xyz/openbmc_project/ipmi/sol"; ++constexpr const char* consoleInterface = "xyz.openbmc_project.console"; ++constexpr const char* consolePath = "/xyz/openbmc_project/console"; + + std::map<int, std::unique_ptr<struct ChannelConfig_t>> channelConfig; + +@@ -1668,6 +1670,26 @@ static int setSOLParameter(std::string property, const ipmi::Value& value) + return 0; + } + ++static int getSOLBaudRate(ipmi::Value& value) ++{ ++ auto dbus = getSdBus(); ++ ++ try ++ { ++ value = ++ ipmi::getDbusProperty(*dbus, "xyz.openbmc_project.console", ++ consolePath, consoleInterface, "baudrate"); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error getting sol baud rate"); ++ return -1; ++ } ++ ++ return 0; ++} ++ + static int getSOLParameter(std::string property, ipmi::Value& value) + { + auto dbus = getSdBus(); +@@ -1711,11 +1733,170 @@ void initializeSOLInProgress() } } -ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, - ipmi_request_t request, ipmi_response_t response, - ipmi_data_len_t dataLen, ipmi_context_t context) ++static const constexpr uint8_t retryCountMask = 0x07; +// For getsetSOLConfParams, there are still three tings TODO: +// 1. session less channel number request has to return error. +// 2. convert 0xE channel number. @@ -45,8 +95,7 @@ index 2111acf..b18f522 100644 +ipmi_ret_t getSOLConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, + ipmi_request_t request, ipmi_response_t response, + ipmi_data_len_t dataLen, ipmi_context_t context) - { -- auto reqData = reinterpret_cast<const SetConfParamsRequest*>(request); ++{ + auto reqData = reinterpret_cast<const GetSOLConfParamsRequest*>(request); + std::vector<uint8_t> outPayload; + @@ -134,7 +183,7 @@ index 2111acf..b18f522 100644 + { + return IPMI_CC_UNSPECIFIED_ERROR; + } -+ outPayload.push_back(std::get<uint8_t>(value) & 0x03); ++ outPayload.push_back(std::get<uint8_t>(value) & retryCountMask); + + if (getSOLParameter("RetryIntervalMS", value) < 0) + { @@ -151,6 +200,42 @@ index 2111acf..b18f522 100644 + std::back_inserter(outPayload)); + break; + } ++ case sol::Parameter::nvbitrate: ++ { ++ if (getSOLBaudRate(value) < 0) ++ { ++ return IPMI_CC_UNSPECIFIED_ERROR; ++ } ++ uint8_t bitRate = 0; ++ uint32_t* pBaudRate = std::get_if<uint32_t>(&value); ++ if (!pBaudRate) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Failed to get valid baud rate from D-Bus interface"); ++ } ++ switch (*pBaudRate) ++ { ++ case 9600: ++ bitRate = 0x06; ++ break; ++ case 19200: ++ bitRate = 0x07; ++ break; ++ case 38400: ++ bitRate = 0x08; ++ break; ++ case 57600: ++ bitRate = 0x09; ++ break; ++ case 115200: ++ bitRate = 0x0a; ++ break; ++ default: ++ break; ++ } ++ outPayload.push_back(bitRate); ++ break; ++ } + default: + return IPMI_CC_PARM_NOT_SUPPORTED; + } @@ -164,12 +249,13 @@ index 2111acf..b18f522 100644 +ipmi_ret_t setSOLConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, + ipmi_request_t request, ipmi_response_t response, + ipmi_data_len_t dataLen, ipmi_context_t context) -+{ + { +- auto reqData = reinterpret_cast<const SetConfParamsRequest*>(request); + auto reqData = reinterpret_cast<const SetSOLConfParamsRequest*>(request); // Check request length first switch (static_cast<sol::Parameter>(reqData->paramSelector)) -@@ -1728,7 +1850,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, +@@ -1724,7 +1905,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, case sol::Parameter::enable: case sol::Parameter::authentication: { @@ -178,7 +264,7 @@ index 2111acf..b18f522 100644 { *dataLen = 0; return IPMI_CC_REQ_DATA_LEN_INVALID; -@@ -1738,7 +1860,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, +@@ -1734,7 +1915,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd, case sol::Parameter::accumulate: case sol::Parameter::retry: { @@ -187,7 +273,7 @@ index 2111acf..b18f522 100644 { *dataLen = 0; return IPMI_CC_REQ_DATA_LEN_INVALID; -@@ -1869,7 +1991,10 @@ void register_netfn_transport_functions() +@@ -1865,7 +2046,10 @@ void register_netfn_transport_functions() ipmi_transport_get_lan, PRIVILEGE_OPERATOR); ipmi_register_callback(NETFUN_TRANSPORT, IPMI_CMD_SET_SOL_CONF_PARAMS, NULL, @@ -200,10 +286,18 @@ index 2111acf..b18f522 100644 // Initialize dbus property progress to 0 every time sol manager restart. initializeSOLInProgress(); diff --git a/transporthandler.hpp b/transporthandler.hpp -index 3b5e9e1..7132cff 100644 +index 3b5e9e1..a21862b 100644 --- a/transporthandler.hpp +++ b/transporthandler.hpp -@@ -257,7 +257,7 @@ struct Retry +@@ -1,6 +1,7 @@ + #pragma once + + #include <ipmid/types.hpp> ++#include <map> + #include <string> + // IPMI commands for Transport net functions. + enum ipmi_netfn_storage_cmds +@@ -257,7 +258,7 @@ struct Retry uint8_t interval; //!< SOL retry interval. } __attribute__((packed)); @@ -212,7 +306,7 @@ index 3b5e9e1..7132cff 100644 { #if BYTE_ORDER == LITTLE_ENDIAN uint8_t channelNumber : 4; //!< Channel number. -@@ -279,7 +279,29 @@ struct SetConfParamsRequest +@@ -279,7 +280,29 @@ struct SetConfParamsRequest }; } __attribute__((packed)); @@ -244,5 +338,5 @@ index 3b5e9e1..7132cff 100644 +static constexpr uint16_t ipmiStdPort = 623; +static constexpr uint8_t solParameterRevision = 0x11; -- -2.16.2 +2.7.4 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend index f454f7ce9..91319a9d3 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend @@ -3,27 +3,37 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" # TODO: This should be removed, once up-stream bump up # issue is resolved #SRC_URI = "git://github.com/openbmc/phosphor-host-ipmid" -SRCREV = "11df4f6906edc0dfb23089a6e297158549c19ebd" +SRCREV = "fdb8389df74f9f0d6428252a75c33f6abf6d8481" SRC_URI += "file://phosphor-ipmi-host.service \ - file://0002-Modify-dbus-interface-for-power-control.patch \ - file://0003-Modify-dbus-interface-for-chassis-control.patch \ file://0009-IPv6-Network-changes.patch \ file://0010-fix-get-system-GUID-ipmi-command.patch \ file://0012-ipmi-set-get-boot-options.patch \ file://0013-ipmi-add-set-bios-id-to-whitelist.patch \ - file://0014-Enable-get-device-guid-ipmi-command.patch \ file://0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch \ file://0039-ipmi-add-oem-command-get-AIC-FRU-to-whitelist.patch \ - file://0048-Implement-IPMI-Master-Write-Read-command.patch \ file://0049-Fix-Unspecified-error-on-ipmi-restart-cause-command.patch \ file://0050-enable-6-oem-commands.patch \ file://0053-Fix-keep-looping-issue-when-entering-OS.patch \ file://0055-Implement-set-front-panel-button-enables-command.patch \ file://0056-add-SetInProgress-to-get-set-boot-option-cmd.patch \ file://0057-Add-timer-use-actions-support.patch \ - file://0058-Add-AC-failed-bit-support-for-get-chassis-status-com.patch \ file://0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch \ file://0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch \ " +# remove the softpoweroff service since we do not need it +SYSTEMD_SERVICE_${PN}_remove += " \ + xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service" + +SYSTEMD_LINK_${PN}_remove += " \ + ../xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service:obmc-host-shutdown@0.target.requires/xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service \ + " +FILES_${PN}_remove = " \ + ${systemd_unitdir}/system/obmc-host-shutdown@0.target.requires/ \ + ${systemd_unitdir}/system/obmc-host-shutdown@0.target.requires/xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service \ + " + +do_install_append(){ + rm -f ${D}/${bindir}/phosphor-softpoweroff +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend index 694bd1fcf..13d908ad1 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend @@ -1,2 +1,2 @@ SRC_URI = "git://github.com/openbmc/ipmbbridge.git" -SRCREV = "08deaa317c7ac0dd6e4202529ff17962c63df485" +SRCREV = "8188d7651c23502f88f9bf850ab7e549f6463997" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.SMM.service b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.SMM.service deleted file mode 100644 index 288fa422d..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.SMM.service +++ /dev/null @@ -1,13 +0,0 @@ -[Unit] -Description=Phosphor IPMI KCS DBus Bridge(SMM) -After=phosphor-ipmi-host.service - -[Service] -Restart=always -ExecStart={sbindir}/kcsbridged --d="/dev/ipmi-kcs4" --i="SMM" -SyslogIdentifier=kcsbridged_SMM -Type=dbus -BusName={BUSNAME} - -[Install] -WantedBy={SYSTEMD_DEFAULT_TARGET} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.service b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.service deleted file mode 100644 index 177062e27..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/org.openbmc.HostIpmi.service +++ /dev/null @@ -1,13 +0,0 @@ -[Unit] -Description=Phosphor IPMI KCS DBus Bridge(SMS) -After=phosphor-ipmi-host.service - -[Service] -Restart=always -ExecStart={sbindir}/kcsbridged --d="/dev/ipmi-kcs3" -SyslogIdentifier=kcsbridged -Type=dbus -BusName={BUSNAME} - -[Install] -WantedBy={SYSTEMD_DEFAULT_TARGET} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend index ac7a03108..e3d397f06 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend @@ -1,9 +1,12 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" -DBUS_SERVICE_${PN} += "org.openbmc.HostIpmi.SMM.service" +#SYSTEMD_SUBSTITUTIONS_remove = "KCS_DEVICE:${KCS_DEVICE}:${DBUS_SERVICE_${PN}}" -SYSTEMD_SUBSTITUTIONS_remove = "KCS_DEVICE:${KCS_DEVICE}:${DBUS_SERVICE_${PN}}" +# Default kcs device is ipmi-kcs3; this is SMS. +# Add SMM kcs device instance +SMM_DEVICE = "ipmi-kcs4" +SYSTEMD_SERVICE_${PN}_append = " ${PN}@${SMM_DEVICE}.service " SRC_URI = "git://github.com/openbmc/kcsbridge.git" -SRCREV = "17a2ab7f39a78ff0603aa68cf35108ea94eb442f" +SRCREV = "2cdc49585235a6557c9cbb6c8b75c064fc02681a" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch index 6212c0724..c6b87bf4f 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch @@ -256,54 +256,24 @@ diff --git a/socket_channel.hpp b/socket_channel.hpp index 349701e..8b64740 100644 --- a/socket_channel.hpp +++ b/socket_channel.hpp -@@ -52,33 +52,34 @@ class Channel - } - - /** -- * @brief Fetch the port number of the remote peer -- * -- * Returns the port number of the remote peer -+ * @brief Fetch the IP address of the remote peer - * -- * @return Port number -+ * Returns the IP address of the remote peer which is connected to this -+ * socket +@@ -107,14 +107,15 @@ class Channel * -+ * @return IP address of the remote peer - */ -- auto getPort() const -+ std::uint32_t getRemoteAddressInBytes() const - { -- return endpoint.port(); -+ const boost::asio::ip::address& addr = endpoint.address(); -+ if (addr.is_v4()) -+ { -+ return addr.to_v4().to_uint(); -+ } -+ return 0; - } - - /** -- * @brief Return the binary representation of the remote IPv4 address -+ * @brief Fetch the port number of the remote peer - * -- * getSessionInfo needs to return the remote IPv4 addresses of each session -+ * Returns the port number of the remote peer -+ * -+ * @return Port number - * -- * @return A uint32_t representation of the remote IPv4 address + * @return A uint32_t representation of the remote IPv4 address */ - std::uint32_t getRemoteAddressInbytes() -+ auto getPort() const ++ uint32_t getRemoteAddressInBytes() const { - const boost::asio::ip::address& addr = endpoint.address(); - if (addr.is_v4()) -- { ++ uint32_t v4addr = 0; ++ if (sockAddrSize == sizeof(sockaddr_in)) + { - return addr.to_v4().to_uint(); -- } ++ auto saddr = reinterpret_cast<const sockaddr_in*>(&remoteSockAddr); ++ v4addr = ntohl(saddr->sin_addr.s_addr); + } - return 0; -+ return endpoint.port(); ++ return v4addr; } /** diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch new file mode 100644 index 000000000..da173704b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch @@ -0,0 +1,336 @@ +From a36f181163974b2da0a954fc97a89fb2cdbd7287 Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@intel.com> +Date: Tue, 30 Apr 2019 05:35:31 +0800 +Subject: [PATCH] Remove Get SOL Config Command from Netipmid + +Since Get SOL Config Parameter command already exists in host-ipmid, and +can be shared to net channel, remove this command from net-ipmid. + +Tested: +Run ipmitool -I lanplus -H xxx -U root -P 0penBmc sol info, the command +returns the same result as ipmitool sol info as below. +Info: SOL parameter 'Nonvolatile Bitrate (5)' not supported +Info: SOL parameter 'Volatile Bitrate (6)' not supported +Info: SOL parameter 'Payload Channel (7)' not supported - defaulting to 0x0e +Set in progress : set-complete +Enabled : true +Force Encryption : true +Force Authentication : true +Privilege Level : USER +Character Accumulate Level (ms) : 100 +Character Send Threshold : 1 +Retry Count : 3 +Retry Interval (ms) : 100 +Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Non-Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Payload Channel : 14 (0x0e) +Payload Port : 623 + +Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> +--- + command/sol_cmds.cpp | 91 ---------------------------- + command/sol_cmds.hpp | 168 --------------------------------------------------- + sol_module.cpp | 6 -- + 3 files changed, 265 deletions(-) + +diff --git a/command/sol_cmds.cpp b/command/sol_cmds.cpp +index 804b5ea..8b2d041 100644 +--- a/command/sol_cmds.cpp ++++ b/command/sol_cmds.cpp +@@ -65,97 +65,6 @@ void activating(uint8_t payloadInstance, uint32_t sessionID) + outPayload); + } + +-std::vector<uint8_t> getConfParams(const std::vector<uint8_t>& inPayload, +- const message::Handler& handler) +-{ +- std::vector<uint8_t> outPayload(sizeof(GetConfParamsResponse)); +- auto request = +- reinterpret_cast<const GetConfParamsRequest*>(inPayload.data()); +- auto response = reinterpret_cast<GetConfParamsResponse*>(outPayload.data()); +- response->completionCode = IPMI_CC_OK; +- response->paramRev = parameterRevision; +- +- if (request->getParamRev) +- { +- return outPayload; +- } +- +- switch (static_cast<Parameter>(request->paramSelector)) +- { +- case Parameter::PROGRESS: +- { +- outPayload.push_back( +- std::get<sol::Manager&>(singletonPool).progress); +- break; +- } +- case Parameter::ENABLE: +- { +- outPayload.push_back(std::get<sol::Manager&>(singletonPool).enable); +- break; +- } +- case Parameter::AUTHENTICATION: +- { +- Auth value{0}; +- +- value.encrypt = std::get<sol::Manager&>(singletonPool).forceEncrypt; +- value.auth = std::get<sol::Manager&>(singletonPool).forceAuth; +- value.privilege = static_cast<uint8_t>( +- std::get<sol::Manager&>(singletonPool).solMinPrivilege); +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::ACCUMULATE: +- { +- Accumulate value{0}; +- +- value.interval = std::get<sol::Manager&>(singletonPool) +- .accumulateInterval.count() / +- sol::accIntervalFactor; +- value.threshold = +- std::get<sol::Manager&>(singletonPool).sendThreshold; +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::RETRY: +- { +- Retry value{0}; +- +- value.count = std::get<sol::Manager&>(singletonPool).retryCount; +- value.interval = +- std::get<sol::Manager&>(singletonPool).retryInterval.count() / +- sol::retryIntervalFactor; +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::PORT: +- { +- auto port = endian::to_ipmi<uint16_t>(IPMI_STD_PORT); +- auto buffer = reinterpret_cast<const uint8_t*>(&port); +- +- std::copy_n(buffer, sizeof(port), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::CHANNEL: +- { +- outPayload.push_back( +- std::get<sol::Manager&>(singletonPool).channel); +- break; +- } +- case Parameter::NVBITRATE: +- case Parameter::VBITRATE: +- default: +- response->completionCode = ipmiCCParamNotSupported; +- } +- +- return outPayload; +-} +- + } // namespace command + + } // namespace sol +diff --git a/command/sol_cmds.hpp b/command/sol_cmds.hpp +index 182b73e..10cbf25 100644 +--- a/command/sol_cmds.hpp ++++ b/command/sol_cmds.hpp +@@ -62,174 +62,6 @@ struct ActivatingRequest + */ + void activating(uint8_t payloadInstance, uint32_t sessionID); + +-/** @enum Parameter +- * +- * SOL parameters are volatile, they are initialized by the SOL manager. +- * They can be read using Get SOL configuration parameters command and updated +- * using Set SOL configuration parameters command. +- */ +-enum class Parameter +-{ +- PROGRESS, //!< Set In Progress. +- ENABLE, //!< SOL Enable. +- AUTHENTICATION, //!< SOL Authentication. +- ACCUMULATE, //!< Character Accumulate Interval & Send Threshold. +- RETRY, //!< SOL Retry. +- NVBITRATE, //!< SOL non-volatile bit rate. +- VBITRATE, //!< SOL volatile bit rate. +- CHANNEL, //!< SOL payload channel. +- PORT, //!< SOL payload port. +-}; +- +-constexpr uint8_t progressMask = 0x03; +-constexpr uint8_t enableMask = 0x01; +- +-/** @struct Auth +- * +- * SOL authentication parameter. +- */ +-struct Auth +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t privilege : 4; //!< SOL privilege level. +- uint8_t reserved : 2; //!< Reserved. +- uint8_t auth : 1; //!< Force SOL payload Authentication. +- uint8_t encrypt : 1; //!< Force SOL payload encryption. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t encrypt : 1; //!< Force SOL payload encryption. +- uint8_t auth : 1; //!< Force SOL payload Authentication. +- uint8_t reserved : 2; //!< Reserved. +- uint8_t privilege : 4; //!< SOL privilege level. +-#endif +-} __attribute__((packed)); +- +-/** @struct Accumulate +- * +- * Character accumulate interval & Character send threshold. +- */ +-struct Accumulate +-{ +- uint8_t interval; //!< Character accumulate interval. +- uint8_t threshold; //!< Character send threshold. +-} __attribute__((packed)); +- +-constexpr uint8_t retryCountMask = 0x07; +- +-/** @struct Retry +- * +- * SOL retry count and interval. +- */ +-struct Retry +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t count : 3; //!< SOL retry count. +- uint8_t reserved : 5; //!< Reserved. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t reserved : 5; //!< Reserved. +- uint8_t count : 3; //!< SOL retry count. +-#endif +- +- uint8_t interval; //!< SOL retry interval. +-} __attribute__((packed)); +- +-constexpr uint8_t ipmiCCParamNotSupported = 0x80; +-constexpr uint8_t ipmiCCInvalidSetInProgress = 0x81; +-constexpr uint8_t ipmiCCWriteReadParameter = 0x82; +-constexpr uint8_t ipmiCCReadWriteParameter = 0x83; +-constexpr uint8_t parameterRevision = 0x11; +- +-/** @struct SetConfParamsRequest +- * +- * IPMI payload for Set SOL configuration parameters command request. +- */ +-struct SetConfParamsRequest +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t channelNumber : 4; //!< Channel number. +- uint8_t reserved : 4; //!< Reserved. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t reserved : 4; //!< Reserved. +- uint8_t channelNumber : 4; //!< Channel number. +-#endif +- +- uint8_t paramSelector; //!< Parameter selector. +- union +- { +- uint8_t value; //!< Represents one byte SOL parameters. +- struct Accumulate acc; //!< Character accumulate values. +- struct Retry retry; //!< Retry values. +- struct Auth auth; //!< Authentication parameters. +- }; +-} __attribute__((packed)); +- +-/** @struct SetConfParamsResponse +- * +- * IPMI payload for Set SOL configuration parameters command response. +- */ +-struct SetConfParamsResponse +-{ +- uint8_t completionCode; //!< Completion code. +-} __attribute__((packed)); +- +-/** @brief Set SOL configuration parameters command. +- * +- * @param[in] inPayload - Request data for the command. +- * @param[in] handler - Reference to the message handler. +- * +- * @return Response data for the command. +- */ +-std::vector<uint8_t> setConfParams(const std::vector<uint8_t>& inPayload, +- const message::Handler& handler); +- +-/** @struct GetConfParamsRequest +- * +- * IPMI payload for Get SOL configuration parameters command request. +- */ +-struct GetConfParamsRequest +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t channelNum : 4; //!< Channel number. +- uint8_t reserved : 3; //!< Reserved. +- uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision +- uint8_t reserved : 3; //!< Reserved. +- uint8_t channelNum : 4; //!< Channel number. +-#endif +- +- uint8_t paramSelector; //!< Parameter selector. +- uint8_t setSelector; //!< Set selector. +- uint8_t blockSelector; //!< Block selector. +-} __attribute__((packed)); +- +-/** @struct GetConfParamsResponse +- * +- * IPMI payload for Get SOL configuration parameters command response. +- */ +-struct GetConfParamsResponse +-{ +- uint8_t completionCode; //!< Completion code. +- uint8_t paramRev; //!< Parameter revision. +-} __attribute__((packed)); +- +-/** @brief Get SOL configuration parameters command. +- * +- * @param[in] inPayload - Request data for the command. +- * @param[in] handler - Reference to the message handler. +- * +- * @return Response data for the command. +- */ +-std::vector<uint8_t> getConfParams(const std::vector<uint8_t>& inPayload, +- const message::Handler& handler); +- + } // namespace command + + } // namespace sol +diff --git a/sol_module.cpp b/sol_module.cpp +index 2b1fb46..6da82c0 100644 +--- a/sol_module.cpp ++++ b/sol_module.cpp +@@ -42,12 +42,6 @@ void registerCommands() + &getPayloadInfo, + session::Privilege::USER, + false}, +- // Get SOL Configuration Parameters +- {{(static_cast<uint32_t>(message::PayloadType::IPMI) << 16) | +- static_cast<uint16_t>(::command::NetFns::TRANSPORT) | 0x22}, +- &getConfParams, +- session::Privilege::USER, +- false}, + }; + + for (const auto& iter : commands) +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend index 9dc21a3dd..9f5e3fa6f 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend @@ -3,12 +3,20 @@ inherit useradd # TODO: This should be removed, once up-stream bump up # issue is resolved #SRC_URI += "git://github.com/openbmc/phosphor-net-ipmid" -#SRCREV = "8af90ebcc552e243ae85aa9e9da1a00fbecab56c" +#SRCREV = "052b7cf37411a1bb69af1e6ce541a16021fffa9f" USERADD_PACKAGES = "${PN}" # add a group called ipmi GROUPADD_PARAM_${PN} = "ipmi " +# Default rmcpp iface is eth0; channel 1 +# Add channel 2 instance (eth1) +RMCPP_EXTRA = "eth1" +SYSTEMD_SERVICE_${PN} += " \ + ${PN}@${RMCPP_EXTRA}.service \ + ${PN}@${RMCPP_EXTRA}.socket \ + " + FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" SRC_URI += " file://0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch \ @@ -16,5 +24,6 @@ SRC_URI += " file://0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch file://0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch \ file://0009-Add-dbus-interface-for-sol-commands.patch \ file://00010-Change-Authentication-Parameter.patch \ + file://0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch \ " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb index af83facf6..4861755b6 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb @@ -2,7 +2,7 @@ SUMMARY = "Node Manager Proxy" DESCRIPTION = "The Node Manager Proxy provides a simple interface for communicating \ with Management Engine via IPMB" -SRC_URI = "git://git@github.com/Intel-BMC/node-manager;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/node-manager;protocol=ssh" SRCREV = "2ab90332828614c95e0ce22c0c95285734b55b65" PV = "0.1+git${SRCPV}" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb index 31b9e9338..e7cd1ab42 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb @@ -1,7 +1,7 @@ SUMMARY = "Multi node manager" DESCRIPTION = "Daemon to handle chassis level shared resources on multi-node platform" -SRC_URI = "git://git@github.com/Intel-BMC/multi-node-manager.git;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/multi-node-manager.git;protocol=ssh" SRCREV = "8a34c017e04dd8f327aff127f64855f6132bd318" PV = "0.1+git${SRCPV}" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend deleted file mode 100644 index f1be7d358..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend +++ /dev/null @@ -1,4 +0,0 @@ -${PN}-software-extras_remove = " \ - obmc-flash-bmc \ - obmc-mgr-download \ -" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init index c5b2eb040..c7f78b1e3 100755 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init @@ -53,9 +53,11 @@ NV_MTD_NUM="$(mtdnum_by_name ${NV_MTD})" nvrw() { local p="$1" + # Clear the work dir doing overlay mount + rm -rf "${RWFS_MNT}${p}.work" mkdir -p "${RWFS_MNT}${p}" "${RWFS_MNT}${p}.work" local mname=$(echo "rwnv${p}" | sed 's,/,,g') - local opts="lowerdir=${p},upperdir=${RWFS_MNT}${p},workdir=${RWFS_MNT}${p}.work" + local opts="lowerdir=${p},upperdir=${RWFS_MNT}${p},workdir=${RWFS_MNT}${p}.work,sync" mount -t overlay -o "$opts" "$mname" "$p" } @@ -142,8 +144,29 @@ fi # work around bug where /etc/machine-id will be mounted with a temporary file # if rootfs is read-only and the file is empty MACHINE_ID=/etc/machine-id -if [ ! -s "$MACHINE_ID" ]; then +generate_machine_id() { systemd-machine-id-setup + cp -pf "$MACHINE_ID" "${MACHINE_ID}_bkup" +} + +if [ ! -s "$MACHINE_ID" ]; then + # work around - Bug: Overlay fs fails for machine-id due to + # origin mismatch. Clean it up, from overlay fs before re-creating + # the same. + if [ -e "$RWFS_MNT$MACHINE_ID" ]; then + umount "/etc" + rm -f "$RWFS_MNT$MACHINE_ID" + nvrw "/etc" + # Restore the machine-id from backup, else generate it. + if [ -s "${MACHINE_ID}_bkup" ]; then + cp -pf "${MACHINE_ID}_bkup" "${MACHINE_ID}" + else + generate_machine_id + fi + echo "Remounted /etc for machine-id origin mismatch" + else + generate_machine_id + fi fi # mount persistent NV filesystem, where immortal settings live diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend index ca38bf7fb..2cdc93e29 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend @@ -1,6 +1,7 @@ # Enable downstream autobump SRC_URI = "git://github.com/openbmc/phosphor-sel-logger.git" -SRCREV = "f2552a50fde35d665b5fc3ac6852f2f6bb229cae" +SRCREV = "c4a336fb15464b9f4a7328c02cb43285a6eb1e58" # Enable threshold monitoring EXTRA_OECMAKE += "-DSEL_LOGGER_MONITOR_THRESHOLD_EVENTS=ON" +EXTRA_OECMAKE += "-DREDFISH_LOG_MONITOR_PULSE_EVENTS=ON" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test_git.bb index da1d74207..f655d22e4 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test_git.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test_git.bb @@ -1,7 +1,7 @@ SUMMARY = "BMC Self Test service" DESCRIPTION = "BMC Self Test service for subsystem diagnosis failure info" -SRC_URI = "git://git@github.com/Intel-BMC/intel-self-test;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/intel-self-test;protocol=ssh" PV = "1.0+git${SRCPV}" SRCREV = "d039998ad2c55aeae4191af30e15bbd3032508c1" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend index fdd62e731..ba82532fc 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend @@ -1,4 +1,4 @@ -SRCREV = "93dc2c8e7c710fd65d269ef0bf684fb7a433a602" +SRCREV = "8dbb395364629673a1f1dde81b1cf7d8041b0662" SRC_URI = "git://github.com/openbmc/dbus-sensors.git" DEPENDS_append = " i2c-tools" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml index d2624b606..05d3df07e 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml @@ -150,11 +150,11 @@ ResetErrorOccurrenceCounts: Default: 0 -/xyz/openbmc_project/control/shutdown_policy_config: - - Interface: xyz.openbmc_project.Control.ShutdownPolicy +/com/intel/control/ocotshutdown_policy_config: + - Interface: com.intel.Control.OCOTShutdownPolicy Properties: - Policy: - Default: 0 + OCOTPolicy: + Default: OCOTShutdownPolicy::Policy::NoShutdownOnOCOT /xyz/openbmc_project/control/chassis_capabilities_config: - Interface: xyz.openbmc_project.Control.ChassisCapabilities @@ -198,12 +198,12 @@ ForceAuthentication: Default: 'true' Privilege: - Default: 2 + Default: 4 AccumulateIntervalMS: - Default: 20 + Default: 12 Threshold: - Default: 1 + Default: 96 RetryCount: - Default: 7 + Default: 6 RetryIntervalMS: - Default: 10 + Default: 20 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-manager_%.bbappend index bc695abe8..f5c924b31 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-manager_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-manager_%.bbappend @@ -2,3 +2,8 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" SRC_URI += "file://0001-settings-initialize-data-file-with-default-setting.patch \ " + +DEPENDS += "intel-dbus-interfaces intel-dbus-interfaces-native" +RDEPENDS_${PN} += "intel-dbus-interfaces" + +EXTRA_OEMAKE += "LDFLAGS='${LDFLAGS} -lintel_dbus'" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb new file mode 100644 index 000000000..bcb8361dd --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb @@ -0,0 +1,28 @@ +SUMMARY = "Special mode manager daemon to handle manufacturing modes" +DESCRIPTION = "Daemon exposes the manufacturing mode property" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git/special-mode-mgr" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh;nobranch=1" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" + +inherit cmake systemd +SYSTEMD_SERVICE_${PN} = "specialmodemgr.service" + +DEPENDS += " \ + systemd \ + sdbusplus \ + sdbusplus-native \ + phosphor-logging \ + boost \ + " +RDEPENDS_${PN} += " \ + libsystemd \ + sdbusplus \ + phosphor-logging \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb index 6737ed7a2..c3d71d30c 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb @@ -8,8 +8,8 @@ S = "${WORKDIR}/git/srvcfg-manager" LICENSE = "Apache-2.0" LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" -SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" inherit cmake systemd SYSTEMD_SERVICE_${PN} = "srvcfg-manager.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0002-Capture-host-restart-cause.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0002-Capture-host-restart-cause.patch index 7d70b29fa..2adff372e 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0002-Capture-host-restart-cause.patch +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0002-Capture-host-restart-cause.patch @@ -1,27 +1,28 @@ -From c0f01261572cb527cf9dc62fa732b28c658ff013 Mon Sep 17 00:00:00 2001 +From ed64fe7379a259a822aca69e70426a2b07aad25d Mon Sep 17 00:00:00 2001 From: Kuiying Wang <kuiying.wang@intel.com> Date: Tue, 7 Aug 2018 16:43:00 +0800 Subject: [PATCH] Capture host restart cause Capture host restart cause on power/reset button pressed, +ipmi command/webui, host OS reboot(Ctrl-Alt-Del), and power restore policy settings. -Save the restart cause into file system. -And restort it when BMC boot up. +Save the restart cause into file system, +and restore it when BMC boot up. Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> Signed-off-by: Yong Li <yong.b.li@linux.intel.com> --- - configure.ac | 4 ++-- - discover_system_state.cpp | 14 ++++++++++++ - host_state_manager.cpp | 16 ++++++++++++++ - host_state_manager.hpp | 56 ++++++++++++++++++++++++++++++++++++++++++++--- - 4 files changed, 85 insertions(+), 5 deletions(-) + configure.ac | 4 +- + discover_system_state.cpp | 14 +++++ + host_state_manager.cpp | 17 ++++++ + host_state_manager.hpp | 148 +++++++++++++++++++++++++++++++++++++++++++++- + 4 files changed, 178 insertions(+), 5 deletions(-) diff --git a/configure.ac b/configure.ac -index e985a95..b9e64c8 100644 +index 7919ec5..051a0c0 100644 --- a/configure.ac +++ b/configure.ac -@@ -56,9 +56,9 @@ AC_ARG_VAR(HOST_RUNNING_FILE, [File to create if host is running]) +@@ -52,9 +52,9 @@ AC_ARG_VAR(HOST_RUNNING_FILE, [File to create if host is running]) AS_IF([test "x$HOST_RUNNING_FILE" == "x"], [HOST_RUNNING_FILE="/run/openbmc/host@%u-on"]) AC_DEFINE_UNQUOTED([HOST_RUNNING_FILE], ["$HOST_RUNNING_FILE"], [File to create if host is running]) @@ -73,7 +74,7 @@ index 3a38152..0b5798a 100644 return 0; diff --git a/host_state_manager.cpp b/host_state_manager.cpp -index 7d661dd..03d210d 100644 +index 7d661dd..0e00e78 100644 --- a/host_state_manager.cpp +++ b/host_state_manager.cpp @@ -308,6 +308,15 @@ bool Host::deserialize(const fs::path& path) @@ -92,7 +93,15 @@ index 7d661dd..03d210d 100644 Host::Transition Host::requestedHostTransition(Transition value) { log<level::INFO>("Host State transaction request", -@@ -353,6 +362,13 @@ Host::HostState Host::currentHostState(HostState value) +@@ -321,6 +330,7 @@ Host::Transition Host::requestedHostTransition(Transition value) + // check of this count will occur + if (value != server::Host::Transition::Off) + { ++ hostRestartCause(RestartCause::IpmiCommand); + decrementRebootCount(); + } + +@@ -353,6 +363,13 @@ Host::HostState Host::currentHostState(HostState value) return server::Host::currentHostState(value); } @@ -107,10 +116,10 @@ index 7d661dd..03d210d 100644 } // namespace state } // namespace phosphor diff --git a/host_state_manager.hpp b/host_state_manager.hpp -index 2b00777..e74fab7 100644 +index 2b00777..afd8aa3 100644 --- a/host_state_manager.hpp +++ b/host_state_manager.hpp -@@ -32,6 +32,15 @@ using namespace phosphor::logging; +@@ -32,6 +32,22 @@ using namespace phosphor::logging; namespace sdbusRule = sdbusplus::bus::match::rules; namespace fs = std::experimental::filesystem; @@ -123,10 +132,17 @@ index 2b00777..e74fab7 100644 +const static constexpr char* resetButtonIntf = + "xyz.openbmc_project.Chassis.Buttons.Reset"; + ++const static constexpr char* powerControlService = ++ "xyz.openbmc_project.Chassis.Control.Power"; ++const static constexpr char* powerControlPath = ++ "/xyz/openbmc_project/Chassis/Control/Power0"; ++const static constexpr char* powerControlInterface = ++ "xyz.openbmc_project.Chassis.Control.Power"; ++ /** @class Host * @brief OpenBMC host state management implementation. * @details A concrete implementation for xyz.openbmc_project.State.Host -@@ -59,7 +68,31 @@ class Host : public HostInherit +@@ -59,8 +75,93 @@ class Host : public HostInherit sdbusRule::interface("org.freedesktop.systemd1.Manager"), std::bind(std::mem_fn(&Host::sysStateChange), this, std::placeholders::_1)), @@ -137,38 +153,121 @@ index 2b00777..e74fab7 100644 + sdbusRule::type::signal() + sdbusRule::member("Pressed") + + sdbusRule::path(powerButtonPath) + + sdbusRule::interface(powerButtonIntf), -+ [this](sdbusplus::message::message &msg) { -+ phosphor::logging::log<phosphor::logging::level::INFO>( -+ "powerButtonPressedSignal callback function is called..."); -+ this->hostRestartCause(this->RestartCause::PowerButton); -+ return; -+ } -+ ), -+ resetButtonPressedSignal( ++ [this](sdbusplus::message::message& msg) { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "powerButtonPressedSignal callback function is called..."); ++ this->hostRestartCause(this->RestartCause::PowerButton); ++ this->powerButtonPressed = true; ++ return; ++ }), ++ resetButtonPressedSignal( + bus, + sdbusRule::type::signal() + sdbusRule::member("Pressed") + + sdbusRule::path(resetButtonPath) + + sdbusRule::interface(resetButtonIntf), -+ [this](sdbusplus::message::message &msg) { -+ phosphor::logging::log<phosphor::logging::level::INFO>( -+ "resetButtonPressedSignal callback function is called..."); -+ this->hostRestartCause(this->RestartCause::ResetButton); -+ return; ++ [this](sdbusplus::message::message& msg) { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "resetButtonPressedSignal callback function is called..."); ++ this->hostRestartCause(this->RestartCause::ResetButton); ++ this->resetButtonPressed = true; ++ return; ++ }), ++ postCompletePropSignal( ++ bus, ++ sdbusplus::bus::match::rules::propertiesChanged( ++ powerControlPath, powerControlInterface), ++ [this](sdbusplus::message::message& msg) { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "postCompletePropSignal callback function is called..."); ++ ++ using DbusVariant = sdbusplus::message::variant< ++ std::string, bool, uint8_t, uint16_t, int16_t, uint32_t, ++ int32_t, uint64_t, int64_t, double>; ++ ++ std::map<std::string, DbusVariant> props; ++ std::vector<std::string> inval; ++ std::string iface; ++ msg.read(iface, props, inval); ++ ++ for (const auto& t : props) ++ { ++ auto key = t.first; ++ auto value = t.second; ++ ++ if (key == "state") ++ { ++ this->powerStateChanged = true; ++ } ++ ++ else if (key == "pgood") ++ { ++ this->pgood = ++ sdbusplus::message::variant_ns::get<int32_t>(value); ++ } ++ ++ else if (key == "post_complete") ++ { ++ bool postState = ++ sdbusplus::message::variant_ns::get<bool>(value); ++ ++ if (!postState && this->pgood) ++ { ++ if (!this->resetButtonPressed && ++ !this->powerButtonPressed && ++ !this->powerStateChanged) ++ { ++ phosphor::logging::log< ++ phosphor::logging::level::INFO>( ++ "OEM Reset"); ++ this->hostRestartCause(this->RestartCause::OEM); ++ } ++ this->powerButtonPressed = false; ++ this->powerStateChanged = false; ++ this->resetButtonPressed = false; ++ } ++ } + } -+ ) ++ }) { ++ powerButtonPressed = false; ++ powerStateChanged = false; ++ resetButtonPressed = false; ++ pgood = 0; ++ // Enable systemd signals subscribeToSystemdSignals(); -@@ -69,6 +102,8 @@ class Host : public HostInherit + +@@ -69,8 +170,29 @@ class Host : public HostInherit attemptsLeft(BOOT_COUNT_MAX_ALLOWED); -+ restoreHostRestartCause(); // restore host restart cause from persisted file ++ restoreHostRestartCause(); // restore host restart cause from persisted ++ // file + // We deferred this until we could get our property correct this->emit_object_added(); ++ sdbusplus::message::variant<int32_t> pgoodProp = -1; ++ auto method = ++ this->bus.new_method_call(powerControlService, powerControlPath, ++ "org.freedesktop.DBus.Properties", "Get"); ++ ++ method.append(powerControlInterface, "pgood"); ++ try ++ { ++ auto reply = this->bus.call(method); ++ reply.read(pgoodProp); ++ pgood = sdbusplus::message::variant_ns::get<int>(pgoodProp); ++ } ++ catch (const sdbusplus::exception::SdBusError& e) ++ { ++ log<level::ERR>("Error performing call to get pgood", ++ entry("NAME=%s", e.name()), ++ entry("ERROR=%s", e.what())); ++ } } -@@ -85,6 +120,9 @@ class Host : public HostInherit + + /** @brief Set value of HostTransition */ +@@ -85,6 +207,9 @@ class Host : public HostInherit /** @brief Set value of CurrentHostState */ HostState currentHostState(HostState value) override; @@ -178,19 +277,18 @@ index 2b00777..e74fab7 100644 /** * @brief Set host reboot count to default * -@@ -192,7 +230,10 @@ class Host : public HostInherit +@@ -192,7 +317,9 @@ class Host : public HostInherit server::Progress::bootProgress()), convertForMessage( sdbusplus::xyz::openbmc_project::State::OperatingSystem:: - server::Status::operatingSystemState())); + server::Status::operatingSystemState()), + convertForMessage(sdbusplus::xyz::openbmc_project::State:: -+ server::Host::hostRestartCause()) -+ ); ++ server::Host::hostRestartCause())); } /** @brief Function required by Cereal to perform deserialization. -@@ -208,7 +249,8 @@ class Host : public HostInherit +@@ -208,7 +335,8 @@ class Host : public HostInherit std::string reqTranState; std::string bootProgress; std::string osState; @@ -200,16 +298,16 @@ index 2b00777..e74fab7 100644 auto reqTran = Host::convertTransitionFromString(reqTranState); // When restoring, set the requested state with persistent value // but don't call the override which would execute it -@@ -219,6 +261,8 @@ class Host : public HostInherit +@@ -219,6 +347,8 @@ class Host : public HostInherit sdbusplus::xyz::openbmc_project::State::OperatingSystem::server:: Status::operatingSystemState( Host::convertOSStatusFromString(osState)); -+ sdbusplus::xyz::openbmc_project::State::server::Host:: -+ hostRestartCause(Host::convertRestartCauseFromString(restartCause)); ++ sdbusplus::xyz::openbmc_project::State::server::Host::hostRestartCause( ++ Host::convertRestartCauseFromString(restartCause)); } /** @brief Serialize and persist requested host state -@@ -239,6 +283,9 @@ class Host : public HostInherit +@@ -239,6 +369,9 @@ class Host : public HostInherit */ bool deserialize(const fs::path& path); @@ -219,13 +317,19 @@ index 2b00777..e74fab7 100644 /** @brief Persistent sdbusplus DBus bus connection. */ sdbusplus::bus::bus& bus; -@@ -247,6 +294,9 @@ class Host : public HostInherit +@@ -247,6 +380,15 @@ class Host : public HostInherit // Settings objects of interest settings::Objects settings; + ++ bool resetButtonPressed; ++ bool powerButtonPressed; ++ bool powerStateChanged; ++ int32_t pgood; ++ + sdbusplus::bus::match_t powerButtonPressedSignal; + sdbusplus::bus::match_t resetButtonPressedSignal; ++ sdbusplus::bus::match_t postCompletePropSignal; }; } // namespace manager diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0004-Add-Power-Restore-delay-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0004-Add-Power-Restore-delay-support.patch new file mode 100644 index 000000000..31cb31079 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager/0004-Add-Power-Restore-delay-support.patch @@ -0,0 +1,141 @@ +From 0edff651156ae63b6a73d9cb81e5e76cc6ae501a Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Fri, 12 Apr 2019 18:43:06 +0800 +Subject: [PATCH] Add Power Restore delay support + +That takes effect whenever the BMC +automatically turns on the system due +to the Power Restore Policy setting + +Tested: +Set power restore delay: +ipmitool raw 0x30 0x54 0 7 +Set restore policy as always-on: +ipmitool chassis policy always-on +AC off/on, check the journal log, the host will start boot after 7 seconds delay + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +--- + discover_system_state.cpp | 71 +++++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 68 insertions(+), 3 deletions(-) + +diff --git a/discover_system_state.cpp b/discover_system_state.cpp +index 0b5798a..298ae5b 100644 +--- a/discover_system_state.cpp ++++ b/discover_system_state.cpp +@@ -1,5 +1,4 @@ + #include <getopt.h> +-#include <iostream> + #include <map> + #include <string> + #include <config.h> +@@ -114,6 +113,49 @@ void setProperty(sdbusplus::bus::bus& bus, const std::string& path, + return; + } + ++int getPowerRestoreDelay(sdbusplus::bus::bus& bus, uint16_t& delay) ++{ ++ static constexpr const char* powerRestoreDelayObjPath = ++ "/xyz/openbmc_project/control/power_restore_delay"; ++ static constexpr const char* powerRestoreDelayIntf = ++ "xyz.openbmc_project.Control.Power.RestoreDelay"; ++ static constexpr const char* powerRestoreDelayProp = "PowerRestoreDelay"; ++ ++ std::string service = ++ getService(bus, powerRestoreDelayObjPath, powerRestoreDelayIntf); ++ ++ sdbusplus::message::message method = bus.new_method_call( ++ service.c_str(), powerRestoreDelayObjPath, PROPERTY_INTERFACE, "Get"); ++ ++ method.append(powerRestoreDelayIntf, powerRestoreDelayProp); ++ ++ try ++ { ++ auto reply = bus.call(method); ++ sdbusplus::message::variant<uint16_t> variant; ++ reply.read(variant); ++ delay = sdbusplus::message::variant_ns::get<uint16_t>(variant); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Failed to get property", ++ phosphor::logging::entry("PROPERTY=%s", powerRestoreDelayProp), ++ phosphor::logging::entry("PATH=%s", powerRestoreDelayObjPath), ++ phosphor::logging::entry("INTERFACE=%s", powerRestoreDelayIntf)); ++ return -1; ++ } ++ return 0; ++} ++ ++void applyPowerRestoreDelay(uint16_t delay) ++{ ++ if (delay > 0) ++ { ++ log<level::INFO>("Apply Power Restore Delay", entry("DELAY=%d", delay)); ++ std::this_thread::sleep_for(std::chrono::milliseconds(1000 * delay)); ++ } ++} + } // namespace manager + } // namespace state + } // namespace phosphor +@@ -176,13 +218,27 @@ int main(int argc, char** argv) + log<level::INFO>("Host power is off, checking power policy", + entry("POWER_POLICY=%s", powerPolicy.c_str())); + ++ uint16_t delay = 0; ++ int ret = getPowerRestoreDelay(bus, delay); ++ ++ if (ret != 0) ++ { ++ log<level::WARNING>("getPowerRestoreDelay failed!"); ++ delay = 0; ++ } ++ + if (RestorePolicy::Policy::AlwaysOn == + RestorePolicy::convertPolicyFromString(powerPolicy)) + { ++ applyPowerRestoreDelay(delay); ++ + log<level::INFO>("power_policy=ALWAYS_POWER_ON, powering host on"); ++ + setProperty(bus, hostPath, HOST_BUSNAME, "RequestedHostTransition", + convertForMessage(server::Host::Transition::On)); + ++ // Host on, needs to set the restart cause after host transition ++ // since host transition will change the restart cause + setProperty( + bus, hostPath, HOST_BUSNAME, "HostRestartCause", + convertForMessage(server::Host::RestartCause::PowerPolicyAlwaysOn)); +@@ -195,17 +251,26 @@ int main(int argc, char** argv) + // Read last requested state and re-request it to execute it + auto hostReqState = + getProperty(bus, hostPath, HOST_BUSNAME, "RequestedHostTransition"); +- setProperty(bus, hostPath, HOST_BUSNAME, "RequestedHostTransition", +- hostReqState); + + if (server::Host::convertTransitionFromString(hostReqState) == + server::Host::Transition::On) + { ++ applyPowerRestoreDelay(delay); ++ setProperty(bus, hostPath, HOST_BUSNAME, "RequestedHostTransition", ++ hostReqState); ++ ++ // Host on, needs to set the restart cause after host transition ++ // since host transition will change the restart cause + setProperty( + bus, hostPath, HOST_BUSNAME, "HostRestartCause", + convertForMessage( + server::Host::RestartCause::PowerPolicyPreviousState)); + } ++ else ++ { ++ setProperty(bus, hostPath, HOST_BUSNAME, "RequestedHostTransition", ++ hostReqState); ++ } + } + + return 0; +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend index 4c50ecf5e..63155ce0d 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend @@ -6,4 +6,5 @@ SRC_URI += "file://0001-Modify-dbus-interface-for-power-control.patch \ file://phosphor-reset-host-check@.service \ file://0002-Capture-host-restart-cause.patch \ file://0003-Use-warm-reboot-for-the-Reboot-host-state-transition.patch \ + file://0004-Add-Power-Restore-delay-support.patch \ " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb index ace1969e5..818259153 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb @@ -1,13 +1,13 @@ SUMMARY = "Callback Manager" DESCRIPTION = "D-Bus daemon that registers matches that trigger method calls" -SRC_URI = "git://git@github.com/Intel-BMC/provingground;protocol=ssh" +SRC_URI = "git://github.com/Intel-BMC/provingground;protocol=ssh" inherit cmake systemd DEPENDS = "boost sdbusplus" PV = "0.1+git${SRCPV}" -SRCREV = "785f19b128794611574ea6c18805740fb851ecff" +SRCREV = "ec8f1c06be71d6059c82fd442475420286f5dbcd" S = "${WORKDIR}/git/callback-manager" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend index 4c7d3ac2d..70cbc72f6 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend @@ -1,7 +1,7 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" #SRC_URI = "git://github.com/openbmc/phosphor-user-manager" -SRCREV = "c3f56c50ffffe1076531eb4aad7c0a574a44841f" +SRCREV = "fef578960f632abacc5cd615b2bedfb3ab9ebb90" SRC_URI += " \ diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0002-Add-restart-cause-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0002-Add-restart-cause-support.patch new file mode 100644 index 000000000..05374e9db --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0002-Add-restart-cause-support.patch @@ -0,0 +1,82 @@ +From af3a7d07b801c22a03350897c2186b1ee9507ff2 Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Sun, 14 Apr 2019 11:14:09 +0800 +Subject: [PATCH] Add restart cause support + +Add restart cause support for watchdog expiration, to support +Get system restart cause command defined in IPMI spec + +Tested: +Set a hard reset watchdog: +ipmitool raw 0x06 0x24 0x5 0x1 0x0 0x0 0x64 0x00 + +Start the timer: +ipmitool mc watchdog reset + +Wait for 10 seconds, host will be restart, query the restart cause: +Ipmitool chassis restart_cause +System restart cause: watchdog expired + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +--- + watchdog.cpp | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/watchdog.cpp b/watchdog.cpp +index 008cde5..7f1ec05 100644 +--- a/watchdog.cpp ++++ b/watchdog.cpp +@@ -7,6 +7,7 @@ + #include <phosphor-logging/log.hpp> + #include <sdbusplus/exception.hpp> + #include <xyz/openbmc_project/Common/error.hpp> ++#include <xyz/openbmc_project/State/Host/server.hpp> + + namespace phosphor + { +@@ -24,6 +25,12 @@ constexpr auto SYSTEMD_SERVICE = "org.freedesktop.systemd1"; + constexpr auto SYSTEMD_ROOT = "/org/freedesktop/systemd1"; + constexpr auto SYSTEMD_INTERFACE = "org.freedesktop.systemd1.Manager"; + ++// host state manager service ++static constexpr const char* hostService = "xyz.openbmc_project.State.Host"; ++static constexpr const char* hostPath = "/xyz/openbmc_project/state/host0"; ++static constexpr const char* hostInterface = "xyz.openbmc_project.State.Host"; ++static constexpr const char* dbusPropIf = "org.freedesktop.DBus.Properties"; ++ + void Watchdog::resetTimeRemaining(bool enableWatchdog) + { + timeRemaining(interval()); +@@ -139,6 +146,29 @@ void Watchdog::timeOutHandler() + entry("ERROR=%s", e.what())); + commit<InternalFailure>(); + } ++ ++ // set restart cause for watchdog HardReset & PowerCycle actions ++ if ((action == Watchdog::Action::HardReset) || ++ (action == Watchdog::Action::PowerCycle)) ++ { ++ sdbusplus::message::variant<std::string> property = ++ convertForMessage( ++ (sdbusplus::xyz::openbmc_project::State::server::Host:: ++ RestartCause::WatchdogTimer)); ++ try ++ { ++ auto method = bus.new_method_call(hostService, hostPath, ++ dbusPropIf, "Set"); ++ method.append(hostInterface, "HostRestartCause", property); ++ bus.call(method); ++ } ++ catch (sdbusplus::exception_t& e) ++ { ++ log<level::ERR>("Failed to set HostRestartCause property", ++ entry("ERROR=%s", e.what())); ++ commit<InternalFailure>(); ++ } ++ } + } + + tryFallbackOrDisable(); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend index 6411c209d..d9c047461 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend @@ -1,6 +1,8 @@ FILESEXTRAPATHS_append := ":${THISDIR}/${PN}" -SRC_URI += "file://0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch" +SRC_URI += "file://0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch \ + file://0002-Add-restart-cause-support.patch \ + " # Remove the override to keep service running after DC cycle SYSTEMD_OVERRIDE_${PN}_remove = "poweron.conf:phosphor-watchdog@poweron.service.d/poweron.conf" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0001-Implement-KVM-in-webui.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0001-Implement-KVM-in-webui.patch deleted file mode 100644 index 85b0f1009..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0001-Implement-KVM-in-webui.patch +++ /dev/null @@ -1,238 +0,0 @@ -From 4c63b4e16fbc3b536a437b2ab5d5df5e846e6b83 Mon Sep 17 00:00:00 2001 -From: Ed tanous <ed@tanous.net> -Date: Sun, 22 Apr 2018 10:53:28 -0700 -Subject: [PATCH] Implement KVM in webui - -This patchset adds the infrastructure to allow KVM sessions -through the webui. A websocket capable VNC/RFB connection -on the BMC is needed for KVM sessions. - -To access, navigate to Server control -> KVM. - -Tested: Ran obmc-ikvm on the BMC, added a KVM Handler to - Phosphor Rest Server, and was able to establish a - KVM session in the webui on a Witherspoon. -Change-Id: I7dda5bec41d270ae8d0913697714d4df4ec3a257 -Signed-off-by: Ed Tanous <ed.tanous@intel.com> -Signed-off-by: Gunnar Mills <gmills@us.ibm.com> ---- - app/common/directives/app-navigation.html | 12 +++-- - app/index.js | 1 + - app/server-control/controllers/kvm-controller.html | 5 ++ - app/server-control/controllers/kvm-controller.js | 55 ++++++++++++++++++++++ - app/server-control/index.js | 5 ++ - app/server-control/styles/index.scss | 1 + - app/server-control/styles/kvm.scss | 11 +++++ - package-lock.json | 5 ++ - package.json | 1 + - webpack.config.js | 6 ++- - 10 files changed, 96 insertions(+), 6 deletions(-) - create mode 100644 app/server-control/controllers/kvm-controller.html - create mode 100644 app/server-control/controllers/kvm-controller.js - create mode 100644 app/server-control/styles/kvm.scss - -diff --git a/app/common/directives/app-navigation.html b/app/common/directives/app-navigation.html -index a45a24bcbaa1..e54b23631b3e 100644 ---- a/app/common/directives/app-navigation.html -+++ b/app/common/directives/app-navigation.html -@@ -87,19 +87,21 @@ - <a href="#/server-control/bmc-reboot" tabindex="13" ng-click="closeSubnav()">Reboot BMC</a></li> - <li ng-class="{'active': (path == '/server-control/remote-console')}"> - <a href="#/server-control/remote-console" tabindex="14" ng-click="closeSubnav()">Serial over LAN console</a></li> -+ <li ng-class="{'active': (path == '/server-control/kvm')}"> -+ <a href="#/server-control/kvm" tabindex="15" ng-click="closeSubnav()">KVM</a></li> - </ul> - <ul class="nav__second-level btn-firmware" ng-style="navStyle" ng-class="{opened: (showSubMenu && firstLevel == 'configuration')}"> - <li ng-class="{'active': (path == '/configuration' || path == '/configuration/network')}"> -- <a href="#/configuration/network" tabindex="15" ng-click="closeSubnav()">Network settings</a></li> -+ <a href="#/configuration/network" tabindex="16" ng-click="closeSubnav()">Network settings</a></li> - <li ng-class="{'active': (path == '/configuration' || path == '/configuration/snmp')}"> -- <a href="#/configuration/snmp" tabindex="16" ng-click="closeSubnav()">SNMP settings</a></li> -+ <a href="#/configuration/snmp" tabindex="17" ng-click="closeSubnav()">SNMP settings</a></li> - <li ng-class="{'active': (path == '/configuration' || path == '/configuration/firmware')}"> -- <a href="#/configuration/firmware" tabindex="17" ng-click="closeSubnav()">Firmware</a></li> -+ <a href="#/configuration/firmware" tabindex="18" ng-click="closeSubnav()">Firmware</a></li> - <li ng-class="{'active': (path == '/configuration' || path == '/configuration/date-time')}"> -- <a href="#/configuration/date-time" tabindex="18" ng-click="closeSubnav()">Date and time settings</a></li> -+ <a href="#/configuration/date-time" tabindex="19" ng-click="closeSubnav()">Date and time settings</a></li> - </ul> - <ul class="nav__second-level btn-users" ng-style="navStyle" ng-class="{opened: (showSubMenu && firstLevel == 'users')}"> - <li ng-class="{'active': (path == '/users' || path == '/users/manage-accounts')}"> -- <a href="#/users/manage-accounts" tabindex="19" ng-click="closeSubnav()">Manage user account</a></li> -+ <a href="#/users/manage-accounts" tabindex="20" ng-click="closeSubnav()">Manage user account</a></li> - </ul> - </nav> -diff --git a/app/index.js b/app/index.js -index 38df0e9896f4..a0dde4df96b7 100644 ---- a/app/index.js -+++ b/app/index.js -@@ -69,6 +69,7 @@ import power_operations_controller from './server-control/controllers/power-oper - import power_usage_controller from './server-control/controllers/power-usage-controller.js'; - import remote_console_window_controller from './server-control/controllers/remote-console-window-controller.js'; - import server_led_controller from './server-control/controllers/server-led-controller.js'; -+import kvm_controller from './server-control/controllers/kvm-controller.js'; - - import server_health_index from './server-health/index.js'; - import inventory_overview_controller from './server-health/controllers/inventory-overview-controller.js'; -diff --git a/app/server-control/controllers/kvm-controller.html b/app/server-control/controllers/kvm-controller.html -new file mode 100644 -index 000000000000..40e4d97454bc ---- /dev/null -+++ b/app/server-control/controllers/kvm-controller.html -@@ -0,0 +1,5 @@ -+<div id="noVNC_container"> -+ <div id="noVNC_status_bar"> -+ <div id="noVNC_left_dummy_elem"></div> -+ </div> -+</div> -diff --git a/app/server-control/controllers/kvm-controller.js b/app/server-control/controllers/kvm-controller.js -new file mode 100644 -index 000000000000..a43f169ddf19 ---- /dev/null -+++ b/app/server-control/controllers/kvm-controller.js -@@ -0,0 +1,55 @@ -+/** -+ * Controller for KVM (Kernel-based Virtual Machine) -+ * -+ * @module app/serverControl -+ * @exports kvmController -+ * @name kvmController -+ */ -+ -+import RFB from '@novnc/novnc/core/rfb.js'; -+ -+window.angular && (function(angular) { -+ 'use strict'; -+ -+ angular.module('app.serverControl').controller('kvmController', [ -+ '$scope', '$location', '$log', -+ function($scope, $location, $log) { -+ var rfb; -+ -+ $scope.$on('$destroy', function() { -+ if (rfb) { -+ rfb.disconnect(); -+ } -+ }); -+ -+ function sendCtrlAltDel() { -+ rfb.sendCtrlAltDel(); -+ return false; -+ }; -+ -+ function connected(e) { -+ $log.debug('RFB Connected'); -+ } -+ function disconnected(e) { -+ $log.debug('RFB disconnected'); -+ } -+ -+ var host = $location.host(); -+ var port = $location.port(); -+ var target = -+ angular.element(document.querySelector('#noVNC_container'))[0]; -+ -+ try { -+ rfb = new RFB(target, 'wss://' + host + ':' + port + '/kvm/0', {}); -+ -+ rfb.addEventListener('connect', connected); -+ rfb.addEventListener('disconnect', disconnected); -+ } catch (exc) { -+ $log.error(exc); -+ updateState( -+ null, 'fatal', null, 'Unable to create RFB client -- ' + exc); -+ return; // don't continue trying to connect -+ }; -+ } -+ ]); -+})(angular); -diff --git a/app/server-control/index.js b/app/server-control/index.js -index 739bd1eb8ad9..1b8aad50b702 100644 ---- a/app/server-control/index.js -+++ b/app/server-control/index.js -@@ -48,6 +48,11 @@ window.angular && (function(angular) { - 'controller': 'remoteConsoleWindowController', - authenticated: true - }) -+ .when('/server-control/kvm', { -+ 'template': require('./controllers/kvm-controller.html'), -+ 'controller': 'kvmController', -+ authenticated: true -+ }) - .when('/server-control', { - 'template': - require('./controllers/power-operations-controller.html'), -diff --git a/app/server-control/styles/index.scss b/app/server-control/styles/index.scss -index f6b15ab6afc9..5e8a99580894 100644 ---- a/app/server-control/styles/index.scss -+++ b/app/server-control/styles/index.scss -@@ -3,3 +3,4 @@ - @import "./remote-console.scss"; - @import "./server-led.scss"; - @import "./power-usage.scss"; -+@import "./kvm.scss"; -diff --git a/app/server-control/styles/kvm.scss b/app/server-control/styles/kvm.scss -new file mode 100644 -index 000000000000..2f9e2c0c9f37 ---- /dev/null -+++ b/app/server-control/styles/kvm.scss -@@ -0,0 +1,11 @@ -+ -+.noNVC_shown { -+ display: inline; -+} -+.noVNC_hidden { -+ display: none; -+} -+ -+#noVNC_left_dummy_elem { -+ flex: 1; -+} -diff --git a/package-lock.json b/package-lock.json -index 2d9d31b21968..103c9b84b933 100644 ---- a/package-lock.json -+++ b/package-lock.json -@@ -807,6 +807,11 @@ - "to-fast-properties": "2.0.0" - } - }, -+ "@novnc/novnc": { -+ "version": "1.0.0", -+ "resolved": "https://registry.npmjs.org/@novnc/novnc/-/novnc-1.0.0.tgz", -+ "integrity": "sha1-drDonm+HOMqBVBlbr1uOaoC8kQU=" -+ }, - "@types/node": { - "version": "10.12.18", - "resolved": "https://registry.npmjs.org/@types/node/-/node-10.12.18.tgz", -diff --git a/package.json b/package.json -index 35c6b78e320c..fd253cbb2f02 100644 ---- a/package.json -+++ b/package.json -@@ -30,6 +30,7 @@ - "dependencies": { - "angular": "^1.7.5", - "angular-animate": "^1.7.5", -+ "@novnc/novnc": "^1.0.0", - "angular-clipboard": "^1.6.2", - "angular-cookies": "^1.7.5", - "angular-messages": "^1.7.6", -diff --git a/webpack.config.js b/webpack.config.js -index 91cbea8f2952..6c8667cbbc98 100644 ---- a/webpack.config.js -+++ b/webpack.config.js -@@ -113,7 +113,11 @@ module.exports = (env, options) => { - 'base-uri': '\'self\'', - 'object-src': '\'none\'', - 'script-src': ['\'self\''], -- 'style-src': ['\'self\''] -+ 'style-src': ['\'self\''], -+ // KVM requires image buffers from data: payloads, so allow that in -+ // img-src -+ // https://stackoverflow.com/questions/18447970/content-security-policy-data-not-working-for-base64-images-in-chrome-28 -+ 'img-src': ['\'self\'', 'data:'], - }), - new MiniCssExtractPlugin(), - --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch deleted file mode 100644 index 77bf662dc..000000000 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 7ea99450a96ac6eb5815ed5f1b7a17e055365b78 Mon Sep 17 00:00:00 2001 -From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> -Date: Sat, 6 Apr 2019 00:15:04 -0700 -Subject: [PATCH] Pull the latest novnc package - -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> ---- - package-lock.json | 18 +++++++++++------- - package.json | 2 +- - 2 files changed, 12 insertions(+), 8 deletions(-) - -diff --git a/package-lock.json b/package-lock.json -index c79a26c8229c..337383551a96 100644 ---- a/package-lock.json -+++ b/package-lock.json -@@ -808,9 +808,8 @@ - } - }, - "@novnc/novnc": { -- "version": "1.0.0", -- "resolved": "https://registry.npmjs.org/@novnc/novnc/-/novnc-1.0.0.tgz", -- "integrity": "sha1-drDonm+HOMqBVBlbr1uOaoC8kQU=" -+ "version": "git+https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5", -+ "from": "git+https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5" - }, - "@types/node": { - "version": "10.12.18", -@@ -3965,7 +3964,8 @@ - "ansi-regex": { - "version": "2.1.1", - "bundled": true, -- "dev": true -+ "dev": true, -+ "optional": true - }, - "aproba": { - "version": "1.2.0", -@@ -4380,7 +4380,8 @@ - "safe-buffer": { - "version": "5.1.1", - "bundled": true, -- "dev": true -+ "dev": true, -+ "optional": true - }, - "safer-buffer": { - "version": "2.1.2", -@@ -4436,6 +4437,7 @@ - "version": "3.0.1", - "bundled": true, - "dev": true, -+ "optional": true, - "requires": { - "ansi-regex": "2.1.1" - } -@@ -4479,12 +4481,14 @@ - "wrappy": { - "version": "1.0.2", - "bundled": true, -- "dev": true -+ "dev": true, -+ "optional": true - }, - "yallist": { - "version": "3.0.2", - "bundled": true, -- "dev": true -+ "dev": true, -+ "optional": true - } - } - }, -diff --git a/package.json b/package.json -index 0a880571d617..be816c8ece03 100644 ---- a/package.json -+++ b/package.json -@@ -30,7 +30,7 @@ - "dependencies": { - "angular": "^1.7.5", - "angular-animate": "^1.7.5", -- "@novnc/novnc": "^1.0.0", -+ "@novnc/novnc": "https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5", - "angular-clipboard": "^1.6.2", - "angular-cookies": "^1.7.5", - "angular-messages": "^1.7.6", --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend index 9248894f7..3d8f359f8 100644 --- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend @@ -1,9 +1,6 @@ FILESEXTRAPATHS_append := ":${THISDIR}/${PN}" #SRC_URI = "git://github.com/openbmc/phosphor-webui.git" -SRCREV = "4733a11b42fca6013e3957bf0e345d0cea086d96" +SRCREV = "44da471fceb3790b49a43bc023781f62b19f9fde" -SRC_URI += "file://0001-Implement-KVM-in-webui.patch \ - file://0004-Implement-force-boot-to-bios-in-server-power-control.patch \ - file://0008-Pull-the-latest-novnc-package.patch \ - " +SRC_URI += "file://0004-Implement-force-boot-to-bios-in-server-power-control.patch" diff --git a/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Close-the-read-pipe-after-_read_error-completes.patch b/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Close-the-read-pipe-after-_read_error-completes.patch deleted file mode 100644 index 80b1084ad..000000000 --- a/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Close-the-read-pipe-after-_read_error-completes.patch +++ /dev/null @@ -1,45 +0,0 @@ -From a035b099050e0f6e953001ce5b7f415043a12ec6 Mon Sep 17 00:00:00 2001 -From: "Jason M. Bills" <jason.m.bills@linux.intel.com> -Date: Wed, 20 Mar 2019 18:20:12 -0700 -Subject: [PATCH] Close the read pipe after _read_error() completes - -There are exit conditions in _read_error() where the pipe does -not get closed resulting in a file descriptor leak in the -parent process after the child exits. - -This change moves the responsibility to close the pipe out of -_read_error() to the caller of _read_error() which aligns -with the behavior of _write_error(). - -Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> ---- - boost/process/detail/posix/executor.hpp | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/boost/process/detail/posix/executor.hpp b/boost/process/detail/posix/executor.hpp -index 1390a58..661fbc5 100644 ---- a/boost/process/detail/posix/executor.hpp -+++ b/boost/process/detail/posix/executor.hpp -@@ -296,11 +296,9 @@ class executor - //EAGAIN not yet forked, EINTR interrupted, i.e. try again - else if ((err != EAGAIN ) && (err != EINTR)) - { -- ::close(source); - set_error(std::error_code(err, std::system_category()), "Error read pipe"); - } - } -- ::close(source); - set_error(ec, std::move(msg)); - } - -@@ -429,6 +427,7 @@ child executor<Sequence>::invoke(boost::mpl::false_, boost::mpl::false_) - - ::close(p[1]); - _read_error(p[0]); -+ ::close(p[0]); - - if (_ec) - { --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Fix-Issue-62.patch b/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Fix-Issue-62.patch new file mode 100644 index 000000000..80dfc2725 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/boost/boost/0001-Fix-Issue-62.patch @@ -0,0 +1,28 @@ +From 318439af2e77731ae2c3df5e198c1d3e8392d556 Mon Sep 17 00:00:00 2001 +From: Simon Ebner <Simon.Ebner@advertima.com> +Date: Fri, 22 Mar 2019 15:27:35 +0100 +Subject: [PATCH 1/2] Fix Issue 62 + +Fixes a leaking pipe. See https://github.com/boostorg/process/issues/62 +--- + boost/process/detail/posix/executor.hpp | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/boost/process/detail/posix/executor.hpp b/boost/process/detail/posix/executor.hpp +index 1390a58..8b86ed1 100644 +--- a/boost/process/detail/posix/executor.hpp ++++ b/boost/process/detail/posix/executor.hpp +@@ -282,7 +282,10 @@ class executor + set_error(std::error_code(err, std::system_category()), "Error read pipe"); + } + if (count == 0) ++ { ++ ::close(source); + return ; ++ } + + std::error_code ec(data[0], std::system_category()); + std::string msg(data[1], ' '); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend b/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend index d42d7ff6d..f85e30b1f 100644 --- a/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend +++ b/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend @@ -1,3 +1,3 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" -SRC_URI += "file://0001-Close-the-read-pipe-after-_read_error-completes.patch" +SRC_URI += "file://0001-Fix-Issue-62.patch" diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-arm-dts-add-DTS-for-Intel-platforms.patch index 2a3f547d5..5f8e0fd5c 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch +++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-arm-dts-add-DTS-for-Intel-platforms.patch @@ -1,44 +1,26 @@ -From 7bee096fd87485d1095c6b6940b62681ff873045 Mon Sep 17 00:00:00 2001 +From 429f3710a88d81d6875aec7a848dde96074ee8df Mon Sep 17 00:00:00 2001 From: Yuan Li <yuan.li@linux.intel.com> Date: Tue, 19 Sep 2017 15:55:39 +0800 -Subject: [PATCH] ARM: dts: purley: Merge all dts node in the unified patch. +Subject: [PATCH] arm: dts: add DTS for Intel platforms -The below changes to the dts file are merged together: -* 0006: the original one for purley -* 0008: sgpio -* 0009: peci -* 0015: leds_gpio -* 0018: kcs3 & kcs4 -* i2c4 for HSBP access -* i2c3 for PCH access -* LPC SIO device -* i2c0 for IPMB -* 12c5 bus-freq -* vuart -* uart1/serial0 -* uart2/serial1 -* uart3/serial2 -* uart4/serail3 -* enable high speed uart clock -* timer pwm -* cpu0/1fault LEDs -* i2c9 for SPD on WP / Disable beeper and timer-pwm +Add the DTS file for Intel systems. Signed-off-by: Yuan Li <yuan.li@linux.intel.com> Signed-off-by: Yong Li <yong.b.li@linux.intel.com> Signed-off-by: James Feist <james.feist@linux.intel.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> --- - arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 358 ++++++++++++++++++++++++++ - 1 file changed, 358 insertions(+) + arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 388 ++++++++++++++++++++++++++ + 1 file changed, 388 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-intel-purley.dts diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts new file mode 100644 -index 000000000000..432f10186547 +index 0000000..20067f5 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts -@@ -0,0 +1,358 @@ +@@ -0,0 +1,388 @@ +/dts-v1/; + +#include "aspeed-g5.dtsi" @@ -80,7 +62,7 @@ index 000000000000..432f10186547 + }; + + video_engine_memory: jpegbuffer { -+ size = <0x02000000>; /* 32MM */ ++ size = <0x02000000>; /* 32M */ + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; @@ -117,20 +99,12 @@ index 000000000000..432f10186547 + default-state = "keep"; + gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>; + }; -+ -+ cpu0fault { -+ gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>; -+ }; -+ -+ cpu1fault { -+ gpios = <&gpio ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>; -+ }; + }; + -+ //beeper { -+ // compatible = "pwm-beeper"; -+ // pwms = <&timer 5 1000000 0>; -+ //}; ++ beeper { ++ compatible = "pwm-beeper"; ++ pwms = <&timer 5 1000000 0>; ++ }; +}; + +&fmc { @@ -165,6 +139,36 @@ index 000000000000..432f10186547 + +&gpio { + status = "okay"; ++ gpio-line-names = ++ /*A0-A7*/ "","","","","","","","", ++ /*B0-B7*/ "","","","","","","","", ++ /*C0-C7*/ "","","","","","","","", ++ /*D0-D7*/ "","","","","","","","", ++ /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","", ++ /*F0-F7*/ "","","","","","","","", ++ /*G0-G7*/ "","","","","","","","", ++ /*H0-H7*/ "","","","","","","","", ++ /*I0-I7*/ "","","","","","","","", ++ /*J0-J7*/ "","","","","","","","", ++ /*K0-K7*/ "","","","","","","","", ++ /*L0-L7*/ "","","","","","","","", ++ /*M0-M7*/ "","","","","","","","", ++ /*N0-N7*/ "","","","","","","","", ++ /*O0-O7*/ "","","","","","","","", ++ /*P0-P7*/ "","","","","","","","", ++ /*Q0-Q7*/ "","","","","","","","", ++ /*R0-R7*/ "","","","","","","","", ++ /*S0-S7*/ "","","","","","","ID_BUTTON","", ++ /*T0-T7*/ "","","","","","","","", ++ /*U0-U7*/ "","","","","","","","", ++ /*V0-V7*/ "","","","","","","","", ++ /*W0-W7*/ "","","","","","","","", ++ /*X0-X7*/ "","","","","","","","", ++ /*Y0-Y7*/ "","","","","","","","", ++ /*Z0-Z7*/ "","","","","","","","", ++ /*AA0-AA7*/ "","","","","","","","POST_COMPLETE", ++ /*AB0-AB7*/ "","","","PGOOD","","","","", ++ /*AC0-AC7*/ "","","","","","","",""; +}; + +&kcs3 { @@ -240,6 +244,8 @@ index 000000000000..432f10186547 + +&uart4 { + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <>; +}; + +&uart5 { @@ -263,6 +269,7 @@ index 000000000000..432f10186547 + +&i2c0 { + multi-master; ++ general-call; + status = "okay"; + + ipmb0@10 { @@ -323,6 +330,11 @@ index 000000000000..432f10186547 + status = "okay"; +}; + ++&i2c13 { ++ multi-master; ++ status = "okay"; ++}; ++ +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; @@ -375,19 +387,19 @@ index 000000000000..432f10186547 + +}; + -+//&timer { -+///* -+// * Available settings: -+// * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>; -+// * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default -+// * &pinctrl_timer7_default &pinctrl_timer8_default>; -+// */ -+// fttmr010,pwm-outputs = <5>; -+// pinctrl-names = "default"; -+// pinctrl-0 = <&pinctrl_timer5_default>; -+// #pwm-cells = <3>; -+// status = "okay"; -+//}; ++&timer { ++/* ++ * Available settings: ++ * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>; ++ * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default ++ * &pinctrl_timer7_default &pinctrl_timer8_default>; ++ */ ++ fttmr010,pwm-outputs = <5>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_timer5_default>; ++ #pwm-cells = <3>; ++ status = "okay"; ++}; + +&video { + status = "okay"; diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch deleted file mode 100644 index 7055ee575..000000000 --- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch +++ /dev/null @@ -1,63 +0,0 @@ -From d36b385e17eb21c305200048007d3cc6ad38f072 Mon Sep 17 00:00:00 2001 -From: Kuiying Wang <kuiying.wang@intel.com> -Date: Wed, 19 Sep 2018 17:51:06 +0800 -Subject: [PATCH] Define the gpio-line-names property for purley platform - -Based on aspeed AST-2500 Datasheet and Intel Purley platform spec, -defined following gpios. - -"name": "PGOOD", "pin": "AB3"; -"name": "POWER_BUTTON", "pin": "E2"; -"name": "POWER_UP_PIN", "pin": "E3"; -"name": "RESET_BUTTON", "pin": "E0"; -"name": "RESET_OUT", "pin": "E1"; -"name": "ID_BUTTON", "pin": "S6"; - -Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> ---- - arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 29 +++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - -diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts -index 144d59642a71..8aba46cdce46 100644 ---- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts -+++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts -@@ -117,6 +117,35 @@ - - &gpio { - status = "okay"; -+ gpio-line-names = "A0","A1","A2","A3","A4","A5","A6","A7", -+ "B0","B1","B2","B3","B4","B5","B6","B7", -+ "C0","C1","C2","C3","C4","C5","C6","C7", -+ "D0","D1","D2","D3","D4","D5","D6","D7", -+ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_UP_PIN","E4","E5","E6","E7", -+ "F0","F1","F2","F3","F4","F5","F6","F7", -+ "G0","G1","G2","G3","G4","G5","G6","G7", -+ "H0","H1","H2","H3","H4","H5","H6","H7", -+ "I0","I1","I2","I3","I4","I5","I6","I7", -+ "J0","J1","J2","J3","J4","J5","J6","J7", -+ "K0","E1","E2","E3","E4","E5","E6","E7", -+ "L0","L1","L2","L3","L4","L5","L6","L7", -+ "M0","M1","M2","M3","M4","M5","M6","M7", -+ "N0","N1","N2","N3","N4","N5","N6","N7", -+ "O0","O1","O2","O3","O4","O5","O6","O7", -+ "P0","P1","P2","P3","P4","P5","P6","P7", -+ "Q0","Q1","Q2","Q3","Q4","Q5","Q6","Q7", -+ "R0","R1","R2","R3","R4","R5","R6","R7", -+ "S0","S1","S2","S3","S4","S5","ID_BUTTON","S7", -+ "T0","T1","T2","T3","T4","T5","T6","T7", -+ "U0","U1","U2","U3","U4","U5","U6","U7", -+ "V0","V1","V2","V3","V4","V5","V6","V7", -+ "W0","W1","W2","W3","W4","W5","W6","W7", -+ "X0","X1","X2","X3","X4","X5","X6","X7", -+ "Y0","Y1","Y2","Y3","Y4","Y5","Y6","Y7", -+ "Z0","Z1","Z2","Z3","Z4","Z5","Z6","Z7", -+ "AA0","AA1","AA2","AA3","AA4","AA5","AA6","AA7", -+ "AB0","AB1","AB2","PGOOD","AB4","AB5","AB6","AB7", -+ "AC0","AC1","AC2","AC3","AC4","AC5","AC6","AC7"; - }; - - &kcs3 { --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch new file mode 100644 index 000000000..b05ad2502 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch @@ -0,0 +1,121 @@ +From 9537923d6e6a793cb2bf3c1daacd12562263bc0a Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Fri, 3 May 2019 16:12:39 -0700 +Subject: [PATCH] Enable pass-through on GPIOE1 and GPIOE3 free + +This change adds a gpio_disable_free() implementation that checks +if the GPIO being freed is GPIOE1 (33) or GPIOE3 (35) and will +re-enable the pass-through mux. + +Tested: +Requested GPIOs 33 and 35 and used devmem to check that pass-through +was disabled. Then freed them and checked that pass-through was +enabled again. + +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 1 + + drivers/pinctrl/aspeed/pinctrl-aspeed.c | 60 ++++++++++++++++++++++++++++++ + drivers/pinctrl/aspeed/pinctrl-aspeed.h | 3 ++ + 3 files changed, 64 insertions(+) + +diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +index 187abd7..beb0729 100644 +--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c ++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +@@ -2498,6 +2498,7 @@ static const struct pinmux_ops aspeed_g5_pinmux_ops = { + .get_function_groups = aspeed_pinmux_get_fn_groups, + .set_mux = aspeed_pinmux_set_mux, + .gpio_request_enable = aspeed_gpio_request_enable, ++ .gpio_disable_free = aspeed_gpio_disable_free, + .strict = true, + }; + +diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c +index eb87ab7..f06d752 100644 +--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c ++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c +@@ -538,6 +538,66 @@ int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev, + return aspeed_sig_expr_enable(expr, pdata->maps); + } + ++void aspeed_gpio_disable_free(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned int offset) ++{ ++ const struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); ++ const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data; ++ const struct aspeed_sig_expr ***prios, **funcs, *expr; ++ int ret; ++ ++ /* ++ * If we're freeing GPIOE1 (33) or GPIOE3 (35) then re-enable the ++ * pass-through mux setting; otherwise, do nothing. ++ */ ++ if (offset != 33 && offset != 35) ++ return; ++ ++ dev_dbg(pctldev->dev, ++ "Freeing pass-through pin %s (%d). Re-enabling pass-through.\n", ++ pdesc->name, offset); ++ ++ if (!pdesc) ++ return; ++ ++ prios = pdesc->prios; ++ ++ if (!prios) ++ return; ++ ++ /* Disable any functions of higher priority than GPIO just in case */ ++ while (funcs = *prios) { ++ if (aspeed_gpio_in_exprs(funcs)) ++ break; ++ ++ ret = aspeed_disable_sig(funcs, pdata->maps); ++ if (ret) ++ return; ++ ++ prios++; ++ } ++ ++ if (!funcs) { ++ char *signals = get_defined_signals(pdesc); ++ ++ pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n", ++ pdesc->name, offset, signals); ++ kfree(signals); ++ ++ return; ++ } ++ ++ /* ++ * Pass-through should be one priority higher than the GPIO function, ++ * so decrement our prios and enable that function ++ */ ++ prios--; ++ funcs = *prios; ++ expr = *funcs; ++ aspeed_sig_expr_enable(expr, pdata->maps); ++} ++ + int aspeed_pinctrl_probe(struct platform_device *pdev, + struct pinctrl_desc *pdesc, + struct aspeed_pinctrl_data *pdata) +diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h +index d4d7f03..0037b11 100644 +--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h ++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h +@@ -595,6 +595,9 @@ int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function, + int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset); ++void aspeed_gpio_disable_free(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned int offset); + int aspeed_pinctrl_probe(struct platform_device *pdev, + struct pinctrl_desc *pdesc, + struct aspeed_pinctrl_data *pdata); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch new file mode 100644 index 000000000..1d26b9667 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch @@ -0,0 +1,70 @@ +From d26dd7c4ef1a2cb88440420deccc54eb88129c60 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Mon, 6 May 2019 14:18:27 -0700 +Subject: [PATCH] Enable GPIOE0 and GPIOE2 pass-through by default + +This change sets the gpio DT pinctrl default configuration to +enable GPIOE0 and GPIOE2 pass-through. Since this causes +pinctrl_get_select_default() to be called automatically for +the gpio driver to claim the GPIO pins in those groups, we +also need to call pinctrl_put() to release claim on the +pass-through GPIOs so they can be requested at runtime. + +Tested: +Disabled pass-through in uboot and confirmed that after booting +Linux, pass-through is enabled and 'cat /sys/kernel/debug/pinctrl/ +1e6e2000.syscon\:pinctrl-aspeed-g5-pinctrl/pinmux-pins' shows that +the pass-through GPIOs are UNCLAIMED. + +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 4 ++++ + drivers/gpio/gpio-aspeed.c | 10 ++++++++++ + 2 files changed, 14 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts +index 45556ac..051e927 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts +@@ -124,6 +124,10 @@ + + &gpio { + status = "okay"; ++ /* Enable GPIOE0 and GPIOE2 pass-through by default */ ++ pinctrl-names = "pass-through"; ++ pinctrl-0 = <&pinctrl_gpie0_default ++ &pinctrl_gpie2_default>; + gpio-line-names = + /*A0-A8*/ "","","","","","","","", + /*B0-B8*/ "","","","","","","","", +diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c +index 2175070..f47d139 100644 +--- a/drivers/gpio/gpio-aspeed.c ++++ b/drivers/gpio/gpio-aspeed.c +@@ -1157,6 +1157,7 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) + const struct of_device_id *gpio_id; + struct aspeed_gpio *gpio; + struct resource *res; ++ struct pinctrl *pinctrl; + int rc, i, banks; + + gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); +@@ -1205,6 +1206,15 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) + return -ENOMEM; + + /* ++ * Select the pass-through pinctrl config to enable the pass-through ++ * mux for GPIOs E0 and E2. Then call pinctrl_put() to release claim ++ * of the GPIO pins, so they can be requested at runtime. ++ */ ++ pinctrl = pinctrl_get_select(&pdev->dev, "pass-through"); ++ if (pinctrl) ++ pinctrl_put(pinctrl); ++ ++ /* + * Populate it with initial values read from the HW and switch + * all command sources to the ARM by default + */ +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch deleted file mode 100644 index 2593ee8f6..000000000 --- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch +++ /dev/null @@ -1,46 +0,0 @@ -From c11a8ffcea24352579614d13d13ac4bda9a965cf Mon Sep 17 00:00:00 2001 -From: James Feist <james.feist@linux.intel.com> -Date: Mon, 5 Nov 2018 15:38:19 -0800 -Subject: [PATCH] Leave GPIOE in passthrough after boot - -This is a temporary patch that seems to leave exported -gpio in passthrough mode. It's hard to understand why this -works because all the macros are _very_ confusing, but -SIG_DESC_SET is equal to SIG_DESC_BIT(arg1, arg2, 1) so as -a test I used SIG_DESC_BIT set to 0 for SCU8C and I noticed -the correct result for exported gpios. As of today I'm unsure -why setting 0 results in the bit being 1 and vise versa, but -as this is only a short-term fix, I don't think we really care. -This is not a long term fix, but it was a quick and easy -change that can get us the correct result in the short term. - -Signed-off-by: James Feist <james.feist@linux.intel.com> ---- - drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -index 187abd7693cf..4230e1038a88 100644 ---- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -@@ -246,7 +246,7 @@ FUNC_GROUP_DECL(GPID6, G18, C21); - FUNC_GROUP_DECL(SD2, F19, E21, F20, D20, D21, E20, G18, C21); - - #define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 22) --#define GPIE0_DESC SIG_DESC_SET(SCU8C, 12) -+#define GPIE0_DESC SIG_DESC_BIT(SCU8C, 12, 0) - - #define B20 32 - SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16)); -@@ -266,7 +266,7 @@ FUNC_GROUP_DECL(NDCD3, C20); - - FUNC_GROUP_DECL(GPIE0, B20, C20); - --#define GPIE2_DESC SIG_DESC_SET(SCU8C, 13) -+#define GPIE2_DESC SIG_DESC_BIT(SCU8C, 13, 0) - - #define F18 34 - SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18)); --- -2.7.4 - diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend index 7a386c848..782fc6532 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend +++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -1,8 +1,8 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/linux-aspeed:" SRC_URI += "file://wolfpass.cfg \ - file://0001-Create-intel-purley-dts.patch \ - file://0002-Define-the-gpio-line-names-property-for-purley-platform.patch \ - file://0003-Leave-GPIOE-in-passthrough-after-boot.patch \ + file://0001-arm-dts-add-DTS-for-Intel-platforms.patch \ + file://0002-Enable-pass-through-on-GPIOE1-and-GPIOE3-free.patch \ + file://0003-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch \ file://0004-Test-code-for-LPC-MBOX.patch \ " SRC_URI += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'file://0005-128MB-flashmap-for-PFR.patch', '', d)}" diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json index 48cb80795..474dc0565 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json @@ -1,6 +1,826 @@ { "Exposes": [ { + "Index": 0, + "Name": "P12V_PSU_RIGHT", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 1, + "Name": "P3V3", + "PowerState": "On", + "ScaleFactor": 0.4107, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.647 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.541 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 3.066 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.974 + } + ], + "Type": "ADC" + }, + { + "Index": 2, + "Name": "PVNN_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.081 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.049 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.807 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.783 + } + ], + "Type": "ADC" + }, + { + "Index": 3, + "Name": "P105_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.139 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.106 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.995 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.966 + } + ], + "Type": "ADC" + }, + { + "Index": 4, + "Name": "P12V_PSU_LEFT", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 5, + "Name": "P12V_AUX", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 6, + "Name": "P1V8_PCH", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.961 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.904 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.699 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.648 + } + ], + "Type": "ADC" + }, + { + "Index": 7, + "Name": "P3VBAT", + "ScaleFactor": 0.3333, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.296 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2.457 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.138 + } + ], + "Type": "ADC" + }, + { + "Index": 8, + "Name": "PVCCIN_CPU0", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "Index": 9, + "Name": "PVCCIN_CPU1", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "Index": 10, + "Name": "PVDQ_ABCD_CPU0", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "Index": 11, + "Name": "PVDQ_EFGH_CPU0", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "Index": 12, + "Name": "PVDQ_ABCD_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "Index": 13, + "Name": "PVDQ_EFGH_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "Index": 14, + "Name": "PVCCIO_CPU0", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "Index": 15, + "Name": "PVCCIO_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "BindGpioIntrusion": "Chassis Intrusion GPIO", + "Class": "Gpio", + "Name": "Chassis Intrusion Sensor", + "Type": "ChassisIntrusionSensor" + }, + { + "Direction": "In", + "Index": 0, + "Name": "Board REV ID0", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 3, + "Name": "Board REV ID1", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 8, + "Name": "Board SKU ID0", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 9, + "Name": "Board SKU ID1", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 10, + "Name": "Board SKU ID2", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 11, + "Name": "Board SKU ID3", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 12, + "Name": "Board SKU ID4", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 18, + "Name": "OCP3 PRSNTB0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 19, + "Name": "OCP3 PRSNTB1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 20, + "Name": "OCP3 PRSNTB2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 21, + "Name": "OCP3 PRSNTB3", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 24, + "Name": "Force BMC Update", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 26, + "Name": "OCP PWRGD Aux", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 42, + "Name": "CPU1 Memhot", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 43, + "Name": "CPU2 Memhot", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 44, + "Name": "Cpu Err0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 45, + "Name": "Cpu Err1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 46, + "Name": "Platform Reset", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 47, + "Name": "CPU PRDY", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 48, + "Name": "Cpu Err2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 49, + "Name": "Cpu Caterr", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 50, + "Name": "PCH Thermaltrip", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 51, + "Name": "Board REV ID2", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 52, + "Name": "NMI Event", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 53, + "Name": "Board SKU ID5", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 56, + "Name": "Rise1 PWRGD", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 57, + "Name": "Rise2 PWRGD", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 61, + "Name": "Rise3 PWRGD", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "In", + "Index": 62, + "Name": "Rise4 PWRGD", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 63, + "Name": "240VA OC", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 64, + "Name": "SYS FAN0 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 65, + "Name": "SYS FAN1 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 66, + "Name": "SYS FAN2 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 67, + "Name": "SYS FAN3 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 68, + "Name": "SASM ROC ID0", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 69, + "Name": "SASM ROC ID1", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 70, + "Name": "Midplane Switch ID0", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 71, + "Name": "Midplane Switch ID1", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 137, + "Name": "PCA9555 Intr", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 138, + "Name": "SYS FAN4 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 139, + "Name": "SYS FAN5 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 140, + "Name": "SYS FAN6 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 141, + "Name": "SYS FAN7 PRSNT", + "Polarity": "Low", + "Type": "Gpio" + }, + { "Direction": "Input", "Index": 143, "Name": "Chassis Intrusion GPIO", @@ -8,19 +828,542 @@ "Type": "Gpio" }, { - "BindGpioIntrusion": "Chassis Intrusion GPIO", - "Class": "Gpio", - "Name": "Chassis Intrusion Sensor", - "Type": "ChassisIntrusionSensor" + "Direction": "Input", + "Index": 144, + "Name": "Remote Debug Enable", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 146, + "Name": "RSMRST", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 214, + "Name": "SMI Active", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 215, + "Name": "Post complete", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 217, + "Name": "Nmi Button", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 218, + "Name": "ID Button", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 219, + "Name": "Power Good", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 232, + "Name": "CPU1 Present", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 233, + "Name": "CPU1 Thermaltrip", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 234, + "Name": "CPU1 VR Hot", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 235, + "Name": "CPU1 FIVR Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 236, + "Name": "CPU1 Mem VR Hot1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 237, + "Name": "CPU1 Mem VR Hot2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 238, + "Name": "CPU1 ID0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 239, + "Name": "CPU1 ID1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 240, + "Name": "CPU1 Mismatch", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 241, + "Name": "CPU1 DIMM Thermaltrip", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 242, + "Name": "CPU2 Present", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 243, + "Name": "CPU2 Thermaltrip", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 244, + "Name": "CPU2 VR Hot", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 245, + "Name": "CPU2 FIVR Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 246, + "Name": "CPU2 Mem VR Hot1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 247, + "Name": "CPU1 Mem VR Hot2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 248, + "Name": "CPU2 ID0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 249, + "Name": "CPU2 ID1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 250, + "Name": "CPU2 Mismatch", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 251, + "Name": "CPU2 DIMM Thermaltrip", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 272, + "Name": "PLD Minor Revison Bit 0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 273, + "Name": "PLD Minor Revison Bit 1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 274, + "Name": "PLD Minor Revison Bit 2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 275, + "Name": "PLD Minor Revison Bit 3", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 276, + "Name": "PLD Minor Revison Bit 4", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 277, + "Name": "PLD Minor Revison Bit 5", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 278, + "Name": "PLD Minor Revison Bit 6", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 279, + "Name": "PLD Minor Revison Bit 7", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 280, + "Name": "Main PLD Major Revison Bit 0", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 281, + "Name": "Main PLD Major Revison Bit 1", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 282, + "Name": "Main PLD Major Revison Bit 2", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 283, + "Name": "Main PLD Major Revison Bit 3", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 284, + "Name": "Main PLD Major Revison Bit 4", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 285, + "Name": "Main PLD Major Revison Bit 5", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 286, + "Name": "Main PLD Major Revison Bit 6", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 287, + "Name": "Main PLD Major Revison Bit 7", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 289, + "Name": "Memory Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 290, + "Name": "CPU Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 291, + "Name": "P3V3 Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 292, + "Name": "PSU Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 295, + "Name": "PCH Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Address": "0x4D", + "Bus": 6, + "Name": "CPU0 VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP421" + }, + { + "Address": "0x4F", + "Bus": 6, + "Name": "CPU1 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP421" + }, + { + "Address": "0x4A", + "Bus": 6, + "Name": "BMC Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4B", + "Bus": 6, + "Name": "RightRear Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4E", + "Bus": 6, + "Name": "LeftRear Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4C", + "Bus": 6, + "Name": "PCH DS Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" } ], "Name": "CYP Baseboard", "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*CYP'})", "Type": "Board", + "ProductId": 152, "xyz.openbmc_project.Inventory.Decorator.Asset": { "Manufacturer": "$PRODUCT_MANUFACTURER", "Model": "$PRODUCT_PRODUCT_NAME", "PartNumber": "$PRODUCT_PART_NUMBER", "SerialNumber": "$PRODUCT_SERIAL_NUMBER" } -}
\ No newline at end of file +} diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json index be0d583a6..22f8b1c6d 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json @@ -2,6 +2,18 @@ { "Exposes": [ { + "Address": "$address", + "Bus": "$bus", + "Name": "FCXXPDBASSMBL Fru", + "Type": "24C01" + }, + { + "Address": "0x18", + "Bus": "$bus", + "Name": "Multi Node Presence Detector", + "Type": "MultiNode" + }, + { "Address": "0x48", "Bus": "$bus", "Name": "PDB Temp1", @@ -64,18 +76,6 @@ } ], "Type": "TMP75" - }, - { - "Address": "0x18", - "Bus": "$bus", - "Name": "Multi Node Presence Detector", - "Type": "MultiNode" - }, - { - "Address": "$address", - "Bus": "$bus", - "Name": "FCXXPDBASSMBL Fru", - "Type": "24C01" } ], "Name": "FCXXPDBASSMBL PDB", diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json new file mode 100644 index 000000000..53edbfe87 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json @@ -0,0 +1,104 @@ +[ + { + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "Midplane 1 Fru", + "Type": "EEPROM" + }, + { + "Address": "0x4E", + "Bus": "$bus", + "Name": "Midplane 1 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "Midplane 1", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U2X12SWITCH', 'ADDRESS' : 86})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } + }, + { + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "Midplane 2 Fru", + "Type": "EEPROM" + }, + { + "Address": "0x4F", + "Bus": "$bus", + "Name": "Midplane 2 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "Midplane 2", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U2X12SWITCH', 'ADDRESS' : 87})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } + } +]
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json index 44590788d..6a1696432 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json @@ -1,38 +1,6 @@ { "Exposes": [ { - "Address": "0x4A", - "Bus": 6, - "Name": "BMC Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { "Index": 0, "Name": "Baseboard 12 Volt", "PowerState": "On", @@ -66,56 +34,6 @@ "Type": "ADC" }, { - "Name": "CPU 1 Fan Connector", - "Pwm": 7, - "Status": "disabled", - "Tachs": [ - 13 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "CPU 2 Fan Connector", - "Pwm": 8, - "Status": "disabled", - "Tachs": [ - 14 - ], - "Type": "IntelFanConnector" - }, - { - "Address": "0x49", - "Bus": 6, - "Name": "Left Rear Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { "Index": 4, "Name": "P0V83_LAN_AUX", "Thresholds": [ @@ -596,177 +514,6 @@ "Type": "ADC" }, { - "Address": "0x4D", - "Bus": 6, - "Name": "Right Rear Board Temp", - "Name1": "Right Rear TMP421 Internal Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP421" - }, - { - "Address": "0x48", - "Bus": 6, - "Name": "Voltage Regulator 1 Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { - "Address": "0x4B", - "Bus": 6, - "Name": "Voltage Regulator 2 Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { - "Address": "0x30", - "Bus": 0, - "CpuID": 1, - "Name": "Skylake CPU 1", - "Thresholds": [ - { - "Direction": "greater than", - "Label": "DIMM", - "Name": "upper critical", - "Severity": 1, - "Value": 99 - }, - { - "Direction": "greater than", - "Label": "DIMM", - "Name": "upper non critical", - "Severity": 0, - "Value": 89 - } - ], - "Type": "SkylakeCPU" - }, - { - "Address": "0x31", - "Bus": 0, - "CpuID": 2, - "Name": "Skylake CPU 2", - "Thresholds": [ - { - "Direction": "greater than", - "Label": "DIMM", - "Name": "upper critical", - "Severity": 1, - "Value": 99 - }, - { - "Direction": "greater than", - "Label": "DIMM", - "Name": "upper non critical", - "Severity": 0, - "Value": 89 - } - ], - "Type": "SkylakeCPU" - }, - { - "Direction": "Input", - "Index": 32, - "Name": "Reset Button", - "Polarity": "Low", - "Type": "Gpio" - }, - { - "Direction": "Out", - "Index": 33, - "Name": "Reset Out", - "Polarity": "Low", - "Type": "Gpio" - }, - { - "Direction": "Both", - "Index": 34, - "Name": "Power Button", - "Polarity": "Low", - "Type": "Gpio" - }, - { - "Direction": "Both", - "Index": 35, - "Name": "Power Up", - "Polarity": "Low", - "Type": "Gpio" - }, - { "Direction": "Input", "Index": 40, "Name": "NMI Out", @@ -1600,6 +1347,38 @@ "Type": "Gpio" }, { + "Direction": "Input", + "Index": 27, + "Name": "Node ID GPIO 0", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 26, + "Name": "Node ID GPIO 1", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Name": "CPU 1 Fan Connector", + "Pwm": 7, + "Status": "disabled", + "Tachs": [ + 13 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "CPU 2 Fan Connector", + "Pwm": 8, + "Status": "disabled", + "Tachs": [ + 14 + ], + "Type": "IntelFanConnector" + }, + { "Address": "0x8", "Class": "METemp", "Name": "SSB Temp", @@ -1921,6 +1700,16 @@ "Type": "IpmbSensor" }, { + "BindGpioNodeID": "Node ID GPIO 0", + "Name": "Multi Node ID 0", + "Type": "MultiNode" + }, + { + "BindGpioNodeID": "Node ID GPIO 1", + "Name": "Multi Node ID 1", + "Type": "MultiNode" + }, + { "Address": "0x71", "Bus": 2, "ChannelNames": [ @@ -1933,37 +1722,124 @@ "Type": "PCA9543Mux" }, { - "Direction": "Input", - "Index": 27, - "Name": "Node ID GPIO 0", - "Polarity": "High", - "Type": "Gpio" + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "Xeon CPU 1", + "Thresholds": [ + { + "Direction": "greater than", + "Label": "DIMM", + "Name": "upper critical", + "Severity": 1, + "Value": 99 + }, + { + "Direction": "greater than", + "Label": "DIMM", + "Name": "upper non critical", + "Severity": 0, + "Value": 89 + } + ], + "Type": "XeonCPU" }, { - "Direction": "Input", - "Index": 26, - "Name": "Node ID GPIO 1", - "Polarity": "High", - "Type": "Gpio" + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "Xeon CPU 2", + "Thresholds": [ + { + "Direction": "greater than", + "Label": "DIMM", + "Name": "upper critical", + "Severity": 1, + "Value": 99 + }, + { + "Direction": "greater than", + "Label": "DIMM", + "Name": "upper non critical", + "Severity": 0, + "Value": 89 + } + ], + "Type": "XeonCPU" }, { - "BindGpioNodeID": "Node ID GPIO 0", - "Name": "Multi Node ID 0", - "Type": "MultiNode" + "Address": "0x4E", + "Bus": 6, + "Name": "Exit Air Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" }, { - "BindGpioNodeID": "Node ID GPIO 1", - "Name": "Multi Node ID 1", - "Type": "MultiNode" + "Address": "0x4B", + "Bus": 6, + "Name": "Inlet Air Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" } ], "Name": "TNP Baseboard", "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})", "Type": "Board", + "ProductId": 153, "xyz.openbmc_project.Inventory.Decorator.Asset": { "Manufacturer": "$PRODUCT_MANUFACTURER", "Model": "$PRODUCT_PRODUCT_NAME", "PartNumber": "$PRODUCT_PART_NUMBER", "SerialNumber": "$PRODUCT_SERIAL_NUMBER" } -}
\ No newline at end of file +} diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json index 7c58d6bb0..c88e50676 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json @@ -1,110 +1,6 @@ { "Exposes": [ { - "Name": "System Fan connector 1", - "Pwm": 0, - "Tachs": [ - 0, - 1 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 2", - "Pwm": 1, - "Tachs": [ - 2, - 3 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 3", - "Pwm": 2, - "Tachs": [ - 4, - 5 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 4", - "Pwm": 3, - "Tachs": [ - 6, - 7 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 5", - "Pwm": 4, - "Tachs": [ - 8, - 9 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 6", - "Pwm": 5, - "Tachs": [ - 10, - 11 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 7", - "Pwm": 6, - "Tachs": [ - 12, - 13 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 8", - "Pwm": 7, - "Tachs": [ - 14, - 15 - ], - "Type": "IntelFanConnector" - }, - { - "Address": "0x4A", - "Bus": 6, - "Name": "BMC Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { "Index": 0, "Name": "A_P12V_PSU_SCALED", "PowerState": "On", @@ -618,21 +514,148 @@ "Type": "ADC" }, { - "Address": "0x4B", - "Bus": 6, - "Name": "Right Rear Board Temp", + "BindConnector": "System Fan connector 1", + "Index": 0, + "Name": "Fan 1a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 1", + "Index": 1, + "Name": "Fan 1b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 2, + "Name": "Fan 2a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 3, + "Name": "Fan 2b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 4, + "Name": "Fan 3a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 5, + "Name": "Fan 3b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 6, + "Name": "Fan 4a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 7, + "Name": "Fan 4b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 8, + "Name": "Fan 5a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 9, + "Name": "Fan 5b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "Name": "Fan 6a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 11, + "Name": "Fan 6b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "Name": "Fan 7a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 13, + "Name": "Fan 7b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 14, + "Name": "Fan 8a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 15, + "Name": "Fan 8b", + "Type": "AspeedFan" + }, + { + "C1": 92.16, + "C2": 107.52, + "MaxCFM": 17.5, + "Name": "System Airflow", + "TachMaxPercent": 100, + "TachMinPercent": 20, + "Tachs": [ + "Fan 1a", + "Fan 1b", + "Fan 2a", + "Fan 2b", + "Fan 3a", + "Fan 3b", + "Fan 4a", + "Fan 4b", + "Fan 5a", + "Fan 5b", + "Fan 6a", + "Fan 6b", + "Fan 7a", + "Fan 7b", + "Fan 8a", + "Fan 8b" + ], + "Type": "CFMSensor" + }, + { + "AlphaF": 4.352, + "AlphaS": 0.512, + "Name": "Exit Air Temp", + "PowerFactorMax": 1.0, + "PowerFactorMin": 0.4, + "QMax": 88, + "QMin": 15, "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 85 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 80 }, { "Direction": "less than", @@ -647,24 +670,158 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "ExitAirTempSensor" }, { - "Address": "0x49", - "Bus": 6, - "Name": "Left Rear Board Temp", + "AllowedFailures": 1, + "Name": "FanRedundancy", + "Type": "FanRedundancy" + }, + { + "Direction": "Input", + "Index": 40, + "Name": "NMI Input", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 48, + "Name": "CPU ERR2", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 49, + "Name": "CPU CATERR", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 214, + "Name": "SMI Input", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 215, + "Name": "Post Complete", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 217, + "Name": "Nmi Button", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 218, + "Name": "ID Button", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 219, + "Name": "Power Good", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Name": "System Fan connector 1", + "Pwm": 0, + "Tachs": [ + 0, + 1 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 2", + "Pwm": 1, + "Tachs": [ + 2, + 3 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 3", + "Pwm": 2, + "Tachs": [ + 4, + 5 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 4", + "Pwm": 3, + "Tachs": [ + 6, + 7 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 5", + "Pwm": 4, + "Tachs": [ + 8, + 9 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 6", + "Pwm": 5, + "Tachs": [ + 10, + 11 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 7", + "Pwm": 6, + "Tachs": [ + 12, + 13 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 8", + "Pwm": 7, + "Tachs": [ + 14, + 15 + ], + "Type": "IntelFanConnector" + }, + { + "Address": "0x8", + "Class": "METemp", + "Name": "SSB Temp", + "PowerState": "BiosPost", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 103 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 98 }, { "Direction": "less than", @@ -679,12 +836,12 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x48", - "Bus": 6, - "Name": "PCH M.2 Temp", + "Address": "0xC4", + "Class": "MpsBridgeTemp", + "Name": "CPU1 P12V PVCCIN VR Temp", "Thresholds": [ { "Direction": "greater than", @@ -711,12 +868,12 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x4f", - "Bus": 6, - "Name": "Inlet BRD Temp", + "Address": "0xB4", + "Class": "PxeBridgeTemp", + "Name": "CPU1 P12V PVCCIO VR Temp", "Thresholds": [ { "Direction": "greater than", @@ -743,190 +900,351 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x30", - "Bus": 0, - "CpuID": 1, - "Name": "Skylake CPU 1", + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem ABCD Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 99, - "label": "DIMM" + "Value": 115 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 89, - "label": "DIMM" + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 } ], - "Type": "SkylakeCPU" + "Type": "IpmbSensor" }, { - "Address": "0x31", - "Bus": 0, - "CpuID": 2, - "Name": "Skylake CPU 2", + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem EFGH Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 99, - "label": "DIMM" + "Value": 115 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 89, - "label": "DIMM" + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 } ], - "Type": "SkylakeCPU" - }, - { - "BindConnector": "System Fan connector 1", - "Index": 0, - "Name": "Fan 1a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 1", - "Index": 1, - "Name": "Fan 1b", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 2", - "Index": 2, - "Name": "Fan 2a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 2", - "Index": 3, - "Name": "Fan 2b", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 3", - "Index": 4, - "Name": "Fan 3a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 3", - "Index": 5, - "Name": "Fan 3b", - "Type": "AspeedFan" + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 4", - "Index": 6, - "Name": "Fan 4a", - "Type": "AspeedFan" + "Address": "0x4A", + "Class": "IRBridgeTemp", + "Name": "CPU1 VR P1V8", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 4", - "Index": 7, - "Name": "Fan 4b", - "Type": "AspeedFan" + "Address": "0xCC", + "Class": "MpsBridgeTemp", + "Name": "CPU2 P12V PVCCIN VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 5", - "Index": 8, - "Name": "Fan 5a", - "Type": "AspeedFan" + "Address": "0xD4", + "Class": "PxeBridgeTemp", + "Name": "CPU2 P12V PVCCIO VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 5", - "Index": 9, - "Name": "Fan 5b", - "Type": "AspeedFan" + "Address": "0xB0", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem ABCD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 6", - "Index": 10, - "Name": "Fan 6a", - "Type": "AspeedFan" + "Address": "0xEC", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem EFGH Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 6", - "Index": 11, - "Name": "Fan 6b", - "Type": "AspeedFan" + "Address": "0x4C", + "Class": "IRBridgeTemp", + "Name": "CPU2 VR P1V8", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 7", - "Index": 12, - "Name": "Fan 7a", - "Type": "AspeedFan" + "Address": "0x71", + "Bus": 2, + "ChannelNames": [ + "M2Slot1", + "M2Slot2" + ], + "Name": "M2 Mux", + "Type": "PCA9543Mux" }, { - "BindConnector": "System Fan connector 7", - "Index": 13, - "Name": "Fan 7b", - "Type": "AspeedFan" + "Address": "0x72", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "", + "FruChannel" + ], + "Name": "Riser 1 Mux", + "Type": "PCA9545Mux" }, { - "BindConnector": "System Fan connector 8", - "Index": 14, - "Name": "Fan 8a", - "Type": "AspeedFan" + "Address": "0x73", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "", + "FruChannel" + ], + "Name": "Riser 2 Mux", + "Type": "PCA9545Mux" }, { - "BindConnector": "System Fan connector 8", - "Index": 15, - "Name": "Fan 8b", - "Type": "AspeedFan" + "Address": "0x73", + "Bus": 9, + "ChannelNames": [ + "MemoryChannel1", + "MemoryChannel2", + "MemoryChannel3", + "MemoryChannel4" + ], + "Name": "Memory Mux", + "Type": "PCA9545Mux" }, { - "AlphaF": 4.352, - "AlphaS": 0.512, - "Name": "Exit Air Temp", - "PowerFactorMax": 10, - "PowerFactorMin": 4, - "QMax": 88, - "QMin": 15, - "Type": "ExitAirTempSensor" + "Address": "0x74", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "PcieSlot3", + "PcieSlot4" + ], + "Name": "PCIE Mux", + "Type": "PCA9546Mux" }, { - "C1": 92.16, - "C2": 107.52, - "MaxCFM": 17.5, - "Name": "System Airflow", - "TachMaxPercent": 100, - "TachMinPercent": 20, - "Tachs": [ - "Fan 1a", - "Fan 1b", - "Fan 2a", - "Fan 2b", - "Fan 3a", - "Fan 3b", - "Fan 4a", - "Fan 4b", - "Fan 5a", - "Fan 5b", - "Fan 6a", - "Fan 6b", - "Fan 7a", - "Fan 7b", - "Fan 8a", - "Fan 8b" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Exit Air Temp" ], - "Type": "CFMSensor" + "Name": "Exit Air Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -936,7 +1254,7 @@ "Fan 1b" ], "Name": "Fan 1", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -953,7 +1271,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -963,7 +1281,7 @@ "Fan 2b" ], "Name": "Fan 2", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -980,7 +1298,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -990,7 +1308,7 @@ "Fan 3b" ], "Name": "Fan 3", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1007,7 +1325,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1017,7 +1335,7 @@ "Fan 4b" ], "Name": "Fan 4", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1034,7 +1352,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1044,7 +1362,7 @@ "Fan 5b" ], "Name": "Fan 5", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1061,7 +1379,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1071,7 +1389,7 @@ "Fan 6b" ], "Name": "Fan 6", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1088,7 +1406,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1098,7 +1416,7 @@ "Fan 7b" ], "Name": "Fan 7", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1115,7 +1433,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1125,7 +1443,7 @@ "Fan 8b" ], "Name": "Fan 8", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1141,40 +1459,74 @@ ] }, { - "FailSafePercent": 100, - "MinThermalOutput": 30, - "Name": "Left", - "Type": "Pid.Zone" - }, - { - "FailSafePercent": 100, - "MinThermalOutput": 30, - "Name": "Right", - "Type": "Pid.Zone" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "BMC Temp" + ], + "Name": "BMC Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "AllowedFailures": 1, - "Name": "FanRedundancy", - "Type": "FanRedundancy" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [ABC]\\d+ CPU1" + ], + "Name": "CPU1 DIMM ABC", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "temp", "FFGainCoefficient": 0.0, "FFOffCoefficient": 0.0, - "ICoefficient": -0.2, + "ICoefficient": -1.0, "ILimitMax": 100, "ILimitMin": 30, "Inputs": [ - "Core \\d+ CPU1" + "DIMM [DEF]\\d+ CPU1" ], - "Name": "CPU1", - "NegativeHysteresis": 2.0, + "Name": "CPU1 DIMM DEF", + "NegativeHysteresis": 5.0, "OutLimitMax": 100, "OutLimitMin": 30, "Outputs": [], - "PCoefficient": -3.0, + "PCoefficient": -0.15, "PositiveHysteresis": 0.0, - "SetPoint": 45.0, + "SetPoint": 60.0, "SlewNeg": -1, "SlewPos": 0.0, "Type": "Pid", @@ -1186,110 +1538,275 @@ "Class": "temp", "FFGainCoefficient": 0.0, "FFOffCoefficient": 0.0, - "ICoefficient": -0.2, + "ICoefficient": -1.0, "ILimitMax": 100, "ILimitMin": 30, "Inputs": [ - "Core \\d+ CPU2" + "DIMM [ABC]\\d+ CPU2" ], - "Name": "CPU2", - "NegativeHysteresis": 2.0, + "Name": "CPU2 DIMM ABC", + "NegativeHysteresis": 5.0, "OutLimitMax": 100, "OutLimitMin": 30, "Outputs": [], - "PCoefficient": -3.0, + "PCoefficient": -0.15, "PositiveHysteresis": 0.0, - "SetPoint": 45.0, + "SetPoint": 60.0, "SlewNeg": -1, "SlewPos": 0.0, "Type": "Pid", "Zones": [ - "Right" + "Right", + "PSU" ] }, { - "Direction": "Input", - "Index": 32, - "Name": "Reset Button", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [DEF]\\d+ CPU2" + ], + "Name": "CPU2 DIMM DEF", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Out", - "Index": 33, - "Name": "Reset Out", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU1" + ], + "Name": "DTS CPU1", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 34, - "Name": "Power Button", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU2" + ], + "Name": "DTS CPU2", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] }, { - "Direction": "Out", - "Index": 35, - "Name": "Power Up", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Left Rear Temp" + ], + "Name": "Left Rear Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Input", - "Index": 40, - "Name": "NMI Input", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Right Rear Board" + ], + "Name": "Right Rear Board", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 48, - "Name": "CPU ERR2", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "SSB Temp" + ], + "Name": "SSB Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Input", - "Index": 49, - "Name": "CPU CATERR", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "VR 1 Temp" + ], + "Name": "VR 1 Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 214, - "Name": "SMI Input", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "VR 2 Temp" + ], + "Name": "VR 2 Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] }, { - "Direction": "Input", - "Index": 215, - "Name": "Post Complete", - "Polarity": "Low", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Left", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 217, - "Name": "Nmi Button", - "Polarity": "High", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Right", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 218, - "Name": "ID Button", - "Polarity": "Low", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "PSU", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 219, - "Name": "Power Good", - "Polarity": "High", - "Type": "Gpio" + "Class": "Ceiling", + "Inputs": [ + "Front Panel Temp" + ], + "Name": "Front Panel UCC", + "NegativeHysteresis": 2, + "Output": [ + 70.0, + 80.0 + ], + "PositiveHysteresis": 0, + "Profiles": [ + "Acoustic" + ], + "Reading": [ + 22.0, + 32.0 + ], + "Type": "Stepwise", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "Floor", @@ -1314,138 +1831,9 @@ ] }, { - "Address": "0x8", - "Class": "METemp", - "Name": "SSB Temp", - "PowerState": "BiosPost", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 103 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 98 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xC4", - "Class": "MpsBridgeTemp", - "Name": "CPU1 P12V PVCCIN VR Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xB4", - "Class": "PxeBridgeTemp", - "Name": "CPU1 P12V PVCCIO VR Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xDC", - "Class": "PxeBridgeTemp", - "Name": "CPU1 VR Mem ABCD Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xDC", - "Class": "PxeBridgeTemp", - "Name": "CPU1 VR Mem EFGH Temp", + "Address": "0x4A", + "Bus": 6, + "Name": "BMC Temp", "Thresholds": [ { "Direction": "greater than", @@ -1472,12 +1860,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0x4A", - "Class": "IRBridgeTemp", - "Name": "CPU1 VR P1V8", + "Address": "0x4B", + "Bus": 6, + "Name": "Right Rear Board Temp", "Thresholds": [ { "Direction": "greater than", @@ -1504,12 +1892,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xCC", - "Class": "MpsBridgeTemp", - "Name": "CPU2 P12V PVCCIN VR Temp", + "Address": "0x49", + "Bus": 6, + "Name": "Left Rear Board Temp", "Thresholds": [ { "Direction": "greater than", @@ -1536,12 +1924,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xD4", - "Class": "PxeBridgeTemp", - "Name": "CPU2 P12V PVCCIO VR Temp", + "Address": "0x48", + "Bus": 6, + "Name": "PCH M.2 Temp", "Thresholds": [ { "Direction": "greater than", @@ -1568,12 +1956,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xB0", - "Class": "PxeBridgeTemp", - "Name": "CPU2 VR Mem ABCD Temp", + "Address": "0x4f", + "Bus": 6, + "Name": "Inlet BRD Temp", "Thresholds": [ { "Direction": "greater than", @@ -1600,24 +1988,24 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xEC", - "Class": "PxeBridgeTemp", - "Name": "CPU2 VR Mem EFGH Temp", + "Address": "0x4D", + "Bus": "0x1", + "Name": "Front Panel Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 55 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 50 }, { "Direction": "less than", @@ -1632,170 +2020,58 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0x4C", - "Class": "IRBridgeTemp", - "Name": "CPU2 VR P1V8", + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "Xeon CPU 1", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 99, + "label": "DIMM" }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 + "Value": 89, + "label": "DIMM" } ], - "Type": "IpmbSensor" + "Type": "XeonCPU" }, { - "Address": "0x4D", - "Bus": "0x1", - "Name": "Front Panel Temp", + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "Xeon CPU 2", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 55 + "Value": 99, + "label": "DIMM" }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 50 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 + "Value": 89, + "label": "DIMM" } ], - "Type": "TMP75" - }, - { - "Address": "0x71", - "Bus": 2, - "ChannelNames": [ - "M2Slot1", - "M2Slot2" - ], - "Name": "M2 Mux", - "Type": "PCA9543Mux" - }, - { - "Address": "0x72", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "", - "FruChannel" - ], - "Name": "Riser 1 Mux", - "Type": "PCA9545Mux" - }, - { - "Address": "0x73", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "", - "FruChannel" - ], - "Name": "Riser 2 Mux", - "Type": "PCA9545Mux" - }, - { - "Address": "0x74", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "PcieSlot3", - "PcieSlot4" - ], - "Name": "PCIE Mux", - "Type": "PCA9546Mux" - }, - { - "Address": "0x73", - "Bus": 9, - "ChannelNames": [ - "MemoryChannel1", - "MemoryChannel2", - "MemoryChannel3", - "MemoryChannel4" - ], - "Name": "Memory Mux", - "Type": "PCA9545Mux" - }, - { - "Class": "Ceiling", - "Inputs": [ - "Front Panel Temp" - ], - "Name": "Front Panel UCC", - "NegativeHysteresis": 2, - "Output": [ - 70.0, - 80.0 - ], - "PositiveHysteresis": 0, - "Reading": [ - 22.0, - 32.0 - ], - "Type": "Stepwise", - "Zones": [ - "Left", - "Right" - ] - }, - { - "Controllers": [ - ".*" - ], - "Name": "Acoustic", - "Type": "FanProfile" - }, - { - "Controllers": [ - "Front Panel LCC", - "CPU\\d" - ], - "Name": "Performance", - "Type": "FanProfile" + "Type": "XeonCPU" } ], "Name": "WC Baseboard", "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*WC'})", + "ProductId": 145, "Type": "Board", "xyz.openbmc_project.Inventory.Decorator.Asset": { "Manufacturer": "$PRODUCT_MANUFACTURER", @@ -1803,4 +2079,4 @@ "PartNumber": "$PRODUCT_PART_NUMBER", "SerialNumber": "$PRODUCT_SERIAL_NUMBER" } -}
\ No newline at end of file +} diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json index e1e877892..fc851f200 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json @@ -1,110 +1,6 @@ { "Exposes": [ { - "Name": "System Fan connector 1", - "Pwm": 0, - "Tachs": [ - 0, - 1 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 2", - "Pwm": 1, - "Tachs": [ - 2, - 3 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 3", - "Pwm": 2, - "Tachs": [ - 4, - 5 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 4", - "Pwm": 3, - "Tachs": [ - 6, - 7 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 5", - "Pwm": 4, - "Tachs": [ - 8, - 9 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 6", - "Pwm": 5, - "Tachs": [ - 10, - 11 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 7", - "Pwm": 6, - "Tachs": [ - 12, - 13 - ], - "Type": "IntelFanConnector" - }, - { - "Name": "System Fan connector 8", - "Pwm": 7, - "Tachs": [ - 14, - 15 - ], - "Type": "IntelFanConnector" - }, - { - "Address": "0x4A", - "Bus": 6, - "Name": "BMC Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "TMP75" - }, - { "Index": 0, "Name": "A_P12V_PSU_SCALED", "PowerState": "On", @@ -618,21 +514,148 @@ "Type": "ADC" }, { - "Address": "0x4B", - "Bus": 6, - "Name": "Right Rear Board Temp", + "BindConnector": "System Fan connector 1", + "Index": 0, + "Name": "Fan 1a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 1", + "Index": 1, + "Name": "Fan 1b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 2, + "Name": "Fan 2a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 3, + "Name": "Fan 2b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 4, + "Name": "Fan 3a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 5, + "Name": "Fan 3b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 6, + "Name": "Fan 4a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 7, + "Name": "Fan 4b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 8, + "Name": "Fan 5a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 9, + "Name": "Fan 5b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "Name": "Fan 6a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 11, + "Name": "Fan 6b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "Name": "Fan 7a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 13, + "Name": "Fan 7b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 14, + "Name": "Fan 8a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 15, + "Name": "Fan 8b", + "Type": "AspeedFan" + }, + { + "C1": 92.16, + "C2": 107.52, + "MaxCFM": 17.5, + "Name": "System Airflow", + "TachMaxPercent": 100, + "TachMinPercent": 20, + "Tachs": [ + "Fan 1a", + "Fan 1b", + "Fan 2a", + "Fan 2b", + "Fan 3a", + "Fan 3b", + "Fan 4a", + "Fan 4b", + "Fan 5a", + "Fan 5b", + "Fan 6a", + "Fan 6b", + "Fan 7a", + "Fan 7b", + "Fan 8a", + "Fan 8b" + ], + "Type": "CFMSensor" + }, + { + "AlphaF": 4.352, + "AlphaS": 0.512, + "Name": "Exit Air Temp", + "PowerFactorMax": 1.0, + "PowerFactorMin": 0.4, + "QMax": 88, + "QMin": 15, "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 85 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 80 }, { "Direction": "less than", @@ -647,24 +670,151 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "ExitAirTempSensor" }, { - "Address": "0x49", - "Bus": 6, - "Name": "Left Rear Board Temp", + "AllowedFailures": 1, + "Name": "FanRedundancy", + "Type": "FanRedundancy" + }, + { + "Direction": "Input", + "Index": 40, + "Name": "NMI Input", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 49, + "Name": "CPU CATERR", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 214, + "Name": "SMI Input", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 215, + "Name": "Post Complete", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 217, + "Name": "Nmi Button", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 218, + "Name": "ID Button", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 219, + "Name": "Power Good", + "Polarity": "High", + "Type": "Gpio" + }, + { + "Name": "System Fan connector 1", + "Pwm": 0, + "Tachs": [ + 0, + 1 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 2", + "Pwm": 1, + "Tachs": [ + 2, + 3 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 3", + "Pwm": 2, + "Tachs": [ + 4, + 5 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 4", + "Pwm": 3, + "Tachs": [ + 6, + 7 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 5", + "Pwm": 4, + "Tachs": [ + 8, + 9 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 6", + "Pwm": 5, + "Tachs": [ + 10, + 11 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 7", + "Pwm": 6, + "Tachs": [ + 12, + 13 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 8", + "Pwm": 7, + "Tachs": [ + 14, + 15 + ], + "Type": "IntelFanConnector" + }, + { + "Address": "0x8", + "Class": "METemp", + "Name": "SSB Temp", + "PowerState": "BiosPost", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 103 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 98 }, { "Direction": "less than", @@ -679,12 +829,12 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x48", - "Bus": 6, - "Name": "PCH M.2 Temp", + "Address": "0xC4", + "Class": "MpsBridgeTemp", + "Name": "CPU1 P12V PVCCIN VR Temp", "Thresholds": [ { "Direction": "greater than", @@ -711,12 +861,12 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x4f", - "Bus": 6, - "Name": "Inlet BRD Temp", + "Address": "0xB4", + "Class": "PxeBridgeTemp", + "Name": "CPU1 P12V PVCCIO VR Temp", "Thresholds": [ { "Direction": "greater than", @@ -743,190 +893,351 @@ "Value": 0 } ], - "Type": "TMP75" + "Type": "IpmbSensor" }, { - "Address": "0x30", - "Bus": 0, - "CpuID": 1, - "Name": "Skylake CPU 1", + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem ABCD Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 99, - "label": "DIMM" + "Value": 115 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 89, - "label": "DIMM" + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 } ], - "Type": "SkylakeCPU" + "Type": "IpmbSensor" }, { - "Address": "0x31", - "Bus": 0, - "CpuID": 2, - "Name": "Skylake CPU 2", + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem EFGH Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 99, - "label": "DIMM" + "Value": 115 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 89, - "label": "DIMM" + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 } ], - "Type": "SkylakeCPU" - }, - { - "BindConnector": "System Fan connector 1", - "Index": 0, - "Name": "Fan 1a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 1", - "Index": 1, - "Name": "Fan 1b", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 2", - "Index": 2, - "Name": "Fan 2a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 2", - "Index": 3, - "Name": "Fan 2b", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 3", - "Index": 4, - "Name": "Fan 3a", - "Type": "AspeedFan" - }, - { - "BindConnector": "System Fan connector 3", - "Index": 5, - "Name": "Fan 3b", - "Type": "AspeedFan" + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 4", - "Index": 6, - "Name": "Fan 4a", - "Type": "AspeedFan" + "Address": "0x4A", + "Class": "IRBridgeTemp", + "Name": "CPU1 VR P1V8", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 4", - "Index": 7, - "Name": "Fan 4b", - "Type": "AspeedFan" + "Address": "0xCC", + "Class": "MpsBridgeTemp", + "Name": "CPU2 P12V PVCCIN VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 5", - "Index": 8, - "Name": "Fan 5a", - "Type": "AspeedFan" + "Address": "0xD4", + "Class": "PxeBridgeTemp", + "Name": "CPU2 P12V PVCCIO VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 5", - "Index": 9, - "Name": "Fan 5b", - "Type": "AspeedFan" + "Address": "0xB0", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem ABCD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 6", - "Index": 10, - "Name": "Fan 6a", - "Type": "AspeedFan" + "Address": "0xEC", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem EFGH Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 6", - "Index": 11, - "Name": "Fan 6b", - "Type": "AspeedFan" + "Address": "0x4C", + "Class": "IRBridgeTemp", + "Name": "CPU2 VR P1V8", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" }, { - "BindConnector": "System Fan connector 7", - "Index": 12, - "Name": "Fan 7a", - "Type": "AspeedFan" + "Address": "0x71", + "Bus": 2, + "ChannelNames": [ + "M2Slot1", + "M2Slot2" + ], + "Name": "M2 Mux", + "Type": "PCA9543Mux" }, { - "BindConnector": "System Fan connector 7", - "Index": 13, - "Name": "Fan 7b", - "Type": "AspeedFan" + "Address": "0x72", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "", + "FruChannel" + ], + "Name": "Riser 1 Mux", + "Type": "PCA9545Mux" }, { - "BindConnector": "System Fan connector 8", - "Index": 14, - "Name": "Fan 8a", - "Type": "AspeedFan" + "Address": "0x73", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "", + "FruChannel" + ], + "Name": "Riser 2 Mux", + "Type": "PCA9545Mux" }, { - "BindConnector": "System Fan connector 8", - "Index": 15, - "Name": "Fan 8b", - "Type": "AspeedFan" + "Address": "0x73", + "Bus": 9, + "ChannelNames": [ + "MemoryChannel1", + "MemoryChannel2", + "MemoryChannel3", + "MemoryChannel4" + ], + "Name": "Memory Mux", + "Type": "PCA9545Mux" }, { - "AlphaF": 4.352, - "AlphaS": 0.512, - "Name": "Exit Air Temp", - "PowerFactorMax": 10, - "PowerFactorMin": 4, - "QMax": 88, - "QMin": 15, - "Type": "ExitAirTempSensor" + "Address": "0x74", + "Bus": 2, + "ChannelNames": [ + "PcieSlot1", + "PcieSlot2", + "PcieSlot3", + "PcieSlot4" + ], + "Name": "PCIE Mux", + "Type": "PCA9546Mux" }, { - "C1": 92.16, - "C2": 107.52, - "MaxCFM": 17.5, - "Name": "System Airflow", - "TachMaxPercent": 100, - "TachMinPercent": 20, - "Tachs": [ - "Fan 1a", - "Fan 1b", - "Fan 2a", - "Fan 2b", - "Fan 3a", - "Fan 3b", - "Fan 4a", - "Fan 4b", - "Fan 5a", - "Fan 5b", - "Fan 6a", - "Fan 6b", - "Fan 7a", - "Fan 7b", - "Fan 8a", - "Fan 8b" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Exit Air Temp" ], - "Type": "CFMSensor" + "Name": "Exit Air Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -936,7 +1247,7 @@ "Fan 1b" ], "Name": "Fan 1", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -953,7 +1264,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -963,7 +1274,7 @@ "Fan 2b" ], "Name": "Fan 2", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -980,7 +1291,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -990,7 +1301,7 @@ "Fan 3b" ], "Name": "Fan 3", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1007,7 +1318,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1017,7 +1328,7 @@ "Fan 4b" ], "Name": "Fan 4", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1034,7 +1345,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1044,7 +1355,7 @@ "Fan 5b" ], "Name": "Fan 5", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1061,7 +1372,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1071,7 +1382,7 @@ "Fan 6b" ], "Name": "Fan 6", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1088,7 +1399,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1098,7 +1409,7 @@ "Fan 7b" ], "Name": "Fan 7", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1115,7 +1426,7 @@ }, { "Class": "fan", - "FFGainCoefficient": 0.01, + "FFGainCoefficient": 1.0, "FFOffCoefficient": 0.0, "ICoefficient": 0.0, "ILimitMax": 0.0, @@ -1125,7 +1436,7 @@ "Fan 8b" ], "Name": "Fan 8", - "NegativeHysteresis": 2.0, + "NegativeHysteresis": 0.0, "OutLimitMax": 100.0, "OutLimitMin": 30.0, "Outputs": [ @@ -1141,40 +1452,74 @@ ] }, { - "FailSafePercent": 100, - "MinThermalOutput": 30, - "Name": "Left", - "Type": "Pid.Zone" - }, - { - "FailSafePercent": 100, - "MinThermalOutput": 30, - "Name": "Right", - "Type": "Pid.Zone" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "BMC Temp" + ], + "Name": "BMC Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "AllowedFailures": 1, - "Name": "FanRedundancy", - "Type": "FanRedundancy" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [ABC]\\d+ CPU1" + ], + "Name": "CPU1 DIMM ABC", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "temp", "FFGainCoefficient": 0.0, "FFOffCoefficient": 0.0, - "ICoefficient": -0.2, + "ICoefficient": -1.0, "ILimitMax": 100, "ILimitMin": 30, "Inputs": [ - "Core \\d+ CPU1" + "DIMM [DEF]\\d+ CPU1" ], - "Name": "CPU1", - "NegativeHysteresis": 2.0, + "Name": "CPU1 DIMM DEF", + "NegativeHysteresis": 5.0, "OutLimitMax": 100, "OutLimitMin": 30, "Outputs": [], - "PCoefficient": -3.0, + "PCoefficient": -0.15, "PositiveHysteresis": 0.0, - "SetPoint": 45.0, + "SetPoint": 60.0, "SlewNeg": -1, "SlewPos": 0.0, "Type": "Pid", @@ -1186,108 +1531,275 @@ "Class": "temp", "FFGainCoefficient": 0.0, "FFOffCoefficient": 0.0, - "ICoefficient": -0.2, + "ICoefficient": -1.0, "ILimitMax": 100, "ILimitMin": 30, "Inputs": [ - "Core \\d+ CPU2" + "DIMM [ABC]\\d+ CPU2" ], - "Name": "CPU2", + "Name": "CPU2 DIMM ABC", + "NegativeHysteresis": 5.0, "OutLimitMax": 100, "OutLimitMin": 30, "Outputs": [], - "PCoefficient": -3.0, - "SetPoint": 45.0, + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, "SlewNeg": -1, "SlewPos": 0.0, "Type": "Pid", "Zones": [ - "Right" + "Right", + "PSU" ] }, { - "Direction": "Input", - "Index": 32, - "Name": "Reset Button", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [DEF]\\d+ CPU2" + ], + "Name": "CPU2 DIMM DEF", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Out", - "Index": 33, - "Name": "Reset Out", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU1" + ], + "Name": "DTS CPU1", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 34, - "Name": "Power Button", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU2" + ], + "Name": "DTS CPU2", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] }, { - "Direction": "Out", - "Index": 35, - "Name": "Power Up", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Left Rear Temp" + ], + "Name": "Left Rear Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Input", - "Index": 40, - "Name": "NMI Input", - "Polarity": "Low", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Right Rear Board" + ], + "Name": "Right Rear Board", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 48, - "Name": "CPU ERR2", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "SSB Temp" + ], + "Name": "SSB Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] }, { - "Direction": "Input", - "Index": 49, - "Name": "CPU CATERR", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "VR 1 Temp" + ], + "Name": "VR 1 Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] }, { - "Direction": "Input", - "Index": 214, - "Name": "SMI Input", - "Polarity": "High", - "Type": "Gpio" + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "VR 2 Temp" + ], + "Name": "VR 2 Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] }, { - "Direction": "Input", - "Index": 215, - "Name": "Post Complete", - "Polarity": "Low", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Left", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 217, - "Name": "Nmi Button", - "Polarity": "High", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Right", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 218, - "Name": "ID Button", - "Polarity": "Low", - "Type": "Gpio" + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "PSU", + "Type": "Pid.Zone" }, { - "Direction": "Input", - "Index": 219, - "Name": "Power Good", - "Polarity": "High", - "Type": "Gpio" + "Class": "Ceiling", + "Inputs": [ + "Front Panel Temp" + ], + "Name": "Front Panel UCC", + "NegativeHysteresis": 2, + "Output": [ + 70.0, + 80.0 + ], + "PositiveHysteresis": 0, + "Profiles": [ + "Acoustic" + ], + "Reading": [ + 22.0, + 32.0 + ], + "Type": "Stepwise", + "Zones": [ + "Left", + "Right" + ] }, { "Class": "Floor", @@ -1312,138 +1824,9 @@ ] }, { - "Address": "0x8", - "Class": "METemp", - "Name": "SSB Temp", - "PowerState": "BiosPost", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 103 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 98 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xC4", - "Class": "MpsBridgeTemp", - "Name": "CPU1 P12V PVCCIN VR Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xB4", - "Class": "PxeBridgeTemp", - "Name": "CPU1 P12V PVCCIO VR Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xDC", - "Class": "PxeBridgeTemp", - "Name": "CPU1 VR Mem ABCD Temp", - "Thresholds": [ - { - "Direction": "greater than", - "Name": "upper critical", - "Severity": 1, - "Value": 115 - }, - { - "Direction": "greater than", - "Name": "upper non critical", - "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 - } - ], - "Type": "IpmbSensor" - }, - { - "Address": "0xDC", - "Class": "PxeBridgeTemp", - "Name": "CPU1 VR Mem EFGH Temp", + "Address": "0x4A", + "Bus": 6, + "Name": "BMC Temp", "Thresholds": [ { "Direction": "greater than", @@ -1470,12 +1853,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0x4A", - "Class": "IRBridgeTemp", - "Name": "CPU1 VR P1V8", + "Address": "0x4B", + "Bus": 6, + "Name": "Right Rear Board Temp", "Thresholds": [ { "Direction": "greater than", @@ -1502,12 +1885,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xCC", - "Class": "MpsBridgeTemp", - "Name": "CPU2 P12V PVCCIN VR Temp", + "Address": "0x49", + "Bus": 6, + "Name": "Left Rear Board Temp", "Thresholds": [ { "Direction": "greater than", @@ -1534,12 +1917,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xD4", - "Class": "PxeBridgeTemp", - "Name": "CPU2 P12V PVCCIO VR Temp", + "Address": "0x48", + "Bus": 6, + "Name": "PCH M.2 Temp", "Thresholds": [ { "Direction": "greater than", @@ -1566,12 +1949,12 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xB0", - "Class": "PxeBridgeTemp", - "Name": "CPU2 VR Mem ABCD Temp", + "Address": "0x4f", + "Bus": 6, + "Name": "Inlet BRD Temp", "Thresholds": [ { "Direction": "greater than", @@ -1598,24 +1981,24 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0xEC", - "Class": "PxeBridgeTemp", - "Name": "CPU2 VR Mem EFGH Temp", + "Address": "0x4D", + "Bus": "0x1", + "Name": "Front Panel Temp", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 55 }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 + "Value": 50 }, { "Direction": "less than", @@ -1630,170 +2013,58 @@ "Value": 0 } ], - "Type": "IpmbSensor" + "Type": "TMP75" }, { - "Address": "0x4C", - "Class": "IRBridgeTemp", - "Name": "CPU2 VR P1V8", + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "Xeon CPU 1", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 115 + "Value": 99, + "label": "DIMM" }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 110 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 + "Value": 89, + "label": "DIMM" } ], - "Type": "IpmbSensor" + "Type": "XeonCPU" }, { - "Address": "0x4D", - "Bus": "0x1", - "Name": "Front Panel Temp", + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "Xeon CPU 2", "Thresholds": [ { "Direction": "greater than", "Name": "upper critical", "Severity": 1, - "Value": 55 + "Value": 99, + "label": "DIMM" }, { "Direction": "greater than", "Name": "upper non critical", "Severity": 0, - "Value": 50 - }, - { - "Direction": "less than", - "Name": "lower non critical", - "Severity": 0, - "Value": 5 - }, - { - "Direction": "less than", - "Name": "lower critical", - "Severity": 1, - "Value": 0 + "Value": 89, + "label": "DIMM" } ], - "Type": "TMP75" - }, - { - "Address": "0x71", - "Bus": 2, - "ChannelNames": [ - "M2Slot1", - "M2Slot2" - ], - "Name": "M2 Mux", - "Type": "PCA9543Mux" - }, - { - "Address": "0x72", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "", - "FruChannel" - ], - "Name": "Riser 1 Mux", - "Type": "PCA9545Mux" - }, - { - "Address": "0x73", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "", - "FruChannel" - ], - "Name": "Riser 2 Mux", - "Type": "PCA9545Mux" - }, - { - "Address": "0x74", - "Bus": 2, - "ChannelNames": [ - "PcieSlot1", - "PcieSlot2", - "PcieSlot3", - "PcieSlot4" - ], - "Name": "PCIE Mux", - "Type": "PCA9546Mux" - }, - { - "Address": "0x73", - "Bus": 9, - "ChannelNames": [ - "MemoryChannel1", - "MemoryChannel2", - "MemoryChannel3", - "MemoryChannel4" - ], - "Name": "Memory Mux", - "Type": "PCA9545Mux" - }, - { - "Class": "Ceiling", - "Inputs": [ - "Front Panel Temp" - ], - "Name": "Front Panel UCC", - "NegativeHysteresis": 2, - "Output": [ - 70.0, - 80.0 - ], - "PositiveHysteresis": 0, - "Reading": [ - 22.0, - 32.0 - ], - "Type": "Stepwise", - "Zones": [ - "Left", - "Right" - ] - }, - { - "Controllers": [ - ".*" - ], - "Name": "Acoustic", - "Type": "FanProfile" - }, - { - "Controllers": [ - "Front Panel LCC", - "CPU\\d" - ], - "Name": "Performance", - "Type": "FanProfile" + "Type": "XeonCPU" } ], "Name": "WP Baseboard", "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*WP'})", + "ProductId": 154, "Type": "Board", "xyz.openbmc_project.Inventory.Decorator.Asset": { "Manufacturer": "$PRODUCT_MANUFACTURER", diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend index 758818748..b8b38ecff 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend @@ -4,7 +4,8 @@ SRC_URI_append = " file://WC-Baseboard.json \ file://TNP-baseboard.json \ file://FCXXPDBASSMBL_PDB.json \ file://OPB2RH-Chassis.json \ - file://CYP-baseboard.json" + file://CYP-baseboard.json \ + file://MIDPLANE-2U2X12SWITCH.json" RDEPENDS_${PN} += " default-fru" diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/workbook/wolfpass-config.bb b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/workbook/wolfpass-config.bb index c91053536..ead62f47e 100644 --- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/workbook/wolfpass-config.bb +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/workbook/wolfpass-config.bb @@ -7,4 +7,4 @@ inherit config-in-skeleton LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" SRCREV = "946064239016e38cd1cc346047b1d26960c06cdb" -SKELETON_URI = "git://git@github.com/Intel-BMC/skeleton.git;protocol=ssh;branch=intel" +SKELETON_URI = "git://git-amr-1.devtools.intel.com:29418/openbmc-skeleton.git;protocol=ssh;branch=intel" |