diff options
597 files changed, 69071 insertions, 152 deletions
diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md deleted file mode 100644 index 55a1b0a92..000000000 --- a/.github/pull_request_template.md +++ /dev/null @@ -1,3 +0,0 @@ -Please do not submit a Pull Request via github. Our project makes use of -Gerrit for patch submission and review. For more details please -see https://github.com/openbmc/docs/blob/master/CONTRIBUTING.md#submitting-changes-via-gerrit-server diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml new file mode 100644 index 000000000..7c36ade7a --- /dev/null +++ b/.github/workflows/main.yml @@ -0,0 +1,21 @@ +name: CI + +on: [pull_request] + +jobs: + build: + + runs-on: ubuntu-latest + + steps: + - uses: actions/checkout@v1 + - name: Run a multi-line script + run: | + sudo apt update + sudo apt-get install gawk wget git-core diffstat unzip texinfo gcc-multilib build-essential chrpath socat + sudo apt autoremove + rm -rf build + export TEMPLATECONF=meta-openbmc-mods/meta-wht/conf + source oe-init-build-env + echo "INHERIT += \"rm_work_and_downloads\"" >> conf/local.conf + bitbake intel-platforms @@ -1,169 +1,95 @@ # OpenBMC -[](https://openpower.xyz/job/openbmc-build/) - -OpenBMC is a Linux distribution for management controllers used in devices such -as servers, top of rack switches or RAID appliances. It uses -[Yocto](https://www.yoctoproject.org/), -[OpenEmbedded](https://www.openembedded.org/wiki/Main_Page), -[systemd](https://www.freedesktop.org/wiki/Software/systemd/), and -[D-Bus](https://www.freedesktop.org/wiki/Software/dbus/) to allow easy -customization for your platform. - -## Setting up your OpenBMC project - -### 1) Prerequisite -- Ubuntu 14.04 - -``` -sudo apt-get install -y git build-essential libsdl1.2-dev texinfo gawk chrpath diffstat -``` - -- Fedora 28 - + + +Intel-BMC/openbmc is a BMC implementation for servers. The purpose is to provide +early access to features and capabilities which have not yet been accepted or +merged in the OpenBMC main project (github.com/openbmc). In due course, all of +the capabilities here will be brought to the OpenBMC project. + +For questions or support please email OpenBMC.Support@intel.com. + +Some answers to the main questions that tend to get asked: + +### Does this mean that Intel is no longer contributing to the Linux foundation project? + +No. This repo is for components that are intended for the eventual +release to the LF OpenBMC project. There are a number of reasons where things +might be checked in here. For example: functionality that is still under +discussion or in the LF OpenBMC project, features that have not gone through +the level of testing or integration needed to be included in the OpenBMC +project + +### Why does this repo exist at all? + +Upstreaming changes to the linux kernel, uboot, systemd, yocto, and the various +projects that OpenBMC pulls in requires a significant effort. While we aspire +to that process being fast, painless, and with minimal rework, the reality is +far from that, and features or functions that require changes across a number +of repos require a coordinated effort, and a single source of function. As a +general rule, this repository loosens the requirements of "form over function" +and prefers to make some simplifying assumptions of BMC capabilities, chipsets, +and required features. + +### Can I upstream/release the code from this repository? + +It very much depends on the component. While in general the answer ends up +being "yes", prior approval should be granted, as this repo contains future +facing capabilities that may not have been announced yet. Please email +OpenBMC.Support@intel.com to discuss. Appropriate licenses will be applied to +the portions of this codebase that are approved for upstreaming. + +### How to build for Wolf Pass +```bash +export TEMPLATECONF=meta-openbmc-mods/meta-wolfpass/conf +source oe-init-build-env +bitbake intel-platforms ``` -sudo dnf install -y git patch diffstat texinfo chrpath SDL-devel bitbake \ - rpcgen perl-Thread-Queue perl-bignum perl-Crypt-OpenSSL-Bignum -sudo dnf groupinstall "C Development Tools and Libraries" +### How to build for Intel reference +```bash +export TEMPLATECONF=meta-openbmc-mods/meta-wht/conf +source oe-init-build-env +bitbake intel-platforms ``` -### 2) Download the source -``` -git clone git@github.com:openbmc/openbmc.git -cd openbmc -``` - -### 3) Target your hardware -Any build requires an environment set up according to your hardware target. -There is a special script in the root of this repository that can be used -to configure the environment as needed. The script is called `setup` and -takes the name of your hardware target as an argument. - -The script needs to be sourced while in the top directory of the OpenBMC -repository clone, and, if run without arguments, will display the list -of supported hardware targets, see the following example: - -``` -$ . setup <machine> [build_dir] -Target machine must be specified. Use one of: - -bletchley gsj romulus -dl360poc kudo s2600wf -e3c246d4i mihawk swift -ethanolx mtjade tiogapass -evb-ast2500 nicole transformers -evb-ast2600 olympus-nuvoton witherspoon -evb-npcm750 on5263m5 witherspoon-tacoma -f0b p10bmc x11spi -fp5280g2 palmetto yosemitev2 -g220a qemuarm zaius -gbs quanta-q71l -``` - -Once you know the target (e.g. romulus), source the `setup` script as follows: - -``` -. setup romulus -``` - -### 4) Build - -``` -bitbake obmc-phosphor-image -``` - -Additional details can be found in the [docs](https://github.com/openbmc/docs) -repository. - -## OpenBMC Development - -The OpenBMC community maintains a set of tutorials new users can go through -to get up to speed on OpenBMC development out -[here](https://github.com/openbmc/docs/blob/master/development/README.md) - -## Build Validation and Testing -Commits submitted by members of the OpenBMC GitHub community are compiled and -tested via our [Jenkins](https://jenkins.openbmc.org/) server. Commits are run -through two levels of testing. At the repository level the makefile `make -check` directive is run. At the system level, the commit is built into a -firmware image and run with an arm-softmmu QEMU model against a barrage of -[CI tests](https://openpower.xyz/job/openbmc-test-qemu-ci/). - -Commits submitted by non-members do not automatically proceed through CI -testing. After visual inspection of the commit, a CI run can be manually -performed by the reviewer. - -Automated testing against the QEMU model along with supported systems are -performed. The OpenBMC project uses the -[Robot Framework](http://robotframework.org/) for all automation. Our -complete test repository can be found -[here](https://github.com/openbmc/openbmc-test-automation). - -## Submitting Patches -Support of additional hardware and software packages is always welcome. -Please follow the [contributing guidelines](https://github.com/openbmc/docs/blob/master/CONTRIBUTING.md) -when making a submission. It is expected that contributions contain test -cases. - -## Bug Reporting -[Issues](https://github.com/openbmc/openbmc/issues) are managed on -GitHub. It is recommended you search through the issues before opening -a new one. -## Questions +### Default User Credentials -First, please do a search on the internet. There's a good chance your question -has already been asked. +To meet Intel security requirements, this OpenBMC implementation will not have +default user credentials enabled by default. -For general questions, please use the openbmc tag on -[Stack Overflow](https://stackoverflow.com/questions/tagged/openbmc). -Please review the [discussion](https://meta.stackexchange.com/questions/272956/a-new-code-license-the-mit-this-time-with-attribution-required?cb=1) -on Stack Overflow licensing before posting any code. +IPMI commands are available to enable the root user for serial console access +and to enable users for IPMI, Redfish, and web access. -For technical discussions, please see [contact info](#contact) below for -Discord and mailing list information. Please don't file an issue to ask a -question. You'll get faster results by using the mailing list or Discord. +There is also a `"debug-tweaks"` feature that can be added to a build to +re-enable the default user credentials. -## Features of OpenBMC +#### Enable root user -**Feature List** -* Host management: Power, Cooling, LEDs, Inventory, Events, Watchdog -* Full IPMI 2.0 Compliance with DCMI -* Code Update Support for multiple BMC/BIOS images -* Web-based user interface -* REST interfaces -* D-Bus based interfaces -* SSH based SOL -* Remote KVM -* Hardware Simulation -* Automated Testing -* User management -* Virtual media +Without `"debug-tweaks"`, the root user is disabled by default. -**Features In Progress** -* OpenCompute Redfish Compliance -* Verified Boot +The following IPMI command can be used to enable the root user. This root +user allows access to the BMC serial console, but cannot be used to access +IPMI, Redfish, or the web console. -**Features Requested but need help** -* OpenBMC performance monitoring +IPMI OEM net function 0x30, command 0x5f. For root user, the first byte is +0 followed by the password. +For example, to enable the root user with password `0penBmc1`: -## Finding out more +```ipmitool raw 0x30 0x5f 0x00 0x30 0x70 0x65 0x6e 0x42 0x6d 0x63 0x31``` -Dive deeper into OpenBMC by opening the -[docs](https://github.com/openbmc/docs) repository. +#### Enable IPMI, Redfish, and web users -## Technical Steering Committee +Without `"debug-tweaks"`, there are no IPMI, Redfish, or web users by default. -The Technical Steering Committee (TSC) guides the project. Members are: +The standard IPMI commands to set usernames and passwords are supported. +These users allow access to IPMI, Redfish, and the web console, but cannot be +used to access the BMC serial console. - * Brad Bishop (chair), IBM - * Nancy Yuen, Google - * Sai Dasari, Facebook - * James Mihm, Intel - * Sagar Dharia, Microsoft - * Samer El-Haj-Mahmoud, Arm +#### debug-tweaks -## Contact -- Mail: openbmc@lists.ozlabs.org [https://lists.ozlabs.org/listinfo/openbmc](https://lists.ozlabs.org/listinfo/openbmc) -- Discord: https://discord.gg/69Km47zH98 +Debug features, including the default user credentials, can be enabled by +adding the `"debug-tweaks"` feature to the build by including the following +in your `local.conf` file: +```EXTRA_IMAGE_FEATURES += "debug-tweaks"``` diff --git a/meta-aspeed/recipes-bsp/u-boot/files/0001-aspeed-Limit-bootm-memory.patch b/meta-aspeed/recipes-bsp/u-boot/files/0001-aspeed-Limit-bootm-memory.patch new file mode 100644 index 000000000..f6062971c --- /dev/null +++ b/meta-aspeed/recipes-bsp/u-boot/files/0001-aspeed-Limit-bootm-memory.patch @@ -0,0 +1,31 @@ +From 41d6940891b91e27ea5509eda2247811a3ba0c0d Mon Sep 17 00:00:00 2001 +From: Joel Stanley <joel@jms.id.au> +Date: Tue, 30 Jul 2019 15:52:05 +0930 +Subject: [PATCH] aspeed: Limit bootm memory + +This ensures u-boot places the kernel, device tree and initrd at an +address that is accessible by the Linux early boot code. + +Without this, when booting with FIT the device tree is placed at the end +of RAM which is not mapped on the AST2600 EVB which contains 2GB of RAM. + +Signed-off-by: Joel Stanley <joel@jms.id.au> +--- + include/configs/aspeed-common.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h +index 3b345ba46333..eba4e1c79d80 100644 +--- a/include/configs/aspeed-common.h ++++ b/include/configs/aspeed-common.h +@@ -41,6 +41,7 @@ + #define CONFIG_SYS_INIT_SP_ADDR \ + (SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) + ++#define CONFIG_SYS_BOOTMAPSZ (256 * 1024 * 1024) + #define CONFIG_SYS_MALLOC_LEN (32 << 20) + + /* +-- +2.20.1 + diff --git a/meta-aspeed/recipes-kernel/linux/linux-aspeed-sdk/aspeed-g6/0001-aspeed-espi-Clean-up-error-handling.patch b/meta-aspeed/recipes-kernel/linux/linux-aspeed-sdk/aspeed-g6/0001-aspeed-espi-Clean-up-error-handling.patch new file mode 100644 index 000000000..8c69abc34 --- /dev/null +++ b/meta-aspeed/recipes-kernel/linux/linux-aspeed-sdk/aspeed-g6/0001-aspeed-espi-Clean-up-error-handling.patch @@ -0,0 +1,102 @@ +From aa808480fb9fa62c96bd38a83328a87971a95ed4 Mon Sep 17 00:00:00 2001 +From: Joel Stanley <joel@jms.id.au> +Date: Wed, 31 Jul 2019 18:10:37 +0930 +Subject: [PATCH] aspeed: espi: Clean up error handling + +I was seeing a crash shortly after the ESPI driver failed to probe: + + AST ESPI Unable to get GPIO IRQ -22 + Trying to free nonexistent resource <000000001e6ee000-000000001e6ee1ff> + aspeed_espi: probe of 1e6ee000.espi failed with error -22 + +The error handling was freeing the unallocated resource. + +The driver correctly makes allocations using the devm APIs. This means +the kernel will handle cleaning up of resources on failure. This patch +removes the unnecessary error handling. + +Signed-off-by: Joel Stanley <joel@jms.id.au> +--- + drivers/soc/aspeed/aspeed-espi.c | 30 ++++++------------------------ + 1 file changed, 6 insertions(+), 24 deletions(-) + +diff --git a/drivers/soc/aspeed/aspeed-espi.c b/drivers/soc/aspeed/aspeed-espi.c +index 342d45bdbad3..2b72f05dd24f 100644 +--- a/drivers/soc/aspeed/aspeed-espi.c ++++ b/drivers/soc/aspeed/aspeed-espi.c +@@ -1284,17 +1284,10 @@ static int aspeed_espi_probe(struct platform_device *pdev) + aspeed_espi->dma_mode = 0; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- if (res == NULL) { +- dev_err(&pdev->dev, "no memory resource defined\n"); +- ret = -ENODEV; +- goto err_free; +- } +- + aspeed_espi->reg_base = devm_ioremap_resource(&pdev->dev, res); +- if (aspeed_espi->reg_base == NULL) { ++ if (IS_ERR(aspeed_espi->reg_base)) { + dev_err(&pdev->dev, "failed to ioremap() registers\n"); +- ret = -ENODEV; +- goto err_free_mem; ++ return ERR_PTR(aspeed_espi->reg_base); + } + + sysfs_bin_attr_init(&aspeed_espi->oob_channel); +@@ -1398,15 +1391,14 @@ static int aspeed_espi_probe(struct platform_device *pdev) + aspeed_espi->irq = platform_get_irq(pdev, 0); + if (aspeed_espi->irq < 0) { + dev_err(&pdev->dev, "no irq specified\n"); +- ret = -ENOENT; +- goto err_free_mem; ++ return aspeed_espi->irq; + } + + ret = devm_request_irq(&pdev->dev, aspeed_espi->irq, aspeed_espi_isr, + 0, dev_name(&pdev->dev), aspeed_espi); + if (ret) { + printk("AST ESPI Unable to get IRQ"); +- goto err_free_mem; ++ return ret; + } + + aspeed_espi->reset = devm_reset_control_get(&pdev->dev, NULL); +@@ -1421,7 +1413,7 @@ static int aspeed_espi_probe(struct platform_device *pdev) + 0, dev_name(&pdev->dev), aspeed_espi); + if (ret) { + printk("AST ESPI Unable to get GPIO IRQ %d\n", ret); +- goto err_free_mem; ++ return ret; + } + + aspeed_espi_ctrl_init(aspeed_espi); +@@ -1429,7 +1421,7 @@ static int aspeed_espi_probe(struct platform_device *pdev) + ret = misc_register(&aspeed_espi_misc); + if (ret) { + printk(KERN_ERR "ESPI : failed misc_register\n"); +- goto err_free_irq; ++ return ret; + } + + platform_set_drvdata(pdev, aspeed_espi); +@@ -1444,16 +1436,6 @@ static int aspeed_espi_probe(struct platform_device *pdev) + printk(KERN_INFO "aspeed_espi: driver successfully loaded.\n"); + + return 0; +- +-err_free_irq: +- free_irq(aspeed_espi->irq, pdev); +- +-err_free_mem: +- release_mem_region(res->start, resource_size(res)); +-err_free: +- kfree(aspeed_espi); +- +- return ret; + } + + static int aspeed_espi_remove(struct platform_device *pdev) +-- +2.20.1 + diff --git a/meta-openbmc-mods/COPYING.MIT b/meta-openbmc-mods/COPYING.MIT new file mode 100644 index 000000000..89de35479 --- /dev/null +++ b/meta-openbmc-mods/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/meta-openbmc-mods/COPYING.apache-2.0 b/meta-openbmc-mods/COPYING.apache-2.0 new file mode 100644 index 000000000..67db85882 --- /dev/null +++ b/meta-openbmc-mods/COPYING.apache-2.0 @@ -0,0 +1,175 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + + 9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. diff --git a/meta-openbmc-mods/README b/meta-openbmc-mods/README new file mode 100644 index 000000000..3d883acb2 --- /dev/null +++ b/meta-openbmc-mods/README @@ -0,0 +1,64 @@ +This README file contains information on the contents of the +intel layer. + +Please see the corresponding sections below for details. + + +Dependencies +============ + +This layer depends on: + + URI: git://git.openembedded.org/bitbake + branch: master + + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master + + URI: git://git.yoctoproject.org/xxxx + layers: xxxx + branch: master + + +Patches +======= + +Please submit any patches against the intel layer to the +xxxx mailing list (xxxx@zzzz.org) and cc: the maintainer: + +Maintainer: XXX YYYYYY <xxx.yyyyyy@zzzzz.com> + + +Table of Contents +================= + + I. Adding the intel layer to your build + II. Misc + + +I. Adding the intel layer to your build +================================================= + +--- replace with specific instructions for the intel layer --- + +In order to use this layer, you need to make the build system aware of +it. + +Assuming the intel layer exists at the top-level of your +yocto build tree, you can add it to the build system by adding the +location of the intel layer to bblayers.conf, along with any +other layers needed. e.g.: + + BBLAYERS ?= " \ + /path/to/yocto/meta \ + /path/to/yocto/meta-poky \ + /path/to/yocto/meta-yocto-bsp \ + /path/to/yocto/meta-intel \ + " + + +II. Misc +======== + +--- replace with specific information about the intel layer --- diff --git a/meta-openbmc-mods/conf/layer.conf b/meta-openbmc-mods/conf/layer.conf new file mode 100644 index 000000000..2286ce881 --- /dev/null +++ b/meta-openbmc-mods/conf/layer.conf @@ -0,0 +1,22 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "intel-openbmc" +BBFILE_PATTERN_intel-openbmc = "^${LAYERDIR}/" +BBFILE_PRIORITY_intel-openbmc = "5" +LAYERSERIES_COMPAT_intel-openbmc = "gatesgarth hardknott honister" + +IMAGE_FEATURES[validitems] += "tools-sdk tools-debug validation-unsecure" + +# static userid assignments +USERADDEXTENSION = "useradd-staticids" +USERADD_UID_TABLES = "files/passwd" +USERADD_GID_TABLES = "files/group" + +LAYER_CONF_VERSION = "14" + +INTELBASE = '${@os.path.normpath("${LAYERDIR}/")}' diff --git a/meta-openbmc-mods/conf/machine/include/intel.inc b/meta-openbmc-mods/conf/machine/include/intel.inc new file mode 100644 index 000000000..bab124a06 --- /dev/null +++ b/meta-openbmc-mods/conf/machine/include/intel.inc @@ -0,0 +1,29 @@ +MACHINE_FEATURES += "\ + obmc-phosphor-fan-mgmt \ + obmc-phosphor-chassis-mgmt \ + obmc-phosphor-flash-mgmt \ + obmc-host-ipmi \ + obmc-host-state-mgmt \ + obmc-chassis-state-mgmt \ + obmc-bmc-state-mgmt \ + " + +VIRTUAL-RUNTIME_skeleton_workbook = "${MACHINE}-config" +VIRTUAL-RUNTIME_obmc-inventory-manager = "entity-manager" +VIRTUAL-RUNTIME_obmc-led-monitor = "" +VIRTUAL-RUNTIME_obmc-host-state-manager = "x86-power-control" +VIRTUAL-RUNTIME_obmc-chassis-state-manager = "x86-power-control" +VIRTUAL-RUNTIME_obmc-discover-system-state = "x86-power-control" + +PREFERRED_PROVIDER_virtual/obmc-host-ipmi-hw = "phosphor-ipmi-kcs" +PREFERRED_PROVIDER_virtual/obmc-chassis-mgmt = "packagegroup-intel-apps" +PREFERRED_PROVIDER_virtual/obmc-fan-mgmt = "packagegroup-intel-apps" +PREFERRED_PROVIDER_virtual/obmc-flash-mgmt = "packagegroup-intel-apps" +PREFERRED_PROVIDER_virtual/obmc-system-mgmt = "packagegroup-intel-apps" +PREFERRED_PROVIDER_virtual/obmc-host-ctl ?= "" +PREFERRED_PROVIDER_virtual/obmc-inventory-data = "entity-manager" +PREFERRED_PROVIDER_virtual/phosphor-led-manager-config-native ?= "intel-led-manager-config-native" +#PREFERRED_PROVIDER_virtual/obmc-gpio-monitor ?= "phosphor-gpio-monitor" + +# add all the upstream intel override fixes +OVERRIDES .= ":intel" diff --git a/meta-openbmc-mods/files/group b/meta-openbmc-mods/files/group new file mode 100644 index 000000000..8f8c8e325 --- /dev/null +++ b/meta-openbmc-mods/files/group @@ -0,0 +1,12 @@ +bmcweb:x:443: +ipmid:x:197: +lock:x:198: +netdev:x:208: +avahi:x:200: +messagebus:x:201 +systemd-journal:x:202: +systemd-network:x:203: +systemd-timesync:x:204: +systemd-coredump:x:205: +systemd-bus-proxy:x:206: +systemd-resolve:!:207: diff --git a/meta-openbmc-mods/files/passwd b/meta-openbmc-mods/files/passwd new file mode 100644 index 000000000..ae48cfb46 --- /dev/null +++ b/meta-openbmc-mods/files/passwd @@ -0,0 +1,10 @@ +bmcweb:x:443:443::/home/bmcweb:/bin/false +hostipmid:x:196:197::/:/bin/false +netipmid:x:197:197::/:/bin/false +avahi:x:200:200::/var/run/avahi-daemon:/bin/false +messagebus:x:201:201::/var/lib/dbus:/bin/false +systemd-network:x:203:203::/:/bin/false +systemd-timesync:x:204:204::/:/bin/false +systemd-coredump:x:205:205::/:/bin/false +systemd-bus-proxy:x:206:206::/:/bin/false +systemd-resolve:!:207:207::/:/bin/nologin diff --git a/meta-openbmc-mods/meta-ast2500/conf/layer.conf b/meta-openbmc-mods/meta-ast2500/conf/layer.conf new file mode 100644 index 000000000..da49b8734 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/conf/layer.conf @@ -0,0 +1,20 @@ +LOCALCONF_VERSION = "3" +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "ast2500" +BBFILE_PATTERN_ast2500 = "^${LAYERDIR}/" +BBFILE_PRIORITY_ast2500 = "10" +LAYERSERIES_COMPAT_ast2500 = "gatesgarth hardknott honister" + +INHERIT += "extrausers" +#INHERIT += " cve-check" + +EXTRA_USERS_PARAMS:append:pn-intel-platforms = " \ +${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', "usermod -p '\$1\$UGMqyqdG\$FZiylVFmRRfl9Z0Ue8G7e/' root;", '', d)}" + +hostname:pn-base-files = "intel-obmc" diff --git a/meta-openbmc-mods/meta-ast2500/conf/machine/include/intel-ast2500.inc b/meta-openbmc-mods/meta-ast2500/conf/machine/include/intel-ast2500.inc new file mode 100644 index 000000000..9ccc399b1 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/conf/machine/include/intel-ast2500.inc @@ -0,0 +1,14 @@ +KMACHINE = "aspeed" +KERNEL_DEVICETREE = " \ + ${KMACHINE}-bmc-intel-ast2500.dtb \ + ${KMACHINE}-bmc-intel-s2600wf.dtb \ + " + +require conf/machine/include/ast2500.inc +require conf/machine/include/obmc-bsp-si-common.inc +require conf/machine/include/intel.inc +require conf/distro/include/phosphor-isolation.inc + +UBOOT_MACHINE = "ast_g5_phy_config" + +VIRTUAL-RUNTIME_skeleton_workbook = "${MACHINE}-config" diff --git a/meta-openbmc-mods/meta-ast2500/conf/machine/include/obmc-bsp-si-common.inc b/meta-openbmc-mods/meta-ast2500/conf/machine/include/obmc-bsp-si-common.inc new file mode 100644 index 000000000..72426453b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/conf/machine/include/obmc-bsp-si-common.inc @@ -0,0 +1,45 @@ +#@TYPE: Machine +#@NAME: OpenBMC +#@DESCRIPTION: Common machine configuration for OpenBMC chips + +MACHINE_EXTRA_RRECOMMENDS = " kernel-modules" +EXTRA_IMAGEDEPENDS += "u-boot" + +IMAGE_FSTYPES += "squashfs-xz" +IMAGE_FSTYPES += "mtd-auto" +INITRAMFS_FSTYPES = "squashfs-xz" +EXTRA_IMAGECMD:squashfs-xz:append = "-processors ${BB_NUMBER_THREADS} -b 262144 -Xdict-size 100% -Xbcj arm" + +KERNEL_CLASSES ?= "kernel-fitimage" +KERNEL_IMAGETYPES ?= "fitImage" +KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}" + +UBOOT_SUFFIX ?= "bin" + +MACHINEOVERRIDES =. "openbmc:" + +OBMC_PHOSPHOR_IMAGE_OVERLAY= "1" +OBMC_IMAGE_EXTRA_INSTALL:append = " u-boot-fw-utils-aspeed" + +IMAGE_CLASSES += "image_types image_types_phosphor_auto qemuboot" +IMAGE_CLASSES += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'image_types_intel_pfr', '', d)}" + +# do not generate an initramfs; use the above squashfs-xz as an initrd instead +INITRAMFS_FSTYPES = "" +INITRAMFS_CTYPE = "" +INITRAMFS_IMAGE = "" + +MACHINE_FEATURES_BACKFILL_CONSIDERED = "qemu-usermode" + +KERNEL_IMAGETYPES += "zImage" + +# runqemu +QB_SYSTEM_NAME = "qemu-system-arm" +QB_DEFAULT_FSTYPE = "mtd" +QB_ROOTFS_OPT = "-drive file=@ROOTFS@,format=raw,if=mtd" +QB_MACHINE = "-M intel-ast2500" +QB_OPT_APPEND += " -nographic -serial mon:stdio -serial none" +QB_NETWORK_DEVICE = "-net nic,macaddr=C0:FF:EE:00:00:02,model=ftgmac100" +QB_DEFAULT_KERNEL = "none" +QB_RNG = "" +QB_MEM = "512" diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0001-flash-use-readX-writeX-not-udelay.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0001-flash-use-readX-writeX-not-udelay.patch new file mode 100644 index 000000000..b24d91a68 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0001-flash-use-readX-writeX-not-udelay.patch @@ -0,0 +1,432 @@ +From 614d875d383c6567dd282faeb7ced1db1e4d07d9 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Thu, 26 Apr 2018 13:29:46 -0700 +Subject: [PATCH] U-Boot aspeed flash driver should not use udelay + +--- + arch/arm/mach-aspeed/flash.c | 229 ++++++++++++++--------------------- + 1 file changed, 88 insertions(+), 141 deletions(-) + +diff --git a/arch/arm/mach-aspeed/flash.c b/arch/arm/mach-aspeed/flash.c +index b8a438df75..d33fb9e0fe 100644 +--- a/arch/arm/mach-aspeed/flash.c ++++ b/arch/arm/mach-aspeed/flash.c +@@ -28,6 +28,7 @@ + #include <common.h> + #include <asm/processor.h> + #include <asm/byteorder.h> ++#include <asm/io.h> + #include <environment.h> + + #include <asm/arch/ast_scu.h> +@@ -202,7 +203,7 @@ static void reset_flash (flash_info_t * info) + if (info->dualport) + ulCtrlData |= 0x08; + #endif +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + } + +@@ -231,28 +232,22 @@ static void enable_write (flash_info_t * info) + + ulCtrlData = (info->tCK_Write << 8); + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x06); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x06, base); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x05); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x05, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while (!(jReg & 0x02)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + } + +@@ -283,30 +278,23 @@ static void write_status_register (flash_info_t * info, uchar data) + + ulCtrlData = (info->tCK_Write << 8); + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x01); +- udelay(10); +- *(uchar *) (base) = (uchar) (data); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x01, base); ++ writeb(data, base); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x05); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x05, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while (jReg & 0x01); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + } + + static void enable4b (flash_info_t * info) +@@ -333,13 +321,11 @@ static void enable4b (flash_info_t * info) + + ulCtrlData = (info->tCK_Write << 8); + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0xb7); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0xb7, base); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + } /* enable4b */ + +@@ -369,29 +355,23 @@ static void enable4b_spansion (flash_info_t * info) + /* Enable 4B: BAR0 D[7] = 1 */ + ulCtrlData = (info->tCK_Write << 8); + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x17); +- udelay(10); +- *(uchar *) (base) = (uchar) (0x80); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x17, base); ++ writeb(0x80, base); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x16); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x16, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while (!(jReg & 0x80)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + } /* enable4b_spansion */ + +@@ -423,14 +403,11 @@ static void enable4b_numonyx (flash_info_t * info) + /* Enable 4B: CMD:0xB7 */ + ulCtrlData = (info->tCK_Write << 8); + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0xB7); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0xB7, base); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + } /* enable4b_numonyx */ + +@@ -466,63 +443,49 @@ static void flash_write_buffer (flash_info_t *info, uchar *src, ulong addr, int + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x02); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x02, base); + if (info->address32) + { +- *(uchar *) (base) = (uchar) ((offset & 0xff000000) >> 24); +- udelay(10); ++ writeb((uchar) ((offset & 0xff000000) >> 24), base); + } +- *(uchar *) (base) = (uchar) ((offset & 0xff0000) >> 16); +- udelay(10); +- *(uchar *) (base) = (uchar) ((offset & 0x00ff00) >> 8); +- udelay(10); +- *(uchar *) (base) = (uchar) ((offset & 0x0000ff)); +- udelay(10); ++ writeb((uchar) ((offset & 0xff0000) >> 16), base); ++ writeb((uchar) ((offset & 0x00ff00) >> 8), base); ++ writeb((uchar) ((offset & 0x0000ff)), base); + + for (j=0; j<len; j++) + { +- *(uchar *) (base) = *(uchar *) (src++); +- udelay(10); ++ writeb(*src++, base); + } + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x05); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x05, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while ((jReg & 0x01)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + /* RFSR */ + if (info->specificspi == SpecificSPI_N25Q512) + { + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x70); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x70, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while (!(jReg & 0x80)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + } + } + +@@ -606,57 +569,44 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0xd8); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0xd8, base); + if (info->address32) + { +- *(uchar *) (base) = (uchar) ((offset & 0xff000000) >> 24); +- udelay(10); ++ writeb((uchar) ((offset & 0xff000000) >> 24), base); + } +- *(uchar *) (base) = (uchar) ((offset & 0xff0000) >> 16); +- udelay(10); +- *(uchar *) (base) = (uchar) ((offset & 0x00ff00) >> 8); +- udelay(10); +- *(uchar *) (base) = (uchar) ((offset & 0x0000ff)); +- udelay(10); ++ writeb((uchar) ((offset & 0xff0000) >> 16), base); ++ writeb((uchar) ((offset & 0x00ff00) >> 8), base); ++ writeb((uchar) ((offset & 0x0000ff)), base); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x05); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x05, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while ((jReg & 0x01)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + + /* RFSR */ + if (info->specificspi == SpecificSPI_N25Q512) + { + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (base) = (uchar) (0x70); +- udelay(10); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x70, base); + do { +- jReg = *(volatile uchar *) (base); ++ jReg = readb(base); + } while (!(jReg & 0x80)); + ulCtrlData &= CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + } + + putc ('.'); +@@ -767,22 +717,16 @@ static ulong flash_get_size (ulong base, flash_info_t *info) + } + + /* Get Flash ID */ +- ulCtrlData = *(ulong *) (info->reg_base + CtrlOffset) & CMD_MASK; ++ ulCtrlData = readl(info->reg_base + CtrlOffset) & CMD_MASK; + ulCtrlData |= CE_LOW | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); +- *(uchar *) (vbase) = (uchar) (0x9F); +- udelay(10); +- ch[0] = *(volatile uchar *)(vbase); +- udelay(10); +- ch[1] = *(volatile uchar *)(vbase); +- udelay(10); +- ch[2] = *(volatile uchar *)(vbase); +- udelay(10); +- ulCtrlData = *(ulong *) (info->reg_base + CtrlOffset) & CMD_MASK; ++ writel(ulCtrlData, info->reg_base + CtrlOffset); ++ writeb(0x9F, vbase); ++ ch[0] = readb(vbase); ++ ch[1] = readb(vbase); ++ ch[2] = readb(vbase); ++ ulCtrlData = readl(info->reg_base + CtrlOffset) & CMD_MASK; + ulCtrlData |= CE_HIGH | USERMODE; +- *(ulong *) (info->reg_base + CtrlOffset) = ulCtrlData; +- udelay(200); ++ writel(ulCtrlData, info->reg_base + CtrlOffset); + ulID = ((ulong)ch[0]) | ((ulong)ch[1] << 8) | ((ulong)ch[2] << 16) ; + info->flash_id = ulID; + +@@ -1339,13 +1283,13 @@ static ulong flash_get_size (ulong base, flash_info_t *info) + + if (info->address32) { + #ifndef AST_SOC_G5 +- reg = *((volatile ulong*) 0x1e6e2070); /* set H/W Trappings */ ++ reg = readl(0x1e6e2070); /* set H/W Trappings */ + reg |= 0x10; +- *((volatile ulong*) 0x1e6e2070) = reg; ++ writel(reg, 0x1e6e2070); + #endif +- reg = *((volatile ulong*) (info->reg_base + 0x4)); /* enable 32b control bit*/ ++ reg = readl(info->reg_base + 0x4); /* enable 32b control bit*/ + reg |= (0x01 << info->CE); +- *((volatile ulong*) (info->reg_base + 0x4)) = reg; ++ writel(reg, info->reg_base + 0x4); + + /* set flash chips to 32bits addressing mode */ + if ((info->flash_id & 0xFF) == 0x01) /* Spansion */ +@@ -1367,7 +1311,7 @@ unsigned long flash_init (void) + unsigned long size = 0; + int i; + +- *((volatile ulong*) AST_FMC_BASE) |= 0x800f0000; /* enable Flash Write */ ++ writel(readl(AST_FMC_BASE) | 0x800f0000, AST_FMC_BASE); /* enable Flash Write */ + + /* Init: FMC */ + /* BANK 0 : FMC CS0 , 1: FMC CS1, */ +@@ -1397,7 +1341,7 @@ unsigned long flash_init (void) + #ifdef CONFIG_SPI0_CS + //pin switch by trap[13:12] -- [0:1] Enable SPI Master + ast_scu_spi_master(1); /* enable SPI master */ +- *((volatile ulong*) AST_FMC_SPI0_BASE) |= 0x10000; /* enable Flash Write */ ++ writel(readl(AST_FMC_SPI0_BASE) | 0x10000, AST_FMC_SPI0_BASE); /* enable Flash Write */ + flash_info[CONFIG_FMC_CS].sysspi = 1; + flash_info[CONFIG_FMC_CS].reg_base = AST_FMC_SPI0_BASE; + flash_info[CONFIG_FMC_CS].flash_id = FLASH_UNKNOWN; +@@ -1448,21 +1392,24 @@ void memmove_dma(void * dest,const void *src,size_t count) + poll_time = 100; /* set 100 us as default */ + + /* force end of burst read */ +- *(volatile ulong *) (AST_FMC_BASE + CS0_CTRL) |= CE_HIGH; +- *(volatile ulong *) (AST_FMC_BASE + CS0_CTRL) &= ~CE_HIGH; ++ data = readl(AST_FMC_BASE + CS0_CTRL); ++ writel(data | CE_HIGH, AST_FMC_BASE + CS0_CTRL); ++ writel(data & ~CE_HIGH, AST_FMC_BASE + CS0_CTRL); + +- *(ulong *) (AST_FMC_BASE + REG_FLASH_DMA_CONTROL) = (ulong) (~FLASH_DMA_ENABLE); +- *(ulong *) (AST_FMC_BASE + REG_FLASH_DMA_FLASH_BASE) = (ulong) (src); +- *(ulong *) (AST_FMC_BASE + REG_FLASH_DMA_DRAM_BASE) = (ulong) (dest); +- *(ulong *) (AST_FMC_BASE + REG_FLASH_DMA_LENGTH) = (ulong) (count_align); +- *(ulong *) (AST_FMC_BASE + REG_FLASH_DMA_CONTROL) = (ulong) (FLASH_DMA_ENABLE); ++ writel(~FLASH_DMA_ENABLE, AST_FMC_BASE + REG_FLASH_DMA_CONTROL); ++ writel((ulong)src, AST_FMC_BASE + REG_FLASH_DMA_FLASH_BASE); ++ writel((ulong)dest, AST_FMC_BASE + REG_FLASH_DMA_DRAM_BASE); ++ writel(count_align, AST_FMC_BASE + REG_FLASH_DMA_LENGTH); ++ writel(FLASH_DMA_ENABLE, AST_FMC_BASE + REG_FLASH_DMA_CONTROL); + + /* wait poll */ + do { + udelay(poll_time); +- data = *(ulong *) (AST_FMC_BASE + REG_FLASH_INTERRUPT_STATUS); ++ data = readl(AST_FMC_BASE + REG_FLASH_INTERRUPT_STATUS); + } while (!(data & FLASH_STATUS_DMA_READY)); + + /* clear status */ +- *(ulong *) (AST_FMC_BASE + REG_FLASH_INTERRUPT_STATUS) |= FLASH_STATUS_DMA_CLEAR; ++ data = readl(AST_FMC_BASE + REG_FLASH_INTERRUPT_STATUS); ++ writel(data | FLASH_STATUS_DMA_CLEAR, ++ AST_FMC_BASE + REG_FLASH_INTERRUPT_STATUS); + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0002-intel-layout-environment-addr.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0002-intel-layout-environment-addr.patch new file mode 100644 index 000000000..8937047c5 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0002-intel-layout-environment-addr.patch @@ -0,0 +1,51 @@ +From 7979a73fba832747ed3c037c0b47c9e67dcf283e Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Mon, 30 Apr 2018 10:52:37 -0700 + +--- + common/board_r.c | 8 ++++++-- + include/configs/ast-common.h | 9 ++++++--- + 2 files changed, 12 insertions(+), 5 deletions(-) + +diff --git a/common/board_r.c b/common/board_r.c +index d959ad3..74797ed 100644 +--- a/common/board_r.c ++++ b/common/board_r.c +@@ -494,10 +494,14 @@ static int should_load_env(void) + static int initr_env(void) + { + /* initialize environment */ +- if (should_load_env()) ++ if (should_load_env()) { ++ /* try again, in case the environment failed to load the first time */ ++ if (!gd->env_valid) ++ env_init(); + env_relocate(); +- else ++ } else { + set_default_env(NULL); ++ } + #ifdef CONFIG_OF_CONTROL + setenv_addr("fdtcontroladdr", gd->fdt_blob); + #endif +diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h +index eff6d2b..b7d7192 100644 +--- a/include/configs/ast-common.h ++++ b/include/configs/ast-common.h +@@ -103,10 +103,13 @@ + #define CONFIG_SYS_MAX_FLASH_BANKS (CONFIG_FMC_CS) + #define CONFIG_SYS_MAX_FLASH_SECT (8192) /* max number of sectors on one chip */ + #define CONFIG_ENV_IS_IN_FLASH 1 +-#define CONFIG_ENV_ADDR (AST_FMC_CS0_BASE + 0x60000) ++#define CONFIG_ENV_OFFSET 0x2400000 /* environment starts here */ ++#define CONFIG_ENV_ADDR (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET) ++#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ + +-#define CONFIG_ENV_OFFSET 0x60000 /* environment starts here */ +-#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ ++#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) ++#define CONFIG_ENV_ADDR_REDUND (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET_REDUND) ++#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + + #define CONFIG_BOOTCOMMAND "bootm 20080000" + #define CONFIG_ENV_OVERWRITE diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch new file mode 100644 index 000000000..c438bdcd4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch @@ -0,0 +1,73 @@ +From 9efa565f1bc09b1906328b25a01e041ab5024769 Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Tue, 11 Sep 2018 16:24:06 +0800 +Subject: [PATCH] Make sure debug uart is using 24MHz clock source + +u-boot defines the uart5(debug console) as 24MHz, +set the SCU14[28] to 0, to make sure the clock source is 24M + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> + +--- + arch/arm/include/asm/arch-aspeed/ast_scu.h | 2 ++ + arch/arm/include/asm/arch-aspeed/platform.h | 1 + + arch/arm/mach-aspeed/ast-scu.c | 6 ++++++ + board/aspeed/ast-g5/ast-g5.c | 8 ++++++++ + 4 files changed, 17 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h +index dcbc6730d4..06825cebbf 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_scu.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h +@@ -46,4 +46,6 @@ extern void ast_scu_init_eth(u8 num); + extern void ast_scu_multi_func_eth(u8 num); + extern void ast_scu_multi_func_romcs(u8 num); + ++void ast_config_uart5_clk(void); ++ + #endif +diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h +index 1c02914fcb..92ea33b89a 100644 +--- a/arch/arm/include/asm/arch-aspeed/platform.h ++++ b/arch/arm/include/asm/arch-aspeed/platform.h +@@ -27,6 +27,7 @@ + #include <asm/arch/ast2400_platform.h> + #elif defined(AST_SOC_G5) + #include <asm/arch/ast_g5_platform.h> ++#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ + #else + #err "No define for platform.h" + #endif +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 12de9b8036..fff02dc000 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -538,3 +538,9 @@ void ast_scu_get_who_init_dram(void) + break; + } + } ++ ++void ast_config_uart5_clk(void) ++{ ++ ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) & ++ ~(1 << 28), AST_SCU_MISC2_CTRL); ++} +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 12496cea09..45353b8f78 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -19,6 +19,14 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++int board_early_init_f(void) ++{ ++ /* make sure uart5 is using 24MHz clock */ ++ ast_config_uart5_clk(); ++ ++ return 0; ++} ++ + int board_init(void) + { + bool sdmc_unlocked; diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch new file mode 100644 index 000000000..46a547282 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0005-enable-passthrough-in-uboot.patch @@ -0,0 +1,53 @@ +From 872e3fd3ae8f692ab11c49dbbd1c5b311c2aaad1 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Wed, 7 Nov 2018 13:57:57 +0800 +Subject: [PATCH] enable passthrough in uboot + +--- + arch/arm/mach-aspeed/ast-scu.c | 22 ++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5.c | 2 ++ + 2 files changed, 24 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index fff02dc000..d27f3d3ede 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -544,3 +544,25 @@ void ast_config_uart5_clk(void) + ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) & + ~(1 << 28), AST_SCU_MISC2_CTRL); + } ++ ++ ++void ast_enable_pass_through(void) ++{ ++ //Enable GPIOE pin mode, SCU80[16:23] = 00 */ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) & (~0x00FF0000), ++ AST_SCU_FUN_PIN_CTRL1); ++ ++ //Enable all pass through pins by setting SCU8C[15:12] = 0x3. ++ //Pass-through pins set: ++ //GPIOE0 -> GPIOE1 ++ //GPIOE2 -> GPIOE3 ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL4) | (0x3000), ++ AST_SCU_FUN_PIN_CTRL4); ++ ++ //Disable HWStrap for GPIOE pass-through mode ++ //The write operation to SCU70(0x1e6e2070) only can set to '1'. ++ //To clear to '0', it must write '1' to 0x1e6e207c ++ if (ast_scu_read(AST_SCU_HW_STRAP1) & (0x1 << 22)){ ++ ast_scu_write((0x1 << 22), AST_SCU_REVISION_ID); ++ } ++} +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 45353b8f78..02eb2c3990 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -23,6 +23,8 @@ int board_early_init_f(void) + { + /* make sure uart5 is using 24MHz clock */ + ast_config_uart5_clk(); ++ /*enable pass through*/ ++ ast_enable_pass_through(); + + return 0; + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0006-Add-Aspeed-g5-interrupt-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0006-Add-Aspeed-g5-interrupt-support.patch new file mode 100644 index 000000000..a659a3011 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0006-Add-Aspeed-g5-interrupt-support.patch @@ -0,0 +1,387 @@ +From ad92c1981f81fe28b901894db537a0c98d5956e5 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Wed, 14 Nov 2018 10:21:40 -0800 +Subject: [PATCH] Add Aspeed g5 interrupt support + +This adds a few new files to the board g5 directory. Several Intel +features require interrupts running in U-Boot, so this adds basic +interrupt registration and handling support. + +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +Change-Id: Id7072f1408dcf364968b1b74f2192e50a22a82f0 + +--- + Kconfig | 13 ++ + arch/arm/lib/interrupts.c | 11 ++ + board/aspeed/ast-g5/Makefile | 3 +- + board/aspeed/ast-g5/ast-g5-irq.c | 176 ++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-irq.h | 39 ++++++ + board/aspeed/ast-g5/ast-g5.c | 3 + + board/aspeed/ast-g5/ast-g5.h | 7 ++ + cmd/Kconfig | 5 + + configs/ast_g5_ncsi_2boot_defconfig | 1 + + configs/ast_g5_ncsi_defconfig | 1 + + configs/ast_g5_phy_defconfig | 1 + + 11 files changed, 259 insertions(+), 1 deletion(-) + create mode 100644 board/aspeed/ast-g5/ast-g5-irq.c + create mode 100644 board/aspeed/ast-g5/ast-g5-irq.h + create mode 100644 board/aspeed/ast-g5/ast-g5.h + +diff --git a/Kconfig b/Kconfig +index 3ceff25032..d6439d01ca 100644 +--- a/Kconfig ++++ b/Kconfig +@@ -115,6 +115,19 @@ if EXPERT + When disabling this, please check if malloc calls, maybe + should be replaced by calloc - if one expects zeroed memory. + endif ++ ++config USE_IRQ ++ bool "Use interrupts" ++ default n ++ ++config STACKSIZE_IRQ ++ int "Size for IRQ stack (only if USE_IRQ enabled)" ++ default 16384 ++ ++config STACKSIZE_FIQ ++ int "Size for FIQ stack (only if USE_IRQ enabled)" ++ default 16384 ++ + endmenu # General setup + + menu "Boot images" +diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c +index ed83043abb..a96b3aa070 100644 +--- a/arch/arm/lib/interrupts.c ++++ b/arch/arm/lib/interrupts.c +@@ -94,6 +94,17 @@ int disable_interrupts (void) + : "memory"); + return (old & 0x80) == 0; + } ++ ++int global_interrupts_enabled(void) ++{ ++ unsigned long old; ++ __asm__ __volatile__("mrs %0, cpsr\n" ++ : "=r" (old) ++ : ++ : "memory"); ++ return (old & 0x80) == 0; ++} ++ + #else + int interrupt_init (void) + { +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index d1d7f8525e..df4e63966e 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -1 +1,2 @@ +-obj-y = ast-g5.o ++obj-y += ast-g5.o ++obj-y += ast-g5-irq.o +diff --git a/board/aspeed/ast-g5/ast-g5-irq.c b/board/aspeed/ast-g5/ast-g5-irq.c +new file mode 100644 +index 0000000000..860f16cf05 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-irq.c +@@ -0,0 +1,176 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <netdev.h> ++ ++#include <asm/arch/ast_scu.h> ++#include <asm/arch/ast-sdmc.h> ++#include <asm/io.h> ++ ++#include "ast-g5.h" ++#include "ast-g5-irq.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#ifdef CONFIG_USE_IRQ ++ ++#define VIC_STATUS_L 0x80 ++#define VIC_STATUS_H 0x84 ++#define VIC_IRQ_SELECTION_L 0x98 ++#define VIC_IRQ_SELECTION_H 0x9C ++#define VIC_ENABLE_L 0xA0 ++#define VIC_ENABLE_H 0xA4 ++#define VIC_ENABLE_CLEAR_L 0xA8 ++#define VIC_ENABLE_CLEAR_H 0xAC ++#define VIC_INTERRUPT_CLEAR_L 0xD8 ++#define VIC_INTERRUPT_CLEAR_H 0xDC ++ ++#define VIC_CLEAR_ALL (~0) ++ ++int arch_interrupt_init_early(void) ++{ ++ writel(VIC_CLEAR_ALL, AST_VIC_BASE + VIC_ENABLE_CLEAR_L); ++ writel(VIC_CLEAR_ALL, AST_VIC_BASE + VIC_ENABLE_CLEAR_H); ++ return 0; ++} ++int arch_interrupt_init(void) ++{ ++ return 0; ++} ++ ++#define AST_IRQ_START_L 0 ++#define AST_IRQ_END_L 31 ++#define AST_IRQ_START_H 32 ++#define AST_IRQ_END_H 63 ++#define AST_IRQ_COUNT 64 ++static interrupt_handler_t *handlers[AST_IRQ_COUNT] = {NULL}; ++static unsigned long irq_total = 0; ++static unsigned long irq_counts[AST_IRQ_COUNT] = {0}; ++ ++int request_irq(int irq, interrupt_handler_t *handler) ++{ ++ if (irq < AST_IRQ_START_L || irq > AST_IRQ_END_H) { ++ printf("irq %d out of range\n", irq); ++ return -1; ++ } ++ if (handlers[irq]) { ++ printf("irq %d already in use (%p)\n", irq, handlers[irq]); ++ return -1; ++ } ++ handlers[irq] = handler; ++ if (irq < AST_IRQ_START_H) { ++ writel((1 << irq), AST_VIC_BASE + VIC_ENABLE_L); ++ } else { ++ writel((1 << (irq - AST_IRQ_START_H)), ++ AST_VIC_BASE + VIC_ENABLE_H); ++ } ++ return 0; ++} ++ ++int release_irq(int irq) ++{ ++ if (irq < AST_IRQ_START_L || irq > AST_IRQ_END_H) { ++ return -1; ++ } ++ if (handlers[irq]) { ++ handlers[irq] = NULL; ++ if (irq < AST_IRQ_START_H) { ++ writel((1 << irq), AST_VIC_BASE + VIC_ENABLE_CLEAR_L); ++ } else { ++ writel((1 << (irq - AST_IRQ_START_H)), ++ AST_VIC_BASE + VIC_ENABLE_CLEAR_H); ++ } ++ } ++ return 0; ++} ++ ++extern int global_interrupts_enabled(void); ++int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ int i; ++ int enabled = global_interrupts_enabled(); ++ unsigned long long irqs_enabled = ++ ((unsigned long long)readl(AST_VIC_BASE + VIC_ENABLE_H)) ++ << AST_IRQ_START_H ++ | readl(AST_VIC_BASE + VIC_ENABLE_L); ++ printf("interrupts %sabled\n", (enabled ? "en" : "dis")); ++ for (i = AST_IRQ_START_L; i < AST_IRQ_COUNT; i++) { ++ printf("% 2i (% 3s): %lu\n", i, ++ ((irqs_enabled & 1) ? "on" : "off"), irq_counts[i]); ++ irqs_enabled >>= 1; ++ } ++ printf("total: %lu\n", irq_total); ++ return 0; ++} ++ ++void do_irq(struct pt_regs *pt_regs) ++{ ++ uint32_t irq = readl(AST_VIC_BASE + VIC_STATUS_L); ++ int i; ++ irq_total++; ++ if (irq) { ++ // handler irq0-31 ++ for (i = AST_IRQ_START_L; i <= AST_IRQ_END_L; i++) { ++ if (irq & (1 << i)) { ++ irq_counts[i]++; ++ /* mask */ ++ writel((1 << i), ++ AST_VIC_BASE + VIC_ENABLE_CLEAR_L); ++ if (handlers[i]) { ++ handlers[i](pt_regs); ++ /* clear */ ++ writel((1 << i), ++ AST_VIC_BASE ++ + VIC_INTERRUPT_CLEAR_L); ++ /* unmask */ ++ writel((1 << i), ++ AST_VIC_BASE + VIC_ENABLE_L); ++ } else { ++ printf("unexpected interrupt %i; masking\n", ++ i); ++ /* clear; do not unmask */ ++ writel((1 << i), ++ AST_VIC_BASE ++ + VIC_INTERRUPT_CLEAR_L); ++ } ++ } ++ } ++ } ++ irq = readl(AST_VIC_BASE + VIC_STATUS_H); ++ if (irq) { ++ // handler irq32-63 ++ for (i = AST_IRQ_START_H; i <= AST_IRQ_END_H; i++) { ++ if (irq & (1 << (i - AST_IRQ_START_H))) { ++ irq_counts[i]++; ++ /* mask */ ++ writel((1 << (i - AST_IRQ_START_H)), ++ AST_VIC_BASE + VIC_ENABLE_CLEAR_H); ++ if (handlers[i]) { ++ handlers[i](pt_regs); ++ /* clear */ ++ writel((1 << (i - AST_IRQ_START_H)), ++ AST_VIC_BASE ++ + VIC_INTERRUPT_CLEAR_H); ++ /* unmask */ ++ writel((1 << (i - AST_IRQ_START_H)), ++ AST_VIC_BASE + VIC_ENABLE_H); ++ } else { ++ printf("unexpected interrupt %i; masking\n", ++ i); ++ /* clear; do not unmask */ ++ writel((1 << (i - AST_IRQ_START_H)), ++ AST_VIC_BASE ++ + VIC_INTERRUPT_CLEAR_H); ++ } ++ } ++ } ++ } ++} ++#endif +diff --git a/board/aspeed/ast-g5/ast-g5-irq.h b/board/aspeed/ast-g5/ast-g5-irq.h +new file mode 100644 +index 0000000000..703eeabf13 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-irq.h +@@ -0,0 +1,39 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#ifndef __AST_G5_IRQ_H__ ++#define __AST_G5_IRQ_H__ ++ ++#include <common.h> ++ ++#ifdef CONFIG_USE_IRQ ++ ++int arch_interrupt_init_early(void); ++ ++int request_irq(int irq, interrupt_handler_t *handler); ++ ++int release_irq(int irq); ++ ++#else /* CONFIG_USE_IRQ */ ++ ++int arch_interrupt_init_early(void) { ++ return 0; ++} ++ ++int request_irq(int irq, interrupt_handler_t *handler) { ++ return -1; ++} ++ ++int release_irq(int irq) { ++ return -1; ++} ++ ++#endif /* CONFIG_USE_IRQ */ ++ ++#endif /* __AST_G5_IRQ_H__ */ +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 02eb2c3990..ca25348178 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -17,6 +17,8 @@ + #include <asm/arch/regs-sdmc.h> + #include <asm/io.h> + ++#include "ast-g5.h" ++ + DECLARE_GLOBAL_DATA_PTR; + + int board_early_init_f(void) +@@ -25,6 +27,7 @@ int board_early_init_f(void) + ast_config_uart5_clk(); + /*enable pass through*/ + ast_enable_pass_through(); ++ arch_interrupt_init_early(); + + return 0; + } +diff --git a/board/aspeed/ast-g5/ast-g5.h b/board/aspeed/ast-g5/ast-g5.h +new file mode 100644 +index 0000000000..9fd10eccb3 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5.h +@@ -0,0 +1,7 @@ ++#ifndef _AST_G5_H_ ++#define _AST_G5_H_ ++ ++#include <common.h> ++#include "ast-g5-irq.h" ++ ++#endif /* _AST_G5_H_ */ +diff --git a/cmd/Kconfig b/cmd/Kconfig +index d69b817c82..33be2407d2 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -313,6 +313,11 @@ endmenu + + menu "Device access commands" + ++config CMD_IRQ ++ bool "interrupts - enable/disable interrupts" ++ depends on USE_IRQ ++ default y ++ + config CMD_DM + bool "dm - Access to driver model information" + depends on DM +diff --git a/configs/ast_g5_ncsi_2boot_defconfig b/configs/ast_g5_ncsi_2boot_defconfig +index 2d28c86966..d5b7894a9e 100644 +--- a/configs/ast_g5_ncsi_2boot_defconfig ++++ b/configs/ast_g5_ncsi_2boot_defconfig +@@ -33,3 +33,4 @@ CONFIG_CMD_CRC32=y + CONFIG_LOOPW=y + CONFIG_CMD_MEMTEST=y + CONFIG_CMD_MX_CYCLIC=y ++CONFIG_USE_IRQ=y +diff --git a/configs/ast_g5_ncsi_defconfig b/configs/ast_g5_ncsi_defconfig +index 74029ed514..9481e5fb6e 100644 +--- a/configs/ast_g5_ncsi_defconfig ++++ b/configs/ast_g5_ncsi_defconfig +@@ -11,3 +11,4 @@ CONFIG_HUSH_PARSER=y + CONFIG_OF_LIBFDT=y + CONFIG_SPI_FLASH=y + CONFIG_SYS_NS16550=y ++CONFIG_USE_IRQ=y +diff --git a/configs/ast_g5_phy_defconfig b/configs/ast_g5_phy_defconfig +index 767f3af605..4aefcf49e8 100644 +--- a/configs/ast_g5_phy_defconfig ++++ b/configs/ast_g5_phy_defconfig +@@ -12,3 +12,4 @@ CONFIG_HUSH_PARSER=y + CONFIG_OF_LIBFDT=y + CONFIG_SPI_FLASH=y + CONFIG_SYS_NS16550=y ++CONFIG_USE_IRQ=y diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch new file mode 100644 index 000000000..cbe0df0aa --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0007-Add-espi-support.patch @@ -0,0 +1,345 @@ +From 212e72b6df74af242b23443b252deed4d06129f4 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Wed, 14 Nov 2018 10:21:40 -0800 +Subject: [PATCH] Add espi support + +This adds basic eSPI support for U-Boot. The eSPI driver works best with +interrupts because the timing of the initialization with the PCH is not +trivial. + +The espi driver is currently just a bare-minimum driver allowing the +host to boot. In the future it may be expanded to have further +functions. + +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + arch/arm/include/asm/arch-aspeed/regs-scu.h | 2 + + board/aspeed/ast-g5/Makefile | 2 + + board/aspeed/ast-g5/ast-g5-espi.c | 248 ++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-intel.c | 16 ++ + board/aspeed/ast-g5/ast-g5.c | 3 + + 5 files changed, 271 insertions(+) + create mode 100644 board/aspeed/ast-g5/ast-g5-espi.c + create mode 100644 board/aspeed/ast-g5/ast-g5-intel.c + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h +index c9b91795d1..019c00036a 100644 +--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h ++++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h +@@ -554,6 +554,8 @@ + + #define CLK_25M_IN (0x1 << 23) + ++#define SCU_HW_STRAP_FAST_RESET (1 << 27) ++#define SCU_HW_STRAP_ESPI_ENABLED (1 << 25) + #define SCU_HW_STRAP_2ND_BOOT_WDT (0x1 << 17) + #define SCU_HW_STRAP_SUPER_IO_CONFIG (0x1 << 16) + #define SCU_HW_STRAP_VGA_CLASS_CODE (0x1 << 15) +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index df4e63966e..58e0c648f4 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -1,2 +1,4 @@ + obj-y += ast-g5.o ++obj-y += ast-g5-intel.o ++obj-y += ast-g5-espi.o + obj-y += ast-g5-irq.o +diff --git a/board/aspeed/ast-g5/ast-g5-espi.c b/board/aspeed/ast-g5/ast-g5-espi.c +new file mode 100644 +index 0000000000..7c82cdfd65 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-espi.c +@@ -0,0 +1,248 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <asm/io.h> ++#include <asm/arch/regs-scu.h> ++#include <asm/arch/ast_scu.h> ++#include <asm/arch/aspeed.h> ++ ++#include "ast-g5.h" ++ ++#define DEBUG_ESPI_ENABLED 1 ++#ifdef DEBUG_ESPI_ENABLED ++#define DBG_ESPI debug ++#else ++#define DBG_ESPI(...) ++#endif ++/* eSPI controller registers */ ++#define ESPI000 0x000 /* Engine Control. */ ++#define ESPI004 0x004 /* Engine Status. */ ++#define ESPI008 0x008 /* Interrupt Status. */ ++#define ESPI00C 0x00C /* Interrupt Enable. */ ++#define ESPI010 0x010 /* DMA Addr of Peripheral Channel Posted Rx pkt */ ++#define ESPI014 0x014 /* Control of Peripheral Channel Posted Rx pkt. */ ++#define ESPI018 0x018 /* Data port of Peripheral Channel Posted Rx pkt. */ ++#define ESPI020 0x020 /* DMA Addr of Peripheral Channel Posted Tx pkt. */ ++#define ESPI024 0x024 /* Control of Peripheral Channel Posted Tx pkt. */ ++#define ESPI028 0x028 /* Data port of Peripheral Channel Posted Tx pkt. */ ++#define ESPI030 0x030 /* DMA Addr of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI034 0x034 /* Control of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI038 0x038 /* Data port of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI040 0x040 /* DMA Addr of OOB Channel Rx pkt. */ ++#define ESPI044 0x044 /* Control of OOB Channel Rx pkt. */ ++#define ESPI048 0x048 /* Data port of OOB Channel Rx pkt. */ ++#define ESPI050 0x050 /* DMA Addr of OOB Channel Tx pkt. */ ++#define ESPI054 0x054 /* Control of OOB Channel Tx pkt. */ ++#define ESPI058 0x058 /* Data port of OOB Channel Tx pkt. */ ++#define ESPI060 0x060 /* DMA Addr of Flash Channel Rx pkt. */ ++#define ESPI064 0x064 /* Control of Flash Channel Rx pkt. */ ++#define ESPI068 0x068 /* Data port of Flash Channel Rx pkt. */ ++#define ESPI070 0x070 /* DMA Addr of Flash Channel Tx pkt. */ ++#define ESPI074 0x074 /* Control of Flash Channel Tx pkt. */ ++#define ESPI078 0x078 /* Data port of Flash Channel Tx pkt. */ ++#define ESPI084 0x084 /* Mapping Src Addr of Peripheral Channel Rx pkt. */ ++#define ESPI088 0x088 /* Mapping Tgt Addr of Peripheral Channel Rx pkt. */ ++#define ESPI08C 0x08C /* Mapping Addr Mask of Peripheral Channel Rx pkt. */ ++#define ESPI090 0x090 /* Mapping Target Addr and Mask of Flash Channel. */ ++#define ESPI094 0x094 /* Interrupt enable of System Event from Master. */ ++#define ESPI098 0x098 /* System Event from and to Master. */ ++#define ESPI09C 0x09C /* GPIO through Virtual Wire Channel. */ ++#define ESPI0A0 0x0A0 /* General Capabilities and Configurations. */ ++#define ESPI0A4 0x0A4 /* Channel 0 Capabilities and Configurations. */ ++#define ESPI0A8 0x0A8 /* Channel 1 Capabilities and Configurations. */ ++#define ESPI0AC 0x0AC /* Channel 2 Capabilities and Configurations. */ ++#define ESPI0B0 0x0B0 /* Channel 3 Capabilities and Configurations. */ ++#define ESPI0B4 0x0B4 /* GPIO Direction of Virtual Wire Channel. */ ++#define ESPI0B8 0x0B8 /* GPIO Selection of Virtual Wire Channel. */ ++#define ESPI0BC 0x0BC /* GPIO Reset Selection of Virtual Wire Channel. */ ++#define ESPI100 0x100 /* Interrupt enable of System Event 1 from Master. */ ++#define ESPI104 0x104 /* System Event 1 from and to Master. */ ++#define ESPI110 0x110 /* Interrupt type 0 of System Event from Master. */ ++#define ESPI114 0x114 /* Interrupt type 1 of System Event from Master. */ ++#define ESPI118 0x118 /* Interrupt type 2 of System Event from Master. */ ++#define ESPI11C 0x11C /* Interrupt status of System Event from Master. */ ++#define ESPI120 0x120 /* Interrupt type 0 of System Event 1 from Master. */ ++#define ESPI124 0x124 /* Interrupt type 1 of System Event 1 from Master. */ ++#define ESPI128 0x128 /* Interrupt type 2 of System Event 1 from Master. */ ++#define ESPI12C 0x12C /* Interrupt status of System Event 1 from Master. */ ++#define ESPICFG004 0x004 /* Device Identification. */ ++#define ESPICFG008 0x008 /* General Capabilities and Configurations. */ ++#define ESPICFG010 0x010 /* Channel 0 Capabilities and Configurations. */ ++#define ESPICFG020 0x020 /* Channel 1 Capabilities and Configurations. */ ++#define ESPICFG030 0x030 /* Channel 2 Capabilities and Configurations. */ ++#define ESPICFG040 0x040 /* Channel 3 Capabilities and Configurations. */ ++#define ESPICFG044 0x044 /* Channel 3 Capabilities and Configurations 2. */ ++#define ESPICFG800 0x800 /* GPIO Direction of Virtual Wire Channel. */ ++#define ESPICFG804 0x804 /* GPIO Selection of Virtual Wire Channel. */ ++#define ESPICFG808 0x808 /* GPIO Reset Selection of Virtual Wire Channel. */ ++#define ESPICFG810 0x810 /* Mapping Src Addr of Peripheral Channel Rx pkt */ ++#define ESPICFG814 0x814 /* Mapping Tgt Addr of Peripheral Channel Rx pkt */ ++#define ESPICFG818 0x818 /* Mapping Addr Mask of Peripheral Channel Rx pkt */ ++ ++/* ESPI000 bits */ ++#define AST_ESPI_OOB_CHRDY (1 << 4) ++#define AST_ESPI_FLASH_SW_CHRDY (0x1 << 7) ++#define AST_ESPI_FLASH_SW_READ (0x1 << 10) ++#define ASPEED_ESPI_CTRL_SW_RESET GENMASK(31, 24) ++ ++/* ESPI00C bits (Interrupt Enable) */ ++#define AST_ESPI_IEN_SYS_EV (1 << 8) ++#define AST_ESPI_IEN_GPIO_EV (1 << 9) ++#define AST_ESPI_IEN_HW_RST (1 << 31) ++ ++/* ESPI008 bits ISR */ ++#define AST_ESPI_VW_SYS_EVT (1 << 8) ++#define AST_ESPI_VW_SYS_EV1 (1 << 22) ++ ++/* ESPI098 and ESPI11C bits */ ++#define AST_ESPI_OOB_RST_WARN (1 << 6) ++#define AST_ESPI_HOST_RST_WARN (1 << 8) ++#define AST_ESPI_OOB_RST_ACK (1 << 16) ++#define AST_ESPI_SL_BT_DONE (1 << 20) ++#define AST_ESPI_SL_BT_STATUS (1 << 23) ++#define AST_ESPI_HOST_RST_ACK (1 << 27) ++ ++/* ESPI104 bits */ ++#define AST_ESPI_SUS_WARN (1 << 0) ++#define AST_ESPI_SUS_ACK (1 << 20) ++ ++/* LPC chip ID */ ++#define SCR0SIO 0x170 ++#define IRQ_SRC_ESPI 23 /* IRQ 23 */ ++ ++static void espi_handshake_ack(void) ++{ ++ // IRQ only serviced if strapped, so no strap check ++ if (!(readl(AST_ESPI_BASE + ESPI098) & AST_ESPI_SL_BT_STATUS)) { ++ DBG_ESPI("Setting espi slave boot done\n"); ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) ++ | AST_ESPI_SL_BT_STATUS | AST_ESPI_SL_BT_DONE; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ } ++ ++ if (readl(AST_ESPI_BASE + ESPI104) & AST_ESPI_SUS_WARN) { ++ DBG_ESPI("Boot SUS WARN set %08x\n", ++ readl(AST_ESPI_BASE + ESPI104)); ++ uint32_t v = readl(AST_ESPI_BASE + ESPI104) | AST_ESPI_SUS_ACK; ++ writel(v, AST_ESPI_BASE + ESPI104); ++ } ++} ++ ++static int espi_irq_handler(struct pt_regs *regs) ++{ ++ uint32_t irq_status = readl(AST_ESPI_BASE + ESPI008); ++ DBG_ESPI("ISR irq_status : 0x%08X\n", irq_status); ++ ++ if (irq_status & AST_ESPI_VW_SYS_EV1) { ++ uint32_t sys1_status = readl(AST_ESPI_BASE + ESPI12C); ++ uint32_t sys1_event = readl(AST_ESPI_BASE + ESPI104); ++ ++ DBG_ESPI("sys1_status : 0x%08X\n", sys1_status); ++ if (sys1_status & AST_ESPI_SUS_WARN) { ++ DBG_ESPI("SUS WARN ev: %08X\n", sys1_event); ++ if (sys1_event & AST_ESPI_SUS_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI104) ++ | AST_ESPI_SUS_ACK; ++ writel(v, AST_ESPI_BASE + ESPI104); ++ } ++ } ++ writel(sys1_status, AST_ESPI_BASE + ESPI12C); // clear status ++ } ++ ++ if (irq_status & AST_ESPI_VW_SYS_EVT) { ++ uint32_t sys_status = readl(AST_ESPI_BASE + ESPI11C); ++ uint32_t sys_event = readl(AST_ESPI_BASE + ESPI098); ++ ++ if (!(sys_event & AST_ESPI_SL_BT_STATUS)) { ++ DBG_ESPI("Setting espi slave boot done\n"); ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) ++ | AST_ESPI_SL_BT_STATUS | AST_ESPI_SL_BT_DONE; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ } ++ ++ DBG_ESPI("sys_status : 0x%08X\n", sys_status); ++ if (sys_status & AST_ESPI_HOST_RST_WARN) { ++ DBG_ESPI("HOST_RST_WARN ev: %08X\n", sys_event); ++ if (sys_event & AST_ESPI_HOST_RST_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) ++ | AST_ESPI_HOST_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ } ++ } ++ if (sys_status & AST_ESPI_OOB_RST_WARN) { ++ DBG_ESPI("OOB_RST_WARN ev: %08X\n", sys_event); ++ if (sys_event & AST_ESPI_OOB_RST_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) ++ | AST_ESPI_OOB_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ } ++ } ++ writel(sys_status, AST_ESPI_BASE + ESPI11C); // clear status ++ } ++ ++ if (irq_status & AST_ESPI_IEN_HW_RST) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI000); ++ writel(v & ~ASPEED_ESPI_CTRL_SW_RESET, AST_ESPI_BASE + ESPI000); ++ writel(v | ASPEED_ESPI_CTRL_SW_RESET, AST_ESPI_BASE + ESPI000); ++ espi_handshake_ack(); ++ } ++ ++ writel(irq_status, AST_ESPI_BASE + ESPI008); // clear irq_status ++ return 0; ++} ++ ++void espi_init(void) ++{ ++ if (readl(AST_SCU_BASE + AST_SCU_HW_STRAP1) ++ & SCU_HW_STRAP_ESPI_ENABLED) { ++ uint32_t v; ++ DBG_ESPI("espi_init\n"); ++ ++ /* Block flash access from Host */ ++ v = readl(AST_ESPI_BASE + ESPI000) & ~AST_ESPI_FLASH_SW_CHRDY; ++ v |= AST_ESPI_FLASH_SW_READ; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ /* Set SIO register 0x28 to 0xa8 as a faked ASPEED ChipID for ++ * BIOS using in eSPI mode */ ++ v = readl(AST_LPC_BASE + SCR0SIO) & ~0x000000ff; ++ writel(v, AST_LPC_BASE + SCR0SIO); ++ v = readl(AST_LPC_BASE + SCR0SIO) | 0xa8; ++ writel(v, AST_LPC_BASE + SCR0SIO); ++ ++ v = readl(AST_ESPI_BASE + ESPI000) | AST_ESPI_OOB_CHRDY; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ writel(0, AST_ESPI_BASE + ESPI110); ++ writel(0, AST_ESPI_BASE + ESPI114); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN, ++ AST_ESPI_BASE + ESPI118); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN, ++ AST_ESPI_BASE + ESPI094); ++ ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE + ESPI120); // int type 0 susp warn ++ writel(0, AST_ESPI_BASE + ESPI124); ++ writel(0, AST_ESPI_BASE + ESPI128); ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE ++ + ESPI100); // Enable sysev1 ints for susp warn ++ ++ writel(AST_ESPI_IEN_SYS_EV | AST_ESPI_IEN_HW_RST ++ | AST_ESPI_VW_SYS_EV1, ++ AST_ESPI_BASE + ESPI00C); // Enable events ++ ++ espi_handshake_ack(); ++ ++ request_irq(IRQ_SRC_ESPI, espi_irq_handler); ++ } else { ++ DBG_ESPI("No espi strap\n"); ++ } ++} +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +new file mode 100644 +index 0000000000..e79235c8d0 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -0,0 +1,16 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++ ++extern void espi_init(void); ++void ast_g5_intel(void) ++{ ++ espi_init(); ++} +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index ca25348178..cab5fabcef 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -21,6 +21,8 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++extern void ast_g5_intel(void); ++ + int board_early_init_f(void) + { + /* make sure uart5 is using 24MHz clock */ +@@ -84,6 +86,7 @@ int board_init(void) + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->flags = 0; + ++ ast_g5_intel(); + return 0; + } + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch new file mode 100644 index 000000000..950b3247d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0008-add-sgio-support-for-port80-snoop-post-LEDs.patch @@ -0,0 +1,158 @@ +From 248f12a6a02819a5318025df0868dfd40efa2207 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Wed, 14 Nov 2018 12:09:52 -0800 +Subject: [PATCH] add sgio support for port80 snoop post LEDs + +This ties together the port 80 snooping to the SGPIO output that +ultimately drives the POST code LEDs. + +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +Change-Id: Iaa1b91cd40f4b6323dba0598da373cb631459e66 + +--- + arch/arm/include/asm/arch-aspeed/ast_scu.h | 1 + + arch/arm/mach-aspeed/ast-scu.c | 8 ++ + board/aspeed/ast-g5/ast-g5-intel.c | 96 ++++++++++++++++++++++ + 3 files changed, 105 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h +index 06825cebbf..369c4e3b60 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_scu.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h +@@ -45,6 +45,7 @@ extern u32 ast_scu_get_vga_memsize(void); + extern void ast_scu_init_eth(u8 num); + extern void ast_scu_multi_func_eth(u8 num); + extern void ast_scu_multi_func_romcs(u8 num); ++extern void ast_scu_multi_func_sgpio(void); + + void ast_config_uart5_clk(void); + +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index d27f3d3ede..3a9ba05bf2 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -449,6 +449,14 @@ void ast_scu_multi_func_romcs(u8 num) + SCU_FUN_PIN_ROMCS(num), AST_SCU_FUN_PIN_CTRL3); + } + ++void ast_scu_multi_func_sgpio(void) ++{ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL2) | ++ SCU_FUN_PIN_SGPMI | SCU_FUN_PIN_SGPMO | ++ SCU_FUN_PIN_SGPMLD | SCU_FUN_PIN_SGPMCK, ++ AST_SCU_FUN_PIN_CTRL2); ++} ++ + u32 ast_scu_revision_id(void) + { + int i; +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index e79235c8d0..c2a8b33aec 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -8,9 +8,105 @@ + */ + + #include <common.h> ++#include <asm/io.h> ++#include <asm/arch/regs-scu.h> ++#include <asm/arch/ast_scu.h> ++#include <asm/arch/aspeed.h> ++ ++#include "ast-g5.h" ++ ++#define LPC_SNOOP_ADDR 0x80 ++#define HICR5 0x080 /* Host Interface Control Register 5 */ ++#define HICR6 0x084 /* Host Interface Control Register 6 */ ++#define HICR7 0x088 /* Host Interface Control Register 7 */ ++#define HICR8 0x08c /* Host Interface Control Register 8 */ ++#define SNPWADR 0x090 /* LPC Snoop Address Register */ ++#define SNPWDR 0x094 /* LPC Snoop Data Register */ ++#define HICR9 0x098 /* Host Interface Control Register 9 */ ++#define HICRA 0x09c /* Host Interface Control Register A */ ++#define LHCR0 0x0a0 /* LPC Host Control Register 0 */ ++#define LHCR1 0x0a4 /* LPC Host Control Register 1 */ ++#define LHCR2 0x0a8 /* LPC Host Control Register 2 */ ++#define LHCR3 0x0ac /* LPC Host Control Register 3 */ ++#define LHCR4 0x0b0 /* LPC Host Control Register 4 */ ++#define LHCR5 0x0b4 /* LPC Host Control Register 5 */ ++#define LHCR6 0x0b8 /* LPC Host Control Register 6 */ ++#define LHCR7 0x0bc /* LPC Host Control Register 7 */ ++#define LHCR8 0x0c0 /* LPC Host Control Register 8 */ ++#define PCCR6 0x0c4 /* Post Code Control Register 6 */ ++#define LHCRA 0x0c8 /* LPC Host Control Register A */ ++#define LHCRB 0x0cc /* LPC Host Control Register B */ ++#define PCCR4 0x0d0 /* Post Code Control Register 4 */ ++#define PCCR5 0x0d4 /* Post Code Control Register 5 */ ++#define HICRB 0x100 /* Host Interface Control Register B */ ++#define HICRC 0x104 /* Host Interface Control Register C */ ++/* HICR5 Bits */ ++#define HICR5_EN_SIOGIO (1 << 31) /* Enable SIOGIO */ ++#define HICR5_EN80HGIO (1 << 30) /* Enable 80hGIO */ ++#define HICR5_SEL80HGIO (0x1f << 24) /* Select 80hGIO */ ++#define SET_SEL80HGIO(x) ((x & 0x1f) << 24) /* Select 80hGIO Offset */ ++#define HICR5_UNKVAL_MASK 0x1FFF0000 /* Bits with unknown values on reset */ ++#define HICR5_ENINT_SNP0W (1 << 1) /* Enable Snooping address 0 */ ++#define HICR5_EN_SNP0W (1 << 0) /* Enable Snooping address 0 */ ++ ++/* HRCR6 Bits */ ++#define HICR6_STR_SNP0W (1 << 0) /* Interrupt Status Snoop address 0 */ ++#define HICR6_STR_SNP1W (1 << 1) /* Interrupt Status Snoop address 1 */ ++ ++/* HICRB Bits */ ++#define HICRB_EN80HSGIO (1 << 13) /* Enable 80hSGIO */ ++ ++#define SGPIO_CLK_DIV(N) ((N) << 16) ++#define SGPIO_BYTES(N) ((N) << 6) ++#define SGPIO_ENABLE 1 ++#define GPIO254 0x254 ++ ++static void sgpio_init(void) ++{ ++ uint32_t value; ++ /* ++ 33.4.2 ++ LPC port80h direct to SGPIO ++ In AST2500 SGPIO, it supports output data from 80h. It always uses SGPIOA. ++ 1. Configure LPC snoop function. ++ (a) Set SNPWADR(0x1e789090)[15:0] to 0x80. ++ (b) Set HICR5(0x1e789080)[0] to 1 to enable snoop. ++ 2. Configure SGPIO ++ (a) Set GPIO254[9:6] to larger than or equal to 0x1. ++ (b) Set GPIO254[0] to 1 to enable SGPIO. ++ 3. Set SuperIO ++ (a) Set SIOR7 30h to 0x40. ++ */ ++ /* make sure multi-pin stuff goes in our favor */ ++ ast_scu_multi_func_sgpio(); ++ ++ /* set lpc snoop #0 to port 0x80 */ ++ value = readl(AST_LPC_BASE + SNPWADR) & 0xffff0000; ++ writel(value | LPC_SNOOP_ADDR, AST_LPC_BASE + SNPWADR); ++ ++ /* clear interrupt status */ ++ value = readl(AST_LPC_BASE + HICR6); ++ value |= HICR6_STR_SNP0W | HICR6_STR_SNP1W; ++ writel(value, AST_LPC_BASE + HICR6); ++ ++ /* enable lpc snoop #0 and SIOGIO */ ++ value = readl(AST_LPC_BASE + HICR5) & ~(HICR5_UNKVAL_MASK); ++ value |= HICR5_EN_SIOGIO | HICR5_EN_SNP0W; ++ writel(value, AST_LPC_BASE + HICR5); ++ ++ ++ /* enable port80h snoop on SGPIO */ ++ value = readl(AST_LPC_BASE + HICRB) | HICRB_EN80HSGIO; ++ writel(value, AST_LPC_BASE + HICRB); ++ ++ /* set the gpio clock to 2MHz */ ++ value = SGPIO_CLK_DIV(24) | SGPIO_BYTES(10) | SGPIO_ENABLE; ++ writel(value, AST_GPIO_BASE + GPIO254); ++} + + extern void espi_init(void); + void ast_g5_intel(void) + { + espi_init(); ++ sgpio_init(); + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch new file mode 100644 index 000000000..ee93e9884 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch @@ -0,0 +1,424 @@ +From 34ceaf8ee2c6556045f00b911c001bcc2f91c1f8 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Fri, 16 Nov 2018 09:58:01 -0800 +Subject: [PATCH] Add basic GPIO support + +Add a table of well-known gpios (such as FP LEDs and FF UPD jumper) and +initialize them at boot. + +Add a mechanism to get/set well known gpios from command line. + +Change-Id: I4136a5ccb048b3604f13b17ea0c18a4bc596c249 +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + + +--- + board/aspeed/ast-g5/Makefile | 1 + + board/aspeed/ast-g5/ast-g5-gpio.c | 202 +++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-gpio.h | 103 +++++++++++++++ + board/aspeed/ast-g5/ast-g5-intel.c | 45 +++++++ + board/aspeed/ast-g5/ast-g5.h | 1 + + 5 files changed, 352 insertions(+) + create mode 100644 board/aspeed/ast-g5/ast-g5-gpio.c + create mode 100644 board/aspeed/ast-g5/ast-g5-gpio.h + +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index 58e0c648f4..2970ae5741 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -2,3 +2,4 @@ obj-y += ast-g5.o + obj-y += ast-g5-intel.o + obj-y += ast-g5-espi.o + obj-y += ast-g5-irq.o ++obj-y += ast-g5-gpio.o +diff --git a/board/aspeed/ast-g5/ast-g5-gpio.c b/board/aspeed/ast-g5/ast-g5-gpio.c +new file mode 100644 +index 0000000000..dc6962f4ba +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-gpio.c +@@ -0,0 +1,202 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <asm/io.h> ++#include <asm/arch/regs-scu.h> ++#include <asm/arch/ast_scu.h> ++#include <asm/arch/aspeed.h> ++ ++#include "ast-g5.h" ++#include "ast-g5-gpio.h" ++ ++typedef struct _gpio_bases { ++ uint32_t u32ddr; /* data and direction registers */ ++ uint32_t u32intcfg; /* interrupt config */ ++ uint32_t u32debounce; /* debounce config */ ++ uint32_t u32cmdsrc; /* command source config */ ++} sGPIO_BASES; ++ ++static const sGPIO_BASES GPIO_BASES[] = { ++ /* ABCD */ ++ {AST_GPIO_BASE + 0x0000, AST_GPIO_BASE + 0x0008, ++ AST_GPIO_BASE + 0x0040, AST_GPIO_BASE + 0x0060}, ++ /* EFGH */ ++ {AST_GPIO_BASE + 0x0020, AST_GPIO_BASE + 0x0028, ++ AST_GPIO_BASE + 0x0048, AST_GPIO_BASE + 0x0068}, ++ /* IJKL */ ++ {AST_GPIO_BASE + 0x0070, AST_GPIO_BASE + 0x0098, ++ AST_GPIO_BASE + 0x00b0, AST_GPIO_BASE + 0x0090}, ++ /* MNOP */ ++ {AST_GPIO_BASE + 0x0078, AST_GPIO_BASE + 0x00e8, ++ AST_GPIO_BASE + 0x0100, AST_GPIO_BASE + 0x00e0}, ++ /* QRST */ ++ {AST_GPIO_BASE + 0x0080, AST_GPIO_BASE + 0x0118, ++ AST_GPIO_BASE + 0x0130, AST_GPIO_BASE + 0x0110}, ++ /* UVWX */ ++ {AST_GPIO_BASE + 0x0088, AST_GPIO_BASE + 0x0148, ++ AST_GPIO_BASE + 0x0160, AST_GPIO_BASE + 0x0140}, ++ /* YZAB */ ++ {AST_GPIO_BASE + 0x01e0, AST_GPIO_BASE + 0x0178, ++ AST_GPIO_BASE + 0x0190, AST_GPIO_BASE + 0x0170}, ++ /* AC__ */ ++ {AST_GPIO_BASE + 0x01e8, AST_GPIO_BASE + 0x01a8, ++ AST_GPIO_BASE + 0x01c0, AST_GPIO_BASE + 0x01a0}, ++}; ++ ++static size_t gpio_max = 0; ++static const GPIOValue * gpio_table = NULL; ++ ++void gpio_set_value(int n, int asserted) ++{ ++ uint8_t port; ++ uint8_t pin; ++ uint32_t base; ++ uint8_t shift; ++ uint8_t assert; ++ uint32_t gpio_value; ++ ++ if (n >= gpio_max || !gpio_table) { ++ return; ++ } ++ port = GPIO_PORT(gpio_table[n].u8PortPin); ++ assert = GPIO_ASSERT(gpio_table[n].u8PinCFG); ++ pin = GPIO_PIN(gpio_table[n].u8PortPin); ++ base = GPIO_BASES[GPIO_GROUP(port)].u32ddr; ++ shift = GPIO_SHIFT(port, pin); ++ ++ gpio_value = readl(base + GPIO_DATA_VALUE); ++ if ((assert && asserted) || !(assert || asserted)) { ++ // set the bit ++ gpio_value |= (1 << shift); ++ } else { ++ // clear the bit ++ gpio_value &= ~(1 << shift); ++ } ++ writel(gpio_value, base + GPIO_DATA_VALUE); ++} ++ ++int gpio_get_value(int n) ++{ ++ uint8_t port; ++ uint8_t pin; ++ uint32_t base; ++ uint8_t shift; ++ uint8_t assert; ++ uint32_t gpio_value; ++ ++ if (n >= gpio_max || !gpio_table) { ++ return -1; ++ } ++ port = GPIO_PORT(gpio_table[n].u8PortPin); ++ assert = GPIO_ASSERT(gpio_table[n].u8PinCFG); ++ pin = GPIO_PIN(gpio_table[n].u8PortPin); ++ base = GPIO_BASES[GPIO_GROUP(port)].u32ddr; ++ shift = GPIO_SHIFT(port, pin); ++ ++ gpio_value = readl(base + GPIO_DATA_VALUE); ++ gpio_value >>= shift; ++ gpio_value &= 1; ++ // the output here is the logical output, which is ++ // NOT (value XOR assert) ++ // This just gets there without a conditional ++ gpio_value ^= assert; ++ return !gpio_value; ++} ++ ++void gpio_init(const GPIOValue* table, size_t count) ++{ ++ uint32_t pclk, value; ++ int i; ++ ++ gpio_table = table; ++ gpio_max = count; ++ /* set up the debounce timers (in units of PCLK cycles) */ ++ pclk = ast_get_ahbclk(); ++ /* GPIO_DEBOUNCE_120us */ ++ writel((pclk / 1000000) * 120, AST_GPIO_BASE + GPIO_DEBOUNCE_TIMER_0); ++ /* GPIO_DEBOUNCE_8ms */ ++ writel((pclk / 1000000) * 8000, AST_GPIO_BASE + GPIO_DEBOUNCE_TIMER_1); ++ /* GPIO_DEBOUNCE_16ms */ ++ writel((pclk / 1000000) * 16000, AST_GPIO_BASE + GPIO_DEBOUNCE_TIMER_2); ++ ++ for (i = 0; i < gpio_max; i++) { ++ uint8_t port; ++ uint8_t pin; ++ uint32_t base; ++ uint8_t shift; ++ uint8_t assert; ++ uint8_t init_val; ++ ++ port = GPIO_PORT(gpio_table[i].u8PortPin); ++ pin = GPIO_PIN(gpio_table[i].u8PortPin); ++ base = GPIO_BASES[GPIO_GROUP(port)].u32ddr; ++ shift = GPIO_SHIFT(port, pin); ++ ++ /* set direction */ ++ value = readl(base + GPIO_DIRECTION); ++ if (gpio_table[i].u8PinCFG & GPCFG_OUTPUT_EN) ++ value |= (1 << shift); ++ else ++ value &= ~(1 << shift); ++ writel(value, base + GPIO_DIRECTION); ++ ++ /* set data value */ ++ value = readl(base + GPIO_DATA_VALUE); ++ assert = GPIO_ASSERT(gpio_table[i].u8PinCFG); ++ init_val = gpio_table[i].u8Value; ++ if ((assert && init_val) || !(assert || init_val)) ++ value |= (1 << shift); ++ else ++ value &= ~(1 << shift); ++ writel(value, base + GPIO_DATA_VALUE); ++ ++ /* set debounce */ ++ base = GPIO_BASES[GPIO_GROUP(port)].u32debounce; ++ value = readl(base + GPIO_DEBOUNCE_SEL_0); ++ if (gpio_table[i].u8Debounce & 0x01) ++ value |= (1 << shift); ++ else ++ value &= ~(1 << shift); ++ writel(value, base + GPIO_DEBOUNCE_SEL_0); ++ value = readl(base + GPIO_DEBOUNCE_SEL_1); ++ if (gpio_table[i].u8Debounce & 0x02) ++ value |= (1 << shift); ++ else ++ value &= ~(1 << shift); ++ writel(value, base + GPIO_DEBOUNCE_SEL_1); ++ } ++} ++ ++int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ int n; ++ if (argc < 3) { ++ return 1; ++ } ++ n = simple_strtoul(argv[2], NULL, 0); ++ if (argv[1][0] == 'g') { ++ printf("%d\n", gpio_get_value(n)); ++ return 0; ++ } ++ if (argc < 4) { ++ return 1; ++ } ++ if (argv[1][0] == 's') { ++ int value; ++ value = simple_strtoul(argv[3], NULL, 0); ++ gpio_set_value(n, value); ++ return 0; ++ } ++ ++ return 1; ++} ++U_BOOT_CMD(gpio, 4, 0, do_gpio, ++ "do stuff with gpios <set|get> [n] [value]", ++ ""); +diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h +new file mode 100644 +index 0000000000..54b7388a22 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-gpio.h +@@ -0,0 +1,103 @@ ++#ifndef __HW_GPIO_H__ ++#define __HW_GPIO_H__ ++ ++#define GPIO_PORT_A 0 ++#define GPIO_PORT_B 1 ++#define GPIO_PORT_C 2 ++#define GPIO_PORT_D 3 ++#define GPIO_PORT_E 4 ++#define GPIO_PORT_F 5 ++#define GPIO_PORT_G 6 ++#define GPIO_PORT_H 7 ++#define GPIO_PORT_I 8 ++#define GPIO_PORT_J 9 ++#define GPIO_PORT_K 10 ++#define GPIO_PORT_L 11 ++#define GPIO_PORT_M 12 ++#define GPIO_PORT_N 13 ++#define GPIO_PORT_O 14 ++#define GPIO_PORT_P 15 ++#define GPIO_PORT_Q 16 ++#define GPIO_PORT_R 17 ++#define GPIO_PORT_S 18 ++#define GPIO_PORT_T 19 ++#define GPIO_PORT_U 20 ++#define GPIO_PORT_V 21 ++#define GPIO_PORT_W 22 ++#define GPIO_PORT_X 23 ++#define GPIO_PORT_Y 24 ++#define GPIO_PORT_Z 25 ++#define GPIO_PORT_AA 26 ++#define GPIO_PORT_AB 27 ++#define GPIO_PORT_AC 28 ++ ++#define GPIO_PIN_0 0 ++#define GPIO_PIN_1 1 ++#define GPIO_PIN_2 2 ++#define GPIO_PIN_3 3 ++#define GPIO_PIN_4 4 ++#define GPIO_PIN_5 5 ++#define GPIO_PIN_6 6 ++#define GPIO_PIN_7 7 ++ ++#define GPIO_DEBOUNCE_TIMER_0 0x50 ++#define GPIO_DEBOUNCE_TIMER_1 0x54 ++#define GPIO_DEBOUNCE_TIMER_2 0x58 ++ ++/* relative to u32ddr base */ ++#define GPIO_DATA_VALUE 0x00 ++#define GPIO_DIRECTION 0x04 ++/* relative to u32intcfg base */ ++#define GPIO_INT_ENABLE 0x00 ++#define GPIO_INT_SENSE0 0x04 ++#define GPIO_INT_SENSE1 0x18 ++#define GPIO_INT_SENSE2 0x1c ++#define GPIO_INT_STATUS 0x20 ++#define GPIO_RESET_TOL 0x24 ++/* relative to u32debounce base */ ++#define GPIO_DEBOUNCE_SEL_0 0 ++#define GPIO_DEBOUNCE_SEL_1 4 ++/* relative to u32cmdsrc base */ ++#define GPIO_CMD_SRC_0 0 ++#define GPIO_CMD_SRC_1 4 ++ ++#define PORT_PIN(PORT, PIN) (((PORT) << 3) | ((PIN)&0x07)) ++#define GPIO_PIN(N) (N & 0x07) ++#define GPIO_PORT(N) (N >> 3) ++#define GPIO_SHIFT(PORT, PIN) ((PIN) + (((PORT) % 4) * 8)) ++#define GPIO_GROUP(PORT) ((PORT) / 4) ++#define GPIO_ASSERT(N) (((N) >> 4) & 0x01) ++ ++#define ID_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_6) ++#define GRN_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_4) ++#define AMB_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_5) ++#define FORCE_BMC_UPDATE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_0) ++#define TPM_EN_PULSE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_6) ++ ++ ++// GPIO Configuration Register bits ++#define GPCFG_EVENT_TO_SMI (1 << 7) // 1 == enabled ++#define GPCFG_EVENT_TO_IRQ (1 << 6) // 1 == enabled ++#define GPCFG_DEBOUNCE_EN (1 << 5) // 1 == input debounce, 0 == pulse output ++#define GPCFG_ACTIVE_HIGH (1 << 4) // 1 == Active high ++#define GPCFG_LEVEL_TRIG (1 << 3) // 1 == level (default), 0 == edge ++#define GPCFG_OUTPUT_EN (1 << 0) // 1 == Output enabled ++ ++// GPIO Debounce and Blink Configuration Register bits ++#define GPIO_DEBOUNCE_NONE 0x00 ++#define GPIO_DEBOUNCE_60US 0x01 ++#define GPIO_DEBOUNCE_8MS 0x02 ++#define GPIO_DEBOUNCE_16MS 0x03 ++ ++typedef struct { ++ uint8_t u8PortPin; ++ uint8_t u8PinCFG; ++ uint8_t u8Value; ++ uint8_t u8Debounce; ++} GPIOValue; ++ ++void gpio_init(const GPIOValue* table, size_t count); ++void gpio_set_value(int n, int asserted); ++int gpio_get_value(int n); ++ ++#endif /* __HW_GPIO_H__ */ +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index c2a8b33aec..1868c230eb 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -14,6 +14,50 @@ + #include <asm/arch/aspeed.h> + + #include "ast-g5.h" ++#include "ast-g5-gpio.h" ++ ++/* Names to match the GPIOs */ ++enum gpio_names { ++ GPIO_ID_LED = 0, ++ GPIO_GREEN_LED, ++ GPIO_AMBER_LED, ++ GPIO_FF_UPD_JUMPER, ++ GPIO_ENABLE_TPM_PULSE, ++}; ++ ++#define GPIO_CFG_DEFAULT (GPCFG_ACTIVE_HIGH | GPCFG_LEVEL_TRIG) ++// Active High, Level, Output Disabled ++ ++#define GPIO_CFG_LOW_INPUT (GPCFG_LEVEL_TRIG) ++// Active Low, Level, Output Disabled ++ ++#define GPIO_CFG_FP_LED (GPCFG_OUTPUT_EN) ++// Active High, Pull-up, Level, Output Enabled ++ ++// Format is: ++// GPIO PORT, GPIO PIN Number, GPIO PIN Configuration, GPIO PIN Value, GPIO ++// Debounce/Blink Setting ++static const GPIOValue gpio_table[] = { ++ /* ID LED pin S6 - low asserted, 0=on */ ++ [GPIO_ID_LED] = {ID_LED_PORT_PIN, GPIO_CFG_FP_LED, 0, ++ GPIO_DEBOUNCE_NONE}, ++ ++ /* Green LED pin S4 - high asserted, 0=off */ ++ [GPIO_GREEN_LED] = {GRN_LED_PORT_PIN, GPIO_CFG_FP_LED, 1, ++ GPIO_DEBOUNCE_NONE}, ++ ++ /* Amber LED pin S5 - high asserted, 0=off */ ++ [GPIO_AMBER_LED] = {AMB_LED_PORT_PIN, GPIO_CFG_FP_LED, 1, ++ GPIO_DEBOUNCE_NONE}, ++ ++ /* Force Update Jumper -- pin D0 */ ++ [GPIO_FF_UPD_JUMPER] = {FORCE_BMC_UPDATE_PORT_PIN, GPIO_CFG_LOW_INPUT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ ++ /* Enable Pulse -- pin D6 */ ++ [GPIO_ENABLE_TPM_PULSE] = {PORT_PIN(GPIO_PORT_D, GPIO_PIN_6), ++ GPIO_CFG_DEFAULT, 0, GPIO_DEBOUNCE_8MS}, ++}; + + #define LPC_SNOOP_ADDR 0x80 + #define HICR5 0x080 /* Host Interface Control Register 5 */ +@@ -107,6 +151,7 @@ static void sgpio_init(void) + extern void espi_init(void); + void ast_g5_intel(void) + { ++ gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); + sgpio_init(); + } +diff --git a/board/aspeed/ast-g5/ast-g5.h b/board/aspeed/ast-g5/ast-g5.h +index 9fd10eccb3..908db1477b 100644 +--- a/board/aspeed/ast-g5/ast-g5.h ++++ b/board/aspeed/ast-g5/ast-g5.h +@@ -3,5 +3,6 @@ + + #include <common.h> + #include "ast-g5-irq.h" ++#include "ast-g5-gpio.h" + + #endif /* _AST_G5_H_ */ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch new file mode 100644 index 000000000..b22f50650 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch @@ -0,0 +1,96 @@ +From 1ce8ac1579502cc4a0e00a2d997a46a83941361b Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Fri, 16 Nov 2018 14:59:04 -0800 +Subject: [PATCH] Update Force Firmware Update Jumper to use new gpio API + +Add a function that allows easy reading of the FFUJ from other +functions, such as autoboot. + +Change-Id: I8ead931e9dd828522095a0ef386875be652ec885 +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + +--- + .../include/asm/arch-aspeed/ast-g5-intel.h | 19 +++++++++++++++++++ + arch/arm/include/asm/arch-aspeed/platform.h | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 5 +++++ + common/autoboot.c | 6 ++++++ + 4 files changed, 31 insertions(+) + create mode 100644 arch/arm/include/asm/arch-aspeed/ast-g5-intel.h + +diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +new file mode 100644 +index 0000000000..cd9a0994fa +--- /dev/null ++++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +@@ -0,0 +1,19 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#ifndef __AST_INTEL_G5_H__ ++#define __AST_INTEL_G5_H__ ++ ++#define AST_G5_INTEL 1 ++ ++#ifndef __ASSEMBLY__ ++int intel_force_firmware_jumper_enabled(void); ++#endif ++ ++#endif /* __AST_INTEL_G5_H__ */ +diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h +index 92ea33b89a..3b06e526f5 100644 +--- a/arch/arm/include/asm/arch-aspeed/platform.h ++++ b/arch/arm/include/asm/arch-aspeed/platform.h +@@ -27,6 +27,7 @@ + #include <asm/arch/ast2400_platform.h> + #elif defined(AST_SOC_G5) + #include <asm/arch/ast_g5_platform.h> ++#include <asm/arch/ast-g5-intel.h> + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ + #else + #err "No define for platform.h" +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 1868c230eb..9779052da4 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -148,6 +148,11 @@ static void sgpio_init(void) + writel(value, AST_GPIO_BASE + GPIO254); + } + ++int intel_force_firmware_jumper_enabled(void) ++{ ++ return gpio_get_value(GPIO_FF_UPD_JUMPER); ++} ++ + extern void espi_init(void); + void ast_g5_intel(void) + { +diff --git a/common/autoboot.c b/common/autoboot.c +index c52bad84a4..d66c0fa63a 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -14,6 +14,7 @@ + #include <menu.h> + #include <post.h> + #include <u-boot/sha256.h> ++#include <asm/arch/platform.h> + + DECLARE_GLOBAL_DATA_PTR; + +@@ -259,6 +260,11 @@ static int abortboot(int bootdelay) + { + int abort = 0; + ++# ifdef AST_G5_INTEL ++ if (intel_force_firmware_jumper_enabled()) ++ return 1; ++# endif ++ + if (bootdelay >= 0) + abort = __abortboot(bootdelay); + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch new file mode 100644 index 000000000..3a26416b3 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch @@ -0,0 +1,158 @@ +From c5098f399d379f79c5532d06f816b05ad4ad6d77 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Fri, 16 Nov 2018 14:44:49 -0800 +Subject: [PATCH] Add basic timer support for Aspeed g5 in U-Boot + +Timers will be used for timing events and making blinky LEDs. This just +adds the API and infrastructure. + +Change-Id: I8ff03b26070b43a47fb970ddf6124d6c3f29b058 +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + +--- + board/aspeed/ast-g5/Makefile | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 1 + + board/aspeed/ast-g5/ast-g5-timer.c | 66 ++++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-timer.h | 27 ++++++++++++ + board/aspeed/ast-g5/ast-g5.h | 1 + + 5 files changed, 96 insertions(+) + create mode 100644 board/aspeed/ast-g5/ast-g5-timer.c + create mode 100644 board/aspeed/ast-g5/ast-g5-timer.h + +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index 2970ae5741..90224333c4 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -3,3 +3,4 @@ obj-y += ast-g5-intel.o + obj-y += ast-g5-espi.o + obj-y += ast-g5-irq.o + obj-y += ast-g5-gpio.o ++obj-y += ast-g5-timer.o +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 9779052da4..4ef25ab8f5 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -15,6 +15,7 @@ + + #include "ast-g5.h" + #include "ast-g5-gpio.h" ++#include "ast-g5-timer.h" + + /* Names to match the GPIOs */ + enum gpio_names { +diff --git a/board/aspeed/ast-g5/ast-g5-timer.c b/board/aspeed/ast-g5/ast-g5-timer.c +new file mode 100644 +index 0000000000..56157222d9 +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-timer.c +@@ -0,0 +1,66 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <asm/io.h> ++#include <asm/arch/regs-scu.h> ++#include <asm/arch/ast_scu.h> ++#include <asm/arch/aspeed.h> ++ ++#include "ast-g5.h" ++#include "ast-g5-timer.h" ++#include "ast-g5-irq.h" ++ ++static const int timer_irqs[] = {16, 17, 18, 35, 37, 37, 38, 39}; ++/* offsets from AST_TIMER_BASE for each timer */ ++static const uint32_t timer_bases[] = {0, 0x10, 0x20, 0x40, ++ 0x50, 0x60, 0x70, 0x80}; ++#define TIMER_1MHZ_CLK_COUNT 1000000u ++#define TIMER_ENABLE 1 ++#define TIMER_1MHZ_CLK_SEL 2 ++#define TIMER_ENABLE_IRQ 4 ++#define TIMER_ENABLE_PULSE 8 ++#define TIMER_CONTROL 0x30 ++#define TIMER_RELOAD 0x04 ++ ++void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler) ++{ ++ if (n < 0 || n > 7) { ++ return; ++ } ++ uint32_t tctrl = readl(AST_TIMER_BASE + TIMER_CONTROL); ++ writel(tctrl & ~(0x0f << (n * 4)), AST_TIMER_BASE + TIMER_CONTROL); ++ ++ // figure out best base for requested frequency ++ // (this will give 1MHz clock preference if period is within 1ms of ++ // requested) ++ uint32_t v = TIMER_1MHZ_CLK_COUNT / freq; ++ if (v > 1000 || v * freq == TIMER_1MHZ_CLK_COUNT) { ++ tctrl |= (TIMER_1MHZ_CLK_SEL << (n * 4)); ++ } else { ++ uint32_t pclk = ast_get_ahbclk(); ++ v = pclk / freq; ++ } ++ writel(v, AST_TIMER_BASE + timer_bases[n] + TIMER_RELOAD); ++ if (handler) { ++ request_irq(timer_irqs[n], handler); ++ tctrl |= (TIMER_ENABLE_IRQ << (n * 4)); ++ } ++ tctrl |= (TIMER_ENABLE << (n * 4)); ++ writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL); ++} ++ ++void timer_disable(int n) ++{ ++ if (n < 0 || n > 7) { ++ return; ++ } ++ uint32_t tctrl = readl(AST_TIMER_BASE + TIMER_CONTROL); ++ writel(tctrl & ~(0x0f << (n * 4)), AST_TIMER_BASE + TIMER_CONTROL); ++} +diff --git a/board/aspeed/ast-g5/ast-g5-timer.h b/board/aspeed/ast-g5/ast-g5-timer.h +new file mode 100644 +index 0000000000..4b1ac28a9f +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-timer.h +@@ -0,0 +1,27 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#ifndef __AST_G5_TIMER_H__ ++#define __AST_G5_TIMER_H__ ++ ++#include <common.h> ++ ++#define TIMER_1 0 ++#define TIMER_2 1 ++#define TIMER_3 2 ++#define TIMER_4 3 ++#define TIMER_5 4 ++#define TIMER_6 5 ++#define TIMER_7 6 ++#define TIMER_8 7 ++ ++void timer_enable(int n, uint32_t freq, interrupt_handler_t handler); ++void timer_disable(int n); ++ ++#endif /* __AST_G5_TIMER_H__ */ +diff --git a/board/aspeed/ast-g5/ast-g5.h b/board/aspeed/ast-g5/ast-g5.h +index 908db1477b..28fe5eafcb 100644 +--- a/board/aspeed/ast-g5/ast-g5.h ++++ b/board/aspeed/ast-g5/ast-g5.h +@@ -4,5 +4,6 @@ + #include <common.h> + #include "ast-g5-irq.h" + #include "ast-g5-gpio.h" ++#include "ast-g5-timer.h" + + #endif /* _AST_G5_H_ */ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0012-Add-status-and-ID-LED-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0012-Add-status-and-ID-LED-support.patch new file mode 100644 index 000000000..e333b6cc0 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0012-Add-status-and-ID-LED-support.patch @@ -0,0 +1,147 @@ +From e252fcfd1ad66f1af57da1851bb39a398a9545e7 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Wed, 14 Nov 2018 12:16:53 -0800 +Subject: [PATCH] Add status and ID LED support + +Add status (amber and green) and ID (blue) LED support. In the +bootloader phase, the LEDs should be blinking. When booting linux, they +should turn to a fixed state. + +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Change-Id: Ic9595621b21000ef465ff57ed2047855296e2714 + +--- + board/aspeed/ast-g5/ast-g5-intel.c | 113 +++++++++++++++++++++++++++++ + 1 file changed, 113 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 4ef25ab8f5..e27b538fcc 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -149,6 +149,112 @@ static void sgpio_init(void) + writel(value, AST_GPIO_BASE + GPIO254); + } + ++/* running the timer at 48 hertz will easily give a 24Hz blink */ ++#define TICK_HZ 48 ++#define BLINK_DELAY(HZ) ((int)((TICK_HZ / (HZ)) / 2) - 1) ++typedef enum { ++ /* ++ * Identifies the control request for the ID LED. ++ */ ++ EIDLED_Initialize = 0, ++ EIDLED_Tick, ++ EIDLED_Toggle, ++ EIDLED_Off, ++ EIDLED_On, ++ EIDLED_Blink, ++ EIDLED_Blink_24HZ = EIDLED_Blink + BLINK_DELAY(24), ++ EIDLED_Blink_12HZ = EIDLED_Blink + BLINK_DELAY(12), ++ EIDLED_Blink_6HZ = EIDLED_Blink + BLINK_DELAY(6), ++ EIDLED_Blink_3HZ = EIDLED_Blink + BLINK_DELAY(3), ++ EIDLED_Blink_1HZ = EIDLED_Blink + BLINK_DELAY(1), ++ EIDLED_Blink_0_5HZ = EIDLED_Blink + BLINK_DELAY(0.5), ++} EIDLEDControl; ++ ++struct led_info { ++ int gpio; ++ EIDLEDControl mode; ++ int count; ++ int state; ++}; ++ ++static struct led_info s_led_info[] = { ++ /* BMC Executing bootloader (Default) :- ++ * ChassisID: Blinking Blue 3Hz, StatusLED: Blinking Green 1Hz */ ++ [GPIO_ID_LED] = {GPIO_ID_LED, EIDLED_Blink_3HZ, 1, 0}, ++ [GPIO_GREEN_LED] = {GPIO_GREEN_LED, EIDLED_Blink_1HZ, 0, 0}, ++ [GPIO_AMBER_LED] = {GPIO_AMBER_LED, EIDLED_Off, 0, 0}, ++}; ++ ++extern void gpio_set_value(int n, int asserted); ++void id_led_control(int id, int action) ++{ ++ if (id >= ARRAY_SIZE(s_led_info)) { ++ return; ++ } ++ /* don't bother with LEDs that are not initialized */ ++ if (EIDLED_Initialize == s_led_info[id].mode) { ++ return; ++ } ++ ++ /* check for a blinker action */ ++ if (EIDLED_Tick == action) { ++ if (s_led_info[id].mode < EIDLED_Blink) { ++ return; ++ } ++ /* check countdown for blink */ ++ if (s_led_info[id].count == 0) { ++ s_led_info[id].count = ++ s_led_info[id].mode - EIDLED_Blink; ++ s_led_info[id].state = !s_led_info[id].state; ++ } else { ++ s_led_info[id].count--; ++ return; ++ } ++ } else if (EIDLED_Toggle == action) { ++ s_led_info[id].state = !s_led_info[id].state; ++ s_led_info[id].mode = ++ s_led_info[id].state ? EIDLED_On : EIDLED_Off; ++ } else if (action > EIDLED_Toggle) { ++ s_led_info[id].mode = action; ++ if (EIDLED_Off == action) { ++ s_led_info[id].state = 0; ++ } else if (EIDLED_On == action) { ++ s_led_info[id].state = 1; ++ } else if (action >= EIDLED_Blink) { ++ s_led_info[id].count = action - EIDLED_Blink; ++ /* wait for the next tick */ ++ return; ++ } ++ } else if (EIDLED_Initialize == action) { ++ if (s_led_info[id].mode >= EIDLED_Blink) { ++ s_led_info[id].count = ++ s_led_info[id].mode - EIDLED_Blink; ++ } ++ } ++ gpio_set_value(s_led_info[id].gpio, s_led_info[id].state); ++} ++ ++static void timer8_irq_handler(void *regs) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(s_led_info); i++) { ++ id_led_control(i, EIDLED_Tick); ++ } ++} ++ ++void timer8_init(void) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(s_led_info); i++) { ++ id_led_control(i, EIDLED_Initialize); ++ } ++ ++ /* set up the timer to fire at TICK_HZ HZ */ ++ timer_enable(TIMER_8, TICK_HZ, timer8_irq_handler); ++} ++ + int intel_force_firmware_jumper_enabled(void) + { + return gpio_get_value(GPIO_FF_UPD_JUMPER); +@@ -160,4 +266,11 @@ void ast_g5_intel(void) + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); + sgpio_init(); ++ timer8_init(); ++ if (intel_force_firmware_jumper_enabled()) { ++ /* FFUJ mode:- ChassisID: Solid Blue, StatusLED: Solid Amber */ ++ id_led_control(GPIO_ID_LED, EIDLED_On); ++ id_led_control(GPIO_GREEN_LED, EIDLED_Off); ++ id_led_control(GPIO_AMBER_LED, EIDLED_On); ++ } + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0013-aspeed-Add-Pwm-Driver.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0013-aspeed-Add-Pwm-Driver.patch new file mode 100644 index 000000000..6a3132adb --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0013-aspeed-Add-Pwm-Driver.patch @@ -0,0 +1,139 @@ +From 118b202b435df8b9a8bdee296289fd42c4a95959 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Fri, 16 Nov 2018 15:57:57 -0800 +Subject: [PATCH] aspeed: add Pwm Driver + +Change-Id: Ia8b80212f7c70aafcc6a71782936ec95cf9b7f38 +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + board/aspeed/ast-g5/ast-g5-intel.c | 113 +++++++++++++++++++++++++++++ + 1 file changed, 113 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index e27b538fcc..a6cad69b1e 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -260,9 +260,122 @@ int intel_force_firmware_jumper_enabled(void) + return gpio_get_value(GPIO_FF_UPD_JUMPER); + } + ++/* PWM offsets */ ++ ++#define PWM_BASE_ADDR 0x1E786000 ++#define PWM_CONTROL 0x00 ++#define PWM_CLOCK_SELECTION 0x04 ++#define PWM_DUTY_CYCLE 0x08 ++#define PWM_M0 0x10 ++#define PWM_M1 0x14 ++#define PWM_N0 0x18 ++#define PWM_N1 0x1c ++#define PWM_CONTROL_EXT 0x40 ++#define PWM_CLOCK_SEL_EXT 0x44 ++#define PWM_O0 0x50 ++#define PWM_O1 0x54 ++#define PWM_CHANNEL_COUNT 8 ++ ++#define PWM_CLK_ENABLE BIT(0) ++#define PWM_DUTY(PCT) (((PCT) * 128) / 100) ++#define DEFAULT_PWM_DUTY_VALUE PWM_DUTY(57) ++ ++ ++static inline uint32_t ast_scu_read(uint32_t reg) ++{ ++ uint32_t val = readl(AST_SCU_BASE + reg); ++ ++ debug("ast_scu_read : reg = 0x%08x, val = 0x%08x\n", reg, val); ++ return val; ++} ++ ++static inline void ast_scu_write(uint32_t val, uint32_t reg) ++{ ++ debug("ast_scu_write : reg = 0x%08x, val = 0x%08x\n", reg, val); ++ ++ writel(SCU_PROTECT_UNLOCK, AST_SCU_BASE); ++ writel(val, AST_SCU_BASE + reg); ++#ifdef CONFIG_AST_SCU_LOCK ++ writel(0xaa, AST_SCU_BASE); ++#endif ++} ++ ++static void set_pwm_duty_cycle(int duty) ++{ ++ uint32_t chan; ++ uint32_t val; ++ ++ /* enable pwm channels */ ++ for (chan = 0; chan < PWM_CHANNEL_COUNT; chan++) { ++ uint32_t base = chan < 4 ? PWM_BASE_ADDR : PWM_BASE_ADDR + 0x40; ++ uint8_t ch_duty_shift = 16 * (chan & 0x1); ++ uint8_t ch_pair = (chan & 0x3) / 2; ++ ++ /* enable pwm for the channel */ ++ val = readl(base); ++ val |= ((1 << (chan & 0x3)) << 8); ++ writel(val, base); ++ ++ /* set duty cycle */ ++ val = readl(base + PWM_DUTY_CYCLE + ch_pair * 4); ++ val &= ~(0xffff << ch_duty_shift); ++ val |= (((uint32_t)duty) << 8) << ch_duty_shift; ++ writel(val, base + PWM_DUTY_CYCLE + ch_pair * 4); ++ } ++ ++} ++ ++static void pwm_init(void) ++{ ++ uint32_t val; ++ ++ /* select pwm 0-7 */ ++ val = ast_scu_read(AST_SCU_FUN_PIN_CTRL3); ++ val |= (SCU_FUN_PIN_VPIG7 | SCU_FUN_PIN_VPIG6 | SCU_FUN_PIN_VPIG5 ++ | SCU_FUN_PIN_VPIG4 | SCU_FUN_PIN_VPIG3 | SCU_FUN_PIN_VPIG2 ++ | SCU_FUN_PIN_VPIG1 | SCU_FUN_PIN_VPIG0); ++ ast_scu_write(val, AST_SCU_FUN_PIN_CTRL3); ++ ++ /* disable video output mux */ ++ val = ast_scu_read(AST_SCU_FUN_PIN_CTRL5); ++ val &= 0xffffffcf; ++ ast_scu_write(val, AST_SCU_FUN_PIN_CTRL5); ++ val = readl(AST_SCU_FUN_PIN_CTRL6); ++ val &= 0xfffffffc; ++ ast_scu_write(val, AST_SCU_FUN_PIN_CTRL6); ++ ++ /* SCU reset of PWM module */ ++ val = ast_scu_read(AST_SCU_RESET); ++ val |= SCU_RESET_PWM; ++ ast_scu_write(val, AST_SCU_RESET); ++ val &= ~SCU_RESET_PWM; ++ ast_scu_write(val, AST_SCU_RESET); ++ ++ /* set M, N, and 0 clock regs to 0 */ ++ writel(0, PWM_BASE_ADDR + PWM_M0); ++ writel(0, PWM_BASE_ADDR + PWM_N0); ++ writel(0, PWM_BASE_ADDR + PWM_O0); ++ ++ /* disable fans and tachos, set M type control */ ++ writel(0x1, PWM_BASE_ADDR + PWM_CONTROL); ++ writel(0x1, PWM_BASE_ADDR + PWM_CONTROL_EXT); ++ ++ set_pwm_duty_cycle(DEFAULT_PWM_DUTY_VALUE); ++ ++ /* set up clock type M: period = 127 units at 24MHz/8 (resulting ~23kHz period) */ ++ writel(0x7f30, PWM_BASE_ADDR + PWM_CLOCK_SELECTION); ++ ++ /* enable pwm-tacho */ ++ ++ val = readl(PWM_BASE_ADDR + PWM_CONTROL); ++ val |= PWM_CLK_ENABLE; ++ writel(val, PWM_BASE_ADDR + PWM_CONTROL); ++} ++ + extern void espi_init(void); + void ast_g5_intel(void) + { ++ pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); + sgpio_init(); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0014-Keep-interrupts-enabled-until-last-second.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0014-Keep-interrupts-enabled-until-last-second.patch new file mode 100644 index 000000000..306728244 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0014-Keep-interrupts-enabled-until-last-second.patch @@ -0,0 +1,89 @@ +From 473287e31ebd263e7278dd86e2f5e72aba9ba4db Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Sat, 17 Nov 2018 14:17:27 -0800 +Subject: [PATCH] Keep interrupts enabled until last second + +The U-Boot bootm command disabled interrupts almost first thing. This +would prevent a person hitting the power button on the host immediatly +after AC on because the BMC would fail to respond to the espi interrupts +and the host would power off. + +Change-Id: I6c0fb5cca1be6c326da4c9a3d3dfbab89dac9928 +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + +--- + board/aspeed/ast-g5/ast-g5-intel.c | 8 ++++++++ + common/bootm.c | 7 ------- + common/bootm_os.c | 1 + + 3 files changed, 9 insertions(+), 7 deletions(-) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index a6cad69b1e..5796ecf055 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -260,6 +260,14 @@ int intel_force_firmware_jumper_enabled(void) + return gpio_get_value(GPIO_FF_UPD_JUMPER); + } + ++void arch_preboot_os(void) ++{ ++ // last second before booting... set the LEDs ++ id_led_control(GPIO_ID_LED, EIDLED_On); ++ id_led_control(GPIO_GREEN_LED, EIDLED_On); ++ id_led_control(GPIO_AMBER_LED, EIDLED_Off); ++} ++ + /* PWM offsets */ + + #define PWM_BASE_ADDR 0x1E786000 +diff --git a/common/bootm.c b/common/bootm.c +index 2431019b3f..46909ecdbb 100644 +--- a/common/bootm.c ++++ b/common/bootm.c +@@ -602,7 +602,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + int states, bootm_headers_t *images, int boot_progress) + { + boot_os_fn *boot_fn; +- ulong iflag = 0; + int ret = 0, need_boot_fn; + + images->state |= states; +@@ -626,7 +625,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + if (!ret && (states & BOOTM_STATE_LOADOS)) { + ulong load_end; + +- iflag = bootm_disable_interrupts(); + ret = bootm_load_os(images, &load_end, 0); + if (ret == 0) + lmb_reserve(&images->lmb, images->os.load, +@@ -670,8 +668,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + BOOTM_STATE_OS_BD_T | BOOTM_STATE_OS_PREP | + BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO); + if (boot_fn == NULL && need_boot_fn) { +- if (iflag) +- enable_interrupts(); + printf("ERROR: booting os '%s' (%d) is not supported\n", + genimg_get_os_name(images->os.os), images->os.os); + bootstage_error(BOOTSTAGE_ID_CHECK_BOOT_OS); +@@ -711,9 +707,6 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + + /* Deal with any fallout */ + err: +- if (iflag) +- enable_interrupts(); +- + if (ret == BOOTM_ERR_UNIMPLEMENTED) + bootstage_error(BOOTSTAGE_ID_DECOMP_UNIMPL); + else if (ret == BOOTM_ERR_RESET) +diff --git a/common/bootm_os.c b/common/bootm_os.c +index 9ec84bd0db..b56eb39780 100644 +--- a/common/bootm_os.c ++++ b/common/bootm_os.c +@@ -476,6 +476,7 @@ __weak void arch_preboot_os(void) + int boot_selected_os(int argc, char * const argv[], int state, + bootm_headers_t *images, boot_os_fn *boot_fn) + { ++ disable_interrupts(); + arch_preboot_os(); + boot_fn(state, argc, argv, images); + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0015-Rewrite-memmove-to-optimize-on-word-transfers.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0015-Rewrite-memmove-to-optimize-on-word-transfers.patch new file mode 100644 index 000000000..f5ff7a2b9 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0015-Rewrite-memmove-to-optimize-on-word-transfers.patch @@ -0,0 +1,112 @@ +From e600623b13e3de73be5cd3b2711d58095efb4573 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Mon, 19 Nov 2018 11:04:02 -0800 +Subject: [PATCH] Rewrite memmove to optimize on word transfers + +Reading from the flash at boot time was using byte-sized transfers, +which ultimately turns into four word transfers over spi for every real +word read. This change breaks memmove down into a header, body, and +trailer, where the body is all done with word-sized transfers. + +Change-Id: Ie0a1f3261e507fb34a908571883d9bf04a1059ee +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + +--- + lib/string.c | 77 +++++++++++++++++++++++++++++++++++++++++++--------- + 1 file changed, 64 insertions(+), 13 deletions(-) + +diff --git a/lib/string.c b/lib/string.c +index 67d5f6a421..0bf472f1f6 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -505,26 +505,77 @@ void * memcpy(void *dest, const void *src, size_t count) + * + * Unlike memcpy(), memmove() copes with overlapping areas. + */ +-void * memmove(void * dest,const void *src,size_t count) ++void *memmove(void *dest, const void *src, size_t count) + { +- char *tmp, *s; +- +- if (src == dest) ++ unsigned char *bdst = (unsigned char *)dest; ++ const unsigned char *bsrc = (const unsigned char *)src; ++ unsigned long *ldst; ++ const unsigned long *lsrc; ++ size_t unaligned_header = 0, unaligned_trailer = 0; ++ size_t unaligned_src = ++ (sizeof(*ldst) - (size_t)src) & (sizeof(*ldst) - 1); ++ size_t unaligned_dst = ++ (sizeof(*ldst) - (size_t)dest) & (sizeof(*ldst) - 1); ++ ++ if (src == dest || !count) + return dest; + ++ if (unaligned_src || unaligned_dst) { ++ if (unaligned_dst != unaligned_src) { ++ unaligned_header = count; ++ } else { ++ unaligned_header = unaligned_src; ++ if (unaligned_header > count) { ++ unaligned_header = count; ++ } ++ } ++ count -= unaligned_header; ++ } ++ if (count & (sizeof(*ldst) - 1)) { ++ unaligned_trailer = count & (sizeof(*ldst) - 1); ++ count -= unaligned_trailer; ++ } ++ + if (dest <= src) { +- tmp = (char *) dest; +- s = (char *) src; +- while (count--) +- *tmp++ = *s++; ++ /* possible un-aligned bytes */ ++ while (unaligned_header--) ++ *bdst++ = *bsrc++; ++ ++ /* aligned words */ ++ ldst = (unsigned long *)bdst; ++ lsrc = (const unsigned long *)bsrc; ++ while (count >= sizeof(*ldst)) { ++ count -= sizeof(*ldst); ++ *ldst++ = *lsrc++; + } +- else { +- tmp = (char *) dest + count; +- s = (char *) src + count; +- while (count--) +- *--tmp = *--s; ++ ++ /* possibly un-aligned bytes */ ++ bdst = (unsigned char *)ldst; ++ bsrc = (const unsigned char *)lsrc; ++ while (unaligned_trailer--) ++ *bdst++ = *bsrc++; ++ } else { ++ bdst += unaligned_header + count + unaligned_trailer; ++ bsrc += unaligned_header + count + unaligned_trailer; ++ ++ /* possibly un-aligned bytes */ ++ while (unaligned_trailer--) ++ *--bdst = *--bsrc; ++ ++ /* aligned words */ ++ ldst = (unsigned long *)bdst; ++ lsrc = (unsigned long *)bsrc; ++ while (count >= sizeof(*ldst)) { ++ count -= sizeof(*ldst); ++ *--ldst = *--lsrc; + } + ++ /* possibly un-aligned bytes */ ++ bdst = (unsigned char *)ldst; ++ bsrc = (const unsigned char *)lsrc; ++ while (unaligned_header--) ++ *--bdst = *--bsrc; ++ } + return dest; + } + #endif diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0019-u-boot-full-platform-reset-espi-oob-ready.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0019-u-boot-full-platform-reset-espi-oob-ready.patch new file mode 100644 index 000000000..8798c1f6a --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0019-u-boot-full-platform-reset-espi-oob-ready.patch @@ -0,0 +1,46 @@ +From ec61ed244f574158315df42c17f4a8d3b3504b97 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Mon, 17 Dec 2018 20:37:23 -0800 +Subject: [PATCH] u-boot: full platform reset + espi oob-ready + +If the platform is strapped for fast reset, have platform-g5.S do a full +reset and then immediately set oob-ready so the espi master controller +can initiate communication. + +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> + +--- + arch/arm/mach-aspeed/platform_g5.S | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S +index 2ac1ca4721..66427b6f33 100644 +--- a/arch/arm/mach-aspeed/platform_g5.S ++++ b/arch/arm/mach-aspeed/platform_g5.S +@@ -139,7 +139,7 @@ + But if FW has other initial code executed before platform.S, then it should use WDT_SOC mode. + Use WDT_Full may clear the initial result of prior initial code. + ******************************************************************************/ +-//#define ASTMMC_INIT_RESET_MODE_FULL ++#define ASTMMC_INIT_RESET_MODE_FULL + + /****************************************************************************** + There is a compatibility issue for Hynix DDR4 SDRAM. +@@ -563,6 +563,17 @@ wait_first_reset: + *******************************************/ + + bypass_first_reset: ++ /* Timing from ESPI master requires OOB channel ready bit be set early */ ++ ldr r0, =0x1e6e2070 @ check strapping for eSPI mode ++ tst r0, #0x02000000 @ Test for bit 25 - eSPI Mode ++ beq espi_early_init_done @ if bit 25 clear, dont set OOB ready ++ ++ ldr r0, =0x1e6ee000 ++ ldr r1, [r0] @ ESPI000: ESPI Engine Control Reg ++ orr r1, r1, #0x00000010 @ Set OOB Channel Ready bit ++ str r1, [r0] ++espi_early_init_done: ++ + /* Enable Timer separate clear mode */ + ldr r0, =0x1e782038 + mov r1, #0xAE diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch new file mode 100644 index 000000000..c5d194d6b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch @@ -0,0 +1,164 @@ +From 4027a17dcfa5749cf2777a62c695a5b04377756b Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Tue, 9 Apr 2019 14:42:05 +0800 +Subject: [PATCH] Add system reset status support + +Will display the reset reasons and other CPU information in u-boot, +and save the reset reasons into kernel command line, +for applications to query. + +Change-Id: I87ada3ecf14368519e4d09035bb1e09fdc05469b +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +--- + arch/arm/include/asm/arch-aspeed/platform.h | 2 + + arch/arm/mach-aspeed/ast-scu.c | 4 ++ + board/aspeed/ast-g5/ast-g5-intel.c | 73 +++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5.c | 7 ++ + 4 files changed, 86 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h +index 3b06e526f5..4e4140d8e4 100644 +--- a/arch/arm/include/asm/arch-aspeed/platform.h ++++ b/arch/arm/include/asm/arch-aspeed/platform.h +@@ -29,6 +29,8 @@ + #include <asm/arch/ast_g5_platform.h> + #include <asm/arch/ast-g5-intel.h> + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ ++#define CONFIG_BOARD_LATE_INIT 1 /* Call board_late_init */ ++#define CONFIG_DISPLAY_CPUINFO 1 + #else + #err "No define for platform.h" + #endif +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 3a9ba05bf2..976c59b82a 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -494,6 +494,9 @@ void ast_scu_sys_rest_info(void) + { + u32 rest = ast_scu_read(AST_SCU_SYS_CTRL); + ++#ifdef AST_SOC_G5 ++ printf("RST : 0x%02x\n", rest); ++#else + if (rest & SCU_SYS_EXT_RESET_FLAG) { + printf("RST : External\n"); + ast_scu_write(SCU_SYS_EXT_RESET_FLAG, AST_SCU_SYS_CTRL); +@@ -506,6 +509,7 @@ void ast_scu_sys_rest_info(void) + } else { + printf("RST : CLK en\n"); + } ++#endif + } + + u32 ast_scu_get_vga_memsize(void) +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 5796ecf055..a223c798ac 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -333,6 +333,79 @@ static void set_pwm_duty_cycle(int duty) + + } + ++ ++static void update_bootargs_cmd(const char *key, const char *value) ++{ ++ int buf_len; ++ char *buf; ++ char *cmdline; ++ char comp_key[128]; ++ ++ if (!key || (key[0] == '\0')) { ++ printf("%s - Empty key not allowed\n", __func__); ++ return; ++ } ++ ++ cmdline = getenv("bootargs"); ++ ++ /* Allocate space for maximum possible new command line */ ++ if (value) ++ buf_len = strlen(cmdline) + strlen(key) + 3 + strlen(value); ++ else ++ buf_len = strlen(cmdline) + strlen(key) + 3; ++ ++ buf = malloc(buf_len); ++ if (!buf) { ++ printf("%s: out of memory\n", __func__); ++ return; ++ } ++ memset(buf, 0, buf_len); ++ ++ if (!cmdline) { ++ /* lets add key-value, though bootargs are empty */ ++ snprintf(buf, buf_len, "%s=%s", key, (value ? value : "")); ++ setenv("bootargs", buf); ++ free(buf); ++ return; ++ } ++ ++ snprintf(comp_key, sizeof(comp_key), "%s=", key); ++ char *start = strstr(cmdline, comp_key); ++ ++ /* Check for full word match. Match should be start of cmdline ++ * or there should be space before match */ ++ if (start && ((start == cmdline) || (*(start-1) == ' '))) { ++ char *end = strchr(start, ' '); ++ strncpy(buf, cmdline, (start - cmdline)); ++ ++ if (end) ++ snprintf(buf, buf_len, "%s%s=%s %s", buf, key, ++ (value ? value : ""), end+1); ++ else ++ snprintf(buf, buf_len, "%s%s=%s", buf, key, ++ (value ? value : "")); ++ } else { ++ snprintf(buf, buf_len, "%s %s=%s", cmdline, key, ++ (value ? value : "")); ++ } ++ ++ setenv("bootargs", buf); ++ free(buf); ++} ++ ++void ast_g5_intel_late_init(void) ++{ ++ char value[32]; ++ u32 reset_reason = 0; ++ ++ /* save and clear reset status */ ++ reset_reason = ast_scu_read(AST_SCU_SYS_CTRL); ++ snprintf(value, sizeof(value), "0x%x", reset_reason); ++ ast_scu_write(0, AST_SCU_SYS_CTRL); ++ ++ update_bootargs_cmd("resetreason", value); ++} ++ + static void pwm_init(void) + { + uint32_t val; +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index cab5fabcef..d89a2b799a 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -22,6 +22,7 @@ + DECLARE_GLOBAL_DATA_PTR; + + extern void ast_g5_intel(void); ++extern void ast_g5_intel_late_init(void); + + int board_early_init_f(void) + { +@@ -90,6 +91,12 @@ int board_init(void) + return 0; + } + ++int board_late_init(void) ++{ ++ ast_g5_intel_late_init(); ++ return 0; ++} ++ + int dram_init(void) + { + u32 vga = ast_scu_get_vga_memsize(); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch new file mode 100644 index 000000000..60800a3fd --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch @@ -0,0 +1,36 @@ +From 088d7496885148f6d953a709988ab3ac1c2919a8 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Tue, 8 Jan 2019 13:33:15 -0800 +Subject: [PATCH] Enable PCIe L1 support + +This commit enables PCIe L1 support using magic registers. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + arch/arm/mach-aspeed/platform_g5.S | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S +index 66427b6f33..b4043534b0 100644 +--- a/arch/arm/mach-aspeed/platform_g5.S ++++ b/arch/arm/mach-aspeed/platform_g5.S +@@ -2432,6 +2432,18 @@ spi_cbr_end: + bic r1, r1, #0x00400000 + str r1, [r0] + ++ ldr r0, =0x1e6ed07c @ Enable PCIe L1 support ++ ldr r1, =0xa8 ++ str r1, [r0] ++ ++ ldr r0, =0x1e6ed068 ++ ldr r1, =0xc81f0a ++ str r1, [r0] ++ ++ ldr r0, =0x1e6ed07c ++ mov r1, #0 ++ str r1, [r0] ++ + /****************************************************************************** + Configure MAC timing + ******************************************************************************/ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0021-Config-host-uart-clock-source-using-environment-vari.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0021-Config-host-uart-clock-source-using-environment-vari.patch new file mode 100644 index 000000000..7cc0d2d11 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0021-Config-host-uart-clock-source-using-environment-vari.patch @@ -0,0 +1,106 @@ +From 2740b1112737d3acd23d3a0b56ab26b05a5d1a5e Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Mon, 11 Feb 2019 15:19:56 +0800 +Subject: [PATCH] Config host uart clock source using environment variable + +In order to support high speed uart for host uarts, +the uart clock needs to be switched between 24M and 192M. +Config SCU4C based on environment variable hostserialcfg, +this variable is set by IPMI OEM commands. + +Tested: +Change the hostserialcfg variable to 0/1/2/3, +using the below commands: + +ipmitool raw 0x32 0x90 1 0; reboot +cat /sys/class/tty/ttyS*/uartclk, all should be 24MHz + +ipmitool raw 0x32 0x90 1 1; reboot +cat /sys/class/tty/ttyS*/uartclk, ttyS0/2/3 should be 192MHz + +ipmitool raw 0x32 0x90 1 2; reboot +cat /sys/class/tty/ttyS*/uartclk, ttyS1 should be 192MHz + +ipmitool raw 0x32 0x90 1 3; reboot +cat /sys/class/tty/ttyS*/uartclk, ttyS0/12/3 should be 192MHz + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> + +--- + arch/arm/include/asm/arch-aspeed/regs-scu.h | 5 +++ + board/aspeed/ast-g5/ast-g5-intel.c | 39 +++++++++++++++++++++ + 2 files changed, 44 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h +index 019c00036a..a2c9549fc6 100644 +--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h ++++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h +@@ -530,6 +530,11 @@ + /* AST_SCU_MAC_CLK 0x48 - MAC interface clock delay setting register */ + + /* AST_SCU_MISC2_CTRL 0x4C - Misc. 2 Control register */ ++#define SCU_UART5_HS_CLOCK (1 << 28) ++#define SCU_UART4_HS_CLOCK (1 << 27) ++#define SCU_UART3_HS_CLOCK (1 << 26) ++#define SCU_UART2_HS_CLOCK (1 << 25) ++#define SCU_UART1_HS_CLOCK (1 << 24) + #ifdef AST_SOC_G5 + #define SCU_PCIE_MAPPING_HIGH (1 << 15) + #define SCU_MALI_DTY_MODE (1 << 8) +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index a223c798ac..a16e1330a0 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -106,6 +106,9 @@ static const GPIOValue gpio_table[] = { + #define SGPIO_ENABLE 1 + #define GPIO254 0x254 + ++#define HOST_SERIAL_A_HIGH_SPEED (1 << 0) ++#define HOST_SERIAL_B_HIGH_SPEED (1 << 1) ++ + static void sgpio_init(void) + { + uint32_t value; +@@ -398,6 +401,42 @@ void ast_g5_intel_late_init(void) + char value[32]; + u32 reset_reason = 0; + ++ /* By default host serail A and B use normal speed */ ++ uint32_t host_serial_cfg = 0; ++ char *host_serial_cfg_txt = NULL; ++ ++ /* Config the uart clock source based on environment configuration */ ++ host_serial_cfg_txt = getenv("hostserialcfg"); ++ ++ if (host_serial_cfg_txt != NULL) ++ host_serial_cfg = simple_strtoul(host_serial_cfg_txt, NULL, 16); ++ ++ if (host_serial_cfg > (HOST_SERIAL_A_HIGH_SPEED | HOST_SERIAL_B_HIGH_SPEED)) { ++ printf("Invalided hostserialcfg %x, use default!\n", host_serial_cfg); ++ host_serial_cfg = 0; ++ } ++ ++ /* SOL implementation requires uart1/uart3/uart4 have the same clock ++ * source for data forwarding, config uart3 and uart4 ++ */ ++ if (host_serial_cfg & HOST_SERIAL_A_HIGH_SPEED) { ++ ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) | ++ SCU_UART1_HS_CLOCK | SCU_UART3_HS_CLOCK | ++ SCU_UART4_HS_CLOCK, AST_SCU_MISC2_CTRL); ++ } else { ++ ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) & ++ ~SCU_UART1_HS_CLOCK & ~SCU_UART3_HS_CLOCK & ++ ~SCU_UART4_HS_CLOCK, AST_SCU_MISC2_CTRL); ++ } ++ ++ if (host_serial_cfg & HOST_SERIAL_B_HIGH_SPEED) { ++ ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) | ++ SCU_UART2_HS_CLOCK, AST_SCU_MISC2_CTRL); ++ } else { ++ ast_scu_write(ast_scu_read(AST_SCU_MISC2_CTRL) & ++ ~SCU_UART2_HS_CLOCK, AST_SCU_MISC2_CTRL); ++ } ++ + /* save and clear reset status */ + reset_reason = ast_scu_read(AST_SCU_SYS_CTRL); + snprintf(value, sizeof(value), "0x%x", reset_reason); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch new file mode 100644 index 000000000..515b383e5 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch @@ -0,0 +1,612 @@ +From ecda16cf2eb96fb63aca737513abcf79cc59a44b Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 13 Mar 2019 14:28:05 +0530 +Subject: [PATCH] KCS driver support in uBoot + +Added KCS support in uBoot. This will enable +KCS channels and set the specified registers +to do KCS communication in uBoot. It also +consist of read and write KCS message transations +work flow implementation( As specified in IPMI +specification Section 9.15). It is enabled +only when Force Firmware Update Jumper is ON. + +Tested By: +Stopped booting in uBoot and sent IPMI commands +via KCS interfaces. + - Get Device ID: + Req: ipmitool raw 6 1 + Res: 23 00 12 03 02 BF 57 01 00 7B 00 00 00 00 00 + - Get Self Test Results + Req: ipmitool raw 6 4 + Res: 56 00 + - All other commands + Req: ipmitool raw 6 2 + Res: Unable to send RAW command (channel=0x0 netfn=0x6 lun=0x0 +cmd=0x2 rsp=0xc1): Invalid command + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + board/aspeed/ast-g5/Makefile | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 3 + + board/aspeed/ast-g5/ast-g5-kcs.c | 420 +++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-kcs.h | 112 ++++++++ + 4 files changed, 536 insertions(+) + create mode 100644 board/aspeed/ast-g5/ast-g5-kcs.c + create mode 100644 board/aspeed/ast-g5/ast-g5-kcs.h + +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index 90224333c4..05972b9d17 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -4,3 +4,4 @@ obj-y += ast-g5-espi.o + obj-y += ast-g5-irq.o + obj-y += ast-g5-gpio.o + obj-y += ast-g5-timer.o ++obj-y += ast-g5-kcs.o +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index a16e1330a0..ac2af9af56 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -493,6 +493,7 @@ static void pwm_init(void) + } + + extern void espi_init(void); ++extern void kcs_init(void); + void ast_g5_intel(void) + { + pwm_init(); +@@ -505,5 +506,7 @@ void ast_g5_intel(void) + id_led_control(GPIO_ID_LED, EIDLED_On); + id_led_control(GPIO_GREEN_LED, EIDLED_Off); + id_led_control(GPIO_AMBER_LED, EIDLED_On); ++ kcs_init(); ++ /* TODO: need to stop the booting here. */ + } + } +diff --git a/board/aspeed/ast-g5/ast-g5-kcs.c b/board/aspeed/ast-g5/ast-g5-kcs.c +new file mode 100644 +index 0000000000..7bff26f9db +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-kcs.c +@@ -0,0 +1,420 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include "ast-g5-kcs.h" ++ ++#ifdef DEBUG_KCS_ENABLED ++#define DBG_KCS printf ++#else ++#define DBG_KCS(...) ++#endif ++ ++/* TODO: Move to IPMI file. */ ++#define IPMI_CC_OK 0x00 ++#define IPMI_CC_INVALID 0xC1 ++#define IPMI_CC_UNSPECIFIED 0xFF ++ ++#define KCS_CHANNEL_NO_3 3 ++ ++static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 }; ++ ++static const struct kcs_io_reg ast_kcs_bmc_ioregs[KCS_CHANNEL_MAX] = { ++ { .idr = LPC_IDR1, .odr = LPC_ODR1, .str = LPC_STR1 }, ++ { .idr = LPC_IDR2, .odr = LPC_ODR2, .str = LPC_STR2 }, ++ { .idr = LPC_IDR3, .odr = LPC_ODR3, .str = LPC_STR3 }, ++ { .idr = LPC_IDR4, .odr = LPC_ODR4, .str = LPC_STR4 } ++}; ++ ++#define NO_OF_ENABLED_KCS_CHANNELS ARRAY_SIZE(enabled_kcs_channel) ++ ++static struct kcs_packet m_kcs_pkt[NO_OF_ENABLED_KCS_CHANNELS]; ++ ++static u16 read_status(u16 channel_num) ++{ ++ return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str); ++} ++ ++static void write_status(u16 channel_num, u16 value) ++{ ++ writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str); ++} ++ ++static u16 read_data(u16 channel_num) ++{ ++ return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].idr); ++} ++ ++static void write_data(u16 channel_num, u16 value) ++{ ++ writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].odr); ++} ++ ++static void set_kcs_state(u16 channel_num, u16 state) ++{ ++ u16 status = read_status(channel_num); ++ ++ status &= ~KCS_STATE_MASK; ++ status |= KCS_STATE(state) & KCS_STATE_MASK; ++ write_status(channel_num, status); ++} ++ ++static struct kcs_packet *get_kcs_packet(u16 channel_num) ++{ ++ for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) { ++ if (channel_num == enabled_kcs_channel[idx]) ++ return &m_kcs_pkt[idx]; ++ } ++ ++ /* very unlike code hits here. */ ++ DBG_KCS("ERROR: %s error. ChannelNo: %d\n", __func__, channel_num); ++ BUG(); ++} ++ ++static void kcs_force_abort(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ DBG_KCS("ERROR: KCS communication aborted (Channel:%d, Error:%d)\n", ++ channel_num, kcs_pkt->error); ++ set_kcs_state(channel_num, KCS_STATE_ERROR); ++ read_data(channel_num); ++ write_data(channel_num, ZERO_DATA); ++ ++ kcs_pkt->phase = KCS_PHASE_ERROR; ++ kcs_pkt->read_req_done = false; ++ kcs_pkt->data_in_idx = 0; ++} ++ ++static void init_kcs_packet(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ kcs_pkt->channel = channel_num; ++ kcs_pkt->read_req_done = false; ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ kcs_pkt->error = KCS_NO_ERROR; ++ kcs_pkt->data_in_idx = 0; ++ kcs_pkt->data_out_idx = 0; ++ kcs_pkt->data_out_len = 0; ++} ++ ++static void process_kcs_request(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ int i; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ if (!kcs_pkt->read_req_done) ++ return; ++ ++ DBG_KCS("%s:- chan:%d\n", __func__, channel_num); ++ ++#ifdef DEBUG_KCS_ENABLED ++ DBG_KCS("Request data(Len:%d): ", kcs_pkt->data_in_idx); ++ for (i = 0; i < kcs_pkt->data_in_idx; i++) ++ DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]); ++ DBG_KCS("\n"); ++#endif ++ ++ /* ++ * TODO: Move it to IPMI Command Handler ++ * Below code is added for timebeing till ++ * we implement the IPMI command handler. ++ */ ++ kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */ ++ kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */ ++ ++ if (((kcs_pkt->data_in[0] >> 2) == 0x06) && ++ (kcs_pkt->data_in[1] == 0x01)) { ++ /* Get Device ID */ ++ u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02, ++ 0xBF, 0x57, 0x01, 0x00, 0x7B, ++ 0x00, 0x00, 0x00, 0x00, 0x00 }; ++ for (i = 0; i < 15; i++) ++ kcs_pkt->data_out[i + 3] = device_id[i]; ++ kcs_pkt->data_out_len = 18; ++ } else if (((kcs_pkt->data_in[0] >> 2) == 0x06) && ++ (kcs_pkt->data_in[1] == 0x04)) { ++ /* Get Self Test Results */ ++ kcs_pkt->data_out[3] = 0x56; ++ kcs_pkt->data_out[4] = 0x00; ++ kcs_pkt->data_out_len = 5; ++ } else { ++ kcs_pkt->data_out[2] = ++ IPMI_CC_INVALID; /* Invalid or not supported. */ ++ kcs_pkt->data_out_len = 3; ++ } ++ /* END: TODO */ ++ ++#ifdef DEBUG_KCS_ENABLED ++ DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len); ++ for (i = 0; i < kcs_pkt->data_out_len; i++) ++ DBG_KCS(" 0x%02x", kcs_pkt->data_out[i]); ++ DBG_KCS("\n"); ++#endif ++ ++ kcs_pkt->phase = KCS_PHASE_READ; ++ write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]); ++ kcs_pkt->read_req_done = false; ++} ++ ++static void read_kcs_data(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ ++ switch (kcs_pkt->phase) { ++ case KCS_PHASE_WRITE_START: ++ kcs_pkt->phase = KCS_PHASE_WRITE_DATA; ++ /* fall through */ ++ ++ case KCS_PHASE_WRITE_DATA: ++ if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) { ++ kcs_pkt->error = KCS_LENGTH_ERROR; ++ kcs_force_abort(channel_num); ++ return; ++ } ++ set_kcs_state(channel_num, KCS_STATE_WRITE); ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->data_in[kcs_pkt->data_in_idx++] = ++ read_data(channel_num); ++ break; ++ ++ case KCS_PHASE_WRITE_END: ++ if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) { ++ kcs_pkt->error = KCS_LENGTH_ERROR; ++ kcs_force_abort(channel_num); ++ return; ++ } ++ set_kcs_state(channel_num, KCS_STATE_READ); ++ kcs_pkt->data_in[kcs_pkt->data_in_idx++] = ++ read_data(channel_num); ++ kcs_pkt->phase = KCS_PHASE_READ_WAIT; ++ kcs_pkt->read_req_done = true; ++ ++ process_kcs_request(channel_num); ++ break; ++ ++ case KCS_PHASE_READ: ++ if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len) ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ ++ u8 data = read_data(channel_num); ++ if (data != KCS_CTRL_CODE_READ) { ++ DBG_KCS("Invalid Read data. Phase:%d, Data:0x%02x\n", ++ kcs_pkt->phase, data); ++ set_kcs_state(channel_num, KCS_STATE_ERROR); ++ write_data(channel_num, ZERO_DATA); ++ break; ++ } ++ ++ if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len) { ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ break; ++ } ++ write_data(channel_num, ++ kcs_pkt->data_out[kcs_pkt->data_out_idx++]); ++ break; ++ ++ case KCS_PHASE_ABORT_1: ++ set_kcs_state(channel_num, KCS_STATE_READ); ++ read_data(channel_num); ++ write_data(channel_num, kcs_pkt->error); ++ kcs_pkt->phase = KCS_PHASE_ABORT_2; ++ break; ++ ++ case KCS_PHASE_ABORT_2: ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ read_data(channel_num); ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ break; ++ ++ default: ++ kcs_force_abort(channel_num); ++ } ++} ++ ++static void read_kcs_cmd(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ ++ set_kcs_state(channel_num, KCS_STATE_WRITE); ++ write_data(channel_num, ZERO_DATA); ++ ++ u16 cmd = read_data(channel_num); ++ switch (cmd) { ++ case KCS_CTRL_CODE_WRITE_START: ++ init_kcs_packet(channel_num); ++ kcs_pkt->phase = KCS_PHASE_WRITE_START; ++ break; ++ ++ case KCS_CTRL_CODE_WRITE_END: ++ if (kcs_pkt->error != KCS_NO_ERROR) { ++ kcs_force_abort(channel_num); ++ return; ++ } ++ ++ kcs_pkt->phase = KCS_PHASE_WRITE_END; ++ break; ++ ++ case KCS_CTRL_CODE_GET_STATUS_ABORT: ++ kcs_pkt->phase = KCS_PHASE_ABORT_1; ++ kcs_pkt->error = KCS_ABORT_BY_CMD; ++ break; ++ ++ default: ++ kcs_pkt->error = KCS_ILLEGAL_CTRL_CMD; ++ kcs_force_abort(channel_num); ++ } ++} ++ ++static u16 kcs_irq_handler(struct pt_regs *regs) ++{ ++ for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) { ++ u16 channel_num = enabled_kcs_channel[idx]; ++ /* Look-up the interrupted KCS channel */ ++ u16 status = read_status(channel_num); ++ if (status & BIT_STATUS_IBF) { ++ if (status & BIT_STATUS_COD) ++ read_kcs_cmd(channel_num); ++ else ++ read_kcs_data(channel_num); ++ } ++ } ++ ++ return 0; ++} ++ ++static void set_kcs_channel_addr(u16 channel_num) ++{ ++ u32 val; ++ ++ switch (channel_num) { ++ case 1: ++ val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_LADR12AS; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = (KCS_CHANNEL1_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR12H); ++ val = (KCS_CHANNEL1_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR12L); ++ break; ++ ++ case 2: ++ val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_LADR12AS; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = (KCS_CHANNEL2_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR12H); ++ val = (KCS_CHANNEL2_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR12L); ++ break; ++ ++ case 3: ++ val = (KCS_CHANNEL3_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR3H); ++ val = (KCS_CHANNEL3_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR3L); ++ break; ++ ++ case 4: ++ val = (((KCS_CHANNEL4_ADDR + 1) << 16) | KCS_CHANNEL4_ADDR); ++ writel(val, AST_LPC_BASE + LPC_LADR4); ++ break; ++ ++ default: ++ DBG_KCS("Invalid channel (%d) specified\n", channel_num); ++ break; ++ } ++} ++ ++static void enable_kcs_channel(u16 channel_num, u16 enable) ++{ ++ u32 val; ++ ++ switch (channel_num) { ++ case 1: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE1; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC1E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC1E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE1; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 2: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE2; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC2E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC2E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE2; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 3: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE3; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC3E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_KCSENBL; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC3E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_KCSENBL; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE3; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 4: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICRB) | BIT_IBFIE4 | ++ BIT_LPC4E; ++ writel(val, AST_LPC_BASE + LPC_HICRB); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICRB) & ++ ~(BIT_IBFIE4 | BIT_LPC4E); ++ writel(val, AST_LPC_BASE + LPC_HICRB); ++ } ++ break; ++ ++ default: ++ DBG_KCS("Invalid channel (%d) specified\n", channel_num); ++ } ++} ++ ++void kcs_init(void) ++{ ++ /* Initialize the KCS channels. */ ++ for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) { ++ u16 channel_num = enabled_kcs_channel[idx]; ++ DBG_KCS("%s Channel: %d\n", __func__, channel_num); ++ set_kcs_channel_addr(channel_num); ++ enable_kcs_channel(channel_num, 1); ++ ++ /* Set KCS channel state to idle */ ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ } ++ ++ /* KCS interrupt */ ++ request_irq(IRQ_SRC_LPC, kcs_irq_handler); ++} +diff --git a/board/aspeed/ast-g5/ast-g5-kcs.h b/board/aspeed/ast-g5/ast-g5-kcs.h +new file mode 100644 +index 0000000000..bb697c455d +--- /dev/null ++++ b/board/aspeed/ast-g5/ast-g5-kcs.h +@@ -0,0 +1,112 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018-2019 Intel Corporation */ ++ ++#include <asm/io.h> ++#include <common.h> ++ ++#include "ast-g5.h" ++ ++#define KCS_CHANNEL_MAX 4 ++#define IRQ_SRC_LPC 8 /* IRQ 8 */ ++#define MAX_KCS_PKT_SIZE (64 * 1024) ++/* KCS channel addresses */ ++#define KCS_CHANNEL1_ADDR 0xCA0 ++#define KCS_CHANNEL2_ADDR 0xCA8 ++#define KCS_CHANNEL3_ADDR 0xCA2 /* KCS SMS */ ++#define KCS_CHANNEL4_ADDR 0xCA4 /* KCS SMM */ ++ ++#define ZERO_DATA 0x00 ++ ++/* Aspeed KCS control registers */ ++#define LPC_HICR0 0x00 /* Host Interface Control Register 0 */ ++#define LPC_HICR1 0x04 /* Host Interface Control Register 1 */ ++#define LPC_HICR2 0x08 /* Host Interface Control Register 2 */ ++#define LPC_HICR3 0x0C /* Host Interface Control Register 3 */ ++#define LPC_HICR4 0x10 /* Host Interface Control Register 4 */ ++#define LPC_LADR3H 0x14 /* LPC channel #3 Address Register H */ ++#define LPC_LADR3L 0x18 /* LPC channel #3 Address Register H */ ++#define LPC_LADR12H 0x1C /* LPC channel #1#2 Address Register H */ ++#define LPC_LADR12L 0x20 /* LPC channel #1#2 Address Register L */ ++#define LPC_IDR1 0x24 /* Input Data Register 1 */ ++#define LPC_IDR2 0x28 /* Input Data Register 2 */ ++#define LPC_IDR3 0x2C /* Input Data Register 3 */ ++#define LPC_ODR1 0x30 /* Output Data Register 1 */ ++#define LPC_ODR2 0x34 /* Output Data Register 2 */ ++#define LPC_ODR3 0x38 /* Output Data Register 3 */ ++#define LPC_STR1 0x3C /* Status Register 1 */ ++#define LPC_STR2 0x40 /* Status Register 2 */ ++#define LPC_STR3 0x44 /* Status Register 3 */ ++#define LPC_HICRB 0x100 /* Host Interface Control Register B */ ++#define LPC_LADR4 0x110 /* LPC channel #4 Address Register */ ++#define LPC_IDR4 0x114 /* Input Data Register 4 */ ++#define LPC_ODR4 0x118 /* Output Data Register 4 */ ++#define LPC_STR4 0x11C /* Status Data Register 4 */ ++ ++/* LPC Bits */ ++#define BIT_LADR12AS BIT(7) /* Channel Address selection */ ++#define BIT_IBFIE1 BIT(1) /* Enable IDR1 Recv completion interrupt */ ++#define BIT_IBFIE2 BIT(2) /* Enable IDR2 Recv completion interrupt */ ++#define BIT_IBFIE3 BIT(3) /* Enable IBF13 interrupt */ ++#define BIT_LPC1E BIT(5) /* Enable LPC channel #1 */ ++#define BIT_LPC2E BIT(6) /* Enable LPC channel #2 */ ++#define BIT_LPC3E BIT(7) /* Enable LPC channel #2 */ ++#define BIT_KCSENBL BIT(2) /* Enable KCS interface in Channel #3 */ ++#define BIT_IBFIE4 BIT(1) ++#define BIT_LPC4E BIT(0) ++ ++#define BIT_STATUS_OBF BIT(0) /* Output Data Register full #1/#2/#3 */ ++#define BIT_STATUS_IBF BIT(1) /* Input Data Register full #1/#2/#3 */ ++#define BIT_STATUS_COD BIT(3) /* Command/Data - (1=command,0=data) */ ++ ++#define KCS_STATE_MASK 0xC0 /* BIT[6:7] of status register */ ++#define KCS_STATE(state) ((state) << 6) ++ ++/* IPMI2.0(section 9.7) - KCS interface State Bits */ ++#define KCS_STATE_IDLE 0x00 ++#define KCS_STATE_READ 0x01 ++#define KCS_STATE_WRITE 0x02 ++#define KCS_STATE_ERROR 0x03 ++ ++/* IPMI2.0(section 9.10) - KCS interface control codes */ ++#define KCS_CTRL_CODE_GET_STATUS_ABORT 0x60 ++#define KCS_CTRL_CODE_WRITE_START 0x61 ++#define KCS_CTRL_CODE_WRITE_END 0x62 ++#define KCS_CTRL_CODE_READ 0x68 ++ ++struct kcs_io_reg { ++ u32 idr; ++ u32 odr; ++ u32 str; ++}; ++ ++enum kcs_phase { ++ KCS_PHASE_IDLE = 0, ++ KCS_PHASE_WRITE_START = 1, ++ KCS_PHASE_WRITE_DATA = 2, ++ KCS_PHASE_WRITE_END = 3, ++ KCS_PHASE_READ_WAIT = 4, ++ KCS_PHASE_READ = 5, ++ KCS_PHASE_ABORT_1 = 6, ++ KCS_PHASE_ABORT_2 = 7, ++ KCS_PHASE_ERROR = 8 ++}; ++ ++enum kcs_error { ++ KCS_NO_ERROR = 0x00, ++ KCS_ABORT_BY_CMD = 0x01, ++ KCS_ILLEGAL_CTRL_CMD = 0x02, ++ KCS_LENGTH_ERROR = 0x06, ++ KCS_UNSPECIFIED_ERROR = 0xFF, ++}; ++ ++struct kcs_packet { ++ enum kcs_phase phase; ++ enum kcs_error error; ++ u16 channel; ++ bool read_req_done; ++ u16 data_in_idx; ++ u8 data_in[MAX_KCS_PKT_SIZE]; ++ u16 data_out_len; ++ u16 data_out_idx; ++ u8 data_out[MAX_KCS_PKT_SIZE]; ++}; diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch new file mode 100644 index 000000000..5a9b3c081 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch @@ -0,0 +1,35 @@ +From d0546e59ff42f964ab09cebb1bab0fc2d8e7e6d8 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Tue, 26 Mar 2019 20:34:51 +0530 +Subject: [PATCH] u-boot env change for PFR image + +Tested: verified BMC booting from 0x20b00000 + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + include/configs/ast-common.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h +index 0bc7f2d75f..821ea8f8eb 100644 +--- a/include/configs/ast-common.h ++++ b/include/configs/ast-common.h +@@ -108,7 +108,7 @@ + #define CONFIG_SYS_MAX_FLASH_BANKS (CONFIG_FMC_CS) + #define CONFIG_SYS_MAX_FLASH_SECT (8192) /* max number of sectors on one chip */ + #define CONFIG_ENV_IS_IN_FLASH 1 +-#define CONFIG_ENV_OFFSET 0x2400000 /* environment starts here */ ++#define CONFIG_ENV_OFFSET 0xa0000 /* environment starts here */ + #define CONFIG_ENV_ADDR (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET) + #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ + +@@ -116,7 +116,7 @@ + #define CONFIG_ENV_ADDR_REDUND (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET_REDUND) + #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +-#define CONFIG_BOOTCOMMAND "bootm 20080000" ++#define CONFIG_BOOTCOMMAND "bootm 20b00000" + #define CONFIG_ENV_OVERWRITE + + #define ASPEED_ENV_SETTINGS \ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch new file mode 100644 index 000000000..8da4dc22f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch @@ -0,0 +1,50 @@ +From ad47771d6210d686082498e4e829b41b8fd8e160 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 29 Mar 2019 12:30:20 -0700 +Subject: [PATCH] Add TPM enable pulse triggering + +This commit adds onboard TPM enable pulse triggering. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + board/aspeed/ast-g5/ast-g5-intel.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index ac2af9af56..45ecd83fd3 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -56,8 +56,8 @@ static const GPIOValue gpio_table[] = { + GPIO_DEBOUNCE_8MS}, + + /* Enable Pulse -- pin D6 */ +- [GPIO_ENABLE_TPM_PULSE] = {PORT_PIN(GPIO_PORT_D, GPIO_PIN_6), +- GPIO_CFG_DEFAULT, 0, GPIO_DEBOUNCE_8MS}, ++ [GPIO_ENABLE_TPM_PULSE] = {TPM_EN_PULSE_PORT_PIN, GPCFG_OUTPUT_EN, 0, ++ GPIO_DEBOUNCE_NONE}, + }; + + #define LPC_SNOOP_ADDR 0x80 +@@ -237,6 +237,13 @@ void id_led_control(int id, int action) + gpio_set_value(s_led_info[id].gpio, s_led_info[id].state); + } + ++static void enable_onboard_tpm(void) ++{ ++ gpio_set_value(GPIO_ENABLE_TPM_PULSE, 1); ++ mdelay(50); ++ gpio_set_value(GPIO_ENABLE_TPM_PULSE, 0); ++} ++ + static void timer8_irq_handler(void *regs) + { + int i; +@@ -501,6 +508,7 @@ void ast_g5_intel(void) + espi_init(); + sgpio_init(); + timer8_init(); ++ enable_onboard_tpm(); + if (intel_force_firmware_jumper_enabled()) { + /* FFUJ mode:- ChassisID: Solid Blue, StatusLED: Solid Amber */ + id_led_control(GPIO_ID_LED, EIDLED_On); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch new file mode 100644 index 000000000..ce160e137 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch @@ -0,0 +1,330 @@ +From 7bbaf8f4c268f9df195a84486caf3c22e21db59e Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Tue, 21 May 2019 00:19:16 +0530 +Subject: [PATCH] IPMI command handler implementation in uboot + +IPMI command handler implemtation in uBoot. +Implemented IPMI commands: + 1) Get Device ID + 2) Get Self Test Result + +Tested By: +Ran the above IPMI command Via KCS channel +and got proper response. +- Get Device ID + Req: ipmitool raw 6 1 + Res: 23 00 82 03 02 00 57 01 00 7b 00 00 00 00 00 +- Get Self Test Results + Req: ipmitool raw 6 4 + Res: 56 00 + +Change-Id: I18b205bc45c34f7c4ef16adc29fa5bd494624ceb +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +--- + board/aspeed/ast-g5/Makefile | 1 + + board/aspeed/ast-g5/ast-g5-kcs.c | 77 ++++++++++--------- + board/aspeed/ast-g5/ipmi-handler.c | 118 +++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ipmi-handler.h | 40 ++++++++++ + 4 files changed, 202 insertions(+), 34 deletions(-) + create mode 100644 board/aspeed/ast-g5/ipmi-handler.c + create mode 100644 board/aspeed/ast-g5/ipmi-handler.h + +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index 05972b9d17..f28fcfe61c 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -5,3 +5,4 @@ obj-y += ast-g5-irq.o + obj-y += ast-g5-gpio.o + obj-y += ast-g5-timer.o + obj-y += ast-g5-kcs.o ++obj-y += ipmi-handler.o +diff --git a/board/aspeed/ast-g5/ast-g5-kcs.c b/board/aspeed/ast-g5/ast-g5-kcs.c +index 7bff26f9db..98bf69ba85 100644 +--- a/board/aspeed/ast-g5/ast-g5-kcs.c ++++ b/board/aspeed/ast-g5/ast-g5-kcs.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + // Copyright (c) 2018-2019 Intel Corporation + +-#include "ast-g5-kcs.h" ++#include "ipmi-handler.h" + + #ifdef DEBUG_KCS_ENABLED + #define DBG_KCS printf +@@ -9,11 +9,6 @@ + #define DBG_KCS(...) + #endif + +-/* TODO: Move to IPMI file. */ +-#define IPMI_CC_OK 0x00 +-#define IPMI_CC_INVALID 0xC1 +-#define IPMI_CC_UNSPECIFIED 0xFF +- + #define KCS_CHANNEL_NO_3 3 + + static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 }; +@@ -103,6 +98,7 @@ static void init_kcs_packet(u16 channel_num) + static void process_kcs_request(u16 channel_num) + { + struct kcs_packet *kcs_pkt = NULL; ++ struct ipmi_cmd_data ipmi_data; + int i; + + kcs_pkt = get_kcs_packet(channel_num); +@@ -117,37 +113,49 @@ static void process_kcs_request(u16 channel_num) + DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]); + DBG_KCS("\n"); + #endif ++ u8 req_lun = kcs_pkt->data_in[0] & 0x03; /* LUN[1:0] */ ++ ipmi_data.net_fun = (kcs_pkt->data_in[0] >> 2); /* netfn[7:2] */ ++ ipmi_data.cmd = kcs_pkt->data_in[1]; /* cmd */ ++ /* We support only BMC LUN 00h */ ++ if (req_lun != LUN_BMC) { ++ kcs_pkt->data_out[0] = ++ GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_INVALID_CMD_LUN; /* CC code */ ++ kcs_pkt->data_out_len = 3; ++ goto done; ++ } + +- /* +- * TODO: Move it to IPMI Command Handler +- * Below code is added for timebeing till +- * we implement the IPMI command handler. +- */ +- kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */ +- kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */ +- kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */ +- +- if (((kcs_pkt->data_in[0] >> 2) == 0x06) && +- (kcs_pkt->data_in[1] == 0x01)) { +- /* Get Device ID */ +- u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02, +- 0xBF, 0x57, 0x01, 0x00, 0x7B, +- 0x00, 0x00, 0x00, 0x00, 0x00 }; +- for (i = 0; i < 15; i++) +- kcs_pkt->data_out[i + 3] = device_id[i]; +- kcs_pkt->data_out_len = 18; +- } else if (((kcs_pkt->data_in[0] >> 2) == 0x06) && +- (kcs_pkt->data_in[1] == 0x04)) { +- /* Get Self Test Results */ +- kcs_pkt->data_out[3] = 0x56; +- kcs_pkt->data_out[4] = 0x00; +- kcs_pkt->data_out_len = 5; +- } else { +- kcs_pkt->data_out[2] = +- IPMI_CC_INVALID; /* Invalid or not supported. */ ++ /* Boundary check */ ++ if ((kcs_pkt->data_in_idx - 2) > sizeof(ipmi_data.req_data)) { ++ kcs_pkt->data_out[0] = ++ GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_OUT_OF_SPACE; /* CC code */ + kcs_pkt->data_out_len = 3; ++ goto done; + } +- /* END: TODO */ ++ /* Fill in IPMI request data */ ++ ipmi_data.req_len = kcs_pkt->data_in_idx - 2; ++ for (i = 0; i < kcs_pkt->data_in_idx - 2; i++) ++ ipmi_data.req_data[i] = kcs_pkt->data_in[i + 2]; ++ ++ /* Call IPMI command handler */ ++ ipmi_cmd_handler(&ipmi_data); ++ ++ /* Get IPMI response and fill KCS out data */ ++ /* First 2 bytes in KCS response are netFn, Cmd */ ++ kcs_pkt->data_out[0] = GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; ++ if ((ipmi_data.res_len + 2) > sizeof(kcs_pkt->data_out)) { ++ kcs_pkt->data_out[2] = IPMI_CC_UNSPECIFIED; /* CC code */ ++ kcs_pkt->data_out_len = 3; ++ goto done; ++ } ++ for (i = 0; i < ipmi_data.res_len; i++) ++ kcs_pkt->data_out[i + 2] = ipmi_data.res_data[i]; ++ ++ kcs_pkt->data_out_len = ipmi_data.res_len + 2; + + #ifdef DEBUG_KCS_ENABLED + DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len); +@@ -156,6 +164,7 @@ static void process_kcs_request(u16 channel_num) + DBG_KCS("\n"); + #endif + ++done: + kcs_pkt->phase = KCS_PHASE_READ; + write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]); + kcs_pkt->read_req_done = false; +diff --git a/board/aspeed/ast-g5/ipmi-handler.c b/board/aspeed/ast-g5/ipmi-handler.c +new file mode 100644 +index 0000000000..9cccee9f2f +--- /dev/null ++++ b/board/aspeed/ast-g5/ipmi-handler.c +@@ -0,0 +1,118 @@ ++ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include "ipmi-handler.h" ++ ++/* IPMI network function codes */ ++#define NETFN_APP 0x06 ++ ++/* IPMI command codes */ ++#define CMD_GET_DEV_ID 0x01 ++#define CMD_GET_SELF_TEST_RESULTS 0x04 ++ ++typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res); ++ ++struct get_dev_id { ++ u8 completion_code; ++ u8 dev_id; ++ u8 dev_rev; ++ u8 fw_rev1; ++ u8 fw_rev2; ++ u8 ipmi_ver; ++ u8 dev_support; ++ u8 mfg_id[3]; ++ u8 product_id[2]; ++ u8 aux_fw_rev[4]; ++}; ++struct self_test_res { ++ u8 completion_code; ++ u8 res_byte[2]; ++}; ++ ++struct ipmi_cmd_table { ++ u8 net_fun; ++ u8 cmd; ++ fun_handler process_cmd; ++}; ++ ++static u16 get_device_id(u8 *req, u16 req_len, u8 *res) ++{ ++ /* Get Device ID */ ++ bool operation = 1; /* Firmware operation */ ++ u8 intel_mfg_id[3] = { 0x57, 0x01, 0x00 }; ++ u8 platform_id[2] = { 0x7B, 0x00 }; ++ u8 aux_fw_rev[4] = { 0x00, 0x00, 0x00, 0x00 }; ++ struct get_dev_id *result = (struct get_dev_id *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ result->dev_id = 0x23; ++ result->dev_rev = 0x00; /* Not provides dev SDR */ ++ ++ result->ipmi_ver = 0x02; /* IPMI 2.0 */ ++ result->dev_support = 0x00; /* No dev support in this mode */ ++ memcpy(result->mfg_id, intel_mfg_id, sizeof(result->mfg_id)); ++ memcpy(result->aux_fw_rev, aux_fw_rev, sizeof(result->aux_fw_rev)); ++ ++ /* TODO: Get Firmware version from flash(PFM Header) */ ++ result->fw_rev1 = ((operation << 7) | (0x02 & 0x7F)); ++ result->fw_rev2 = 0x03; ++ /* TODO: Read Platform ID from GPIO */ ++ memcpy(result->product_id, platform_id, sizeof(result->product_id)); ++ ++ return sizeof(struct get_dev_id); ++} ++ ++static u16 get_self_test_result(u8 *req, u16 req_len, u8 *res) ++{ ++ /* Get Self Test Results */ ++ struct self_test_res *result = (struct self_test_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ result->res_byte[0] = 0x56; /* Self test function not implemented. */ ++ result->res_byte[1] = 0x00; ++ ++ return sizeof(struct self_test_res); ++} ++ ++const struct ipmi_cmd_table cmd_info[] = { ++ { NETFN_APP, CMD_GET_DEV_ID, get_device_id }, ++ { NETFN_APP, CMD_GET_SELF_TEST_RESULTS, get_self_test_result } ++}; ++ ++#define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info) ++ ++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data) ++{ ++ int i = 0; ++ for (i = 0; i < CMD_TABLE_SIZE; i++) { ++ if ((cmd_info[i].net_fun == ipmi_data->net_fun) && ++ (cmd_info[i].cmd == ipmi_data->cmd)) { ++ break; ++ } ++ } ++ ++ if (i == CMD_TABLE_SIZE) { ++ /* Invalid or not supported. */ ++ ipmi_data->res_data[0] = IPMI_CC_INVALID_CMD; ++ ipmi_data->res_len = 1; ++ return; ++ } ++ ++ /* Call the appropriate function handler */ ++ ipmi_data->res_len = ++ cmd_info[i].process_cmd(ipmi_data->req_data, ipmi_data->req_len, ++ &ipmi_data->res_data[0]); ++ ++ return; ++} +diff --git a/board/aspeed/ast-g5/ipmi-handler.h b/board/aspeed/ast-g5/ipmi-handler.h +new file mode 100644 +index 0000000000..9d46d9bd9a +--- /dev/null ++++ b/board/aspeed/ast-g5/ipmi-handler.h +@@ -0,0 +1,40 @@ ++ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018-2019 Intel Corporation */ ++ ++#include "ast-g5-kcs.h" ++ ++/* IPMI completion codes */ ++#define IPMI_CC_OK 0x00 ++#define IPMI_CC_NODE_BUSY 0xC0 ++#define IPMI_CC_INVALID_CMD 0xC1 ++#define IPMI_CC_INVALID_CMD_LUN 0xC2 ++#define IPMI_CC_OUT_OF_SPACE 0xC4 ++#define IPMI_CC_INVALID_DATA_LENGTH 0xC7 ++#define IPMI_CC_INVALID_DATA_FIELD 0xCC ++#define IPMI_CC_UNSPECIFIED 0xFF ++ ++/* BMC IPMB LUNs */ ++#define LUN_BMC 0x00 ++#define LUN_OEM1 0x01 ++#define LUN_SMS 0x02 ++#define LUN_OEM2 0x01 ++ ++ ++#define MAX_IPMI_REQ_DATA_SIZE MAX_KCS_PKT_SIZE ++#define MAX_IPMI_RES_DATA_SIZE 64 ++ ++/* Response netFn[7:2], Lun[1:0] */ ++#define GET_RESP_NETFN_LUN(lun, netfn) \ ++ ((lun & 0x03) | (((netfn + 1) << 2) & 0xFD)) ++ ++struct ipmi_cmd_data { ++ u8 net_fun; ++ u8 cmd; ++ u16 req_len; ++ u16 res_len; ++ u8 req_data[MAX_IPMI_REQ_DATA_SIZE]; ++ u8 res_data[MAX_IPMI_RES_DATA_SIZE]; ++}; ++ ++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch new file mode 100644 index 000000000..eaccfa99e --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0025-Manufacturing-mode-physical-presence-detection.patch @@ -0,0 +1,195 @@ +From 8a2f6a42c3be0426803fc0a70444ba95bf73443f Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Thu, 20 Jun 2019 18:11:43 +0530 +Subject: [PATCH] Manufacturing mode physical presence detection + +Support for physical presence of manufacturing mode added. +Front panel power button press for 15 seconds will be detected +and marked as special mode for manufacturing request. +There will be 10 second Status LED blink for 10 seconds to +do the physical indication to the user. This indicates the +user that he has pressed power button long enough for +manufacturing mode detection. + +Tested: +1. Verified by holding the power button when u-boot boots for +15 seconds, and confirmed that bootargs passed to linux has +special=mfg string and status led blink physical indication +has been provided +2. Verified in normal condition special=mfg string is not passed +and no physical indication has been provided + +Change-Id: Id7e7c7e7860c7ef3ae8e3a7a7cfda7ff506c0f2b +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + board/aspeed/ast-g5/ast-g5-gpio.h | 2 +- + board/aspeed/ast-g5/ast-g5-intel.c | 57 ++++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5.c | 2 -- + common/autoboot.c | 16 +++++++-- + 4 files changed, 72 insertions(+), 5 deletions(-) + +diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h +index 54b7388a22f5..8ccf4373460b 100644 +--- a/board/aspeed/ast-g5/ast-g5-gpio.h ++++ b/board/aspeed/ast-g5/ast-g5-gpio.h +@@ -73,7 +73,7 @@ + #define AMB_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_5) + #define FORCE_BMC_UPDATE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_0) + #define TPM_EN_PULSE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_6) +- ++#define FP_PWR_BTN_PORT_PIN PORT_PIN(GPIO_PORT_E, GPIO_PIN_2) + + // GPIO Configuration Register bits + #define GPCFG_EVENT_TO_SMI (1 << 7) // 1 == enabled +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 45ecd83fd3f0..6ea7f0060c57 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -24,6 +24,7 @@ enum gpio_names { + GPIO_AMBER_LED, + GPIO_FF_UPD_JUMPER, + GPIO_ENABLE_TPM_PULSE, ++ GPIO_FP_PWR_BTN, + }; + + #define GPIO_CFG_DEFAULT (GPCFG_ACTIVE_HIGH | GPCFG_LEVEL_TRIG) +@@ -58,6 +59,10 @@ static const GPIOValue gpio_table[] = { + /* Enable Pulse -- pin D6 */ + [GPIO_ENABLE_TPM_PULSE] = {TPM_EN_PULSE_PORT_PIN, GPCFG_OUTPUT_EN, 0, + GPIO_DEBOUNCE_NONE}, ++ /* Front Panel Power Button -- pin E2 */ ++ [GPIO_FP_PWR_BTN] = {FP_PWR_BTN_PORT_PIN, GPIO_CFG_LOW_INPUT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ + }; + + #define LPC_SNOOP_ADDR 0x80 +@@ -109,6 +114,8 @@ static const GPIOValue gpio_table[] = { + #define HOST_SERIAL_A_HIGH_SPEED (1 << 0) + #define HOST_SERIAL_B_HIGH_SPEED (1 << 1) + ++#define POWERON_RESET_BIT BIT(0) ++ + static void sgpio_init(void) + { + uint32_t value; +@@ -403,6 +410,44 @@ static void update_bootargs_cmd(const char *key, const char *value) + free(buf); + } + ++static bool is_mfg_mode_phy_req(void) ++{ ++ /* ++ * Assume mfg mode physical request is made, if power button ++ * is pressed continously for 15 seconds, indicate the ++ * same in bootargs ++ */ ++ const uint32_t delay_in_ms = 100; ++ const uint32_t read_count = ((15 * 1000) / delay_in_ms); ++ const uint32_t delay_for_indication = 2 * 1000; ++ uint32_t count; ++ ++ for (count = 0; count < read_count; ++count) { ++ if (!gpio_get_value(GPIO_FP_PWR_BTN)) ++ return false; ++ ++ mdelay(delay_in_ms); ++ } ++ debug("is_mfg_mode_phy_req : detected mfg mode request\n"); ++ id_led_control(GPIO_GREEN_LED, EIDLED_Blink_3HZ); ++ /* ++ * Delay up to 15 seconds until the power button is released to prevent ++ * unintentional power button overriding to PCH through GPIO ++ * pass-through. ++ */ ++ for (count = 0; count < read_count; ++count) { ++ if (!gpio_get_value(GPIO_FP_PWR_BTN)) ++ break; ++ ++ mdelay(delay_in_ms); ++ } ++ /* Keep the indication at least for 2 seconds */ ++ if (delay_in_ms * count < delay_for_indication) ++ mdelay(delay_for_indication - (delay_in_ms * count)); ++ ++ return true; ++} ++ + void ast_g5_intel_late_init(void) + { + char value[32]; +@@ -450,6 +495,18 @@ void ast_g5_intel_late_init(void) + ast_scu_write(0, AST_SCU_SYS_CTRL); + + update_bootargs_cmd("resetreason", value); ++ ++ /* Update the special mode in bootargs */ ++ if (reset_reason & POWERON_RESET_BIT && is_mfg_mode_phy_req()) ++ update_bootargs_cmd("special", "mfg"); ++ else ++ update_bootargs_cmd("special", NULL); ++ ++ ast_enable_pass_through(); ++} ++ ++void board_pre_abort_autoboot(void) ++{ + } + + static void pwm_init(void) +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index d89a2b799a05..a4f3681c0602 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -28,8 +28,6 @@ int board_early_init_f(void) + { + /* make sure uart5 is using 24MHz clock */ + ast_config_uart5_clk(); +- /*enable pass through*/ +- ast_enable_pass_through(); + arch_interrupt_init_early(); + + return 0; +diff --git a/common/autoboot.c b/common/autoboot.c +index d66c0fa63a3e..570d8956988c 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -256,13 +256,21 @@ static int __abortboot(int bootdelay) + } + # endif /* CONFIG_AUTOBOOT_KEYED */ + ++/* Allow for board specific config when we check abort condition */ ++__weak void board_pre_abort_autoboot(void) ++{ ++ /* please define board specific board_pre_abort_autoboot() */ ++} ++ + static int abortboot(int bootdelay) + { + int abort = 0; + + # ifdef AST_G5_INTEL +- if (intel_force_firmware_jumper_enabled()) +- return 1; ++ if (intel_force_firmware_jumper_enabled()) { ++ abort = 1; ++ goto exit; ++ } + # endif + + if (bootdelay >= 0) +@@ -273,6 +281,10 @@ static int abortboot(int bootdelay) + gd->flags &= ~GD_FLG_SILENT; + #endif + ++exit: ++ if (abort) ++ board_pre_abort_autoboot(); ++ + return abort; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch new file mode 100644 index 000000000..2002259ee --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0026-Aspeed-I2C-support-in-U-Boot.patch @@ -0,0 +1,1521 @@ +From dd5ead5f8474a9929301745d3cdac23385ff6ded Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 6 May 2019 03:01:55 +0530 +Subject: [PATCH] Aspeed I2C support in U-Boot + +Adding Aspeed I2C support in u-boot and enabled +i2c command. It is mainly used for PFR to +communicate with PFR CPLD while BMC is in +"Force Firmware Update" mode. + +Tested: +Using i2c command in u-boot, validated +i2c functionalities like probe, read and write. + +Change-Id: Iad9af4a57a58bc8dc5c470bfadad9dac1371c238 +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +--- + .../include/asm/arch-aspeed/ast_g5_platform.h | 14 + + arch/arm/include/asm/arch-aspeed/ast_scu.h | 5 + + arch/arm/include/asm/arch-aspeed/regs-iic.h | 204 +++++ + arch/arm/mach-aspeed/ast-scu.c | 122 +++ + board/aspeed/ast-g5/ast-g5.c | 8 + + configs/ast_g5_phy_defconfig | 2 + + drivers/i2c/Kconfig | 5 + + drivers/i2c/Makefile | 1 + + drivers/i2c/ast_i2c.c | 852 ++++++++++++++++++ + drivers/i2c/ast_i2c.h | 131 +++ + include/configs/ast-common.h | 5 + + 11 files changed, 1349 insertions(+) + create mode 100644 arch/arm/include/asm/arch-aspeed/regs-iic.h + create mode 100644 drivers/i2c/ast_i2c.c + create mode 100644 drivers/i2c/ast_i2c.h + +diff --git a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h +index 42108733f3..a84f471bf4 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_g5_platform.h +@@ -105,6 +105,20 @@ + #define AST_LPC_BASE 0x1E789000 /* LPC */ + #define AST_MBX_BASE 0x1E789200 /* Mailbox */ + #define AST_I2C_BASE 0x1E78A000 /* I2C */ ++#define AST_I2C_DEV0_BASE 0x1E78A040 /* I2C DEV1 */ ++#define AST_I2C_DEV1_BASE 0x1E78A080 /* I2C DEV2 */ ++#define AST_I2C_DEV2_BASE 0x1E78A0C0 /* I2C DEV3 */ ++#define AST_I2C_DEV3_BASE 0x1E78A100 /* I2C DEV4 */ ++#define AST_I2C_DEV4_BASE 0x1E78A140 /* I2C DEV5 */ ++#define AST_I2C_DEV5_BASE 0x1E78A180 /* I2C DEV6 */ ++#define AST_I2C_DEV6_BASE 0x1E78A1C0 /* I2C DEV7 */ ++#define AST_I2C_DEV7_BASE 0x1E78A300 /* I2C DEV8 */ ++#define AST_I2C_DEV8_BASE 0x1E78A340 /* I2C DEV9 */ ++#define AST_I2C_DEV9_BASE 0x1E78A380 /* I2C DEV10 */ ++#define AST_I2C_DEV10_BASE 0x1E78A3C0 /* I2C DEV11 */ ++#define AST_I2C_DEV11_BASE 0x1E78A400 /* I2C DEV12 */ ++#define AST_I2C_DEV12_BASE 0x1E78A440 /* I2C DEV13 */ ++#define AST_I2C_DEV13_BASE 0x1E78A480 /* I2C DEV14 */ + #define AST_PECI_BASE 0x1E78B000 /* PECI */ + #define AST_PCIARBITER_BASE 0x1E78C000 /* PCI ARBITER */ + #define AST_UART2_BASE 0x1E78D000 /* UART2 */ +diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h +index 369c4e3b60..b94d13e97d 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast_scu.h ++++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h +@@ -28,6 +28,8 @@ + #ifndef __AST_SCU_H + #define __AST_SCU_H + ++#include <common.h> ++ + extern void ast_scu_show_system_info (void); + extern void ast_scu_sys_rest_info(void); + extern void ast_scu_security_info(void); +@@ -39,13 +41,16 @@ extern u32 ast_get_clk_source(void); + extern u32 ast_get_h_pll_clk(void); + extern u32 ast_get_m_pll_clk(void); + extern u32 ast_get_ahbclk(void); ++extern u32 ast_get_pclk(void); + + extern u32 ast_scu_get_vga_memsize(void); + ++extern void ast_scu_init_i2c(void); + extern void ast_scu_init_eth(u8 num); + extern void ast_scu_multi_func_eth(u8 num); + extern void ast_scu_multi_func_romcs(u8 num); + extern void ast_scu_multi_func_sgpio(void); ++extern void ast_scu_multi_func_i2c(u8 bus_no); + + void ast_config_uart5_clk(void); + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-iic.h b/arch/arm/include/asm/arch-aspeed/regs-iic.h +new file mode 100644 +index 0000000000..5eb3f0a828 +--- /dev/null ++++ b/arch/arm/include/asm/arch-aspeed/regs-iic.h +@@ -0,0 +1,204 @@ ++/* arch/arm/plat-aspeed/include/mach/regs-iic.h ++ * ++ * Copyright (c) 2012 ASPEED Technology Inc. <ryan_chen@aspeedtech.com> ++ * http://www.aspeedtech.com/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * ASPEED I2C Controller ++*/ ++ ++#ifndef __ASM_ARCH_REGS_IIC_H ++#define __ASM_ARCH_REGS_IIC_H __FILE__ ++ ++#ifdef CONFIG_ARCH_AST1010 ++#define AST_I2C_DMA_SIZE 512 ++#else ++#define AST_I2C_DMA_SIZE 4096 ++#endif ++#define AST_I2C_PAGE_SIZE 256 ++ ++#if defined(CONFIG_ARCH_AST2300) ++#define NUM_BUS 9 ++#elif defined(CONFIG_ARCH_AST2400) ++#define NUM_BUS 14 ++#elif defined(CONFIG_ARCH_AST1010) ++#define NUM_BUS 15 ++#elif defined(CONFIG_ARCH_AST1520) || defined(CONFIG_ARCH_AST3200) || defined(CONFIG_ARCH_AST2500) ++#define NUM_BUS 14 ++#elif defined(CONFIG_ARCH_AST1220) ++#define NUM_BUS 10 ++#else ++#err "NO define NUM_BUS" ++#endif ++ ++/* I2C Register */ ++#define I2C_FUN_CTRL_REG 0x00 ++#define I2C_AC_TIMING_REG1 0x04 ++#define I2C_AC_TIMING_REG2 0x08 ++#define I2C_INTR_CTRL_REG 0x0c ++#define I2C_INTR_STS_REG 0x10 ++#define I2C_CMD_REG 0x14 ++#define I2C_DEV_ADDR_REG 0x18 ++#define I2C_BUF_CTRL_REG 0x1c ++#define I2C_BYTE_BUF_REG 0x20 ++#define I2C_DMA_BASE_REG 0x24 ++#define I2C_DMA_LEN_REG 0x28 ++ ++ ++/* Gloable Register Definition */ ++/* 0x00 : I2C Interrupt Status Register */ ++/* 0x08 : I2C Interrupt Target Assignment */ ++#if defined(CONFIG_ARCH_AST2400) ++#define AST_I2CG_INTR14 (0x1 << 13) ++#define AST_I2CG_INTR13 (0x1 << 12) ++#define AST_I2CG_INTR12 (0x1 << 11) ++#define AST_I2CG_INTR11 (0x1 << 10) ++#define AST_I2CG_INTR10 (0x1 << 9) ++#elif defined(CONFIG_ARCH_AST1010) ++#define AST_I2CG_INTR14 (0x1 << 13) ++#define AST_I2CG_INTR13 (0x1 << 12) ++#define AST_I2CG_INTR12 (0x1 << 11) ++#define AST_I2CG_INTR11 (0x1 << 10) ++#define AST_I2CG_INTR10 (0x1 << 9) ++#endif ++#define AST_I2CG_INTR09 (0x1 << 8) ++#define AST_I2CG_INTR08 (0x1 << 7) ++#define AST_I2CG_INTR07 (0x1 << 6) ++#define AST_I2CG_INTR06 (0x1 << 5) ++#define AST_I2CG_INTR05 (0x1 << 4) ++#define AST_I2CG_INTR04 (0x1 << 3) ++#define AST_I2CG_INTR03 (0x1 << 2) ++#define AST_I2CG_INTR02 (0x1 << 1) ++#define AST_I2CG_INTR01 (0x1) ++ ++/* Device Register Definition */ ++/* 0x00 : I2CD Function Control Register */ ++#define AST_I2CD_BUFF_SEL_MASK (0x7 << 20) ++#define AST_I2CD_BUFF_SEL(x) (x << 20) // page 0 ~ 7 ++#define AST_I2CD_M_SDA_LOCK_EN (0x1 << 16) ++#define AST_I2CD_MULTI_MASTER_DIS (0x1 << 15) ++#define AST_I2CD_M_SCL_DRIVE_EN (0x1 << 14) ++#define AST_I2CD_MSB_STS (0x1 << 9) ++#define AST_I2CD_SDA_DRIVE_1T_EN (0x1 << 8) ++#define AST_I2CD_M_SDA_DRIVE_1T_EN (0x1 << 7) ++#define AST_I2CD_M_HIGH_SPEED_EN (0x1 << 6) ++#define AST_I2CD_DEF_ADDR_EN (0x1 << 5) ++#define AST_I2CD_DEF_ALERT_EN (0x1 << 4) ++#define AST_I2CD_DEF_ARP_EN (0x1 << 3) ++#define AST_I2CD_DEF_GCALL_EN (0x1 << 2) ++#define AST_I2CD_SLAVE_EN (0x1 << 1) ++#define AST_I2CD_MASTER_EN (0x1) ++ ++/* 0x04 : I2CD Clock and AC Timing Control Register #1 */ ++#define AST_I2CD_tBUF (0x1 << 28) // 0~7 ++#define AST_I2CD_tHDSTA (0x1 << 24) // 0~7 ++#define AST_I2CD_tACST (0x1 << 20) // 0~7 ++#define AST_I2CD_tCKHIGH (0x1 << 16) // 0~7 ++#define AST_I2CD_tCKLOW (0x1 << 12) // 0~7 ++#define AST_I2CD_tHDDAT (0x1 << 10) // 0~7 ++#define AST_I2CD_CLK_TO_BASE_DIV (0x1 << 8) // 0~3 ++#define AST_I2CD_CLK_BASE_DIV (0x1) // 0~0xf ++ ++/* 0x08 : I2CD Clock and AC Timing Control Register #2 */ ++#define AST_I2CD_tTIMEOUT (0x1) // 0~7 ++#define AST_NO_TIMEOUT_CTRL 0x0 ++ ++ ++/* 0x0c : I2CD Interrupt Control Register */ ++#define AST_I2CD_SDA_DL_TO_INTR_EN (0x1 << 14) ++#define AST_I2CD_BUS_RECOVER_INTR_EN (0x1 << 13) ++#define AST_I2CD_SMBUS_ALT_INTR_EN (0x1 << 12) ++#define AST_I2CD_SLAVE_MATCH_INTR_EN (0x1 << 7) ++#define AST_I2CD_SCL_TO_INTR_EN (0x1 << 6) ++#define AST_I2CD_ABNORMAL_INTR_EN (0x1 << 5) ++#define AST_I2CD_NORMAL_STOP_INTR_EN (0x1 << 4) ++#define AST_I2CD_ARBIT_LOSS_INTR_EN (0x1 << 3) ++#define AST_I2CD_RX_DOWN_INTR_EN (0x1 << 2) ++#define AST_I2CD_TX_NAK_INTR_EN (0x1 << 1) ++#define AST_I2CD_TX_ACK_INTR_EN (0x1) ++ ++/* 0x10 : I2CD Interrupt Status Register : WC */ ++#define AST_I2CD_INTR_STS_SDA_DL_TO (0x1 << 14) ++#define AST_I2CD_INTR_STS_BUS_RECOVER (0x1 << 13) ++#define AST_I2CD_INTR_STS_SMBUS_ALT (0x1 << 12) ++#define AST_I2CD_INTR_STS_SMBUS_ARP_ADDR (0x1 << 11) ++#define AST_I2CD_INTR_STS_SMBUS_DEV_ALT (0x1 << 10) ++#define AST_I2CD_INTR_STS_SMBUS_DEF_ADDR (0x1 << 9) ++#define AST_I2CD_INTR_STS_GCALL_ADDR (0x1 << 8) ++#define AST_I2CD_INTR_STS_SLAVE_MATCH (0x1 << 7) ++#define AST_I2CD_INTR_STS_SCL_TO (0x1 << 6) ++#define AST_I2CD_INTR_STS_ABNORMAL (0x1 << 5) ++#define AST_I2CD_INTR_STS_NORMAL_STOP (0x1 << 4) ++#define AST_I2CD_INTR_STS_ARBIT_LOSS (0x1 << 3) ++#define AST_I2CD_INTR_STS_RX_DOWN (0x1 << 2) ++#define AST_I2CD_INTR_STS_TX_NAK (0x1 << 1) ++#define AST_I2CD_INTR_STS_TX_ACK (0x1) ++ ++/* 0x14 : I2CD Command/Status Register */ ++#define AST_I2CD_SDA_OE (0x1 << 28) ++#define AST_I2CD_SDA_O (0x1 << 27) ++#define AST_I2CD_SCL_OE (0x1 << 26) ++#define AST_I2CD_SCL_O (0x1 << 25) ++#define AST_I2CD_TX_TIMING (0x1 << 24) // 0 ~3 ++#define AST_I2CD_TX_STATUS (0x1 << 23) ++// Tx State Machine ++#define AST_I2CD_IDLE 0x0 ++#define AST_I2CD_MACTIVE 0x8 ++#define AST_I2CD_MSTART 0x9 ++#define AST_I2CD_MSTARTR 0xa ++#define AST_I2CD_MSTOP 0xb ++#define AST_I2CD_MTXD 0xc ++#define AST_I2CD_MRXACK 0xd ++#define AST_I2CD_MRXD 0xe ++#define AST_I2CD_MTXACK 0xf ++#define AST_I2CD_SWAIT 0x1 ++#define AST_I2CD_SRXD 0x4 ++#define AST_I2CD_STXACK 0x5 ++#define AST_I2CD_STXD 0x6 ++#define AST_I2CD_SRXACK 0x7 ++#define AST_I2CD_RECOVER 0x3 ++ ++#define AST_I2CD_SCL_LINE_STS (0x1 << 18) ++#define AST_I2CD_SDA_LINE_STS (0x1 << 17) ++#define AST_I2CD_BUS_BUSY_STS (0x1 << 16) ++#define AST_I2CD_SDA_OE_OUT_DIR (0x1 << 15) ++#define AST_I2CD_SDA_O_OUT_DIR (0x1 << 14) ++#define AST_I2CD_SCL_OE_OUT_DIR (0x1 << 13) ++#define AST_I2CD_SCL_O_OUT_DIR (0x1 << 12) ++#define AST_I2CD_BUS_RECOVER_CMD_EN (0x1 << 11) ++#define AST_I2CD_S_ALT_EN (0x1 << 10) ++// 0 : DMA Buffer, 1: Pool Buffer ++//AST1070 DMA register ++#define AST_I2CD_RX_DMA_ENABLE (0x1 << 9) ++#define AST_I2CD_TX_DMA_ENABLE (0x1 << 8) ++ ++/* Command Bit */ ++#define AST_I2CD_RX_BUFF_ENABLE (0x1 << 7) ++#define AST_I2CD_TX_BUFF_ENABLE (0x1 << 6) ++#define AST_I2CD_M_STOP_CMD (0x1 << 5) ++#define AST_I2CD_M_S_RX_CMD_LAST (0x1 << 4) ++#define AST_I2CD_M_RX_CMD (0x1 << 3) ++#define AST_I2CD_S_TX_CMD (0x1 << 2) ++#define AST_I2CD_M_TX_CMD (0x1 << 1) ++#define AST_I2CD_M_START_CMD (0x1) ++ ++/* 0x18 : I2CD Slave Device Address Register */ ++ ++/* 0x1C : I2CD Pool Buffer Control Register */ ++#define AST_I2CD_RX_BUF_ADDR_GET(x) ((x >> 24) & 0xff) ++#define AST_I2CD_RX_BUF_END_ADDR_SET(x) (x << 16) ++#define AST_I2CD_TX_DATA_BUF_END_SET(x) ((x & 0xff) << 8) ++#define AST_I2CD_TX_DATA_BUF_GET(x) ((x >> 8) & 0xff) ++#define AST_I2CD_BUF_BASE_ADDR_SET(x) (x & 0x3f) ++ ++/* 0x20 : I2CD Transmit/Receive Byte Buffer Register */ ++#define AST_I2CD_GET_MODE(x) ((x >> 8) & 0x1) ++ ++#define AST_I2CD_RX_BYTE_BUFFER (0xff << 8) ++#define AST_I2CD_TX_BYTE_BUFFER (0xff) ++ ++ ++#endif /* __ASM_ARCH_REGS_IIC_H */ +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 976c59b82a..537cd4b3e1 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -112,6 +112,12 @@ static struct soc_id soc_map_table[] = { + SOC_ID("AST2530-A2", 0x04030403), + }; + ++void ast_scu_init_i2c(void) ++{ ++ ast_scu_write(ast_scu_read(AST_SCU_RESET) & ~SCU_RESET_I2C, ++ AST_SCU_RESET); ++} ++ + void ast_scu_init_eth(u8 num) + { + /* Set MAC delay Timing */ +@@ -292,6 +298,23 @@ u32 ast_get_ahbclk(void) + return ((hpll / axi_div) / ahb_div); + } + ++u32 ast_get_pclk(void) ++{ ++ unsigned int div, hpll; ++ ++ hpll = ast_get_h_pll_clk(); ++ div = SCU_GET_PCLK_DIV(ast_scu_read(AST_SCU_CLK_SEL)); ++#ifdef AST_SOC_G5 ++ div = (div+1) << 2; ++#else ++ div = (div+1) << 1; ++#endif ++ ++ debug("HPLL=%d, Div=%d, PCLK=%d\n", hpll, div, hpll/div); ++ return (hpll/div); ++} ++ ++ + #else /* ! AST_SOC_G5 */ + + u32 ast_get_h_pll_clk(void) +@@ -457,6 +480,105 @@ void ast_scu_multi_func_sgpio(void) + AST_SCU_FUN_PIN_CTRL2); + } + ++extern void ast_scu_multi_func_i2c(u8 bus_no) ++{ ++#ifdef CONFIG_ARCH_AST1010 ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL4) | ++ SCU_FUN_PIN_SCL13 | ++ SCU_FUN_PIN_SDA13 | ++ SCU_FUN_PIN_SCL14 | ++ SCU_FUN_PIN_SDA14, ++ AST_SCU_FUN_PIN_CTRL4); ++ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL2) | ++ SCU_FUN_PIN_SCL1 | ++ SCU_FUN_PIN_SDA1 | ++ SCU_FUN_PIN_SCL2 | ++ SCU_FUN_PIN_SDA2 | ++ SCU_FUN_PIN_SCL3 | ++ SCU_FUN_PIN_SDA3 | ++ SCU_FUN_PIN_SCL4 | ++ SCU_FUN_PIN_SDA4 | ++ SCU_FUN_PIN_SCL5 | ++ SCU_FUN_PIN_SDA5 | ++ SCU_FUN_PIN_SCL6 | ++ SCU_FUN_PIN_SDA6 | ++ SCU_FUN_PIN_SCL7 | ++ SCU_FUN_PIN_SDA7 | ++ SCU_FUN_PIN_SCL8 | ++ SCU_FUN_PIN_SDA8 | ++ SCU_FUN_PIN_SALT1 | ++ SCU_FUN_PIN_SALT2 | ++ SCU_FUN_PIN_SALT3 | ++ SCU_FUN_PIN_SALT4, ++ AST_SCU_FUN_PIN_CTRL2); ++ ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | ++ SCU_FUN_PIN_SCL9 | ++ SCU_FUN_PIN_SDA9 | ++ SCU_FUN_PIN_SCL10 | ++ SCU_FUN_PIN_SDA10 | ++ SCU_FUN_PIN_SCL11 | ++ SCU_FUN_PIN_SDA11 | ++ SCU_FUN_PIN_SCL12 | ++ SCU_FUN_PIN_SDA12, ++ AST_SCU_FUN_PIN_CTRL1); ++#else ++ //TODO check ... //In AST2400 Due to share pin with SD , please not enable I2C 10 ~14 ++ // AST 2400 have 14 , AST 2300 9 ... ++ u32 pin_ctrl = ast_scu_read(AST_SCU_FUN_PIN_CTRL5); ++ switch (bus_no) { ++ case 0: ++ break; ++ case 1: ++ break; ++ case 2: ++ pin_ctrl |= SCU_FUC_PIN_I2C3; ++ break; ++ case 3: ++ pin_ctrl |= SCU_FUC_PIN_I2C4; ++ break; ++ case 4: ++ pin_ctrl |= SCU_FUC_PIN_I2C5; ++ break; ++ case 5: ++ pin_ctrl |= SCU_FUC_PIN_I2C6; ++ break; ++ case 6: ++ pin_ctrl |= SCU_FUC_PIN_I2C7; ++ break; ++ case 7: ++ pin_ctrl |= SCU_FUC_PIN_I2C8; ++ break; ++ case 8: ++ pin_ctrl |= SCU_FUC_PIN_I2C9; ++ break; ++ case 9: ++ pin_ctrl |= SCU_FUC_PIN_I2C10; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 10: ++ pin_ctrl |= SCU_FUC_PIN_I2C11; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 11: ++ pin_ctrl |= SCU_FUC_PIN_I2C12; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 12: ++ pin_ctrl |= SCU_FUC_PIN_I2C13; ++ pin_ctrl &= ~SCU_FUC_PIN_SD1; ++ break; ++ case 13: ++ pin_ctrl |= SCU_FUC_PIN_I2C14; ++ break; ++ } ++ ++ ast_scu_write(pin_ctrl, AST_SCU_FUN_PIN_CTRL5); ++#endif ++} ++ ++ + u32 ast_scu_revision_id(void) + { + int i; +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index d89a2b799a..ead2e1bb63 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -16,6 +16,7 @@ + #include <asm/arch/regs-scu.h> + #include <asm/arch/regs-sdmc.h> + #include <asm/io.h> ++#include <i2c.h> + + #include "ast-g5.h" + +@@ -87,6 +88,13 @@ int board_init(void) + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gd->flags = 0; + ++ /* Initialize I2C */ ++#if defined(CONFIG_SYS_I2C) ++ i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); ++#else ++ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); ++#endif ++ + ast_g5_intel(); + return 0; + } +diff --git a/configs/ast_g5_phy_defconfig b/configs/ast_g5_phy_defconfig +index 4aefcf49e8..1b96ab7f3b 100644 +--- a/configs/ast_g5_phy_defconfig ++++ b/configs/ast_g5_phy_defconfig +@@ -13,3 +13,5 @@ CONFIG_OF_LIBFDT=y + CONFIG_SPI_FLASH=y + CONFIG_SYS_NS16550=y + CONFIG_USE_IRQ=y ++CONFIG_CMD_I2C=y ++CONFIG_SYS_I2C_AST=y +diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig +index 6e22bbadff..5368ba270a 100644 +--- a/drivers/i2c/Kconfig ++++ b/drivers/i2c/Kconfig +@@ -58,6 +58,11 @@ config DM_I2C_GPIO + bindings are supported. + Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt + ++config SYS_I2C_AST ++ bool "Aspeed I2C bus driver" ++ help ++ Add support for Aspeed I2C busses on AST2500 processors. ++ + config SYS_I2C_FSL + bool "Freescale I2C bus driver" + depends on DM_I2C +diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile +index 167424db98..b2a69eafc1 100644 +--- a/drivers/i2c/Makefile ++++ b/drivers/i2c/Makefile +@@ -11,6 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o + obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o + + obj-$(CONFIG_SYS_I2C_ADI) += adi_i2c.o ++obj-$(CONFIG_SYS_I2C_AST) += ast_i2c.o + obj-$(CONFIG_I2C_MV) += mv_i2c.o + obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o + obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o +diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c +new file mode 100644 +index 0000000000..533419f9dd +--- /dev/null ++++ b/drivers/i2c/ast_i2c.c +@@ -0,0 +1,852 @@ ++/* ++ * i2c_adap_ast.c ++ * ++ * I2C adapter for the ASPEED I2C bus access. ++ * ++ * Copyright (C) 2012-2020 ASPEED Technology Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * History: ++ * 2012.07.26: Initial version [Ryan Chen] ++ */ ++ ++#include <common.h> ++#include <configs/ast-common.h> ++#include <fdtdec.h> ++ ++#include <asm/arch/ast_scu.h> ++#include <i2c.h> ++ ++#include <asm/arch/regs-iic.h> ++#include <asm/io.h> ++ ++// AST2400 buffer mode issue , force I2C slave write use byte mode , read use ++// buffer mode ++/* Use platform_data instead of module parameters */ ++/* Fast Mode = 400 kHz, Standard = 100 kHz */ ++// static int clock = 100; /* Default: 100 kHz */ ++ ++/***************************************************************************/ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define I2C_TIMEOUT_COUNT 200 ++#define I2C_SLEEP_US 1000 ++ ++static unsigned int i2c_bus_num __attribute__((section(".data"))); ++ ++/* Information about i2c controller */ ++struct ast_i2c_bus { ++ u32 reg_base; /* virtual */ ++ u32 speed; ++ u32 state; /* I2C xfer mode state matchine */ ++ u16 addr; /* slave address */ ++ u16 flags; ++ u16 a_len; /* msg length */ ++ u8 *a_buf; /* pointer to msg data */ ++ u16 d_len; /* msg length */ ++ u8 *d_buf; /* pointer to msg data */ ++}; ++ ++static struct ast_i2c_bus ast_i2c[NUM_BUS] __attribute__((section(".data"))); ++ ++struct ast_i2c_timing_table { ++ u32 divisor; ++ u32 timing; ++}; ++ ++static struct ast_i2c_timing_table i2c_timing_table[] = { ++#if defined(AST_SOC_G5) ++ /* Divisor : Base Clock : tCK High : tCK Low */ ++ /* Divisor : [3:0] : [19:16]: [15:12] */ ++ { 6, 0x77700300 | (0x0) | (0x2 << 16) | (0x2 << 12) }, ++ { 7, 0x77700300 | (0x0) | (0x3 << 16) | (0x2 << 12) }, ++ { 8, 0x77700300 | (0x0) | (0x3 << 16) | (0x3 << 12) }, ++ { 9, 0x77700300 | (0x0) | (0x4 << 16) | (0x3 << 12) }, ++ { 10, 0x77700300 | (0x0) | (0x4 << 16) | (0x4 << 12) }, ++ { 11, 0x77700300 | (0x0) | (0x5 << 16) | (0x4 << 12) }, ++ { 12, 0x77700300 | (0x0) | (0x5 << 16) | (0x5 << 12) }, ++ { 13, 0x77700300 | (0x0) | (0x6 << 16) | (0x5 << 12) }, ++ { 14, 0x77700300 | (0x0) | (0x6 << 16) | (0x6 << 12) }, ++ { 15, 0x77700300 | (0x0) | (0x7 << 16) | (0x6 << 12) }, ++ { 16, 0x77700300 | (0x0) | (0x7 << 16) | (0x7 << 12) }, ++ { 17, 0x77700300 | (0x0) | (0x8 << 16) | (0x7 << 12) }, ++ { 18, 0x77700300 | (0x0) | (0x8 << 16) | (0x8 << 12) }, ++ { 19, 0x77700300 | (0x0) | (0x9 << 16) | (0x8 << 12) }, ++ { 20, 0x77700300 | (0x0) | (0x9 << 16) | (0x9 << 12) }, ++ { 21, 0x77700300 | (0x0) | (0xa << 16) | (0x9 << 12) }, ++ { 22, 0x77700300 | (0x0) | (0xa << 16) | (0xa << 12) }, ++ { 23, 0x77700300 | (0x0) | (0xb << 16) | (0xa << 12) }, ++ { 24, 0x77700300 | (0x0) | (0xb << 16) | (0xb << 12) }, ++ { 25, 0x77700300 | (0x0) | (0xc << 16) | (0xb << 12) }, ++ { 26, 0x77700300 | (0x0) | (0xc << 16) | (0xc << 12) }, ++ { 27, 0x77700300 | (0x0) | (0xd << 16) | (0xc << 12) }, ++ { 28, 0x77700300 | (0x0) | (0xd << 16) | (0xd << 12) }, ++ { 29, 0x77700300 | (0x0) | (0xe << 16) | (0xd << 12) }, ++ { 30, 0x77700300 | (0x0) | (0xe << 16) | (0xe << 12) }, ++ { 31, 0x77700300 | (0x0) | (0xf << 16) | (0xe << 12) }, ++ { 32, 0x77700300 | (0x0) | (0xf << 16) | (0xf << 12) }, ++ ++ { 34, 0x77700300 | (0x1) | (0x8 << 16) | (0x7 << 12) }, ++ { 36, 0x77700300 | (0x1) | (0x8 << 16) | (0x8 << 12) }, ++ { 38, 0x77700300 | (0x1) | (0x9 << 16) | (0x8 << 12) }, ++ { 40, 0x77700300 | (0x1) | (0x9 << 16) | (0x9 << 12) }, ++ { 42, 0x77700300 | (0x1) | (0xa << 16) | (0x9 << 12) }, ++ { 44, 0x77700300 | (0x1) | (0xa << 16) | (0xa << 12) }, ++ { 46, 0x77700300 | (0x1) | (0xb << 16) | (0xa << 12) }, ++ { 48, 0x77700300 | (0x1) | (0xb << 16) | (0xb << 12) }, ++ { 50, 0x77700300 | (0x1) | (0xc << 16) | (0xb << 12) }, ++ { 52, 0x77700300 | (0x1) | (0xc << 16) | (0xc << 12) }, ++ { 54, 0x77700300 | (0x1) | (0xd << 16) | (0xc << 12) }, ++ { 56, 0x77700300 | (0x1) | (0xd << 16) | (0xd << 12) }, ++ { 58, 0x77700300 | (0x1) | (0xe << 16) | (0xd << 12) }, ++ { 60, 0x77700300 | (0x1) | (0xe << 16) | (0xe << 12) }, ++ { 62, 0x77700300 | (0x1) | (0xf << 16) | (0xe << 12) }, ++ { 64, 0x77700300 | (0x1) | (0xf << 16) | (0xf << 12) }, ++ ++ { 68, 0x77700300 | (0x2) | (0x8 << 16) | (0x7 << 12) }, ++ { 72, 0x77700300 | (0x2) | (0x8 << 16) | (0x8 << 12) }, ++ { 76, 0x77700300 | (0x2) | (0x9 << 16) | (0x8 << 12) }, ++ { 80, 0x77700300 | (0x2) | (0x9 << 16) | (0x9 << 12) }, ++ { 84, 0x77700300 | (0x2) | (0xa << 16) | (0x9 << 12) }, ++ { 88, 0x77700300 | (0x2) | (0xa << 16) | (0xa << 12) }, ++ { 92, 0x77700300 | (0x2) | (0xb << 16) | (0xa << 12) }, ++ { 96, 0x77700300 | (0x2) | (0xb << 16) | (0xb << 12) }, ++ { 100, 0x77700300 | (0x2) | (0xc << 16) | (0xb << 12) }, ++ { 104, 0x77700300 | (0x2) | (0xc << 16) | (0xc << 12) }, ++ { 108, 0x77700300 | (0x2) | (0xd << 16) | (0xc << 12) }, ++ { 112, 0x77700300 | (0x2) | (0xd << 16) | (0xd << 12) }, ++ { 116, 0x77700300 | (0x2) | (0xe << 16) | (0xd << 12) }, ++ { 120, 0x77700300 | (0x2) | (0xe << 16) | (0xe << 12) }, ++ { 124, 0x77700300 | (0x2) | (0xf << 16) | (0xe << 12) }, ++ { 128, 0x77700300 | (0x2) | (0xf << 16) | (0xf << 12) }, ++ ++ { 136, 0x77700300 | (0x3) | (0x8 << 16) | (0x7 << 12) }, ++ { 144, 0x77700300 | (0x3) | (0x8 << 16) | (0x8 << 12) }, ++ { 152, 0x77700300 | (0x3) | (0x9 << 16) | (0x8 << 12) }, ++ { 160, 0x77700300 | (0x3) | (0x9 << 16) | (0x9 << 12) }, ++ { 168, 0x77700300 | (0x3) | (0xa << 16) | (0x9 << 12) }, ++ { 176, 0x77700300 | (0x3) | (0xa << 16) | (0xa << 12) }, ++ { 184, 0x77700300 | (0x3) | (0xb << 16) | (0xa << 12) }, ++ { 192, 0x77700300 | (0x3) | (0xb << 16) | (0xb << 12) }, ++ { 200, 0x77700300 | (0x3) | (0xc << 16) | (0xb << 12) }, ++ { 208, 0x77700300 | (0x3) | (0xc << 16) | (0xc << 12) }, ++ { 216, 0x77700300 | (0x3) | (0xd << 16) | (0xc << 12) }, ++ { 224, 0x77700300 | (0x3) | (0xd << 16) | (0xd << 12) }, ++ { 232, 0x77700300 | (0x3) | (0xe << 16) | (0xd << 12) }, ++ { 240, 0x77700300 | (0x3) | (0xe << 16) | (0xe << 12) }, ++ { 248, 0x77700300 | (0x3) | (0xf << 16) | (0xe << 12) }, ++ { 256, 0x77700300 | (0x3) | (0xf << 16) | (0xf << 12) }, ++ ++ { 272, 0x77700300 | (0x4) | (0x8 << 16) | (0x7 << 12) }, ++ { 288, 0x77700300 | (0x4) | (0x8 << 16) | (0x8 << 12) }, ++ { 304, 0x77700300 | (0x4) | (0x9 << 16) | (0x8 << 12) }, ++ { 320, 0x77700300 | (0x4) | (0x9 << 16) | (0x9 << 12) }, ++ { 336, 0x77700300 | (0x4) | (0xa << 16) | (0x9 << 12) }, ++ { 352, 0x77700300 | (0x4) | (0xa << 16) | (0xa << 12) }, ++ { 368, 0x77700300 | (0x4) | (0xb << 16) | (0xa << 12) }, ++ { 384, 0x77700300 | (0x4) | (0xb << 16) | (0xb << 12) }, ++ { 400, 0x77700300 | (0x4) | (0xc << 16) | (0xb << 12) }, ++ { 416, 0x77700300 | (0x4) | (0xc << 16) | (0xc << 12) }, ++ { 432, 0x77700300 | (0x4) | (0xd << 16) | (0xc << 12) }, ++ { 448, 0x77700300 | (0x4) | (0xd << 16) | (0xd << 12) }, ++ { 464, 0x77700300 | (0x4) | (0xe << 16) | (0xd << 12) }, ++ { 480, 0x77700300 | (0x4) | (0xe << 16) | (0xe << 12) }, ++ { 496, 0x77700300 | (0x4) | (0xf << 16) | (0xe << 12) }, ++ { 512, 0x77700300 | (0x4) | (0xf << 16) | (0xf << 12) }, ++ ++ { 544, 0x77700300 | (0x5) | (0x8 << 16) | (0x7 << 12) }, ++ { 576, 0x77700300 | (0x5) | (0x8 << 16) | (0x8 << 12) }, ++ { 608, 0x77700300 | (0x5) | (0x9 << 16) | (0x8 << 12) }, ++ { 640, 0x77700300 | (0x5) | (0x9 << 16) | (0x9 << 12) }, ++ { 672, 0x77700300 | (0x5) | (0xa << 16) | (0x9 << 12) }, ++ { 704, 0x77700300 | (0x5) | (0xa << 16) | (0xa << 12) }, ++ { 736, 0x77700300 | (0x5) | (0xb << 16) | (0xa << 12) }, ++ { 768, 0x77700300 | (0x5) | (0xb << 16) | (0xb << 12) }, ++ { 800, 0x77700300 | (0x5) | (0xc << 16) | (0xb << 12) }, ++ { 832, 0x77700300 | (0x5) | (0xc << 16) | (0xc << 12) }, ++ { 864, 0x77700300 | (0x5) | (0xd << 16) | (0xc << 12) }, ++ { 896, 0x77700300 | (0x5) | (0xd << 16) | (0xd << 12) }, ++ { 928, 0x77700300 | (0x5) | (0xe << 16) | (0xd << 12) }, ++ { 960, 0x77700300 | (0x5) | (0xe << 16) | (0xe << 12) }, ++ { 992, 0x77700300 | (0x5) | (0xf << 16) | (0xe << 12) }, ++ { 1024, 0x77700300 | (0x5) | (0xf << 16) | (0xf << 12) }, ++ ++ { 1088, 0x77700300 | (0x6) | (0x8 << 16) | (0x7 << 12) }, ++ { 1152, 0x77700300 | (0x6) | (0x8 << 16) | (0x8 << 12) }, ++ { 1216, 0x77700300 | (0x6) | (0x9 << 16) | (0x8 << 12) }, ++ { 1280, 0x77700300 | (0x6) | (0x9 << 16) | (0x9 << 12) }, ++ { 1344, 0x77700300 | (0x6) | (0xa << 16) | (0x9 << 12) }, ++ { 1408, 0x77700300 | (0x6) | (0xa << 16) | (0xa << 12) }, ++ { 1472, 0x77700300 | (0x6) | (0xb << 16) | (0xa << 12) }, ++ { 1536, 0x77700300 | (0x6) | (0xb << 16) | (0xb << 12) }, ++ { 1600, 0x77700300 | (0x6) | (0xc << 16) | (0xb << 12) }, ++ { 1664, 0x77700300 | (0x6) | (0xc << 16) | (0xc << 12) }, ++ { 1728, 0x77700300 | (0x6) | (0xd << 16) | (0xc << 12) }, ++ { 1792, 0x77700300 | (0x6) | (0xd << 16) | (0xd << 12) }, ++ { 1856, 0x77700300 | (0x6) | (0xe << 16) | (0xd << 12) }, ++ { 1920, 0x77700300 | (0x6) | (0xe << 16) | (0xe << 12) }, ++ { 1984, 0x77700300 | (0x6) | (0xf << 16) | (0xe << 12) }, ++ { 2048, 0x77700300 | (0x6) | (0xf << 16) | (0xf << 12) }, ++ ++ { 2176, 0x77700300 | (0x7) | (0x8 << 16) | (0x7 << 12) }, ++ { 2304, 0x77700300 | (0x7) | (0x8 << 16) | (0x8 << 12) }, ++ { 2432, 0x77700300 | (0x7) | (0x9 << 16) | (0x8 << 12) }, ++ { 2560, 0x77700300 | (0x7) | (0x9 << 16) | (0x9 << 12) }, ++ { 2688, 0x77700300 | (0x7) | (0xa << 16) | (0x9 << 12) }, ++ { 2816, 0x77700300 | (0x7) | (0xa << 16) | (0xa << 12) }, ++ { 2944, 0x77700300 | (0x7) | (0xb << 16) | (0xa << 12) }, ++ { 3072, 0x77700300 | (0x7) | (0xb << 16) | (0xb << 12) }, ++#else ++ /* Divisor : [3:0] : [18:16]: [13:12] */ ++ { 6, 0x77700300 | (0x0) | (0x2 << 16) | (0x2 << 12) }, ++ { 7, 0x77700300 | (0x0) | (0x3 << 16) | (0x2 << 12) }, ++ { 8, 0x77700300 | (0x0) | (0x3 << 16) | (0x3 << 12) }, ++ { 9, 0x77700300 | (0x0) | (0x4 << 16) | (0x3 << 12) }, ++ { 10, 0x77700300 | (0x0) | (0x4 << 16) | (0x4 << 12) }, ++ { 11, 0x77700300 | (0x0) | (0x5 << 16) | (0x4 << 12) }, ++ { 12, 0x77700300 | (0x0) | (0x5 << 16) | (0x5 << 12) }, ++ { 13, 0x77700300 | (0x0) | (0x6 << 16) | (0x5 << 12) }, ++ { 14, 0x77700300 | (0x0) | (0x6 << 16) | (0x6 << 12) }, ++ { 15, 0x77700300 | (0x0) | (0x7 << 16) | (0x6 << 12) }, ++ { 16, 0x77700300 | (0x0) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 18, 0x77700300 | (0x1) | (0x4 << 16) | (0x3 << 12) }, ++ { 20, 0x77700300 | (0x1) | (0x4 << 16) | (0x4 << 12) }, ++ { 22, 0x77700300 | (0x1) | (0x5 << 16) | (0x4 << 12) }, ++ { 24, 0x77700300 | (0x1) | (0x5 << 16) | (0x5 << 12) }, ++ { 26, 0x77700300 | (0x1) | (0x6 << 16) | (0x5 << 12) }, ++ { 28, 0x77700300 | (0x1) | (0x6 << 16) | (0x6 << 12) }, ++ { 30, 0x77700300 | (0x1) | (0x7 << 16) | (0x6 << 12) }, ++ { 32, 0x77700300 | (0x1) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 36, 0x77700300 | (0x2) | (0x4 << 16) | (0x3 << 12) }, ++ { 40, 0x77700300 | (0x2) | (0x4 << 16) | (0x4 << 12) }, ++ { 44, 0x77700300 | (0x2) | (0x5 << 16) | (0x4 << 12) }, ++ { 48, 0x77700300 | (0x2) | (0x5 << 16) | (0x5 << 12) }, ++ { 52, 0x77700300 | (0x2) | (0x6 << 16) | (0x5 << 12) }, ++ { 56, 0x77700300 | (0x2) | (0x6 << 16) | (0x6 << 12) }, ++ { 60, 0x77700300 | (0x2) | (0x7 << 16) | (0x6 << 12) }, ++ { 64, 0x77700300 | (0x2) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 72, 0x77700300 | (0x3) | (0x4 << 16) | (0x3 << 12) }, ++ { 80, 0x77700300 | (0x3) | (0x4 << 16) | (0x4 << 12) }, ++ { 88, 0x77700300 | (0x3) | (0x5 << 16) | (0x4 << 12) }, ++ { 96, 0x77700300 | (0x3) | (0x5 << 16) | (0x5 << 12) }, ++ { 104, 0x77700300 | (0x3) | (0x6 << 16) | (0x5 << 12) }, ++ { 112, 0x77700300 | (0x3) | (0x6 << 16) | (0x6 << 12) }, ++ { 120, 0x77700300 | (0x3) | (0x7 << 16) | (0x6 << 12) }, ++ { 128, 0x77700300 | (0x3) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 144, 0x77700300 | (0x4) | (0x4 << 16) | (0x3 << 12) }, ++ { 160, 0x77700300 | (0x4) | (0x4 << 16) | (0x4 << 12) }, ++ { 176, 0x77700300 | (0x4) | (0x5 << 16) | (0x4 << 12) }, ++ { 192, 0x77700300 | (0x4) | (0x5 << 16) | (0x5 << 12) }, ++ { 208, 0x77700300 | (0x4) | (0x6 << 16) | (0x5 << 12) }, ++ { 224, 0x77700300 | (0x4) | (0x6 << 16) | (0x6 << 12) }, ++ { 240, 0x77700300 | (0x4) | (0x7 << 16) | (0x6 << 12) }, ++ { 256, 0x77700300 | (0x4) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 288, 0x77700300 | (0x5) | (0x4 << 16) | (0x3 << 12) }, ++ { 320, 0x77700300 | (0x5) | (0x4 << 16) | (0x4 << 12) }, ++ { 352, 0x77700300 | (0x5) | (0x5 << 16) | (0x4 << 12) }, ++ { 384, 0x77700300 | (0x5) | (0x5 << 16) | (0x5 << 12) }, ++ { 416, 0x77700300 | (0x5) | (0x6 << 16) | (0x5 << 12) }, ++ { 448, 0x77700300 | (0x5) | (0x6 << 16) | (0x6 << 12) }, ++ { 480, 0x77700300 | (0x5) | (0x7 << 16) | (0x6 << 12) }, ++ { 512, 0x77700300 | (0x5) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 576, 0x77700300 | (0x6) | (0x4 << 16) | (0x3 << 12) }, ++ { 640, 0x77700300 | (0x6) | (0x4 << 16) | (0x4 << 12) }, ++ { 704, 0x77700300 | (0x6) | (0x5 << 16) | (0x4 << 12) }, ++ { 768, 0x77700300 | (0x6) | (0x5 << 16) | (0x5 << 12) }, ++ { 832, 0x77700300 | (0x6) | (0x6 << 16) | (0x5 << 12) }, ++ { 896, 0x77700300 | (0x6) | (0x6 << 16) | (0x6 << 12) }, ++ { 960, 0x77700300 | (0x6) | (0x7 << 16) | (0x6 << 12) }, ++ { 1024, 0x77700300 | (0x6) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 1152, 0x77700300 | (0x7) | (0x4 << 16) | (0x3 << 12) }, ++ { 1280, 0x77700300 | (0x7) | (0x4 << 16) | (0x4 << 12) }, ++ { 1408, 0x77700300 | (0x7) | (0x5 << 16) | (0x4 << 12) }, ++ { 1536, 0x77700300 | (0x7) | (0x5 << 16) | (0x5 << 12) }, ++ { 1664, 0x77700300 | (0x7) | (0x6 << 16) | (0x5 << 12) }, ++ { 1792, 0x77700300 | (0x7) | (0x6 << 16) | (0x6 << 12) }, ++ { 1920, 0x77700300 | (0x7) | (0x7 << 16) | (0x6 << 12) }, ++ { 2048, 0x77700300 | (0x7) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 2304, 0x77700300 | (0x8) | (0x4 << 16) | (0x3 << 12) }, ++ { 2560, 0x77700300 | (0x8) | (0x4 << 16) | (0x4 << 12) }, ++ { 2816, 0x77700300 | (0x8) | (0x5 << 16) | (0x4 << 12) }, ++ { 3072, 0x77700300 | (0x8) | (0x5 << 16) | (0x5 << 12) }, ++ { 3328, 0x77700300 | (0x8) | (0x6 << 16) | (0x5 << 12) }, ++ { 3584, 0x77700300 | (0x8) | (0x6 << 16) | (0x6 << 12) }, ++ { 3840, 0x77700300 | (0x8) | (0x7 << 16) | (0x6 << 12) }, ++ { 4096, 0x77700300 | (0x8) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 4608, 0x77700300 | (0x9) | (0x4 << 16) | (0x3 << 12) }, ++ { 5120, 0x77700300 | (0x9) | (0x4 << 16) | (0x4 << 12) }, ++ { 5632, 0x77700300 | (0x9) | (0x5 << 16) | (0x4 << 12) }, ++ { 6144, 0x77700300 | (0x9) | (0x5 << 16) | (0x5 << 12) }, ++ { 6656, 0x77700300 | (0x9) | (0x6 << 16) | (0x5 << 12) }, ++ { 7168, 0x77700300 | (0x9) | (0x6 << 16) | (0x6 << 12) }, ++ { 7680, 0x77700300 | (0x9) | (0x7 << 16) | (0x6 << 12) }, ++ { 8192, 0x77700300 | (0x9) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 9216, 0x77700300 | (0xa) | (0x4 << 16) | (0x3 << 12) }, ++ { 10240, 0x77700300 | (0xa) | (0x4 << 16) | (0x4 << 12) }, ++ { 11264, 0x77700300 | (0xa) | (0x5 << 16) | (0x4 << 12) }, ++ { 12288, 0x77700300 | (0xa) | (0x5 << 16) | (0x5 << 12) }, ++ { 13312, 0x77700300 | (0xa) | (0x6 << 16) | (0x5 << 12) }, ++ { 14336, 0x77700300 | (0xa) | (0x6 << 16) | (0x6 << 12) }, ++ { 15360, 0x77700300 | (0xa) | (0x7 << 16) | (0x6 << 12) }, ++ { 16384, 0x77700300 | (0xa) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 18432, 0x77700300 | (0xb) | (0x4 << 16) | (0x3 << 12) }, ++ { 20480, 0x77700300 | (0xb) | (0x4 << 16) | (0x4 << 12) }, ++ { 22528, 0x77700300 | (0xb) | (0x5 << 16) | (0x4 << 12) }, ++ { 24576, 0x77700300 | (0xb) | (0x5 << 16) | (0x5 << 12) }, ++ { 26624, 0x77700300 | (0xb) | (0x6 << 16) | (0x5 << 12) }, ++ { 28672, 0x77700300 | (0xb) | (0x6 << 16) | (0x6 << 12) }, ++ { 30720, 0x77700300 | (0xb) | (0x7 << 16) | (0x6 << 12) }, ++ { 32768, 0x77700300 | (0xb) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 36864, 0x77700300 | (0xc) | (0x4 << 16) | (0x3 << 12) }, ++ { 40960, 0x77700300 | (0xc) | (0x4 << 16) | (0x4 << 12) }, ++ { 45056, 0x77700300 | (0xc) | (0x5 << 16) | (0x4 << 12) }, ++ { 49152, 0x77700300 | (0xc) | (0x5 << 16) | (0x5 << 12) }, ++ { 53248, 0x77700300 | (0xc) | (0x6 << 16) | (0x5 << 12) }, ++ { 57344, 0x77700300 | (0xc) | (0x6 << 16) | (0x6 << 12) }, ++ { 61440, 0x77700300 | (0xc) | (0x7 << 16) | (0x6 << 12) }, ++ { 65536, 0x77700300 | (0xc) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 73728, 0x77700300 | (0xd) | (0x4 << 16) | (0x3 << 12) }, ++ { 81920, 0x77700300 | (0xd) | (0x4 << 16) | (0x4 << 12) }, ++ { 90112, 0x77700300 | (0xd) | (0x5 << 16) | (0x4 << 12) }, ++ { 98304, 0x77700300 | (0xd) | (0x5 << 16) | (0x5 << 12) }, ++ { 106496, 0x77700300 | (0xd) | (0x6 << 16) | (0x5 << 12) }, ++ { 114688, 0x77700300 | (0xd) | (0x6 << 16) | (0x6 << 12) }, ++ { 122880, 0x77700300 | (0xd) | (0x7 << 16) | (0x6 << 12) }, ++ { 131072, 0x77700300 | (0xd) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 147456, 0x77700300 | (0xe) | (0x4 << 16) | (0x3 << 12) }, ++ { 163840, 0x77700300 | (0xe) | (0x4 << 16) | (0x4 << 12) }, ++ { 180224, 0x77700300 | (0xe) | (0x5 << 16) | (0x4 << 12) }, ++ { 196608, 0x77700300 | (0xe) | (0x5 << 16) | (0x5 << 12) }, ++ { 212992, 0x77700300 | (0xe) | (0x6 << 16) | (0x5 << 12) }, ++ { 229376, 0x77700300 | (0xe) | (0x6 << 16) | (0x6 << 12) }, ++ { 245760, 0x77700300 | (0xe) | (0x7 << 16) | (0x6 << 12) }, ++ { 262144, 0x77700300 | (0xe) | (0x7 << 16) | (0x7 << 12) }, ++ ++ { 294912, 0x77700300 | (0xf) | (0x4 << 16) | (0x3 << 12) }, ++ { 327680, 0x77700300 | (0xf) | (0x4 << 16) | (0x4 << 12) }, ++ { 360448, 0x77700300 | (0xf) | (0x5 << 16) | (0x4 << 12) }, ++ { 393216, 0x77700300 | (0xf) | (0x5 << 16) | (0x5 << 12) }, ++ { 425984, 0x77700300 | (0xf) | (0x6 << 16) | (0x5 << 12) }, ++ { 458752, 0x77700300 | (0xf) | (0x6 << 16) | (0x6 << 12) }, ++ { 491520, 0x77700300 | (0xf) | (0x7 << 16) | (0x6 << 12) }, ++ { 524288, 0x77700300 | (0xf) | (0x7 << 16) | (0x7 << 12) }, ++#endif ++}; ++ ++static inline void ast_i2c_write(struct ast_i2c_bus *i2c_bus, u32 val, u32 reg) ++{ ++#if 0 ++ printf("%x: W : reg %x , val: %x\n", i2c_bus->reg_base, reg, val); ++#endif ++ __raw_writel(val, i2c_bus->reg_base + reg); ++} ++ ++static inline u32 ast_i2c_read(struct ast_i2c_bus *i2c_bus, u32 reg) ++{ ++#if 0 ++ u32 val = __raw_readl(i2c_bus->reg_base + reg); ++ printf("%x: R : reg %x , val: %x\n", i2c_bus->reg_base, reg, val); ++ return val; ++#else ++ return __raw_readl(i2c_bus->reg_base + reg); ++#endif ++} ++ ++static u32 select_i2c_clock(unsigned int bus_clk) ++{ ++#if 0 ++ unsigned int clk, inc = 0, div, divider_ratio; ++ u32 SCL_Low, SCL_High, data; ++ ++ clk = ast_get_pclk(); ++// debug("pclk = %d\n", clk); ++ divider_ratio = clk / bus_clk; ++ for (div = 0; divider_ratio >= 16; div++) ++ { ++ inc |= (divider_ratio & 1); ++ divider_ratio >>= 1; ++ } ++ divider_ratio += inc; ++ SCL_Low = (divider_ratio >> 1) - 1; ++ SCL_High = divider_ratio - SCL_Low - 2; ++ data = 0x77700300 | (SCL_High << 16) | (SCL_Low << 12) | div; ++// printk("I2CD04 for %d = %08X\n", target_speed, data); ++ return data; ++#else ++ int i; ++ unsigned int clk; ++ u32 data; ++ ++ clk = ast_get_pclk(); ++ // debug("pclk = %d\n", clk); ++ ++ for (i = 0; ++ i < sizeof(i2c_timing_table) / sizeof(struct ast_i2c_timing_table); ++ i++) { ++ if ((clk / i2c_timing_table[i].divisor) < bus_clk) { ++ break; ++ } ++ } ++ data = i2c_timing_table[i].timing; ++ // printk("divisor [%d], timing [%x]\n", i2c_timing_table[i].divisor, ++ // i2c_timing_table[i].timing); ++ return data; ++#endif ++} ++ ++static int ast_i2c_wait_isr(struct ast_i2c_bus *i2c_bus, u32 flag) ++{ ++ int timeout = 0; ++ ++ while (!(ast_i2c_read(i2c_bus, I2C_INTR_STS_REG) & flag) && ++ (timeout < I2C_TIMEOUT_COUNT)) { ++ udelay(I2C_SLEEP_US); ++ timeout++; ++ } ++ ++ /* Clear Interrupt */ ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ if (timeout >= I2C_TIMEOUT_COUNT) { ++ debug("%s timed out:- flag: %x\n", __func__, flag); ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static int ast_i2c_wait_tx(struct ast_i2c_bus *i2c_bus) ++{ ++ int sts; ++ int timeout = 0; ++ while (1) { ++ sts = ast_i2c_read(i2c_bus, I2C_INTR_STS_REG); ++ ++ if (timeout > I2C_TIMEOUT_COUNT) { ++ /* I2C Reset */ ++ debug("Timeout: Bus:%d, Addr:0x%02x\n", i2c_bus_num, ++ i2c_bus->addr); ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, ++ I2C_FUN_CTRL_REG); ++ ++ return -ETIMEDOUT; ++ } else if (sts & AST_I2CD_INTR_STS_TX_NAK) { ++ ast_i2c_write(i2c_bus, AST_I2CD_INTR_STS_TX_NAK, ++ I2C_INTR_STS_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, ++ I2C_CMD_REG); ++ ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_NORMAL_STOP); ++ ++ return -EREMOTEIO; ++ } else if (sts & AST_I2CD_INTR_STS_TX_ACK) { ++ ast_i2c_write(i2c_bus, AST_I2CD_INTR_STS_TX_ACK, ++ I2C_INTR_STS_REG); ++ break; ++ } else { ++ timeout++; ++ } ++ udelay(I2C_SLEEP_US); ++ } ++ ++ return 0; ++} ++ ++static int ast_i2c_deblock(struct ast_i2c_bus *i2c_bus) ++{ ++ u32 csr; ++ int ret = 0; ++ ++ if ((csr = ast_i2c_read(i2c_bus, I2C_CMD_REG)) & ++ AST_I2CD_BUS_BUSY_STS) { ++ if ((csr & AST_I2CD_SDA_LINE_STS) && ++ (csr & AST_I2CD_SCL_LINE_STS)) { ++ /* Bus idle */ ++ debug("Bus(%d) idle\n", i2c_bus_num); ++ ret = 0; ++ } else if (csr & AST_I2CD_SDA_LINE_STS) { ++ /* send stop command */ ++ debug("Unterminated TXN in (%x), sending stop...\n", ++ csr); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_NORMAL_STOP); ++ } else if (csr & AST_I2CD_SCL_LINE_STS) { ++ /* Possibly stuck slave */ ++ debug("Bus stuck (%x), attempting recovery...\n", csr); ++ ast_i2c_write(i2c_bus, AST_I2CD_BUS_RECOVER_CMD_EN, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_BUS_RECOVER); ++ } else { ++ debug("Bus(%d) slave(0x%02x) busy. Reseting bus...\n", ++ i2c_bus_num, i2c_bus->addr); ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, ++ I2C_FUN_CTRL_REG); ++ ret = 0; ++ } ++ } ++ ++ return ret; ++} ++ ++static int ast_i2c_xfer(struct ast_i2c_bus *i2c_bus) ++{ ++ int sts, i, ret = 0; ++ ++ /* Clear Interrupt */ ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ /* Check for bus busy */ ++ ret = ast_i2c_deblock(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ // first start ++ debug(" %sing %d byte%s %s 0x%02x\n", i2c_bus->flags ? "read" : "write", ++ i2c_bus->d_len, i2c_bus->d_len > 1 ? "s" : "", ++ i2c_bus->flags ? "from" : "to", i2c_bus->addr); ++ ++ if (i2c_bus->flags) { ++ // READ ++ if (i2c_bus->a_len) { ++ // send start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1), ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, ++ AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ++ /* Wait for ACK */ ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ /* Send Offset */ ++ for (i = 0; i < i2c_bus->a_len; i++) { ++ debug("offset [%x]\n", i2c_bus->a_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->a_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ } ++ ++ // repeat-start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1) | 0x1, ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ for (i = 0; i < i2c_bus->d_len; i++) { ++ if (i == (i2c_bus->d_len - 1)) { ++ ast_i2c_write(i2c_bus, ++ AST_I2CD_M_RX_CMD | ++ AST_I2CD_M_S_RX_CMD_LAST, ++ I2C_CMD_REG); ++ } else { ++ ast_i2c_write(i2c_bus, AST_I2CD_M_RX_CMD, ++ I2C_CMD_REG); ++ } ++ ++ ret = ast_i2c_wait_isr(i2c_bus, ++ AST_I2CD_INTR_STS_RX_DOWN); ++ if (ret != 0) ++ return ret; ++ ++ i2c_bus->d_buf[i] = ++ (ast_i2c_read(i2c_bus, I2C_BYTE_BUF_REG) & ++ AST_I2CD_RX_BYTE_BUFFER) >> ++ 8; ++ } ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, AST_I2CD_INTR_STS_NORMAL_STOP); ++ if (ret != 0) ++ return ret; ++ ++ } else { ++ // Write ++ // send start ++ ast_i2c_write(i2c_bus, (i2c_bus->addr << 1), I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD | AST_I2CD_M_START_CMD, ++ I2C_CMD_REG); ++ ++ /* Wait for ACK */ ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ ++ /* Send Offset */ ++ for (i = 0; i < i2c_bus->a_len; i++) { ++ debug("offset [%x]\n", i2c_bus->a_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->a_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ ++ /* Tx data */ ++ for (i = 0; i < i2c_bus->d_len; i++) { ++ debug("Tx data [%x]\n", i2c_bus->d_buf[i]); ++ ast_i2c_write(i2c_bus, i2c_bus->d_buf[i], ++ I2C_BYTE_BUF_REG); ++ ast_i2c_write(i2c_bus, AST_I2CD_M_TX_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_tx(i2c_bus); ++ if (ret != 0) ++ return ret; ++ } ++ ast_i2c_write(i2c_bus, AST_I2CD_M_STOP_CMD, I2C_CMD_REG); ++ ret = ast_i2c_wait_isr(i2c_bus, AST_I2CD_INTR_STS_NORMAL_STOP); ++ if (ret != 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++/*****************************************************************************/ ++ ++unsigned int i2c_get_bus_speed(void) ++{ ++ return ast_i2c[i2c_bus_num].speed; ++} ++ ++int i2c_set_bus_speed(unsigned int speed) ++{ ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ /* Set AC Timing */ ++ ast_i2c_write(i2c_bus, select_i2c_clock(speed), I2C_AC_TIMING_REG1); ++ ast_i2c_write(i2c_bus, AST_NO_TIMEOUT_CTRL, I2C_AC_TIMING_REG2); ++ ++ i2c_bus->speed = speed; ++ ++ return 0; ++} ++ ++unsigned int i2c_get_base(int bus_no) ++{ ++ switch (bus_no) { ++ case 0: ++ return AST_I2C_DEV0_BASE; ++ break; ++ case 1: ++ return AST_I2C_DEV1_BASE; ++ break; ++ case 2: ++ return AST_I2C_DEV2_BASE; ++ break; ++ case 3: ++ return AST_I2C_DEV3_BASE; ++ break; ++ case 4: ++ return AST_I2C_DEV4_BASE; ++ break; ++ case 5: ++ return AST_I2C_DEV5_BASE; ++ break; ++ case 6: ++ return AST_I2C_DEV6_BASE; ++ break; ++ case 7: ++ return AST_I2C_DEV7_BASE; ++ break; ++ case 8: ++ return AST_I2C_DEV8_BASE; ++ break; ++ case 9: ++ return AST_I2C_DEV9_BASE; ++ break; ++ case 10: ++ return AST_I2C_DEV10_BASE; ++ break; ++ case 11: ++ return AST_I2C_DEV11_BASE; ++ break; ++ case 12: ++ return AST_I2C_DEV12_BASE; ++ break; ++ case 13: ++ return AST_I2C_DEV13_BASE; ++ break; ++ default: ++ printf("i2c base error\n"); ++ break; ++ }; ++ return 0; ++} ++ ++void i2c_init(int speed, int slaveaddr) ++{ ++ int i = 0; ++ struct ast_i2c_bus *i2c_bus; ++ ++ // SCU I2C Reset ++ ast_scu_init_i2c(); ++ ++ /* This will override the speed selected in the fdt for that port */ ++ debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr); ++ ++ for (i = 0; i < CONFIG_SYS_MAX_I2C_BUS; i++) { ++ i2c_bus = &ast_i2c[i]; ++ i2c_bus->reg_base = i2c_get_base(i); ++ ++ i2c_bus->speed = CONFIG_SYS_I2C_SPEED; ++ i2c_bus->state = 0; ++ ++ // I2C Multi-Pin ++ ast_scu_multi_func_i2c(i); ++ ++ // I2CG Reset ++ ast_i2c_write(i2c_bus, 0, I2C_FUN_CTRL_REG); ++ ++ // Enable Master Mode ++ ast_i2c_write(i2c_bus, AST_I2CD_MASTER_EN, I2C_FUN_CTRL_REG); ++ ++ // SLAVE mode enable ++#if 0 ++ if (slaveaddr) { ++ ast_i2c_write(i2c_bus, slaveaddr, I2C_DEV_ADDR_REG); ++ ast_i2c_write(i2c_bus, ++ ast_i2c_read(i2c_bus, I2C_FUN_CTRL_REG) | ++ AST_I2CD_SLAVE_EN, ++ I2C_FUN_CTRL_REG); ++ } ++#endif ++ ++ /* Set AC Timing */ ++ i2c_set_bus_speed(speed); ++ ++ // Clear Interrupt ++ ast_i2c_write(i2c_bus, 0xfffffff, I2C_INTR_STS_REG); ++ ++ /* Set interrupt generation of I2C controller */ ++ ast_i2c_write(i2c_bus, 0, I2C_INTR_CTRL_REG); ++ } ++ ++ i2c_bus_num = 0; ++ debug("end\n"); ++} ++ ++/* Probe to see if a chip is present. */ ++int i2c_probe(uchar addr) ++{ ++ uchar a_buf[1] = { 0 }; ++ ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_probe[bus:%d]: addr=0x%x\n", i2c_bus_num, addr); ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 1; ++ i2c_bus->a_len = 1; ++ i2c_bus->a_buf = (u8 *)&a_buf; ++ i2c_bus->d_len = 1; ++ i2c_bus->d_buf = (u8 *)&a_buf; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++/* Read bytes */ ++int i2c_read(uchar addr, uint offset, int alen, uchar *buffer, int len) ++{ ++ uchar xoffset[4]; ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_read[bus:%d]: addr=0x%x, offset=0x%x, alen=0x%x len=0x%x\n", ++ i2c_bus_num, addr, offset, alen, len); ++ ++ if (alen > 4) { ++ debug("I2C read: addr len %d not supported\n", alen); ++ return 1; ++ } ++ ++ if (alen > 0) { ++ xoffset[0] = (offset >> 24) & 0xFF; ++ xoffset[1] = (offset >> 16) & 0xFF; ++ xoffset[2] = (offset >> 8) & 0xFF; ++ xoffset[3] = offset & 0xFF; ++ } ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 1; ++ i2c_bus->a_len = alen; ++ i2c_bus->a_buf = &xoffset[4 - alen]; ++ i2c_bus->d_len = len; ++ i2c_bus->d_buf = buffer; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++/* Write bytes */ ++int i2c_write(uchar addr, uint offset, int alen, uchar *buffer, int len) ++{ ++ uchar xoffset[4]; ++ struct ast_i2c_bus *i2c_bus = &ast_i2c[i2c_bus_num]; ++ ++ debug("i2c_write[bus:%d]: addr=0x%x, offset=0x%x, alen=0x%x len=0x%x\n", ++ i2c_bus_num, addr, offset, alen, len); ++ ++ if (alen > 0) { ++ xoffset[0] = (offset >> 24) & 0xFF; ++ xoffset[1] = (offset >> 16) & 0xFF; ++ xoffset[2] = (offset >> 8) & 0xFF; ++ xoffset[3] = offset & 0xFF; ++ } ++ ++ i2c_bus->addr = addr; ++ i2c_bus->flags = 0; ++ i2c_bus->a_len = alen; ++ i2c_bus->a_buf = &xoffset[4 - alen]; ++ i2c_bus->d_len = len; ++ i2c_bus->d_buf = buffer; ++ ++ return ast_i2c_xfer(i2c_bus); ++} ++ ++#if defined(CONFIG_I2C_MULTI_BUS) ++/* ++ * Functions for multiple I2C bus handling ++ */ ++unsigned int i2c_get_bus_num(void) ++{ ++ return i2c_bus_num; ++} ++ ++int i2c_set_bus_num(unsigned int bus) ++{ ++ if (bus >= NUM_BUS) ++ return -1; ++ i2c_bus_num = bus; ++ ++ return 0; ++} ++#endif +diff --git a/drivers/i2c/ast_i2c.h b/drivers/i2c/ast_i2c.h +new file mode 100644 +index 0000000000..7cff0e5a10 +--- /dev/null ++++ b/drivers/i2c/ast_i2c.h +@@ -0,0 +1,131 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (C) 2012-2020 ASPEED Technology Inc. ++ * Copyright 2016 IBM Corporation ++ * Copyright 2017 Google, Inc. ++ */ ++#ifndef __AST_I2C_H_ ++#define __AST_I2C_H_ ++ ++struct ast_i2c_regs { ++ u32 fcr; ++ u32 cactcr1; ++ u32 cactcr2; ++ u32 icr; ++ u32 isr; ++ u32 csr; ++ u32 sdar; ++ u32 pbcr; ++ u32 trbbr; ++#ifdef CONFIG_ASPEED_AST2500 ++ u32 dma_mbar; ++ u32 dma_tlr; ++#endif ++}; ++ ++/* Device Register Definition */ ++/* 0x00 : I2CD Function Control Register */ ++#define I2CD_BUFF_SEL_MASK (0x7 << 20) ++#define I2CD_BUFF_SEL(x) (x << 20) ++#define I2CD_M_SDA_LOCK_EN (0x1 << 16) ++#define I2CD_MULTI_MASTER_DIS (0x1 << 15) ++#define I2CD_M_SCL_DRIVE_EN (0x1 << 14) ++#define I2CD_MSB_STS (0x1 << 9) ++#define I2CD_SDA_DRIVE_1T_EN (0x1 << 8) ++#define I2CD_M_SDA_DRIVE_1T_EN (0x1 << 7) ++#define I2CD_M_HIGH_SPEED_EN (0x1 << 6) ++#define I2CD_DEF_ADDR_EN (0x1 << 5) ++#define I2CD_DEF_ALERT_EN (0x1 << 4) ++#define I2CD_DEF_ARP_EN (0x1 << 3) ++#define I2CD_DEF_GCALL_EN (0x1 << 2) ++#define I2CD_SLAVE_EN (0x1 << 1) ++#define I2CD_MASTER_EN (0x1) ++ ++/* 0x04 : I2CD Clock and AC Timing Control Register #1 */ ++/* Base register value. These bits are always set by the driver. */ ++#define I2CD_CACTC_BASE 0xfff00300 ++#define I2CD_TCKHIGH_SHIFT 16 ++#define I2CD_TCKLOW_SHIFT 12 ++#define I2CD_THDDAT_SHIFT 10 ++#define I2CD_TO_DIV_SHIFT 8 ++#define I2CD_BASE_DIV_SHIFT 0 ++ ++/* 0x08 : I2CD Clock and AC Timing Control Register #2 */ ++#define I2CD_tTIMEOUT 1 ++#define I2CD_NO_TIMEOUT_CTRL 0 ++ ++/* 0x0c : I2CD Interrupt Control Register & ++ * 0x10 : I2CD Interrupt Status Register ++ * ++ * These share bit definitions, so use the same values for the enable & ++ * status bits. ++ */ ++#define I2CD_INTR_SDA_DL_TIMEOUT (0x1 << 14) ++#define I2CD_INTR_BUS_RECOVER_DONE (0x1 << 13) ++#define I2CD_INTR_SMBUS_ALERT (0x1 << 12) ++#define I2CD_INTR_SMBUS_ARP_ADDR (0x1 << 11) ++#define I2CD_INTR_SMBUS_DEV_ALERT_ADDR (0x1 << 10) ++#define I2CD_INTR_SMBUS_DEF_ADDR (0x1 << 9) ++#define I2CD_INTR_GCALL_ADDR (0x1 << 8) ++#define I2CD_INTR_SLAVE_MATCH (0x1 << 7) ++#define I2CD_INTR_SCL_TIMEOUT (0x1 << 6) ++#define I2CD_INTR_ABNORMAL (0x1 << 5) ++#define I2CD_INTR_NORMAL_STOP (0x1 << 4) ++#define I2CD_INTR_ARBIT_LOSS (0x1 << 3) ++#define I2CD_INTR_RX_DONE (0x1 << 2) ++#define I2CD_INTR_TX_NAK (0x1 << 1) ++#define I2CD_INTR_TX_ACK (0x1 << 0) ++ ++/* 0x14 : I2CD Command/Status Register */ ++#define I2CD_SDA_OE (0x1 << 28) ++#define I2CD_SDA_O (0x1 << 27) ++#define I2CD_SCL_OE (0x1 << 26) ++#define I2CD_SCL_O (0x1 << 25) ++#define I2CD_TX_TIMING (0x1 << 24) ++#define I2CD_TX_STATUS (0x1 << 23) ++ ++/* Tx State Machine */ ++#define I2CD_IDLE 0x0 ++#define I2CD_MACTIVE 0x8 ++#define I2CD_MSTART 0x9 ++#define I2CD_MSTARTR 0xa ++#define I2CD_MSTOP 0xb ++#define I2CD_MTXD 0xc ++#define I2CD_MRXACK 0xd ++#define I2CD_MRXD 0xe ++#define I2CD_MTXACK 0xf ++#define I2CD_SWAIT 0x1 ++#define I2CD_SRXD 0x4 ++#define I2CD_STXACK 0x5 ++#define I2CD_STXD 0x6 ++#define I2CD_SRXACK 0x7 ++#define I2CD_RECOVER 0x3 ++ ++#define I2CD_SCL_LINE_STS (0x1 << 18) ++#define I2CD_SDA_LINE_STS (0x1 << 17) ++#define I2CD_BUS_BUSY_STS (0x1 << 16) ++#define I2CD_SDA_OE_OUT_DIR (0x1 << 15) ++#define I2CD_SDA_O_OUT_DIR (0x1 << 14) ++#define I2CD_SCL_OE_OUT_DIR (0x1 << 13) ++#define I2CD_SCL_O_OUT_DIR (0x1 << 12) ++#define I2CD_BUS_RECOVER_CMD (0x1 << 11) ++#define I2CD_S_ALT_EN (0x1 << 10) ++#define I2CD_RX_DMA_ENABLE (0x1 << 9) ++#define I2CD_TX_DMA_ENABLE (0x1 << 8) ++ ++/* Command Bit */ ++#define I2CD_RX_BUFF_ENABLE (0x1 << 7) ++#define I2CD_TX_BUFF_ENABLE (0x1 << 6) ++#define I2CD_M_STOP_CMD (0x1 << 5) ++#define I2CD_M_S_RX_CMD_LAST (0x1 << 4) ++#define I2CD_M_RX_CMD (0x1 << 3) ++#define I2CD_S_TX_CMD (0x1 << 2) ++#define I2CD_M_TX_CMD (0x1 << 1) ++#define I2CD_M_START_CMD 0x1 ++ ++#define I2CD_RX_DATA_SHIFT 8 ++#define I2CD_RX_DATA_MASK (0xff << I2CD_RX_DATA_SHIFT) ++ ++#define I2C_HIGHSPEED_RATE 400000 ++ ++#endif /* __AST_I2C_H_ */ +diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h +index b7d7192cce..0bc7f2d75f 100644 +--- a/include/configs/ast-common.h ++++ b/include/configs/ast-common.h +@@ -84,6 +84,11 @@ + #define CONFIG_SYS_MAXARGS 16 + #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + ++/* I2C config */ ++#define CONFIG_I2C_MULTI_BUS 1 ++#define CONFIG_SYS_MAX_I2C_BUS 8 ++#define CONFIG_SYS_I2C_SPEED 100000 ++ + /* + * Optional MTD and UBI support + */ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch new file mode 100644 index 000000000..2729b066d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0027-CPLD-u-boot-commands-support-for-PFR.patch @@ -0,0 +1,300 @@ +From 3d2ea02810c8b6d595536cf2ce0c692f56ebaf0c Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Tue, 7 May 2019 11:26:35 +0530 +Subject: [PATCH] CPLD u-boot commands support for PFR + +Implemented the cpld command in u-boot for +communicating with PFR CPLD. + +Tested: +Simulated test on different I2C bus and slave +as we don't have hardware available yet. +ast# cpld dump +*** Dumping CPLD Registers *** +0x0000 | 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f +---------------------------------------------------------- +0x0000 | 03 00 00 00 01 09 00 f5 01 09 19 cb 46 4c 45 -- +0x0001 | -- 52 4f 4e 49 43 53 cf 53 2d 31 31 30 30 41 44 +0x0002 | 55 -- 30 2d 32 30 31 ca 47 38 34 30 32 -- 2d -- +0x0003 | 30 37 c2 30 31 cc 45 58 57 44 36 34 39 30 30 38 +............................. +ast# cpld read 0x00 +CPLD read successful. Reg:0x00 Val:0x03 +ast# cpld write 0x00 0x04 +CPLD write successful. Reg:0x00 Val:0x04 +ast# cpld read 0x00 +CPLD read successful. Reg:0x00 Val:0x04 +ast# + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + cmd/Makefile | 1 + + cmd/cpld.c | 244 +++++++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 245 insertions(+) + create mode 100644 cmd/cpld.c + +diff --git a/cmd/Makefile b/cmd/Makefile +index a1731be701..c8ac0af55c 100644 +--- a/cmd/Makefile ++++ b/cmd/Makefile +@@ -66,6 +66,7 @@ obj-$(CONFIG_CMD_FUSE) += fuse.o + obj-$(CONFIG_CMD_GETTIME) += gettime.o + obj-$(CONFIG_CMD_GPIO) += gpio.o + obj-$(CONFIG_CMD_I2C) += i2c.o ++obj-$(CONFIG_CMD_I2C) += cpld.o + obj-$(CONFIG_CMD_IOTRACE) += iotrace.o + obj-$(CONFIG_CMD_HASH) += hash.o + obj-$(CONFIG_CMD_IDE) += ide.o +diff --git a/cmd/cpld.c b/cmd/cpld.c +new file mode 100644 +index 0000000000..1b225d20dc +--- /dev/null ++++ b/cmd/cpld.c +@@ -0,0 +1,244 @@ ++/* ++ * Copyright (c) 2018-2019 Intel Corporation ++ * Written by AppaRao Puli <apparao.puli@intel.com> ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++#include <common.h> ++#include <command.h> ++#include <cli.h> ++#include <i2c.h> ++#include <errno.h> ++#include <linux/compiler.h> ++ ++#define PFR_CPLD_I2C_BUSNO 4 ++#define PFR_CPLD_SLAVE_ADDR 0x70 ++ ++#define CPLD_READ_TIMEOUT_ATTEMPTS 5 ++ ++/* Some CPLD registers are self cleared after read. ++ * We should skip them reading to avoid functionality impact.*/ ++/* TODO: Need to get this list from CPLD team. */ ++static uchar cpld_reg_skip_read[] = {}; ++ ++static bool skip_cpld_reg_read(u32 reg) ++{ ++ int size = ARRAY_SIZE(cpld_reg_skip_read); ++ for (int i = 0; i < size; i++) { ++ if (reg == cpld_reg_skip_read[i]) ++ return true; ++ } ++ ++ return false; ++} ++ ++static int do_cpld_write(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr; ++ uchar value; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 3) ++ return CMD_RET_USAGE; ++ ++ reg_addr = simple_strtoul(argv[1], NULL, 16); ++ if (reg_addr > 0xFF) { ++ printf("Invalid register. Valid range[0x00-0xFF]."); ++ return CMD_RET_FAILURE; ++ } ++ value = simple_strtoul(argv[2], NULL, 16); ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ ret = i2c_write(chip, reg_addr, 1, &value, 1); ++ if (ret) { ++ printf("Error writing the chip: %d\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("CPLD write successful. Reg:0x%02x Val:0x%02x\n", reg_addr, ++ value); ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++ ++static int do_cpld_read(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr; ++ uchar value[1]; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 2) ++ return CMD_RET_USAGE; ++ ++ reg_addr = simple_strtoul(argv[1], NULL, 16); ++ if (reg_addr > 0xFF) { ++ printf("Invalid register. Valid range[0x00-0xFF]."); ++ return CMD_RET_FAILURE; ++ } ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ if (skip_cpld_reg_read(reg_addr)) { ++ printf("CPLD register(0x%02x) reading is not allowed.\n", ++ reg_addr); ++ ret = 0; ++ goto done; ++ } ++ ++ ret = i2c_read(chip, reg_addr, 1, value, 1); ++ if (ret) { ++ printf("Error reading the chip: %d\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("CPLD read successful. Reg:0x%02x Val:0x%02x\n", reg_addr, ++ value[0]); ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++ ++static int do_cpld_dump(cmd_tbl_t *cmdtp, int flag, int argc, ++ char *const argv[]) ++{ ++ int ret = 0; ++ int current_bus_no; ++ u32 reg_addr = 0x00; ++ uchar value[1]; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ if (argc != 1) ++ return CMD_RET_USAGE; ++ ++ /* Get current I2C bus number to restore later. */ ++ current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failure changing bus number (%d)\n", ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ ++ printf("*** Dumping CPLD Registers ***\n", reg_addr, value); ++ printf("0x%04x | ", reg_addr); ++ for (int i = 0; i < 0x10; i++) ++ printf(" %02x", i); ++ printf("\n----------------------------------------------------------\n"); ++ ++ while (reg_addr <= 0xFF) { ++ if ((reg_addr % 16) == 0) ++ printf("0x%04x | ", (reg_addr / 16)); ++ ++ if (skip_cpld_reg_read(reg_addr)) { ++ printf(" --"); ++ } else { ++ int timeout = 0; ++ while (i2c_read(chip, reg_addr, 1, value, 1) != 0) { ++ if (timeout++ >= CPLD_READ_TIMEOUT_ATTEMPTS) { ++ printf("\nERROR: Reading the chip: %d\n", ++ ret); ++ ret = CMD_RET_FAILURE; ++ goto done; ++ } ++ /* Need delay for I2C devices continous read */ ++ mdelay(3 * timeout); ++ } ++ printf(" %02x", value[0]); ++ } ++ ++ reg_addr++; ++ if ((reg_addr % 16) == 0) ++ printf("\n"); ++ } ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Error in restoring bus number.\n"); ++ ++ return ret; ++} ++static cmd_tbl_t cmd_cpld_sub[] = { ++ U_BOOT_CMD_MKENT(dump, 1, 1, do_cpld_dump, "", ""), ++ U_BOOT_CMD_MKENT(read, 2, 1, do_cpld_read, "", ""), ++ U_BOOT_CMD_MKENT(write, 3, 1, do_cpld_write, "", "") ++}; ++ ++/** ++ * do_cpld() - Handle the "cpld" command-line command ++ * @cmdtp: Command data struct pointer ++ * @flag: Command flag ++ * @argc: Command-line argument count ++ * @argv: Array of command-line arguments ++ * ++ * Returns zero on success, CMD_RET_USAGE in case of misuse and negative ++ * on error. ++ */ ++static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ cmd_tbl_t *c = NULL; ++ ++ if (argc < 2) ++ return CMD_RET_USAGE; ++ ++ /* Strip off leading 'cpld' command argument */ ++ argc--; ++ argv++; ++ ++ if (argc) ++ c = find_cmd_tbl(argv[0], cmd_cpld_sub, ++ ARRAY_SIZE(cmd_cpld_sub)); ++ ++ if (c) ++ return c->cmd(cmdtp, flag, argc, argv); ++ else ++ return CMD_RET_USAGE; ++} ++ ++#ifdef CONFIG_SYS_LONGHELP ++static char cpld_help_text[] = ++ "cpld dump - Dump all CPLD registers.\n" ++ "cpld read <reg> - Read CPLD register.\n" ++ "cpld write <reg> <val> - Write CPLD register.\n"; ++#endif ++ ++U_BOOT_CMD(cpld, 4, 1, do_cpld, "PFR CPLD information", cpld_help_text); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch new file mode 100644 index 000000000..129b6be88 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch @@ -0,0 +1,61 @@ +From 8c2a3f6489c86d8dae57cae03d617de2296774ab Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 13 May 2019 23:49:02 +0530 +Subject: [PATCH] Enabling uart1&uart2 in u-boot for BIOS messages + +Added uart init function in u-boot aspeed code +to enable uart1 and uart2 for BIOS serial messages. + +Tested: +Forced BMC to stop in u-boot( using Force Firmware Update +Jumper), AC cycled system for multiple times, booted system +to uefi, checked bios serial logs working fine and accessed +keyboard in uefi without any issues. + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + board/aspeed/ast-g5/ast-g5-intel.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 6ea7f0060c57..5196a1a41299 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -509,6 +509,26 @@ void board_pre_abort_autoboot(void) + { + } + ++static void uart_init(void) ++{ ++ u32 val; ++ ++ /* Enable UART1 and UART2 for BIOS messages */ ++ val = ast_scu_read(AST_SCU_FUN_PIN_CTRL2); ++ ++ /* UART1 */ ++ val |= (SCU_FUN_PIN_UART1_NCTS | SCU_FUN_PIN_UART1_NDCD | ++ SCU_FUN_PIN_UART1_NDSR | SCU_FUN_PIN_UART1_NRI | ++ SCU_FUN_PIN_UART1_NDTR | SCU_FUN_PIN_UART1_NRTS | ++ SCU_FUN_PIN_UART1_TXD | SCU_FUN_PIN_UART1_RXD); ++ /* UART2 */ ++ val |= (SCU_FUN_PIN_UART2_NCTS | SCU_FUN_PIN_UART2_NDCD | ++ SCU_FUN_PIN_UART2_NDSR | SCU_FUN_PIN_UART2_NRI | ++ SCU_FUN_PIN_UART2_NDTR | SCU_FUN_PIN_UART2_NRTS | ++ SCU_FUN_PIN_UART2_TXD | SCU_FUN_PIN_UART2_RXD); ++ ast_scu_write(val, AST_SCU_FUN_PIN_CTRL2); ++} ++ + static void pwm_init(void) + { + uint32_t val; +@@ -560,6 +580,7 @@ extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) + { ++ uart_init(); + pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch new file mode 100644 index 000000000..238630af6 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch @@ -0,0 +1,1271 @@ +From 61587868bf9979dd8308f12157310949f0e5c430 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Tue, 21 May 2019 00:53:04 +0530 +Subject: [PATCH] FFUJ: FW IPMI commands and flash support in u-boot + +Firmware update and OEM ipmi commands implementation +for supporting Force Firmware Update Jumper(FFUJ) +mode. Also added support to update the fit images +in FFUJ mode. + +Firmware update commands: +1) Get BMC Execution Context(0x23) +2) Get Firmware Update Random Number(0x26) +3) Set Firmware Update Mode(0x27) +4) Exit Firmware Update Mode(0x28) +5) Set/Get Firmware Update Control(0x29) +6) Get Firmware Update status(0x2A) +7) Set Firmware Update Options(0x2B) +8) Firmware Image Write(0x2C) + +OEM Commands: +1) Get Buffer Size(0x66) + +Tested: + - Tested the individual commands implementation and negative + cases. + - Used debug tool for validating Firmware image transfer via + KCS and flashing. + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +--- + .../include/asm/arch-aspeed/ast-g5-intel.h | 1 + + board/aspeed/ast-g5/Makefile | 2 + + board/aspeed/ast-g5/fw-update.c | 486 ++++++++++++++++++ + board/aspeed/ast-g5/fw-update.h | 50 ++ + board/aspeed/ast-g5/ipmi-fwupd.c | 402 +++++++++++++++ + board/aspeed/ast-g5/ipmi-fwupd.h | 81 +++ + board/aspeed/ast-g5/ipmi-handler.c | 66 ++- + board/aspeed/ast-g5/ipmi-handler.h | 3 +- + common/autoboot.c | 13 + + configs/ast_g5_phy_defconfig | 1 + + 10 files changed, 1093 insertions(+), 12 deletions(-) + create mode 100644 board/aspeed/ast-g5/fw-update.c + create mode 100644 board/aspeed/ast-g5/fw-update.h + create mode 100644 board/aspeed/ast-g5/ipmi-fwupd.c + create mode 100644 board/aspeed/ast-g5/ipmi-fwupd.h + +diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +index cd9a0994fa..a88521a1b3 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h ++++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +@@ -14,6 +14,7 @@ + + #ifndef __ASSEMBLY__ + int intel_force_firmware_jumper_enabled(void); ++void start_fw_update_loop(void); + #endif + + #endif /* __AST_INTEL_G5_H__ */ +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index f28fcfe61c..0b2d936c23 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -6,3 +6,5 @@ obj-y += ast-g5-gpio.o + obj-y += ast-g5-timer.o + obj-y += ast-g5-kcs.o + obj-y += ipmi-handler.o ++obj-y += ipmi-fwupd.o ++obj-y += fw-update.o +diff --git a/board/aspeed/ast-g5/fw-update.c b/board/aspeed/ast-g5/fw-update.c +new file mode 100644 +index 0000000000..99239938b5 +--- /dev/null ++++ b/board/aspeed/ast-g5/fw-update.c +@@ -0,0 +1,486 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include <common.h> ++#include <cli.h> ++#include <flash.h> ++ ++#include "fw-update.h" ++ ++#define BOOTCMD_BOOTM_STR "bootm " ++#define RANDOM_NUM_TIMEOUT 30 /* in seconds */ ++#define WAIT_STATE_TIMEOUT 10000 /* 10 seconds */ ++ ++#define PROTECT_OFF 0 ++#define PROTECT_ON 1 ++ ++extern struct fwupd_global_setting g_fwupd_settings; ++extern u32 g_write_addr; ++ ++bool g_fwupd_settings_lock = false; ++unsigned long long etime; ++ ++bool fwupd_settings_trylock(void) ++{ ++ if (g_fwupd_settings_lock) ++ return false; ++ ++ g_fwupd_settings_lock = true; ++ return g_fwupd_settings_lock; ++} ++ ++void fwupd_settings_unlock(void) ++{ ++ g_fwupd_settings_lock = false; ++} ++ ++u8 get_active_boot_image(void) ++{ ++ char *bootcmd = getenv("bootcmd"); ++ char *start = strstr(bootcmd, BOOTCMD_BOOTM_STR); ++ u8 boot_image = PRIMARY_IMAGE; ++ ++ if (start) { ++ ulong boot_addr = simple_strtoul( ++ (start + strlen(BOOTCMD_BOOTM_STR)), NULL, 16); ++ if (boot_addr == SECONDARY_FITIMAGE_START_ADDR) ++ return SECONDARY_IMAGE; ++ } ++ return boot_image; ++} ++ ++static ulong get_flash_image_address(void) ++{ ++ char *bootcmd = getenv("bootcmd"); ++ char *start = strstr(bootcmd, BOOTCMD_BOOTM_STR); ++ ulong boot_addr = PRIMARY_FITIMAGE_START_ADDR; ++ ++ if (start) { ++ boot_addr = simple_strtoul((start + strlen(BOOTCMD_BOOTM_STR)), ++ NULL, 16); ++ /* We update in backup region and set the bootcmd accordingly */ ++ if (boot_addr == PRIMARY_FITIMAGE_START_ADDR) ++ boot_addr = SECONDARY_FITIMAGE_START_ADDR; ++ else ++ boot_addr = PRIMARY_FITIMAGE_START_ADDR; ++ } ++ ++ return boot_addr; ++} ++ ++static void update_processing_status(u8 status, u8 percent) ++{ ++ if (!fwupd_settings_trylock()) ++ return; ++ ++ g_fwupd_settings.processing_status = status; ++ g_fwupd_settings.percentage_completion = percent; ++ ++ fwupd_settings_unlock(); ++ return; ++} ++ ++static void reset_all_settings(void) ++{ ++ if (!fwupd_settings_trylock()) ++ return; ++ ++ memset(&g_fwupd_settings, 0, sizeof(g_fwupd_settings)); ++ g_fwupd_settings.fwupd_mode_active = false; ++ g_fwupd_settings.start_update = false; ++ ++ fwupd_settings_unlock(); ++} ++ ++unsigned int get_seed(void) ++{ ++ char seed_str[] = { "INTEL" }; ++ unsigned int seed; ++ ++ for (int i = 0; i < strlen(seed_str); i++) ++ seed += (seed_str[i] << (i * 8)); ++ ++ return seed; ++} ++ ++int generate_random_number(void) ++{ ++ srand(get_seed()); ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ return -1; ++ } ++ for (int i = 0; i < RAND_NUMBER_SIZE; i++) ++ g_fwupd_settings.rand_num[i] = (u8)(rand() & 0xFF); ++ ++ g_fwupd_settings.random_number_valid = true; ++ ++ fwupd_settings_unlock(); ++ ++ /* Random number should be cleared after 30sec timeout */ ++ etime = endtick(RANDOM_NUM_TIMEOUT); ++ ++ return 0; ++} ++ ++static int sect_roundb(ulong *addr) ++{ ++ flash_info_t *info; ++ ulong bank, sector_end_addr; ++ char found; ++ int i; ++ ++ /* find the end addr of the sector where the *addr is */ ++ found = 0; ++ for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS && !found; ++bank) { ++ info = &flash_info[bank]; ++ for (i = 0; i < info->sector_count && !found; ++i) { ++ /* get the end address of the sector */ ++ if (i == info->sector_count - 1) { ++ sector_end_addr = ++ info->start[0] + info->size - 1; ++ } else { ++ sector_end_addr = info->start[i + 1] - 1; ++ } ++ ++ if (*addr <= sector_end_addr && ++ *addr >= info->start[i]) { ++ found = 1; ++ /* adjust *addr if necessary */ ++ if (*addr < sector_end_addr) ++ *addr = sector_end_addr; ++ } /* sector */ ++ } /* bank */ ++ } ++ if (!found) { ++ /* error, address not in flash */ ++ printf("Error: end address (0x%08lx) not in flash!\n", *addr); ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static int fill_flash_sect_ranges(ulong addr_first, ulong addr_last, ++ int *s_first, int *s_last, int *s_count) ++{ ++ flash_info_t *info; ++ ulong bank; ++ int rcode = 0; ++ ++ *s_count = 0; ++ ++ for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank) { ++ s_first[bank] = -1; /* first sector to erase */ ++ s_last[bank] = -1; /* last sector to erase */ ++ } ++ ++ for (bank = 0, info = &flash_info[0]; ++ (bank < CONFIG_SYS_MAX_FLASH_BANKS) && (addr_first <= addr_last); ++ ++bank, ++info) { ++ ulong b_end; ++ int sect; ++ short s_end; ++ ++ if (info->flash_id == FLASH_UNKNOWN) ++ continue; ++ ++ b_end = info->start[0] + info->size - 1; /* bank end addr */ ++ s_end = info->sector_count - 1; /* last sector */ ++ ++ for (sect = 0; sect < info->sector_count; ++sect) { ++ ulong end; /* last address in current sect */ ++ ++ end = (sect == s_end) ? b_end : ++ info->start[sect + 1] - 1; ++ ++ if (addr_first > end) ++ continue; ++ if (addr_last < info->start[sect]) ++ continue; ++ ++ if (addr_first == info->start[sect]) ++ s_first[bank] = sect; ++ if (addr_last == end) ++ s_last[bank] = sect; ++ } ++ if (s_first[bank] >= 0) { ++ if (s_last[bank] < 0) { ++ if (addr_last > b_end) { ++ s_last[bank] = s_end; ++ } else { ++ printf("Error: end address not on sector boundary\n"); ++ rcode = 1; ++ break; ++ } ++ } ++ if (s_last[bank] < s_first[bank]) { ++ printf("Error: end sector precedes start sector\n"); ++ rcode = 1; ++ break; ++ } ++ sect = s_last[bank]; ++ addr_first = (sect == s_end) ? b_end + 1 : ++ info->start[sect + 1]; ++ (*s_count) += s_last[bank] - s_first[bank] + 1; ++ } else if (addr_first >= info->start[0] && addr_first < b_end) { ++ printf("Error: start address not on sector boundary\n"); ++ rcode = 1; ++ break; ++ } else if (s_last[bank] >= 0) { ++ printf("Error: cannot span across banks when they are mapped in reverse order\n"); ++ rcode = 1; ++ break; ++ } ++ } ++ ++ return rcode; ++} ++ ++static int protect_flash_sector(int state, ulong addr_first, ulong addr_last) ++{ ++ flash_info_t *info; ++ ulong bank; ++ int s_first[CONFIG_SYS_MAX_FLASH_BANKS], ++ s_last[CONFIG_SYS_MAX_FLASH_BANKS]; ++ int protected = 0; ++ int planned; ++ int rcode, i; ++ ++ rcode = fill_flash_sect_ranges(addr_first, addr_last, s_first, s_last, ++ &planned); ++ ++ if (planned && (rcode == 0)) { ++ for (bank = 0, info = &flash_info[0]; ++ bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank, ++info) { ++ if (info->flash_id == FLASH_UNKNOWN) ++ continue; ++ ++ if (s_first[bank] >= 0 && ++ s_first[bank] <= s_last[bank]) { ++ debug("%sProtecting sectors %d..%d in bank %ld\n", ++ state ? "" : "Un-", s_first[bank], ++ s_last[bank], bank + 1); ++ protected ++ += s_last[bank] - s_first[bank] + 1; ++ for (i = s_first[bank]; i <= s_last[bank]; ++i) ++ info->protect[i] = state; ++ } ++ } ++ printf("%sProtected %d sectors\n", state ? "" : "Un-", ++ protected); ++ } else if (rcode == 0) { ++ printf("Error: start and/or end address not on sector boundary\n"); ++ rcode = 1; ++ } ++ ++ return rcode; ++} ++ ++static int erase_flash_sector(ulong addr_first, ulong addr_last) ++{ ++ flash_info_t *info; ++ ulong bank; ++ int s_first[CONFIG_SYS_MAX_FLASH_BANKS]; ++ int s_last[CONFIG_SYS_MAX_FLASH_BANKS]; ++ int erased = 0; ++ int planned; ++ int rcode = 0; ++ ++ rcode = fill_flash_sect_ranges(addr_first, addr_last, s_first, s_last, ++ &planned); ++ ++ if (planned && (rcode == 0)) { ++ for (bank = 0, info = &flash_info[0]; ++ (bank < CONFIG_SYS_MAX_FLASH_BANKS) && (rcode == 0); ++ ++bank, ++info) { ++ if (s_first[bank] >= 0) { ++ erased += s_last[bank] - s_first[bank] + 1; ++ debug("Erase Flash from 0x%08lx to 0x%08lx " ++ "in Bank # %ld ", ++ info->start[s_first[bank]], ++ (s_last[bank] == info->sector_count) ? ++ info->start[0] + info->size - 1 : ++ info->start[s_last[bank] + 1] - 1, ++ bank + 1); ++ rcode = flash_erase(info, s_first[bank], ++ s_last[bank]); ++ } ++ } ++ if (rcode == 0) ++ printf("Erased %d sectors\n", erased); ++ } else if (rcode == 0) { ++ printf("Error: start and/or end address not on sector boundary\n"); ++ rcode = 1; ++ } ++ ++ return rcode; ++} ++ ++static int verify_image(void) ++{ ++ ulong src_addr = IMAGE_LOAD_RAM_ADDR; ++ void *hdr = (void *)src_addr; ++ ++ printf("\n## Checking Image at 0x%08lx ...\n", src_addr); ++ /* AT the moment, we only support FIT image flash */ ++ switch (genimg_get_format(hdr)) { ++ case IMAGE_FORMAT_FIT: ++ printf(" FIT image found\n"); ++ if (!fit_check_format(hdr)) { ++ printf("Bad FIT image format!\n"); ++ return -1; ++ } ++ ++ if (!fit_all_image_verify(hdr)) { ++ printf("Bad hash in FIT image!\n"); ++ return -1; ++ } ++ break; ++ default: ++ printf("Unknown image format!\n"); ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int flash_image(void) ++{ ++ int rcode; ++ ulong max_size = MAX_FITIMAGE_SIZE; ++ ulong src_addr = IMAGE_LOAD_RAM_ADDR; ++ ulong addr_first = get_flash_image_address(); ++ ulong addr_last = addr_first + max_size - 1; ++ ++ if ((g_write_addr > max_size) || (g_write_addr == 0)) { ++ printf("ERROR: %s(): Invalid file uploaded. filesize(0x%08x)\n", ++ __func__, g_write_addr); ++ return -1; ++ } ++ ++ if (sect_roundb(&addr_last) > 0) { ++ printf("ERROR: %s(): sect_roundb failed\n", __func__); ++ return -1; ++ } ++ ++ if (addr_first >= addr_last) { ++ printf("ERROR: %s(): addr_first(0x%08lx) >= addr_last(0x%08lx)\n", ++ __func__, addr_first, addr_last); ++ return -1; ++ } ++ ++ /* Hack: To update the percentage update, ++ * treat logical division as below. ++ * Image verify - 10% ++ * Unprotecting flash sectors - 10% ++ * Erase flash sectors - 40% ++ * Copy to flash - 40% */ ++ ++ /* Unprotect the flash sectors */ ++ rcode = protect_flash_sector(PROTECT_OFF, addr_first, addr_last); ++ if (rcode != 0) { ++ printf("%s(): Protecting flash sector failed(%d).\n", __func__, ++ rcode); ++ return -1; ++ } ++ update_processing_status(IMG_PROGRAMMING, 20); ++ ++ /* erase flash sectors */ ++ rcode = erase_flash_sector(addr_first, addr_last); ++ if (rcode != 0) { ++ printf("%s(): Erasing flash sector failed(%d).\n", __func__, ++ rcode); ++ return -1; ++ } ++ update_processing_status(IMG_PROGRAMMING, 60); ++ ++ /* write to flash area */ ++ printf("Copy to Flash... "); ++ rcode = flash_write((char *)src_addr, addr_first, g_write_addr * 1); ++ if (rcode != 0) { ++ printf("%s(): Flash copy failed(%d).\n", __func__, rcode); ++ flash_perror(rcode); ++ return -1; ++ } ++ printf("done\n"); ++ return 0; ++} ++ ++void start_fw_update_loop(void) ++{ ++ int rc; ++ ulong boot_addr; ++ char boot_cmd[20]; ++ ++ while (1) { ++ if (g_fwupd_settings.random_number_valid) { ++ /* Random number should be cleared after 30seconds */ ++ if (get_ticks() >= etime) { ++ printf("Clearing random number\n"); ++ ++ if (!fwupd_settings_trylock()) ++ continue; ++ memcpy(g_fwupd_settings.rand_num, 0, ++ RAND_NUMBER_SIZE); ++ g_fwupd_settings.random_number_valid = false; ++ fwupd_settings_unlock(); ++ } ++ } ++ ++ if (g_fwupd_settings.start_update) { ++ update_processing_status(IMG_VALIDATING, 0); ++ ++ rc = verify_image(); ++ if (rc != 0) { ++ update_processing_status(UPDATE_ERROR, 100); ++ /* Adding delay to make consumer gets status */ ++ mdelay(WAIT_STATE_TIMEOUT); ++ ++ reset_all_settings(); ++ continue; ++ } ++ ++ update_processing_status(IMG_PROGRAMMING, 10); ++ ++ rc = flash_image(); ++ if (rc == 0) { ++ /* Update successful, change the boot command */ ++ boot_addr = get_flash_image_address(); ++ snprintf(boot_cmd, sizeof(boot_cmd), ++ "bootm %08x", boot_addr); ++ setenv("bootcmd", boot_cmd); ++ saveenv(); ++ ++ update_processing_status(UPDATE_SUCCESSFUL, ++ 100); ++ } else { ++ update_processing_status(UPDATE_ERROR, 100); ++ } ++ ++ /* Adding delay to make sure consumer gets status */ ++ mdelay(WAIT_STATE_TIMEOUT); ++ ++ reset_all_settings(); ++ ++ /* Reset BMC */ ++ do_reset(NULL, 0, 0, NULL); ++ } ++ mdelay(WAIT_STATE_TIMEOUT); ++ } ++ ++ return; ++} ++ ++#if 1 /* Debug purpose */ ++int do_fwupd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ if (argc != 1) ++ return 1; ++ ++ start_fw_update_loop(); ++ return 0; ++} ++U_BOOT_CMD(fwupd, 1, 0, do_fwupd, "Start Firmware update process", ""); ++#endif +diff --git a/board/aspeed/ast-g5/fw-update.h b/board/aspeed/ast-g5/fw-update.h +new file mode 100644 +index 0000000000..ed033adfed +--- /dev/null ++++ b/board/aspeed/ast-g5/fw-update.h +@@ -0,0 +1,50 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include <common.h> ++ ++/* SPI flash map */ ++#define MAX_FITIMAGE_SIZE 0x1B80000 ++#define PRIMARY_FITIMAGE_START_ADDR 0x20080000 ++#define SECONDARY_FITIMAGE_START_ADDR 0x22480000 ++#define IMAGE_LOAD_RAM_ADDR 0x83000000 ++ ++#define MAX_FILENAME_LENGTH 256 ++#define RAND_NUMBER_SIZE 8 ++ ++enum boot_image { ++ PRIMARY_IMAGE = 0x01, ++ SECONDARY_IMAGE = 0x02 ++}; ++ ++enum update_status { ++ INITIALIZING = 0, ++ IDLE, ++ IMG_DOWNLOADING, ++ IMG_VALIDATING, ++ IMG_PROGRAMMING, ++ UPDATE_SUCCESSFUL, ++ UPDATE_ERROR = 0x0F, ++ UPDATE_FORBIDDEN = 0x80, ++ AC_CYCLE_REQUIRED = 0x83 ++}; ++ ++struct fwupd_global_setting { ++ bool fwupd_mode_active; ++ bool start_update; ++ bool random_number_valid; ++ u8 ctrl_state; ++ u8 options_mask; ++ u8 options_value; ++ u8 processing_status; ++ u8 percentage_completion; ++ u8 integrity_check_status; ++ u8 filename_len; ++ u8 filename[MAX_FILENAME_LENGTH]; ++ u8 rand_num[RAND_NUMBER_SIZE]; ++}; ++ ++bool fwupd_settings_trylock(void); ++void fwupd_settings_unlock(void); ++u8 get_active_boot_image(void); ++int generate_random_number(void); +diff --git a/board/aspeed/ast-g5/ipmi-fwupd.c b/board/aspeed/ast-g5/ipmi-fwupd.c +new file mode 100644 +index 0000000000..3eba056e7f +--- /dev/null ++++ b/board/aspeed/ast-g5/ipmi-fwupd.c +@@ -0,0 +1,402 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include "ipmi-fwupd.h" ++ ++struct fwupd_global_setting g_fwupd_settings; ++u32 g_write_addr = 0; ++ ++u16 fwupd_get_execution_ctx(u8 *req, u16 req_len, u8 *res) ++{ ++ int booting_image = 0x01; ++ struct fwupd_get_exe_ctx_res *result = ++ (struct fwupd_get_exe_ctx_res *)res; ++ ++ /* Get active image location(primary/secondary) */ ++ booting_image = get_active_boot_image(); ++ result->patition_ptr = booting_image; ++ result->exection_ctx = 0x11; /* Forced Firmware Update mode */ ++ ++ result->completion_code = IPMI_CC_OK; ++ return sizeof(struct fwupd_get_exe_ctx_res); ++} ++u16 fwupd_get_rand_number(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_rand_num_res *result = (struct fwupd_rand_num_res *)res; ++ ++ if (req_len != 0) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is critical operation is going on */ ++ if (g_fwupd_settings.start_update) { ++ printf("%s(): Update in progress.\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is it already in fwupdate mode */ ++ if (g_fwupd_settings.fwupd_mode_active) { ++ printf("%s(): Already in firmware update mode\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ if (generate_random_number() != 0) { ++ printf("%s(): Random number generation failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ memcpy(result->rand_num, g_fwupd_settings.rand_num, RAND_NUMBER_SIZE); ++ ++ return sizeof(struct fwupd_rand_num_res); ++} ++ ++u16 fwupd_enter_update_mode(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_set_update_mode_res *result = ++ (struct fwupd_set_update_mode_res *)res; ++ ++ if (req_len != RAND_NUMBER_SIZE) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is critical operation is going on */ ++ if (g_fwupd_settings.start_update) { ++ printf("%s(): Update in progress.\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is it already in fwupdate mode */ ++ if (g_fwupd_settings.fwupd_mode_active) { ++ printf("%s(): Already in firmware update mode\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ /* This command should excute within 30 seconds ++ * after random number generation. */ ++ if (!g_fwupd_settings.random_number_valid) { ++ printf("%s(): No valid random number exist.\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_CODE; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Validate the key to enter this mode */ ++ for (int i = 0; i < RAND_NUMBER_SIZE; i++) { ++ if (req[i] != g_fwupd_settings.rand_num[i]) { ++ printf("%s(): Invalid key entered\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_CODE; ++ return sizeof(result->completion_code); ++ } ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ /* Reset all the settings */ ++ memset(&g_fwupd_settings, 0, sizeof(g_fwupd_settings)); ++ g_fwupd_settings.fwupd_mode_active = true; ++ fwupd_settings_unlock(); ++ ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(struct fwupd_set_update_mode_res); ++} ++ ++u16 fwupd_exit_update_mode(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_exit_update_mode_res *result = ++ (struct fwupd_exit_update_mode_res *)res; ++ ++ if (req_len != 0) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!g_fwupd_settings.fwupd_mode_active) { ++ printf("%s(): Invalid command entered\n", __func__); ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.fwupd_mode_active = false; ++ fwupd_settings_unlock(); ++ ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(struct fwupd_exit_update_mode_res); ++} ++u16 fwupd_set_options(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_options_req *options_req = (struct fwupd_options_req *)req; ++ struct fwupd_options_res *result = (struct fwupd_options_res *)res; ++ ++ if (req_len < 2) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is critical operation is going on */ ++ if (g_fwupd_settings.start_update) { ++ printf("%s(): Update in progress.\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Setting any reserved bits will result the command being rejected */ ++ if (((options_req->options_mask & 0xF0) != 0) || ++ ((options_req->options_value & 0xF0) != 0)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_FIELD; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.options_mask = options_req->options_mask; ++ g_fwupd_settings.options_value = options_req->options_value; ++ fwupd_settings_unlock(); ++ ++ result->completion_code = IPMI_CC_OK; ++ result->options_value = (g_fwupd_settings.options_mask & ++ g_fwupd_settings.options_value); ++ ++ return sizeof(struct fwupd_options_res); ++} ++ ++u16 fwupd_set_get_control(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_control_req *ctrl_req = (struct fwupd_control_req *)req; ++ struct fwupd_control_res *result = (struct fwupd_control_res *)res; ++ ++ if (req_len < 1) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is critical operation is going on */ ++ if (g_fwupd_settings.start_update) { ++ printf("%s(): Update in progress.\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ if ((ctrl_req->ctrl_state == SET_FW_FILENAME) && (req_len < 3)) { ++ printf("%s(): Invalid request data\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } else if ((ctrl_req->ctrl_state != SET_FW_FILENAME) && ++ (req_len != 1)) { ++ printf("%s(): Invalid request data\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ if ((!g_fwupd_settings.fwupd_mode_active) && ++ (ctrl_req->ctrl_state != GET_CTRL_STATE)) { ++ printf("%s(): Invalid request. Control State: %d.\n", __func__, ++ ctrl_req->ctrl_state); ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ switch (ctrl_req->ctrl_state) { ++ case GET_CTRL_STATE: ++ break; ++ case IMG_TRANSFER_START: ++ if ((g_fwupd_settings.ctrl_state & ++ IMG_TRANSFER_CTRL_BIT_START)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = ++ IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.processing_status = IMG_DOWNLOADING; ++ /* Reset control state during start */ ++ g_fwupd_settings.ctrl_state = 0x00; ++ g_fwupd_settings.ctrl_state |= IMG_TRANSFER_CTRL_BIT_START; ++ /* Set current write address to ZERO */ ++ g_write_addr = 0x00; ++ fwupd_settings_unlock(); ++ break; ++ case IMG_TRANSFER_END: ++ if (!(g_fwupd_settings.ctrl_state & ++ IMG_TRANSFER_CTRL_BIT_START)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = ++ IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.start_update = true; ++ g_fwupd_settings.ctrl_state |= IMG_TRANSFER_CTRL_BIT_END; ++ ++ g_fwupd_settings.ctrl_state &= ~(IMG_TRANSFER_CTRL_BIT_START | ++ IMG_TRANSFER_CTRL_BIT_ABORT); ++ fwupd_settings_unlock(); ++ break; ++ case IMG_TRANSFER_ABORT: ++ if (!(g_fwupd_settings.ctrl_state & ++ IMG_TRANSFER_CTRL_BIT_START)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = ++ IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.processing_status = UPDATE_ERROR; ++ g_fwupd_settings.ctrl_state |= IMG_TRANSFER_CTRL_BIT_ABORT; ++ g_fwupd_settings.ctrl_state &= ~(IMG_TRANSFER_CTRL_BIT_START | ++ IMG_TRANSFER_CTRL_BIT_END); ++ fwupd_settings_unlock(); ++ break; ++ case SET_FW_FILENAME: ++ /* Not supporting now */ ++ if (ctrl_req->filename_len > sizeof(ctrl_req->filename)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_FIELD; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!(g_fwupd_settings.ctrl_state & ++ IMG_TRANSFER_CTRL_BIT_START)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = ++ IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!fwupd_settings_trylock()) { ++ printf("%s(): Lock failed\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ g_fwupd_settings.filename_len = ctrl_req->filename_len; ++ strncpy(g_fwupd_settings.filename, ctrl_req->filename, ++ ctrl_req->filename_len); ++ fwupd_settings_unlock(); ++ /* TODO: Used for TFTP update but not implemented yet. */ ++ /* TODO: Verify image and write to flash */ ++ break; ++ case USB_DEV_ATTACH: ++ /* Not supporting now */ ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ case USB_DEV_DETACH: ++ /* Not supporting now */ ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ break; ++ default: ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_FIELD; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ result->curr_state = g_fwupd_settings.ctrl_state; ++ return sizeof(struct fwupd_control_res); ++} ++u16 fwupd_get_update_status(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_get_update_status_res *result = ++ (struct fwupd_get_update_status_res *)res; ++ ++ if (req_len != 0) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ result->processing_status = g_fwupd_settings.processing_status; ++ result->percent_completion = g_fwupd_settings.percentage_completion; ++ result->check_status = 0; ++ /* We don't support error code messages cmd(0x0EH) in uboot.*/ ++ result->error_code = 0; ++ ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(struct fwupd_get_update_status_res); ++} ++ ++u16 fwupd_image_write(u8 *req, u16 req_len, u8 *res) ++{ ++ struct fwupd_image_write_res *result = ++ (struct fwupd_image_write_res *)res; ++ ++ if (req_len < 1) { ++ printf("%s(): Invalid request length\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Check is critical operation is going on */ ++ if (g_fwupd_settings.start_update) { ++ printf("%s(): Update in progress.\n", __func__); ++ result->completion_code = IPMI_CC_NODE_BUSY; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!g_fwupd_settings.fwupd_mode_active) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if (!(g_fwupd_settings.ctrl_state & IMG_TRANSFER_CTRL_BIT_START)) { ++ printf("%s(): Invalid request\n", __func__); ++ result->completion_code = IPMI_CC_NOT_SUPPORTED_IN_STATE; ++ return sizeof(result->completion_code); ++ } ++ ++ if ((g_write_addr + req_len) > MAX_FITIMAGE_SIZE) { ++ printf("%s(): Request length exceeded max size\n", __func__); ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ u8 *mem_addr = (u8 *)((u32)IMAGE_LOAD_RAM_ADDR + g_write_addr); ++ ++ memcpy(mem_addr, req, req_len); ++ g_write_addr += req_len; ++ ++ result->completion_code = IPMI_CC_OK; ++ result->no_of_bytes_written = (u8)req_len; ++ ++ return sizeof(struct fwupd_image_write_res); ++} +diff --git a/board/aspeed/ast-g5/ipmi-fwupd.h b/board/aspeed/ast-g5/ipmi-fwupd.h +new file mode 100644 +index 0000000000..e490f6b527 +--- /dev/null ++++ b/board/aspeed/ast-g5/ipmi-fwupd.h +@@ -0,0 +1,81 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include "ipmi-handler.h" ++#include "fw-update.h" ++ ++enum control_state { ++ GET_CTRL_STATE = 0, ++ IMG_TRANSFER_START, ++ IMG_TRANSFER_END, ++ IMG_TRANSFER_ABORT, ++ SET_FW_FILENAME, ++ USB_DEV_ATTACH, ++ USB_DEV_DETACH ++}; ++enum control_state_bit { ++ IMG_TRANSFER_CTRL_BIT_START = (0x01 << 0), ++ IMG_TRANSFER_CTRL_BIT_END = (0x01 << 1), ++ IMG_TRANSFER_CTRL_BIT_ABORT = (0x01 << 2), ++ USB_CTRL_BIT_ATTACH = (0x01 << 3) ++}; ++enum update_options_bit { ++ NO_DOWN_REVISION = 0, ++ DEFER_BMC_RESET = 1, ++ SHA32_INTEGRITY_CHECK = 2, ++ CRC32_INTEGRITY_CHECK = 3 ++}; ++ ++struct fwupd_get_exe_ctx_res { ++ u8 completion_code; ++ u8 exection_ctx; ++ u8 patition_ptr; ++}; ++struct fwupd_rand_num_res { ++ u8 completion_code; ++ u8 rand_num[RAND_NUMBER_SIZE]; ++}; ++struct fwupd_set_update_mode_res { ++ u8 completion_code; ++}; ++struct fwupd_exit_update_mode_res { ++ u8 completion_code; ++}; ++struct fwupd_options_req { ++ u8 options_mask; ++ u8 options_value; ++ u8 integrity_check_value[32]; ++}; ++struct fwupd_options_res { ++ u8 completion_code; ++ u8 options_value; ++}; ++struct fwupd_control_req { ++ u8 ctrl_state; ++ u8 filename_len; ++ u8 filename[MAX_FILENAME_LENGTH]; ++}; ++struct fwupd_control_res { ++ u8 completion_code; ++ u8 curr_state; ++}; ++struct fwupd_get_update_status_res { ++ u8 completion_code; ++ u8 processing_status; ++ u8 percent_completion; ++ u8 check_status; ++ u8 error_code; ++}; ++struct fwupd_image_write_res { ++ u8 completion_code; ++ u8 no_of_bytes_written; ++}; ++ ++u16 fwupd_get_execution_ctx(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_get_rand_number(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_enter_update_mode(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_exit_update_mode(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_set_options(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_set_get_control(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_get_update_status(u8 *req, u16 req_len, u8 *res); ++u16 fwupd_image_write(u8 *req, u16 req_len, u8 *res); +diff --git a/board/aspeed/ast-g5/ipmi-handler.c b/board/aspeed/ast-g5/ipmi-handler.c +index 9cccee9f2f..5e78546e70 100644 +--- a/board/aspeed/ast-g5/ipmi-handler.c ++++ b/board/aspeed/ast-g5/ipmi-handler.c +@@ -1,18 +1,37 @@ +- + // SPDX-License-Identifier: GPL-2.0 + // Copyright (c) 2018-2019 Intel Corporation + +-#include "ipmi-handler.h" ++#include "ipmi-fwupd.h" + + /* IPMI network function codes */ + #define NETFN_APP 0x06 ++#define NETFN_FIRMWARE 0x08 ++#define NETFN_INTEL_OEM 0x30 + + /* IPMI command codes */ +-#define CMD_GET_DEV_ID 0x01 +-#define CMD_GET_SELF_TEST_RESULTS 0x04 ++#define CMD_APP_GET_DEV_ID 0x01 ++#define CMD_APP_GET_SELF_TEST_RESULTS 0x04 ++#define CMD_FWUPD_GET_EXECUTION_CTX 0x23 ++#define CMD_FWUPD_GET_RANDOM_NUMBER 0x26 ++#define CMD_FWUPD_SET_UPDATE_MODE 0x27 ++#define CMD_FWUPD_EXIT_UPDATE_MODE 0x28 ++#define CMD_FWUPD_CONTROL_GET_SET 0x29 ++#define CMD_FWUPD_GET_UPDATE_STATUS 0x2A ++#define CMD_FWUPD_SET_OPTIONS 0x2B ++#define CMD_FWUPD_IMAGE_WRITE 0x2C ++#define CMD_INTL_OEM_GET_BUFFER_SIZE 0x66 ++ ++#define MAX_KCS_BUF_SIZE 1020 /* (0xFF * 4) */ ++#define MAX_IPMB_BUF_SIZE 1020 /* (0xFF * 4) */ + + typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res); + ++struct ipmi_cmd_table { ++ u8 net_fun; ++ u8 cmd; ++ fun_handler process_cmd; ++}; ++ + struct get_dev_id { + u8 completion_code; + u8 dev_id; +@@ -29,11 +48,10 @@ struct self_test_res { + u8 completion_code; + u8 res_byte[2]; + }; +- +-struct ipmi_cmd_table { +- u8 net_fun; +- u8 cmd; +- fun_handler process_cmd; ++struct intc_get_buf_size_res { ++ u8 completion_code; ++ u8 kcs_size; ++ u8 ipmb_size; + }; + + static u16 get_device_id(u8 *req, u16 req_len, u8 *res) +@@ -84,10 +102,36 @@ static u16 get_self_test_result(u8 *req, u16 req_len, u8 *res) + + return sizeof(struct self_test_res); + } ++static u16 intel_get_buffer_size(u8 *req, u16 req_len, u8 *res) ++{ ++ struct intc_get_buf_size_res *result = ++ (struct intc_get_buf_size_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Size is multiples of four bytes */ ++ result->completion_code = IPMI_CC_OK; ++ result->kcs_size = MAX_KCS_BUF_SIZE / 4; ++ result->ipmb_size = MAX_IPMB_BUF_SIZE / 4; ++ ++ return sizeof(struct intc_get_buf_size_res); ++} + + const struct ipmi_cmd_table cmd_info[] = { +- { NETFN_APP, CMD_GET_DEV_ID, get_device_id }, +- { NETFN_APP, CMD_GET_SELF_TEST_RESULTS, get_self_test_result } ++ { NETFN_APP, CMD_APP_GET_DEV_ID, get_device_id }, ++ { NETFN_APP, CMD_APP_GET_SELF_TEST_RESULTS, get_self_test_result }, ++ { NETFN_FIRMWARE, CMD_FWUPD_GET_EXECUTION_CTX, fwupd_get_execution_ctx }, ++ { NETFN_FIRMWARE, CMD_FWUPD_GET_RANDOM_NUMBER, fwupd_get_rand_number }, ++ { NETFN_FIRMWARE, CMD_FWUPD_SET_UPDATE_MODE, fwupd_enter_update_mode }, ++ { NETFN_FIRMWARE, CMD_FWUPD_EXIT_UPDATE_MODE, fwupd_exit_update_mode }, ++ { NETFN_FIRMWARE, CMD_FWUPD_CONTROL_GET_SET, fwupd_set_get_control }, ++ { NETFN_FIRMWARE, CMD_FWUPD_GET_UPDATE_STATUS, fwupd_get_update_status }, ++ { NETFN_FIRMWARE, CMD_FWUPD_SET_OPTIONS, fwupd_set_options }, ++ { NETFN_FIRMWARE, CMD_FWUPD_IMAGE_WRITE, fwupd_image_write }, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_BUFFER_SIZE, intel_get_buffer_size } + }; + + #define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info) +diff --git a/board/aspeed/ast-g5/ipmi-handler.h b/board/aspeed/ast-g5/ipmi-handler.h +index 9d46d9bd9a..8eea93063a 100644 +--- a/board/aspeed/ast-g5/ipmi-handler.h ++++ b/board/aspeed/ast-g5/ipmi-handler.h +@@ -1,4 +1,3 @@ +- + /* SPDX-License-Identifier: GPL-2.0 */ + /* Copyright (c) 2018-2019 Intel Corporation */ + +@@ -6,12 +5,14 @@ + + /* IPMI completion codes */ + #define IPMI_CC_OK 0x00 ++#define IPMI_CC_INVALID_CODE 0x80 + #define IPMI_CC_NODE_BUSY 0xC0 + #define IPMI_CC_INVALID_CMD 0xC1 + #define IPMI_CC_INVALID_CMD_LUN 0xC2 + #define IPMI_CC_OUT_OF_SPACE 0xC4 + #define IPMI_CC_INVALID_DATA_LENGTH 0xC7 + #define IPMI_CC_INVALID_DATA_FIELD 0xCC ++#define IPMI_CC_NOT_SUPPORTED_IN_STATE 0xD5 + #define IPMI_CC_UNSPECIFIED 0xFF + + /* BMC IPMB LUNs */ +diff --git a/common/autoboot.c b/common/autoboot.c +index d66c0fa63a..3647d5fb21 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -349,6 +349,19 @@ void autoboot_command(const char *s) + { + debug("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>"); + ++#ifdef AST_G5_INTEL ++ /* TODO: Make run_command_list as non-blocking(blocked by getc()) ++ * and make main u-boot loop to check both keyboard inputs as well ++ * as start_update firmware flags during FFUJ. ++ * This will make sure debug mode intact during FFUJ. ++ */ ++ if (intel_force_firmware_jumper_enabled()) { ++ printf("#### Force firmware update mode is enabled, " ++ "Serial console is disabled. ####\n"); ++ start_fw_update_loop(); ++ } ++#endif ++ + if (stored_bootdelay != -1 && s && !abortboot(stored_bootdelay)) { + #if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC) + int prev = disable_ctrlc(1); /* disable Control C checking */ +diff --git a/configs/ast_g5_phy_defconfig b/configs/ast_g5_phy_defconfig +index 1b96ab7f3b..5965a9b04f 100644 +--- a/configs/ast_g5_phy_defconfig ++++ b/configs/ast_g5_phy_defconfig +@@ -15,3 +15,4 @@ CONFIG_SYS_NS16550=y + CONFIG_USE_IRQ=y + CONFIG_CMD_I2C=y + CONFIG_SYS_I2C_AST=y ++CONFIG_LIB_RAND=y diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0030-Support-Get-Set-Security-mode-command.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0030-Support-Get-Set-Security-mode-command.patch new file mode 100644 index 000000000..d471d2c99 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0030-Support-Get-Set-Security-mode-command.patch @@ -0,0 +1,124 @@ +From 60b24cc8e1da556437770e9e49e046b9f41e2979 Mon Sep 17 00:00:00 2001 +From: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Date: Thu, 20 Jun 2019 15:26:50 +0530 +Subject: [PATCH] Support Get/Set Security mode command + +Support added for get/set security mode oem command. This +command is used to read / write the RestrictionMode property +which is saved in U-Boot environment variable. U-Boot +command provides a way to downgrade RestrictionMode property +value, which is not allowed in normal mode from Host interface + +Tested: +1. Verified get security mode returns proper value read from +U-Boot environment variable. ipmitool raw 0x30 0xB3 +2. Verified set security mode updates U-Boot environment variable +and it is reflected in linux too. ipmitool raw 0x30 0xB4 4 +3. Verified negative test cases with improper values and it +throws correct errors + +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> + +--- + board/aspeed/ast-g5/ipmi-handler.c | 63 +++++++++++++++++++++++++++++- + 1 file changed, 62 insertions(+), 1 deletion(-) + +diff --git a/board/aspeed/ast-g5/ipmi-handler.c b/board/aspeed/ast-g5/ipmi-handler.c +index 5e78546e70..4e921bd575 100644 +--- a/board/aspeed/ast-g5/ipmi-handler.c ++++ b/board/aspeed/ast-g5/ipmi-handler.c +@@ -20,10 +20,19 @@ + #define CMD_FWUPD_SET_OPTIONS 0x2B + #define CMD_FWUPD_IMAGE_WRITE 0x2C + #define CMD_INTL_OEM_GET_BUFFER_SIZE 0x66 ++#define CMD_INTL_OEM_GET_SEC_MODE 0xB3 ++#define CMD_INTL_OEM_SET_SEC_MODE 0xB4 + + #define MAX_KCS_BUF_SIZE 1020 /* (0xFF * 4) */ + #define MAX_IPMB_BUF_SIZE 1020 /* (0xFF * 4) */ + ++/* Restriction mode values */ ++#define RESTRICTION_MODE_MIN_VALUE 3 /*Provisioning*/ ++#define RESTRICION_MODE_MAX_VALUE 5 /*Provisioned host disabled */ ++ ++#define STR_ENV_PROVISION "provision" ++ ++ + typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res); + + struct ipmi_cmd_table { +@@ -53,6 +62,11 @@ struct intc_get_buf_size_res { + u8 kcs_size; + u8 ipmb_size; + }; ++struct intc_get_secuirty_mode_res { ++ u8 completion_code; ++ u8 restriction_mode; ++ u8 special_mode; ++}; + + static u16 get_device_id(u8 *req, u16 req_len, u8 *res) + { +@@ -120,6 +134,51 @@ static u16 intel_get_buffer_size(u8 *req, u16 req_len, u8 *res) + return sizeof(struct intc_get_buf_size_res); + } + ++static u16 intel_get_security_mode(u8 *req, u16 req_len, u8 *res) ++{ ++ char *cmdline = NULL; ++ struct intc_get_secuirty_mode_res *result = ++ (struct intc_get_secuirty_mode_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ cmdline = getenv(STR_ENV_PROVISION); ++ if (!cmdline) { ++ /* Default provision must be set only by linux */ ++ result->completion_code = IPMI_CC_UNSPECIFIED; ++ return sizeof(result->completion_code); ++ } ++ result->restriction_mode = simple_strtol(cmdline, NULL, 10); ++ /* special mode is non-volatile and not applicable in U-Boot */ ++ result->special_mode = 0; ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(*result); ++} ++ ++static u16 intel_set_security_mode(u8 *req, u16 req_len, u8 *res) ++{ ++ if (req_len != sizeof(*req)) { ++ *res = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(*res); ++ } ++ ++ if (*req > RESTRICION_MODE_MAX_VALUE || ++ *req < RESTRICTION_MODE_MIN_VALUE) { ++ *res = IPMI_CC_INVALID_DATA_FIELD; ++ return sizeof(*res); ++ } ++ ++ setenv_ulong(STR_ENV_PROVISION, *req); ++ saveenv(); ++ *res = IPMI_CC_OK; ++ ++ return sizeof(*res); ++} ++ + const struct ipmi_cmd_table cmd_info[] = { + { NETFN_APP, CMD_APP_GET_DEV_ID, get_device_id }, + { NETFN_APP, CMD_APP_GET_SELF_TEST_RESULTS, get_self_test_result }, +@@ -131,7 +190,9 @@ const struct ipmi_cmd_table cmd_info[] = { + { NETFN_FIRMWARE, CMD_FWUPD_GET_UPDATE_STATUS, fwupd_get_update_status }, + { NETFN_FIRMWARE, CMD_FWUPD_SET_OPTIONS, fwupd_set_options }, + { NETFN_FIRMWARE, CMD_FWUPD_IMAGE_WRITE, fwupd_image_write }, +- { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_BUFFER_SIZE, intel_get_buffer_size } ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_BUFFER_SIZE, intel_get_buffer_size }, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_SEC_MODE, intel_get_security_mode }, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_SET_SEC_MODE, intel_set_security_mode }, + }; + + #define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info) diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0031-Make-it-so-TFTP-port-can-be-modified.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0031-Make-it-so-TFTP-port-can-be-modified.patch new file mode 100644 index 000000000..9045360fc --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0031-Make-it-so-TFTP-port-can-be-modified.patch @@ -0,0 +1,38 @@ +From 853894273464f068107f8de3a786327871df699f Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Tue, 16 Jul 2019 16:30:02 -0700 +Subject: [PATCH] Make it so TFTP port can be modified + +This makes it so we can use non-privileged tftp ports. + +Tested: Can load fw from non-privileged port. + +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + include/configs/ast-g5-ncsi.h | 2 ++ + include/configs/ast-g5-phy.h | 2 ++ + 2 files changed, 4 insertions(+) + +diff --git a/include/configs/ast-g5-ncsi.h b/include/configs/ast-g5-ncsi.h +index 12d6684551..20864b2798 100644 +--- a/include/configs/ast-g5-ncsi.h ++++ b/include/configs/ast-g5-ncsi.h +@@ -28,4 +28,6 @@ + + #define CONFIG_HW_WATCHDOG + ++#define CONFIG_TFTP_PORT ++ + #endif /* __AST_G5_NCSI_CONFIG_H */ +diff --git a/include/configs/ast-g5-phy.h b/include/configs/ast-g5-phy.h +index 62ddb841e5..371f50a1db 100644 +--- a/include/configs/ast-g5-phy.h ++++ b/include/configs/ast-g5-phy.h +@@ -30,4 +30,6 @@ + /* platform.S */ + #define CONFIG_DRAM_ECC_SIZE 0x10000000 + ++#define CONFIG_TFTP_PORT ++ + #endif /* __AST_G5_PHY_CONFIG_H */ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch new file mode 100644 index 000000000..bd32d55ec --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch @@ -0,0 +1,528 @@ +From 5d16832eb3a65e2d30c732a06abcec801c1edf38 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 24 Jul 2019 20:11:30 +0530 +Subject: [PATCH] PFR FW update and checkpoint support in u-boot + +1) Added firmware update ipmi commands support +for PFR images. This enables PFR based firmware +updates for components BMC, BIOS and CPLD during +FFUJ mode. + +2) Added two PFR boot flow checkpoint in u-boot + - Set the booting starts checkpoint(0x01) + - Set FFUJ checkpoint(0x07) when jumper on. + +Tested: + +Tested: +1) Using debug fwpiaupd.efi utility, validated the PFR +BMC image update via KCS ( In FFUJ mode). +2) Loaded the image, dumped all cpld registers and +cross verified the check-points properly set or not. + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + board/aspeed/ast-g5/Makefile | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 10 +++ + board/aspeed/ast-g5/fw-update.c | 112 +++++++++++++++-------------- + board/aspeed/ast-g5/fw-update.h | 7 ++ + board/aspeed/ast-g5/ipmi-fwupd.c | 37 ++++++++++ + board/aspeed/ast-g5/ipmi-fwupd.h | 6 -- + board/aspeed/ast-g5/pfr-mgr.c | 73 +++++++++++++++++++ + board/aspeed/ast-g5/pfr-mgr.h | 73 +++++++++++++++++++ + 8 files changed, 258 insertions(+), 61 deletions(-) + create mode 100644 board/aspeed/ast-g5/pfr-mgr.c + create mode 100644 board/aspeed/ast-g5/pfr-mgr.h + +diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile +index 0b2d936c23..9021d7fc08 100644 +--- a/board/aspeed/ast-g5/Makefile ++++ b/board/aspeed/ast-g5/Makefile +@@ -8,3 +8,4 @@ obj-y += ast-g5-kcs.o + obj-y += ipmi-handler.o + obj-y += ipmi-fwupd.o + obj-y += fw-update.o ++obj-y += pfr-mgr.o +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 6e43b74bc4..6a36cfa2ba 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -16,6 +16,7 @@ + #include "ast-g5.h" + #include "ast-g5-gpio.h" + #include "ast-g5-timer.h" ++#include "pfr-mgr.h" + + /* Names to match the GPIOs */ + enum gpio_names { +@@ -664,6 +665,10 @@ void ast_g5_intel(void) + ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) | + SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL); + ++ /* To notify the CPLD about the start of bootloader ++ * and hardware initialization */ ++ set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG, PFR_CPLD_CHKPOINT_START); ++ + uart_init(); + mailbox_init(); + pwm_init(); +@@ -683,6 +688,11 @@ void ast_g5_intel(void) + kcs_init(); + if (intel_get_platform_id() == COOPER_CITY_BOARD_ID) + set_pwm_duty_cycle(ELEVATED_PWM_DUTY_VALUE); ++ /* Notify CPLD about FFUJ jumper set and pause ++ * of booting for indefinitely time. It will be ++ * resumed once reset is done. */ ++ set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG, ++ PFR_CPLD_CHKPOINT_FFUJ); + /* TODO: need to stop the booting here. */ + } + } +diff --git a/board/aspeed/ast-g5/fw-update.c b/board/aspeed/ast-g5/fw-update.c +index 99239938b5..89fe5fd4fd 100644 +--- a/board/aspeed/ast-g5/fw-update.c ++++ b/board/aspeed/ast-g5/fw-update.c +@@ -6,6 +6,7 @@ + #include <flash.h> + + #include "fw-update.h" ++#include "pfr-mgr.h" + + #define BOOTCMD_BOOTM_STR "bootm " + #define RANDOM_NUM_TIMEOUT 30 /* in seconds */ +@@ -15,7 +16,7 @@ + #define PROTECT_ON 1 + + extern struct fwupd_global_setting g_fwupd_settings; +-extern u32 g_write_addr; ++extern struct fwupd_image_info g_img_info; + + bool g_fwupd_settings_lock = false; + unsigned long long etime; +@@ -36,16 +37,8 @@ void fwupd_settings_unlock(void) + + u8 get_active_boot_image(void) + { +- char *bootcmd = getenv("bootcmd"); +- char *start = strstr(bootcmd, BOOTCMD_BOOTM_STR); ++ /* For PFR, its always active region */ + u8 boot_image = PRIMARY_IMAGE; +- +- if (start) { +- ulong boot_addr = simple_strtoul( +- (start + strlen(BOOTCMD_BOOTM_STR)), NULL, 16); +- if (boot_addr == SECONDARY_FITIMAGE_START_ADDR) +- return SECONDARY_IMAGE; +- } + return boot_image; + } + +@@ -318,45 +311,22 @@ static int erase_flash_sector(ulong addr_first, ulong addr_last) + return rcode; + } + +-static int verify_image(void) ++static int verify_image(ulong src_addr, ulong img_length) + { +- ulong src_addr = IMAGE_LOAD_RAM_ADDR; +- void *hdr = (void *)src_addr; +- +- printf("\n## Checking Image at 0x%08lx ...\n", src_addr); +- /* AT the moment, we only support FIT image flash */ +- switch (genimg_get_format(hdr)) { +- case IMAGE_FORMAT_FIT: +- printf(" FIT image found\n"); +- if (!fit_check_format(hdr)) { +- printf("Bad FIT image format!\n"); +- return -1; +- } +- +- if (!fit_all_image_verify(hdr)) { +- printf("Bad hash in FIT image!\n"); +- return -1; +- } +- break; +- default: +- printf("Unknown image format!\n"); +- return -1; +- } +- ++ /* TODO: Verify the hash alone here.*/ ++ /* Full image verification is done in CPLD. */ + return 0; + } + +-static int flash_image(void) ++static int flash_image(ulong src_addr, ulong addr_first, ulong max_size, ++ ulong img_length) + { + int rcode; +- ulong max_size = MAX_FITIMAGE_SIZE; +- ulong src_addr = IMAGE_LOAD_RAM_ADDR; +- ulong addr_first = get_flash_image_address(); + ulong addr_last = addr_first + max_size - 1; + +- if ((g_write_addr > max_size) || (g_write_addr == 0)) { ++ if ((img_length > max_size) || (img_length == 0)) { + printf("ERROR: %s(): Invalid file uploaded. filesize(0x%08x)\n", +- __func__, g_write_addr); ++ __func__, img_length); + return -1; + } + +@@ -398,7 +368,7 @@ static int flash_image(void) + + /* write to flash area */ + printf("Copy to Flash... "); +- rcode = flash_write((char *)src_addr, addr_first, g_write_addr * 1); ++ rcode = flash_write((char *)src_addr, addr_first, img_length); + if (rcode != 0) { + printf("%s(): Flash copy failed(%d).\n", __func__, rcode); + flash_perror(rcode); +@@ -430,10 +400,27 @@ void start_fw_update_loop(void) + } + + if (g_fwupd_settings.start_update) { ++ printf("Starting image copy to staging area.....\n"); + update_processing_status(IMG_VALIDATING, 0); +- +- rc = verify_image(); ++ u8 update_intent = 0x00; ++ if ((g_fwupd_settings.options_mask & ++ g_fwupd_settings.options_value) & DEFER_BMC_RESET) ++ update_intent |= DEFER_UPDATES_TO_RESET; ++ ++ ulong offset = ++ get_flash_region_offset(g_img_info.img_type); ++ ulong max_size = ++ get_image_max_size(g_img_info.img_type); ++ ulong src_addr = IMAGE_LOAD_RAM_ADDR; ++ ulong flash_addr = PFR_IMAGE_STAGING_BASE_ADDR + offset; ++ ++ debug("FWUPD: offset:0x%08lx, max_size:0x%08lx, " ++ "src_addr:0x%08lx, flash_addr:0x%08lx\n", ++ offset, max_size, src_addr, flash_addr); ++ ++ rc = verify_image(src_addr, g_img_info.img_length); + if (rc != 0) { ++ printf("Image verification failed.\n"); + update_processing_status(UPDATE_ERROR, 100); + /* Adding delay to make consumer gets status */ + mdelay(WAIT_STATE_TIMEOUT); +@@ -441,31 +428,46 @@ void start_fw_update_loop(void) + reset_all_settings(); + continue; + } ++ printf("Image verification success.\n"); + + update_processing_status(IMG_PROGRAMMING, 10); + +- rc = flash_image(); ++ rc = flash_image(src_addr, flash_addr, max_size, ++ g_img_info.img_length); + if (rc == 0) { +- /* Update successful, change the boot command */ +- boot_addr = get_flash_image_address(); +- snprintf(boot_cmd, sizeof(boot_cmd), +- "bootm %08x", boot_addr); +- setenv("bootcmd", boot_cmd); +- saveenv(); ++ update_processing_status(IMG_PROGRAMMING, 90); ++ } else { ++ update_processing_status(UPDATE_ERROR, 100); ++ } + ++ printf("Image copy to staging area %s.\n", ++ ((rc == 0) ? "successful" : "failed")); ++ ++ /* Set the BMC update intent BIT to CPLD register */ ++ update_intent != get_update_intent(g_img_info.img_type); ++ ++ /* TODO: We ned a way to protect the staging area from ++ * next write data. After setting cpld intent bit, CPLD ++ * read the stagging region for associated image types ++ * and update active/recovery area. During this stage, ++ * staging area should be protected from next write. ++ * Working with CPLD team for identifying this state. */ ++ if (0 != set_cpld_reg(PFR_CPLD_BMC_UPDATE_INTENT_REG, ++ update_intent)) { ++ update_processing_status(UPDATE_ERROR, 100); ++ } else { ++ printf("CPLD: Update intent set successfully.\n"); + update_processing_status(UPDATE_SUCCESSFUL, + 100); +- } else { +- update_processing_status(UPDATE_ERROR, 100); ++ ++ if (update_intent & DEFER_UPDATES_TO_RESET) ++ printf("CPLD: Update defered to next reset.\n"); + } + + /* Adding delay to make sure consumer gets status */ + mdelay(WAIT_STATE_TIMEOUT); +- + reset_all_settings(); + +- /* Reset BMC */ +- do_reset(NULL, 0, 0, NULL); + } + mdelay(WAIT_STATE_TIMEOUT); + } +diff --git a/board/aspeed/ast-g5/fw-update.h b/board/aspeed/ast-g5/fw-update.h +index ed033adfed..45e46ba596 100644 +--- a/board/aspeed/ast-g5/fw-update.h ++++ b/board/aspeed/ast-g5/fw-update.h +@@ -28,6 +28,12 @@ enum update_status { + UPDATE_FORBIDDEN = 0x80, + AC_CYCLE_REQUIRED = 0x83 + }; ++enum update_options { ++ NO_DOWN_REVISION = BIT(0), ++ DEFER_BMC_RESET = BIT(1), ++ SHA32_INTEGRITY_CHECK = BIT(2), ++ CRC32_INTEGRITY_CHECK = BIT(3) ++}; + + struct fwupd_global_setting { + bool fwupd_mode_active; +@@ -48,3 +54,4 @@ bool fwupd_settings_trylock(void); + void fwupd_settings_unlock(void); + u8 get_active_boot_image(void); + int generate_random_number(void); ++ +diff --git a/board/aspeed/ast-g5/ipmi-fwupd.c b/board/aspeed/ast-g5/ipmi-fwupd.c +index 3eba056e7f..6afc8d66b7 100644 +--- a/board/aspeed/ast-g5/ipmi-fwupd.c ++++ b/board/aspeed/ast-g5/ipmi-fwupd.c +@@ -2,10 +2,14 @@ + // Copyright (c) 2018-2019 Intel Corporation + + #include "ipmi-fwupd.h" ++#include "pfr-mgr.h" + + struct fwupd_global_setting g_fwupd_settings; + u32 g_write_addr = 0; + ++struct fwupd_image_info g_img_info; ++static bool block0_mapped = false; ++ + u16 fwupd_get_execution_ctx(u8 *req, u16 req_len, u8 *res) + { + int booting_image = 0x01; +@@ -395,6 +399,39 @@ u16 fwupd_image_write(u8 *req, u16 req_len, u8 *res) + memcpy(mem_addr, req, req_len); + g_write_addr += req_len; + ++ /* Get the PFR block 0 data and read the uploaded image ++ * information( Image type, length, hash etc) */ ++ if ((g_write_addr >= sizeof(struct pfr_image_block0)) && ++ (!block0_mapped)) { ++ struct pfr_image_block0 *block0_data = ++ (struct pfr_image_block0 *)IMAGE_LOAD_RAM_ADDR; ++ u32 magic_num = (u32)((*block0_data->tag) | ++ LSH(*(block0_data->tag + 1), 8) | ++ LSH(*(block0_data->tag + 2), 16) | ++ LSH(*(block0_data->tag + 3), 24)); ++ /* Validate the magic number */ ++ if (magic_num != PFR_BLOCK0_MAGIC_NUM) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Fill the image info structure for later use */ ++ g_img_info.magic_num = magic_num; ++ g_img_info.img_length = ++ (u32)((*block0_data->pc_length) | ++ LSH(*(block0_data->pc_length + 1), 8) | ++ LSH(*(block0_data->pc_length + 2), 16) | ++ LSH(*(block0_data->pc_length + 3), 24)); ++ g_img_info.img_type = ++ (u32)((*block0_data->pc_type) | ++ LSH(*(block0_data->pc_type + 1), 8) | ++ LSH(*(block0_data->pc_type + 2), 16) | ++ LSH(*(block0_data->pc_type + 3), 24)); ++ /* Add Authentication data struct length for full image */ ++ g_img_info.img_length += PFR_AUTH_DATA_STRUCT_LEN; ++ block0_mapped = true; ++ } ++ + result->completion_code = IPMI_CC_OK; + result->no_of_bytes_written = (u8)req_len; + +diff --git a/board/aspeed/ast-g5/ipmi-fwupd.h b/board/aspeed/ast-g5/ipmi-fwupd.h +index e490f6b527..7409d2e2f9 100644 +--- a/board/aspeed/ast-g5/ipmi-fwupd.h ++++ b/board/aspeed/ast-g5/ipmi-fwupd.h +@@ -19,12 +19,6 @@ enum control_state_bit { + IMG_TRANSFER_CTRL_BIT_ABORT = (0x01 << 2), + USB_CTRL_BIT_ATTACH = (0x01 << 3) + }; +-enum update_options_bit { +- NO_DOWN_REVISION = 0, +- DEFER_BMC_RESET = 1, +- SHA32_INTEGRITY_CHECK = 2, +- CRC32_INTEGRITY_CHECK = 3 +-}; + + struct fwupd_get_exe_ctx_res { + u8 completion_code; +diff --git a/board/aspeed/ast-g5/pfr-mgr.c b/board/aspeed/ast-g5/pfr-mgr.c +new file mode 100644 +index 0000000000..77131688e7 +--- /dev/null ++++ b/board/aspeed/ast-g5/pfr-mgr.c +@@ -0,0 +1,73 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include "pfr-mgr.h" ++ ++int set_cpld_reg(u8 reg_addr, u8 value) ++{ ++ int ret = 0; ++ int chip = (PFR_CPLD_SLAVE_ADDR >> 1); ++ ++ /* Get current I2C bus number to restore later. */ ++ int current_bus_no = i2c_get_bus_num(); ++ ++ /* Set I2C bus number to PFR CPLD I2C bus. */ ++ ret = i2c_set_bus_num(PFR_CPLD_I2C_BUSNO); ++ if (ret) { ++ printf("Failed to change I2C bus number (%d)\n", ret); ++ goto done; ++ } ++ ++ ret = i2c_write(chip, reg_addr, 1, &value, 1); ++ if (ret) { ++ printf("Error writing the chip: %d\n", ret); ++ goto done; ++ } ++ ++done: ++ /* Restore I2C bus number */ ++ if (i2c_set_bus_num(current_bus_no)) ++ printf("Failed to restore I2C bus number.\n"); ++ ++ return ret; ++} ++ ++ulong get_update_intent(u32 type) ++{ ++ ulong intent = 0; ++ if (type == PFR_CPLD_UPDATE_CAPSULE) ++ intent = CPLD_IMAGE_UPDATE; ++ else if (type == PFR_PCH_UPDATE_CAPSULE) ++ intent = PCH_SPI_FLASH_ACTIVE; ++ else if (type == PFR_BMC_UPDATE_CAPSULE) ++ intent = BMC_SPI_FLASH_ACTIVE; ++ ++ return intent; ++} ++ ++ulong get_image_max_size(u32 type) ++{ ++ ulong max_size = MAX_BMC_IMAGE_SIZE; ++ if (type == PFR_CPLD_UPDATE_CAPSULE) ++ max_size = MAX_CPLD_IMAGE_SIZE; ++ else if (type == PFR_PCH_UPDATE_CAPSULE) ++ max_size = MAX_BIOS_IMAGE_SIZE; ++ else if (type == PFR_BMC_UPDATE_CAPSULE) ++ max_size = MAX_BMC_IMAGE_SIZE; ++ ++ return max_size; ++} ++ ++ulong get_flash_region_offset(u32 type) ++{ ++ ulong offset = 0; ++ if (type == PFR_CPLD_UPDATE_CAPSULE) ++ offset = PFR_CPLD_IMAGE_REGION_OFFSET; ++ else if (type == PFR_PCH_UPDATE_CAPSULE) ++ offset = PFR_BIOS_IMAGE_REGION_OFFSET; ++ else if (type == PFR_BMC_UPDATE_CAPSULE) ++ offset = PFR_BMC_IMAGE_REGION_OFFSET; ++ ++ return offset; ++} ++ +diff --git a/board/aspeed/ast-g5/pfr-mgr.h b/board/aspeed/ast-g5/pfr-mgr.h +new file mode 100644 +index 0000000000..5c5b98bbe0 +--- /dev/null ++++ b/board/aspeed/ast-g5/pfr-mgr.h +@@ -0,0 +1,73 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++// Copyright (c) 2018-2019 Intel Corporation ++ ++#include <common.h> ++ ++/* CPLD I2C device defines */ ++#define PFR_CPLD_I2C_BUSNO 4 ++#define PFR_CPLD_SLAVE_ADDR 0x70 ++ ++/* CPLD registers */ ++#define PFR_CPLD_BOOT_CHECKPOINT_REG 0x0F ++#define PFR_CPLD_BMC_UPDATE_INTENT_REG 0x13 ++ ++/* PFR checkpoints */ ++#define PFR_CPLD_CHKPOINT_START 0x01 ++#define PFR_CPLD_CHKPOINT_FFUJ 0x07 ++#define PFR_CPLD_CHKPOINT_FINISHED 0x09 ++ ++#define PFR_BLOCK0_MAGIC_NUM 0xB6EAFD19 ++#define PFR_AUTH_DATA_STRUCT_LEN 1024 /* Block0 & Block1 */ ++ ++/* SPI Flash MAP */ ++#define PFR_IMAGE_STAGING_BASE_ADDR 0x24A00000 /* 54MB */ ++#define MAX_BMC_IMAGE_SIZE 0x2000000 /* 32MB */ ++#define MAX_BIOS_IMAGE_SIZE 0x1000000 /* 16MB */ ++#define MAX_CPLD_IMAGE_SIZE 0x400000 /* 4MB */ ++#define PFR_BMC_IMAGE_REGION_OFFSET 0 ++#define PFR_BIOS_IMAGE_REGION_OFFSET \ ++ (PFR_BMC_IMAGE_REGION_OFFSET + MAX_BMC_IMAGE_SIZE) ++#define PFR_CPLD_IMAGE_REGION_OFFSET \ ++ (PFR_BIOS_IMAGE_REGION_OFFSET + MAX_BIOS_IMAGE_SIZE) ++ ++#define LSH(data, num) ((data) << (num)) ++ ++/* Bit mapping for CPLD 'BMC update intent' */ ++enum cpld_update_intent { ++ PCH_SPI_FLASH_ACTIVE = BIT(0), ++ PCH_SPI_FLASH_RECOVERY = BIT(1), ++ CPLD_IMAGE_UPDATE = BIT(2), ++ BMC_SPI_FLASH_ACTIVE = BIT(3), ++ BMC_SPI_FLASH_RECOVERY = BIT(4), ++ DEFER_UPDATES_TO_RESET = BIT(7) ++}; ++ ++enum pfr_block0_pc_type { ++ PFR_CPLD_UPDATE_CAPSULE = 0x00, ++ PFR_PCH_PFM = 0x01, ++ PFR_PCH_UPDATE_CAPSULE = 0x02, ++ PFR_BMC_PFM = 0x03, ++ PFR_BMC_UPDATE_CAPSULE = 0x04 ++}; ++ ++/* PFR image block 0 - As defined in HAS */ ++struct pfr_image_block0 { ++ u8 tag[4]; ++ u8 pc_length[4]; ++ u8 pc_type[4]; ++ u8 reserved_1[4]; ++ u8 hash_256[32]; ++ u8 hash_384[48]; ++ u8 reserved_2[32]; ++}; ++ ++struct fwupd_image_info { ++ u32 magic_num; ++ u32 img_length; ++ u32 img_type; ++}; ++ ++int set_cpld_reg(u8 reg_addr, u8 value); ++ulong get_update_intent(u32 type); ++ulong get_flash_region_offset(u32 type); ++ulong get_image_max_size(u32 type); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch new file mode 100644 index 000000000..bd612e691 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch @@ -0,0 +1,112 @@ +From 8fe68fe9b30d1da027281b5468492aa45ca0b052 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Wed, 31 Jul 2019 16:01:49 -0700 +Subject: [PATCH] Reboot into UBOOT on Watchdog Failures + +We use watchdog1 to reboot when there is a watchdog +error. Reboot into u-boot as we are using that as +safe mode. + +Tested: watchdog -T 0 -F /dev/watchdog1 reboots into +uboot after 3 times + +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + .../include/asm/arch-aspeed/ast-g5-intel.h | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 29 +++++++++++++++++++ + common/autoboot.c | 5 ++++ + 3 files changed, 35 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +index a88521a1b3c7..64f4ed17bfd5 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h ++++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +@@ -14,6 +14,7 @@ + + #ifndef __ASSEMBLY__ + int intel_force_firmware_jumper_enabled(void); ++int intel_failed_boot(void); + void start_fw_update_loop(void); + #endif + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 5196a1a41299..6b8395754f00 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -114,7 +114,23 @@ static const GPIOValue gpio_table[] = { + #define HOST_SERIAL_A_HIGH_SPEED (1 << 0) + #define HOST_SERIAL_B_HIGH_SPEED (1 << 1) + ++#define WATCHDOG_RESET_BIT BIT(3) + #define POWERON_RESET_BIT BIT(0) ++#define BOOT_FAILURE_LIMIT 0x3 ++ ++static int get_boot_failures(void) ++{ ++ return getenv_ulong("bootfailures", 10, 0); ++} ++ ++static void set_boot_failures(u32 count) ++{ ++ if (count > BOOT_FAILURE_LIMIT) ++ return; ++ ++ setenv_ulong("bootfailures", count); ++ saveenv(); ++} + + static void sgpio_init(void) + { +@@ -277,6 +293,11 @@ int intel_force_firmware_jumper_enabled(void) + return gpio_get_value(GPIO_FF_UPD_JUMPER); + } + ++int intel_failed_boot(void) ++{ ++ return get_boot_failures() >= BOOT_FAILURE_LIMIT; ++} ++ + void arch_preboot_os(void) + { + // last second before booting... set the LEDs +@@ -452,6 +473,7 @@ void ast_g5_intel_late_init(void) + { + char value[32]; + u32 reset_reason = 0; ++ u32 boot_failures = 0; + + /* By default host serail A and B use normal speed */ + uint32_t host_serial_cfg = 0; +@@ -496,6 +518,13 @@ void ast_g5_intel_late_init(void) + + update_bootargs_cmd("resetreason", value); + ++ boot_failures = get_boot_failures(); ++ ++ if (reset_reason & WATCHDOG_RESET_BIT) ++ set_boot_failures(boot_failures + 1); ++ else ++ set_boot_failures(0); ++ + /* Update the special mode in bootargs */ + if (reset_reason & POWERON_RESET_BIT && is_mfg_mode_phy_req()) + update_bootargs_cmd("special", "mfg"); +diff --git a/common/autoboot.c b/common/autoboot.c +index 393738ce0f4c..35dad222ff7c 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -271,6 +271,11 @@ static int abortboot(int bootdelay) + abort = 1; + goto exit; + } ++ ++ if (intel_failed_boot()) { ++ abort = 1; ++ goto exit; ++ } + # endif + + if (bootdelay >= 0) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0034-Disable-uart-debug-interface.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0034-Disable-uart-debug-interface.patch new file mode 100644 index 000000000..e8cd4179f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0034-Disable-uart-debug-interface.patch @@ -0,0 +1,52 @@ +From aec56ef4f3cf0417a28ddc0719603d54073eee09 Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Tue, 20 Aug 2019 16:10:03 +0800 +Subject: [PATCH] Disable uart debug interface + +AST2500 SOC integrates a UART debug interface which can +input commands to AST2500 by using simple terminal +program without the assistance of CPU. + +For security requirements, we need to disable this feature, +set SCU2C[]10 = 1 to disable it. + +Tested: +Flash the u-boot.bin and dump SCU2C as below: +md 0x1e6e202c +1e6e202c: 00200400 + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + arch/arm/include/asm/arch-aspeed/regs-scu.h | 1 + + board/aspeed/ast-g5/ast-g5-intel.c | 4 ++++ + 2 files changed, 5 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h +index a2c9549fc6..1bdb1d8574 100644 +--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h ++++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h +@@ -468,6 +468,7 @@ + #define SCU_MISC_DIV13_EN (0x1 << 12) + #define SCU_MISC_DEBUG_UART (0x1 << 10) + #define SCU_MISC_Y_CLK_INVERT (0x1 << 11) ++#define SCU_MISC_UART_DEBUG_DIS (0x1 << 10) + #define SCU_MISC_OUT_DELAY (0x1 << 9) + #define SCU_MISC_PCI_TO_AHB_DIS (0x1 << 8) + #define SCU_MISC_2D_CRT_EN (0x1 << 7) +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 12216922ac..e05a6da468 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -589,6 +589,10 @@ extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) + { ++ /* Disable uart port debug function */ ++ ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) | ++ SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL); ++ + uart_init(); + pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch new file mode 100644 index 000000000..eb8fac487 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch @@ -0,0 +1,122 @@ +From 6b62f592434eaadc02057c0d35c3b79982f555bc Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Thu, 5 Sep 2019 15:03:21 +0530 +Subject: [PATCH] PFR platform - EXTRST# reset mask selection + +This is a fix taken from Purely PFR. +This commit will enable specific reset mask for EXTRST# signal. +On PFR platforms, EXTRST# signal is used by PFR CPLD to put BMC +in reset during firmware authentications, recovery and firmware +update flow, during which certain modules of BMC should be chosen +to be reset so that Host functionality would be intact. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + .../include/asm/arch-aspeed/ast-g5-intel.h | 31 +++++++++++++++++++ + arch/arm/include/asm/arch-aspeed/regs-scu.h | 29 +++++++++++++++++ + board/aspeed/ast-g5/ast-g5-intel.c | 9 ++++++ + 3 files changed, 69 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +index 64f4ed17bf..b9386b2cf6 100644 +--- a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h ++++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h +@@ -12,6 +12,37 @@ + + #define AST_G5_INTEL 1 + ++/* EXTRST# mask for PFR platform ++ * EXTRST# is used by PFR CPLD to keep BMC in ++ * reset during firmware authentication, updates and recovery ++ * this mask selects the modules to be reset along with BMC so that ++ * Host functions are intact. ++ * (this is fix from Purley PFR ) ++ */ ++#define AST_WDT_RESET_MASK ( \ ++ WDT_RESET_MASK_SPI | \ ++ WDT_RESET_MASK_XDMA | \ ++ WDT_RESET_MASK_MCTP | \ ++ WDT_RESET_MASK_ADC | \ ++ WDT_RESET_MASK_JTAG | \ ++ WDT_RESET_MASK_PECI | \ ++ WDT_RESET_MASK_CRT | \ ++ WDT_RESET_MASK_MIC | \ ++ WDT_RESET_MASK_SDIO | \ ++ WDT_RESET_MASK_HAC | \ ++ WDT_RESET_MASK_VIDEO | \ ++ WDT_RESET_MASK_HID11 | \ ++ WDT_RESET_MASK_USB11 | \ ++ WDT_RESET_MASK_USB20 | \ ++ WDT_RESET_MASK_GRAPHICS | \ ++ WDT_RESET_MASK_MAC2 | \ ++ WDT_RESET_MASK_MAC1 | \ ++ WDT_RESET_MASK_I2C | \ ++ WDT_RESET_MASK_AHB | \ ++ WDT_RESET_MASK_COPROC | \ ++ WDT_RESET_MASK_ARM | \ ++ 0) ++ + #ifndef __ASSEMBLY__ + int intel_force_firmware_jumper_enabled(void); + int intel_failed_boot(void); +diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h +index 1bdb1d8574..0a4fb6f773 100644 +--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h ++++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h +@@ -144,6 +144,35 @@ + #define SCU_RESET_AHB (0x1 << 1) + #define SCU_RESET_SRAM_CTRL (0x1 << 0) + ++/* AST_WDT/EXTRST - 0x9C selection masks */ ++#define WDT_RESET_MASK_MISC (1 << 25) /* Misc. SOC controller (WDT, RTC, Timer, UART, SRAM.) */ ++#define WDT_RESET_MASK_SPI (1 << 24) /* SPI controller */ ++#define WDT_RESET_MASK_XDMA (1 << 23) /* X-DMA controller */ ++#define WDT_RESET_MASK_MCTP (1 << 22) /* MCTP controller */ ++#define WDT_RESET_MASK_GPIO (1 << 21) /* GPIO controller */ ++#define WDT_RESET_MASK_ADC (1 << 20) /* ADC controller */ ++#define WDT_RESET_MASK_JTAG (1 << 19) /* JTAG master controller */ ++#define WDT_RESET_MASK_PECI (1 << 18) /* PECI controller */ ++#define WDT_RESET_MASK_PWM (1 << 17) /* PWM controller */ ++#define WDT_RESET_MASK_CRT (1 << 16) /* CRT mode 2D engine */ ++#define WDT_RESET_MASK_MIC (1 << 15) /* MIC controller */ ++#define WDT_RESET_MASK_SDIO (1 << 14) /* SD/SDIO controller */ ++#define WDT_RESET_MASK_LPC (1 << 13) /* LPC controller */ ++#define WDT_RESET_MASK_HAC (1 << 12) /* HAC engine */ ++#define WDT_RESET_MASK_VIDEO (1 << 11) /* Video engine */ ++#define WDT_RESET_MASK_HID11 (1 << 10) /* USB1.1 HID/USB2.0 Host EHCI2 controller */ ++#define WDT_RESET_MASK_USB11 (1 << 9) /* USB1.1 Host controller */ ++#define WDT_RESET_MASK_USB20 (1 << 8) /* USB2.0 Host/Hub controller */ ++#define WDT_RESET_MASK_GRAPHICS (1 << 7) /* Graphics CRT controller */ ++#define WDT_RESET_MASK_MAC2 (1 << 6) /* MAC#2 controller */ ++#define WDT_RESET_MASK_MAC1 (1 << 5) /* MAC#1 controller */ ++#define WDT_RESET_MASK_I2C (1 << 4) /* I2C controller */ ++#define WDT_RESET_MASK_AHB (1 << 3) /* AHB bridges */ ++#define WDT_RESET_MASK_SDRAM (1 << 2) /* SDRAM controller */ ++#define WDT_RESET_MASK_COPROC (1 << 1) /* Coprocessor */ ++#define WDT_RESET_MASK_ARM (1 << 0) /* ARM */ ++#define WDT_RESET_MASK_ALL 0x03ffffff /* all the bits above: 0-25*/ ++ + /* AST_SCU_RESET2 0xD4 - Reset Control register set 2 */ + #define SCU_RESET_CRT3 (0x1 << 8) + #define SCU_RESET_CRT2 (0x1 << 7) +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 6a36cfa2ba..2d260a7759 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -661,6 +661,15 @@ extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) + { ++ /* EXTRST# mask for PFR platform ++ * EXTRST# is used by PFR CPLD to keep BMC in ++ * reset during firmware authentication, updates and recovery ++ * this mask selects the modules to be reset along with BMC so that ++ * Host functions are intact. ++ * (this is fix from Purley PFR ) ++ */ ++ ast_scu_write(AST_WDT_RESET_MASK, AST_SCU_WDT_RESET); ++ + /* Disable uart port debug function */ + ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) | + SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0036-Re-Enable-KCS.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0036-Re-Enable-KCS.patch new file mode 100644 index 000000000..90eb41627 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0036-Re-Enable-KCS.patch @@ -0,0 +1,33 @@ +From 6e3928154538f8935d9d6379e3db40daeb1aedcf Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Thu, 19 Sep 2019 10:15:19 -0700 +Subject: [PATCH] Re-Enable KCS + +Phosphor-isolation isolates too much and seems to +make KCS not work. This removes the lines from that +patch that seem to be of question. + +Tested: AC/Cycled, ipmitool raw 6 1 works + +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + board/aspeed/ast-g5/ast-g5.c | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index ead2e1bb63..00bd92ae5f 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -41,11 +41,6 @@ int board_init(void) + bool sdmc_unlocked; + u32 val; + +- /* iLPC2AHB */ +- val = readl(AST_SCU_BASE + AST_SCU_HW_STRAP1); +- val |= SCU_HW_STRAP_LPC_DEC_SUPER_IO; +- writel(val, AST_SCU_BASE + AST_SCU_HW_STRAP1); +- + val = readl(AST_LPC_BASE + AST_LPC_HICRB); + val |= LPC_HICRB_ILPC2AHB; + writel(val, AST_LPC_BASE + AST_LPC_HICRB); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0037-aspeed-ast-scu.c-fix-MAC1LINK-and-MAC2LINK-pin-pads-.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0037-aspeed-ast-scu.c-fix-MAC1LINK-and-MAC2LINK-pin-pads-.patch new file mode 100644 index 000000000..eaaa0075b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0037-aspeed-ast-scu.c-fix-MAC1LINK-and-MAC2LINK-pin-pads-.patch @@ -0,0 +1,78 @@ +From 07a269d7873c77c372acbd4ccf83612e14f05404 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 4 Oct 2019 15:54:43 -0700 +Subject: [PATCH] aspeed/ast-scu.c: fix MAC1LINK and MAC2LINK pin pads setting + +Intel platforms don't use these pins as PHY link monitoring inputs +so this commit disables them in SCU pin control register so that +the pins can be used as GPIOs. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + arch/arm/mach-aspeed/ast-scu.c | 37 +++++++++------------------------- + 1 file changed, 9 insertions(+), 28 deletions(-) + +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 537cd4b3e1..28c48c1154 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -419,49 +419,30 @@ void ast_scu_multi_func_eth(u8 num) + { + switch (num) { + case 0: +- if (ast_scu_read(AST_SCU_HW_STRAP1) & SCU_HW_STRAP_MAC0_RGMII) { ++ if (ast_scu_read(AST_SCU_HW_STRAP1) & SCU_HW_STRAP_MAC0_RGMII) + printf("MAC0 : RGMII\n"); +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | +- SCU_FUN_PIN_MAC0_PHY_LINK, +- AST_SCU_FUN_PIN_CTRL1); +- } else { ++ else + printf("MAC0 : RMII/NCSI\n"); +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) & +- ~SCU_FUN_PIN_MAC0_PHY_LINK, +- AST_SCU_FUN_PIN_CTRL1); +- } +- +-#ifdef AST_SOC_G5 +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | +- SCU_FUN_PIN_MAC0_PHY_LINK, AST_SCU_FUN_PIN_CTRL1); + +-#endif ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) & ++ ~SCU_FUN_PIN_MAC0_PHY_LINK, ++ AST_SCU_FUN_PIN_CTRL1); + ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL3) | + SCU_FUN_PIN_MAC0_MDIO | SCU_FUN_PIN_MAC0_MDC, + AST_SCU_FUN_PIN_CTRL3); +- + break; + case 1: +- if (ast_scu_read(AST_SCU_HW_STRAP1) & SCU_HW_STRAP_MAC1_RGMII) { ++ if (ast_scu_read(AST_SCU_HW_STRAP1) & SCU_HW_STRAP_MAC1_RGMII) + printf("MAC1 : RGMII\n"); +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | +- SCU_FUN_PIN_MAC1_PHY_LINK, +- AST_SCU_FUN_PIN_CTRL1); +- } else { ++ else + printf("MAC1 : RMII/NCSI\n"); +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) & +- ~SCU_FUN_PIN_MAC1_PHY_LINK, +- AST_SCU_FUN_PIN_CTRL1); +- } + +- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) | +- SCU_FUN_PIN_MAC1_PHY_LINK, ++ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL1) & ++ ~SCU_FUN_PIN_MAC1_PHY_LINK, + AST_SCU_FUN_PIN_CTRL1); +- + ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL5) | + SCU_FUC_PIN_MAC1_MDIO, + AST_SCU_FUN_PIN_CTRL5); +- + break; + } + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0038-Increase-default-fan-speed-for-cooper-city.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0038-Increase-default-fan-speed-for-cooper-city.patch new file mode 100644 index 000000000..eea9e035a --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0038-Increase-default-fan-speed-for-cooper-city.patch @@ -0,0 +1,131 @@ +From 5861b964317bb52defb30215efff52fab5e11df4 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Thu, 24 Oct 2019 14:39:22 -0700 +Subject: [PATCH] Increase default fan speed for cooper city + +This increases the uboot fan speed for cooper city +as it has high core count CPUS. + +Tested: In uboot fans appeared to run faster + +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + board/aspeed/ast-g5/ast-g5-gpio.h | 6 ++++ + board/aspeed/ast-g5/ast-g5-intel.c | 46 ++++++++++++++++++++++++++++++ + 2 files changed, 52 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h +index 8ccf4373460b..7f0c06d88f5a 100644 +--- a/board/aspeed/ast-g5/ast-g5-gpio.h ++++ b/board/aspeed/ast-g5/ast-g5-gpio.h +@@ -71,9 +71,15 @@ + #define ID_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_6) + #define GRN_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_4) + #define AMB_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_5) ++#define PLATFORM_ID0_PORT_PIN PORT_PIN(GPIO_PORT_B, GPIO_PIN_0) ++#define PLATFORM_ID1_PORT_PIN PORT_PIN(GPIO_PORT_B, GPIO_PIN_1) ++#define PLATFORM_ID2_PORT_PIN PORT_PIN(GPIO_PORT_B, GPIO_PIN_2) ++#define PLATFORM_ID3_PORT_PIN PORT_PIN(GPIO_PORT_B, GPIO_PIN_3) ++#define PLATFORM_ID4_PORT_PIN PORT_PIN(GPIO_PORT_B, GPIO_PIN_4) + #define FORCE_BMC_UPDATE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_0) + #define TPM_EN_PULSE_PORT_PIN PORT_PIN(GPIO_PORT_D, GPIO_PIN_6) + #define FP_PWR_BTN_PORT_PIN PORT_PIN(GPIO_PORT_E, GPIO_PIN_2) ++#define PLATFORM_ID5_PORT_PIN PORT_PIN(GPIO_PORT_G, GPIO_PIN_5) + + // GPIO Configuration Register bits + #define GPCFG_EVENT_TO_SMI (1 << 7) // 1 == enabled +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 5536efde1d43..3a0e15eaac82 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -25,6 +25,12 @@ enum gpio_names { + GPIO_FF_UPD_JUMPER, + GPIO_ENABLE_TPM_PULSE, + GPIO_FP_PWR_BTN, ++ GPIO_PLATFORM_ID_0, ++ GPIO_PLATFORM_ID_1, ++ GPIO_PLATFORM_ID_2, ++ GPIO_PLATFORM_ID_3, ++ GPIO_PLATFORM_ID_4, ++ GPIO_PLATFORM_ID_5, + }; + + #define GPIO_CFG_DEFAULT (GPCFG_ACTIVE_HIGH | GPCFG_LEVEL_TRIG) +@@ -63,6 +69,21 @@ static const GPIOValue gpio_table[] = { + [GPIO_FP_PWR_BTN] = {FP_PWR_BTN_PORT_PIN, GPIO_CFG_LOW_INPUT, 0, + GPIO_DEBOUNCE_8MS}, + ++ /* Platform ID Pins */ ++ [GPIO_PLATFORM_ID_0] = {PLATFORM_ID0_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ [GPIO_PLATFORM_ID_1] = {PLATFORM_ID1_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ [GPIO_PLATFORM_ID_2] = {PLATFORM_ID2_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ [GPIO_PLATFORM_ID_3] = {PLATFORM_ID3_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ [GPIO_PLATFORM_ID_4] = {PLATFORM_ID4_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ [GPIO_PLATFORM_ID_5] = {PLATFORM_ID5_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ GPIO_DEBOUNCE_8MS}, ++ ++ + }; + + #define LPC_SNOOP_ADDR 0x80 +@@ -118,6 +139,8 @@ static const GPIOValue gpio_table[] = { + #define POWERON_RESET_BIT BIT(0) + #define BOOT_FAILURE_LIMIT 0x3 + ++#define COOPER_CITY_BOARD_ID 40 ++ + static int get_boot_failures(void) + { + return getenv_ulong("bootfailures", 10, 0); +@@ -298,6 +321,26 @@ int intel_failed_boot(void) + return get_boot_failures() >= BOOT_FAILURE_LIMIT; + } + ++int intel_get_platform_id(void) ++{ ++ int id = 0; ++ int temp = 0; ++ int gpios[] = {GPIO_PLATFORM_ID_0, ++ GPIO_PLATFORM_ID_1, ++ GPIO_PLATFORM_ID_2, ++ GPIO_PLATFORM_ID_3, ++ GPIO_PLATFORM_ID_4, ++ GPIO_PLATFORM_ID_5}; ++ int ii; ++ for (ii = 0; ii < ARRAY_SIZE(gpios); ii++){ ++ temp = gpio_get_value(gpios[ii]); ++ if(temp < 0) ++ return temp; ++ id |= temp << ii; ++ } ++ return id; ++} ++ + void arch_preboot_os(void) + { + // last second before booting... set the LEDs +@@ -325,6 +368,7 @@ void arch_preboot_os(void) + #define PWM_CLK_ENABLE BIT(0) + #define PWM_DUTY(PCT) (((PCT) * 128) / 100) + #define DEFAULT_PWM_DUTY_VALUE PWM_DUTY(57) ++#define ELEVATED_PWM_DUTY_VALUE PWM_DUTY(80) + + + static inline uint32_t ast_scu_read(uint32_t reg) +@@ -626,6 +670,8 @@ void ast_g5_intel(void) + id_led_control(GPIO_GREEN_LED, EIDLED_Off); + id_led_control(GPIO_AMBER_LED, EIDLED_On); + kcs_init(); ++ if (intel_get_platform_id() == COOPER_CITY_BOARD_ID) ++ set_pwm_duty_cycle(ELEVATED_PWM_DUTY_VALUE); + /* TODO: need to stop the booting here. */ + } + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch new file mode 100644 index 000000000..464faa65d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch @@ -0,0 +1,63 @@ +From c749a717d02936b49f6213f8861e3c17b35abf67 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Mon, 27 Jan 2020 15:13:10 -0800 +Subject: [PATCH] Initialize the BMC/host mailbox at reset time + +When the BMC comes out of reset, the mailbox registers need to be set so +the communications with the host can start properly. + +Tested: boot the BMC and take note that the mailbox registers are no + longer random garbage. + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> + +--- + board/aspeed/ast-g5/ast-g5-intel.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 4b017269f9..6c193d8afb 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -629,6 +629,33 @@ static void pwm_init(void) + writel(val, PWM_BASE_ADDR + PWM_CONTROL); + } + ++#define AST_MBX_COUNT 16 ++#define MB_HINIT_BP_REG1 (0) ++#define MB_HINIT_BP_REG2 (1) // reserved for future bit definition. ++#define MB_FW_MJ_VER_REG (2) ++#define MB_FW_MN_VER_REG (3) ++#define MB_HINIT_ERR_REG (4) ++#define MB_BOOTL_BP_REG1 (5) ++#define MB_BOOTL_BP_REG2 (6) // tracks which image selected ++#define MB_BOOTL_ERR_REG (7) ++#define MB_RUNTM_BP_REG1 (8) ++#define MB_RUNTM_BP_REG2 (9) // reserved for future bit definition. ++#define MB_RUNTM_ERR_REG (10) ++static void mailbox_init(void) ++{ ++ /* clear out default mbox values */ ++ int i; ++ for (i = 0; i < AST_MBX_COUNT; i++) ++ { ++ writel(0, AST_MBX_BASE + 4 * i); ++ } ++ /* by the time this is called, all the hardware init is done ++ * so we can mark that as complete */ ++ writel(0xff, AST_MBX_BASE + 4 * MB_HINIT_BP_REG1); ++ /* mark progress up through booting linux */ ++ writel(0x1f, AST_MBX_BASE + 4 * MB_BOOTL_BP_REG1); ++} ++ + extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) +@@ -638,6 +665,7 @@ void ast_g5_intel(void) + SCU_MISC_UART_DEBUG_DIS, AST_SCU_MISC1_CTRL); + + uart_init(); ++ mailbox_init(); + pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0041-Disabling-boot-delay.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0041-Disabling-boot-delay.patch new file mode 100644 index 000000000..69ec33a17 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0041-Disabling-boot-delay.patch @@ -0,0 +1,27 @@ +From e21ee4b456addc93a9afed0cb52ac2a53d3b785a Mon Sep 17 00:00:00 2001 +From: arun-pm <arun.p.m@linux.intel.com> +Date: Thu, 30 Jan 2020 10:32:13 +0530 +Subject: [PATCH] Disabling boot delay + +Boot delay is changed to -2 so that BMC will not stop in u-boot by pressing +ESC key. +--- + include/configs/ast-common.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h +index 0bc7f2d75f..dce6bbf5aa 100644 +--- a/include/configs/ast-common.h ++++ b/include/configs/ast-common.h +@@ -70,7 +70,7 @@ + /* + * Environment Config + */ +-#define CONFIG_BOOTDELAY 2 ++#define CONFIG_BOOTDELAY -2 + + /* + * Miscellaneous configurable options +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch new file mode 100644 index 000000000..944ae4558 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch @@ -0,0 +1,45 @@ +From fd386708fdea5f1c6c0311077907df55a5ac2c3d Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Wed, 18 Mar 2020 21:47:11 +0530 +Subject: [PATCH] PFR- Skip counting WDT2 event when EXTRST# is set + +PFR CPLD drives EXTRST# of BMC to reset it during +firmware update and during recovery. On ast2500 the +EXTRST# is also setting WDT2/3 flags which is counted +as boot failures by u-boot and aborts the boot if +boot failures are more than 3. This change will skip +counting WDT2 flag if EXTRST# is also set in SCU3C. + +Tested: Verified BMC updates 4 times and checked that + the boot is not aborted at u-boot. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +--- + board/aspeed/ast-g5/ast-g5-intel.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 07a180a489f5..7b238b59aba3 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -137,6 +137,7 @@ static const GPIOValue gpio_table[] = { + #define HOST_SERIAL_B_HIGH_SPEED (1 << 1) + + #define WATCHDOG_RESET_BIT BIT(3) ++#define EXTRST_RESET_BIT BIT(1) + #define POWERON_RESET_BIT BIT(0) + #define BOOT_FAILURE_LIMIT 0x3 + +@@ -565,7 +566,8 @@ void ast_g5_intel_late_init(void) + + boot_failures = get_boot_failures(); + +- if (reset_reason & WATCHDOG_RESET_BIT) ++ if ((reset_reason & WATCHDOG_RESET_BIT) && ++ !(reset_reason & EXTRST_RESET_BIT)) + set_boot_failures(boot_failures + 1); + else + set_boot_failures(0); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0044-net-phy-realtek-Change-LED-configuration.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0044-net-phy-realtek-Change-LED-configuration.patch new file mode 100644 index 000000000..fb823bae8 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0044-net-phy-realtek-Change-LED-configuration.patch @@ -0,0 +1,38 @@ +From 70589b01e3284867c77e1d1387bce83b898bd54a Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 5 Jun 2020 15:14:50 -0700 +Subject: [PATCH] net: phy: realtek: Change LED configuration + +This commit changes Realtek NIC port LED configuration like below: +LED0 (Right Green): Link 10/100/1000 +LED1 (Left Orange): Link 10/100 + Blink on Tx/Rx +LED2 (Left Green): Link 1000 + Blink on Tx/Rx + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + drivers/net/phy/realtek.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 7a99cb0234..c15280259c 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -92,10 +92,15 @@ static int rtl8211f_config(struct phy_device *phydev) + MIIM_RTL8211F_PAGE_SELECT, 0x0); + } + +- /* Set green LED for Link, yellow LED for Active */ ++ /* ++ * Set LED configuration ++ * LED0 (Right Grean): Link 10/100/1000 ++ * LED1 (Left Orange): Link 10/100 + Active ++ * LED2 (Left Green): Link 1000 + Active ++ */ + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0xd04); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x626b); + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0x0); + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0045-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0045-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch new file mode 100644 index 000000000..92d11f634 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0045-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch @@ -0,0 +1,80 @@ +From e23fbe6c3867b92b8ba7bfb36e1719348b102399 Mon Sep 17 00:00:00 2001 +From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com> +Date: Thu, 16 Jul 2020 11:02:53 +0530 +Subject: [PATCH] Apply WDT1-2 reset mask to reset needed controller + +Issue: +BMC reset during BIOS serial port access causes BIOS hang. + +Root caused: +BMC resetting the LPC controller during BMC warm reset. +Which cause BIOS hang as BIOS cannot dump the BIOS serial data. + +Fix: +WDT reset mask has been updated from default to proper value, +such that controllers interacting with host will not be reset +during wdt reset operation. +This was missed earlier, causing BIOS to hang whenever BMC resets, +as BIOS was accessing the serial port (LPC controller). +De-coupling LPC controller will make sure BIOS serial port access +is not disturbed. +And also Reset mask is updated not to reset the following +in order to avoid the host hang. +1. SDRAM controller +2. AHB Bridges +3. Graphics CRT controller +4. LPC controller +5. CRT mode 2D Engine +6. PWM controller +7. MCTP Controller +8. X- DMA Controller +9. SPI controller + +Quick Step to reproduce: + Stop the BMC in uboot and add below bootcmd command + setenv bootcmd "reset" + Do the System power ON or System warm reset. + + For WDT2: + boot the BMC and ran the /usr/bin/watch_dog_reset.sh + Do the System Power ON or System warm reset. + +Tested: + 1. Ran overnight continous BIOS and BMC warm reset on two SUTs. + + 2.Ran the TestApp which dump the BIOS serial port continously and + do the BMC reset. + + 3.Stop the BMC in uboot and add below bootcmd command + setenv bootcmd "reset" + Do the System Power ON or System warm reset. + + 4.Ran Over night AC cycle test. Completed +1000 in two systems. + + 5.Stopped at u-boot. + Issue protect off all command + Issue erase all command. + BMC should not hang and able to complete the "erase all" command + +Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com> + +--- + arch/arm/mach-aspeed/platform_g5.S | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S +index b4043534b0..f221c97b19 100644 +--- a/arch/arm/mach-aspeed/platform_g5.S ++++ b/arch/arm/mach-aspeed/platform_g5.S +@@ -366,7 +366,10 @@ init_dram: + and r1, r1, #0x01 + str r1, [r0] + ldr r0, =0x1e78501c @ restore normal mask setting +- ldr r1, =0x023FFFF3 @ added 2016.09.06 ++ ldr r1, =0x023CDF73 @ Changed 2020.06.18 ++ str r1, [r0] ++ ldr r0, =0x1e78503c @ restore normal mask setting ++ ldr r1, =0x023CDF73 @ Changed 2020.07.08 + str r1, [r0] + b bypass_first_reset + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0046-Enable-FMC-DMA-for-memmove.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0046-Enable-FMC-DMA-for-memmove.patch new file mode 100644 index 000000000..547754996 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0046-Enable-FMC-DMA-for-memmove.patch @@ -0,0 +1,149 @@ +From da1a1d60346118e6d05efc39c8899f590b483a25 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 19 Jun 2020 16:30:47 -0700 +Subject: [PATCH] Enable FMC DMA for memmove + +This commit enables FMC DMA for memmove so that kernel loading can be +completed quickly. + +Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + arch/arm/mach-aspeed/Makefile | 2 +- + arch/arm/mach-aspeed/utils.S | 53 +++++++++++++++++++++++++++++++++++ + lib/Kconfig | 6 ++++ + lib/string.c | 12 +++++++- + 4 files changed, 71 insertions(+), 2 deletions(-) + create mode 100644 arch/arm/mach-aspeed/utils.S + +diff --git a/arch/arm/mach-aspeed/Makefile b/arch/arm/mach-aspeed/Makefile +index 7d8930beb9..b9fcf41d8c 100644 +--- a/arch/arm/mach-aspeed/Makefile ++++ b/arch/arm/mach-aspeed/Makefile +@@ -11,7 +11,7 @@ + # + + +-obj-y += timer.o reset.o cpuinfo.o ast-scu.o ast-ahbc.o ast-sdmc.o ++obj-y += timer.o reset.o cpuinfo.o ast-scu.o ast-ahbc.o ast-sdmc.o utils.o + obj-$(CONFIG_AST_SPI_NOR) += flash.o + obj-$(CONFIG_ARCH_AST2500) += platform_g5.o + obj-$(CONFIG_ARCH_AST2400) += platform_g4.o +diff --git a/arch/arm/mach-aspeed/utils.S b/arch/arm/mach-aspeed/utils.S +new file mode 100644 +index 0000000000..a06d72552e +--- /dev/null ++++ b/arch/arm/mach-aspeed/utils.S +@@ -0,0 +1,53 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) ASPEED Technology Inc. ++ * Chia-Wei Wang <chiawei_wang@aspeedtech.com> ++ */ ++ ++#include <config.h> ++#include <asm/armv7.h> ++#include <linux/linkage.h> ++ ++#define AST_FMC_BASE (0x1E620000) ++#define AST_FMC_INT_CTRL_STAT (AST_FMC_BASE + 0x008) ++#define AST_FMC_DMA_CTRL (AST_FMC_BASE + 0x080) ++#define AST_FMC_DMA_FLASH_ADDR (AST_FMC_BASE + 0x084) ++#define AST_FMC_DMA_DRAM_ADDR (AST_FMC_BASE + 0x088) ++#define AST_FMC_DMA_LENGTH (AST_FMC_BASE + 0x08C) ++ ++/* ++ * void aspeed_spi_fastcpy(u32 mem_addr, u32 spi_addr, u32 count) ++ * ++ * perform FMC SPI DMA to speed up flash copy. ++ * @dst: destination memory address ++ * @src: source SPI address ++ * @count: number of bytes to be copied, 4-byte aligned ++ * ++ * NOTE that the caller must ensure the validity of parameters. ++ */ ++ENTRY(aspeed_spi_fastcpy) ++ ldr r3, =AST_FMC_DMA_DRAM_ADDR ++ str r0, [r3] ++ ++ ldr r3, =AST_FMC_DMA_FLASH_ADDR ++ str r1, [r3] ++ ++ ldr r3, =AST_FMC_DMA_LENGTH ++ str r2, [r3] ++ ++ ldr r0, =AST_FMC_DMA_CTRL ++ mov r1, #1 ++ str r1, [r0] ++ ++ ldr r0, =AST_FMC_INT_CTRL_STAT ++polling: ++ ldr r1, [r0] ++ tst r1, #(1 << 11) ++ beq polling ++ ++ ldr r0, =AST_FMC_DMA_CTRL ++ mov r1, #0 ++ str r1, [r0] ++ ++ mov pc, lr ++ENDPROC(aspeed_spi_fastcpy) +diff --git a/lib/Kconfig b/lib/Kconfig +index 02ca4058d3..8c8fde6b1b 100644 +--- a/lib/Kconfig ++++ b/lib/Kconfig +@@ -149,6 +149,12 @@ config SPL_OF_LIBFDT + particular compatible nodes. The library operates on a flattened + version of the device tree. + ++config ASPEED_FMC_DMA ++ bool "Enable Aspeed SPI DMA" ++ default n ++ help ++ This enables fast memmove using FMC DMA on Aspeed SoCs. ++ + source lib/efi/Kconfig + source lib/efi_loader/Kconfig + +diff --git a/lib/string.c b/lib/string.c +index 0bf472f1f6..f95b8e478f 100644 +--- a/lib/string.c ++++ b/lib/string.c +@@ -15,11 +15,12 @@ + * reentrant and should be faster). Use only strsep() in new code, please. + */ + ++#include <config.h> + #include <linux/types.h> + #include <linux/string.h> + #include <linux/ctype.h> + #include <malloc.h> +- ++#include <common.h> + + /** + * strncasecmp - Case insensitive, length-limited string comparison +@@ -497,6 +498,7 @@ void * memcpy(void *dest, const void *src, size_t count) + #endif + + #ifndef __HAVE_ARCH_MEMMOVE ++extern void aspeed_spi_fastcpy(u32 mem_addr, u32 spi_addr, u32 count); + /** + * memmove - Copy one area of memory to another + * @dest: Where to copy to +@@ -520,6 +522,14 @@ void *memmove(void *dest, const void *src, size_t count) + if (src == dest || !count) + return dest; + ++#ifdef CONFIG_ASPEED_FMC_DMA ++ if ((u32)src >= AST_FMC_CS0_BASE && (u32)src < AST_SPI0_CS0_BASE) { ++ count = ((count + 3) / 4) * 4; ++ aspeed_spi_fastcpy((u32)dest, (u32)src, (u32)count); ++ return dest; ++ } ++#endif ++ + if (unaligned_src || unaligned_dst) { + if (unaligned_dst != unaligned_src) { + unaligned_header = count; diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0047-ast2500-parse-reset-reason.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0047-ast2500-parse-reset-reason.patch new file mode 100644 index 000000000..a21fb00dd --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0047-ast2500-parse-reset-reason.patch @@ -0,0 +1,63 @@ +From 079424a954cf0c697b65492a2d6a38f1938fe1bf Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Tue, 7 Jul 2020 13:41:48 +0800 +Subject: [PATCH] ast2500: parse reset reason. + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> + +--- + arch/arm/mach-aspeed/ast-scu.c | 39 +++++++++++++++++++++++++++++++++- + 1 file changed, 38 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c +index 28c48c1154..ff90c0fc7e 100644 +--- a/arch/arm/mach-aspeed/ast-scu.c ++++ b/arch/arm/mach-aspeed/ast-scu.c +@@ -596,9 +596,46 @@ void ast_scu_security_info(void) + void ast_scu_sys_rest_info(void) + { + u32 rest = ast_scu_read(AST_SCU_SYS_CTRL); ++ bool unknown_flag = true; + + #ifdef AST_SOC_G5 +- printf("RST : 0x%02x\n", rest); ++ printf("RST : 0x%02x (", rest); ++ if (rest & SCU_SYS_EXT_RESET_FLAG) { ++ unknown_flag = false; ++ printf("External"); ++ } ++ if (rest & SCU_SYS_WDT_RESET_FLAG) { ++ if (unknown_flag) ++ printf("WDT1"); ++ else ++ printf("|WDT1"); ++ unknown_flag = false; ++ } ++ if (rest & SCU_SYS_WDT2_RESET_FLAG) { ++ if (unknown_flag) ++ printf("WDT2"); ++ else ++ printf("|WDT2"); ++ unknown_flag = false; ++ } ++ if (rest & SCU_SYS_WDT3_RESET_FLAG) { ++ if (unknown_flag) ++ printf("WDT3"); ++ else ++ printf("|WDT3"); ++ unknown_flag = false; ++ } ++ if (rest & SCU_SYS_PWR_RESET_FLAG) { ++ if (unknown_flag) ++ printf("Power On"); ++ else ++ printf("|Power On"); ++ unknown_flag = false; ++ } ++ if (unknown_flag) { ++ printf("Unknown"); ++ } ++ printf(")\n"); + #else + if (rest & SCU_SYS_EXT_RESET_FLAG) { + printf("RST : External\n"); diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0048-Add-WDT-to-u-boot-to-cover-booting-failures.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0048-Add-WDT-to-u-boot-to-cover-booting-failures.patch new file mode 100644 index 000000000..f6b3fefcf --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0048-Add-WDT-to-u-boot-to-cover-booting-failures.patch @@ -0,0 +1,270 @@ +From 18e6251fbd3b58069d2b3d7097e5c24b70b42bf9 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 14 Sep 2020 17:38:28 -0700 +Subject: [PATCH] Add WDT to u-boot to cover booting failures + +This commit enables WDT1 in early booting phase in u-boot to make BMC +reset to cover booting failures. If BMC meet any failure or if +systemd can't initiate watchdog timer service properly, BMC will +be reset by this watchdog. This watchdog will get feeding by +WATCHDOG_RESET macro calls from several points in u-boot loop +code. The early u-boot WD timeout is 5 seconds and kernel booting WD +timeout is 100 seconds. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> + +--- + arch/arm/mach-aspeed/flash.c | 7 +++ + arch/arm/mach-aspeed/platform_g5.S | 78 ++++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-intel.c | 3 ++ + board/aspeed/ast-g5/ast-g5.c | 30 +++++++++++- + common/bootm_os.c | 5 ++ + 5 files changed, 121 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-aspeed/flash.c b/arch/arm/mach-aspeed/flash.c +index d33fb9e0fe..31bbf77e9e 100644 +--- a/arch/arm/mach-aspeed/flash.c ++++ b/arch/arm/mach-aspeed/flash.c +@@ -30,6 +30,7 @@ + #include <asm/byteorder.h> + #include <asm/io.h> + #include <environment.h> ++#include <watchdog.h> + + #include <asm/arch/ast_scu.h> + #include <asm/arch/aspeed.h> +@@ -610,6 +611,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) + } + + putc ('.'); ++#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) ++ WATCHDOG_RESET(); ++#endif + } + } + puts (" done\n"); +@@ -679,6 +683,9 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) + src += count; + cnt -= count; + printf("%c\b", pat[(patcnt++) & 0x03]); ++#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) ++ WATCHDOG_RESET(); ++#endif + } + + reset_flash(info); +diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S +index f221c97b19..e468ed68d6 100644 +--- a/arch/arm/mach-aspeed/platform_g5.S ++++ b/arch/arm/mach-aspeed/platform_g5.S +@@ -582,6 +582,31 @@ espi_early_init_done: + mov r1, #0xAE + str r1, [r0] + ++#ifdef CONFIG_HW_WATCHDOG ++ /* Enable WDT1 to recover u-boot hang */ ++ ldr r0, =0x1e785004 ++ ldr r1, =0x00500000 @ ~5 seconds ++ str r1, [r0] ++ ldr r0, =0x1e785008 ++ ldr r1, =0x00004755 ++ str r1, [r0] ++ ldr r0, =0x1e78500c ++ ldr r1, =0x00000033 ++ str r1, [r0] ++ ++ /* Clear Scratch register Bit 6 to do DDR training again on WDT1 reset */ ++ ldr r0, =0x1e6e203c ++ ldr r1, [r0] ++ tst r1, #(1<<2) ++ beq bypass_scratch_reg_clear ++ ldr r0, =0x1e6e2040 ++ ldr r1, [r0] ++ and r1, r1, #0xFFFFFFBF ++ str r1, [r0] ++ ++bypass_scratch_reg_clear: ++#endif ++ + /* Test - DRAM initial time */ + ldr r0, =0x1e78203c + ldr r1, =0x0000F000 +@@ -2335,6 +2360,13 @@ spi_checksum_wait_0: + ldr r1, [r0] + tst r1, r2 + beq spi_checksum_wait_0 ++ ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x31 @ '1' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + ldr r0, =0x1e620090 + ldr r5, [r0] @ record golden checksum + ldr r0, =0x1e620080 +@@ -2363,6 +2395,13 @@ spi_checksum_wait_1: + ldr r1, [r0] + tst r1, r2 + beq spi_checksum_wait_1 ++ ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + ldr r0, =0x1e620090 + ldr r2, [r0] @ read checksum + ldr r0, =0x1e620080 +@@ -2377,6 +2416,13 @@ spi_checksum_wait_2: + ldr r1, [r0] + tst r1, r2 + beq spi_checksum_wait_2 ++ ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + ldr r0, =0x1e620090 + ldr r2, [r0] @ read checksum + ldr r0, =0x1e620080 +@@ -2394,6 +2440,12 @@ spi_cbr_next_delay_e: + blt spi_cbr_next_delay_s + b spi_cbr_next_clkrate + ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + spi_cbr_end: + ldr r0, =0x1e620094 + str r8, [r0] +@@ -2401,6 +2453,16 @@ spi_cbr_end: + mov r1, #0x0 + str r1, [r0] + ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x32 @ '2' ++ str r1, [r0] ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + /****************************************************************************** + Miscellaneous Setting + ******************************************************************************/ +@@ -2447,6 +2509,16 @@ spi_cbr_end: + mov r1, #0 + str r1, [r0] + ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x33 @ '3' ++ str r1, [r0] ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++ mov r1, #0x2E @ '.' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + /****************************************************************************** + Configure MAC timing + ******************************************************************************/ +@@ -2535,6 +2607,12 @@ set_D2PLL: + ldr r1, =0xEA + str r1, [r0] + ++/* Debug - UART console message */ ++ ldr r0, =0x1e784000 ++ mov r1, #0x34 @ '4' ++ str r1, [r0] ++/* Debug - UART console message */ ++ + /* restore lr */ + mov lr, r4 + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index 6c193d8afb..6e43b74bc4 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -673,6 +673,9 @@ void ast_g5_intel(void) + timer8_init(); + enable_onboard_tpm(); + if (intel_force_firmware_jumper_enabled()) { ++#ifdef CONFIG_HW_WATCHDOG ++ hw_watchdog_disable(); ++#endif + /* FFUJ mode:- ChassisID: Solid Blue, StatusLED: Solid Amber */ + id_led_control(GPIO_ID_LED, EIDLED_On); + id_led_control(GPIO_GREEN_LED, EIDLED_Off); +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 00bd92ae5f..3f27503bce 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -125,9 +125,35 @@ int board_eth_init(bd_t *bd) + + /* Called by macro WATCHDOG_RESET */ + #if defined(CONFIG_HW_WATCHDOG) ++#define AST_WDT_COUNTER_STATUS 0x00 ++#define AST_WDT_COUNTER_RELOAD_VALUE 0x04 ++#define AST_WDT_COUNTER_RESTART_CTRL 0x08 ++#define AST_WDT_RESTART_VALUE 0x4755 ++#define AST_WDT_CTRL 0x0c ++#define AST_WDT_EN_1MHZ_CLK BIT(4) ++#define AST_WDT_SYS_RESET BIT(1) ++#define AST_WDT_ENABLE BIT(0) ++#define AST_WDT_TIMEOUT_DEFAULT 0x6000000 /* ~100 seconds */ + void hw_watchdog_reset(void) + { +- /* Restart WD2 timer */ +- writel(0x4755, AST_WDT2_BASE + 0x08); ++ /* Restart WDT1 */ ++ writel(AST_WDT_RESTART_VALUE, ++ AST_WDT1_BASE + AST_WDT_COUNTER_RESTART_CTRL); ++} ++ ++void hw_watchdog_init(void) ++{ ++ writel(0, AST_WDT1_BASE + AST_WDT_CTRL); ++ writel(AST_WDT_TIMEOUT_DEFAULT, ++ AST_WDT1_BASE + AST_WDT_COUNTER_RELOAD_VALUE); ++ writel(AST_WDT_RESTART_VALUE, ++ AST_WDT1_BASE + AST_WDT_COUNTER_RESTART_CTRL); ++ writel(AST_WDT_EN_1MHZ_CLK | AST_WDT_SYS_RESET | AST_WDT_ENABLE, ++ AST_WDT1_BASE + AST_WDT_CTRL); ++} ++ ++void hw_watchdog_disable(void) ++{ ++ writel(0, AST_WDT1_BASE + AST_WDT_CTRL); + } + #endif /* CONFIG_WATCHDOG */ +diff --git a/common/bootm_os.c b/common/bootm_os.c +index b56eb39780..ec0e12ac84 100644 +--- a/common/bootm_os.c ++++ b/common/bootm_os.c +@@ -473,11 +473,16 @@ __weak void arch_preboot_os(void) + /* please define platform specific arch_preboot_os() */ + } + ++extern void hw_watchdog_init(void); ++ + int boot_selected_os(int argc, char * const argv[], int state, + bootm_headers_t *images, boot_os_fn *boot_fn) + { + disable_interrupts(); + arch_preboot_os(); ++#ifdef CONFIG_HW_WATCHDOG ++ hw_watchdog_init(); /* Re-init WDT with 100 seconds timeout */ ++#endif + boot_fn(state, argc, argv, images); + + /* Stand-alone may return when 'autostart' is 'no' */ diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Fix-issue-on-host-console-is-broken-due-to-BMC-reset.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Fix-issue-on-host-console-is-broken-due-to-BMC-reset.patch new file mode 100644 index 000000000..8dfa55733 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0049-Fix-issue-on-host-console-is-broken-due-to-BMC-reset.patch @@ -0,0 +1,122 @@ +From a4a0c281865339c68871e4f62dd21f78504ea60e Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Sun, 27 Sep 2020 17:45:56 +0800 +Subject: [PATCH] Fix issue on host console is broken due to BMC reset by + watchdog. + +obmc-console service changed uart routing to support SOL. +UART routing must be changed to normal, when BMC reset happens, +as BMC reset must be treated as SOL connection closure. +User needs to establish a new SOL connection after BMC reset, +and routing will be initialized for SOL at that time. +Which need several seconds (depends on BMC cycle time), +or even never been recoverred if stopped at u-boot shell. + +error situaton as below: +root@intel-obmc:~# devmem 0x1e78909c +0x03450003 +root@intel-obmc:~# /sbin/watchdog -T 0 -F /dev/watchdog1 + +U-Boot 2016.07 (Aug 25 2020 - 05:24:44 +0000) + +SOC : AST2500-A2 +RST : 0x08 (WDT2) +PLL : 24 MHz +CPU : 792 MHz +MEM : 792 MHz, EEC: Disable, Cache: Disable +VGA : 16 MiB +DRAM : init by SOC + Watchdog enabled +DRAM: 496 MiB +Flash: 64 MiB +In: serial +Out: serial +Err: serial +Un-Protected 1 sectors +Un-Protected 1 sectors +Erasing Flash... +. done +Erased 1 sectors +Writing to Flash... done +Protected 1 sectors +Protected 1 sectors +Net: MAC0 : RMII/NCSI +MAC1 : RGMII +FTGMAC100#0, FTGMAC100#1 +ast# +ast# +ast# md 0x1e78909c +1e78909c: 03450003 ffceff00 19000000 00000000 + +Tested: +u-boot could reset HICRA 0x1e78909c + +correct situation as below: +root@intel-obmc:~# devmem 0x1e78909c +0x03450003 +root@intel-obmc:~# /sbin/watchdog -T 0 -F /dev/watchdog1 + +U-Boot 2016.07 (Sep 27 2020 - 09:34:20 +0000) + +SOC : AST2500-A2 +RST : 0x08 (WDT2) +PLL : 24 MHz +CPU : 792 MHz +MEM : 792 MHz, EEC: Disable, Cache: Disable +VGA : 16 MiB +DRAM : init by SOC + Watchdog enabled +DRAM: 496 MiB +Flash: 64 MiB +In: serial +Out: serial +Err: serial +Un-Protected 1 sectors +Un-Protected 1 sectors +Erasing Flash... +. done +Erased 1 sectors +Writing to Flash... done +Protected 1 sectors +Protected 1 sectors +Net: MAC0 : RMII/NCSI +MAC1 : RGMII +FTGMAC100#0, FTGMAC100#1 +ast# +ast# +ast# md 0x1e78909c +1e78909c: 00000000 ffceff00 19000000 00000000 + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> + +--- + arch/arm/include/asm/arch-aspeed/regs-lpc.h | 1 + + board/aspeed/ast-g5/ast-g5.c | 3 +++ + 2 files changed, 4 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/regs-lpc.h b/arch/arm/include/asm/arch-aspeed/regs-lpc.h +index b0162ae4f3..b4d3da2906 100644 +--- a/arch/arm/include/asm/arch-aspeed/regs-lpc.h ++++ b/arch/arm/include/asm/arch-aspeed/regs-lpc.h +@@ -18,6 +18,7 @@ + */ + + #define AST_LPC_HICR5 0x80 ++#define AST_LPC_HICRA 0x9C + #define AST_LPC_HICRB 0x100 + + /* AST_LPC_HICR5 : 0x80 Host Interface Control Register 5 */ +diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c +index 3f27503bce..6fdc06ad63 100644 +--- a/board/aspeed/ast-g5/ast-g5.c ++++ b/board/aspeed/ast-g5/ast-g5.c +@@ -45,6 +45,9 @@ int board_init(void) + val |= LPC_HICRB_ILPC2AHB; + writel(val, AST_LPC_BASE + AST_LPC_HICRB); + ++ /* Reset UART routing */ ++ writel(0x0, AST_LPC_BASE + AST_LPC_HICRA); ++ + /* P2A, PCIe BMC */ + val = readl(AST_SCU_BASE + AST_SCU_PCIE_CONFIG_SET); + val &= ~(SCU_PCIE_CONFIG_SET_BMC_DMA diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Set-UART-routing-in-lowlevel_init.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Set-UART-routing-in-lowlevel_init.patch new file mode 100644 index 000000000..5a83ee467 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0050-Set-UART-routing-in-lowlevel_init.patch @@ -0,0 +1,43 @@ +From 03487b1de06f1caa4e0bb0597da21f0690125bac Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 26 Apr 2021 13:32:29 -0700 +Subject: [PATCH] Set UART routing in lowlevel_init + +This commit sets the UART routing back to default in lowlevel_init +to prevent any data dropping from the physical host serial until +SOL service is activated. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/platform_g5.S | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S +index 2c8bf03b0eff..7c4722688f90 100644 +--- a/arch/arm/mach-aspeed/platform_g5.S ++++ b/arch/arm/mach-aspeed/platform_g5.S +@@ -111,6 +111,9 @@ + #include <config.h> + #include <version.h> + ++#define AST_LPC_BASE 0x1E789000 ++#define AST_LPC_HICRA (AST_LPC_BASE + 0x09C) ++ + /****************************************************************************** + r4 : return program counter + r5 : DDR speed timing table base address +@@ -2445,6 +2448,11 @@ spi_cbr_end: + orr r1, r1, r2 + str r1, [r0] + ++ /* set UART routing back to default */ ++ ldr r0, =AST_LPC_HICRA ++ ldr r1, =0x0 ++ str r1, [r0] ++ + ldr r0, =0x1e6e2008 @ Set Video ECLK phase + ldr r1, [r0] + ldr r2, =0x0ffffff3 +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch new file mode 100644 index 000000000..05e9ae9c1 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch @@ -0,0 +1,75 @@ +From 6455ab0f57e2a64f4952c6a1cefca1891d582139 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Correct comment for fit_conf_get_node() + +This should mention that conf_uname can be NULL and should be in the +header file. Fix this. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/image-fit.c | 18 ------------------ + include/image.h | 19 +++++++++++++++++++ + 2 files changed, 19 insertions(+), 18 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index 6f920da220..f31e93a364 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -1375,24 +1375,6 @@ int fit_conf_find_compat(const void *fit, const void *fdt) + return best_match_offset; + } + +-/** +- * fit_conf_get_node - get node offset for configuration of a given unit name +- * @fit: pointer to the FIT format image header +- * @conf_uname: configuration node unit name +- * +- * fit_conf_get_node() finds a configuration (within the '/configurations' +- * parent node) of a provided unit name. If configuration is found its node +- * offset is returned to the caller. +- * +- * When NULL is provided in second argument fit_conf_get_node() will search +- * for a default configuration node instead. Default configuration node unit +- * name is retrieved from FIT_DEFAULT_PROP property of the '/configurations' +- * node. +- * +- * returns: +- * configuration node offset when found (>=0) +- * negative number on failure (FDT_ERR_* code) +- */ + int fit_conf_get_node(const void *fit, const char *conf_uname) + { + int noffset, confs_noffset; +diff --git a/include/image.h b/include/image.h +index a16187f874..b05e8552cc 100644 +--- a/include/image.h ++++ b/include/image.h +@@ -908,6 +908,25 @@ int fit_image_check_comp(const void *fit, int noffset, uint8_t comp); + int fit_check_format(const void *fit); + + int fit_conf_find_compat(const void *fit, const void *fdt); ++ ++/** ++ * fit_conf_get_node - get node offset for configuration of a given unit name ++ * @fit: pointer to the FIT format image header ++ * @conf_uname: configuration node unit name (NULL to use default) ++ * ++ * fit_conf_get_node() finds a configuration (within the '/configurations' ++ * parent node) of a provided unit name. If configuration is found its node ++ * offset is returned to the caller. ++ * ++ * When NULL is provided in second argument fit_conf_get_node() will search ++ * for a default configuration node instead. Default configuration node unit ++ * name is retrieved from FIT_DEFAULT_PROP property of the '/configurations' ++ * node. ++ * ++ * returns: ++ * configuration node offset when found (>=0) ++ * negative number on failure (FDT_ERR_* code) ++ */ + int fit_conf_get_node(const void *fit, const char *conf_uname); + + /** diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0002-image-Be-a-little-more-verbose-when-checking-signatu.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0002-image-Be-a-little-more-verbose-when-checking-signatu.patch new file mode 100644 index 000000000..62594c6f3 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0002-image-Be-a-little-more-verbose-when-checking-signatu.patch @@ -0,0 +1,43 @@ +From 0373da3f0baf0f5d90e978b9f735306d06e19d24 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Be a little more verbose when checking signatures + +It is useful to be a little more specific about what is being checked. +Update a few messages to help with this. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/image-fit.c | 2 +- + tools/image-host.c | 3 ++- + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index f31e93a364..8a7c78f4c1 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -1637,7 +1637,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr, + fit_uname = fit_get_name(fit, noffset, NULL); + } + if (noffset < 0) { +- puts("Could not find subimage node\n"); ++ printf("Could not find subimage node type '%s'\n", prop_name); + bootstage_error(bootstage_id + BOOTSTAGE_SUB_SUBNODE); + return -ENOENT; + } +diff --git a/tools/image-host.c b/tools/image-host.c +index 7effb6cea5..01fdec276d 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -717,7 +717,8 @@ int fit_check_sign(const void *fit, const void *key) + if (!cfg_noffset) + return -1; + +- printf("Verifying Hash Integrity ... "); ++ printf("Verifying Hash Integrity for node '%s'... ", ++ fdt_get_name(fit, cfg_noffset, NULL)); + ret = fit_config_verify(fit, cfg_noffset); + if (ret) + return ret; diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0003-image-Return-an-error-message-from-fit_config_verify.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0003-image-Return-an-error-message-from-fit_config_verify.patch new file mode 100644 index 000000000..d0501ff82 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0003-image-Return-an-error-message-from-fit_config_verify.patch @@ -0,0 +1,37 @@ +From ffb95288ea143ca9f76890aebe804067bf327b68 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Return an error message from fit_config_verify_sig() + +This function only returns an error message sometimes. Update it to always +return an error message if one is available. This makes it easier to see +what went wrong. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/image-sig.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/common/image-sig.c b/common/image-sig.c +index eda5e1353a..a664f4a409 100644 +--- a/common/image-sig.c ++++ b/common/image-sig.c +@@ -415,13 +415,14 @@ static int fit_config_verify_sig(const void *fit, int conf_noffset, + goto error; + } + +- return verified ? 0 : -EPERM; ++ if (verified) ++ return 0; + + error: + printf(" error!\n%s for '%s' hash node in '%s' config node\n", + err_msg, fit_get_name(fit, noffset, NULL), + fit_get_name(fit, conf_noffset, NULL)); +- return -1; ++ return -EPERM; + } + + int fit_config_verify_required_sigs(const void *fit, int conf_noffset, diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0007-image-Check-hash-nodes-when-checking-configurations.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0007-image-Check-hash-nodes-when-checking-configurations.patch new file mode 100644 index 000000000..1a2eba2e1 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0007-image-Check-hash-nodes-when-checking-configurations.patch @@ -0,0 +1,95 @@ +From c77be61073581f8009a9b8bf8960f5c1ad621d63 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Check hash-nodes when checking configurations + +It is currently possible to use a different configuration's signature and +thus bypass the configuration check. Make sure that the configuration node +that was hashed matches the one being checked, to catch this problem. + +Also add a proper function comment to fit_config_check_sig() and make it +static. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/image-sig.c | 36 +++++++++++++++++++++++++++++++++--- + 1 file changed, 33 insertions(+), 3 deletions(-) + +diff --git a/common/image-sig.c b/common/image-sig.c +index a664f4a409..057d654c17 100644 +--- a/common/image-sig.c ++++ b/common/image-sig.c +@@ -283,20 +283,39 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset, + return 0; + } + +-int fit_config_check_sig(const void *fit, int noffset, int required_keynode, +- char **err_msgp) ++/** ++ * fit_config_check_sig() - Check the signature of a config ++ * ++ * @fit: FIT to check ++ * @noffset: Offset of configuration node (e.g. /configurations/conf-1) ++ * @required_keynode: Offset in the control FDT of the required key node, ++ * if any. If this is given, then the configuration wil not ++ * pass verification unless that key is used. If this is ++ * -1 then any signature will do. ++ * @conf_noffset: Offset of the configuration subnode being checked (e.g. ++ * /configurations/conf-1/kernel) ++ * @err_msgp: In the event of an error, this will be pointed to a ++ * help error string to display to the user. ++ * @return 0 if all verified ok, <0 on error ++ */ ++static int fit_config_check_sig(const void *fit, int noffset, ++ int required_keynode, int conf_noffset, ++ char **err_msgp) + { + char * const exc_prop[] = {"data"}; + const char *prop, *end, *name; + struct image_sign_info info; + const uint32_t *strings; ++ const char *config_name; + uint8_t *fit_value; + int fit_value_len; ++ bool found_config; + int max_regions; + int i, prop_len; + char path[200]; + int count; + ++ config_name = fit_get_name(fit, conf_noffset, NULL); + debug("%s: fdt=%p, conf='%s', sig='%s'\n", __func__, gd_fdt_blob(), + fit_get_name(fit, noffset, NULL), + fit_get_name(gd_fdt_blob(), required_keynode, NULL)); +@@ -332,9 +351,20 @@ int fit_config_check_sig(const void *fit, int noffset, int required_keynode, + char *node_inc[count]; + + debug("Hash nodes (%d):\n", count); ++ found_config = false; + for (name = prop, i = 0; name < end; name += strlen(name) + 1, i++) { + debug(" '%s'\n", name); + node_inc[i] = (char *)name; ++ if (!strncmp(FIT_CONFS_PATH, name, strlen(FIT_CONFS_PATH)) && ++ name[sizeof(FIT_CONFS_PATH) - 1] == '/' && ++ !strcmp(name + sizeof(FIT_CONFS_PATH), config_name)) { ++ debug(" (found config node %s)", config_name); ++ found_config = true; ++ } ++ } ++ if (!found_config) { ++ *err_msgp = "Selected config not in hashed nodes"; ++ return -1; + } + + /* +@@ -399,7 +429,7 @@ static int fit_config_verify_sig(const void *fit, int conf_noffset, + if (!strncmp(name, FIT_SIG_NODENAME, + strlen(FIT_SIG_NODENAME))) { + ret = fit_config_check_sig(fit, noffset, sig_offset, +- &err_msg); ++ conf_noffset, &err_msg); + if (ret) { + puts("- "); + } else { diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch new file mode 100644 index 000000000..460615410 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch @@ -0,0 +1,49 @@ +From b8e5bf59f37db05fbb21832117351bd6bdda3afd Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Load the correct configuration in fit_check_sign + +At present bootm_host_load_images() is passed the configuration that has +been verified, but ignores it and just uses the default configuration. +This may not be the same. + +Update this function to use the selected configuration. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/bootm.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/common/bootm.c b/common/bootm.c +index 46909ecdbb..b39fd60c8c 100644 +--- a/common/bootm.c ++++ b/common/bootm.c +@@ -894,7 +894,8 @@ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) + memmove(to, from, len); + } + +-static int bootm_host_load_image(const void *fit, int req_image_type) ++static int bootm_host_load_image(const void *fit, int req_image_type, ++ int cfg_noffset) + { + const char *fit_uname_config = NULL; + ulong data, len; +@@ -906,6 +907,7 @@ static int bootm_host_load_image(const void *fit, int req_image_type) + void *load_buf; + int ret; + ++ fit_uname_config = fdt_get_name(fit, cfg_noffset, NULL); + memset(&images, '\0', sizeof(images)); + images.verify = 1; + noffset = fit_image_load(&images, (ulong)fit, +@@ -950,7 +952,7 @@ int bootm_host_load_images(const void *fit, int cfg_noffset) + for (i = 0; i < ARRAY_SIZE(image_types); i++) { + int ret; + +- ret = bootm_host_load_image(fit, image_types[i]); ++ ret = bootm_host_load_image(fit, image_types[i], cfg_noffset); + if (!err && ret && ret != -ENOENT) + err = ret; + } diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch new file mode 100644 index 000000000..4f151f84e --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch @@ -0,0 +1,99 @@ +From ef74a120215a65d34b4c4658327049c7a7ac5bea Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] fit_check_sign: Allow selecting the configuration to verify + +This tool always verifies the default configuration. It is useful to be +able to verify a specific one. Add a command-line flag for this and plumb +the logic through. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + tools/fdt_host.h | 3 ++- + tools/fit_check_sign.c | 8 ++++++-- + tools/image-host.c | 6 ++++-- + 3 files changed, 12 insertions(+), 5 deletions(-) + +diff --git a/tools/fdt_host.h b/tools/fdt_host.h +index 134d965713..4eceab19dd 100644 +--- a/tools/fdt_host.h ++++ b/tools/fdt_host.h +@@ -11,6 +11,7 @@ + #include "../include/libfdt.h" + #include "../include/fdt_support.h" + +-int fit_check_sign(const void *working_fdt, const void *key); ++int fit_check_sign(const void *fit, const void *key, ++ const char *fit_uname_config); + + #endif /* __FDT_HOST_H__ */ +diff --git a/tools/fit_check_sign.c b/tools/fit_check_sign.c +index d9361b0095..e9a489db39 100644 +--- a/tools/fit_check_sign.c ++++ b/tools/fit_check_sign.c +@@ -42,6 +42,7 @@ int main(int argc, char **argv) + void *fit_blob; + char *fdtfile = NULL; + char *keyfile = NULL; ++ char *config_name = NULL; + char cmdname[256]; + int ret; + void *key_blob; +@@ -49,7 +50,7 @@ int main(int argc, char **argv) + + strncpy(cmdname, *argv, sizeof(cmdname) - 1); + cmdname[sizeof(cmdname) - 1] = '\0'; +- while ((c = getopt(argc, argv, "f:k:")) != -1) ++ while ((c = getopt(argc, argv, "f:k:c:")) != -1) + switch (c) { + case 'f': + fdtfile = optarg; +@@ -57,6 +58,9 @@ int main(int argc, char **argv) + case 'k': + keyfile = optarg; + break; ++ case 'c': ++ config_name = optarg; ++ break; + default: + usage(cmdname); + break; +@@ -79,7 +83,7 @@ int main(int argc, char **argv) + return EXIT_FAILURE; + + image_set_host_blob(key_blob); +- ret = fit_check_sign(fit_blob, key_blob); ++ ret = fit_check_sign(fit_blob, key_blob, config_name); + if (!ret) { + ret = EXIT_SUCCESS; + fprintf(stderr, "Signature check OK\n"); +diff --git a/tools/image-host.c b/tools/image-host.c +index 01fdec276d..da374eeabf 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -708,12 +708,13 @@ int fit_add_verification_data(const char *keydir, void *keydest, void *fit, + } + + #ifdef CONFIG_FIT_SIGNATURE +-int fit_check_sign(const void *fit, const void *key) ++int fit_check_sign(const void *fit, const void *key, ++ const char *fit_uname_config) + { + int cfg_noffset; + int ret; + +- cfg_noffset = fit_conf_get_node(fit, NULL); ++ cfg_noffset = fit_conf_get_node(fit, fit_uname_config); + if (!cfg_noffset) + return -1; + +@@ -722,6 +723,7 @@ int fit_check_sign(const void *fit, const void *key) + ret = fit_config_verify(fit, cfg_noffset); + if (ret) + return ret; ++ printf("Verified OK, loading images\n"); + ret = bootm_host_load_images(fit, cfg_noffset); + + return ret; diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch new file mode 100644 index 000000000..a04f68fb3 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch @@ -0,0 +1,150 @@ +From dfe95ace84f7bb04b6302fd8f51f8a942a288e40 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Use constants for 'required' and 'key-name-hint' + +These are used in multiple places so update them to use a shared #define. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> + +--- + common/image-fit.c | 6 +++--- + common/image-sig.c | 8 +++++--- + include/image.h | 4 +++- + lib/rsa/rsa-sign.c | 6 +++--- + tools/image-host.c | 6 +++--- + 5 files changed, 17 insertions(+), 13 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index 8a7c78f4c1..322fde728b 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -264,7 +264,7 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + uint8_t *value; + int value_len; + char *algo; +- int required; ++ bool required; + int ret, i; + + debug("%s %s node: '%s'\n", p, type, +@@ -275,8 +275,8 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + return; + } + printf("%s", algo); +- keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); +- required = fdt_getprop(fit, noffset, "required", NULL) != NULL; ++ keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); ++ required = fdt_getprop(fit, noffset, FIT_KEY_REQUIRED, NULL) != NULL; + if (keyname) + printf(":%s", keyname); + if (required) +diff --git a/common/image-sig.c b/common/image-sig.c +index 057d654c17..b497321179 100644 +--- a/common/image-sig.c ++++ b/common/image-sig.c +@@ -156,7 +156,7 @@ static int fit_image_setup_verify(struct image_sign_info *info, + return -1; + } + memset(info, '\0', sizeof(*info)); +- info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info->keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + info->fit = (void *)fit; + info->node_offset = noffset; + info->algo = image_get_sig_algo(algo_name); +@@ -264,7 +264,8 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset, + const char *required; + int ret; + +- required = fdt_getprop(sig_blob, noffset, "required", NULL); ++ required = fdt_getprop(sig_blob, noffset, FIT_KEY_REQUIRED, ++ NULL); + if (!required || strcmp(required, "image")) + continue; + ret = fit_image_verify_sig(fit, image_noffset, data, size, +@@ -473,7 +474,8 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset, + const char *required; + int ret; + +- required = fdt_getprop(sig_blob, noffset, "required", NULL); ++ required = fdt_getprop(sig_blob, noffset, FIT_KEY_REQUIRED, ++ NULL); + if (!required || strcmp(required, "conf")) + continue; + ret = fit_config_verify_sig(fit, conf_noffset, sig_blob, +diff --git a/include/image.h b/include/image.h +index b05e8552cc..2c6ef4de25 100644 +--- a/include/image.h ++++ b/include/image.h +@@ -782,12 +782,14 @@ int bootz_setup(ulong image, ulong *start, ulong *end); + #define FIT_IMAGES_PATH "/images" + #define FIT_CONFS_PATH "/configurations" + +-/* hash/signature node */ ++/* hash/signature/key node */ + #define FIT_HASH_NODENAME "hash" + #define FIT_ALGO_PROP "algo" + #define FIT_VALUE_PROP "value" + #define FIT_IGNORE_PROP "uboot-ignore" + #define FIT_SIG_NODENAME "signature" ++#define FIT_KEY_REQUIRED "required" ++#define FIT_KEY_HINT "key-name-hint" + + /* image node */ + #define FIT_DATA_PROP "data" +diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c +index 5d9716f013..972af6b8a7 100644 +--- a/lib/rsa/rsa-sign.c ++++ b/lib/rsa/rsa-sign.c +@@ -486,8 +486,8 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest) + } + + if (!ret) { +- ret = fdt_setprop_string(keydest, node, "key-name-hint", +- info->keyname); ++ ret = fdt_setprop_string(keydest, node, FIT_KEY_HINT, ++ info->keyname); + } + if (!ret) + ret = fdt_setprop_u32(keydest, node, "rsa,num-bits", bits); +@@ -509,7 +509,7 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest) + info->algo->name); + } + if (info->require_keys) { +- ret = fdt_setprop_string(keydest, node, "required", ++ ret = fdt_setprop_string(keydest, node, FIT_KEY_REQUIRED, + info->require_keys); + } + done: +diff --git a/tools/image-host.c b/tools/image-host.c +index da374eeabf..afeba22a09 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -161,7 +161,7 @@ static int fit_image_setup_sig(struct image_sign_info *info, + + memset(info, '\0', sizeof(*info)); + info->keydir = keydir; +- info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info->keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + info->fit = fit; + info->node_offset = noffset; + info->algo = image_get_sig_algo(algo_name); +@@ -234,7 +234,7 @@ static int fit_image_process_sig(const char *keydir, void *keydest, + free(value); + + /* Get keyname again, as FDT has changed and invalidated our pointer */ +- info.keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info.keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + + /* Write the public key into the supplied FDT file */ + if (keydest && info.algo->add_verify_data(&info, keydest)) { +@@ -605,7 +605,7 @@ static int fit_config_process_sig(const char *keydir, void *keydest, + free(region_prop); + + /* Get keyname again, as FDT has changed and invalidated our pointer */ +- info.keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info.keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + + /* Write the public key into the supplied FDT file */ + if (keydest) { diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/intel.cfg b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/intel.cfg new file mode 100644 index 000000000..e59d585de --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/intel.cfg @@ -0,0 +1,3 @@ +CONFIG_ASPEED_FMC_DMA=y
+CONFIG_NETCONSOLE=n
+CONFIG_CMD_NFS=n
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend new file mode 100644 index 000000000..92d5cf7d8 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend @@ -0,0 +1,91 @@ +COMPATIBLE_MACHINE = "intel-ast2500" +FILESEXTRAPATHS:append:intel-ast2500:= "${THISDIR}/files:" + +# the meta-phosphor layer adds this patch, which conflicts +# with the intel layout for environment +SRC_URI:remove:intel-ast2500 = " file://0001-configs-ast-Add-redundnant-env.patch" + +SRC_URI:append:intel-ast2500 = " \ + file://intel.cfg \ + file://0001-flash-use-readX-writeX-not-udelay.patch \ + file://0002-intel-layout-environment-addr.patch \ + file://0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch \ + file://0005-enable-passthrough-in-uboot.patch \ + file://0006-Add-Aspeed-g5-interrupt-support.patch \ + file://0007-Add-espi-support.patch \ + file://0008-add-sgio-support-for-port80-snoop-post-LEDs.patch \ + file://0009-Add-basic-GPIO-support.patch \ + file://0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch \ + file://0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch \ + file://0012-Add-status-and-ID-LED-support.patch \ + file://0013-aspeed-Add-Pwm-Driver.patch \ + file://0014-Keep-interrupts-enabled-until-last-second.patch \ + file://0015-Rewrite-memmove-to-optimize-on-word-transfers.patch \ + file://0019-u-boot-full-platform-reset-espi-oob-ready.patch \ + file://0020-Enable-PCIe-L1-support.patch \ + file://0020-Add-system-reset-status-support.patch \ + file://0021-Config-host-uart-clock-source-using-environment-vari.patch \ + file://0022-KCS-driver-support-in-uBoot.patch \ + file://0023-Add-TPM-enable-pulse-triggering.patch \ + file://0024-IPMI-command-handler-implementation-in-uboot.patch \ + file://0025-Manufacturing-mode-physical-presence-detection.patch \ + file://0026-Aspeed-I2C-support-in-U-Boot.patch \ + file://0027-CPLD-u-boot-commands-support-for-PFR.patch \ + file://0028-Enabling-uart1-uart2-in-u-boot-for-BIOS-messages.patch \ + file://0029-FFUJ-FW-IPMI-commands-and-flash-support-in-u-boot.patch \ + file://0030-Support-Get-Set-Security-mode-command.patch \ + file://0031-Make-it-so-TFTP-port-can-be-modified.patch \ + file://0033-Reboot-into-UBOOT-on-Watchdog-Failures.patch \ + file://0034-Disable-uart-debug-interface.patch \ + file://0036-Re-Enable-KCS.patch \ + file://0037-aspeed-ast-scu.c-fix-MAC1LINK-and-MAC2LINK-pin-pads-.patch \ + file://0038-Increase-default-fan-speed-for-cooper-city.patch \ + file://0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch \ + file://0044-net-phy-realtek-Change-LED-configuration.patch \ + file://0045-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch \ + file://0046-Enable-FMC-DMA-for-memmove.patch \ + file://0047-ast2500-parse-reset-reason.patch \ + file://0048-Add-WDT-to-u-boot-to-cover-booting-failures.patch \ + file://0049-Fix-issue-on-host-console-is-broken-due-to-BMC-reset.patch \ + file://0050-Set-UART-routing-in-lowlevel_init.patch \ + " +# CVE-2020-10648 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2500:= "${THISDIR}/files/CVE-2020-10648:" +SRC_URI:append:intel-ast2500 = " \ + file://0001-image-Correct-comment-for-fit_conf_get_node.patch \ + file://0002-image-Be-a-little-more-verbose-when-checking-signatu.patch \ + file://0003-image-Return-an-error-message-from-fit_config_verify.patch \ + file://0007-image-Check-hash-nodes-when-checking-configurations.patch \ + file://0008-image-Load-the-correct-configuration-in-fit_check_si.patch \ + file://0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch \ + file://0012-image-Use-constants-for-required-and-key-name-hint.patch \ + " +PFR_SRC_URI = " \ + file://0022-u-boot-env-change-for-PFR-image.patch \ + file://0032-PFR-FW-update-and-checkpoint-support-in-u-boot.patch \ + file://0035-PFR-platform-EXTRST-reset-mask-selection.patch \ + file://0043-PFR-Skip-counting-WDT2-event-when-EXTRST-is-set.patch \ + " +AUTOBOOT_SRC_URI = " \ + file://0041-Disabling-boot-delay.patch \ + " +SRC_URI:append:intel-ast2500 += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', PFR_SRC_URI, '', d)}" +SRC_URI:append:intel-ast2500 += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', '', AUTOBOOT_SRC_URI, d)}" +do_install:append () { + install -m 0644 ${WORKDIR}/fw_env.config ${S}/tools/env/fw_env.config +} + +require recipes-core/os-release/version-vars.inc + +python do_version () { + with open(d.expand('${S}/board/aspeed/ast-g5/intel-version.h'), 'w') as f: + f.write(d.expand('#define VER_MAJOR ${IPMI_MAJOR}\n')) + f.write(d.expand('#define VER_MINOR ${IPMI_MINOR}\n')) + f.write(d.expand('#define VER_AUX13 ${IPMI_AUX13}\n')) + f.write(d.expand('#define VER_AUX14 ${IPMI_AUX14}\n')) + f.write(d.expand('#define VER_AUX15 ${IPMI_AUX15}\n')) + f.write(d.expand('#define VER_AUX16 ${IPMI_AUX16}\n')) +} + +do_version[vardepsexclude] = "IPMI_MAJOR IPMI_MINOR IPMI_AUX13 IPMI_AUX14 IPMI_AUX15 IPMI_AUX16 PRODUCT_GENERATION VERSION VERSION_ID BUILD_ID" +addtask do_version after do_configure before do_compile diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend new file mode 120000 index 000000000..f725cd47a --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/u-boot-fw-utils-aspeed_%.bbappend @@ -0,0 +1 @@ +./u-boot-aspeed_%.bbappend
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/intel-ast2500.cfg b/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/intel-ast2500.cfg new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed/intel-ast2500.cfg diff --git a/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed_%.bbappend new file mode 100644 index 000000000..6c2b7d43b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -0,0 +1,3 @@ +COMPATIBLE_MACHINE = "intel-ast2500" +FILESEXTRAPATHS:prepend := "${THISDIR}/linux-aspeed:" +SRC_URI += "file://intel-ast2500.cfg" diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/0001-Blacklist-DIMM-Bus.patch b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/0001-Blacklist-DIMM-Bus.patch new file mode 100644 index 000000000..e84e79884 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/0001-Blacklist-DIMM-Bus.patch @@ -0,0 +1,26 @@ +From c64c2d05ebd9dcb9b161320087ce205a8a674a45 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Wed, 11 Dec 2019 10:20:40 -0800 +Subject: [PATCH 1/1] Blacklist DIMM Bus + +The dimms error when being scanned, blacklist the bus. + +Change-Id: I797d144dc89b49ef7ac4f68b106a492014a4d086 +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + blacklist.json | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/blacklist.json b/blacklist.json +index f112a7b..1ae6deb 100644 +--- a/blacklist.json ++++ b/blacklist.json +@@ -1,3 +1,4 @@ + { +- "buses": [] ++ "buses": [9] + } ++ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CPC-Baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CPC-Baseboard.json new file mode 100644 index 000000000..e9c91e425 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CPC-Baseboard.json @@ -0,0 +1,1955 @@ +{ + "Exposes": [ + { + "Index": 0, + "Name": "A_P12V_PSU_SCALED", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "BusConfig": [ + { + "BusNum": 9, + "BusType": "BUS_CONFIG_I2C" + } + ], + "Name": "ASD", + "Type": "ASD" + }, + { + "Index": 3, + "Name": "P105_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.139 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.106 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.995 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.966 + } + ], + "Type": "ADC" + }, + { + "Index": 5, + "Name": "P12V_AUX", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 6, + "Name": "P1V8_PCH", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.961 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.904 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.699 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.648 + } + ], + "Type": "ADC" + }, + { + "Index": 1, + "Name": "P3V3", + "PowerState": "On", + "ScaleFactor": 0.4107, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.647 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.541 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 3.066 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.974 + } + ], + "Type": "ADC" + }, + { + "BridgeGpio": [ + { + "Name": "P3VBAT_BRIDGE_EN", + "Polarity": "High" + } + ], + "Index": 7, + "Name": "P3VBAT", + "ScaleFactor": 0.3333, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.296 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2.457 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.138 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 8, + "Name": "PVCCIN_CPU1", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 9, + "Name": "PVCCIN_CPU2", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 14, + "Name": "PVCCIO_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 15, + "Name": "PVCCIO_CPU2", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 10, + "Name": "PVDQ_ABC_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 12, + "Name": "PVDQ_ABC_CPU2", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 11, + "Name": "PVDQ_DEF_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 13, + "Name": "PVDQ_DEF_CPU2", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.138 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.104 + } + ], + "Type": "ADC" + }, + { + "Index": 2, + "Name": "PVNN_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.081 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.049 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.807 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.783 + } + ], + "Type": "ADC" + }, + { + "BindConnector": "System Fan connector 1", + "Index": 0, + "Name": "Fan 1a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 1", + "Index": 1, + "Name": "Fan 1b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 2, + "Name": "Fan 2a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 3, + "Name": "Fan 2b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 4, + "Name": "Fan 3a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 5, + "Name": "Fan 3b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 6, + "Name": "Fan 4a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 7, + "Name": "Fan 4b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 8, + "Name": "Fan 5a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 9, + "Name": "Fan 5b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "Name": "Fan 6a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 11, + "Name": "Fan 6b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "Name": "Fan 7a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 13, + "Name": "Fan 7b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 14, + "Name": "Fan 8a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 15, + "Name": "Fan 8b", + "Type": "AspeedFan" + }, + { + "C1": 92.16, + "C2": 107.52, + "MaxCFM": 17.5, + "Name": "System Airflow", + "TachMaxPercent": 100, + "TachMinPercent": 20, + "Tachs": [ + "Fan 1a", + "Fan 1b", + "Fan 2a", + "Fan 2b", + "Fan 3a", + "Fan 3b", + "Fan 4a", + "Fan 4b", + "Fan 5a", + "Fan 5b", + "Fan 6a", + "Fan 6b", + "Fan 7a", + "Fan 7b", + "Fan 8a", + "Fan 8b" + ], + "Type": "CFMSensor" + }, + { + "Name": "System Fan connector 1", + "Pwm": 0, + "Tachs": [ + 0, + 1 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 2", + "Pwm": 1, + "Tachs": [ + 2, + 3 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 3", + "Pwm": 2, + "Tachs": [ + 4, + 5 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 4", + "Pwm": 3, + "Tachs": [ + 6, + 7 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 5", + "Pwm": 4, + "Tachs": [ + 8, + 9 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 6", + "Pwm": 5, + "Tachs": [ + 10, + 11 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 7", + "Pwm": 6, + "Tachs": [ + 12, + 13 + ], + "Type": "IntelFanConnector" + }, + { + "Name": "System Fan connector 8", + "Pwm": 7, + "Tachs": [ + 14, + 15 + ], + "Type": "IntelFanConnector" + }, + { + "Address": "0x8", + "Class": "METemp", + "Name": "SSB Temp", + "PowerState": "BiosPost", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 103 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 98 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xC4", + "Class": "MpsBridgeTemp", + "Name": "CPU1 P12V PVCCIN VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xB4", + "Class": "PxeBridgeTemp", + "Name": "CPU1 P12V PVCCIO VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem ABCD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xDC", + "Class": "PxeBridgeTemp", + "Name": "CPU1 VR Mem EFGH Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xCC", + "Class": "MpsBridgeTemp", + "Name": "CPU2 P12V PVCCIN VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xD4", + "Class": "PxeBridgeTemp", + "Name": "CPU2 P12V PVCCIO VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xB0", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem ABCD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0xEC", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem EFGH Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": 190, + "Class": "MESensor", + "Name": "Host Cpu Utilization", + "SensorType": "utilization", + "ScaleValue": 0.392, + "Type": "IpmbSensor" + }, + { + "Address": 191, + "Class": "MESensor", + "Name": "Host Pci Bandwidth Utilization", + "SensorType": "utilization", + "ScaleValue": 0.392, + "Type": "IpmbSensor" + }, + { + "Address": 192, + "Class": "MESensor", + "Name": "Host Memory Bandwidth Utilization", + "SensorType": "utilization", + "ScaleValue": 0.392, + "Type": "IpmbSensor" + }, + { + "Address": "0x71", + "Bus": 2, + "ChannelNames": [ + "M2Slot1", + "M2Slot2" + ], + "Name": "M2 Mux", + "Type": "PCA9543Mux" + }, + { + "Address": "0x72", + "Bus": 7, + "ChannelNames": [ + "PMBusSlot1", + "PMBusSlot2", + "PMBusSlot3", + "PMBusSlot4" + ], + "Name": "PMBus Mux", + "Type": "PCA9544Mux" + }, + { + "Address": "0x72", + "Bus": 2, + "ChannelNames": [ + "Pcie_Slot_1", + "Pcie_Slot_2", + "", + "FruChannel" + ], + "Name": "Riser 1 Mux", + "Type": "PCA9545Mux" + }, + { + "Address": "0x73", + "Bus": 2, + "ChannelNames": [ + "Pcie_Slot_1", + "Pcie_Slot_2", + "", + "FruChannel" + ], + "Name": "Riser 2 Mux", + "Type": "PCA9545Mux" + }, + { + "Address": "0x73", + "Bus": 9, + "ChannelNames": [ + "MemoryChannel1", + "MemoryChannel2", + "MemoryChannel3", + "MemoryChannel4" + ], + "Name": "Memory Mux", + "Type": "PCA9545Mux" + }, + { + "Address": "0x74", + "Bus": 2, + "ChannelNames": [ + "Pcie_Slot_1", + "Pcie_Slot_2", + "Pcie_Slot_3", + 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"PCH SMBUS Slave", + "PchSmbusSlaveI2cBus": 3, + "PchSmbusSlaveI2cAddress": "0x44", + "Type": "PchSmbusSlave" + } + ], + "Name": "CPC Baseboard", + "Probe": [ + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'CooperCity'})", + "OR", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*CPC'})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + }, + "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { + "ProductId": 157 + }, + "xyz.openbmc_project.Inventory.Item.System": {} +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json new file mode 100644 index 000000000..b06f1d266 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json @@ -0,0 +1,1427 @@ +{ + "Exposes": [ + { + "Index": 0, + "Name": "P12V_PSU_RIGHT", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 1, + "Name": "P3V3", + "PowerState": "On", + "ScaleFactor": 0.4107, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.647 + }, + { + "Direction": "greater than", + "Name": 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PLD Major Revison Bit 6", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 287, + "Name": "Main PLD Major Revison Bit 7", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 289, + "Name": "Memory Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 290, + "Name": "CPU Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 291, + "Name": "P3V3 Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 292, + "Name": "PSU Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Direction": "Input", + "Index": 295, + "Name": "PCH Pwr Fault", + "Polarity": "Low", + "Type": "Gpio" + }, + { + "Address": "0x71", + "Bus": 2, + "ChannelNames": [ + "M2_Slot1", + "M2_Slot2", + "", + "" + ], + "Name": "M.2 Mux", + "Type": "PCA9543Mux" + }, + { + "Address": "0x70", + "Bus": 4, + "ChannelNames": [ + "U2_Slot1", + "U2_Slot2", + "U2_Slot3", + "U2_Slot4" + ], + "Name": "HSBP 1 Mux", + "Type": "PCA9546Mux" + }, + { + "Address": "0x74", + "Bus": 4, + "ChannelNames": [ + "U2_Slot5", + "U2_Slot6", + "U2_Slot7", + "U2_Slot8" + ], + "Name": "HSBP 1 Mux2", + "Type": "PCA9546Mux" + }, + { + "Address": "0x77", + "Bus": 4, + "ChannelNames": [ + "U2_Slot1", + "U2_Slot2", + "U2_Slot3", + "U2_Slot4" + ], + "Name": "HSBP 2 Mux", + "Type": "PCA9546Mux" + }, + { + "Address": "0x73", + "Bus": 4, + "ChannelNames": [ + "U2_Slot5", + "U2_Slot6", + "U2_Slot7", + "U2_Slot8" + ], + "Name": "HSBP 2 Mux2", + "Type": "PCA9546Mux" + }, + { + "Address": "0x76", + "Bus": 4, + "ChannelNames": [ + "U2_Slot1", + "U2_Slot2", + "U2_Slot3", + "U2_Slot4" + ], + "Name": "HSBP 3 Mux", + "Type": "PCA9546Mux" + }, + { + "Address": "0x72", + "Bus": 4, + "ChannelNames": [ + "U2_Slot5", + "U2_Slot6", + "U2_Slot7", + "U2_Slot8" + ], + "Name": "HSBP 3 Mux2", + "Type": "PCA9546Mux" + }, + { + "Address": "0x4D", + "Bus": 6, + "Name": "CPU0 VR Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP421" + }, + { + "Address": "0x4F", + "Bus": 6, + "Name": "CPU1 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP421" + }, + { + "Address": "0x4A", + "Bus": 6, + "Name": "BMC Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4B", + "Bus": 6, + "Name": "RightRear Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4E", + "Bus": 6, + "Name": "LeftRear Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4C", + "Bus": 6, + "Name": "PCH DS Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "CYP Baseboard", + "Probe": [ + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'M50CYP2SB2U'})", + "OR", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*CYP'})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + }, + "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { + "ProductId": 152 + }, + "xyz.openbmc_project.Inventory.Item.System": {} +}
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json new file mode 100644 index 000000000..84ff6f12f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json @@ -0,0 +1,91 @@ +[ + { + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "FCXXPDBASSMBL Fru", + "Type": "24C01" + }, + { + "Address": "0x18", + "Bus": "$bus", + "Name": "Multi Node Presence Detector", + "Type": "MultiNodePresence" + }, + { + "Address": "0x48", + "Bus": "$bus", + "Name": "PDB Temp1", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x49", + "Bus": "$bus", + "Name": "PDB Temp2", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "FCXXPDBASSMBL PDB", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL', 'ADDRESS' : 85})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } + } +]
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/J85894-HSBP.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/J85894-HSBP.json new file mode 100644 index 000000000..792df2dcf --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/J85894-HSBP.json @@ -0,0 +1,92 @@ +{ + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "J85894 HSBP FRU", + "Type": "EEPROM" + }, + { + "Address": "0x68", + "Bus": "$bus", + "Index": "$index", + "Name": "J85894 HSBP $index", + "Type": "Intel HSBP CPLD" + }, + { + "Address": "0x74", + "Bus": "$bus", + "ChannelNames": [ + "Pcie_Slot_1", + "Pcie_Slot_2", + "Pcie_Slot_3", + "Pcie_Slot_4" + ], + "Name": "HSBP $index Mux 1", + "Type": "PCA9545Mux" + }, + { + "Address": "0x70", + "Bus": "$bus", + "ChannelNames": [ + "Pcie_Slot_5", + "Pcie_Slot_6", + "Pcie_Slot_7", + "Pcie_Slot_8" + ], + "Name": "HSBP $index Mux 2", + "Type": "PCA9545Mux" + }, + { + "Address": "0x4b", + "Bus": "$bus", + "Name": "HSBP $index Temp", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 57 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 52 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 12 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 7 + } + ], + "Type": "TMP75" + } + ], + "Name": "J85894 HSBP $index", + "PowerState": "On", + "Probe": [ + "FOUND('WC Baseboard')", + "OR", + "FOUND('WP Baseboard')", + "OR", + "FOUND('CPC Baseboard')", + "AND", + "xyz.openbmc_project.Inventory.Item.I2CDevice({'Bus': 4, 'Address': 82})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json new file mode 100644 index 000000000..53edbfe87 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/MIDPLANE-2U2X12SWITCH.json @@ -0,0 +1,104 @@ +[ + { + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "Midplane 1 Fru", + "Type": "EEPROM" + }, + { + "Address": "0x4E", + "Bus": "$bus", + "Name": "Midplane 1 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "Midplane 1", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U2X12SWITCH', 'ADDRESS' : 86})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } + }, + { + "Exposes": [ + { + "Address": "$address", + "Bus": "$bus", + "Name": "Midplane 2 Fru", + "Type": "EEPROM" + }, + { + "Address": "0x4F", + "Bus": "$bus", + "Name": "Midplane 2 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 80 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 75 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + } + ], + "Name": "Midplane 2", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U2X12SWITCH', 'ADDRESS' : 87})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", + "Model": "$BOARD_PRODUCT_NAME", + "PartNumber": "$BOARD_PART_NUMBER", + "SerialNumber": "$BOARD_SERIAL_NUMBER" + } + } +]
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json new file mode 100644 index 000000000..a81329787 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json @@ -0,0 +1,49 @@ +{ + "Exposes": [ + { + "Address": "0x56", + "Bus": 9, + "Class": "MCUTemp", + "Name": "PDB MCU Temp", + "Reg": "0x22", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "MCUTempSensor" + } + ], + "Name": "OPB2RH Chassis", + "Probe": [ + "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL'})" + ], + "Type": "Chassis", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "Intel Corporation", + "Model": "OPB2RH", + "PartNumber": "R1234", + "SerialNumber": "12345" + } +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json new file mode 100644 index 000000000..24a65437e --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json @@ -0,0 +1,1777 @@ +{ + "Exposes": [ + { + "Index": 0, + "Name": "Baseboard 12 Volt", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 4, + "Name": "P0V83_LAN_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 0.901 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 0.875 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.786 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.763 + } + ], + "Type": "ADC" + }, + { + "Index": 3, + "Name": "P105_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.139 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.106 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.995 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.966 + } + ], + "Type": "ADC" + }, + { + "Index": 5, + "Name": "P12V_AUX", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 6, + "Name": "P1V8_PCH", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.961 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.904 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.699 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.648 + } + ], + "Type": "ADC" + }, + { + "Index": 1, + "Name": "P3V3", + "PowerState": "On", + "ScaleFactor": 0.4107, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.647 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.541 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 3.066 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.974 + } + ], + "Type": "ADC" + }, + { + "BridgeGpio": [ + { + "Name": "P3VBAT_BRIDGE_EN", + "Polarity": "High" + } + ], + "Index": 7, + "Name": "P3VBAT", + "ScaleFactor": 0.3333, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.296 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2.457 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.138 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 8, + "Name": "PVCCIN_CPU1", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 9, + "Name": "PVCCIN_CPU2", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.376 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 14, + "Name": "PVCCIO_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 2, + "Index": 15, + "Name": "PVCCIO_CPU2", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.19 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.155 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.752 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.729 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 10, + "Name": "PVDQ_ABCD_CPU1", + "PowerState": "On", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.301 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.263 + }, + { + "Direction": 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"Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0x94", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem ABC Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "IpmbSensor" + }, + { + "Address": "0x98", + "Class": "PxeBridgeTemp", + "Name": "CPU2 VR Mem DEF Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + 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} + ], + "Type": "TMP75" + }, + { + "Address": "0x4B", + "Bus": 6, + "Name": "Inlet Air Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "CPU 1", + "Type": "XeonCPU" + }, + { + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "CPU 2", + "Type": "XeonCPU" + } + ], + "Name": "TNP Baseboard", + "Probe": [ + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'D50TNP1SB'})", + "OR", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + }, + "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { + "ProductId": 153 + }, + "xyz.openbmc_project.Inventory.Item.System": {} +}
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json new file mode 100644 index 000000000..10ac69963 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json @@ -0,0 +1,2537 @@ +{ + "Exposes": [ + { + "Index": 0, + "Name": "A_P12V_PSU_SCALED", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "BusConfig": [ + { + "BusNum": 9, + "BusType": "BUS_CONFIG_I2C" + } + ], + "Name": "ASD", + "Type": "ASD" + }, + { + "Index": 3, + "Name": "P105_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.139 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.106 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 0.995 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0.966 + } + ], + "Type": "ADC" + }, + { + "Index": 5, + "Name": "P12V_AUX", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "Index": 6, + "Name": "P1V8_PCH", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 1.961 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 1.904 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.699 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1.648 + } + ], + "Type": "ADC" + }, + { + "Index": 1, + "Name": "P3V3", + "PowerState": "On", + "ScaleFactor": 0.4107, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.647 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.541 + }, + { + "Direction": "less than", + "Name": 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"MaxReading": 8000, + "Name": "Fan 2a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 3, + "MaxReading": 8000, + "Name": "Fan 2b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 4, + "MaxReading": 8000, + "Name": "Fan 3a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 5, + "MaxReading": 8000, + "Name": "Fan 3b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 6, + "MaxReading": 8000, + "Name": "Fan 4a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 7, + "MaxReading": 8000, + "Name": "Fan 4b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 8, + "MaxReading": 8000, + "Name": "Fan 5a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 9, + "MaxReading": 8000, + "Name": "Fan 5b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "MaxReading": 8000, + "Name": "Fan 6a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 11, + "MaxReading": 8000, + "Name": "Fan 6b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "MaxReading": 8000, + "Name": "Fan 7a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 13, + "MaxReading": 8000, + "Name": "Fan 7b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 14, + "MaxReading": 8000, + "Name": "Fan 8a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 15, + "MaxReading": 8000, + "Name": "Fan 8b", + "Type": "AspeedFan" + }, + { + "C1": 92.16, + "C2": 107.52, + "MaxCFM": 17.5, + "Name": "System Airflow", + "TachMaxPercent": 100, + "TachMinPercent": 20, + "Tachs": [ + "Fan 1a", + "Fan 1b", + "Fan 2a", + "Fan 2b", + "Fan 3a", + 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BRD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "CPU 1", + "PresenceGpio": [ + { + "Name": "CPU1_PRESENCE", + "Polarity": "Low" + } + ], + "PiromI2cBus": 13, + "PiromI2cAddress": "0x50", + "Type": "XeonCPU" + }, + { + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "CPU 2", + "PresenceGpio": [ + { + "Name": "CPU2_PRESENCE", + "Polarity": "Low" + } + ], + "PiromI2cBus": 13, + "PiromI2cAddress": "0x51", + "Type": "XeonCPU" + }, + { + "Name": "PCH SMBUS Slave", + "PchSmbusSlaveI2cBus": 3, + "PchSmbusSlaveI2cAddress": "0x44", + "Type": "PchSmbusSlave" + } + ], + "Name": "WC Baseboard", + "Probe": [ + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'WilsonCity.*'})", + "OR", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*WC'})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + }, + "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { + "ProductId": 145 + }, + "xyz.openbmc_project.Inventory.Item.System": {} +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Chassis.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Chassis.json new file mode 100644 index 000000000..ad10d87a4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WC-Chassis.json @@ -0,0 +1,466 @@ +{ + "Exposes": [ + { + "BindConnector": "System Fan connector 1", + "Index": 0, + "MaxReading": 21000, + "Name": "Fan 1", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 2", + "Index": 2, + "MaxReading": 21000, + "Name": "Fan 2", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 3", + "Index": 4, + "MaxReading": 21000, + "Name": "Fan 3", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "MaxReading": 21000, + "Name": "Fan 4", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "MaxReading": 21000, + "Name": "Fan 5", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 8", + "Index": 14, + "MaxReading": 21000, + "Name": "Fan 6", + "Thresholds": [ + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 1750 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2000 + } + ], + "Type": "AspeedFan" + }, + { + "C1": 92.16, + "C2": 107.52, + "MaxCFM": 17.5, + "Name": "System Airflow", + "TachMaxPercent": 100, + "TachMinPercent": 20, + "Tachs": [ + "Fan 1", + "Fan 2", + "Fan 3", + "Fan 4", + "Fan 5", + "Fan 6" + ], + "Type": "CFMSensor" + }, + { + "DisableNode": [ + "Fan 1a", + "Fan 1b", + "Fan 2a", + "Fan 2b", + "Fan 3a", + "Fan 3b", + "Fan 4a", + "Fan 4b", + "Fan 5a", + "Fan 5b", + "Fan 6a", + "Fan 6b", + "Fan 7a", + "Fan 7b", + "Fan 8a", + "Fan 8b", + "Fan 1", + "Fan 2", + "Fan 3", + "Fan 4", + "Fan 5", + "Fan 6", + "Fan 7", + "Fan 8", + "System Airflow" + ], + "Name": "Disable Baseboard Configurations", + "Type": "Disable" + }, + { + "AlphaF": 4.352, + "AlphaS": 0.512, + "Name": "Exit Air Temp", + "PowerFactorMax": 1.2, + "PowerFactorMin": 0.9, + "QMax": 165, + "QMin": 31, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 85 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 80 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "ExitAirTempSensor" + }, + { + "AllowedFailures": 1, + "Name": "FanRedundancy", + "Type": "FanRedundancy" + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -4.64, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Exit Air Temp" + ], + "Name": "Exit Air Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 75.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 1" + ], + "Name": "Fan 1", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 1" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 2" + ], + "Name": "Fan 2", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 2" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 3" + ], + "Name": "Fan 3", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 3" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 4" + ], + "Name": "Fan 4", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 6" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 5" + ], + "Name": "Fan 5", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 7" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 6" + ], + "Name": "Fan 6", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 8" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "Floor", + "Inputs": [ + "Front Panel Temp" + ], + "Name": "Front Panel LCC", + "NegativeHysteresis": 2, + "Output": [ + 50.0, + 60.0 + ], + "PositiveHysteresis": 0, + "Reading": [ + 20.0, + 30.0 + ], + "Type": "Stepwise", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "Ceiling", + "Inputs": [ + "Front Panel Temp" + ], + "Name": "Front Panel UCC", + "NegativeHysteresis": 2, + "Output": [ + 70.0, + 80.0 + ], + "PositiveHysteresis": 0, + "Profiles": [ + "Acoustic" + ], + "Reading": [ + 22.0, + 32.0 + ], + "Type": "Stepwise", + "Zones": [ + "Left", + "Right" + ] + } + ], + "Name": "R4000 Chassis", + "Probe": [ + "FOUND('Intel Front Panel')", + "AND", + "FOUND('WC Baseboard')", + "AND", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'WilsonCity'})" + ], + "Type": "Chassis", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + } +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json new file mode 100644 index 000000000..acecd3fcd --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json @@ -0,0 +1,2455 @@ +{ + "Exposes": [ + { + "Index": 0, + "Name": "A_P12V_PSU_SCALED", + "PowerState": "On", + "ScaleFactor": 0.1124, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 13.494 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 13.101 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 10.945 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 10.616 + } + ], + "Type": "ADC" + }, + { + "BusConfig": [ + { + "BusNum": 9, + "BusType": "BUS_CONFIG_I2C" + } + ], + "Name": "ASD", + "Type": "ASD" + }, + { + "Index": 3, + "Name": "P105_PCH_AUX", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + 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"Polarity": "High" + } + ], + "Index": 7, + "Name": "P3VBAT", + "ScaleFactor": 0.3333, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 3.296 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 3.263 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 2.457 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 2.138 + } + ], + "Type": "ADC" + }, + { + "CPURequired": 1, + "Index": 8, + "Name": "PVCCIN_CPU1", + "PowerState": "On", + "ScaleFactor": 0.7505, + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 2.151 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 2.088 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 1.418 + }, + { + "Direction": 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connector 3", + "Index": 5, + "Name": "Fan 3b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 6, + "Name": "Fan 4a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 4", + "Index": 7, + "Name": "Fan 4b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 8, + "Name": "Fan 5a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 5", + "Index": 9, + "Name": "Fan 5b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 10, + "Name": "Fan 6a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 6", + "Index": 11, + "Name": "Fan 6b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 12, + "Name": "Fan 7a", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan connector 7", + "Index": 13, + "Name": "Fan 7b", + "Type": "AspeedFan" + }, + { + "BindConnector": "System Fan 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"ChannelNames": [ + "MemoryChannel1", + "MemoryChannel2", + "MemoryChannel3", + "MemoryChannel4" + ], + "Name": "Memory Mux", + "Type": "PCA9545Mux" + }, + { + "Address": "0x74", + "Bus": 2, + "ChannelNames": [ + "Pcie_Slot_1", + "Pcie_Slot_2", + "Pcie_Slot_3", + "Pcie_Slot_4" + ], + "Name": "PCIE Mux", + "Type": "PCA9546Mux" + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Exit Air Temp" + ], + "Name": "Exit Air Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 65.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 1a", + "Fan 1b" + ], + "Name": "Fan 1", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 1" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 2a", + "Fan 2b" + ], + "Name": "Fan 2", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 2" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 3a", + "Fan 3b" + ], + "Name": "Fan 3", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 3" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 4a", + "Fan 4b" + ], + "Name": "Fan 4", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 4" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 5a", + "Fan 5b" + ], + "Name": "Fan 5", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 5" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 6a", + "Fan 6b" + ], + "Name": "Fan 6", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 6" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 7a", + "Fan 7b" + ], + "Name": "Fan 7", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 7" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "fan", + "FFGainCoefficient": 1.0, + "FFOffCoefficient": 0.0, + "ICoefficient": 0.0, + "ILimitMax": 0.0, + "ILimitMin": 0.0, + "Inputs": [ + "Fan 8a", + "Fan 8b" + ], + "Name": "Fan 8", + "NegativeHysteresis": 0.0, + "OutLimitMax": 100.0, + "OutLimitMin": 30.0, + "Outputs": [ + "Pwm 8" + ], + "PCoefficient": 0.0, + "PositiveHysteresis": 0.0, + "SlewNeg": 0.0, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "BMC Temp" + ], + "Name": "BMC Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 80.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [ABC]\\d+ CPU1" + ], + "Name": "CPU1 DIMM ABC", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 80.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [DEF]\\d+ CPU1" + ], + "Name": "CPU1 DIMM DEF", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 80.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [ABC]\\d+ CPU2" + ], + "Name": "CPU2 DIMM ABC", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 80.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DIMM [DEF]\\d+ CPU2" + ], + "Name": "CPU2 DIMM DEF", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 80.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -0.2, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU1" + ], + "Name": "DTS CPU1", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.1, + "PositiveHysteresis": 0.0, + "SetPoint": 75.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -0.2, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "DTS CPU2" + ], + "Name": "DTS CPU2", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.1, + "PositiveHysteresis": 0.0, + "SetPoint": 75.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Left Rear Temp" + ], + "Name": "Left Rear Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "Right Rear Board" + ], + "Name": "Right Rear Board", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 60.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "SSB Temp" + ], + "Name": "SSB Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 75.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left", + "Right" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "CPU1 VR Mem ABCD Temp", + "CPU1 VR Mem ABCD Temp", + "CPU1 VR P1V8" + ], + "Name": "CPU 1 VR Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 85.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Left" + ] + }, + { + "Class": "temp", + "FFGainCoefficient": 0.0, + "FFOffCoefficient": 0.0, + "ICoefficient": -1.0, + "ILimitMax": 100, + "ILimitMin": 30, + "Inputs": [ + "CPU2 VR Mem ABCD Temp", + "CPU2 VR Mem ABCD Temp", + "CPU2 VR P1V8" + ], + "Name": "CPU 2 VR Temp", + "NegativeHysteresis": 5.0, + "OutLimitMax": 100, + "OutLimitMin": 30, + "Outputs": [], + "PCoefficient": -0.15, + "PositiveHysteresis": 0.0, + "SetPoint": 85.0, + "SlewNeg": -1, + "SlewPos": 0.0, + "Type": "Pid", + "Zones": [ + "Right", + "PSU" + ] + }, + { + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Left", + "Type": "Pid.Zone" + }, + { + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "Right", + "Type": "Pid.Zone" + }, + { + "FailSafePercent": 100, + "MinThermalOutput": 30, + "Name": "PSU", + "Type": "Pid.Zone" + }, + { + "Address": "0x4A", + "Bus": 6, + "Name": "BMC Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4B", + "Bus": 6, + "Name": "Right Rear Board Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4e", + "Bus": 6, + "Name": "Left Rear Board Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x48", + "Bus": 6, + "Name": "PCH M.2 Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x4f", + "Bus": 6, + "Name": "Inlet BRD Temp", + "Thresholds": [ + { + "Direction": "greater than", + "Name": "upper critical", + "Severity": 1, + "Value": 115 + }, + { + "Direction": "greater than", + "Name": "upper non critical", + "Severity": 0, + "Value": 110 + }, + { + "Direction": "less than", + "Name": "lower non critical", + "Severity": 0, + "Value": 5 + }, + { + "Direction": "less than", + "Name": "lower critical", + "Severity": 1, + "Value": 0 + } + ], + "Type": "TMP75" + }, + { + "Address": "0x30", + "Bus": 0, + "CpuID": 1, + "Name": "CPU 1", + "PresenceGpio": [ + { + "Name": "CPU1_PRESENCE", + "Polarity": "Low" + } + ], + "Type": "XeonCPU" + }, + { + "Address": "0x31", + "Bus": 0, + "CpuID": 2, + "Name": "CPU 2", + "PresenceGpio": [ + { + "Name": "CPU2_PRESENCE", + "Polarity": "Low" + } + ], + "Type": "XeonCPU" + }, + { + "Name": "PCH SMBUS Slave", + "PchSmbusSlaveI2cBus": 3, + "PchSmbusSlaveI2cAddress": "0x44", + "Type": "PchSmbusSlave" + } + ], + "Name": "WP Baseboard", + "Probe": [ + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': 'WilsonPoint'})", + "OR", + "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*WP'})" + ], + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$PRODUCT_MANUFACTURER", + "Model": "$PRODUCT_PRODUCT_NAME", + "PartNumber": "$PRODUCT_PART_NUMBER", + "SerialNumber": "$PRODUCT_SERIAL_NUMBER" + }, + "xyz.openbmc_project.Inventory.Decorator.AssetTag": { + "AssetTag": "$PRODUCT_ASSET_TAG" + }, + "xyz.openbmc_project.Inventory.Item.Board.Motherboard": { + "ProductId": 154 + }, + "xyz.openbmc_project.Inventory.Item.System": {} +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/blocklist.json b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/blocklist.json new file mode 100644 index 000000000..477c87062 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager/blocklist.json @@ -0,0 +1,3 @@ +{ + "buses": [9] +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager_%.bbappend new file mode 100644 index 000000000..0756d0547 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/configuration/entity-manager_%.bbappend @@ -0,0 +1,30 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" +SRC_URI:append = " file://0001-Blacklist-DIMM-Bus.patch \ + file://WC-Baseboard.json \ + file://WP-Baseboard.json \ + file://TNP-baseboard.json \ + file://FCXXPDBASSMBL_PDB.json \ + file://OPB2RH-Chassis.json \ + file://CYP-baseboard.json \ + file://J85894-HSBP.json \ + file://CPC-Baseboard.json \ + file://MIDPLANE-2U2X12SWITCH.json \ + file://WC-Chassis.json \ + file://blocklist.json" + +RDEPENDS:${PN} += " default-fru" + +do_install:append() { + install -d ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/WC-Baseboard.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/WP-Baseboard.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/TNP-baseboard.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/FCXXPDBASSMBL_PDB.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/OPB2RH-Chassis.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/CYP-baseboard.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/J85894-HSBP.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/CPC-Baseboard.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/MIDPLANE-2U2X12SWITCH.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/WC-Chassis.json ${D}/usr/share/entity-manager/configurations + install -m 0444 ${WORKDIR}/blocklist.json ${D}/usr/share/entity-manager +} diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch new file mode 100644 index 000000000..ea7ca092c --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors/0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch @@ -0,0 +1,36 @@ +From d06d0a8fabd699fc1cab4fbd6e4572ce0b22a905 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Thu, 23 Apr 2020 14:01:38 -0700 +Subject: [PATCH 1/1] Only allow drive sensors on bus 2 for ast2500 + +CPLD doesn't allow multi-master, so readings wont work. +Put in a work-around to only allow bus 2 transactions. + +Tested: Only valid sensors were installed. + +Change-Id: Ib9e75ffd0dd64cf548d15cce9a6052332ac5ec43 +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + src/NVMeSensorMain.cpp | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/src/NVMeSensorMain.cpp b/src/NVMeSensorMain.cpp +index 1858ea9..844f061 100644 +--- a/src/NVMeSensorMain.cpp ++++ b/src/NVMeSensorMain.cpp +@@ -111,6 +111,12 @@ void createSensors(boost::asio::io_service& io, + rootBus = std::stoi(rootName.substr(0, dash)); + } + ++ // HACK: cpld on current products doesn't allow multi-master ++ if (rootBus != 2) ++ { ++ continue; ++ } ++ + std::shared_ptr<NVMeContext> context; + auto findRoot = nvmeDeviceMap.find(rootBus); + if (findRoot != nvmeDeviceMap.end()) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend new file mode 100644 index 000000000..da645b75f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes-phosphor/sensors/dbus-sensors_%.bbappend @@ -0,0 +1,3 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://0001-Only-allow-drive-sensors-on-bus-2-for-ast2500.patch" diff --git a/meta-openbmc-mods/meta-ast2500/recipes.txt b/meta-openbmc-mods/meta-ast2500/recipes.txt new file mode 100644 index 000000000..2f89155c3 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2500/recipes.txt @@ -0,0 +1,3 @@ +recipes-bsp - Anything with links to specific hardware or hardware configuration information +recipes-kernel - The kernel and generic applications/libraries with strong kernel dependencies +recipes-phosphor - Phosphor OpenBMC applications and configuration diff --git a/meta-openbmc-mods/meta-ast2600/conf/layer.conf b/meta-openbmc-mods/meta-ast2600/conf/layer.conf new file mode 100644 index 000000000..72c40f6e1 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/conf/layer.conf @@ -0,0 +1,20 @@ +LOCALCONF_VERSION = "3" +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "ast2600" +BBFILE_PATTERN_ast2600 = "^${LAYERDIR}/" +BBFILE_PRIORITY_ast2600 = "10" +LAYERSERIES_COMPAT_ast2600 = "gatesgarth hardknott honister" + +INHERIT += "extrausers" +#INHERIT += " cve-check" + +EXTRA_USERS_PARAMS:append:pn-intel-platforms = " \ +${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', "usermod -p '\$1\$UGMqyqdG\$FZiylVFmRRfl9Z0Ue8G7e/' root;", '', d)}" + +hostname:pn-base-files = "intel-obmc" diff --git a/meta-openbmc-mods/meta-ast2600/conf/machine/include/intel-ast2600.inc b/meta-openbmc-mods/meta-ast2600/conf/machine/include/intel-ast2600.inc new file mode 100644 index 000000000..a7146299c --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/conf/machine/include/intel-ast2600.inc @@ -0,0 +1,21 @@ +COMPATIBLE_MACHINE:intel-ast2600 = "intel-ast2600" +KMACHINE = "aspeed" +KERNEL_DEVICETREE = " \ + ${KMACHINE}-bmc-${COMPATIBLE_MACHINE}.dtb \ + " +#KERNEL_DEVICETREE = "${KMACHINE}-ast2600-evb.dtb" + +require conf/machine/include/ast2600.inc +require conf/machine/include/obmc-bsp-si-common.inc +require conf/machine/include/intel.inc + +TARGET_FPU = "hard" + +PREFERRED_PROVIDER_u-boot-fw-utils ?= "u-boot-fw-utils-aspeed-sdk" + +UBOOT_MACHINE = "ast2600_openbmc_defconfig" +UBOOT_DEVICETREE = "ast2600-intel" + +VIRTUAL-RUNTIME_skeleton_workbook = "${MACHINE}-config" + +IMAGE_CLASSES += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'image_types_intel_pfr', '', d)}" diff --git a/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc b/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc new file mode 100644 index 000000000..59ec0c2a9 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/conf/machine/include/obmc-bsp-si-common.inc @@ -0,0 +1,45 @@ +#@TYPE: Machine +#@NAME: OpenBMC +#@DESCRIPTION: Common machine configuration for OpenBMC chips + +MACHINE_EXTRA_RRECOMMENDS = " kernel-modules" +EXTRA_IMAGEDEPENDS += "u-boot" + +IMAGE_FSTYPES += "squashfs-xz" +IMAGE_FSTYPES += "mtd-auto" +INITRAMFS_FSTYPES = "squashfs-xz" +EXTRA_IMAGECMD:squashfs-xz:append = "-processors ${BB_NUMBER_THREADS} -b 262144 -Xdict-size 100% -Xbcj arm" + +KERNEL_CLASSES ?= "kernel-fitimage" +KERNEL_IMAGETYPES ?= "fitImage" +KERNEL_EXTRA_ARGS += "LOADADDR=${UBOOT_ENTRYPOINT}" + +UBOOT_SUFFIX ?= "bin" + +MACHINEOVERRIDES =. "openbmc:" + +OBMC_PHOSPHOR_IMAGE_OVERLAY= "1" +OBMC_IMAGE_EXTRA_INSTALL:append = "u-boot-fw-utils-aspeed-sdk" + +IMAGE_CLASSES += "image_types image_types_phosphor_auto qemuboot" + +# do not generate an initramfs; use the above squashfs-xz as an initrd instead +INITRAMFS_FSTYPES = "" +INITRAMFS_CTYPE = "" +INITRAMFS_IMAGE = "" + +MACHINE_FEATURES_BACKFILL_CONSIDERED = "qemu-usermode" + +KERNEL_IMAGETYPES += "zImage" + +# runqemu +QB_SYSTEM_NAME = "qemu-system-arm" +QB_DEFAULT_FSTYPE = "mtd" +QB_ROOTFS_OPT = "-drive file=@ROOTFS@,format=raw,if=mtd" +QB_MACHINE = "-M intel-ast2600" +QB_OPT_APPEND += " -nographic -serial mon:stdio -serial none" +QB_OPT_APPEND += " -global driver=aspeed.gpio-ast2600,property=gpioC0,value=true" +QB_NETWORK_DEVICE = "-net nic,macaddr=C0:FF:EE:00:00:02,model=ftgmac100" +QB_DEFAULT_KERNEL = "none" +QB_RNG = "" +QB_MEM = "1024" diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0001-Add-ast2600-intel-as-a-new-board.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0001-Add-ast2600-intel-as-a-new-board.patch new file mode 100644 index 000000000..a2981f822 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0001-Add-ast2600-intel-as-a-new-board.patch @@ -0,0 +1,1605 @@ +From 9c65cf5fa3cdbbdf1ac7f8269502ec6564703319 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Thu, 24 Oct 2019 14:06:33 -0700 +Subject: [PATCH] Add ast2600-intel as a new board + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +--- + arch/arm/dts/ast2600-intel.dts | 202 ++++--------- + arch/arm/lib/interrupts.c | 5 + + arch/arm/mach-aspeed/ast2600/Kconfig | 4 +- + board/aspeed/ast2600_intel/Makefile | 3 + + board/aspeed/ast2600_intel/ast-espi.c | 292 ++++++++++++++++++ + board/aspeed/ast2600_intel/ast-irq.c | 399 +++++++++++++++++++++++++ + board/aspeed/ast2600_intel/ast-irq.h | 8 + + board/aspeed/ast2600_intel/ast-timer.c | 59 ++++ + board/aspeed/ast2600_intel/intel.c | 347 ++++++++++----------- + cmd/Kconfig | 2 +- + common/autoboot.c | 10 + + configs/ast2600_openbmc_defconfig | 2 +- + 12 files changed, 999 insertions(+), 334 deletions(-) + create mode 100644 board/aspeed/ast2600_intel/ast-espi.c + create mode 100644 board/aspeed/ast2600_intel/ast-irq.c + create mode 100644 board/aspeed/ast2600_intel/ast-irq.h + create mode 100644 board/aspeed/ast2600_intel/ast-timer.c + +diff --git a/arch/arm/dts/ast2600-intel.dts b/arch/arm/dts/ast2600-intel.dts +index c76547cd6352..e6197831cf02 100644 +--- a/arch/arm/dts/ast2600-intel.dts ++++ b/arch/arm/dts/ast2600-intel.dts +@@ -1,10 +1,11 @@ + // SPDX-License-Identifier: GPL-2.0+ ++// Copyright (c) 2019-2021 Intel Corporation + /dts-v1/; + + #include "ast2600-u-boot.dtsi" + + / { +- model = "AST2600 Intel EGS server board"; ++ model = "Intel server board with AST2600 as the BMC"; + compatible = "aspeed,ast2600-intel", "aspeed,ast2600"; + + memory { +@@ -37,6 +38,42 @@ + clock-frequency = <1200000000>; + }; + }; ++ ++ system-leds { ++ compatible = "gpio-leds"; ++ green-led { ++ label = "green"; ++ gpios = <&gpio0 50 GPIO_ACTIVE_LOW>; ++ default-state = "blink"; ++ }; ++ amber-led { ++ label = "amber"; ++ gpios = <&gpio0 51 GPIO_ACTIVE_LOW>; ++ default-state = "off"; ++ }; ++ id-led { ++ label = "id"; ++ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; ++ default-state = "blink"; ++ }; ++ hb-led { ++ label = "hb"; ++ gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++}; ++ ++&gpio0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; + }; + + &uart5 { +@@ -49,22 +86,24 @@ + }; + + &wdt1 { ++ u-boot,dm-pre-reloc; + status = "okay"; + }; + + &wdt2 { ++ u-boot,dm-pre-reloc; + status = "okay"; + }; + + &wdt3 { ++ u-boot,dm-pre-reloc; + status = "okay"; + }; + + &mdio { + status = "okay"; + pinctrl-names = "default"; +- pinctrl-0 = < &pinctrl_mdio1_default &pinctrl_mdio2_default +- &pinctrl_mdio3_default &pinctrl_mdio4_default>; ++ pinctrl-0 = <&pinctrl_mdio2_default>; + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { +@@ -84,14 +123,6 @@ + }; + }; + +-&mac0 { +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <ðphy0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_rgmii1_default>; +-}; +- + &mac1 { + status = "okay"; + phy-mode = "rgmii"; +@@ -100,146 +131,30 @@ + pinctrl-0 = <&pinctrl_rgmii2_default>; + }; + +-&mac2 { +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <ðphy2>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_rgmii3_default>; +-}; +- +-&mac3 { +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <ðphy3>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_rgmii4_default>; +-}; +- + &fmc { + status = "okay"; +- ++#if 0 + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fmcquad_default>; +- +- flash@0 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +- +- flash@1 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +- +- flash@2 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +-}; +- +-&spi1 { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default +- &pinctrl_spi1cs1_default &pinctrl_spi1wp_default +- &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; +- +- flash@0 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +- +- flash@1 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +-}; +- +-&spi2 { +- status = "okay"; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default +- &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; +- ++#endif + flash@0 { + compatible = "spi-flash", "sst,w25q256"; + status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +- +- flash@1 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; +- }; +- +- flash@2 { +- compatible = "spi-flash", "sst,w25q256"; +- status = "okay"; +- spi-max-frequency = <50000000>; +- spi-tx-bus-width = <4>; +- spi-rx-bus-width = <4>; ++ spi-max-frequency = <40000000>; ++ spi-tx-bus-width = <2>; ++ spi-rx-bus-width = <2>; + }; + }; + + &emmc { +- u-boot,dm-pre-reloc; + timing-phase = <0x700ff>; + }; + + &emmc_slot0 { +- u-boot,dm-pre-reloc; + status = "okay"; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_emmc_default>; +- sdhci-drive-type = <1>; +-}; +- +-&sdhci { +- timing-phase = <0xc6ffff>; +-}; +- +-&sdhci_slot0 { +- status = "okay"; +- bus-width = <4>; +- pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; +- pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_sd1_default>; +- sdhci-drive-type = <1>; +-}; +- +-&sdhci_slot1 { +- status = "okay"; +- bus-width = <4>; +- pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; +- pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_sd2_default>; +- sdhci-drive-type = <1>; + }; + + &i2c4 { +@@ -277,29 +192,32 @@ + pinctrl-0 = <&pinctrl_i2c9_default>; + }; + +-&pcie_bridge1 { ++&i2c9 { + status = "okay"; +-}; + +-&h2x { +- status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c10_default>; + }; + +-#if 0 +-&fsim0 { ++&i2c12 { + status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c13_default>; + }; + +-&fsim1 { ++&i2c13 { + status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c14_default>; + }; +-#endif + +-&ehci1 { ++&pcie_bridge1 { + status = "okay"; + }; + +-&display_port { ++&h2x { + status = "okay"; + }; + +diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c +index ee775ce5d264..8c985532afb4 100644 +--- a/arch/arm/lib/interrupts.c ++++ b/arch/arm/lib/interrupts.c +@@ -25,6 +25,7 @@ + + DECLARE_GLOBAL_DATA_PTR; + ++int interrupt_init (void) __attribute__((weak)); + int interrupt_init (void) + { + /* +@@ -35,10 +36,13 @@ int interrupt_init (void) + return 0; + } + ++void enable_interrupts (void) __attribute__((weak)); + void enable_interrupts (void) + { + return; + } ++ ++int disable_interrupts (void) __attribute__((weak)); + int disable_interrupts (void) + { + return 0; +@@ -189,6 +193,7 @@ void do_fiq (struct pt_regs *pt_regs) + bad_mode (); + } + ++void do_irq (struct pt_regs *pt_regs) __attribute__((weak)); + void do_irq (struct pt_regs *pt_regs) + { + efi_restore_gd(); +diff --git a/arch/arm/mach-aspeed/ast2600/Kconfig b/arch/arm/mach-aspeed/ast2600/Kconfig +index fcdc425de59d..0900d22366d3 100644 +--- a/arch/arm/mach-aspeed/ast2600/Kconfig ++++ b/arch/arm/mach-aspeed/ast2600/Kconfig +@@ -35,8 +35,8 @@ config TARGET_AST2600_INTEL + bool "AST2600-INTEL" + depends on ASPEED_AST2600 + help +- AST2600-INTEL is an Intel Eagle Stream CRB with +- AST2600 as the BMC. ++ AST2600-INTEL is an Intel server board with the AST2600 ++ as the BMC. + + endchoice + +diff --git a/board/aspeed/ast2600_intel/Makefile b/board/aspeed/ast2600_intel/Makefile +index 1f9fcc73c719..37d2f0064f38 100644 +--- a/board/aspeed/ast2600_intel/Makefile ++++ b/board/aspeed/ast2600_intel/Makefile +@@ -1 +1,4 @@ + obj-y += intel.o ++obj-y += ast-espi.o ++obj-y += ast-irq.o ++obj-y += ast-timer.o +diff --git a/board/aspeed/ast2600_intel/ast-espi.c b/board/aspeed/ast2600_intel/ast-espi.c +new file mode 100644 +index 000000000000..0fdbf089a450 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-espi.c +@@ -0,0 +1,292 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2020, Intel Corporation. ++ ++#include <common.h> ++#include <asm/io.h> ++ ++#define AST_LPC_BASE 0x1e789000 ++#define AST_ESPI_BASE 0x1e6ee000 ++#define AST_SCU_BASE 0x1e6e2000 ++#define AST_SCU_HW_STRAP2 0x510 ++#define SCU_HW_STRAP_ESPI_ENABLED 0x40 ++ ++#define USE_HW_HANDSHAKE 0 ++#define DEBUG_ESPI_ENABLED 0 ++#if DEBUG_ESPI_ENABLED ++#define DBG_ESPI printf ++#else ++#define DBG_ESPI(...) ++#endif ++ ++/* eSPI controller registers */ ++#define ESPI000 0x000 /* Engine Control. */ ++#define ESPI004 0x004 /* Engine Status. */ ++#define ESPI008 0x008 /* Interrupt Status. */ ++#define ESPI00C 0x00C /* Interrupt Enable. */ ++#define ESPI010 0x010 /* DMA Addr of Peripheral Channel Posted Rx pkt */ ++#define ESPI014 0x014 /* Control of Peripheral Channel Posted Rx pkt. */ ++#define ESPI018 0x018 /* Data port of Peripheral Channel Posted Rx pkt. */ ++#define ESPI020 0x020 /* DMA Addr of Peripheral Channel Posted Tx pkt. */ ++#define ESPI024 0x024 /* Control of Peripheral Channel Posted Tx pkt. */ ++#define ESPI028 0x028 /* Data port of Peripheral Channel Posted Tx pkt. */ ++#define ESPI030 0x030 /* DMA Addr of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI034 0x034 /* Control of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI038 0x038 /* Data port of Peripheral Channel Non-Posted Tx pkt. */ ++#define ESPI040 0x040 /* DMA Addr of OOB Channel Rx pkt. */ ++#define ESPI044 0x044 /* Control of OOB Channel Rx pkt. */ ++#define ESPI048 0x048 /* Data port of OOB Channel Rx pkt. */ ++#define ESPI050 0x050 /* DMA Addr of OOB Channel Tx pkt. */ ++#define ESPI054 0x054 /* Control of OOB Channel Tx pkt. */ ++#define ESPI058 0x058 /* Data port of OOB Channel Tx pkt. */ ++#define ESPI060 0x060 /* DMA Addr of Flash Channel Rx pkt. */ ++#define ESPI064 0x064 /* Control of Flash Channel Rx pkt. */ ++#define ESPI068 0x068 /* Data port of Flash Channel Rx pkt. */ ++#define ESPI070 0x070 /* DMA Addr of Flash Channel Tx pkt. */ ++#define ESPI074 0x074 /* Control of Flash Channel Tx pkt. */ ++#define ESPI078 0x078 /* Data port of Flash Channel Tx pkt. */ ++#define ESPI080 0x080 /* Engine Control 2. */ ++#define ESPI084 0x084 /* Mapping Src Addr of Peripheral Channel Rx pkt. */ ++#define ESPI088 0x088 /* Mapping Tgt Addr of Peripheral Channel Rx pkt. */ ++#define ESPI08C 0x08C /* Mapping Addr Mask of Peripheral Channel Rx pkt. */ ++#define ESPI090 0x090 /* Mapping Target Addr and Mask of Flash Channel. */ ++#define ESPI094 0x094 /* Interrupt enable of System Event from Master. */ ++#define ESPI098 0x098 /* System Event from and to Master. */ ++#define ESPI09C 0x09C /* GPIO through Virtual Wire Channel. */ ++#define ESPI0A0 0x0A0 /* General Capabilities and Configurations. */ ++#define ESPI0A4 0x0A4 /* Channel 0 Capabilities and Configurations. */ ++#define ESPI0A8 0x0A8 /* Channel 1 Capabilities and Configurations. */ ++#define ESPI0AC 0x0AC /* Channel 2 Capabilities and Configurations. */ ++#define ESPI0B0 0x0B0 /* Channel 3 Capabilities and Configurations. */ ++#define ESPI0B4 0x0B4 /* GPIO Direction of Virtual Wire Channel. */ ++#define ESPI0B8 0x0B8 /* GPIO Selection of Virtual Wire Channel. */ ++#define ESPI0BC 0x0BC /* GPIO Reset Selection of Virtual Wire Channel. */ ++#define ESPI100 0x100 /* Interrupt enable of System Event 1 from Master. */ ++#define ESPI104 0x104 /* System Event 1 from and to Master. */ ++#define ESPI110 0x110 /* Interrupt type 0 of System Event from Master. */ ++#define ESPI114 0x114 /* Interrupt type 1 of System Event from Master. */ ++#define ESPI118 0x118 /* Interrupt type 2 of System Event from Master. */ ++#define ESPI11C 0x11C /* Interrupt status of System Event from Master. */ ++#define ESPI120 0x120 /* Interrupt type 0 of System Event 1 from Master. */ ++#define ESPI124 0x124 /* Interrupt type 1 of System Event 1 from Master. */ ++#define ESPI128 0x128 /* Interrupt type 2 of System Event 1 from Master. */ ++#define ESPI12C 0x12C /* Interrupt status of System Event 1 from Master. */ ++#define ESPICFG004 0x004 /* Device Identification. */ ++#define ESPICFG008 0x008 /* General Capabilities and Configurations. */ ++#define ESPICFG010 0x010 /* Channel 0 Capabilities and Configurations. */ ++#define ESPICFG020 0x020 /* Channel 1 Capabilities and Configurations. */ ++#define ESPICFG030 0x030 /* Channel 2 Capabilities and Configurations. */ ++#define ESPICFG040 0x040 /* Channel 3 Capabilities and Configurations. */ ++#define ESPICFG044 0x044 /* Channel 3 Capabilities and Configurations 2. */ ++#define ESPICFG800 0x800 /* GPIO Direction of Virtual Wire Channel. */ ++#define ESPICFG804 0x804 /* GPIO Selection of Virtual Wire Channel. */ ++#define ESPICFG808 0x808 /* GPIO Reset Selection of Virtual Wire Channel. */ ++#define ESPICFG810 0x810 /* Mapping Src Addr of Peripheral Channel Rx pkt */ ++#define ESPICFG814 0x814 /* Mapping Tgt Addr of Peripheral Channel Rx pkt */ ++#define ESPICFG818 0x818 /* Mapping Addr Mask of Peripheral Channel Rx pkt */ ++ ++/* ESPI000 bits */ ++#define AST_ESPI_OOB_CHRDY BIT(4) ++#define AST_ESPI_FLASH_SW_CHRDY BIT(7) ++#define AST_ESPI_FLASH_SW_READ BIT(10) ++ ++/* ESPI00C bits (Interrupt Enable) */ ++#define AST_ESPI_IEN_HW_RST BIT(31) ++#define AST_ESPI_IEN_SYS1_EV BIT(22) ++#define AST_ESPI_IEN_SYS_EV BIT(8) ++#define AST_ESPI_IEN_GPIO_EV BIT(9) ++ ++/* ESPI008 bits ISR */ ++#define AST_ESPI_VW_SYS_EVT BIT(8) ++#define AST_ESPI_VW_GPIO_EVT BIT(9) ++#define AST_ESPI_VW_SYS_EV1 BIT(22) ++#define AST_ESPI_HW_RST BIT(31) ++ ++/* ESPI080 bits */ ++#define AST_ESPI_AUTO_ACK_HOST_RST_WARN BIT(2) ++#define AST_ESPI_AUTO_ACK_OOB_RST_WARN BIT(1) ++#define AST_ESPI_AUTO_ACK_SUS_WARN BIT(0) ++ ++/* ESPI098 and ESPI11C bits */ ++#define AST_ESPI_OOB_RST_WARN BIT(6) ++#define AST_ESPI_HOST_RST_WARN BIT(8) ++#define AST_ESPI_PLTRSTN BIT(5) ++#define AST_ESPI_OOB_RST_ACK BIT(16) ++#define AST_ESPI_SL_BT_DONE BIT(20) ++#define AST_ESPI_SL_BT_STATUS BIT(23) ++#define AST_ESPI_HOST_RST_ACK BIT(27) ++ ++/* ESPI104 bits */ ++#define AST_ESPI_SUS_WARN BIT(0) ++#define AST_ESPI_SUS_ACK BIT(20) ++ ++/* LPC chip ID */ ++#define SCR0SIO 0x170 ++#define IRQ_SRC_ESPI 74 /* IRQ 74 */ ++ ++static void espi_handshake_ack(void) ++{ ++ /* IRQ only serviced if strapped, so no strap check */ ++ if (!(readl(AST_ESPI_BASE + ESPI098) & AST_ESPI_SL_BT_STATUS)) { ++ DBG_ESPI("Setting espi slave boot done\n"); ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) | ++ AST_ESPI_SL_BT_STATUS | AST_ESPI_SL_BT_DONE; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ } ++ ++ uint32_t sys1_event = readl(AST_ESPI_BASE + ESPI104); ++ if (sys1_event & AST_ESPI_SUS_WARN && ++ !(sys1_event & AST_ESPI_SUS_ACK)) { ++ DBG_ESPI("Boot SUS_WARN, evt: 0x%08x\n", sys1_event); ++ writel(sys1_event | AST_ESPI_SUS_ACK, AST_ESPI_BASE + ESPI104); ++ DBG_ESPI("SUS_WARN sent ack\n"); ++ } ++} ++ ++int espi_irq_handler(struct pt_regs *regs) ++{ ++ uint32_t irq_status = readl(AST_ESPI_BASE + ESPI008); ++ ++ DBG_ESPI("espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x,\ ++ ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x,\ ++ ESPI12c=0X%x, irq_status=0x%x\n", ++ readl(AST_ESPI_BASE + ESPI008), ++ readl(AST_ESPI_BASE + ESPI00C), ++ readl(AST_ESPI_BASE + ESPI100), ++ readl(AST_ESPI_BASE + ESPI11C), ++ readl(AST_ESPI_BASE + ESPI094), ++ readl(AST_ESPI_BASE + ESPI12C), irq_status); ++ ++ if (irq_status & AST_ESPI_VW_SYS_EVT) { ++ uint32_t sys_status = readl(AST_ESPI_BASE + ESPI11C); ++ uint32_t sys_event = readl(AST_ESPI_BASE + ESPI098); ++ ++ DBG_ESPI("sys_status : 0x%08X\n", sys_status); ++ if (sys_status & AST_ESPI_HOST_RST_WARN) { ++ DBG_ESPI("HOST_RST_WARN evt: 0x%08X\n", sys_event); ++ if (sys_event & AST_ESPI_HOST_RST_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) | ++ AST_ESPI_HOST_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ DBG_ESPI("HOST_RST_WARN sent ack\n"); ++ } ++ } ++ if (sys_status & AST_ESPI_OOB_RST_WARN) { ++ DBG_ESPI("OOB_RST_WARN evt: 0x%08X\n", sys_event); ++ if (sys_event & AST_ESPI_OOB_RST_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098) | ++ AST_ESPI_OOB_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ DBG_ESPI("OOB_RST_WARN sent ack\n"); ++ } ++ } ++ if (sys_status & AST_ESPI_PLTRSTN) { ++ DBG_ESPI("PLTRSTN: %c, evt: 0x%08X\n", ++ (sys_event & AST_ESPI_PLTRSTN) ? '1' : '0', ++ sys_event); ++ } ++ writel(sys_status, AST_ESPI_BASE + ESPI11C); /* clear status */ ++ } ++ ++ if (irq_status & AST_ESPI_VW_SYS_EV1) { ++ uint32_t sys1_status = readl(AST_ESPI_BASE + ESPI12C); ++ uint32_t sys1_event = readl(AST_ESPI_BASE + ESPI104); ++ ++ DBG_ESPI("sys1_status : 0x%08X\n", sys1_status); ++ if (sys1_status & AST_ESPI_SUS_WARN) { ++ DBG_ESPI("SUS WARN evt: 0x%08X\n", sys1_event); ++ if (sys1_event & AST_ESPI_SUS_WARN) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI104) | ++ AST_ESPI_SUS_ACK; ++ writel(v, AST_ESPI_BASE + ESPI104); ++ DBG_ESPI("SUS_WARN sent ack\n"); ++ } ++ } ++ writel(sys1_status, AST_ESPI_BASE + ESPI12C); /* clear status */ ++ } ++ ++ if (irq_status & AST_ESPI_HW_RST) { ++ uint32_t v = readl(AST_ESPI_BASE + ESPI000) & 0x00ffffffff; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ v |= 0xff000000; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ DBG_ESPI("HW_RESET\n"); ++ ++ espi_handshake_ack(); ++ } ++ ++ writel(irq_status, AST_ESPI_BASE + ESPI008); /* clear irq_status */ ++ ++ DBG_ESPI("end espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x,\ ++ ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x,\ ++ ESPI12c=0X%x, irq_status=0X%x\n", ++ readl(AST_ESPI_BASE + ESPI008), ++ readl(AST_ESPI_BASE + ESPI00C), ++ readl(AST_ESPI_BASE + ESPI100), ++ readl(AST_ESPI_BASE + ESPI11C), ++ readl(AST_ESPI_BASE + ESPI094), ++ readl(AST_ESPI_BASE + ESPI12C), irq_status); ++ return 0; ++} ++ ++void espi_init(void) ++{ ++ if (~readl(AST_SCU_BASE + AST_SCU_HW_STRAP2) & ++ SCU_HW_STRAP_ESPI_ENABLED) { ++ uint32_t v; ++ ++ DBG_ESPI("espi init\n"); ++ ++ writel(0xff000000, AST_SCU_BASE + 0x454); /* driving strength */ ++ ++ /* Block flash access from Host */ ++ v = readl(AST_ESPI_BASE + ESPI000) & ~AST_ESPI_FLASH_SW_CHRDY; ++ v |= AST_ESPI_FLASH_SW_READ | AST_ESPI_OOB_CHRDY; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ /* ++ * Set SIO register 0x28 to 0xa8 as a faked ASPEED ChipID for ++ * BIOS using in eSPI mode. ++ */ ++ v = readl(AST_LPC_BASE + SCR0SIO) & ~0x000000ff; ++ writel(v, AST_LPC_BASE + SCR0SIO); ++ v = readl(AST_LPC_BASE + SCR0SIO) | 0xa8; ++ writel(v, AST_LPC_BASE + SCR0SIO); ++ ++#if USE_HW_HANDSHAKE ++ v = readl(AST_ESPI_BASE + ESPI098) | ++ AST_ESPI_SL_BT_STATUS | AST_ESPI_SL_BT_DONE; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ ++ return; ++#endif ++ ++ v = readl(AST_ESPI_BASE + ESPI080); ++ v &= ~(AST_ESPI_AUTO_ACK_HOST_RST_WARN | ++ AST_ESPI_AUTO_ACK_OOB_RST_WARN | ++ AST_ESPI_AUTO_ACK_SUS_WARN); ++ writel(v, AST_ESPI_BASE + ESPI080); /* Disable auto H/W ack */ ++ ++ writel(0, AST_ESPI_BASE + ESPI110); ++ writel(0, AST_ESPI_BASE + ESPI114); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | ++ AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI118); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | ++ AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI094); ++ ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE + ESPI120); /* int type 0 susp warn */ ++ writel(0, AST_ESPI_BASE + ESPI124); ++ writel(0, AST_ESPI_BASE + ESPI128); ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE + ++ ESPI100); /* Enable sysev1 ints for susp warn */ ++ ++ writel(AST_ESPI_IEN_HW_RST | AST_ESPI_IEN_SYS1_EV | ++ AST_ESPI_IEN_SYS_EV, AST_ESPI_BASE + ESPI00C); ++ ++ irq_install_handler(IRQ_SRC_ESPI, espi_irq_handler, NULL); ++ } else { ++ DBG_ESPI("No espi strap\n"); ++ } ++} +diff --git a/board/aspeed/ast2600_intel/ast-irq.c b/board/aspeed/ast2600_intel/ast-irq.c +new file mode 100644 +index 000000000000..f817f8cd7c81 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-irq.c +@@ -0,0 +1,399 @@ ++/* ++ * Copyright 2018 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <netdev.h> ++#include <asm/io.h> ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++#define GIC_DISTRIBUTOR_OFFSET 0x1000 ++#define GIC_CPU_OFFSET 0x2000 ++#define GIC_INTERFACE_OFFSET 0x4000 ++#define GIC_VIRT_OFFSET 0x6000 ++ ++#define VIC_STATUS_L 0x80 ++#define VIC_STATUS_H 0x84 ++#define VIC_IRQ_SELECTION_L 0x98 ++#define VIC_IRQ_SELECTION_H 0x9C ++#define VIC_ENABLE_L 0xA0 ++#define VIC_ENABLE_H 0xA4 ++#define VIC_ENABLE_CLEAR_L 0xA8 ++#define VIC_ENABLE_CLEAR_H 0xAC ++#define VIC_INTERRUPT_CLEAR_L 0xD8 ++#define VIC_INTERRUPT_CLEAR_H 0xDC ++ ++#define VIC_CLEAR_ALL (~0) ++ ++/* GIC_DISTRIBUTOR_OFFSET register offsets */ ++#define GICD_CTLR 0x000 ++#define GICD_TYPER 0x004 ++#define GICD_IIDR 0x008 ++#define GICD_IGROUPRn 0x080 ++#define GICD_ISENABLERn 0x100 ++#define GICD_ICENABLERn 0x180 ++#define GICD_ISPENDRn 0x200 ++#define GICD_ICPENDRn 0x280 ++#define GICD_ISACTIVERn 0x300 ++#define GICD_ICACTIVERn 0x380 ++#define GICD_IPRIORITYRn 0x400 ++#define GICD_ITARGETSRn 0x800 ++#define GICD_ICFGRn 0xc00 ++#define GICD_PPISR 0xd00 ++#define GICD_SPISRn 0xd04 ++#define GICD_SGIR 0xf00 ++#define GICD_CPENDINGIRn 0xf10 ++#define GICD_SPENDINGIRn 0xf10 ++#define GICD_PIDR4 0xfd0 ++#define GICD_PIDR5 0xfd4 ++#define GICD_PIDR6 0xfd8 ++#define GICD_PIDR7 0xfdc ++#define GICD_PIDR0 0xfe0 ++#define GICD_PIDR1 0xfe4 ++#define GICD_PIDR2 0xfe8 ++#define GICD_PIDR3 0xfec ++#define GICD_CIDR0 0xff0 ++#define GICD_CIDR1 0xff4 ++#define GICD_CIDR2 0xff8 ++#define GICD_CIDR3 0xffc ++ ++#define GIC_DISTRIBUTOR_IMPLEMENTER_MAGIC 0x0100143b ++ ++/* GIC_CPU_OFFSET register offsets */ ++#define GICC_CTLR 0x0000 ++#define GICC_PMRn 0x0004 ++#define GICC_BPR 0x0008 ++#define GICC_IAR 0x000c ++#define GICC_EOIR 0x0010 ++#define GICC_RPR 0x0014 ++#define GICC_HPPIR 0x0018 ++#define GICC_ABPR 0x001c ++#define GICC_AIAR 0x0020 ++#define GICC_AEOIR 0x0024 ++#define GICC_AHPPIR 0x0028 ++#define GICC_APR0 0x00d0 ++#define GICC_NSAPR0 0x00e0 ++#define GICC_IIDR 0x00fc ++#define GICC_DIR 0x1000 ++ ++#define GIC_CPU_IMPLEMENTER_MAGIC 0x0102143b ++ ++/* GIC_INTERFACE_OFFSET register offsets */ ++#define GICH_HCR 0x000 ++#define GICH_VTR 0x004 ++#define GICH_VMCR 0x008 ++#define GICH_MISR 0x010 ++#define GICH_EISR0 0x020 ++#define GICH_ELSR0 0x020 ++#define GICH_APR0 0x0f0 ++#define GICH_LR0 0x100 ++#define GICH_LR1 0x104 ++#define GICH_LR2 0x108 ++#define GICH_LR3 0x10c ++ ++/* GIC_VIRT_OFFSET register offsets */ ++#define GICV_CTLR 0x0000 ++#define GICV_PMR 0x0004 ++#define GICV_BPR 0x0008 ++#define GICV_IAR 0x000c ++#define GICV_EOIR 0x0010 ++#define GICV_RPR 0x0014 ++#define GICV_HPPIR 0x0018 ++#define GICV_ABPR 0x001c ++#define GICV_AIAR 0x0020 ++#define GICV_AEOIR 0x0024 ++#define GICV_AHPPIR 0x0028 ++#define GICV_APR0 0x00d0 ++#define GICV_NSAPR0 0x00e0 ++#define GICV_IIDR 0x00fc ++#define GICV_DIR 0x1000 ++ ++#define GIC_VIRT_CPU_IMPLEMENTER_MAGIC 0x0102143b ++ ++#define GICD_CTLR_ENABLE 0x03 ++ ++#define GICD_INT_DEF_PRI 0xa0 ++#define GICD_INT_DEF_PRI_X4 (\ ++ (GICD_INT_DEF_PRI << 24) |\ ++ (GICD_INT_DEF_PRI << 16) |\ ++ (GICD_INT_DEF_PRI << 8) |\ ++ GICD_INT_DEF_PRI) ++ ++#define GICD_INT_ACTLOW_LVLTRIG 0 ++#define GICD_INT_EN_CLR_X32 0xffffffff ++#define GICD_INT_EN_CLR_PPI 0xffff0000 ++#define GICD_INT_EN_SET_SGI 0x0000ffff ++ ++#define gicd_readl(OFFSET) readl(gbase + GIC_DISTRIBUTOR_OFFSET + (OFFSET)) ++#define gicd_writel(VALUE, OFFSET) \ ++ writel((VALUE), gbase + GIC_DISTRIBUTOR_OFFSET + (OFFSET)) ++#define gicc_readl(OFFSET) readl(gbase + GIC_CPU_OFFSET + (OFFSET)) ++#define gich_readl(OFFSET) readl(gbase + GIC_INTERFACE_OFFSET + (OFFSET)) ++#define gicv_readl(OFFSET) readl(gbase + GIC_VIRT_OFFSET + (OFFSET)) ++ ++static size_t max_irq = 0; ++ ++#define ITLINES_MASK 0x1f ++#define ITLINES_SHIFT 5 ++ ++#define GIC_MAX_IRQ 1020 ++static interrupt_handler_t *handlers[GIC_MAX_IRQ] = {NULL}; ++static unsigned long irq_total = 0; ++static unsigned long irq_counts[GIC_MAX_IRQ] = {0}; ++static uint32_t gbase = 0; ++ ++/* TODO: This, hard-coded, or from dts? */ ++static inline uint32_t gic_base(void) ++{ ++ uint32_t base; ++ /* read the base address of the private peripheral space */ ++ __asm__ __volatile__("mrc p15, 4, %r0, c15, c0, 0\n\t" : "=r"(base) : ); ++ return base; ++} ++ ++static void enable_gic(void) ++{ ++ uint32_t gicd_ctlr; ++ ++ /* add GIC offset ref table 1-3 for interrupt distributor address */ ++ gicd_ctlr = gicd_readl(GICD_CTLR); ++ gicd_writel(gicd_ctlr | GICD_CTLR_ENABLE, GICD_CTLR); ++} ++ ++static void disable_gic(void) ++{ ++ uint32_t gicd_ctlr; ++ ++ /* add GIC offset ref table 1-3 for interrupt distributor address */ ++ gicd_ctlr = gicd_readl(GICD_CTLR); ++ gicd_writel(gicd_ctlr & ~GICD_CTLR_ENABLE, GICD_CTLR); ++} ++ ++static void enable_irq_id(unsigned int id) ++{ ++ uint32_t grp = id >> ITLINES_SHIFT; ++ uint32_t grp_bit = 1 << (id & ITLINES_MASK); ++ gicd_writel(grp_bit, GICD_ISENABLERn + grp * sizeof(uint32_t)); ++} ++ ++static void disable_irq_id(unsigned int id) ++{ ++ uint32_t grp = id >> ITLINES_SHIFT; ++ uint32_t grp_bit = 1 << (id & ITLINES_MASK); ++ gicd_writel(grp_bit, GICD_ICENABLERn + grp * sizeof(uint32_t)); ++} ++ ++static int gic_probe(void) ++{ ++ int i; ++ gbase = gic_base(); ++ enable_gic(); ++ ++ if (gicd_readl(GICD_IIDR) != GIC_DISTRIBUTOR_IMPLEMENTER_MAGIC && ++ gicc_readl(GICC_IIDR) != GIC_CPU_IMPLEMENTER_MAGIC && ++ gicv_readl(GICV_IIDR) != GIC_VIRT_CPU_IMPLEMENTER_MAGIC) ++ { ++ return 0; ++ } ++ /* GIC supports up to 1020 lines */ ++ max_irq = ((gicd_readl(GICD_TYPER) & ITLINES_MASK) + 1) << ITLINES_SHIFT; ++ if (max_irq > GIC_MAX_IRQ) ++ max_irq = GIC_MAX_IRQ; ++ /* set all lines to be level triggered N-N */ ++ for (i = 32; i < max_irq; i += 16) ++ gicd_writel(0, GICD_ICFGRn + i / 4); ++ ++ /* Set priority on all interrupts. */ ++ for (i = 0; i < max_irq; i += 4) ++ gicd_writel(GICD_INT_DEF_PRI_X4, GICD_IPRIORITYRn + i); ++ ++ /* Deactivate and disable all SPIs. */ ++ for (i = 32; i < max_irq; i += 32) { ++ gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICACTIVERn + i / 8); ++ gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICENABLERn + i / 8); ++ } ++ gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICACTIVERn); ++ gicd_writel(GICD_INT_EN_CLR_PPI, GICD_ICENABLERn); ++ gicd_writel(GICD_INT_EN_SET_SGI, GICD_ISENABLERn); ++ ++ return 0; ++} ++ ++void irq_free_handler (int irq); ++static void gic_shutdown(void) ++{ ++ int i; ++ for (i = 0; i < max_irq; i++) ++ { ++ irq_free_handler(i); ++ } ++ disable_gic(); ++} ++ ++int arch_interrupt_init_early(void) ++{ ++ return 0; ++} ++ ++int arch_interrupt_init(void) ++{ ++ int i; ++ for (i = 0; i < GIC_MAX_IRQ; i++) ++ { ++ handlers[i] = NULL; ++ irq_counts[i] = 0; ++ } ++ return gic_probe(); ++} ++ ++int arch_interrupt_fini(void) ++{ ++ gic_shutdown(); ++ return 0; ++} ++ ++int interrupt_init (void) ++{ ++ /* ++ * setup up stacks if necessary ++ */ ++ IRQ_STACK_START_IN = gd->irq_sp + 8; ++ ++ printf("%s()\n", __FUNCTION__); ++ return arch_interrupt_init(); ++ ++ return 0; ++} ++ ++int global_interrupts_enabled (void) ++{ ++ unsigned long cpsr; ++ __asm__ __volatile__("mrs %0, cpsr\n" ++ : "=r" (cpsr) ++ : ++ : "memory"); ++ ++ return (cpsr & 0x80) == 0; ++} ++ ++void enable_interrupts (void) ++{ ++ unsigned long cpsr; ++ __asm__ __volatile__("mrs %0, cpsr\n" ++ "bic %0, %0, #0x80\n" ++ "msr cpsr_c, %0" ++ : "=r" (cpsr) ++ : ++ : "memory"); ++ ++ return; ++} ++ ++int disable_interrupts (void) ++{ ++ unsigned long cpsr, temp; ++ __asm__ __volatile__("mrs %0, cpsr\n" ++ "orr %1, %0, #0xc0\n" ++ "msr cpsr_c, %1" ++ : "=r" (cpsr), "=r" (temp) ++ : ++ : "memory"); ++ return (cpsr & 0x80) == 0; ++} ++ ++void irq_install_handler(int irq, interrupt_handler_t *handler, void *ctx) ++{ ++ if (irq > max_irq) { ++ printf("irq %d out of range\n", irq); ++ return; ++ } ++ if (handlers[irq]) { ++ printf("irq %d already in use (%p)\n", irq, handlers[irq]); ++ return; ++ } ++ printf("registering handler for irq %d\n", irq); ++ handlers[irq] = handler; ++ enable_irq_id(irq); ++} ++ ++void irq_free_handler (int irq) ++{ ++ if (irq >= max_irq) { ++ printf("irq %d out of range\n", irq); ++ return; ++ } ++ if (handlers[irq]) { ++ handlers[irq] = NULL; ++ disable_irq_id(irq); ++ } ++} ++ ++int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) ++{ ++ int i; ++ int enabled = global_interrupts_enabled(); ++ printf("GIC base = 0x%x\n", gbase); ++ printf("interrupts %sabled\n", (enabled ? "en" : "dis")); ++ uint32_t grp_en = 0; ++ for (i = 0; i < max_irq; i++) { ++ if ((i & ITLINES_MASK) == 0) ++ grp_en = gicd_readl(GICD_ISENABLERn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ int irq_enabled = grp_en & (1 << (i & ITLINES_MASK)); ++ if (!irq_enabled) ++ continue; ++ printf("% 2i (% 3s): %lu\n", i, ++ (irq_enabled ? "on" : "off"), irq_counts[i]); ++ } ++ printf("total: %lu\n", irq_total); ++ return 0; ++} ++ ++void do_irq(struct pt_regs *pt_regs) ++{ ++ int i; ++ if (!gbase) { ++ static int printed_msg = 0; ++ if (!printed_msg) ++ { ++ printed_msg = 1; ++ printf("interrupt before configured!\n"); ++ } ++ return; ++ } ++ irq_total++; ++ uint32_t grp_pend = 0; ++ for (i = 0; i < max_irq; i++) { ++ /* limit reads of the pending register to once in 32 */ ++ if ((i & ITLINES_MASK) == 0) ++ grp_pend = gicd_readl(GICD_ISPENDRn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ uint32_t pending = grp_pend & (1 << (i & ITLINES_MASK)); ++ if (pending) { ++ irq_counts[i]++; ++ /* mask via GICD_ICENABLERn */ ++ gicd_writel(pending, GICD_ICENABLERn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ if (handlers[i]) { ++ handlers[i](pt_regs); ++ /* unmask via GICD_ISENABLERn */ ++ gicd_writel(pending, GICD_ISENABLERn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ /* clear pending via GICD_ICPENDRn */ ++ gicd_writel(pending, GICD_ICPENDRn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ } else { ++ printf("unexpected interrupt %i; masking\n", i); ++ /* clear pending via GICD_ICPENDRn */ ++ gicd_writel(pending, GICD_ISPENDRn + ++ (i >> ITLINES_SHIFT) * sizeof(uint32_t)); ++ } ++ } ++ } ++} +diff --git a/board/aspeed/ast2600_intel/ast-irq.h b/board/aspeed/ast2600_intel/ast-irq.h +new file mode 100644 +index 000000000000..9957f2baa7ff +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-irq.h +@@ -0,0 +1,8 @@ ++#ifndef _AST_IRQ_H_ ++#define _AST_IRQ_H_ ++ ++int request_irq(int irq, interrupt_handler_t *handler); ++int release_irq(int irq); ++int arch_interrupt_init_early(void); ++ ++#endif +diff --git a/board/aspeed/ast2600_intel/ast-timer.c b/board/aspeed/ast2600_intel/ast-timer.c +new file mode 100644 +index 000000000000..cf8c69aba5d3 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-timer.c +@@ -0,0 +1,59 @@ ++/* ++ * Copyright 2019 Intel Corporation ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include <common.h> ++#include <asm/io.h> ++ ++static const int timer_irqs[] = {48, 49, 50, 51, 52, 53, 54, 55}; ++#define AST_TIMER_BASE 0x1e782000 ++/* offsets from AST_TIMER_BASE for each timer */ ++static const uint32_t timer_bases[] = {0, 0x10, 0x20, 0x40, ++ 0x50, 0x60, 0x70, 0x80}; ++#define TIMER_1MHZ_CLK_COUNT 1000000u ++#define TIMER_ENABLE 1 ++#define TIMER_1MHZ_CLK_SEL 2 ++#define TIMER_ENABLE_IRQ 4 ++#define TIMER_RESET_BY_WDT 8 ++#define TIMER_CONTROL 0x30 ++#define TIMER_RELOAD 0x04 ++#define TIMER_CONTROL_CLEAR 0x3c ++ ++void timer_disable(int n) ++{ ++ if (n < 0 || n > 7) { ++ return; ++ } ++ uint32_t tctrl = 0xf << (n * 4); ++ writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL_CLEAR); ++} ++ ++void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler) ++{ ++ if (n < 0 || n > 7) { ++ return; ++ } ++ if (!freq) ++ return; ++ ++ timer_disable(n); ++ ++ uint32_t v = TIMER_1MHZ_CLK_COUNT / freq; ++ writel(v, AST_TIMER_BASE + timer_bases[n] + TIMER_RELOAD); ++ ++ uint32_t tctrl = ( ++ TIMER_ENABLE | ++ TIMER_1MHZ_CLK_SEL | ++ TIMER_RESET_BY_WDT) << (n * 4); ++ ++ if (handler) { ++ irq_install_handler(timer_irqs[n], handler, NULL); ++ tctrl |= (TIMER_ENABLE_IRQ << (n * 4)); ++ } ++ writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL); ++} +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index be6dc49a3bc7..fc0e41a47712 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -1,222 +1,193 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-/* +- * Copyright (C) ASPEED Technology Inc. +- */ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2019-2021, Intel Corporation. ++ ++/* Intel customizations of Das U-Boot */ + #include <common.h> ++#include <asm/gpio.h> + #include <asm/io.h> + +-/* SCU registers */ +-#define SCU_BASE 0x1e6e2000 +-#define SCU_PINMUX4 (SCU_BASE + 0x410) +-#define SCU_PINMUX4_RGMII3TXD1 BIT(19) +-#define SCU_PINMUX5 (SCU_BASE + 0x414) +-#define SCU_PINMUX5_SGPMI BIT(27) +-#define SCU_PINMUX5_SGPMO BIT(26) +-#define SCU_PINMUX5_SGPMLD BIT(25) +-#define SCU_PINMUX5_SGPMCK BIT(24) +-#define SCU_GPIO_PD0 (SCU_BASE + 0x610) +-#define SCU_GPIO_PD0_B6 BIT(14) +-#define SCU_PINMUX27 (SCU_BASE + 0x69c) +-#define SCU_PINMUX27_HBLED_EN BIT(31) +- +-/* eSPI registers */ +-#define ESPI_BASE 0x1e6ee000 +-#define ESPI_CTRL (ESPI_BASE + 0x0) +-#define ESPI_INT_EN (ESPI_BASE + 0xc) +-#define ESPI_CTRL2 (ESPI_BASE + 0x80) +-#define ESPI_SYSEVT_INT_EN (ESPI_BASE + 0x94) +-#define ESPI_SYSEVT1_INT_EN (ESPI_BASE + 0x100) +-#define ESPI_SYSEVT_INT_T0 (ESPI_BASE + 0x110) +-#define ESPI_SYSEVT_INT_T1 (ESPI_BASE + 0x114) +-#define ESPI_SYSEVT1_INT_T0 (ESPI_BASE + 0x120) +- +-/* LPC registers */ +-#define LPC_BASE 0x1e789000 +-#define LPC_HICR5 (LPC_BASE + 0x80) +-#define LPC_HICR5_SIO80HGPIO_EN BIT(31) +-#define LPC_HICR5_80HGPIO_EN BIT(30) +-#define LPC_HICR5_80HGPIO_SEL_MASK GENMASK(28, 24) +-#define LPC_HICR5_80HGPIO_SEL_SHIFT 24 +-#define LPC_HICR5_SNP0_INT_EN BIT(1) +-#define LPC_HICR5_SNP0_EN BIT(0) +-#define LPC_HICR6 (LPC_BASE + 0x84) +-#define LPC_HICR6_STS_SNP1 BIT(1) +-#define LPC_HICR6_STS_SNP0 BIT(0) +-#define LPC_SNPWADR (LPC_BASE + 0x90) +-#define LPC_SNPWADR_SNP0_MASK GENMASK(15, 0) +-#define LPC_SNPWADR_SNP0_SHIFT 0 +-#define LPC_HICRB (LPC_BASE + 0x100) +-#define LPC_HICRB_80HSGPIO_EN BIT(13) +- +-/* GPIO/SGPIO registers */ +-#define GPIO_BASE 0x1e780000 +-#define GPIO_ABCD_VAL (GPIO_BASE + 0x0) +-#define GPIO_ABCD_VAL_D4 BIT(28) +-#define GPIO_ABCD_VAL_C5 BIT(21) +-#define GPIO_ABCD_VAL_C3 BIT(19) +-#define GPIO_ABCD_DIR (GPIO_BASE + 0x4) +-#define GPIO_ABCD_DIR_D4 BIT(28) +-#define GPIO_ABCD_DIR_C5 BIT(21) +-#define GPIO_ABCD_DIR_C3 BIT(19) +-#define GPIO_EFGH_DIR (GPIO_BASE + 0x24) +-#define GPIO_EFGH_DIR_G6 BIT(22) +-#define SGPIO_M1_CONF (GPIO_BASE + 0x554) +-#define SGPIO_M1_CONF_CLKDIV_MASK GENMASK(31, 16) +-#define SGPIO_M1_CONF_CLKDIV_SHIFT 16 +-#define SGPIO_M1_PINS_MASK GENMASK(10, 6) +-#define SGPIO_M1_PINS_SHIFT 6 +-#define SPGIO_M1_EN BIT(0) +- +-#define LPC_HICR5_UNKVAL_MASK 0x1FFF0000 /* bits with unknown values on reset */ +- +-static void snoop_init(void) ++/* use GPIOC0 on intel boards */ ++#define FFUJ_GPIO "gpio@1e78000016" ++ ++int read_ffuj(void) ++{ ++ struct gpio_desc desc; ++ int ret; ++ ++ ret = dm_gpio_lookup_name(FFUJ_GPIO, &desc); ++ if (ret) ++ return ret; ++ ret = dm_gpio_request(&desc, "ffuj"); ++ if (ret) ++ return ret; ++ ret = dm_gpio_set_dir_flags(&desc, GPIOD_ACTIVE_LOW); ++ if (ret) ++ return ret; ++ ret = dm_gpio_get_value(&desc); ++ dm_gpio_free(desc.dev, &desc); ++ return ret; ++} ++ ++/* gpio_abort is a weak symbol in common/autoboot.c */ ++int gpio_abort(void) ++{ ++ int value; ++ /* check ffuj to abort the autoboot */ ++ value = read_ffuj(); ++ printf("FFUJ: %d\n", value); ++ return value <= 0 ? 0 : 1; ++} ++ ++#define SCU_BASE 0x1E6E2000 ++int misc_init_r(void) ++{ ++ /* This is called near the end of the _r init sequence */ ++ ++ return 0; ++} ++ ++#define SCU_418 0x418 /* Multi-function Pin Control #6 */ ++#define SCU_418_PBIO_MASK GENMASK(6, 5) ++#define SCU_4bc 0x4bc /* Multi-function Pin Control #20 */ ++#define SCU_4bc_PASSTHRU0_MASK GENMASK(25, 24) ++#define SCU_4bc_PASSTHRU1_MASK GENMASK(27, 26) ++#define SCU_4bc_PASSTHRU2_MASK GENMASK(29, 28) ++ ++static void gpio_passthru_init(void) + { +- u32 val; ++ writel(readl(SCU_BASE | SCU_4bc) | ++ SCU_4bc_PASSTHRU0_MASK | SCU_4bc_PASSTHRU1_MASK, ++ SCU_BASE | SCU_4bc); ++ writel(readl(SCU_BASE | SCU_418) | SCU_418_PBIO_MASK, ++ SCU_BASE | SCU_418); ++} + ++#define AST_LPC_BASE 0x1e789000 ++#define LPC_SNOOP_ADDR 0x80 ++#define HICR5 0x080 /* Host Interface Control Register 5 */ ++#define HICR6 0x084 /* Host Interface Control Register 6 */ ++#define SNPWADR 0x090 /* LPC Snoop Address Register */ ++#define HICRB 0x100 /* Host Interface Control Register B */ ++ ++/* HICR5 Bits */ ++#define HICR5_EN_SIOGIO (1 << 31) /* Enable SIOGIO */ ++#define HICR5_EN80HGIO (1 << 30) /* Enable 80hGIO */ ++#define HICR5_SEL80HGIO (0x1f << 24) /* Select 80hGIO */ ++#define SET_SEL80HGIO(x) ((x & 0x1f) << 24) /* Select 80hGIO Offset */ ++#define HICR5_UNKVAL_MASK 0x1FFF0000 /* Bits with unknown values on reset */ ++#define HICR5_ENINT_SNP0W (1 << 1) /* Enable Snooping address 0 */ ++#define HICR5_EN_SNP0W (1 << 0) /* Enable Snooping address 0 */ ++ ++/* HRCR6 Bits */ ++#define HICR6_STR_SNP0W (1 << 0) /* Interrupt Status Snoop address 0 */ ++#define HICR6_STR_SNP1W (1 << 1) /* Interrupt Status Snoop address 1 */ ++ ++/* HICRB Bits */ ++#define HICRB_EN80HSGIO (1 << 13) /* Enable 80hSGIO */ ++#define HICRB_ENSNP0D (1 << 14) /* Enable ACCEPT response for snoop #0 */ ++ ++static void port80h_snoop_init(void) ++{ ++ uint32_t value; ++ /* enable port80h snoop and sgpio */ + /* set lpc snoop #0 to port 0x80 */ +- val = readl(LPC_SNPWADR) & 0xffff0000; +- val |= ((0x80 << LPC_SNPWADR_SNP0_SHIFT) & +- LPC_SNPWADR_SNP0_MASK); +- writel(val, LPC_SNPWADR); ++ value = readl(AST_LPC_BASE + SNPWADR) & 0xffff0000; ++ writel(value | LPC_SNOOP_ADDR, AST_LPC_BASE + SNPWADR); + + /* clear interrupt status */ +- val = readl(LPC_HICR6); +- val |= (LPC_HICR6_STS_SNP0 | +- LPC_HICR6_STS_SNP1); +- writel(val, LPC_HICR6); ++ value = readl(AST_LPC_BASE + HICR6); ++ value |= HICR6_STR_SNP0W | HICR6_STR_SNP1W; ++ writel(value, AST_LPC_BASE + HICR6); + + /* enable lpc snoop #0 and SIOGIO */ +- val = readl(LPC_HICR5); +- val |= (LPC_HICR5_SIO80HGPIO_EN | +- LPC_HICR5_SNP0_EN); +- writel(val, LPC_HICR5); ++ value = readl(AST_LPC_BASE + HICR5) & ~(HICR5_UNKVAL_MASK); ++ value |= HICR5_EN_SIOGIO | HICR5_EN_SNP0W; ++ writel(value, AST_LPC_BASE + HICR5); + + /* enable port80h snoop on SGPIO */ +- val = readl(LPC_HICRB); +- val |= LPC_HICRB_80HSGPIO_EN; +- writel(val, LPC_HICRB); ++ value = readl(AST_LPC_BASE + HICRB) | HICRB_EN80HSGIO | HICRB_ENSNP0D; ++ writel(value, AST_LPC_BASE + HICRB); + } + ++#define AST_GPIO_BASE 0x1e780000 ++ + static void sgpio_init(void) + { + #define SGPIO_CLK_DIV(N) ((N) << 16) + #define SGPIO_BYTES(N) ((N) << 6) + #define SGPIO_ENABLE 1 ++#define GPIO554 0x554 ++#define SCU_414 0x414 /* Multi-function Pin Control #5 */ + #define SCU_414_SGPM_MASK GENMASK(27, 24) + +- /* set the sgpio clock to pclk/(2*(5+1)) or ~2 MHz */ +- u32 val; +- +- val = ((256 << SGPIO_M1_CONF_CLKDIV_SHIFT) & SGPIO_M1_CONF_CLKDIV_MASK) | +- ((10 << SGPIO_M1_PINS_SHIFT) & SGPIO_M1_PINS_MASK) | +- SPGIO_M1_EN; +- writel(val, SGPIO_M1_CONF); ++ uint32_t value; ++ /* set the sgpio clock to 2MHz */ ++ value = SGPIO_CLK_DIV(24) | SGPIO_BYTES(10) | SGPIO_ENABLE; ++ writel(value, AST_GPIO_BASE + GPIO554); ++ writel(readl(SCU_BASE | SCU_414) | SCU_414_SGPM_MASK, ++ SCU_BASE | SCU_414); ++} + +- val = readl(SCU_PINMUX5); +- val |= (SCU_PINMUX5_SGPMI | +- SCU_PINMUX5_SGPMO | +- SCU_PINMUX5_SGPMLD | +- SCU_PINMUX5_SGPMCK); +- writel(val, SCU_PINMUX5); ++static void timer_handler(void *regs) ++{ ++ printf("+"); + } + +-static void gpio_init(void) ++extern int arch_interrupt_init_early(void); ++int board_early_init_f(void) + { +- /* Default setting of Y23 pad in AST2600 A1 is HBLED so disable it. */ +- writel(readl(SCU_PINMUX27) & ~SCU_PINMUX27_HBLED_EN, +- SCU_PINMUX27); +- +- /* +- * Set GPIOC3 as an output with value high explicitly since it doesn't +- * have an external pull up. It uses direct register access because +- * it's called from board_early_init_f(). +- */ +- writel(readl(SCU_PINMUX4) & ~SCU_PINMUX4_RGMII3TXD1, +- SCU_PINMUX4); +- writel(readl(GPIO_ABCD_DIR) | GPIO_ABCD_DIR_C3, +- GPIO_ABCD_DIR); +- writel(readl(GPIO_ABCD_VAL) | GPIO_ABCD_VAL_C3, +- GPIO_ABCD_VAL); +- +- writel(readl(SCU_GPIO_PD0) | SCU_GPIO_PD0_B6, SCU_GPIO_PD0); +- +- /* +- * GPIO C5 has a connection between BMC(3.3v) and CPU(1.0v) so if we +- * set it as an logic high output, it will be clipped by a protection +- * circuit in the CPU and eventually the signal will be detected as +- * logic low. So we leave this GPIO as an input so that the signal +- * can be pulled up by a CPU internal resister. The signal will be +- * 1.0v logic high resultingy. +- */ +- writel(readl(GPIO_ABCD_DIR) & ~GPIO_ABCD_DIR_C5, +- GPIO_ABCD_DIR); +- +- /* +- * Set GPIOD4 as an output with value low explicitly to set the +- * default SPD mux path to CPU and DIMMs. +- */ +- writel(readl(GPIO_ABCD_DIR) | GPIO_ABCD_DIR_D4, +- GPIO_ABCD_DIR); +- writel(readl(GPIO_ABCD_VAL) & ~GPIO_ABCD_VAL_D4, +- GPIO_ABCD_VAL); +- +- /* GPIO G6 is also an open-drain output so set it as an input. */ +- writel(readl(GPIO_EFGH_DIR) & ~GPIO_EFGH_DIR_G6, +- GPIO_EFGH_DIR); ++ /* This is called before relocation; beware! */ ++ /* initialize running timer? timer_init is next in the list but ++ * I am not sure if it actually does anything... */ ++ arch_interrupt_init_early(); ++ ++ gpio_passthru_init(); ++ ++ port80h_snoop_init(); ++ ++ sgpio_init(); ++ ++ /* TODO: is it too late to enforce HW security registers? */ ++ return 0; + } + +-static void espi_init(void) ++extern void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler); ++int board_early_init_r(void) + { +- u32 reg; +- +- /* +- * Aspeed STRONGLY NOT recommend to use eSPI early init. +- * +- * This eSPI early init sequence merely set OOB_FREE. It +- * is NOT able to actually handle OOB requests from PCH. +- * +- * During the power on stage, PCH keep waiting OOB_FREE +- * to continue its booting. In general, OOB_FREE is set +- * when BMC firmware is ready. That is, the eSPI kernel +- * driver is mounted and ready to serve eSPI. However, +- * it means that PCH must wait until BMC kernel ready. +- * +- * For customers that request PCH booting as soon as +- * possible. You may use this early init to set OOB_FREE +- * to prevent PCH from blocking by OOB_FREE before BMC +- * kernel ready. +- * +- * If you are not sure what you are doing, DO NOT use it. +- */ +- reg = readl(ESPI_CTRL); +- reg |= 0xef; +- writel(reg, ESPI_CTRL); +- +- writel(0x0, ESPI_SYSEVT_INT_T0); +- writel(0x0, ESPI_SYSEVT_INT_T1); +- +- reg = readl(ESPI_INT_EN); +- reg |= 0x80000000; +- writel(reg, ESPI_INT_EN); +- +- writel(0xffffffff, ESPI_SYSEVT_INT_EN); +- writel(0x1, ESPI_SYSEVT1_INT_EN); +- writel(0x1, ESPI_SYSEVT1_INT_T0); +- +- reg = readl(ESPI_CTRL2); +- reg |= 0x50; +- writel(reg, ESPI_CTRL2); +- +- reg = readl(ESPI_CTRL); +- reg |= 0x10; +- writel(reg, ESPI_CTRL); ++ debug("board_early_init_r\n"); ++ /* timer_enable(0, 1, timer_handler); */ ++ ++ return 0; + } + +-int board_early_init_f(void) ++extern void espi_init(void); ++int board_late_init(void) + { +- snoop_init(); +- gpio_init(); +- sgpio_init(); + espi_init(); ++ + return 0; + } ++ ++/* aspeed/board.c defines these functions ++int arch_early_init_r(void) ++{ ++ return 0; ++} ++*/ ++ ++/* ++void board_init(void) ++{ ++} ++*/ ++ ++#ifdef CONFIG_WATCHDOG ++/* watchdog stuff */ ++void watchdog_init(void) ++{ ++} ++ ++void watchdog_reset(void) ++{ ++} ++#endif +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 1d2aa3a179a7..7599dd052df2 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -1888,7 +1888,7 @@ config CMD_DIAG + + config CMD_IRQ + bool "irq - Show information about interrupts" +- depends on !ARM && !MIPS && !SH ++ depends on !MIPS && !SH + help + This enables two commands: + +diff --git a/common/autoboot.c b/common/autoboot.c +index 94133eaeda78..5e69000b848b 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -255,10 +255,20 @@ static int __abortboot(int bootdelay) + } + # endif /* CONFIG_AUTOBOOT_KEYED */ + ++int gpio_abort(void) __attribute__((weak)); ++int gpio_abort(void) ++{ ++ return 0; ++} ++ + static int abortboot(int bootdelay) + { + int abort = 0; + ++ abort = gpio_abort(); ++ if (abort) ++ return abort; ++ + if (bootdelay >= 0) + abort = __abortboot(bootdelay); + +diff --git a/configs/ast2600_openbmc_defconfig b/configs/ast2600_openbmc_defconfig +index 179e3b005768..90735feec921 100644 +--- a/configs/ast2600_openbmc_defconfig ++++ b/configs/ast2600_openbmc_defconfig +@@ -35,7 +35,7 @@ CONFIG_FIT=y + CONFIG_USE_BOOTARGS=y + CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" + CONFIG_USE_BOOTCOMMAND=y +-CONFIG_BOOTCOMMAND="bootm 20100000" ++CONFIG_BOOTCOMMAND="bootm 20080000" + CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y + CONFIG_DISPLAY_BOARDINFO_LATE=y + CONFIG_ARCH_EARLY_INIT_R=y +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0002-AST2600-Enable-host-searial-port-clock-configuration.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0002-AST2600-Enable-host-searial-port-clock-configuration.patch new file mode 100644 index 000000000..cd09ab4f0 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0002-AST2600-Enable-host-searial-port-clock-configuration.patch @@ -0,0 +1,71 @@ +From 816ae827f387922e31281c8b10988870ce9e0294 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Tue, 10 Dec 2019 14:58:10 +0800 +Subject: [PATCH] AST2600: Enable host searial port clock configuration in + u-boot + +In u-boot could read env variable "hostsearialcfg" and set the corresponding +clock for host searail port. + +Tested: +setenv hostsearialcfg 1, speed is set to 192Mhz (baud rate 921600) +other value, speed is set to 24Mhz(baud rate 115200) +by default is 24Mhz. + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 35 ++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 4a40a050c3da..d1ac8651ac6c 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -39,9 +39,44 @@ int gpio_abort(void) + } + + #define SCU_BASE 0x1E6E2000 ++#define SCU_338 0x338 //Generate UART 24 MHz Reference from UXCLK ++#define SCU_33C 0x33c //Generate UART 24 MHz Reference from HUXCLK ++#define SCU_338_R_VALUE_192MHZ 0x8e ++#define SCU_338_N_VALUE_192MHZ 0x3c3 ++#define SCU_338_R_VALUE_24MHZ 0x06 ++#define SCU_338_N_VALUE_24MHZ 0x145 ++#define HOST_SERIAL_HIGH_SPEED_192MHZ 1 ++#define R_VALUE_BITS 8 ++#define V_VALUE_BITS 10 ++#define R_V_VALUE_MASK (1 << (R_VALUE_BITS + V_VALUE_BITS)) ++ + int misc_init_r(void) + { + /* This is called near the end of the _r init sequence */ ++ /* By default host serail is set 24Mhz */ ++ uint32_t host_serial_cfg = 0; ++ char *host_serial_cfg_txt = NULL; ++ ++ /* Config the uart clock source based on environment configuration */ ++ host_serial_cfg_txt = env_get("hostserialcfg"); ++ ++ if (host_serial_cfg_txt != NULL) ++ host_serial_cfg = simple_strtoul(host_serial_cfg_txt, NULL, 16); ++ ++ if (host_serial_cfg > HOST_SERIAL_HIGH_SPEED_192MHZ || host_serial_cfg < 0) { ++ printf("Invalid hostserialcfg %x, 24Mhz is set by default!\n", host_serial_cfg); ++ host_serial_cfg = 0; ++ } ++ ++ if (host_serial_cfg & HOST_SERIAL_HIGH_SPEED_192MHZ) { ++ writel((readl(SCU_BASE | SCU_338) & R_V_VALUE_MASK) | ++ (SCU_338_N_VALUE_192MHZ << R_VALUE_BITS) | SCU_338_R_VALUE_192MHZ, ++ SCU_BASE | SCU_338); ++ } else { ++ writel((readl(SCU_BASE | SCU_338) & R_V_VALUE_MASK) | ++ (SCU_338_N_VALUE_24MHZ << R_VALUE_BITS) | SCU_338_R_VALUE_24MHZ, ++ SCU_BASE | SCU_338); ++ } + + return 0; + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0003-ast2600-intel-layout-environment-addr.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0003-ast2600-intel-layout-environment-addr.patch new file mode 100644 index 000000000..c56fd872d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0003-ast2600-intel-layout-environment-addr.patch @@ -0,0 +1,66 @@ +From 665675336251d1daac56ce80d0490a8f71d13411 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Thu, 12 Dec 2019 12:54:18 +0800 +Subject: [PATCH] ast2600: intel-layout-environment-addr + +Tested: +Both kernel and u-boot work at the area /dev/mtd/u-boot-env + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + common/board_r.c | 11 +++++++++-- + include/configs/aspeed-common.h | 11 ++++++++++- + 2 files changed, 19 insertions(+), 3 deletions(-) + +diff --git a/common/board_r.c b/common/board_r.c +index 472987d5d52f..434c0df45c85 100644 +--- a/common/board_r.c ++++ b/common/board_r.c +@@ -433,10 +433,17 @@ static int should_load_env(void) + static int initr_env(void) + { + /* initialize environment */ +- if (should_load_env()) ++ if (should_load_env()) { ++ /* ++ * try again, in case the environment failed to load the first ++ * time ++ */ ++ if (!gd->env_valid) ++ env_init(); + env_relocate(); +- else ++ } else { + set_default_env(NULL, 0); ++ } + #ifdef CONFIG_OF_CONTROL + env_set_hex("fdtcontroladdr", + (unsigned long)map_to_sysmem(gd->fdt_blob)); +diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h +index 8f404570b1fb..183a7a502e9c 100644 +--- a/include/configs/aspeed-common.h ++++ b/include/configs/aspeed-common.h +@@ -67,9 +67,18 @@ + #endif + + #ifndef CONFIG_ENV_OFFSET +-#define CONFIG_ENV_OFFSET 0xF0000 ++#define CONFIG_ENV_OFFSET 0x2400000 + #endif + ++#define CONFIG_SYS_REDUNDAND_ENVIRONMENT ++#define CONFIG_ENV_OVERWRITE ++ ++#define AST_FMC_CS0_BASE 0x20000000 /* CS0 */ ++#define CONFIG_ENV_ADDR (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET) ++#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) ++#define CONFIG_ENV_ADDR_REDUND (AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET_REDUND) ++#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE ++ + #define CONFIG_ENV_SECT_SIZE (4 << 10) + + /* +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch new file mode 100644 index 000000000..60929ccb0 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch @@ -0,0 +1,111 @@ +From a7c85034b4a0a7e061930f27a6ec561d23d97cc6 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 3 Jan 2020 15:14:09 -0800 +Subject: [PATCH] AST2600: Adjust default GPIO settings + +- Disabled GPIOC3 to prevent unexpected host failures. +- Fixed GPIOC5, GPIOD4, GPIOG6, GPIOI0~7, GPIOL6~7 and GPIO_S3 + directions and default values. +- Disabled internal pull-down of GPIOB6. +- Disabled HBLED. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 74 ++++++++++++++++++++++++++++++ + 1 file changed, 74 insertions(+) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index d1ac8651ac6c..14a20b27e178 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -162,6 +162,78 @@ static void sgpio_init(void) + SCU_BASE | SCU_414); + } + ++#define SCU_410 0x410 /* Multi-function Pin Control #4 */ ++#define SCU_69C 0x69C /* Multi-function Pin Control #27 */ ++#define SCU_69C_HBLED_EN BIT(31) ++#define GPIO_000 0x000 /* GPIO A/B/C/D Value */ ++#define GPIO_004 0x004 /* GPIO A/B/C/D Direction */ ++#define GPIO_020 0x020 /* GPIO E/F/G/H Value */ ++#define GPIO_024 0x024 /* GPIO E/F/G/H Direction */ ++#define GPIO_070 0x070 /* GPIO I/J/K/L Value */ ++#define GPIO_074 0x074 /* GPIO I/J/K/L Direction */ ++#define GPIO_080 0x080 /* GPIO Q/R/S/T Value */ ++#define GPIO_084 0x084 /* GPIO Q/R/S/T Direction */ ++ ++static void set_gpio_default_state(void) ++{ ++ /* Default setting of Y23 pad in AST2600 A1 is HBLED so disable it. */ ++ writel(readl(SCU_BASE | SCU_69C) & ~SCU_69C_HBLED_EN, ++ SCU_BASE | SCU_69C); ++ ++#define SCU_410_RGMII3TXD1 BIT(19) ++#define GPIO_C3 BIT(19) ++ ++ /* ++ * Set GPIOC3 as an output with value high explicitly since it doesn't ++ * have an external pull up. It uses direct register access because ++ * it's called from board_early_init_f(). ++ */ ++ writel(readl(SCU_BASE | SCU_410) & ~SCU_410_RGMII3TXD1, ++ SCU_BASE | SCU_410); ++ writel(readl(AST_GPIO_BASE | GPIO_004) | GPIO_C3, ++ AST_GPIO_BASE | GPIO_004); ++ writel(readl(AST_GPIO_BASE | GPIO_000) | GPIO_C3, ++ AST_GPIO_BASE | GPIO_000); ++ ++#define SCU_610 0x610 /* Disable internal pull-down #0 */ ++#define SCU_610_GPIOB6 BIT(14) ++ writel(readl(SCU_BASE | SCU_610) | SCU_610_GPIOB6, SCU_BASE | SCU_610); ++ ++ /* ++ * GPIO C5 has a connection between BMC(3.3v) and CPU(1.0v) so if we ++ * set it as an logic high output, it will be clipped by a protection ++ * circuit in the CPU and eventually the signal will be detected as ++ * logic low. So we leave this GPIO as an input so that the signal ++ * can be pulled up by a CPU internal resister. The signal will be ++ * 1.0v logic high resultingy. ++ */ ++#define GPIO_C5 BIT(21) ++ writel(readl(AST_GPIO_BASE | GPIO_004) & ~GPIO_C5, ++ AST_GPIO_BASE | GPIO_004); ++ ++ /* ++ * Set GPIOD4 as an output with value low explicitly to set the ++ * default SPD mux path to CPU and DIMMs. ++ */ ++#define GPIO_D4 BIT(28) ++ writel(readl(AST_GPIO_BASE | GPIO_004) | GPIO_D4, ++ AST_GPIO_BASE | GPIO_004); ++ writel(readl(AST_GPIO_BASE | GPIO_000) & ~GPIO_D4, ++ AST_GPIO_BASE | GPIO_000); ++ ++ /* GPIO G6 is also an open-drain output so set it as an input. */ ++#define GPIO_G6 BIT(22) ++ writel(readl(AST_GPIO_BASE | GPIO_024) & ~GPIO_G6, ++ AST_GPIO_BASE | GPIO_024); ++ ++ /* Set GPIO S3 as push-pull output high */ ++#define GPIO_S3 BIT(19) ++ writel(readl(AST_GPIO_BASE + GPIO_084) | GPIO_S3, ++ AST_GPIO_BASE + GPIO_084); ++ writel(readl(AST_GPIO_BASE + GPIO_080) | GPIO_S3, ++ AST_GPIO_BASE + GPIO_080); ++} ++ + static void timer_handler(void *regs) + { + printf("+"); +@@ -175,6 +247,8 @@ int board_early_init_f(void) + * I am not sure if it actually does anything... */ + arch_interrupt_init_early(); + ++ set_gpio_default_state(); ++ + gpio_passthru_init(); + + port80h_snoop_init(); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0005-Ast2600-Enable-interrupt-in-u-boot.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0005-Ast2600-Enable-interrupt-in-u-boot.patch new file mode 100644 index 000000000..ec4b6be09 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0005-Ast2600-Enable-interrupt-in-u-boot.patch @@ -0,0 +1,567 @@ +From 0732dd21869418b4d437b8d1aef239d5348fc94d Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Fri, 3 Jan 2020 12:52:29 +0800 +Subject: [PATCH] Enable interrupt in u-boot. + +Ast2600 is Cortex-A7 +GIC V2 is used as the interrupt controller +GIC includes GICD and GICC + +Testedby: +1. Enable interrupt based SW handshake for ESPI +2. Both ArcherCity and Ast2600 EVB are working well. + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + Kconfig | 14 ++ + arch/arm/lib/stack.c | 9 ++ + arch/arm/lib/vectors.S | 30 ++++- + board/aspeed/ast2600_intel/ast-espi.c | 3 +- + board/aspeed/ast2600_intel/ast-irq.c | 185 +++++++++++++------------- + board/aspeed/ast2600_intel/ast-irq.h | 8 -- + board/aspeed/ast2600_intel/intel.c | 1 - + 7 files changed, 145 insertions(+), 105 deletions(-) + delete mode 100644 board/aspeed/ast2600_intel/ast-irq.h + +diff --git a/Kconfig b/Kconfig +index c3dfa8de47c8..b62bcdbccf1e 100644 +--- a/Kconfig ++++ b/Kconfig +@@ -239,6 +239,20 @@ config BUILD_TARGET + special image will be automatically built upon calling + make / buildman. + ++config USE_IRQ ++ bool "Use interrupts" ++ default n ++ ++config STACKSIZE_IRQ ++ depends on USE_IRQ ++ int "Size for IRQ stack (only if USE_IRQ enabled)" ++ default 16384 ++ ++config STACKSIZE_FIQ ++ depends on USE_IRQ ++ int "Size for FIQ stack (only if USE_IRQ enabled)" ++ default 16384 ++ + endmenu # General setup + + menu "Boot images" +diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c +index c89a219dd26d..d9a7f49c5623 100644 +--- a/arch/arm/lib/stack.c ++++ b/arch/arm/lib/stack.c +@@ -24,6 +24,15 @@ int arch_reserve_stacks(void) + gd->irq_sp = gd->start_addr_sp; + + # if !defined(CONFIG_ARM64) ++# ifdef CONFIG_USE_IRQ ++ gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); ++ printf("Reserving %zu Bytes for IRQ stack at: %08lx\n", ++ CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); ++ ++ /* 8-byte alignment for ARM ABI compliance */ ++ gd->start_addr_sp &= ~0x07; ++# endif ++ + /* leave 3 words for abort-stack, plus 1 for alignment */ + gd->start_addr_sp -= 16; + # endif +diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S +index 2ca6e2494a7a..5a5e60dbdde4 100644 +--- a/arch/arm/lib/vectors.S ++++ b/arch/arm/lib/vectors.S +@@ -154,6 +154,17 @@ IRQ_STACK_START_IN: + .word 0x0badc0de + #endif + ++#ifdef CONFIG_USE_IRQ ++/* IRQ stack memory (calculated at run-time) */ ++.globl IRQ_STACK_START ++IRQ_STACK_START: ++ .word 0x0badc0de ++/* IRQ stack memory (calculated at run-time) */ ++.globl FIQ_STACK_START ++FIQ_STACK_START: ++ .word 0x0badc0de ++#endif ++ + @ + @ IRQ stack frame. + @ +@@ -277,17 +288,30 @@ not_used: + bad_save_user_regs + bl do_not_used + +- ++#ifdef CONFIG_USE_IRQ ++ .align 5 ++irq: ++ get_irq_stack ++ irq_save_user_regs ++ bl do_irq ++ irq_restore_user_regs ++ .align 5 ++fiq: ++ get_fiq_stack ++ /* someone ought to write a more effective fiq_save_user_regs */ ++ irq_save_user_regs ++ bl do_fiq ++ irq_restore_user_regs ++#else + .align 5 + irq: + get_bad_stack + bad_save_user_regs + bl do_irq +- + .align 5 + fiq: + get_bad_stack + bad_save_user_regs + bl do_fiq +- ++#endif /* CONFIG_USE_IRQ */ + #endif /* CONFIG_SPL_BUILD */ +diff --git a/board/aspeed/ast2600_intel/ast-espi.c b/board/aspeed/ast2600_intel/ast-espi.c +index 0fdbf089a450..1d7ae529612d 100644 +--- a/board/aspeed/ast2600_intel/ast-espi.c ++++ b/board/aspeed/ast2600_intel/ast-espi.c +@@ -142,7 +142,7 @@ static void espi_handshake_ack(void) + } + } + +-int espi_irq_handler(struct pt_regs *regs) ++static void espi_irq_handler(void *cookie) + { + uint32_t irq_status = readl(AST_ESPI_BASE + ESPI008); + +@@ -226,7 +226,6 @@ int espi_irq_handler(struct pt_regs *regs) + readl(AST_ESPI_BASE + ESPI11C), + readl(AST_ESPI_BASE + ESPI094), + readl(AST_ESPI_BASE + ESPI12C), irq_status); +- return 0; + } + + void espi_init(void) +diff --git a/board/aspeed/ast2600_intel/ast-irq.c b/board/aspeed/ast2600_intel/ast-irq.c +index f817f8cd7c81..106bb3b4ffb2 100644 +--- a/board/aspeed/ast2600_intel/ast-irq.c ++++ b/board/aspeed/ast2600_intel/ast-irq.c +@@ -1,14 +1,7 @@ +-/* +- * Copyright 2018 Intel Corporation +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * as published by the Free Software Foundation; either version +- * 2 of the License, or (at your option) any later version. +- */ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2020, Intel Corporation. + + #include <common.h> +-#include <netdev.h> + #include <asm/io.h> + + DECLARE_GLOBAL_DATA_PTR; +@@ -18,19 +11,6 @@ DECLARE_GLOBAL_DATA_PTR; + #define GIC_INTERFACE_OFFSET 0x4000 + #define GIC_VIRT_OFFSET 0x6000 + +-#define VIC_STATUS_L 0x80 +-#define VIC_STATUS_H 0x84 +-#define VIC_IRQ_SELECTION_L 0x98 +-#define VIC_IRQ_SELECTION_H 0x9C +-#define VIC_ENABLE_L 0xA0 +-#define VIC_ENABLE_H 0xA4 +-#define VIC_ENABLE_CLEAR_L 0xA8 +-#define VIC_ENABLE_CLEAR_H 0xAC +-#define VIC_INTERRUPT_CLEAR_L 0xD8 +-#define VIC_INTERRUPT_CLEAR_H 0xDC +- +-#define VIC_CLEAR_ALL (~0) +- + /* GIC_DISTRIBUTOR_OFFSET register offsets */ + #define GICD_CTLR 0x000 + #define GICD_TYPER 0x004 +@@ -82,7 +62,9 @@ DECLARE_GLOBAL_DATA_PTR; + #define GICC_IIDR 0x00fc + #define GICC_DIR 0x1000 + +-#define GIC_CPU_IMPLEMENTER_MAGIC 0x0102143b ++#define GIC_CPU_IMPLEMENTER_MAGIC 0x0102143b ++#define GICC_IAR_INT_ID_MASK 0x3ff ++#define GIC_CPU_DEACTIVATE 0x1000 + + /* GIC_INTERFACE_OFFSET register offsets */ + #define GICH_HCR 0x000 +@@ -116,9 +98,10 @@ DECLARE_GLOBAL_DATA_PTR; + + #define GIC_VIRT_CPU_IMPLEMENTER_MAGIC 0x0102143b + +-#define GICD_CTLR_ENABLE 0x03 +- +-#define GICD_INT_DEF_PRI 0xa0 ++#define GICD_CTLR_ENABLE 0x03 /*enable group 0 and 1*/ ++#define GICC_CTLR_ENABLE 0x03 ++#define GICD_ITARGET_ALL 0xffffffff ++#define GICD_INT_DEF_PRI 0xa0 + #define GICD_INT_DEF_PRI_X4 (\ + (GICD_INT_DEF_PRI << 24) |\ + (GICD_INT_DEF_PRI << 16) |\ +@@ -129,21 +112,32 @@ DECLARE_GLOBAL_DATA_PTR; + #define GICD_INT_EN_CLR_X32 0xffffffff + #define GICD_INT_EN_CLR_PPI 0xffff0000 + #define GICD_INT_EN_SET_SGI 0x0000ffff ++#define GICD_ICFG_LEVEL_TRIGGER 0x55555555 ++#define GICC_UNMASK_ALL_PRIORITY 0xff + + #define gicd_readl(OFFSET) readl(gbase + GIC_DISTRIBUTOR_OFFSET + (OFFSET)) + #define gicd_writel(VALUE, OFFSET) \ + writel((VALUE), gbase + GIC_DISTRIBUTOR_OFFSET + (OFFSET)) + #define gicc_readl(OFFSET) readl(gbase + GIC_CPU_OFFSET + (OFFSET)) ++#define gicc_writel(VALUE, OFFSET) \ ++ writel((VALUE), gbase + GIC_CPU_OFFSET + (OFFSET)) + #define gich_readl(OFFSET) readl(gbase + GIC_INTERFACE_OFFSET + (OFFSET)) + #define gicv_readl(OFFSET) readl(gbase + GIC_VIRT_OFFSET + (OFFSET)) +- +-static size_t max_irq = 0; +- + #define ITLINES_MASK 0x1f + #define ITLINES_SHIFT 5 +- + #define GIC_MAX_IRQ 1020 ++#define SPI_INT_NUM_MIN 32 ++#define MAX_IRQ 0xfffffffe ++#define DEBUG_IRQ_ENABLED 0 ++#if DEBUG_IRQ_ENABLED ++#define DBG_IRQ printf ++#else ++#define DBG_IRQ(...) ++#endif ++ ++static size_t max_irq = 0; + static interrupt_handler_t *handlers[GIC_MAX_IRQ] = {NULL}; ++static void *cookies[GIC_MAX_IRQ] = {NULL}; + static unsigned long irq_total = 0; + static unsigned long irq_counts[GIC_MAX_IRQ] = {0}; + static uint32_t gbase = 0; +@@ -159,24 +153,31 @@ static inline uint32_t gic_base(void) + + static void enable_gic(void) + { +- uint32_t gicd_ctlr; ++ uint32_t gicd_ctlr, gicc_ctlr; + ++ DBG_IRQ(" %s()\n", __FUNCTION__); + /* add GIC offset ref table 1-3 for interrupt distributor address */ + gicd_ctlr = gicd_readl(GICD_CTLR); ++ gicc_ctlr = gicc_readl(GICC_CTLR); + gicd_writel(gicd_ctlr | GICD_CTLR_ENABLE, GICD_CTLR); ++ gicc_writel(gicc_ctlr | GICC_CTLR_ENABLE, GICC_CTLR); + } + + static void disable_gic(void) + { +- uint32_t gicd_ctlr; +- ++ uint32_t gicd_ctlr, gicc_ctlr; ++ DBG_IRQ(" %s()\n", __FUNCTION__); + /* add GIC offset ref table 1-3 for interrupt distributor address */ + gicd_ctlr = gicd_readl(GICD_CTLR); + gicd_writel(gicd_ctlr & ~GICD_CTLR_ENABLE, GICD_CTLR); ++ gicc_ctlr = gicc_readl(GICC_CTLR); ++ gicc_writel(gicc_ctlr & ~GICC_CTLR_ENABLE, GICC_CTLR); + } + + static void enable_irq_id(unsigned int id) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); ++ + uint32_t grp = id >> ITLINES_SHIFT; + uint32_t grp_bit = 1 << (id & ITLINES_MASK); + gicd_writel(grp_bit, GICD_ISENABLERn + grp * sizeof(uint32_t)); +@@ -184,6 +185,7 @@ static void enable_irq_id(unsigned int id) + + static void disable_irq_id(unsigned int id) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + uint32_t grp = id >> ITLINES_SHIFT; + uint32_t grp_bit = 1 << (id & ITLINES_MASK); + gicd_writel(grp_bit, GICD_ICENABLERn + grp * sizeof(uint32_t)); +@@ -193,34 +195,49 @@ static int gic_probe(void) + { + int i; + gbase = gic_base(); +- enable_gic(); ++ DBG_IRQ("gic_probe GIC base = 0x%x, magicd=0x%x\n", ++ gbase, gicd_readl(GICD_IIDR)); + + if (gicd_readl(GICD_IIDR) != GIC_DISTRIBUTOR_IMPLEMENTER_MAGIC && + gicc_readl(GICC_IIDR) != GIC_CPU_IMPLEMENTER_MAGIC && + gicv_readl(GICV_IIDR) != GIC_VIRT_CPU_IMPLEMENTER_MAGIC) + { ++ printf("error: magic check \n"); + return 0; + } ++ ++ disable_gic(); ++ + /* GIC supports up to 1020 lines */ +- max_irq = ((gicd_readl(GICD_TYPER) & ITLINES_MASK) + 1) << ITLINES_SHIFT; ++ max_irq = ((gicd_readl(GICD_TYPER) & ITLINES_MASK) + 1) * 32; + if (max_irq > GIC_MAX_IRQ) + max_irq = GIC_MAX_IRQ; + /* set all lines to be level triggered N-N */ + for (i = 32; i < max_irq; i += 16) +- gicd_writel(0, GICD_ICFGRn + i / 4); +- +- /* Set priority on all interrupts. */ +- for (i = 0; i < max_irq; i += 4) ++ gicd_writel(GICD_ICFG_LEVEL_TRIGGER, GICD_ICFGRn + i / 4); ++ ++ DBG_IRQ("max_irq = 0x%x, typer=0x%x, config=0x%x, maxirq=0x%x\n", max_irq, ++ (gicd_readl(GICD_TYPER) & ITLINES_MASK) + 1, ++ gicd_readl(GICD_ICFGRn + 0x8), ++ ((gicd_readl(GICD_TYPER) & ITLINES_MASK) + 1) * 0x20); ++ /* Set priority and target on all interrupts. */ ++ for (i = 0; i < max_irq; i += 4) { + gicd_writel(GICD_INT_DEF_PRI_X4, GICD_IPRIORITYRn + i); ++ gicd_writel(GICD_ITARGET_ALL, GICD_ITARGETSRn + i); ++ } + + /* Deactivate and disable all SPIs. */ + for (i = 32; i < max_irq; i += 32) { + gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICACTIVERn + i / 8); + gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICENABLERn + i / 8); + } +- gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICACTIVERn); +- gicd_writel(GICD_INT_EN_CLR_PPI, GICD_ICENABLERn); ++ gicd_writel(GICD_INT_EN_CLR_X32, GICD_ICACTIVERn); ++ gicd_writel(GICD_INT_EN_CLR_PPI, GICD_ICENABLERn); + gicd_writel(GICD_INT_EN_SET_SGI, GICD_ISENABLERn); ++ /* unmask all priority */ ++ gicc_writel(GICC_UNMASK_ALL_PRIORITY, GICC_PMRn); ++ ++ enable_gic(); + + return 0; + } +@@ -228,6 +245,7 @@ static int gic_probe(void) + void irq_free_handler (int irq); + static void gic_shutdown(void) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + int i; + for (i = 0; i < max_irq; i++) + { +@@ -238,6 +256,7 @@ static void gic_shutdown(void) + + int arch_interrupt_init_early(void) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + return 0; + } + +@@ -247,28 +266,28 @@ int arch_interrupt_init(void) + for (i = 0; i < GIC_MAX_IRQ; i++) + { + handlers[i] = NULL; ++ cookies[i] = NULL; + irq_counts[i] = 0; + } ++ DBG_IRQ("arch_interrupt_init\n"); + return gic_probe(); + } + + int arch_interrupt_fini(void) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + gic_shutdown(); + return 0; + } + + int interrupt_init (void) + { +- /* +- * setup up stacks if necessary +- */ ++ /* setup up stacks if necessary */ ++ IRQ_STACK_START = gd->irq_sp + 8; + IRQ_STACK_START_IN = gd->irq_sp + 8; + +- printf("%s()\n", __FUNCTION__); ++ DBG_IRQ(" %s()\n", __FUNCTION__); + return arch_interrupt_init(); +- +- return 0; + } + + int global_interrupts_enabled (void) +@@ -286,12 +305,12 @@ void enable_interrupts (void) + { + unsigned long cpsr; + __asm__ __volatile__("mrs %0, cpsr\n" +- "bic %0, %0, #0x80\n" ++ "bic %0, %0, #0x1c0\n" + "msr cpsr_c, %0" + : "=r" (cpsr) + : + : "memory"); +- ++ DBG_IRQ(" %s()\n", __FUNCTION__); + return; + } + +@@ -304,11 +323,13 @@ int disable_interrupts (void) + : "=r" (cpsr), "=r" (temp) + : + : "memory"); ++ DBG_IRQ(" %s()\n", __FUNCTION__); + return (cpsr & 0x80) == 0; + } + +-void irq_install_handler(int irq, interrupt_handler_t *handler, void *ctx) ++void irq_install_handler(int irq, interrupt_handler_t *handler, void *cookie) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + if (irq > max_irq) { + printf("irq %d out of range\n", irq); + return; +@@ -317,19 +338,22 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *ctx) + printf("irq %d already in use (%p)\n", irq, handlers[irq]); + return; + } +- printf("registering handler for irq %d\n", irq); ++ DBG_IRQ("registering handler for irq %d\n", irq); + handlers[irq] = handler; ++ cookies[irq] = cookie; + enable_irq_id(irq); + } + + void irq_free_handler (int irq) + { ++ DBG_IRQ(" %s()\n", __FUNCTION__); + if (irq >= max_irq) { + printf("irq %d out of range\n", irq); + return; + } + if (handlers[irq]) { + handlers[irq] = NULL; ++ cookies[irq] = NULL; + disable_irq_id(irq); + } + } +@@ -339,8 +363,10 @@ int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) + int i; + int enabled = global_interrupts_enabled(); + printf("GIC base = 0x%x\n", gbase); +- printf("interrupts %sabled\n", (enabled ? "en" : "dis")); ++ printf("Number of interrupt sources = %d\n", max_irq); ++ printf("Interrupts %sabled\n", (enabled ? "en" : "dis")); + uint32_t grp_en = 0; ++ + for (i = 0; i < max_irq; i++) { + if ((i & ITLINES_MASK) == 0) + grp_en = gicd_readl(GICD_ISENABLERn + +@@ -348,52 +374,29 @@ int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) + int irq_enabled = grp_en & (1 << (i & ITLINES_MASK)); + if (!irq_enabled) + continue; +- printf("% 2i (% 3s): %lu\n", i, ++ printf("%2d (%3s): %lu\n", i, + (irq_enabled ? "on" : "off"), irq_counts[i]); + } +- printf("total: %lu\n", irq_total); ++ printf("Total: %lu\n", irq_total); ++ + return 0; + } + + void do_irq(struct pt_regs *pt_regs) + { +- int i; +- if (!gbase) { +- static int printed_msg = 0; +- if (!printed_msg) +- { +- printed_msg = 1; +- printf("interrupt before configured!\n"); +- } +- return; +- } +- irq_total++; +- uint32_t grp_pend = 0; +- for (i = 0; i < max_irq; i++) { +- /* limit reads of the pending register to once in 32 */ +- if ((i & ITLINES_MASK) == 0) +- grp_pend = gicd_readl(GICD_ISPENDRn + +- (i >> ITLINES_SHIFT) * sizeof(uint32_t)); +- uint32_t pending = grp_pend & (1 << (i & ITLINES_MASK)); +- if (pending) { +- irq_counts[i]++; +- /* mask via GICD_ICENABLERn */ +- gicd_writel(pending, GICD_ICENABLERn + +- (i >> ITLINES_SHIFT) * sizeof(uint32_t)); +- if (handlers[i]) { +- handlers[i](pt_regs); +- /* unmask via GICD_ISENABLERn */ +- gicd_writel(pending, GICD_ISENABLERn + +- (i >> ITLINES_SHIFT) * sizeof(uint32_t)); +- /* clear pending via GICD_ICPENDRn */ +- gicd_writel(pending, GICD_ICPENDRn + +- (i >> ITLINES_SHIFT) * sizeof(uint32_t)); +- } else { +- printf("unexpected interrupt %i; masking\n", i); +- /* clear pending via GICD_ICPENDRn */ +- gicd_writel(pending, GICD_ISPENDRn + +- (i >> ITLINES_SHIFT) * sizeof(uint32_t)); +- } ++ uint32_t irqstat, irqnr; ++ ++ if (irq_total < MAX_IRQ) ++ irq_total++; ++ irqstat = gicc_readl(GICC_IAR); ++ irqnr = irqstat & GICC_IAR_INT_ID_MASK; ++ ++ if (irqnr > SPI_INT_NUM_MIN && irqnr < GIC_MAX_IRQ) { ++ gicc_writel(irqnr, GICC_EOIR); ++ if (irq_counts[irqnr] < MAX_IRQ) ++ irq_counts[irqnr]++; ++ if (handlers[irqnr]) { ++ handlers[irqnr](cookies[irqnr]); + } + } + } +diff --git a/board/aspeed/ast2600_intel/ast-irq.h b/board/aspeed/ast2600_intel/ast-irq.h +deleted file mode 100644 +index 9957f2baa7ff..000000000000 +--- a/board/aspeed/ast2600_intel/ast-irq.h ++++ /dev/null +@@ -1,8 +0,0 @@ +-#ifndef _AST_IRQ_H_ +-#define _AST_IRQ_H_ +- +-int request_irq(int irq, interrupt_handler_t *handler); +-int release_irq(int irq); +-int arch_interrupt_init_early(void); +- +-#endif +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 14a20b27e178..d03a446846bc 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -239,7 +239,6 @@ static void timer_handler(void *regs) + printf("+"); + } + +-extern int arch_interrupt_init_early(void); + int board_early_init_f(void) + { + /* This is called before relocation; beware! */ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch new file mode 100644 index 000000000..6e44691f8 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch @@ -0,0 +1,102 @@ +From 6fe262f07e116ee185d3acf7967b2ea0d6cc3f3d Mon Sep 17 00:00:00 2001 +From: arun-pm <arun.p.m@linux.intel.com> +Date: Fri, 29 Nov 2019 00:19:09 +0530 +Subject: [PATCH] SPI Quad IO Mode + +This commit adds quad IO mode in SPI driver for AST2600. + +Note:- Removed n25q00 Quad I/O support for the time being due to clock issue + with chip 'Micron 8UA15 - rw182 (128MB)' while enabling Quad I/O mode. +--- + arch/arm/dts/ast2600-intel.dts | 6 ++---- + drivers/mtd/spi/spi-nor-ids.c | 7 ++++++- + drivers/spi/aspeed_spi.c | 18 +++++++++++++++++- + 3 files changed, 25 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/dts/ast2600-intel.dts b/arch/arm/dts/ast2600-intel.dts +index e6197831cf02..c7970c16a474 100644 +--- a/arch/arm/dts/ast2600-intel.dts ++++ b/arch/arm/dts/ast2600-intel.dts +@@ -133,16 +133,14 @@ + + &fmc { + status = "okay"; +-#if 0 + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fmcquad_default>; +-#endif + flash@0 { + compatible = "spi-flash", "sst,w25q256"; + status = "okay"; + spi-max-frequency = <40000000>; +- spi-tx-bus-width = <2>; +- spi-rx-bus-width = <2>; ++ spi-tx-bus-width = <4>; ++ spi-rx-bus-width = <4>; + }; + }; + +diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c +index 5882eab2e3fc..42546f4d222a 100644 +--- a/drivers/mtd/spi/spi-nor-ids.c ++++ b/drivers/mtd/spi/spi-nor-ids.c +@@ -189,7 +189,12 @@ const struct flash_info spi_nor_ids[] = { + { INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("n25q512a", 0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("n25q512ax3", 0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, +- { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, ++ /* Removed n25q00 Quad I/O support for the time being due to clock issue with chip 'Micron 8UA15 - rw182 (128MB)' ++ * while enabling Quad I/O mode. As this chip is default shipped in platforms, marking it ++ * as Not supported for the time being. Once all chips are replaced with the new model, this can be enabled ++ * back(Note:- Certain other chips having same name(n25q00) but different part number has no issues). ++ */ ++ { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | NO_CHIP_ERASE) }, + { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, +diff --git a/drivers/spi/aspeed_spi.c b/drivers/spi/aspeed_spi.c +index f93200f8f67e..6db64079ae72 100644 +--- a/drivers/spi/aspeed_spi.c ++++ b/drivers/spi/aspeed_spi.c +@@ -17,6 +17,9 @@ + + #define ASPEED_SPI_MAX_CS 3 + #define FLASH_CALIBRATION_LEN 0x400 ++#define AST2600A0 0x05000303 ++#define AST2600A0_MAX_FREQ 40000000 ++#define AST_MAX_FREQ 100000000 + + struct aspeed_spi_regs { + u32 conf; /* 0x00 CE Type Setting */ +@@ -1059,6 +1062,19 @@ static int aspeed_spi_bind(struct udevice *bus) + return 0; + } + ++static int aspeed_get_max_freq(void) ++{ ++ u32 rev_id = readl(ASPEED_REVISION_ID0); ++ ++ /*Limit max spi frequency less than 50MHz on AST2600-A0 due ++ * to FWSPICLK signal quality issue. ++ */ ++ if(rev_id == AST2600A0) ++ return AST2600A0_MAX_FREQ; ++ else ++ return AST_MAX_FREQ; ++} ++ + static int aspeed_spi_probe(struct udevice *bus) + { + struct resource res_regs, res_ahb; +@@ -1089,7 +1105,7 @@ static int aspeed_spi_probe(struct udevice *bus) + clk_free(&hclk); + + priv->max_hz = dev_read_u32_default(bus, "spi-max-frequency", +- 100000000); ++ aspeed_get_max_freq()); + + priv->num_cs = dev_read_u32_default(bus, "num-cs", ASPEED_SPI_MAX_CS); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch new file mode 100644 index 000000000..bab279c40 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0007-ast2600-Override-OTP-strap-settings.patch @@ -0,0 +1,57 @@ +From 053770be23c7826efefa9b7b087d8b285bf8bbcd Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 29 Jan 2020 14:55:44 -0800 +Subject: [PATCH] ast2600: Override OTP strap settings + +This commit adds settings to override OTP strap. +Also, this commit disables SoC debug interface. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index 81520b0f036e..e479d0276d39 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -44,7 +44,9 @@ + #define AST_SCU_HPLL_PARAM (AST_SCU_BASE + 0x200) + #define AST_SCU_HPLL_PARAM_EXT (AST_SCU_BASE + 0x204) + #define AST_SCU_HW_STRAP1 (AST_SCU_BASE + 0x500) ++#define AST_SCU_HW_STRAP1_CLR (AST_SCU_BASE + 0x504) + #define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510) ++#define AST_SCU_HW_STRAP2_CLR (AST_SCU_BASE + 0x514) + #define AST_SCU_HW_STRAP3 (AST_SCU_BASE + 0x51C) + #define AST_SCU_CA7_PARITY_CHK (AST_SCU_BASE + 0x820) + #define AST_SCU_CA7_PARITY_CLR (AST_SCU_BASE + 0x824) +@@ -176,6 +178,26 @@ do_primary_core_setup: + /* unlock system control unit */ + scu_unlock + ++ /* disable CA7 CPU boot */ ++ ldr r0, =AST_SCU_HW_STRAP1_CLR ++ movw r1, #0x0001 @; Disable ARM CA7 CPU boot ++ movt r1, #0x0000 ++ str r1, [r0] ++ ++ /* enable eSPI, debug interface and disable UART5 boot*/ ++ ldr r0, =AST_SCU_HW_STRAP2_CLR ++ movw r1, #0x0040 @; Select eSPI ++ movt r1, #0x0000 ++ orr r1, #0x0010 @; Enable debug interface ++ orr r1, #0x0100 @; Disable UART5 boot ++ str r1, [r0] ++ ++ /* enable ACPI */ ++ ldr r0, =AST_SCU_HW_STRAP2 ++ ldr r1, [r0] ++ orr r1, #0x20 @; Enable ACPI ++ str r1, [r0] ++ + /* identify AST2600 A0/A1 */ + ldr r0, =AST_SCU_REV_ID + ldr r0, [r0] +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0008-AST2600-Add-TPM-pulse-trigger.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0008-AST2600-Add-TPM-pulse-trigger.patch new file mode 100644 index 000000000..f3cb01143 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0008-AST2600-Add-TPM-pulse-trigger.patch @@ -0,0 +1,50 @@ +From a3b27074feba66aaf63930197b4aa507abdcc983 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 25 Mar 2020 15:04:26 -0700 +Subject: [PATCH] AST2600: Add TPM pulse trigger + +This commit adds TPM pulse trigger into u-boot booting. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 634b8ce20e7d..e8165694c312 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -234,6 +234,21 @@ static void set_gpio_default_state(void) + AST_GPIO_BASE + GPIO_080); + } + ++void enable_onboard_tpm(void) ++{ ++#define GPIO_C2 BIT(18) ++ ++ writel(readl(AST_GPIO_BASE | GPIO_004) | GPIO_C2, ++ AST_GPIO_BASE | GPIO_004); ++ writel(readl(AST_GPIO_BASE | GPIO_000) | GPIO_C2, ++ AST_GPIO_BASE | GPIO_000); ++ ++ mdelay(50); ++ ++ writel(readl(AST_GPIO_BASE | GPIO_000) & ~GPIO_C2, ++ AST_GPIO_BASE | GPIO_000); ++} ++ + static void timer_handler(void *regs) + { + printf("+"); +@@ -264,6 +279,8 @@ int board_early_init_r(void) + debug("board_early_init_r\n"); + /* timer_enable(0, 1, timer_handler); */ + ++ enable_onboard_tpm(); ++ + return 0; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0009-AST2600-Disable-DMA-arbitration-options-on-MAC1-and-.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0009-AST2600-Disable-DMA-arbitration-options-on-MAC1-and-.patch new file mode 100644 index 000000000..6196551a2 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0009-AST2600-Disable-DMA-arbitration-options-on-MAC1-and-.patch @@ -0,0 +1,57 @@ +From 970a7c3b21e7264bb6ada434652795b5ce947ac7 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Tue, 31 Mar 2020 13:28:31 -0700 +Subject: [PATCH] AST2600: Disable DMA arbitration options on MAC1 and MAC2 + +Aspeed added 2 new options to DMA arbitration in AST2600A1 MAC1 +and MAC2 but it has a bug in A1 so it might cause the MAC hang if +we enable these 2 new options. +Option 1: Round Robin, register MAC58[27] +Option 2: Tx Valid, register MAC58[28] + +So this commit disables options above. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index e479d0276d39..aaacb61a1f8b 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -58,6 +58,12 @@ + #define AST_FMC_WDT1_CTRL_MODE (AST_FMC_BASE + 0x060) + #define AST_FMC_WDT2_CTRL_MODE (AST_FMC_BASE + 0x064) + ++#define AST_MAC1_BASE (0x1E660000) ++#define AST_MAC1_CTRL2 (AST_MAC1_BASE + 0x058) ++ ++#define AST_MAC2_BASE (0x1E680000) ++#define AST_MAC2_CTRL2 (AST_MAC2_BASE + 0x058) ++ + #define AST_GPIO_BASE (0x1E780000) + #define AST_GPIOYZ_DATA_VALUE (AST_GPIO_BASE + 0x1E0) + +@@ -245,6 +251,18 @@ wait_lock: + bne 2f + + 1: ++ /* disable DMA arbitration on MAC1 (A1 bug) */ ++ ldr r0, =AST_MAC1_CTRL2 ++ ldr r1, [r0] ++ orr r1, #0x18000000 ++ str r1, [r0] ++ ++ /* disable DMA arbitration on MAC2 (A1 bug) */ ++ ldr r0, =AST_MAC2_CTRL2 ++ ldr r1, [r0] ++ orr r1, #0x18000000 ++ str r1, [r0] ++ + /* LPC/eSPI mode selection by SW (AST2600/AST2620 A1 only) */ + ldr r0, =AST_GPIOYZ_DATA_VALUE + ldr r0, [r0] +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0010-Fix-timer-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0010-Fix-timer-support.patch new file mode 100644 index 000000000..e998ae42f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0010-Fix-timer-support.patch @@ -0,0 +1,173 @@ +From 97fc99c77c68ec6b71354786f94a80a26adde389 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 20 Apr 2020 10:42:05 -0700 +Subject: [PATCH] Fix timer support + +Timer interrupt flag should be cleared just after it gets an +interrupt otherwise the interrupt will be called infinitely and +main context will starve resultingly. To fix this issue, this +commit adds the timer interrupt flag clearing logic. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/ast-timer.c | 69 +++++++++++++++----------- + board/aspeed/ast2600_intel/intel.c | 13 ++--- + 2 files changed, 48 insertions(+), 34 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/ast-timer.c b/board/aspeed/ast2600_intel/ast-timer.c +index cf8c69aba5d3..d98ec9238e15 100644 +--- a/board/aspeed/ast2600_intel/ast-timer.c ++++ b/board/aspeed/ast2600_intel/ast-timer.c +@@ -1,59 +1,72 @@ +-/* +- * Copyright 2019 Intel Corporation +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * as published by the Free Software Foundation; either version +- * 2 of the License, or (at your option) any later version. +- */ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2019-2020, Intel Corporation. + + #include <common.h> + #include <asm/io.h> + + static const int timer_irqs[] = {48, 49, 50, 51, 52, 53, 54, 55}; ++static void (*timer_callback[ARRAY_SIZE(timer_irqs)]) (void *) = {NULL}; ++static void *cb_cookie[ARRAY_SIZE(timer_irqs)] = {NULL}; ++ + #define AST_TIMER_BASE 0x1e782000 + /* offsets from AST_TIMER_BASE for each timer */ +-static const uint32_t timer_bases[] = {0, 0x10, 0x20, 0x40, +- 0x50, 0x60, 0x70, 0x80}; +-#define TIMER_1MHZ_CLK_COUNT 1000000u ++static const u32 timer_bases[] = {0, 0x10, 0x20, 0x40, 0x50, 0x60, 0x70, 0x80}; + #define TIMER_ENABLE 1 + #define TIMER_1MHZ_CLK_SEL 2 + #define TIMER_ENABLE_IRQ 4 + #define TIMER_RESET_BY_WDT 8 + #define TIMER_CONTROL 0x30 ++#define TIMER_INT_CLR 0x34 + #define TIMER_RELOAD 0x04 + #define TIMER_CONTROL_CLEAR 0x3c + ++static void timer_irq_handler(void *cookie) ++{ ++ int timer_nr = (int)cookie; ++ ++ writel(1 << timer_nr, AST_TIMER_BASE + TIMER_INT_CLR); ++ ++ if (timer_callback[timer_nr]) ++ timer_callback[timer_nr](cb_cookie[timer_nr]); ++} ++ + void timer_disable(int n) + { +- if (n < 0 || n > 7) { ++ u32 tctrl; ++ ++ if (n < 0 || n > 7) + return; +- } +- uint32_t tctrl = 0xf << (n * 4); ++ ++ irq_free_handler(timer_irqs[n]); ++ timer_callback[n] = NULL; ++ cb_cookie[n] = NULL; ++ ++ tctrl = 0xf << (n * 4); + writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL_CLEAR); + } + +-void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler) ++void timer_enable(uint n, u32 interval_us, interrupt_handler_t *handler, ++ void *cookie) + { +- if (n < 0 || n > 7) { +- return; +- } +- if (!freq) ++ u32 tctrl; ++ ++ if (n < 0 || n > 7 || !interval_us) + return; + + timer_disable(n); + +- uint32_t v = TIMER_1MHZ_CLK_COUNT / freq; +- writel(v, AST_TIMER_BASE + timer_bases[n] + TIMER_RELOAD); ++ writel(interval_us, AST_TIMER_BASE + timer_bases[n] + TIMER_RELOAD); + +- uint32_t tctrl = ( +- TIMER_ENABLE | +- TIMER_1MHZ_CLK_SEL | +- TIMER_RESET_BY_WDT) << (n * 4); ++ tctrl = (TIMER_ENABLE | TIMER_1MHZ_CLK_SEL | ++ TIMER_RESET_BY_WDT) << (n * 4) | TIMER_ENABLE_IRQ << (n * 4); + + if (handler) { +- irq_install_handler(timer_irqs[n], handler, NULL); +- tctrl |= (TIMER_ENABLE_IRQ << (n * 4)); ++ timer_callback[n] = handler; ++ cb_cookie[n] = cookie; + } +- writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL); ++ ++ irq_install_handler(timer_irqs[n], timer_irq_handler, (void *)n); ++ ++ writel(readl(AST_TIMER_BASE + TIMER_CONTROL) | tctrl, ++ AST_TIMER_BASE + TIMER_CONTROL); + } +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index ebf883144418..7c005fb323e6 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -249,16 +249,14 @@ void enable_onboard_tpm(void) + AST_GPIO_BASE | GPIO_000); + } + +-static void timer_handler(void *regs) ++static void timer_callback(void *cookie) + { +- printf("+"); ++ debug("+"); + } + + int board_early_init_f(void) + { + /* This is called before relocation; beware! */ +- /* initialize running timer? timer_init is next in the list but +- * I am not sure if it actually does anything... */ + arch_interrupt_init_early(); + + set_gpio_default_state(); +@@ -273,11 +271,9 @@ int board_early_init_f(void) + return 0; + } + +-extern void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler); + int board_early_init_r(void) + { + debug("board_early_init_r\n"); +- /* timer_enable(0, 1, timer_handler); */ + + enable_onboard_tpm(); + +@@ -285,8 +281,13 @@ int board_early_init_r(void) + } + + extern void espi_init(void); ++extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, ++ void *cookie); + int board_late_init(void) + { ++#define ONE_SEC_IN_USEC 1000000 ++ ++ timer_enable(0, ONE_SEC_IN_USEC, timer_callback, (void *)0); + espi_init(); + + return 0; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0011-KCS-driver-support-in-uBoot.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0011-KCS-driver-support-in-uBoot.patch new file mode 100644 index 000000000..df10a9a0c --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0011-KCS-driver-support-in-uBoot.patch @@ -0,0 +1,615 @@ +From b26b11483b006f603e0134551bfb1238e0980972 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 20 Apr 2020 11:08:22 -0700 +Subject: [PATCH] KCS driver support in uBoot + +Added KCS support in uBoot. This will enable +KCS channels and set the specified registers +to do KCS communication in uBoot. It also +consist of read and write KCS message transations +work flow implementation( As specified in IPMI +specification Section 9.15). It is enabled +only when Force Firmware Update Jumper is ON. + +Tested: +Stopped booting in uBoot and sent IPMI commands +via KCS interfaces. + - Get Device ID: + Req: ipmitool raw 6 1 + Res: 23 00 12 03 02 BF 57 01 00 7B 00 00 00 00 00 + - Get Self Test Results + Req: ipmitool raw 6 4 + Res: 56 00 + - All other commands + Req: ipmitool raw 6 2 + Res: Unable to send RAW command (channel=0x0 netfn=0x6 lun=0x0 +cmd=0x2 rsp=0xc1): Invalid command + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/Makefile | 1 + + board/aspeed/ast2600_intel/ast-kcs.c | 418 +++++++++++++++++++++++++++ + board/aspeed/ast2600_intel/ast-kcs.h | 112 +++++++ + board/aspeed/ast2600_intel/intel.c | 4 + + 4 files changed, 535 insertions(+) + create mode 100644 board/aspeed/ast2600_intel/ast-kcs.c + create mode 100644 board/aspeed/ast2600_intel/ast-kcs.h + +diff --git a/board/aspeed/ast2600_intel/Makefile b/board/aspeed/ast2600_intel/Makefile +index 37d2f0064f38..d049922719f3 100644 +--- a/board/aspeed/ast2600_intel/Makefile ++++ b/board/aspeed/ast2600_intel/Makefile +@@ -2,3 +2,4 @@ obj-y += intel.o + obj-y += ast-espi.o + obj-y += ast-irq.o + obj-y += ast-timer.o ++obj-y += ast-kcs.o +diff --git a/board/aspeed/ast2600_intel/ast-kcs.c b/board/aspeed/ast2600_intel/ast-kcs.c +new file mode 100644 +index 000000000000..a03b7e725370 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-kcs.c +@@ -0,0 +1,418 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2020 Intel Corporation ++ ++#include "ast-kcs.h" ++ ++#ifdef DEBUG_KCS_ENABLED ++#define DBG_KCS printf ++#else ++#define DBG_KCS(...) ++#endif ++ ++/* TODO: Move to IPMI file. */ ++#define IPMI_CC_OK 0x00 ++#define IPMI_CC_INVALID 0xC1 ++#define IPMI_CC_UNSPECIFIED 0xFF ++ ++#define KCS_CHANNEL_NO_3 3 ++ ++static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 }; ++ ++static const struct kcs_io_reg ast_kcs_bmc_ioregs[KCS_CHANNEL_MAX] = { ++ { .idr = LPC_IDR1, .odr = LPC_ODR1, .str = LPC_STR1 }, ++ { .idr = LPC_IDR2, .odr = LPC_ODR2, .str = LPC_STR2 }, ++ { .idr = LPC_IDR3, .odr = LPC_ODR3, .str = LPC_STR3 }, ++ { .idr = LPC_IDR4, .odr = LPC_ODR4, .str = LPC_STR4 } ++}; ++ ++#define NO_OF_ENABLED_KCS_CHANNELS ARRAY_SIZE(enabled_kcs_channel) ++ ++static struct kcs_packet m_kcs_pkt[NO_OF_ENABLED_KCS_CHANNELS]; ++ ++static u16 read_status(u16 channel_num) ++{ ++ return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str); ++} ++ ++static void write_status(u16 channel_num, u16 value) ++{ ++ writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str); ++} ++ ++static u16 read_data(u16 channel_num) ++{ ++ return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].idr); ++} ++ ++static void write_data(u16 channel_num, u16 value) ++{ ++ writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].odr); ++} ++ ++static void set_kcs_state(u16 channel_num, u16 state) ++{ ++ u16 status = read_status(channel_num); ++ ++ status &= ~KCS_STATE_MASK; ++ status |= KCS_STATE(state) & KCS_STATE_MASK; ++ write_status(channel_num, status); ++} ++ ++static struct kcs_packet *get_kcs_packet(u16 channel_num) ++{ ++ for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) { ++ if (channel_num == enabled_kcs_channel[idx]) ++ return &m_kcs_pkt[idx]; ++ } ++ ++ /* very unlike code hits here. */ ++ DBG_KCS("ERROR: %s error. ChannelNo: %d\n", __func__, channel_num); ++ BUG(); ++} ++ ++static void kcs_force_abort(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ DBG_KCS("ERROR: KCS communication aborted (Channel:%d, Error:%d)\n", ++ channel_num, kcs_pkt->error); ++ set_kcs_state(channel_num, KCS_STATE_ERROR); ++ read_data(channel_num); ++ write_data(channel_num, ZERO_DATA); ++ ++ kcs_pkt->phase = KCS_PHASE_ERROR; ++ kcs_pkt->read_req_done = false; ++ kcs_pkt->data_in_idx = 0; ++} ++ ++static void init_kcs_packet(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ kcs_pkt->channel = channel_num; ++ kcs_pkt->read_req_done = false; ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ kcs_pkt->error = KCS_NO_ERROR; ++ kcs_pkt->data_in_idx = 0; ++ kcs_pkt->data_out_idx = 0; ++ kcs_pkt->data_out_len = 0; ++} ++ ++static void process_kcs_request(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ int i; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ if (!kcs_pkt->read_req_done) ++ return; ++ ++ DBG_KCS("%s:- chan:%d\n", __func__, channel_num); ++ ++#ifdef DEBUG_KCS_ENABLED ++ DBG_KCS("Request data(Len:%d): ", kcs_pkt->data_in_idx); ++ for (i = 0; i < kcs_pkt->data_in_idx; i++) ++ DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]); ++ DBG_KCS("\n"); ++#endif ++ ++ /* ++ * TODO: Move it to IPMI Command Handler ++ * Below code is added for timebeing till ++ * we implement the IPMI command handler. ++ */ ++ kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */ ++ kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */ ++ ++ if (((kcs_pkt->data_in[0] >> 2) == 0x06) && ++ (kcs_pkt->data_in[1] == 0x01)) { ++ /* Get Device ID */ ++ u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02, ++ 0xBF, 0x57, 0x01, 0x00, 0x7B, ++ 0x00, 0x00, 0x00, 0x00, 0x00 }; ++ for (i = 0; i < 15; i++) ++ kcs_pkt->data_out[i + 3] = device_id[i]; ++ kcs_pkt->data_out_len = 18; ++ } else if (((kcs_pkt->data_in[0] >> 2) == 0x06) && ++ (kcs_pkt->data_in[1] == 0x04)) { ++ /* Get Self Test Results */ ++ kcs_pkt->data_out[3] = 0x56; ++ kcs_pkt->data_out[4] = 0x00; ++ kcs_pkt->data_out_len = 5; ++ } else { ++ kcs_pkt->data_out[2] = ++ IPMI_CC_INVALID; /* Invalid or not supported. */ ++ kcs_pkt->data_out_len = 3; ++ } ++ /* END: TODO */ ++ ++#ifdef DEBUG_KCS_ENABLED ++ DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len); ++ for (i = 0; i < kcs_pkt->data_out_len; i++) ++ DBG_KCS(" 0x%02x", kcs_pkt->data_out[i]); ++ DBG_KCS("\n"); ++#endif ++ ++ kcs_pkt->phase = KCS_PHASE_READ; ++ write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]); ++ kcs_pkt->read_req_done = false; ++} ++ ++static void read_kcs_data(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ ++ switch (kcs_pkt->phase) { ++ case KCS_PHASE_WRITE_START: ++ kcs_pkt->phase = KCS_PHASE_WRITE_DATA; ++ /* fall through */ ++ ++ case KCS_PHASE_WRITE_DATA: ++ if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) { ++ kcs_pkt->error = KCS_LENGTH_ERROR; ++ kcs_force_abort(channel_num); ++ return; ++ } ++ set_kcs_state(channel_num, KCS_STATE_WRITE); ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->data_in[kcs_pkt->data_in_idx++] = ++ read_data(channel_num); ++ break; ++ ++ case KCS_PHASE_WRITE_END: ++ if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) { ++ kcs_pkt->error = KCS_LENGTH_ERROR; ++ kcs_force_abort(channel_num); ++ return; ++ } ++ set_kcs_state(channel_num, KCS_STATE_READ); ++ kcs_pkt->data_in[kcs_pkt->data_in_idx++] = ++ read_data(channel_num); ++ kcs_pkt->phase = KCS_PHASE_READ_WAIT; ++ kcs_pkt->read_req_done = true; ++ ++ process_kcs_request(channel_num); ++ break; ++ ++ case KCS_PHASE_READ: ++ if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len) ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ ++ u8 data = read_data(channel_num); ++ if (data != KCS_CTRL_CODE_READ) { ++ DBG_KCS("Invalid Read data. Phase:%d, Data:0x%02x\n", ++ kcs_pkt->phase, data); ++ set_kcs_state(channel_num, KCS_STATE_ERROR); ++ write_data(channel_num, ZERO_DATA); ++ break; ++ } ++ ++ if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len) { ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ break; ++ } ++ write_data(channel_num, ++ kcs_pkt->data_out[kcs_pkt->data_out_idx++]); ++ break; ++ ++ case KCS_PHASE_ABORT_1: ++ set_kcs_state(channel_num, KCS_STATE_READ); ++ read_data(channel_num); ++ write_data(channel_num, kcs_pkt->error); ++ kcs_pkt->phase = KCS_PHASE_ABORT_2; ++ break; ++ ++ case KCS_PHASE_ABORT_2: ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ read_data(channel_num); ++ write_data(channel_num, ZERO_DATA); ++ kcs_pkt->phase = KCS_PHASE_IDLE; ++ break; ++ ++ default: ++ kcs_force_abort(channel_num); ++ } ++} ++ ++static void read_kcs_cmd(u16 channel_num) ++{ ++ struct kcs_packet *kcs_pkt = NULL; ++ ++ kcs_pkt = get_kcs_packet(channel_num); ++ ++ set_kcs_state(channel_num, KCS_STATE_WRITE); ++ write_data(channel_num, ZERO_DATA); ++ ++ u16 cmd = read_data(channel_num); ++ switch (cmd) { ++ case KCS_CTRL_CODE_WRITE_START: ++ init_kcs_packet(channel_num); ++ kcs_pkt->phase = KCS_PHASE_WRITE_START; ++ break; ++ ++ case KCS_CTRL_CODE_WRITE_END: ++ if (kcs_pkt->error != KCS_NO_ERROR) { ++ kcs_force_abort(channel_num); ++ return; ++ } ++ ++ kcs_pkt->phase = KCS_PHASE_WRITE_END; ++ break; ++ ++ case KCS_CTRL_CODE_GET_STATUS_ABORT: ++ kcs_pkt->phase = KCS_PHASE_ABORT_1; ++ kcs_pkt->error = KCS_ABORT_BY_CMD; ++ break; ++ ++ default: ++ kcs_pkt->error = KCS_ILLEGAL_CTRL_CMD; ++ kcs_force_abort(channel_num); ++ } ++} ++ ++static void kcs_irq_handler(void *cookie) ++{ ++ u32 channel_num = (u32)cookie; ++ /* Look-up the interrupted KCS channel */ ++ u16 status = read_status(channel_num); ++ if (status & BIT_STATUS_IBF) { ++ if (status & BIT_STATUS_COD) ++ read_kcs_cmd(channel_num); ++ else ++ read_kcs_data(channel_num); ++ } ++ ++ DBG_KCS("%s: chan_no: %d\n", __FUNC__, channel_num); ++} ++ ++static void set_kcs_channel_addr(u16 channel_num) ++{ ++ u32 val; ++ ++ switch (channel_num) { ++ case 1: ++ val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_LADR12AS; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = (KCS_CHANNEL1_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR12H); ++ val = (KCS_CHANNEL1_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR12L); ++ break; ++ ++ case 2: ++ val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_LADR12AS; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = (KCS_CHANNEL2_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR12H); ++ val = (KCS_CHANNEL2_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR12L); ++ break; ++ ++ case 3: ++ val = (KCS_CHANNEL3_ADDR >> 8); ++ writel(val, AST_LPC_BASE + LPC_LADR3H); ++ val = (KCS_CHANNEL3_ADDR & 0xFF); ++ writel(val, AST_LPC_BASE + LPC_LADR3L); ++ break; ++ ++ case 4: ++ val = (((KCS_CHANNEL4_ADDR + 1) << 16) | KCS_CHANNEL4_ADDR); ++ writel(val, AST_LPC_BASE + LPC_LADR4); ++ break; ++ ++ default: ++ DBG_KCS("Invalid channel (%d) specified\n", channel_num); ++ break; ++ } ++} ++ ++static void enable_kcs_channel(u16 channel_num, u16 enable) ++{ ++ u32 val; ++ ++ switch (channel_num) { ++ case 1: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE1; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC1E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC1E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE1; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 2: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE2; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC2E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC2E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE2; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 3: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE3; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC3E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_KCSENBL; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC3E; ++ writel(val, AST_LPC_BASE + LPC_HICR0); ++ val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_KCSENBL; ++ writel(val, AST_LPC_BASE + LPC_HICR4); ++ val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE3; ++ writel(val, AST_LPC_BASE + LPC_HICR2); ++ } ++ break; ++ ++ case 4: ++ if (enable) { ++ val = readl(AST_LPC_BASE + LPC_HICRB) | BIT_IBFIE4 | ++ BIT_LPC4E; ++ writel(val, AST_LPC_BASE + LPC_HICRB); ++ } else { ++ val = readl(AST_LPC_BASE + LPC_HICRB) & ++ ~(BIT_IBFIE4 | BIT_LPC4E); ++ writel(val, AST_LPC_BASE + LPC_HICRB); ++ } ++ break; ++ ++ default: ++ DBG_KCS("Invalid channel (%d) specified\n", channel_num); ++ } ++} ++ ++void kcs_init(void) ++{ ++ /* Initialize the KCS channels. */ ++ for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) { ++ uint channel_num = (uint)enabled_kcs_channel[idx]; ++ DBG_KCS("%s Channel: %d\n", __func__, channel_num); ++ set_kcs_channel_addr(channel_num); ++ enable_kcs_channel(channel_num, 1); ++ ++ /* Set KCS channel state to idle */ ++ set_kcs_state(channel_num, KCS_STATE_IDLE); ++ /* KCS interrupt */ ++ irq_install_handler(IRQ_SRC_KCS_BASE + channel_num - 1, ++ kcs_irq_handler, (void *)channel_num); ++ } ++} +diff --git a/board/aspeed/ast2600_intel/ast-kcs.h b/board/aspeed/ast2600_intel/ast-kcs.h +new file mode 100644 +index 000000000000..e9b949eccf69 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ast-kcs.h +@@ -0,0 +1,112 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018-2020 Intel Corporation */ ++ ++#include <asm/io.h> ++#include <common.h> ++ ++#define KCS_CHANNEL_MAX 4 ++#define IRQ_SRC_KCS_BASE 170 /* IRQ 170 */ ++#define MAX_KCS_PKT_SIZE (64 * 1024) ++/* KCS channel addresses */ ++#define KCS_CHANNEL1_ADDR 0xCA0 ++#define KCS_CHANNEL2_ADDR 0xCA8 ++#define KCS_CHANNEL3_ADDR 0xCA2 /* KCS SMS */ ++#define KCS_CHANNEL4_ADDR 0xCA4 /* KCS SMM */ ++ ++#define ZERO_DATA 0x00 ++ ++#define AST_LPC_BASE 0x1e789000 ++ ++/* Aspeed KCS control registers */ ++#define LPC_HICR0 0x00 /* Host Interface Control Register 0 */ ++#define LPC_HICR1 0x04 /* Host Interface Control Register 1 */ ++#define LPC_HICR2 0x08 /* Host Interface Control Register 2 */ ++#define LPC_HICR3 0x0C /* Host Interface Control Register 3 */ ++#define LPC_HICR4 0x10 /* Host Interface Control Register 4 */ ++#define LPC_LADR3H 0x14 /* LPC channel #3 Address Register H */ ++#define LPC_LADR3L 0x18 /* LPC channel #3 Address Register H */ ++#define LPC_LADR12H 0x1C /* LPC channel #1#2 Address Register H */ ++#define LPC_LADR12L 0x20 /* LPC channel #1#2 Address Register L */ ++#define LPC_IDR1 0x24 /* Input Data Register 1 */ ++#define LPC_IDR2 0x28 /* Input Data Register 2 */ ++#define LPC_IDR3 0x2C /* Input Data Register 3 */ ++#define LPC_ODR1 0x30 /* Output Data Register 1 */ ++#define LPC_ODR2 0x34 /* Output Data Register 2 */ ++#define LPC_ODR3 0x38 /* Output Data Register 3 */ ++#define LPC_STR1 0x3C /* Status Register 1 */ ++#define LPC_STR2 0x40 /* Status Register 2 */ ++#define LPC_STR3 0x44 /* Status Register 3 */ ++#define LPC_HICRB 0x100 /* Host Interface Control Register B */ ++#define LPC_LADR4 0x110 /* LPC channel #4 Address Register */ ++#define LPC_IDR4 0x114 /* Input Data Register 4 */ ++#define LPC_ODR4 0x118 /* Output Data Register 4 */ ++#define LPC_STR4 0x11C /* Status Data Register 4 */ ++ ++/* LPC Bits */ ++#define BIT_LADR12AS BIT(7) /* Channel Address selection */ ++#define BIT_IBFIE1 BIT(1) /* Enable IDR1 Recv completion interrupt */ ++#define BIT_IBFIE2 BIT(2) /* Enable IDR2 Recv completion interrupt */ ++#define BIT_IBFIE3 BIT(3) /* Enable IBF13 interrupt */ ++#define BIT_LPC1E BIT(5) /* Enable LPC channel #1 */ ++#define BIT_LPC2E BIT(6) /* Enable LPC channel #2 */ ++#define BIT_LPC3E BIT(7) /* Enable LPC channel #2 */ ++#define BIT_KCSENBL BIT(2) /* Enable KCS interface in Channel #3 */ ++#define BIT_IBFIE4 BIT(1) ++#define BIT_LPC4E BIT(0) ++ ++#define BIT_STATUS_OBF BIT(0) /* Output Data Register full #1/#2/#3 */ ++#define BIT_STATUS_IBF BIT(1) /* Input Data Register full #1/#2/#3 */ ++#define BIT_STATUS_COD BIT(3) /* Command/Data - (1=command,0=data) */ ++ ++#define KCS_STATE_MASK 0xC0 /* BIT[6:7] of status register */ ++#define KCS_STATE(state) ((state) << 6) ++ ++/* IPMI2.0(section 9.7) - KCS interface State Bits */ ++#define KCS_STATE_IDLE 0x00 ++#define KCS_STATE_READ 0x01 ++#define KCS_STATE_WRITE 0x02 ++#define KCS_STATE_ERROR 0x03 ++ ++/* IPMI2.0(section 9.10) - KCS interface control codes */ ++#define KCS_CTRL_CODE_GET_STATUS_ABORT 0x60 ++#define KCS_CTRL_CODE_WRITE_START 0x61 ++#define KCS_CTRL_CODE_WRITE_END 0x62 ++#define KCS_CTRL_CODE_READ 0x68 ++ ++struct kcs_io_reg { ++ u32 idr; ++ u32 odr; ++ u32 str; ++}; ++ ++enum kcs_phase { ++ KCS_PHASE_IDLE = 0, ++ KCS_PHASE_WRITE_START = 1, ++ KCS_PHASE_WRITE_DATA = 2, ++ KCS_PHASE_WRITE_END = 3, ++ KCS_PHASE_READ_WAIT = 4, ++ KCS_PHASE_READ = 5, ++ KCS_PHASE_ABORT_1 = 6, ++ KCS_PHASE_ABORT_2 = 7, ++ KCS_PHASE_ERROR = 8 ++}; ++ ++enum kcs_error { ++ KCS_NO_ERROR = 0x00, ++ KCS_ABORT_BY_CMD = 0x01, ++ KCS_ILLEGAL_CTRL_CMD = 0x02, ++ KCS_LENGTH_ERROR = 0x06, ++ KCS_UNSPECIFIED_ERROR = 0xFF, ++}; ++ ++struct kcs_packet { ++ enum kcs_phase phase; ++ enum kcs_error error; ++ u16 channel; ++ bool read_req_done; ++ u16 data_in_idx; ++ u8 data_in[MAX_KCS_PKT_SIZE]; ++ u16 data_out_len; ++ u16 data_out_idx; ++ u8 data_out[MAX_KCS_PKT_SIZE]; ++}; +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 7c005fb323e6..b3d2fb313561 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -281,6 +281,7 @@ int board_early_init_r(void) + } + + extern void espi_init(void); ++extern void kcs_init(void); + extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, + void *cookie); + int board_late_init(void) +@@ -290,6 +291,9 @@ int board_late_init(void) + timer_enable(0, ONE_SEC_IN_USEC, timer_callback, (void *)0); + espi_init(); + ++ if (read_ffuj()) ++ kcs_init(); ++ + return 0; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0012-IPMI-command-handler-implementation-in-uboot.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0012-IPMI-command-handler-implementation-in-uboot.patch new file mode 100644 index 000000000..67123645d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0012-IPMI-command-handler-implementation-in-uboot.patch @@ -0,0 +1,330 @@ +From 19bbdf59f39d295ad3e698b121a0b447b77b927c Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 20 Apr 2020 16:13:09 -0700 +Subject: [PATCH] IPMI command handler implementation in uboot + +IPMI command handler implementation in uBoot. +Implemented IPMI commands: + 1) Get Device ID + 2) Get Self Test Result + +Tested By: +Ran the above IPMI command Via KCS channel +and got proper response. +- Get Device ID + Req: ipmitool raw 6 1 + Res: 00 23 00 82 03 02 00 57 01 00 7b 00 00 00 00 00 +- Get Self Test Results + Req: ipmitool raw 6 4 + Res: 56 00 + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/Makefile | 1 + + board/aspeed/ast2600_intel/ast-kcs.c | 77 +++++++++++--------- + board/aspeed/ast2600_intel/ipmi-handler.c | 117 ++++++++++++++++++++++++++++++ + board/aspeed/ast2600_intel/ipmi-handler.h | 39 ++++++++++ + 4 files changed, 200 insertions(+), 34 deletions(-) + create mode 100644 board/aspeed/ast2600_intel/ipmi-handler.c + create mode 100644 board/aspeed/ast2600_intel/ipmi-handler.h + +diff --git a/board/aspeed/ast2600_intel/Makefile b/board/aspeed/ast2600_intel/Makefile +index d049922719f3..a0587323afe0 100644 +--- a/board/aspeed/ast2600_intel/Makefile ++++ b/board/aspeed/ast2600_intel/Makefile +@@ -3,3 +3,4 @@ obj-y += ast-espi.o + obj-y += ast-irq.o + obj-y += ast-timer.o + obj-y += ast-kcs.o ++obj-y += ipmi-handler.o +diff --git a/board/aspeed/ast2600_intel/ast-kcs.c b/board/aspeed/ast2600_intel/ast-kcs.c +index a03b7e725370..3889cd9222a4 100644 +--- a/board/aspeed/ast2600_intel/ast-kcs.c ++++ b/board/aspeed/ast2600_intel/ast-kcs.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + // Copyright (c) 2018-2020 Intel Corporation + +-#include "ast-kcs.h" ++#include "ipmi-handler.h" + + #ifdef DEBUG_KCS_ENABLED + #define DBG_KCS printf +@@ -9,11 +9,6 @@ + #define DBG_KCS(...) + #endif + +-/* TODO: Move to IPMI file. */ +-#define IPMI_CC_OK 0x00 +-#define IPMI_CC_INVALID 0xC1 +-#define IPMI_CC_UNSPECIFIED 0xFF +- + #define KCS_CHANNEL_NO_3 3 + + static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 }; +@@ -103,6 +98,7 @@ static void init_kcs_packet(u16 channel_num) + static void process_kcs_request(u16 channel_num) + { + struct kcs_packet *kcs_pkt = NULL; ++ struct ipmi_cmd_data ipmi_data; + int i; + + kcs_pkt = get_kcs_packet(channel_num); +@@ -117,37 +113,49 @@ static void process_kcs_request(u16 channel_num) + DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]); + DBG_KCS("\n"); + #endif ++ u8 req_lun = kcs_pkt->data_in[0] & 0x03; /* LUN[1:0] */ ++ ipmi_data.net_fun = (kcs_pkt->data_in[0] >> 2); /* netfn[7:2] */ ++ ipmi_data.cmd = kcs_pkt->data_in[1]; /* cmd */ ++ /* We support only BMC LUN 00h */ ++ if (req_lun != LUN_BMC) { ++ kcs_pkt->data_out[0] = ++ GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_INVALID_CMD_LUN; /* CC code */ ++ kcs_pkt->data_out_len = 3; ++ goto done; ++ } + +- /* +- * TODO: Move it to IPMI Command Handler +- * Below code is added for timebeing till +- * we implement the IPMI command handler. +- */ +- kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */ +- kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */ +- kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */ +- +- if (((kcs_pkt->data_in[0] >> 2) == 0x06) && +- (kcs_pkt->data_in[1] == 0x01)) { +- /* Get Device ID */ +- u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02, +- 0xBF, 0x57, 0x01, 0x00, 0x7B, +- 0x00, 0x00, 0x00, 0x00, 0x00 }; +- for (i = 0; i < 15; i++) +- kcs_pkt->data_out[i + 3] = device_id[i]; +- kcs_pkt->data_out_len = 18; +- } else if (((kcs_pkt->data_in[0] >> 2) == 0x06) && +- (kcs_pkt->data_in[1] == 0x04)) { +- /* Get Self Test Results */ +- kcs_pkt->data_out[3] = 0x56; +- kcs_pkt->data_out[4] = 0x00; +- kcs_pkt->data_out_len = 5; +- } else { +- kcs_pkt->data_out[2] = +- IPMI_CC_INVALID; /* Invalid or not supported. */ ++ /* Boundary check */ ++ if ((kcs_pkt->data_in_idx - 2) > sizeof(ipmi_data.req_data)) { ++ kcs_pkt->data_out[0] = ++ GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */ ++ kcs_pkt->data_out[2] = IPMI_CC_OUT_OF_SPACE; /* CC code */ + kcs_pkt->data_out_len = 3; ++ goto done; + } +- /* END: TODO */ ++ /* Fill in IPMI request data */ ++ ipmi_data.req_len = kcs_pkt->data_in_idx - 2; ++ for (i = 0; i < kcs_pkt->data_in_idx - 2; i++) ++ ipmi_data.req_data[i] = kcs_pkt->data_in[i + 2]; ++ ++ /* Call IPMI command handler */ ++ ipmi_cmd_handler(&ipmi_data); ++ ++ /* Get IPMI response and fill KCS out data */ ++ /* First 2 bytes in KCS response are netFn, Cmd */ ++ kcs_pkt->data_out[0] = GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun); ++ kcs_pkt->data_out[1] = ipmi_data.cmd; ++ if ((ipmi_data.res_len + 2) > sizeof(kcs_pkt->data_out)) { ++ kcs_pkt->data_out[2] = IPMI_CC_UNSPECIFIED; /* CC code */ ++ kcs_pkt->data_out_len = 3; ++ goto done; ++ } ++ for (i = 0; i < ipmi_data.res_len; i++) ++ kcs_pkt->data_out[i + 2] = ipmi_data.res_data[i]; ++ ++ kcs_pkt->data_out_len = ipmi_data.res_len + 2; + + #ifdef DEBUG_KCS_ENABLED + DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len); +@@ -156,6 +164,7 @@ static void process_kcs_request(u16 channel_num) + DBG_KCS("\n"); + #endif + ++done: + kcs_pkt->phase = KCS_PHASE_READ; + write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]); + kcs_pkt->read_req_done = false; +diff --git a/board/aspeed/ast2600_intel/ipmi-handler.c b/board/aspeed/ast2600_intel/ipmi-handler.c +new file mode 100644 +index 000000000000..04732846ac28 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ipmi-handler.c +@@ -0,0 +1,117 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Copyright (c) 2018-2020 Intel Corporation ++ ++#include "ipmi-handler.h" ++ ++/* IPMI network function codes */ ++#define NETFN_APP 0x06 ++ ++/* IPMI command codes */ ++#define CMD_GET_DEV_ID 0x01 ++#define CMD_GET_SELF_TEST_RESULTS 0x04 ++ ++typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res); ++ ++struct get_dev_id { ++ u8 completion_code; ++ u8 dev_id; ++ u8 dev_rev; ++ u8 fw_rev1; ++ u8 fw_rev2; ++ u8 ipmi_ver; ++ u8 dev_support; ++ u8 mfg_id[3]; ++ u8 product_id[2]; ++ u8 aux_fw_rev[4]; ++}; ++struct self_test_res { ++ u8 completion_code; ++ u8 res_byte[2]; ++}; ++ ++struct ipmi_cmd_table { ++ u8 net_fun; ++ u8 cmd; ++ fun_handler process_cmd; ++}; ++ ++static u16 get_device_id(u8 *req, u16 req_len, u8 *res) ++{ ++ /* Get Device ID */ ++ bool operation = 1; /* Firmware operation */ ++ u8 intel_mfg_id[3] = { 0x57, 0x01, 0x00 }; ++ u8 platform_id[2] = { 0x7B, 0x00 }; ++ u8 aux_fw_rev[4] = { 0x00, 0x00, 0x00, 0x00 }; ++ struct get_dev_id *result = (struct get_dev_id *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ result->dev_id = 0x23; ++ result->dev_rev = 0x00; /* Not provides dev SDR */ ++ ++ result->ipmi_ver = 0x02; /* IPMI 2.0 */ ++ result->dev_support = 0x00; /* No dev support in this mode */ ++ memcpy(result->mfg_id, intel_mfg_id, sizeof(result->mfg_id)); ++ memcpy(result->aux_fw_rev, aux_fw_rev, sizeof(result->aux_fw_rev)); ++ ++ /* TODO: Get Firmware version from flash(PFM Header) */ ++ result->fw_rev1 = ((operation << 7) | (0x02 & 0x7F)); ++ result->fw_rev2 = 0x03; ++ /* TODO: Read Platform ID from GPIO */ ++ memcpy(result->product_id, platform_id, sizeof(result->product_id)); ++ ++ return sizeof(struct get_dev_id); ++} ++ ++static u16 get_self_test_result(u8 *req, u16 req_len, u8 *res) ++{ ++ /* Get Self Test Results */ ++ struct self_test_res *result = (struct self_test_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ result->completion_code = IPMI_CC_OK; ++ result->res_byte[0] = 0x56; /* Self test function not implemented. */ ++ result->res_byte[1] = 0x00; ++ ++ return sizeof(struct self_test_res); ++} ++ ++const struct ipmi_cmd_table cmd_info[] = { ++ { NETFN_APP, CMD_GET_DEV_ID, get_device_id }, ++ { NETFN_APP, CMD_GET_SELF_TEST_RESULTS, get_self_test_result } ++}; ++ ++#define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info) ++ ++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data) ++{ ++ int i = 0; ++ for (i = 0; i < CMD_TABLE_SIZE; i++) { ++ if ((cmd_info[i].net_fun == ipmi_data->net_fun) && ++ (cmd_info[i].cmd == ipmi_data->cmd)) { ++ break; ++ } ++ } ++ ++ if (i == CMD_TABLE_SIZE) { ++ /* Invalid or not supported. */ ++ ipmi_data->res_data[0] = IPMI_CC_INVALID_CMD; ++ ipmi_data->res_len = 1; ++ return; ++ } ++ ++ /* Call the appropriate function handler */ ++ ipmi_data->res_len = ++ cmd_info[i].process_cmd(ipmi_data->req_data, ipmi_data->req_len, ++ &ipmi_data->res_data[0]); ++ ++ return; ++} +diff --git a/board/aspeed/ast2600_intel/ipmi-handler.h b/board/aspeed/ast2600_intel/ipmi-handler.h +new file mode 100644 +index 000000000000..11a2e91fe2c2 +--- /dev/null ++++ b/board/aspeed/ast2600_intel/ipmi-handler.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* Copyright (c) 2018-2020 Intel Corporation */ ++ ++#include "ast-kcs.h" ++ ++/* IPMI completion codes */ ++#define IPMI_CC_OK 0x00 ++#define IPMI_CC_NODE_BUSY 0xC0 ++#define IPMI_CC_INVALID_CMD 0xC1 ++#define IPMI_CC_INVALID_CMD_LUN 0xC2 ++#define IPMI_CC_OUT_OF_SPACE 0xC4 ++#define IPMI_CC_INVALID_DATA_LENGTH 0xC7 ++#define IPMI_CC_INVALID_DATA_FIELD 0xCC ++#define IPMI_CC_UNSPECIFIED 0xFF ++ ++/* BMC IPMB LUNs */ ++#define LUN_BMC 0x00 ++#define LUN_OEM1 0x01 ++#define LUN_SMS 0x02 ++#define LUN_OEM2 0x01 ++ ++ ++#define MAX_IPMI_REQ_DATA_SIZE MAX_KCS_PKT_SIZE ++#define MAX_IPMI_RES_DATA_SIZE 64 ++ ++/* Response netFn[7:2], Lun[1:0] */ ++#define GET_RESP_NETFN_LUN(lun, netfn) \ ++ ((lun & 0x03) | (((netfn + 1) << 2) & 0xFD)) ++ ++struct ipmi_cmd_data { ++ u8 net_fun; ++ u8 cmd; ++ u16 req_len; ++ u16 res_len; ++ u8 req_data[MAX_IPMI_REQ_DATA_SIZE]; ++ u8 res_data[MAX_IPMI_RES_DATA_SIZE]; ++}; ++ ++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data); +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0013-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0013-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch new file mode 100644 index 000000000..04baccf66 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0013-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch @@ -0,0 +1,58 @@ +From e027384b44aff330375477556eed10c326ad1c48 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 27 Apr 2020 12:40:01 -0700 +Subject: [PATCH] Add a workaround to cover UART interrupt bug in AST2600 A0 + +This commit adds a workaround to cover UART interrupt bug in +AST2600 A0 revision. It makes infinite reading on the UART +0x7c +register for clearing abnormal interrupts in every milli-second. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 22 +++++++++++++++++++--- + 1 file changed, 19 insertions(+), 3 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index b3d2fb313561..0d1ce69b6e53 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -251,7 +251,19 @@ void enable_onboard_tpm(void) + + static void timer_callback(void *cookie) + { +- debug("+"); ++ uint timer_nr = (uint)cookie; ++ u32 dummy; ++ ++ switch (timer_nr) { ++ case 0: ++ /* WA for UART interrupt bug in A0 */ ++ dummy = readl(0x1e78307c); ++ dummy = readl(0x1e78407c); ++ dummy = readl(0x1e78d07c); ++ dummy = readl(0x1e78e07c); ++ dummy = readl(0x1e78f07c); ++ break; ++ } + } + + int board_early_init_f(void) +@@ -286,9 +298,13 @@ extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, + void *cookie); + int board_late_init(void) + { +-#define ONE_SEC_IN_USEC 1000000 ++#define SCU_014 0x014 /* Silicon Revision ID */ ++#define REV_ID_AST2600A0 0x05000303 /* AST2600 A0 */ ++#define ONE_MSEC_IN_USEC 1000 ++ ++ if (readl(SCU_BASE | SCU_014) == REV_ID_AST2600A0) ++ timer_enable(0, ONE_MSEC_IN_USEC, timer_callback, (void *)0); + +- timer_enable(0, ONE_SEC_IN_USEC, timer_callback, (void *)0); + espi_init(); + + if (read_ffuj()) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0014-Add-a-workaround-to-cover-eSPI-OOB-free-bug-in-AST26.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0014-Add-a-workaround-to-cover-eSPI-OOB-free-bug-in-AST26.patch new file mode 100644 index 000000000..0a8333e7d --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0014-Add-a-workaround-to-cover-eSPI-OOB-free-bug-in-AST26.patch @@ -0,0 +1,138 @@ +From 40ab08221b6f8d67d154d8f91b8e55a11d412120 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 27 Apr 2020 17:05:09 -0700 +Subject: [PATCH] Add a workaround to cover eSPI OOB free bug in AST2600 A0 + +This commit adds a workaround to cover eSPI OOB free bug in AST2600 +A0 revision. It enables GPIO W7 interrupt to catch eSPI reset signal +and it sets when the reset signal is deasserted to manually set the +OOB free bit in eSPI protocol. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/ast-espi.c | 79 ++++++++++++++++++++++++++--------- + 1 file changed, 59 insertions(+), 20 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/ast-espi.c b/board/aspeed/ast2600_intel/ast-espi.c +index 1d7ae529612d..a8b389f159ef 100644 +--- a/board/aspeed/ast2600_intel/ast-espi.c ++++ b/board/aspeed/ast2600_intel/ast-espi.c +@@ -88,6 +88,7 @@ + #define AST_ESPI_OOB_CHRDY BIT(4) + #define AST_ESPI_FLASH_SW_CHRDY BIT(7) + #define AST_ESPI_FLASH_SW_READ BIT(10) ++#define AST_ESPI_SW_RESET GENMASK(31, 24) + + /* ESPI00C bits (Interrupt Enable) */ + #define AST_ESPI_IEN_HW_RST BIT(31) +@@ -122,6 +123,7 @@ + /* LPC chip ID */ + #define SCR0SIO 0x170 + #define IRQ_SRC_ESPI 74 /* IRQ 74 */ ++#define IRQ_SRC_GPIO 72 /* IRQ 72 */ + + static void espi_handshake_ack(void) + { +@@ -205,9 +207,9 @@ static void espi_irq_handler(void *cookie) + } + + if (irq_status & AST_ESPI_HW_RST) { +- uint32_t v = readl(AST_ESPI_BASE + ESPI000) & 0x00ffffffff; +- writel(v, AST_ESPI_BASE + ESPI000); +- v |= 0xff000000; ++ uint32_t v; ++ ++ v = readl(AST_ESPI_BASE + ESPI000) | AST_ESPI_OOB_CHRDY; + writel(v, AST_ESPI_BASE + ESPI000); + + DBG_ESPI("HW_RESET\n"); +@@ -228,6 +230,56 @@ static void espi_irq_handler(void *cookie) + readl(AST_ESPI_BASE + ESPI12C), irq_status); + } + ++static void espi_configure_irq(void) ++{ ++ writel(0, AST_ESPI_BASE + ESPI110); ++ writel(0, AST_ESPI_BASE + ESPI114); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | ++ AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI118); ++ writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | ++ AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI094); ++ ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE + ESPI120); /* int type 0 susp warn */ ++ writel(0, AST_ESPI_BASE + ESPI124); ++ writel(0, AST_ESPI_BASE + ESPI128); ++ writel(AST_ESPI_SUS_WARN, ++ AST_ESPI_BASE + ++ ESPI100); /* Enable sysev1 ints for susp warn */ ++ ++ writel(AST_ESPI_IEN_HW_RST | AST_ESPI_IEN_SYS1_EV | ++ AST_ESPI_IEN_SYS_EV, AST_ESPI_BASE + ESPI00C); ++} ++ ++#define AST_GPIO_BASE 0x1e780000 ++#define GPIO_148 0x148 /* GPIO U/V/W/X Interrupt Enable */ ++#define GPIO_W7 BIT(23) ++#define GPIO_14C 0x14c /* GPIO U/V/W/X Sensitivity Type 0 */ ++#define GPIO_150 0x150 /* GPIO U/V/W/X Sensitivity Type 1 */ ++#define GPIO_154 0x154 /* GPIO U/V/W/X Sensitivity Type 2 */ ++#define GPIO_158 0x158 /* GPIO U/V/W/X Interrupt Status */ ++ ++static void espi_reset_handler(void *cookie) ++{ ++ if (readl(AST_GPIO_BASE + GPIO_158) & GPIO_W7) { ++ uint32_t v; ++ ++ writel(GPIO_W7, AST_GPIO_BASE + GPIO_158); ++ ++ v = readl(AST_ESPI_BASE + ESPI000) & ~AST_ESPI_SW_RESET; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ v |= AST_ESPI_SW_RESET; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ v = readl(AST_ESPI_BASE + ESPI000) & ~AST_ESPI_OOB_CHRDY; ++ writel(v, AST_ESPI_BASE + ESPI000); ++ ++ espi_configure_irq(); ++ ++ DBG_ESPI("eSPI Reset\n"); ++ } ++} ++ + void espi_init(void) + { + if (~readl(AST_SCU_BASE + AST_SCU_HW_STRAP2) & +@@ -266,25 +318,12 @@ void espi_init(void) + AST_ESPI_AUTO_ACK_SUS_WARN); + writel(v, AST_ESPI_BASE + ESPI080); /* Disable auto H/W ack */ + +- writel(0, AST_ESPI_BASE + ESPI110); +- writel(0, AST_ESPI_BASE + ESPI114); +- writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | +- AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI118); +- writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | +- AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI094); +- +- writel(AST_ESPI_SUS_WARN, +- AST_ESPI_BASE + ESPI120); /* int type 0 susp warn */ +- writel(0, AST_ESPI_BASE + ESPI124); +- writel(0, AST_ESPI_BASE + ESPI128); +- writel(AST_ESPI_SUS_WARN, +- AST_ESPI_BASE + +- ESPI100); /* Enable sysev1 ints for susp warn */ +- +- writel(AST_ESPI_IEN_HW_RST | AST_ESPI_IEN_SYS1_EV | +- AST_ESPI_IEN_SYS_EV, AST_ESPI_BASE + ESPI00C); ++ espi_configure_irq(); + + irq_install_handler(IRQ_SRC_ESPI, espi_irq_handler, NULL); ++ ++ irq_install_handler(IRQ_SRC_GPIO, espi_reset_handler, NULL); ++ writel(GPIO_W7, AST_GPIO_BASE + GPIO_148); + } else { + DBG_ESPI("No espi strap\n"); + } +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0015-net-phy-realtek-Change-LED-configuration.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0015-net-phy-realtek-Change-LED-configuration.patch new file mode 100644 index 000000000..e3b53f76a --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0015-net-phy-realtek-Change-LED-configuration.patch @@ -0,0 +1,40 @@ +From cb1d9b2cb8a3afbbdcc0b5ee81f48c4b185da2bd Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 5 Jun 2020 14:08:20 -0700 +Subject: [PATCH] net: phy: realtek: Change LED configuration + +This commit changes Realtek NIC port LED configuration like below: +LED0 (Right Green): Link 10/100/1000 +LED1 (Left Orange): Link 10/100 + Blink on Tx/Rx +LED2 (Left Green): Link 1000 + Blink on Tx/Rx + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + drivers/net/phy/realtek.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c +index 6976ff7c0846..5bd620f67b6a 100644 +--- a/drivers/net/phy/realtek.c ++++ b/drivers/net/phy/realtek.c +@@ -180,10 +180,15 @@ static int rtl8211f_config(struct phy_device *phydev) + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0x0); + +- /* Set green LED for Link, yellow LED for Active */ ++ /* ++ * Set LED configuration ++ * LED0 (Right Grean): Link 10/100/1000 ++ * LED1 (Left Orange): Link 10/100 + Active ++ * LED2 (Left Green): Link 1000 + Active ++ */ + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0xd04); +- phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x617f); ++ phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x626b); + phy_write(phydev, MDIO_DEVAD_NONE, + MIIM_RTL8211F_PAGE_SELECT, 0x0); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-LED-control-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-LED-control-support.patch new file mode 100644 index 000000000..774767f97 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-LED-control-support.patch @@ -0,0 +1,457 @@ +From d88bb32a5c33f356926a309289497f1b1e7c9aa1 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 2 Apr 2021 09:48:38 -0700 +Subject: [PATCH] Add LED control support + +This commit adds LED control support including customization and improvement +on led-gpio and led-uclass driver to support 'blink' mode. LEDs will behave +like below. + +Normal u-boot : Green LED blinks at 1Hz + ID LED blinks at 3Hz +FFU u-boot : Amber LED solid on + ID LED solid on +MFG detected : Green LED blinks at 3Hz + ID LED blinks at 3Hz +Failure Recovery : Amber LED blinks at 3Hz + ID LED solid on +Jumping to Kernel : Green LED solid on + ID LED solid on + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/dts/ast2600-intel.dts | 4 +- + board/aspeed/ast2600_intel/intel.c | 66 +++++++++++++++++++++++++++++- + cmd/net.c | 23 +++++++++-- + drivers/led/led-uclass.c | 37 +++++++++++++++++ + drivers/led/led_gpio.c | 62 ++++++++++++++++++++++++++++ + include/led.h | 42 ++++++++++++++++++- + 6 files changed, 226 insertions(+), 8 deletions(-) + +diff --git a/arch/arm/dts/ast2600-intel.dts b/arch/arm/dts/ast2600-intel.dts +index c7970c16a474..7cae636554b6 100644 +--- a/arch/arm/dts/ast2600-intel.dts ++++ b/arch/arm/dts/ast2600-intel.dts +@@ -58,8 +58,8 @@ + }; + hb-led { + label = "hb"; +- gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; +- linux,default-trigger = "heartbeat"; ++ gpios = <&gpio0 173 GPIO_ACTIVE_LOW>; ++ default-state = "on"; + }; + }; + }; +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 6e442cf01472..46f169589915 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -5,6 +5,7 @@ + #include <common.h> + #include <asm/gpio.h> + #include <asm/io.h> ++#include <led.h> + #include <malloc.h> + + /* use GPIOC0 on intel boards */ +@@ -26,7 +27,27 @@ int read_ffuj(void) + return ret; + ret = dm_gpio_get_value(&desc); + dm_gpio_free(desc.dev, &desc); +- return ret; ++ ++ if (ret) { ++ struct udevice *dev; ++ ++ /* FFU mode: ChassisID - Solid Blue, StatusLED - Solid Amber */ ++ ret = led_get_by_label("green", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_OFF); ++ ++ ret = led_get_by_label("amber", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_ON); ++ ++ ret = led_get_by_label("id", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_ON); ++ ++ return 1; ++ } ++ ++ return 0; + } + + /* gpio_abort is a weak symbol in common/autoboot.c */ +@@ -264,6 +285,11 @@ static void timer_callback(void *cookie) + dummy = readl(0x1e78e07c); + dummy = readl(0x1e78f07c); + break; ++#ifdef CONFIG_LED_BLINK ++ case 1: ++ led_blink_update(); ++ break; ++#endif + } + } + +@@ -286,10 +312,20 @@ int board_early_init_f(void) + + int board_early_init_r(void) + { ++ struct udevice *dev; ++ int ret; ++ + debug("board_early_init_r\n"); + + enable_onboard_tpm(); + ++ led_default_state(); ++#ifdef CONFIG_LED_BLINK ++ ret = led_get_by_label("id", &dev); ++ if (!ret) ++ led_set_period(dev, 160); ++#endif ++ + return 0; + } + +@@ -366,6 +402,11 @@ int board_late_init(void) + if (readl(SCU_BASE | SCU_014) == REV_ID_AST2600A0) + timer_enable(0, ONE_MSEC_IN_USEC, timer_callback, (void *)0); + ++#ifdef CONFIG_LED_BLINK ++ timer_enable(1, LED_BLINK_UPDATE_TICK_MS * ONE_MSEC_IN_USEC, ++ timer_callback, (void *)1); ++#endif ++ + espi_init(); + + /* Add reset reason to bootargs */ +@@ -391,6 +432,29 @@ void board_init(void) + } + */ + ++void board_preboot_os(void) ++{ ++ struct udevice *dev; ++ int ret; ++ ++ /* ++ * last second before OS booting ++ * ChassisID - Solid Blue, StatusLED - Solid Green ++ */ ++ ++ ret = led_get_by_label("green", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_ON); ++ ++ ret = led_get_by_label("amber", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_OFF); ++ ++ ret = led_get_by_label("id", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_ON); ++} ++ + #ifdef CONFIG_WATCHDOG + /* watchdog stuff */ + void watchdog_init(void) +diff --git a/cmd/net.c b/cmd/net.c +index 7d2c21ba4d22..a6b03654cdbf 100644 +--- a/cmd/net.c ++++ b/cmd/net.c +@@ -10,6 +10,7 @@ + #include <common.h> + #include <command.h> + #include <net.h> ++#include <led.h> + + static int netboot_common(enum proto_t, cmd_tbl_t *, int, char * const []); + +@@ -183,6 +184,10 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, + int size; + ulong addr; + ++#ifdef CONFIG_LED_BLINK ++ led_blink_disable(); ++#endif ++ + net_boot_file_name_explicit = false; + + /* pre-set load_addr */ +@@ -229,7 +234,8 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, + if (strict_strtoul(argv[1], 16, &save_addr) < 0 || + strict_strtoul(argv[2], 16, &save_size) < 0) { + printf("Invalid address/size\n"); +- return CMD_RET_USAGE; ++ rcode = CMD_RET_USAGE; ++ goto exit; + } + net_boot_file_name_explicit = true; + copy_filename(net_boot_file_name, argv[3], +@@ -238,14 +244,16 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, + #endif + default: + bootstage_error(BOOTSTAGE_ID_NET_START); +- return CMD_RET_USAGE; ++ rcode = CMD_RET_USAGE; ++ goto exit; + } + bootstage_mark(BOOTSTAGE_ID_NET_START); + + size = net_loop(proto); + if (size < 0) { + bootstage_error(BOOTSTAGE_ID_NET_NETLOOP_OK); +- return CMD_RET_FAILURE; ++ rcode = CMD_RET_FAILURE; ++ goto exit; + } + bootstage_mark(BOOTSTAGE_ID_NET_NETLOOP_OK); + +@@ -255,7 +263,8 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, + /* done if no file was loaded (no errors though) */ + if (size == 0) { + bootstage_error(BOOTSTAGE_ID_NET_LOADED); +- return CMD_RET_SUCCESS; ++ rcode = CMD_RET_SUCCESS; ++ goto exit; + } + + bootstage_mark(BOOTSTAGE_ID_NET_LOADED); +@@ -266,6 +275,12 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, + bootstage_mark(BOOTSTAGE_ID_NET_DONE); + else + bootstage_error(BOOTSTAGE_ID_NET_DONE_ERR); ++ ++exit: ++#ifdef CONFIG_LED_BLINK ++ led_blink_enable(); ++#endif ++ + return rcode; + } + +diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c +index 2859475a6b8e..264e0735c815 100644 +--- a/drivers/led/led-uclass.c ++++ b/drivers/led/led-uclass.c +@@ -62,6 +62,39 @@ int led_set_period(struct udevice *dev, int period_ms) + + return ops->set_period(dev, period_ms); + } ++ ++static bool blink_enable = true; ++ ++void led_blink_enable(void) ++{ ++ blink_enable = true; ++} ++ ++void led_blink_disable(void) ++{ ++ blink_enable = false; ++} ++ ++int led_blink_update(void) ++{ ++ struct udevice *dev; ++ ++ if (!blink_enable) ++ return 0; ++ ++ for (uclass_find_first_device(UCLASS_LED, &dev); ++ dev; ++ uclass_find_next_device(&dev)) { ++ if (device_active(dev) && led_get_state(dev) == LEDST_BLINK) { ++ struct led_ops *ops = led_get_ops(dev); ++ ++ if (ops && ops->update_blink) ++ ops->update_blink(dev); ++ } ++ } ++ ++ return 0; ++} + #endif + + int led_default_state(void) +@@ -87,6 +120,10 @@ int led_default_state(void) + led_set_state(dev, LEDST_ON); + else if (!strncmp(default_state, "off", 3)) + led_set_state(dev, LEDST_OFF); ++#ifdef CONFIG_LED_BLINK ++ else if (!strncmp(default_state, "blink", 5)) ++ led_set_state(dev, LEDST_BLINK); ++#endif + /* default-state = "keep" : device is only probed */ + } + +diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c +index 93f6b913c647..a88efde71a69 100644 +--- a/drivers/led/led_gpio.c ++++ b/drivers/led/led_gpio.c +@@ -13,8 +13,45 @@ + + struct led_gpio_priv { + struct gpio_desc gpio; ++#ifdef CONFIG_LED_BLINK ++ int period; ++ int period_tick_count; ++ enum led_state_t state; ++#endif + }; + ++#ifdef CONFIG_LED_BLINK ++static int gpio_led_set_period(struct udevice *dev, int period_ms) ++{ ++ struct led_gpio_priv *priv = dev_get_priv(dev); ++ ++ if (period_ms < LED_BLINK_UPDATE_TICK_MS) ++ period_ms = LED_BLINK_PERIOD_DEFAULT_MS; ++ ++ priv->period = period_ms / LED_BLINK_UPDATE_TICK_MS; ++ priv->period_tick_count = priv->period; ++ ++ return 0; ++} ++ ++static int gpio_led_update_blink(struct udevice *dev) ++{ ++ struct led_gpio_priv *priv = dev_get_priv(dev); ++ int ret; ++ ++ if (priv->period_tick_count) { ++ priv->period_tick_count--; ++ } else { ++ ret = dm_gpio_get_value(&priv->gpio); ++ if (ret >= 0) ++ dm_gpio_set_value(&priv->gpio, !ret); ++ priv->period_tick_count = priv->period; ++ } ++ ++ return 0; ++} ++#endif ++ + static int gpio_led_set_state(struct udevice *dev, enum led_state_t state) + { + struct led_gpio_priv *priv = dev_get_priv(dev); +@@ -25,6 +62,9 @@ static int gpio_led_set_state(struct udevice *dev, enum led_state_t state) + switch (state) { + case LEDST_OFF: + case LEDST_ON: ++#ifdef CONFIG_LED_BLINK ++ case LEDST_BLINK: ++#endif + break; + case LEDST_TOGGLE: + ret = dm_gpio_get_value(&priv->gpio); +@@ -36,6 +76,20 @@ static int gpio_led_set_state(struct udevice *dev, enum led_state_t state) + return -ENOSYS; + } + ++#ifdef CONFIG_LED_BLINK ++ priv->state = state; ++ ++ if (priv->state == LEDST_BLINK) { ++ if (priv->period < LED_BLINK_UPDATE_TICK_MS) { ++ priv->period = LED_BLINK_PERIOD_DEFAULT_MS / ++ LED_BLINK_UPDATE_TICK_MS; ++ priv->period_tick_count = priv->period; ++ } ++ ++ return dm_gpio_set_value(&priv->gpio, LEDST_ON); ++ } ++#endif ++ + return dm_gpio_set_value(&priv->gpio, state); + } + +@@ -46,6 +100,10 @@ static enum led_state_t gpio_led_get_state(struct udevice *dev) + + if (!dm_gpio_is_valid(&priv->gpio)) + return -EREMOTEIO; ++#ifdef CONFIG_LED_BLINK ++ if (priv->state == LEDST_BLINK) ++ return LEDST_BLINK; ++#endif + ret = dm_gpio_get_value(&priv->gpio); + if (ret < 0) + return ret; +@@ -117,6 +175,10 @@ static int led_gpio_bind(struct udevice *parent) + static const struct led_ops gpio_led_ops = { + .set_state = gpio_led_set_state, + .get_state = gpio_led_get_state, ++#ifdef CONFIG_LED_BLINK ++ .set_period = gpio_led_set_period, ++ .update_blink = gpio_led_update_blink, ++#endif + }; + + static const struct udevice_id led_gpio_ids[] = { +diff --git a/include/led.h b/include/led.h +index 7bfdddfd6fab..583dbd2f8f0e 100644 +--- a/include/led.h ++++ b/include/led.h +@@ -32,7 +32,6 @@ enum led_state_t { + #ifdef CONFIG_LED_BLINK + LEDST_BLINK, + #endif +- + LEDST_COUNT, + }; + +@@ -66,6 +65,17 @@ struct led_ops { + * @return 0 if OK, -ve on error + */ + int (*set_period)(struct udevice *dev, int period_ms); ++ ++ /** ++ * update_blink() - update blink output of an LED ++ * ++ * This should be called in every tick for updating blink behavior of an ++ * LED. ++ * ++ * @dev: LED device to change ++ * @return 0 if OK, -ve on error ++ */ ++ int (*update_blink)(struct udevice *dev); + #endif + }; + +@@ -115,4 +125,34 @@ int led_set_period(struct udevice *dev, int period_ms); + */ + int led_default_state(void); + ++#ifdef CONFIG_LED_BLINK ++#define LED_BLINK_UPDATE_TICK_MS 10 ++#define LED_BLINK_PERIOD_DEFAULT_MS 500 ++ ++/** ++ * led_blink_enable() - enable blinking for all LEDs that have the blink state ++ * ++ * This enables blinking for all LEDs that have the blink state. ++ * ++ */ ++void led_blink_enable(void); ++ ++/** ++ * led_blink_disable() - disable blinking for all LEDs that have the blink state ++ * ++ * This disables blinking for all LEDs that have the blink state. ++ * ++ */ ++void led_blink_disable(void); ++ ++/** ++ * led_blink_update() - timer tick callback for updating blink behavior ++ * ++ * This should be called on every LED_BLINK_UPDATE_TICK_MS for updating blink ++ * behavior of all LEDs that have the blink state. ++ * ++ */ ++int led_blink_update(void); ++#endif ++ + #endif +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-system-reset-status-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-system-reset-status-support.patch new file mode 100644 index 000000000..1b0d4d95b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0016-Add-system-reset-status-support.patch @@ -0,0 +1,154 @@ +From ea8f8aa37182b66893ac9afcbbb4d5043b3b4166 Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Tue, 9 Apr 2019 14:42:05 +0800 +Subject: [PATCH] Add system reset status support + +Will display the reset reasons and other CPU information in u-boot, +and save the reset reasons into kernel command line, +for applications to query. + +Change-Id: I87ada3ecf14368519e4d09035bb1e09fdc05469b +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/scu_info.c | 4 ++ + board/aspeed/ast2600_intel/intel.c | 65 +++++++++++++++++++++++++ + include/asm-generic/global_data.h | 3 ++ + 3 files changed, 72 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/scu_info.c b/arch/arm/mach-aspeed/ast2600/scu_info.c +index fe26f743c0ca..18514c812018 100644 +--- a/arch/arm/mach-aspeed/ast2600/scu_info.c ++++ b/arch/arm/mach-aspeed/ast2600/scu_info.c +@@ -9,6 +9,8 @@ + #include <asm/io.h> + #include <asm/arch/aspeed_scu_info.h> + ++DECLARE_GLOBAL_DATA_PTR; ++ + /* SoC mapping Table */ + #define SOC_ID(str, rev) { .name = str, .rev_id = rev, } + +@@ -263,6 +265,8 @@ void aspeed_print_sysrst_info(void) + writel(SYS_EXT_RESET, ASPEED_SYS_RESET_CTRL); + } + } ++ ++ gd->reset_reason = rest; + } + + #define SOC_FW_INIT_DRAM BIT(7) +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 0d1ce69b6e53..849e81ff3fef 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -5,6 +5,7 @@ + #include <common.h> + #include <asm/gpio.h> + #include <asm/io.h> ++#include <malloc.h> + + /* use GPIOC0 on intel boards */ + #define FFUJ_GPIO "gpio@1e78000016" +@@ -292,6 +293,65 @@ int board_early_init_r(void) + return 0; + } + ++static void update_bootargs_cmd(const char *key, const char *value) ++{ ++ int buf_len; ++ char *buf; ++ char *cmdline; ++ char comp_key[128]; ++ ++ if (!key || (key[0] == '\0')) { ++ printf("%s - Empty key not allowed\n", __func__); ++ return; ++ } ++ ++ cmdline = env_get("bootargs"); ++ ++ /* Allocate space for maximum possible new command line */ ++ if (value) ++ buf_len = strlen(cmdline) + strlen(key) + 3 + strlen(value); ++ else ++ buf_len = strlen(cmdline) + strlen(key) + 3; ++ ++ buf = malloc(buf_len); ++ if (!buf) { ++ printf("%s: out of memory\n", __func__); ++ return; ++ } ++ memset(buf, 0, buf_len); ++ ++ if (!cmdline) { ++ /* lets add key-value, though bootargs are empty */ ++ snprintf(buf, buf_len, "%s=%s", key, (value ? value : "")); ++ env_set("bootargs", buf); ++ free(buf); ++ return; ++ } ++ ++ snprintf(comp_key, sizeof(comp_key), "%s=", key); ++ char *start = strstr(cmdline, comp_key); ++ ++ /* Check for full word match. Match should be start of cmdline ++ * or there should be space before match */ ++ if (start && ((start == cmdline) || (*(start-1) == ' '))) { ++ char *end = strchr(start, ' '); ++ strncpy(buf, cmdline, (start - cmdline)); ++ ++ if (end) ++ snprintf(buf, buf_len, "%s%s=%s %s", buf, key, ++ (value ? value : ""), end+1); ++ else ++ snprintf(buf, buf_len, "%s%s=%s", buf, key, ++ (value ? value : "")); ++ } else { ++ snprintf(buf, buf_len, "%s %s=%s", cmdline, key, ++ (value ? value : "")); ++ } ++ ++ env_set("bootargs", buf); ++ free(buf); ++} ++ + extern void espi_init(void); + extern void kcs_init(void); + extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, +@@ -301,12 +361,17 @@ int board_late_init(void) + #define SCU_014 0x014 /* Silicon Revision ID */ + #define REV_ID_AST2600A0 0x05000303 /* AST2600 A0 */ + #define ONE_MSEC_IN_USEC 1000 ++ char value[11]; + + if (readl(SCU_BASE | SCU_014) == REV_ID_AST2600A0) + timer_enable(0, ONE_MSEC_IN_USEC, timer_callback, (void *)0); + + espi_init(); + ++ /* Add reset reason to bootargs */ ++ snprintf(value, sizeof(value), "0x%x", gd->reset_reason); ++ update_bootargs_cmd("resetreason", value); ++ + if (read_ffuj()) + kcs_init(); + +diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h +index 78dcf40bff48..fa51e384520f 100644 +--- a/include/asm-generic/global_data.h ++++ b/include/asm-generic/global_data.h +@@ -133,6 +133,9 @@ typedef struct global_data { + struct spl_handoff *spl_handoff; + # endif + #endif ++#ifdef CONFIG_ARCH_ASPEED ++ u32 reset_reason; ++#endif + } gd_t; + #endif + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0017-Manufacturing-mode-physical-presence-detection.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0017-Manufacturing-mode-physical-presence-detection.patch new file mode 100644 index 000000000..7df227c82 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0017-Manufacturing-mode-physical-presence-detection.patch @@ -0,0 +1,201 @@ +From 3b08379cb6e841c934ded3db3c70a3d0906cea65 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Thu, 20 Jun 2019 18:11:43 +0530 +Subject: [PATCH] Manufacturing mode physical presence detection + +Support for physical presence of manufacturing mode added. +Front panel power button press for 15 seconds will be detected +and marked as special mode for manufacturing request. +There will be Status LED blink for 10 seconds to do the physical +indication to the user. This indicates the user that he has +pressed power button long enough for manufacturing mode detection. + +Tested: +1. Verified by holding the power button when u-boot boots for +15 seconds, and confirmed that bootargs passed to linux has +special=mfg string and status led blink physical indication +has been provided +2. Verified in normal condition special=mfg string is not passed +and no physical indication has been provided + +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 87 ++++++++++++++++++++++++++++-- + common/autoboot.c | 12 ++++- + 2 files changed, 95 insertions(+), 4 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index f45b9d06a3f5..7664ac0ddfc6 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -8,6 +8,8 @@ + #include <led.h> + #include <malloc.h> + ++#define SYS_PWR_RESET_FLAG BIT(0) /* from scu_info.c */ ++ + /* use GPIOC0 on intel boards */ + #define FFUJ_GPIO "gpio@1e78000016" + +@@ -60,6 +62,26 @@ int gpio_abort(void) + return value <= 0 ? 0 : 1; + } + ++int read_frontpanel_power_button(void) ++{ ++#define FP_PWRBTN_GPIO "gpio@1e780000122" /* GPIOP2 */ ++ struct gpio_desc desc; ++ int ret; ++ ++ ret = dm_gpio_lookup_name(FP_PWRBTN_GPIO, &desc); ++ if (ret) ++ return ret; ++ ret = dm_gpio_request(&desc, "fp_pwrbtn"); ++ if (ret) ++ return ret; ++ ret = dm_gpio_set_dir_flags(&desc, GPIOD_ACTIVE_LOW); ++ if (ret) ++ return ret; ++ ret = dm_gpio_get_value(&desc); ++ dm_gpio_free(desc.dev, &desc); ++ return ret; ++} ++ + #define SCU_BASE 0x1E6E2000 + #define SCU_338 0x338 //Generate UART 24 MHz Reference from UXCLK + #define SCU_33C 0x33c //Generate UART 24 MHz Reference from HUXCLK +@@ -119,6 +141,10 @@ static void gpio_passthru_init(void) + SCU_BASE | SCU_418); + } + ++void board_pre_abort_autoboot(void) ++{ ++} ++ + #define AST_LPC_BASE 0x1e789000 + #define LPC_SNOOP_ADDR 0x80 + #define HICR5 0x080 /* Host Interface Control Register 5 */ +@@ -301,8 +327,6 @@ int board_early_init_f(void) + + set_gpio_default_state(); + +- gpio_passthru_init(); +- + port80h_snoop_init(); + + sgpio_init(); +@@ -389,6 +413,56 @@ static void update_bootargs_cmd(const char *key, const char *value) + free(buf); + } + ++static bool is_mfg_mode_phy_req(void) ++{ ++ /* ++ * Assume mfg mode physical request is made, if power button ++ * is pressed continously for 15 seconds, indicate the ++ * same in bootargs ++ */ ++ const uint32_t delay_in_ms = 100; ++ const uint32_t read_count = ((15 * 1000) / delay_in_ms); ++ const uint32_t delay_for_indication = 2 * 1000; ++ uint32_t count; ++#ifdef CONFIG_LED_BLINK ++ struct udevice *dev; ++ int ret; ++#endif ++ ++ for (count = 0; count < read_count; ++count) { ++ if (read_frontpanel_power_button() != 1) ++ return false; ++ ++ mdelay(delay_in_ms); ++ } ++ ++ printf("MFG mode is requested.\n"); ++ ++#ifdef CONFIG_LED_BLINK ++ ret = led_get_by_label("green", &dev); ++ if (!ret) { ++ led_set_period(dev, 160); ++ } ++#endif ++ ++ /* ++ * Delay up to 15 seconds until the power button is released to prevent ++ * unintentional power button overriding to PCH through GPIO ++ * pass-through. ++ */ ++ for (count = 0; count < read_count; ++count) { ++ if (read_frontpanel_power_button() != 1) ++ break; ++ ++ mdelay(delay_in_ms); ++ } ++ /* Keep the indication at least for 2 seconds */ ++ if (delay_in_ms * count < delay_for_indication) ++ mdelay(delay_for_indication - (delay_in_ms * count)); ++ ++ return true; ++} ++ + extern void espi_init(void); + extern void kcs_init(void); + extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, +@@ -414,8 +488,15 @@ int board_late_init(void) + snprintf(value, sizeof(value), "0x%x", gd->reset_reason); + update_bootargs_cmd("resetreason", value); + +- if (read_ffuj()) ++ /* Update the special mode in bootargs */ ++ if (gd->reset_reason & SYS_PWR_RESET_FLAG && is_mfg_mode_phy_req()) ++ update_bootargs_cmd("special", "mfg"); ++ ++ gpio_passthru_init(); ++ ++ if (read_ffuj()) { + kcs_init(); ++ } + + return 0; + } +diff --git a/common/autoboot.c b/common/autoboot.c +index 5e69000b848b..8a9978042386 100644 +--- a/common/autoboot.c ++++ b/common/autoboot.c +@@ -261,13 +261,19 @@ int gpio_abort(void) + return 0; + } + ++/* Allow for board specific config when we check abort condition */ ++__weak void board_pre_abort_autoboot(void) ++{ ++ /* please define board specific board_pre_abort_autoboot() */ ++} ++ + static int abortboot(int bootdelay) + { + int abort = 0; + + abort = gpio_abort(); + if (abort) +- return abort; ++ goto exit; + + if (bootdelay >= 0) + abort = __abortboot(bootdelay); +@@ -277,6 +283,10 @@ static int abortboot(int bootdelay) + gd->flags &= ~GD_FLG_SILENT; + #endif + ++exit: ++ if (abort) ++ board_pre_abort_autoboot(); ++ + return abort; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0018-Add-a-workaround-to-cover-VGA-memory-size-bug-in-A0.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0018-Add-a-workaround-to-cover-VGA-memory-size-bug-in-A0.patch new file mode 100644 index 000000000..250ca7f5c --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0018-Add-a-workaround-to-cover-VGA-memory-size-bug-in-A0.patch @@ -0,0 +1,52 @@ +From d7cdcbd4222ef3ad6d532c1034f4649432b0a69d Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Thu, 18 Jun 2020 15:08:57 -0700 +Subject: [PATCH] Add a workaround to cover VGA memory size bug in A0 + +AST2600 A0 has a silicon bug which requires setting of VGA memory +size limit. This commit add VGA memory size setting of 8MB for A0 +and 16MB for A1. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index aaacb61a1f8b..7e6787e5c6db 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -213,6 +213,12 @@ do_primary_core_setup: + + bne 0f + ++ /* limit VGA memory size to 8MB (A0 bug) */ ++ ldr r0, =AST_SCU_HW_STRAP1_CLR ++ movw r1, #0x6000 ++ movt r1, #0x0000 ++ str r1, [r0] ++ + /* tune up CPU clocks (A0 only) */ + ldr r0, =AST_SCU_HW_STRAP1 + ldr r1, [r0] +@@ -251,6 +257,17 @@ wait_lock: + bne 2f + + 1: ++ /* set VGA memory size to 16MB (A1 only) */ ++ ldr r0, =AST_SCU_HW_STRAP1_CLR ++ movw r1, #0x4000 ++ movt r1, #0x0000 ++ str r1, [r0] ++ ++ ldr r0, =AST_SCU_HW_STRAP1 ++ ldr r1, [r0] ++ orr r1, #0x2000 ++ str r1, [r0] ++ + /* disable DMA arbitration on MAC1 (A1 bug) */ + ldr r0, =AST_MAC1_CTRL2 + ldr r1, [r0] +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch new file mode 100644 index 000000000..547264260 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch @@ -0,0 +1,105 @@ +From f7671739c0d48994c3b6b90d08a75f0ba9e9a2ca Mon Sep 17 00:00:00 2001 +From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com> +Date: Thu, 18 Jun 2020 05:32:48 +0530 +Subject: [PATCH] Apply WDT1-2 reset mask to reset needed controller + +Issue: +BMC reset during BIOS serial port access causes BIOS hang. + +Root caused: +BMC resetting the LPC controller during BMC warm reset. +Which cause BIOS hang as BIOS cannot dump the BIOS serial data. + +Fix: +WDT reset mask has been updated from default to proper value, +such that controllers interacting with host will not be reset +during wdt reset operation. +This was missed earlier, causing BIOS to hang whenever BMC resets, +as BIOS was accessing the serial port (LPC controller). +De-coupling LPC controller will make sure BIOS serial port access +is not disturbed. +And also Reset mask is updated not to reset the following +additionally on the default mask setting. +eSPI controller reset causes system console lost connection, when +BMC reset. + +1. LPC controller +2. PWM controller +3. eSPI controller + +Quick Step to reproduce: + Stop the BMC in uboot and add below bootcmd command + setenv bootcmd "reset" + Do the System power ON or System warm reset. + + For WDT2: + boot the BMC and ran the /usr/bin/watch_dog_reset.sh + Do the System Power ON or System warm reset. + +Tested: + 1. Ran overnight continous BIOS and BMC warm reset on two SUTs. + + 2.Ran the TestApp which dump the BIOS serial port continously and + do the BMC reset. + + 3.Stop the BMC in uboot and add below bootcmd command + setenv bootcmd "reset" + Do the System Power ON or System warm reset. + + 4.Ran Over night AC cycle test. Completed +1000 in two systems. + + 5.Stopped at u-boot. + Issue protect off all command + Issue erase all command. + BMC should not hang and able to complete the "erase all" command + +Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index 7e6787e5c6db..937ea0d7b9a0 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -64,6 +64,14 @@ + #define AST_MAC2_BASE (0x1E680000) + #define AST_MAC2_CTRL2 (AST_MAC2_BASE + 0x058) + ++#define AST_WDT1_BASE 0x1E785000 ++#define AST_WDT1_RESET_MASK1 (AST_WDT1_BASE + 0x01C) ++#define AST_WDT1_RESET_MASK2 (AST_WDT1_BASE + 0x020) ++ ++#define AST_WDT2_BASE 0x1E785040 ++#define AST_WDT2_RESET_MASK1 (AST_WDT2_BASE + 0x01C) ++#define AST_WDT2_RESET_MASK2 (AST_WDT2_BASE + 0x020) ++ + #define AST_GPIO_BASE (0x1E780000) + #define AST_GPIOYZ_DATA_VALUE (AST_GPIO_BASE + 0x1E0) + +@@ -293,6 +301,20 @@ wait_lock: + str r1, [r0] + + 2: ++ /* disable eSPI, LPC and PWM resets on WDT1 reset */ ++ ldr r0, =AST_WDT1_RESET_MASK2 ++ ldr r1, [r0] ++ ldr r2, =0x04002800 ++ bic r1, r2 ++ str r1, [r0] ++ ++ /* disable eSPI, LPC and PWM resets on WDT2 reset */ ++ ldr r0, =AST_WDT2_RESET_MASK2 ++ ldr r1, [r0] ++ ldr r2, =0x04002800 ++ bic r1, r2 ++ str r1, [r0] ++ + /* PCIeRC/E2M8 power-on reset comes from SCU040 + But SCU04018 default value is 0x0. + It should be 0x1 to reset PCIeRC/E2M8.*/ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch new file mode 100644 index 000000000..9b87b5c57 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch @@ -0,0 +1,114 @@ +From 1c879ae1f822f59d74cec9dd7ed10790279ad65b Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Wed, 31 Jul 2019 16:01:49 -0700 +Subject: [PATCH] Reboot into UBOOT on Watchdog Failures + +We use watchdog1 to reboot when there is a watchdog +error. Reboot into u-boot as we are using that as +safe mode. + +Tested: watchdog -T 0 -F /dev/watchdog1 reboots into +uboot after 3 times + +Signed-off-by: James Feist <james.feist@linux.intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 61 ++++++++++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 7664ac0ddfc6..24ae48fc62e7 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -9,6 +9,55 @@ + #include <malloc.h> + + #define SYS_PWR_RESET_FLAG BIT(0) /* from scu_info.c */ ++#define WATCHDOG_RESET_BIT BIT(20) ++#define BOOT_FAILURE_LIMIT 3 ++ ++static int get_boot_failures(void) ++{ ++ return env_get_ulong("bootfailures", 10, 0); ++} ++ ++static void set_boot_failures(u32 count) ++{ ++ if (count > BOOT_FAILURE_LIMIT) ++ return; ++ ++ env_set_ulong("bootfailures", count); ++ env_save(); ++} ++ ++int intel_failed_boot(void) ++{ ++ struct udevice *dev; ++ int ret; ++ ++ ret = get_boot_failures() >= BOOT_FAILURE_LIMIT; ++ if (ret) { ++ /* ++ * Failure Recovery state: ++ * ChassisID - Solid Blue, StatusLED - Blinking Amber at 3Hz ++ */ ++ ret = led_get_by_label("green", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_OFF); ++ ++#ifdef CONFIG_LED_BLINK ++ ret = led_get_by_label("amber", &dev); ++ if (!ret) { ++ led_set_period(dev, 160); ++ led_set_state(dev, LEDST_BLINK); ++ } ++#endif ++ ++ ret = led_get_by_label("id", &dev); ++ if (!ret) ++ led_set_state(dev, LEDST_ON); ++ ++ return 1; ++ } ++ ++ return 0; ++} + + /* use GPIOC0 on intel boards */ + #define FFUJ_GPIO "gpio@1e78000016" +@@ -56,6 +105,10 @@ int read_ffuj(void) + int gpio_abort(void) + { + int value; ++ ++ if (intel_failed_boot()) ++ return 1; ++ + /* check ffuj to abort the autoboot */ + value = read_ffuj(); + printf("FFUJ: %d\n", value); +@@ -473,6 +526,7 @@ int board_late_init(void) + #define REV_ID_AST2600A0 0x05000303 /* AST2600 A0 */ + #define ONE_MSEC_IN_USEC 1000 + char value[11]; ++ u32 boot_failures; + + if (readl(SCU_BASE | SCU_014) == REV_ID_AST2600A0) + timer_enable(0, ONE_MSEC_IN_USEC, timer_callback, (void *)0); +@@ -488,6 +542,13 @@ int board_late_init(void) + snprintf(value, sizeof(value), "0x%x", gd->reset_reason); + update_bootargs_cmd("resetreason", value); + ++ boot_failures = get_boot_failures(); ++ ++ if (gd->reset_reason & WATCHDOG_RESET_BIT) ++ set_boot_failures(boot_failures + 1); ++ else ++ set_boot_failures(0); ++ + /* Update the special mode in bootargs */ + if (gd->reset_reason & SYS_PWR_RESET_FLAG && is_mfg_mode_phy_req()) + update_bootargs_cmd("special", "mfg"); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0023-Add-WDT-to-u-boot-to-cover-booting-failures.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0023-Add-WDT-to-u-boot-to-cover-booting-failures.patch new file mode 100644 index 000000000..e143692a0 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0023-Add-WDT-to-u-boot-to-cover-booting-failures.patch @@ -0,0 +1,317 @@ +From d1acf70afd376b45a73b325ee30c0532a142c4f2 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 16 Sep 2020 13:25:36 -0700 +Subject: [PATCH] Add WDT to u-boot to cover booting failures + +This commit enables WDT1 in early u-boot and before loading kernel +image to make BMC reset to cover booting failures. If BMC meets any +failure or if kernel can't initiate watchdog timer properly, BMC will +be reset by this watchdog. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 15 +++++ + board/aspeed/ast2600_intel/intel.c | 50 ++++++++++++++-- + common/board_f.c | 1 + + common/image.c | 3 +- + drivers/mtd/spi/spi-nor-core.c | 5 ++ + drivers/watchdog/ast_wdt.c | 78 ++++++++++++++----------- + include/configs/aspeed-common.h | 2 + + 7 files changed, 116 insertions(+), 38 deletions(-) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index 937ea0d7b9a0..c65adff0d69a 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -65,6 +65,9 @@ + #define AST_MAC2_CTRL2 (AST_MAC2_BASE + 0x058) + + #define AST_WDT1_BASE 0x1E785000 ++#define AST_WDT1_RELOAD_VAL (AST_WDT1_BASE + 0x004) ++#define AST_WDT1_RESTART_CTRL (AST_WDT1_BASE + 0x008) ++#define AST_WDT1_CTRL (AST_WDT1_BASE + 0x00C) + #define AST_WDT1_RESET_MASK1 (AST_WDT1_BASE + 0x01C) + #define AST_WDT1_RESET_MASK2 (AST_WDT1_BASE + 0x020) + +@@ -348,6 +351,18 @@ wait_lock: + ldr r1, =AST_SCU_CA7_PARITY_CHK + str r0, [r1] + ++#ifdef CONFIG_HW_WATCHDOG ++ /* Enable WDT1 to recover u-boot hang */ ++ ldr r0, =AST_WDT1_RELOAD_VAL ++ ldr r1, =0x00500000 @ ~5 seconds ++ str r1, [r0] ++ ldr r0, =AST_WDT1_RESTART_CTRL ++ ldr r1, =0x00004755 ++ str r1, [r0] ++ ldr r0, =AST_WDT1_CTRL ++ ldr r1, =0x00000013 ++ str r1, [r0] ++#endif + #if 0 + ldr r1, =AST_FMC_WDT2_CTRL_MODE + str r0, [r1] +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 03eff62ce04b..88d9384faf2d 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -7,6 +7,7 @@ + #include <asm/io.h> + #include <led.h> + #include <malloc.h> ++#include <wdt.h> + + #define SYS_PWR_RESET_FLAG BIT(0) /* from scu_info.c */ + #define WATCHDOG_RESET_BIT BIT(20) +@@ -584,13 +585,54 @@ void board_preboot_os(void) + led_set_state(dev, LEDST_ON); + } + +-#ifdef CONFIG_WATCHDOG +-/* watchdog stuff */ +-void watchdog_init(void) ++#ifdef CONFIG_HW_WATCHDOG ++#define WDT_TIMEOUT_DEFAULT 0x6000000 /* ~100 seconds */ ++ ++void hw_watchdog_init(void) ++{ ++ struct udevice *dev; ++ int ret; ++ ++ ret = uclass_first_device(UCLASS_WDT, &dev); ++ if (ret) { ++ debug("Can't find a WDT: %d\n", ret); ++ return; ++ } ++ ++ ret = wdt_start(dev, WDT_TIMEOUT_DEFAULT, 0); ++ if (ret) ++ debug("WDT start failed: %d\n", ret); ++} ++ ++void hw_watchdog_reset(void) + { ++ struct udevice *dev; ++ int ret; ++ ++ ret = uclass_first_device(UCLASS_WDT, &dev); ++ if (ret) { ++ debug("Can't find a WDT: %d\n", ret); ++ return; ++ } ++ ++ ret = wdt_reset(dev); ++ if (ret) ++ debug("WDT reset failed: %d\n", ret); + } + +-void watchdog_reset(void) ++void hw_watchdog_disable(void) + { ++ struct udevice *dev; ++ int ret; ++ ++ ret = uclass_first_device(UCLASS_WDT, &dev); ++ if (ret) { ++ debug("Can't find a WDT: %d\n", ret); ++ return; ++ } ++ ++ ret = wdt_stop(dev); ++ if (ret) ++ debug("WDT stop failed: %d\n", ret); + } + #endif +diff --git a/common/board_f.c b/common/board_f.c +index 149a7229e8fa..fe3e8e59d93e 100644 +--- a/common/board_f.c ++++ b/common/board_f.c +@@ -94,6 +94,7 @@ static int init_func_watchdog_init(void) + { + # if defined(CONFIG_HW_WATCHDOG) && \ + (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ ++ defined(CONFIG_ASPEED_AST2600) || \ + defined(CONFIG_SH) || \ + defined(CONFIG_DESIGNWARE_WATCHDOG) || \ + defined(CONFIG_IMX_WATCHDOG)) +diff --git a/common/image.c b/common/image.c +index 4d4248f234fb..90687092e1ae 100644 +--- a/common/image.c ++++ b/common/image.c +@@ -528,7 +528,8 @@ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) + if (to == from) + return; + +-#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) ++#if !defined(CONFIG_ASPEED_SPI_DMA) && \ ++ (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) + if (to > from) { + from += len; + to += len; +diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c +index e1fe91712e24..13f499a90272 100644 +--- a/drivers/mtd/spi/spi-nor-core.c ++++ b/drivers/mtd/spi/spi-nor-core.c +@@ -20,6 +20,7 @@ + #include <linux/mtd/spi-nor.h> + #include <spi-mem.h> + #include <spi.h> ++#include <watchdog.h> + + #include "sf_internal.h" + +@@ -429,6 +430,10 @@ static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, + unsigned long timebase; + int ret; + ++#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) ++ WATCHDOG_RESET(); ++#endif ++ + timebase = get_timer(0); + + while (get_timer(timebase) < timeout) { +diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c +index c2dc3cf548d2..811ead41bb95 100644 +--- a/drivers/watchdog/ast_wdt.c ++++ b/drivers/watchdog/ast_wdt.c +@@ -19,10 +19,11 @@ + #define WDT_CTRL_RESET_MODE_SHIFT 5 + #define WDT_CTRL_RESET_MODE_MASK 3 + +-#define WDT_CTRL_EN (1 << 0) +-#define WDT_CTRL_RESET (1 << 1) +-#define WDT_CTRL_CLK1MHZ (1 << 4) +-#define WDT_CTRL_2ND_BOOT (1 << 7) ++#define WDT_CTRL_EN BIT(0) ++#define WDT_CTRL_RESET BIT(1) ++#define WDT_CTRL_CLK1MHZ BIT(4) /* AST2400/2500 */ ++#define WDT_CTRL_WDT_RST_BY_SOC_RST BIT(4) /* AST2600 */ ++#define WDT_CTRL_2ND_BOOT BIT(7) + + /* Values for Reset Mode */ + #define WDT_CTRL_RESET_SOC 0 +@@ -31,32 +32,32 @@ + #define WDT_CTRL_RESET_MASK 3 + + /* Reset Mask register */ +-#define WDT_RESET_ARM (1 << 0) +-#define WDT_RESET_COPROC (1 << 1) +-#define WDT_RESET_SDRAM (1 << 2) +-#define WDT_RESET_AHB (1 << 3) +-#define WDT_RESET_I2C (1 << 4) +-#define WDT_RESET_MAC1 (1 << 5) +-#define WDT_RESET_MAC2 (1 << 6) +-#define WDT_RESET_GCRT (1 << 7) +-#define WDT_RESET_USB20 (1 << 8) +-#define WDT_RESET_USB11_HOST (1 << 9) +-#define WDT_RESET_USB11_EHCI2 (1 << 10) +-#define WDT_RESET_VIDEO (1 << 11) +-#define WDT_RESET_HAC (1 << 12) +-#define WDT_RESET_LPC (1 << 13) +-#define WDT_RESET_SDSDIO (1 << 14) +-#define WDT_RESET_MIC (1 << 15) +-#define WDT_RESET_CRT2C (1 << 16) +-#define WDT_RESET_PWM (1 << 17) +-#define WDT_RESET_PECI (1 << 18) +-#define WDT_RESET_JTAG (1 << 19) +-#define WDT_RESET_ADC (1 << 20) +-#define WDT_RESET_GPIO (1 << 21) +-#define WDT_RESET_MCTP (1 << 22) +-#define WDT_RESET_XDMA (1 << 23) +-#define WDT_RESET_SPI (1 << 24) +-#define WDT_RESET_MISC (1 << 25) ++#define WDT_RESET_ARM BIT(0) ++#define WDT_RESET_COPROC BIT(1) ++#define WDT_RESET_SDRAM BIT(2) ++#define WDT_RESET_AHB BIT(3) ++#define WDT_RESET_I2C BIT(4) ++#define WDT_RESET_MAC1 BIT(5) ++#define WDT_RESET_MAC2 BIT(6) ++#define WDT_RESET_GCRT BIT(7) ++#define WDT_RESET_USB20 BIT(8) ++#define WDT_RESET_USB11_HOST BIT(9) ++#define WDT_RESET_USB11_EHCI2 BIT(10) ++#define WDT_RESET_VIDEO BIT(11) ++#define WDT_RESET_HAC BIT(12) ++#define WDT_RESET_LPC BIT(13) ++#define WDT_RESET_SDSDIO BIT(14) ++#define WDT_RESET_MIC BIT(15) ++#define WDT_RESET_CRT2C BIT(16) ++#define WDT_RESET_PWM BIT(17) ++#define WDT_RESET_PECI BIT(18) ++#define WDT_RESET_JTAG BIT(19) ++#define WDT_RESET_ADC BIT(20) ++#define WDT_RESET_GPIO BIT(21) ++#define WDT_RESET_MCTP BIT(22) ++#define WDT_RESET_XDMA BIT(23) ++#define WDT_RESET_SPI BIT(24) ++#define WDT_RESET_MISC BIT(25) + + #define WDT_RESET_DEFAULT \ + (WDT_RESET_ARM | WDT_RESET_COPROC | WDT_RESET_I2C | \ +@@ -98,12 +99,18 @@ struct ast_wdt_priv { + static int ast_wdt_start(struct udevice *dev, u64 timeout, ulong flags) + { + struct ast_wdt_priv *priv = dev_get_priv(dev); ++ ulong driver_data = dev_get_driver_data(dev); + + writel((u32) timeout, &priv->regs->counter_reload_val); + + writel(WDT_COUNTER_RESTART_VAL, &priv->regs->counter_restart); + +- writel(WDT_CTRL_EN | WDT_CTRL_RESET, &priv->regs->ctrl); ++ if (driver_data == WDT_AST2600) { ++ writel(WDT_CTRL_EN | WDT_CTRL_RESET | ++ WDT_CTRL_WDT_RST_BY_SOC_RST, &priv->regs->ctrl); ++ } else { ++ writel(WDT_CTRL_EN | WDT_CTRL_RESET, &priv->regs->ctrl); ++ } + + return 0; + } +@@ -115,12 +122,15 @@ static int ast_wdt_stop(struct udevice *dev) + + clrbits_le32(&priv->regs->ctrl, WDT_CTRL_EN); + ++#if !defined(CONFIG_TARGET_AST2600_INTEL) + if(driver_data == WDT_AST2600) { + writel(0x030f1ff1, &priv->regs->reset_mask1); + writel(0x3fffff1, &priv->regs->reset_mask2); +- } else ++ } else { + writel(WDT_RESET_DEFAULT, &priv->regs->reset_mask1); +- ++ } ++#endif ++ + return 0; + } + +@@ -168,7 +178,9 @@ static const struct wdt_ops ast_wdt_ops = { + static int ast_wdt_probe(struct udevice *dev) + { + debug("%s() wdt%u\n", __func__, dev->seq); ++#if !defined(CONFIG_TARGET_AST2600_INTEL) + ast_wdt_stop(dev); ++#endif + + return 0; + } +diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h +index 183a7a502e9c..d5befb185b6a 100644 +--- a/include/configs/aspeed-common.h ++++ b/include/configs/aspeed-common.h +@@ -20,6 +20,8 @@ + + #define CONFIG_STANDALONE_LOAD_ADDR 0x83000000 + ++#define CONFIG_HW_WATCHDOG ++ + /* Misc CPU related */ + #define CONFIG_CMDLINE_TAG + #define CONFIG_SETUP_MEMORY_TAGS +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0024-fix-SUS_WARN-handling-logic.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0024-fix-SUS_WARN-handling-logic.patch new file mode 100644 index 000000000..e8562a184 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0024-fix-SUS_WARN-handling-logic.patch @@ -0,0 +1,128 @@ +From e9a8a79453e23c86e7b086b1e752876c99bcf0b3 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +Date: Tue, 20 Oct 2020 15:49:26 -0700 +Subject: [PATCH] fix SUS_WARN handling logic + +This commit fixes SUS_WARN handling as dual-edge detection mode +to support deepsx entry event properly. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + board/aspeed/ast2600_intel/ast-espi.c | 62 ++++++++++++++------------- + 1 file changed, 32 insertions(+), 30 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/ast-espi.c b/board/aspeed/ast2600_intel/ast-espi.c +index a8b389f159ef..51fcc836cc6a 100644 +--- a/board/aspeed/ast2600_intel/ast-espi.c ++++ b/board/aspeed/ast2600_intel/ast-espi.c +@@ -148,9 +148,9 @@ static void espi_irq_handler(void *cookie) + { + uint32_t irq_status = readl(AST_ESPI_BASE + ESPI008); + +- DBG_ESPI("espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x,\ +- ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x,\ +- ESPI12c=0X%x, irq_status=0x%x\n", ++ DBG_ESPI("espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x, " ++ "ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x, " ++ "ESPI12c=0X%x, irq_status=0x%x\n", + readl(AST_ESPI_BASE + ESPI008), + readl(AST_ESPI_BASE + ESPI00C), + readl(AST_ESPI_BASE + ESPI100), +@@ -165,21 +165,23 @@ static void espi_irq_handler(void *cookie) + DBG_ESPI("sys_status : 0x%08X\n", sys_status); + if (sys_status & AST_ESPI_HOST_RST_WARN) { + DBG_ESPI("HOST_RST_WARN evt: 0x%08X\n", sys_event); +- if (sys_event & AST_ESPI_HOST_RST_WARN) { +- uint32_t v = readl(AST_ESPI_BASE + ESPI098) | +- AST_ESPI_HOST_RST_ACK; +- writel(v, AST_ESPI_BASE + ESPI098); +- DBG_ESPI("HOST_RST_WARN sent ack\n"); +- } ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098); ++ if (sys_event & AST_ESPI_HOST_RST_WARN) ++ v |= AST_ESPI_HOST_RST_ACK; ++ else ++ v &= ~AST_ESPI_HOST_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ DBG_ESPI("HOST_RST_WARN sent ack\n"); + } + if (sys_status & AST_ESPI_OOB_RST_WARN) { + DBG_ESPI("OOB_RST_WARN evt: 0x%08X\n", sys_event); +- if (sys_event & AST_ESPI_OOB_RST_WARN) { +- uint32_t v = readl(AST_ESPI_BASE + ESPI098) | +- AST_ESPI_OOB_RST_ACK; +- writel(v, AST_ESPI_BASE + ESPI098); +- DBG_ESPI("OOB_RST_WARN sent ack\n"); +- } ++ uint32_t v = readl(AST_ESPI_BASE + ESPI098); ++ if (sys_event & AST_ESPI_OOB_RST_WARN) ++ v |= AST_ESPI_OOB_RST_ACK; ++ else ++ v &= ~AST_ESPI_OOB_RST_ACK; ++ writel(v, AST_ESPI_BASE + ESPI098); ++ DBG_ESPI("OOB_RST_WARN sent ack\n"); + } + if (sys_status & AST_ESPI_PLTRSTN) { + DBG_ESPI("PLTRSTN: %c, evt: 0x%08X\n", +@@ -196,12 +198,13 @@ static void espi_irq_handler(void *cookie) + DBG_ESPI("sys1_status : 0x%08X\n", sys1_status); + if (sys1_status & AST_ESPI_SUS_WARN) { + DBG_ESPI("SUS WARN evt: 0x%08X\n", sys1_event); +- if (sys1_event & AST_ESPI_SUS_WARN) { +- uint32_t v = readl(AST_ESPI_BASE + ESPI104) | +- AST_ESPI_SUS_ACK; +- writel(v, AST_ESPI_BASE + ESPI104); +- DBG_ESPI("SUS_WARN sent ack\n"); +- } ++ uint32_t v = readl(AST_ESPI_BASE + ESPI104); ++ if (sys1_event & AST_ESPI_SUS_WARN) ++ v |= AST_ESPI_SUS_ACK; ++ else ++ v &= ~AST_ESPI_SUS_ACK; ++ writel(v, AST_ESPI_BASE + ESPI104); ++ DBG_ESPI("SUS_WARN sent ack\n"); + } + writel(sys1_status, AST_ESPI_BASE + ESPI12C); /* clear status */ + } +@@ -219,9 +222,9 @@ static void espi_irq_handler(void *cookie) + + writel(irq_status, AST_ESPI_BASE + ESPI008); /* clear irq_status */ + +- DBG_ESPI("end espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x,\ +- ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x,\ +- ESPI12c=0X%x, irq_status=0X%x\n", ++ DBG_ESPI("end espi_irq_handler, ESPI008=0X%x, ESPI00c=0X%x, " ++ "ESPI100=0X%x, ESPI11c=0X%x, ESPI094=0X%x, " ++ "ESPI12c=0X%x, irq_status=0X%x\n", + readl(AST_ESPI_BASE + ESPI008), + readl(AST_ESPI_BASE + ESPI00C), + readl(AST_ESPI_BASE + ESPI100), +@@ -232,6 +235,7 @@ static void espi_irq_handler(void *cookie) + + static void espi_configure_irq(void) + { ++ /* Dual-edge setting for HOST_RST_WARN and OOB_RST_WARN */ + writel(0, AST_ESPI_BASE + ESPI110); + writel(0, AST_ESPI_BASE + ESPI114); + writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | +@@ -239,13 +243,11 @@ static void espi_configure_irq(void) + writel(AST_ESPI_HOST_RST_WARN | AST_ESPI_OOB_RST_WARN | + AST_ESPI_PLTRSTN, AST_ESPI_BASE + ESPI094); + +- writel(AST_ESPI_SUS_WARN, +- AST_ESPI_BASE + ESPI120); /* int type 0 susp warn */ ++ /* Dual-edge setting for SUS_WARN */ ++ writel(0, AST_ESPI_BASE + ESPI120); + writel(0, AST_ESPI_BASE + ESPI124); +- writel(0, AST_ESPI_BASE + ESPI128); +- writel(AST_ESPI_SUS_WARN, +- AST_ESPI_BASE + +- ESPI100); /* Enable sysev1 ints for susp warn */ ++ writel(AST_ESPI_SUS_WARN, AST_ESPI_BASE + ESPI128); ++ writel(AST_ESPI_SUS_WARN, AST_ESPI_BASE + ESPI100); + + writel(AST_ESPI_IEN_HW_RST | AST_ESPI_IEN_SYS1_EV | + AST_ESPI_IEN_SYS_EV, AST_ESPI_BASE + ESPI00C); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch new file mode 100644 index 000000000..e72679836 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch @@ -0,0 +1,50 @@ +From fc01155d6f78ab9940f1d1482b0df44addc5f313 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Mon, 22 Feb 2021 17:22:16 +0530 +Subject: [PATCH] ast2600-PFR-platform-EXTRST-reset-mask-selection + +This commit will enable specific reset mask for EXTRST# signal. +On PFR platforms, EXTRST# signal is used by PFR CPLD to put BMC +in reset during firmware authentications, recovery and firmware +update flow, during which certain modules of BMC should be chosen +to be reset so that Host functionality would be intact. + +Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index c65adff0d69a..3db7d993d3ca 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -39,6 +39,8 @@ + #define AST_SCU_REV_ID (AST_SCU_BASE + 0x014) + #define AST_SCU_SYSRST_CTRL (AST_SCU_BASE + 0x040) + #define AST_SCU_SYSRST_CTRL_CLR (AST_SCU_BASE + 0x044) ++#define AST_SCU_EXTRST_SEL1 (AST_SCU_BASE + 0x060) ++#define AST_SCU_EXTRST_SEL2 (AST_SCU_BASE + 0x070) + #define AST_SCU_DEBUG_CTRL (AST_SCU_BASE + 0x0C8) + #define AST_SCU_DEBUG_CTRL2 (AST_SCU_BASE + 0x0D8) + #define AST_SCU_HPLL_PARAM (AST_SCU_BASE + 0x200) +@@ -304,6 +306,16 @@ wait_lock: + str r1, [r0] + + 2: ++ /* SCU060:EXTRST1# reset mask selection */ ++ ldr r0, =AST_SCU_EXTRST_SEL1 ++ ldr r1, =0x6CF1FF1 ++ str r1, [r0] ++ ++ /* SCU070:EXTRST2# reset mask selection */ ++ ldr r0, =AST_SCU_EXTRST_SEL2 ++ ldr r1, =0x3FFFFF3 ++ str r1, [r0] ++ + /* disable eSPI, LPC and PWM resets on WDT1 reset */ + ldr r0, =AST_WDT1_RESET_MASK2 + ldr r1, [r0] +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0026-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0026-Enable-PCIe-L1-support.patch new file mode 100644 index 000000000..ee1a8f7a4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0026-Enable-PCIe-L1-support.patch @@ -0,0 +1,40 @@ +From cd13ae4e64d57af84dc98ff6c8d5b31661bc450d Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Tue, 8 Jan 2019 13:33:15 -0800 +Subject: [PATCH] Enable PCIe L1 support + +This commit enables PCIe L1 support using magic registers. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index 3db7d993d3ca..e2fcb732b6a6 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -349,6 +349,20 @@ wait_lock: + movt r1, #0x0000 + str r1, [r0] + ++ /* enable PCIe L1 support */ ++ ldr r0, =0x1e6ed07c ++ ldr r1, =0xa8 ++ str r1, [r0] ++ ldr r0, =0x1e6ed010 ++ ldr r1, =0x27040fe1 ++ str r1, [r0] ++ ldr r0, =0x1e6ed068 ++ ldr r1, =0xc81f0a ++ str r1, [r0] ++ ldr r0, =0x1e6ed07c ++ mov r1, #0 ++ str r1, [r0] ++ + /* MMIO decode setting */ + ldr r0, =AST_SCU_MMIO_DEC_SET + mov r1, #0x2000 +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0027-ast2600-Add-Mailbox-init-function.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0027-ast2600-Add-Mailbox-init-function.patch new file mode 100644 index 000000000..8e3a17107 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0027-ast2600-Add-Mailbox-init-function.patch @@ -0,0 +1,127 @@ +From b41a5d9eb94bcaf40bc960d82f13cf41cb83c34e Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Thu, 25 Feb 2021 14:45:12 +0800 +Subject: [PATCH] ast2600: Add Mailbox init function. + +Add Mailbox init function to make sure mailbox regs are reset +to expected values at reset. + +At power-on reset, 0x0c=0, 0x0d=2, 0x0e=5e, 0x0f=31 +as per the handshake definition with BIOS. + +At all other resets, 0x0c is preserved, 0x0d, 0x0e, 0x0f +are reset the same as power-on reset. + +Because the reset behavior depends on a flag set in the _f phase of +booting, the mailbox_init function must be called from the _r phase. + +AST2600 A0 has 16 mailboxes. +AST2600 A1 has 32 mailboxes. + +Tested: +BMC could boot correctly and all the mailboxes clear +ast# md 0x1e789200 +1e789200: 00000000 00000000 00000000 00000000 ................ +1e789210: 00000000 00000000 00000000 00000000 ................ +1e789220: 00000000 00000002 0000005e 00000031 .........^..1... +1e789230: 00000000 00000000 00000000 00000000 ................ +1e789240: 00000000 00000000 00000000 00000000 ................ + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 56 ++++++++++++++++++++++++++++-- + 1 file changed, 54 insertions(+), 2 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 17f9d6c8fbf6..c8b3cef70dd7 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -13,6 +13,9 @@ + #define WATCHDOG_RESET_BIT BIT(20) + #define BOOT_FAILURE_LIMIT 3 + ++#define SCU_014 0x014 /* Silicon Revision ID */ ++#define REV_ID_AST2600A0 0x05000303 /* AST2600 A0 */ ++ + static int get_boot_failures(void) + { + return env_get_ulong("bootfailures", 10, 0); +@@ -374,6 +377,55 @@ static void timer_callback(void *cookie) + } + } + ++#define AST_MBX_BASE 0x1e789200 ++#define AST_MBX_COUNT_A0 16 ++#define AST_MBX_COUNT 32 ++#define MAILBOX_INIT_D 0x02 ++#define MAILBOX_INIT_E 0x5e ++#define MAILBOX_INIT_F 0x31 ++static void mailbox_init(void) ++{ ++ int i, mbx_count; ++ ++ if (readl(SCU_BASE + SCU_014) == REV_ID_AST2600A0) ++ mbx_count = AST_MBX_COUNT_A0; ++ else ++ mbx_count = AST_MBX_COUNT; ++ ++ if (gd->reset_reason & SYS_PWR_RESET_FLAG) ++ { ++ /* on AC-reset, clear all except special values to d/e/f */ ++ for (i = 0; i < mbx_count; i++) ++ { ++ long v; ++ if (i == 0x0d) ++ v = MAILBOX_INIT_D; ++ else if (i == 0x0e) ++ v = MAILBOX_INIT_E; ++ else if (i == 0x0f) ++ v = MAILBOX_INIT_F; ++ else ++ v = 0; ++ writel(v, AST_MBX_BASE + 4 * i); ++ } ++ } ++ else ++ { ++ /* on other resets, clear all except c/d/e/f */ ++ for (i = 0; i < mbx_count; i++) ++ { ++ long v; ++ if (i == 0x0d) ++ v = MAILBOX_INIT_D; ++ else if (i == 0x0c || i == 0x0e || i == 0x0f) ++ continue; ++ else ++ v = 0; ++ writel(v, AST_MBX_BASE + 4 * i); ++ } ++ } ++} ++ + int board_early_init_f(void) + { + /* This is called before relocation; beware! */ +@@ -396,6 +448,8 @@ int board_early_init_r(void) + + debug("board_early_init_r\n"); + ++ mailbox_init(); ++ + enable_onboard_tpm(); + + led_default_state(); +@@ -510,8 +564,6 @@ extern void timer_enable(int n, u32 interval_us, interrupt_handler_t *handler, + void *cookie); + int board_late_init(void) + { +-#define SCU_014 0x014 /* Silicon Revision ID */ +-#define REV_ID_AST2600A0 0x05000303 /* AST2600 A0 */ + #define ONE_MSEC_IN_USEC 1000 + char value[11]; + u32 boot_failures; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0028-Improve-randomness-of-mac-address-generation.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0028-Improve-randomness-of-mac-address-generation.patch new file mode 100644 index 000000000..337e9995b --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0028-Improve-randomness-of-mac-address-generation.patch @@ -0,0 +1,53 @@ +From da155e990fe763d3a03bdac76054e1d5530b8c16 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 10 Mar 2021 20:15:10 -0800 +Subject: [PATCH] Improve randomness of mac address generation + +This commit improves randomness of mac address generation using +AST2600's hardware random number generator. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + lib/rand.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/lib/rand.c b/lib/rand.c +index af4cf3a0e8cf..0a12b0b82276 100644 +--- a/lib/rand.c ++++ b/lib/rand.c +@@ -8,16 +8,32 @@ + */ + + #include <common.h> ++#include <asm/io.h> + + static unsigned int y = 1U; + + unsigned int rand_r(unsigned int *seedp) + { ++#ifdef CONFIG_ASPEED_AST2600 ++#define SCU_524 0x1e6e2524 ++ int i; ++ ++ /* ++ * Use hardware random number generator. It generates a new number on ++ * each 1us or on each 32 read command cycle so this code makes ++ * intentional dummy 32 reads. ++ */ ++ for (i = 0; i < 32; i++) ++ *seedp ^= readl(SCU_524); ++ ++ return readl(SCU_524); ++#else + *seedp ^= (*seedp << 13); + *seedp ^= (*seedp >> 17); + *seedp ^= (*seedp << 5); + + return *seedp; ++#endif + } + + unsigned int rand(void) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0029-Set-UART-routing-in-lowlevel_init.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0029-Set-UART-routing-in-lowlevel_init.patch new file mode 100644 index 000000000..72be1a0b4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0029-Set-UART-routing-in-lowlevel_init.patch @@ -0,0 +1,43 @@ +From 44321f61f0b0edbde3300cc43b2f3e9f9fd93d44 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 26 Apr 2021 13:20:21 -0700 +Subject: [PATCH] Set UART routing in lowlevel_init + +This commit sets the UART routing back to default in lowlevel_init +to prevent any data dropping from the physical host serial until +SOL service is activated. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index e2fcb732b6a6..4cc22e31c604 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -80,6 +80,9 @@ + #define AST_GPIO_BASE (0x1E780000) + #define AST_GPIOYZ_DATA_VALUE (AST_GPIO_BASE + 0x1E0) + ++#define AST_LPC_BASE 0x1E789000 ++#define AST_LPC_HICRA (AST_LPC_BASE + 0x09C) ++ + /* Revision ID */ + #define REV_ID_AST2600A0 0x05000303 + #define REV_ID_AST2600A1 0x05010303 +@@ -433,6 +436,11 @@ skip_fill_wip_bit: + moveq r1, #0xff + str r1, [r0] + ++ /* set UART routing back to default */ ++ ldr r0, =AST_LPC_HICRA ++ ldr r1, =0x0 ++ str r1, [r0] ++ + /* relocate mailbox insn. for cpuN polling SMP go signal */ + adrl r0, mailbox_insn + adrl r1, mailbox_insn_end +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0030-Add-Aspeed-PWM-uclass-driver.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0030-Add-Aspeed-PWM-uclass-driver.patch new file mode 100644 index 000000000..176f9fa04 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0030-Add-Aspeed-PWM-uclass-driver.patch @@ -0,0 +1,576 @@ +From a772d7bdde659d689fda47accc0f50bb6ce047d1 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 17 May 2021 13:11:24 -0700 +Subject: [PATCH] Add Aspeed PWM uclass driver + +This commit adds Aspeed PWM uclass driver to set default FAN speed +in u-boot. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/dts/ast2600-intel.dts | 11 ++ + arch/arm/dts/ast2600.dtsi | 88 ++++++++++++ + board/aspeed/ast2600_intel/intel.c | 49 +++++++ + drivers/pinctrl/aspeed/pinctrl_ast2600.c | 130 ++++++++++++++++- + drivers/pwm/Kconfig | 8 ++ + drivers/pwm/Makefile | 1 + + drivers/pwm/aspeed_pwm.c | 172 +++++++++++++++++++++++ + 7 files changed, 458 insertions(+), 1 deletion(-) + create mode 100644 drivers/pwm/aspeed_pwm.c + +diff --git a/arch/arm/dts/ast2600-intel.dts b/arch/arm/dts/ast2600-intel.dts +index 7cae636554b6..a76193716d34 100644 +--- a/arch/arm/dts/ast2600-intel.dts ++++ b/arch/arm/dts/ast2600-intel.dts +@@ -64,6 +64,17 @@ + }; + }; + ++&pwm { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default ++ &pinctrl_pwm2_default &pinctrl_pwm3_default ++ &pinctrl_pwm4_default &pinctrl_pwm5_default ++ &pinctrl_pwm12g1_default &pinctrl_pwm13g1_default ++ &pinctrl_pwm14g1_default &pinctrl_pwm15g1_default>; ++}; ++ + &gpio0 { + status = "okay"; + }; +diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi +index 9c4282515d55..3ff5bf2e16e1 100644 +--- a/arch/arm/dts/ast2600.dtsi ++++ b/arch/arm/dts/ast2600.dtsi +@@ -265,6 +265,14 @@ + #size-cells = <1>; + ranges; + ++ pwm: pwm-controller@1e610000 { ++ compatible = "aspeed,ast2600-pwm"; ++ reg = <0x1e610000 0x100>; ++ clocks = <&scu ASPEED_CLK_AHB>; ++ resets = <&rst ASPEED_RESET_PWM>; ++ status = "disabled"; ++ }; ++ + syscon: syscon@1e6e2000 { + compatible = "aspeed,g6-scu", "syscon", "simple-mfd"; + reg = <0x1e6e2000 0x1000>; +@@ -1598,6 +1606,86 @@ + groups = "PWM7"; + }; + ++ pinctrl_pwm8g1_default: pwm8g1_default { ++ function = "PWM8G1"; ++ groups = "PWM8G1"; ++ }; ++ ++ pinctrl_pwm9g1_default: pwm9g1_default { ++ function = "PWM9G1"; ++ groups = "PWM9G1"; ++ }; ++ ++ pinctrl_pwm10g1_default: pwm10g1_default { ++ function = "PWM10G1"; ++ groups = "PWM10G1"; ++ }; ++ ++ pinctrl_pwm11g1_default: pwm11g1_default { ++ function = "PWM11G1"; ++ groups = "PWM11G1"; ++ }; ++ ++ pinctrl_pwm12g1_default: pwm12g1_default { ++ function = "PWM12G1"; ++ groups = "PWM12G1"; ++ }; ++ ++ pinctrl_pwm13g1_default: pwm13g1_default { ++ function = "PWM13G1"; ++ groups = "PWM13G1"; ++ }; ++ ++ pinctrl_pwm14g1_default: pwm14g1_default { ++ function = "PWM14G1"; ++ groups = "PWM14G1"; ++ }; ++ ++ pinctrl_pwm15g1_default: pwm15g1_default { ++ function = "PWM15G1"; ++ groups = "PWM15G1"; ++ }; ++ ++ pinctrl_pwm8g0_default: pwm8g0_default { ++ function = "PWM8G0"; ++ groups = "PWM8G0"; ++ }; ++ ++ pinctrl_pwm9g0_default: pwm9g0_default { ++ function = "PWM9G0"; ++ groups = "PWM9G0"; ++ }; ++ ++ pinctrl_pwm10g0_default: pwm10g0_default { ++ function = "PWM10G0"; ++ groups = "PWM10G0"; ++ }; ++ ++ pinctrl_pwm11g0_default: pwm11g0_default { ++ function = "PWM11G0"; ++ groups = "PWM11G0"; ++ }; ++ ++ pinctrl_pwm12g0_default: pwm12g0_default { ++ function = "PWM12G0"; ++ groups = "PWM12G0"; ++ }; ++ ++ pinctrl_pwm13g0_default: pwm13g0_default { ++ function = "PWM13G0"; ++ groups = "PWM13G0"; ++ }; ++ ++ pinctrl_pwm14g0_default: pwm14g0_default { ++ function = "PWM14G0"; ++ groups = "PWM14G0"; ++ }; ++ ++ pinctrl_pwm15g0_default: pwm15g0_default { ++ function = "PWM15G0"; ++ groups = "PWM15G0"; ++ }; ++ + pinctrl_rgmii1_default: rgmii1_default { + function = "RGMII1"; + groups = "RGMII1"; +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 82df0ac6137e..f1136eec9ab9 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -8,6 +8,7 @@ + #include <led.h> + #include <malloc.h> + #include <wdt.h> ++#include <pwm.h> + + #define SYS_PWR_RESET_FLAG BIT(0) /* from scu_info.c */ + #define WATCHDOG_RESET_BIT BIT(20) +@@ -426,6 +427,53 @@ static void mailbox_init(void) + } + } + ++struct pwm_setting { ++ uint channel; ++ uint duty_pct; ++}; ++ ++static void pwm_init(void) ++{ ++#define NSEC_PER_SEC 1000000000L ++#define PWM_TARGET_FREQ 25000 ++#define PWM_TICK_NS (NSEC_PER_SEC / PWM_TARGET_FREQ) ++#define PWM_TICK_1PCT_NS (PWM_TICK_NS / 100) ++ const struct pwm_setting settings[] = { ++ {0, 65}, ++ {1, 65}, ++ {2, 65}, ++ {3, 65}, ++ {4, 65}, ++ {5, 65}, ++ {12, 65}, ++ {13, 65}, ++ {14, 65}, ++ {15, 65}, ++ }; ++ struct udevice *dev; ++ int ret, setting_size, i; ++ ++ ret = uclass_first_device(UCLASS_PWM, &dev); ++ if (ret) { ++ debug("Can't find PWM controller: %d\n", ret); ++ return; ++ } ++ ++ setting_size = sizeof(settings) / sizeof(settings[0]); ++ ++ for (i = 0; i < setting_size; i++) { ++ ret = pwm_set_config(dev, settings[i].channel, PWM_TICK_NS, ++ settings[i].duty_pct * PWM_TICK_1PCT_NS); ++ if (!ret) { ++ ret = pwm_set_enable(dev, settings[i].channel, true); ++ if (ret) ++ debug("PWM enabling failed: %d\n", ret); ++ } else { ++ debug("PWM configure failed: %d\n", ret); ++ } ++ } ++} ++ + int board_early_init_f(void) + { + /* This is called before relocation; beware! */ +@@ -576,6 +624,7 @@ int board_late_init(void) + timer_callback, (void *)1); + #endif + ++ pwm_init(); + espi_init(); + + /* Add reset reason to bootargs */ +diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c +index 8a77a5d31556..980667f84e30 100644 +--- a/drivers/pinctrl/aspeed/pinctrl_ast2600.c ++++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c +@@ -326,6 +326,110 @@ static struct aspeed_sig_desc pcie1rc_link[] = { + { 0x500, BIT(24), 0 }, //dedicate rc reset + }; + ++static struct aspeed_sig_desc pwm0[] = { ++ { 0x41C, BIT(16), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm1[] = { ++ { 0x41C, BIT(17), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm2[] = { ++ { 0x41C, BIT(18), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm3[] = { ++ { 0x41C, BIT(19), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm4[] = { ++ { 0x41C, BIT(20), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm5[] = { ++ { 0x41C, BIT(21), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm6[] = { ++ { 0x41C, BIT(22), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm7[] = { ++ { 0x41C, BIT(23), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm8g1[] = { ++ { 0x41C, BIT(24), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm9g1[] = { ++ { 0x41C, BIT(25), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm10g1[] = { ++ { 0x41C, BIT(26), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm11g1[] = { ++ { 0x41C, BIT(27), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm12g1[] = { ++ { 0x41C, BIT(28), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm13g1[] = { ++ { 0x41C, BIT(29), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm14g1[] = { ++ { 0x41C, BIT(30), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm15g1[] = { ++ { 0x41C, BIT(31), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm8g0[] = { ++ { 0x414, BIT(8), 1 }, ++ { 0x4B4, BIT(8), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm9g0[] = { ++ { 0x414, BIT(9), 1 }, ++ { 0x4B4, BIT(9), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm10g0[] = { ++ { 0x414, BIT(10), 1 }, ++ { 0x4B4, BIT(10), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm11g0[] = { ++ { 0x414, BIT(11), 1 }, ++ { 0x4B4, BIT(11), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm12g0[] = { ++ { 0x414, BIT(12), 1 }, ++ { 0x4B4, BIT(12), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm13g0[] = { ++ { 0x414, BIT(13), 1 }, ++ { 0x4B4, BIT(13), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm14g0[] = { ++ { 0x414, BIT(14), 1 }, ++ { 0x4B4, BIT(14), 0 }, ++}; ++ ++static struct aspeed_sig_desc pwm15g0[] = { ++ { 0x414, BIT(15), 1 }, ++ { 0x4B4, BIT(15), 0 }, ++}; ++ + static const struct aspeed_group_config ast2600_groups[] = { + { "MAC1LINK", ARRAY_SIZE(mac1_link), mac1_link }, + { "MAC2LINK", ARRAY_SIZE(mac2_link), mac2_link }, +@@ -383,7 +487,31 @@ static const struct aspeed_group_config ast2600_groups[] = { + { "USB2AH", ARRAY_SIZE(usb2ah_link), usb2ah_link }, + { "USB2BH", ARRAY_SIZE(usb2bh_link), usb2bh_link }, + { "PCIE0RC", ARRAY_SIZE(pcie0rc_link), pcie0rc_link }, +- { "PCIE1RC", ARRAY_SIZE(pcie1rc_link), pcie1rc_link }, ++ { "PCIE1RC", ARRAY_SIZE(pcie1rc_link), pcie1rc_link }, ++ { "PWM0", ARRAY_SIZE(pwm0), pwm0 }, ++ { "PWM1", ARRAY_SIZE(pwm1), pwm1 }, ++ { "PWM2", ARRAY_SIZE(pwm2), pwm2 }, ++ { "PWM3", ARRAY_SIZE(pwm3), pwm3 }, ++ { "PWM4", ARRAY_SIZE(pwm4), pwm4 }, ++ { "PWM5", ARRAY_SIZE(pwm5), pwm5 }, ++ { "PWM6", ARRAY_SIZE(pwm6), pwm6 }, ++ { "PWM7", ARRAY_SIZE(pwm7), pwm7 }, ++ { "PWM8G1", ARRAY_SIZE(pwm8g1), pwm8g1 }, ++ { "PWM9G1", ARRAY_SIZE(pwm9g1), pwm9g1 }, ++ { "PWM10G1", ARRAY_SIZE(pwm10g1), pwm10g1 }, ++ { "PWM11G1", ARRAY_SIZE(pwm11g1), pwm11g1 }, ++ { "PWM12G1", ARRAY_SIZE(pwm12g1), pwm12g1 }, ++ { "PWM13G1", ARRAY_SIZE(pwm13g1), pwm13g1 }, ++ { "PWM14G1", ARRAY_SIZE(pwm14g1), pwm14g1 }, ++ { "PWM15G1", ARRAY_SIZE(pwm15g1), pwm15g1 }, ++ { "PWM8G0", ARRAY_SIZE(pwm8g0), pwm8g0 }, ++ { "PWM9G0", ARRAY_SIZE(pwm9g0), pwm9g0 }, ++ { "PWM10G0", ARRAY_SIZE(pwm10g0), pwm10g0 }, ++ { "PWM11G0", ARRAY_SIZE(pwm11g0), pwm11g0 }, ++ { "PWM12G0", ARRAY_SIZE(pwm12g0), pwm12g0 }, ++ { "PWM13G0", ARRAY_SIZE(pwm13g0), pwm13g0 }, ++ { "PWM14G0", ARRAY_SIZE(pwm14g0), pwm14g0 }, ++ { "PWM15G0", ARRAY_SIZE(pwm15g0), pwm15g0 }, + }; + + static int ast2600_pinctrl_get_groups_count(struct udevice *dev) +diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig +index 2984b7976637..95e82ee5ddf6 100644 +--- a/drivers/pwm/Kconfig ++++ b/drivers/pwm/Kconfig +@@ -50,3 +50,11 @@ config PWM_SUNXI + help + This PWM is found on H3, A64 and other Allwinner SoCs. It supports a + programmable period and duty cycle. A 16-bit counter is used. ++ ++config PWM_ASPEED ++ bool "Enable support for the Aspeed AST2600 PWM" ++ depends on DM_PWM ++ depends on ASPEED_AST2600 ++ help ++ This PWM is found on Aspeed AST2600 SoC. It supports a programmable ++ period and duty cycle. A 16-bit counter is used. +diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile +index a837c35ed2e3..770b054c3f3b 100644 +--- a/drivers/pwm/Makefile ++++ b/drivers/pwm/Makefile +@@ -16,3 +16,4 @@ obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o + obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o + obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o + obj-$(CONFIG_PWM_SUNXI) += sunxi_pwm.o ++obj-$(CONFIG_PWM_ASPEED) += aspeed_pwm.o +diff --git a/drivers/pwm/aspeed_pwm.c b/drivers/pwm/aspeed_pwm.c +new file mode 100644 +index 000000000000..bd9a911b4fe2 +--- /dev/null ++++ b/drivers/pwm/aspeed_pwm.c +@@ -0,0 +1,172 @@ ++// SPDX-License-Identifier: GPL ++// Copyright (c) 2021 Intel Corporation ++ ++#include <asm/io.h> ++#include <linux/bitfield.h> ++#include <clk.h> ++#include <common.h> ++#include <dm.h> ++#include <linux/ioport.h> ++#include <pwm.h> ++#include <reset.h> ++#include <asm/arch/scu_ast2600.h> ++ ++#define NSEC_PER_SEC 1000000000L ++ ++#define ASPEED_PWM_CTRL 0x00 /* PWM0 General Register */ ++#define ASPEED_PWM_CTRL_CH(x) (((x) * 0x10) + ASPEED_PWM_CTRL) ++#define PWM_LOAD_AS_WDT BIT(19) ++#define PWM_DUTY_LOAD_AS_WDT_EN BIT(18) ++#define PWM_DUTY_SYNC_DIS BIT(17) ++#define PWM_CLK_ENABLE BIT(16) ++#define PWM_LEVEL_OUTPUT BIT(15) ++#define PWM_INVERSE BIT(14) ++#define PWM_OPEN_DRAIN_EN BIT(13) ++#define PWM_PIN_EN BIT(12) ++#define PWM_CLK_DIV_H_MASK GENMASK(11, 8) ++#define PWM_CLK_DIV_L_MASK GENMASK(7, 0) ++ ++#define ASPEED_PWM_DUTY_CYCLE 0x04 /* PWM0 Duty Cycle Register */ ++#define ASPEED_PWM_DUTY_CYCLE_CH(x) (((x) * 0x10) + ASPEED_PWM_DUTY_CYCLE) ++#define PWM_PERIOD_MASK GENMASK(31, 24) ++#define PWM_RISING_FALLING_AS_WDT_MASK GENMASK(23, 16) ++#define PWM_RISING_POINT_MASK GENMASK(15, 8) ++#define PWM_FALLING_POINT_MASK GENMASK(7, 0) ++ ++#define PWM_PERIOD_MAX 255 ++ ++struct aspeed_pwm_priv { ++ void __iomem *base; ++ ulong clk_freq; ++ u32 clk_tick_ns; ++}; ++ ++static int aspeed_pwm_set_config(struct udevice *dev, uint channel, ++ uint period_ns, uint duty_ns) ++{ ++ struct aspeed_pwm_priv *priv = dev_get_priv(dev); ++ u8 div_h, div_l, period_value, falling_point, rising_point; ++ u32 ctrl_value, duty_value, tick_ns; ++ ++ /* ++ * We currently avoid using 64bit arithmetic by using the ++ * fact that anything faster than 1Hz is easily representable ++ * by 32bits. ++ */ ++ if (period_ns > NSEC_PER_SEC) ++ return -ERANGE; ++ ++ for (div_l = 0; div_l <= 0xff; div_l++) { ++ for (div_h = 0; div_h <= 0xf; div_h++) { ++ tick_ns = priv->clk_tick_ns * BIT(div_h) * (div_l + 1); ++ if (tick_ns * PWM_PERIOD_MAX >= period_ns) ++ break; ++ } ++ if (tick_ns * PWM_PERIOD_MAX >= period_ns) ++ break; ++ } ++ ++ if (period_ns / tick_ns > PWM_PERIOD_MAX) ++ return -ERANGE; ++ ++ ctrl_value = FIELD_PREP(PWM_CLK_DIV_H_MASK, div_h) | ++ FIELD_PREP(PWM_CLK_DIV_L_MASK, div_l); ++ period_value = period_ns / tick_ns; ++ falling_point = 0; ++ rising_point = duty_ns / tick_ns; ++ duty_value = FIELD_PREP(PWM_PERIOD_MASK, period_value) | ++ FIELD_PREP(PWM_RISING_POINT_MASK, rising_point) | ++ FIELD_PREP(PWM_FALLING_POINT_MASK, falling_point); ++ ++ clrsetbits_le32(priv->base + ASPEED_PWM_DUTY_CYCLE_CH(channel), ++ PWM_PERIOD_MASK | PWM_RISING_POINT_MASK | ++ PWM_FALLING_POINT_MASK, duty_value); ++ clrsetbits_le32(priv->base + ASPEED_PWM_CTRL_CH(channel), ++ PWM_CLK_DIV_H_MASK | PWM_CLK_DIV_L_MASK, ctrl_value); ++ ++ return 0; ++} ++ ++static int aspeed_pwm_set_enable(struct udevice *dev, uint channel, bool enable) ++{ ++ struct aspeed_pwm_priv *priv = dev_get_priv(dev); ++ ++ debug("%s: Enable '%s' channel %u\n", __func__, dev->name, channel); ++ ++ clrsetbits_le32(priv->base + ASPEED_PWM_CTRL_CH(channel), ++ PWM_CLK_ENABLE | PWM_PIN_EN, ++ enable ? PWM_CLK_ENABLE | PWM_PIN_EN : 0); ++ ++ return 0; ++} ++ ++static int aspeed_pwm_ofdata_to_platdata(struct udevice *dev) ++{ ++ struct aspeed_pwm_priv *priv = dev_get_priv(dev); ++ struct resource res_regs; ++ int ret; ++ ++ ret = dev_read_resource(dev, 0, &res_regs); ++ if (ret < 0) ++ return ret; ++ ++ priv->base = (void __iomem *)res_regs.start; ++ ++ return 0; ++} ++ ++static int aspeed_pwm_probe(struct udevice *dev) ++{ ++ struct aspeed_pwm_priv *priv = dev_get_priv(dev); ++ struct reset_ctl reset_ctl; ++ struct clk hclk; ++ int ret; ++ ++ ret = clk_get_by_index(dev, 0, &hclk); ++ if (ret) { ++ pr_err("%s: could not get clock: %d\n", dev->name, ret); ++ return ret; ++ } ++ ++ priv->clk_freq = clk_get_rate(&hclk); ++ priv->clk_tick_ns = NSEC_PER_SEC / priv->clk_freq; ++ (void) clk_free(&hclk); ++ ++ ret = reset_get_by_index(dev, 0, &reset_ctl); ++ if (ret) { ++ pr_err("%s: Failed to get reset signal: %d\n", dev->name, ret); ++ return ret; ++ } ++ ++ ret = reset_assert(&reset_ctl); ++ if (!ret) { ++ mdelay(10); ++ ret = reset_deassert(&reset_ctl); ++ } ++ ++ return ret; ++} ++ ++static const struct pwm_ops aspeed_pwm_ops = { ++ .set_config = aspeed_pwm_set_config, ++ .set_enable = aspeed_pwm_set_enable, ++}; ++ ++static const struct udevice_id aspeed_pwm_ids[] = { ++ { .compatible = "aspeed,ast2600-pwm" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(aspeed_pwm) = { ++ .name = "aspeed_pwm", ++ .id = UCLASS_PWM, ++ .of_match = aspeed_pwm_ids, ++ .ops = &aspeed_pwm_ops, ++ .ofdata_to_platdata = aspeed_pwm_ofdata_to_platdata, ++ .priv_auto_alloc_size = sizeof(struct aspeed_pwm_priv), ++ .probe = aspeed_pwm_probe, ++}; ++ ++MODULE_AUTHOR("Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Aspeed AST2600 PWM Driver"); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0031-Add-a-workaround-to-fix-AST2600-A0-booting-issue.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0031-Add-a-workaround-to-fix-AST2600-A0-booting-issue.patch new file mode 100644 index 000000000..9444dde99 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0031-Add-a-workaround-to-fix-AST2600-A0-booting-issue.patch @@ -0,0 +1,32 @@ +From 58ed1cb4ac3229b484c983a2e4982fad13da0e06 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 21 May 2021 17:24:13 -0700 +Subject: [PATCH] Add a workaround to fix AST2600 A0 booting issue + +AST2600 A0 doesn't boot with 88KB SRAM setting so this commit adds +a workaround which pins SRAM size to 64KB to make A0 able to boot. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/include/asm/arch-aspeed/platform.h | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h +index f016bdaba3e7..192e3b977a34 100644 +--- a/arch/arm/include/asm/arch-aspeed/platform.h ++++ b/arch/arm/include/asm/arch-aspeed/platform.h +@@ -53,7 +53,11 @@ + #define ASPEED_MAC_COUNT 4 + #define ASPEED_DRAM_BASE 0x80000000 + #define ASPEED_SRAM_BASE 0x10000000 ++#if 1 /* AST2600 A0 doesn't boot with 88K setting so pin SRAM size to 64K */ ++#define ASPEED_SRAM_SIZE 0x10000 ++#else + #define ASPEED_SRAM_SIZE 0x16000 ++#endif + #define ASPEED_FMC_CS0_BASE 0x20000000 + #else + #err "No define for platform.h" +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0032-Disable-eSPI-initialization-in-u-boot-for-normal-boo.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0032-Disable-eSPI-initialization-in-u-boot-for-normal-boo.patch new file mode 100644 index 000000000..018ab07cf --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0032-Disable-eSPI-initialization-in-u-boot-for-normal-boo.patch @@ -0,0 +1,60 @@ +From 08f2b4f0464ef8abcf32511f8549233359d16eed Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 2 Jun 2021 13:03:47 -0700 +Subject: [PATCH] Disable eSPI initialization in u-boot for normal booting + cases + +Initializing eSPI in u-boot introduces a small blind window of +handshaking when BMC jumps from boot loader to kernel and it causes +an infinite PCH waiting issue in ME recovery mode. During the power +on handshaking, PCH keeps waiting for OOB_FREE to continue its +booting so the OOB_FREE actually means that BMC is fully ready for +the power on handshake. To prevent the small blind window, this +commit removes eSPI initialization in u-boot for normal booting +cases and makes the kernel eSPI driver responsible for full +eSPI initialization. + +eSPI will be initialized in u-boot only in these specific cases: +1. When FFUJ (Force Firmware Update Jumper) is populated. +2. When BMC booting is stopped at u-boot by typing a key. +3. When BMC goes to u-boot due to the boot failure condition. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 54f53d77c476..f3f1d8114616 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -201,6 +201,10 @@ static void gpio_passthru_init(void) + + void board_pre_abort_autoboot(void) + { ++ if (!read_ffuj()) { ++ espi_init(); ++ kcs_init(); ++ } + } + + #define AST_LPC_BASE 0x1e789000 +@@ -625,7 +629,6 @@ int board_late_init(void) + #endif + + pwm_init(); +- espi_init(); + + /* Add reset reason to bootargs */ + snprintf(value, sizeof(value), "0x%x", gd->reset_reason); +@@ -645,6 +648,7 @@ int board_late_init(void) + gpio_passthru_init(); + + if (read_ffuj()) { ++ espi_init(); + kcs_init(); + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0033-Disable-debug-interfaces.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0033-Disable-debug-interfaces.patch new file mode 100644 index 000000000..9a7541eed --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0033-Disable-debug-interfaces.patch @@ -0,0 +1,86 @@ +From 7a0f0e0915c7d9260a3d067746157112f85822db Mon Sep 17 00:00:00 2001 +From: Chen Yugang <yugang.chen@linux.intel.com> +Date: Fri, 11 Jun 2021 12:44:25 +0800 +Subject: [PATCH] Disable debug interfaces + +1.Disable ARM Core CA7 debug features in +SCU800: CA7 processor Control +2.Disable Mailbox Write/Disable in PDSEF0: PCIe +Device Security Enhancement Control Register F0 +3.Disable target AHB to PCIE RC bridge controller +in AHBC88: AHB Bus Target Disable Control Register + +Signed-off-by: Chen Yugang <yugang.chen@linux.intel.com> +--- + arch/arm/mach-aspeed/ast2600/platform.S | 34 +++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S +index 4cc22e31c6..636bccad32 100644 +--- a/arch/arm/mach-aspeed/ast2600/platform.S ++++ b/arch/arm/mach-aspeed/ast2600/platform.S +@@ -26,6 +26,9 @@ + * +----------------------+ AST_SMP_MAILBOX_BASE + */ + ++#define AST_AHBC_BASE 0x1E600000 ++#define AST_AHBC_BUS_TARGET_CTRL (AST_AHBC_BASE + 0x088) ++ + #define AST_SMP_MAILBOX_BASE (0x1E6E2180) + #define AST_SMP_MBOX_FIELD_ENTRY (AST_SMP_MAILBOX_BASE + 0x0) + #define AST_SMP_MBOX_FIELD_GOSIGN (AST_SMP_MAILBOX_BASE + 0x4) +@@ -50,6 +53,7 @@ + #define AST_SCU_HW_STRAP2 (AST_SCU_BASE + 0x510) + #define AST_SCU_HW_STRAP2_CLR (AST_SCU_BASE + 0x514) + #define AST_SCU_HW_STRAP3 (AST_SCU_BASE + 0x51C) ++#define AST_SCU_CA7_PROCESSOR_CTRL (AST_SCU_BASE + 0x800) + #define AST_SCU_CA7_PARITY_CHK (AST_SCU_BASE + 0x820) + #define AST_SCU_CA7_PARITY_CLR (AST_SCU_BASE + 0x824) + #define AST_SCU_MMIO_DEC_SET (AST_SCU_BASE + 0xC24) +@@ -83,6 +87,9 @@ + #define AST_LPC_BASE 0x1E789000 + #define AST_LPC_HICRA (AST_LPC_BASE + 0x09C) + ++#define AST_PCIEATH_BASE 0x1E7F2000 ++#define AST_PCIEATH_SECURITY_CTRL (AST_PCIEATH_BASE + 0x0F0) ++ + /* Revision ID */ + #define REV_ID_AST2600A0 0x05000303 + #define REV_ID_AST2600A1 0x05010303 +@@ -436,6 +443,33 @@ skip_fill_wip_bit: + moveq r1, #0xff + str r1, [r0] + ++ /* disable debug interfaces */ ++ /* SCU_800 */ ++ ldr r0, =AST_SCU_CA7_PROCESSOR_CTRL ++ ldr r1, [r0] ++ ldr r2, =0x0c03f ++ and r1, r1, r2 ++ str r1, [r0] ++ ++ /* PCIEATH_F0 */ ++ ldr r0, =AST_PCIEATH_SECURITY_CTRL ++ ldr r1, [r0] ++ orr r1, #0x50000 ++ str r1, [r0] ++ ++ /* AHBC_088 */ ++ ldr r0, =AST_AHBC_BASE ++ movw r1, #0x1a03 ++ movt r1, #0xaeed ++ str r1, [r0] ++ ldr r0, =AST_AHBC_BUS_TARGET_CTRL ++ ldr r1, [r0] ++ orr r1, #0xc0000 ++ str r1, [r0] ++ ldr r0, =AST_AHBC_BASE ++ movw r1, #0 ++ str r1, [r0] ++ + /* set UART routing back to default */ + ldr r0, =AST_LPC_HICRA + ldr r1, =0x0 +-- +2.27.0 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0034-Implement-the-IPMI-commands-in-FFUJ-mode-in-u-boot.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0034-Implement-the-IPMI-commands-in-FFUJ-mode-in-u-boot.patch new file mode 100644 index 000000000..0d27f9d70 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0034-Implement-the-IPMI-commands-in-FFUJ-mode-in-u-boot.patch @@ -0,0 +1,211 @@ +From 8b0d9f83aeb6e58c271ffe2d07c79397fe813a78 Mon Sep 17 00:00:00 2001 +From: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +Date: Wed, 23 Jun 2021 18:10:08 +0000 +Subject: [PATCH] Implement the IPMI commands in FFUJ mode in u-boot + +Implemented the following IPMI commands in force firmware update +jumper (FFUJ) mode in u-boot. + +1. Get BMC execution context (0x23) +2. Get Security mode (0xb3) +3. Set security mode (0xb4) +4. Get buffer size (0x66) + +Tested: +Used ipmitool from Host OS to verify each individual commands + +Positive test cases: + +get execution context +ipmitool raw 8 0x23 +11 01 +get buffer size +ipmitool raw 0x30 0x66 +ff ff +set security mode +ipmitool raw 0x30 0xb4 5 +get security mode +ipmitool raw 0x30 0xb3 +05 00 +set security mode +ipmitool raw 0x30 0xb4 4 +get security mode +ipmitool raw 0x30 0xb3 +04 00 +set security mode +ipmitool raw 0x30 0xb4 3 +get security mode +ipmitool raw 0x30 0xb3 +03 00 + +Negative test cases: + +set security mode +ipmitool raw 0x30 0xb4 1 +Unable to send RAW command: Invalid data field in request +ipmitool raw 0x30 0xb4 2 +Unable to send RAW command: Invalid data field in request +ipmitool raw 0x30 0xb4 6 +Unable to send RAW command: Invalid data field in request +ipmitool raw 0x30 0xb4 7 +Unable to send RAW command: Invalid data field in request + +Change-Id: I515cec5ff6019aa3ea30a9a38886130e354252a8 +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +--- + board/aspeed/ast2600_intel/ipmi-handler.c | 120 +++++++++++++++++++++- + 1 file changed, 117 insertions(+), 3 deletions(-) + +diff --git a/board/aspeed/ast2600_intel/ipmi-handler.c b/board/aspeed/ast2600_intel/ipmi-handler.c +index 04732846ac..5319f986a7 100644 +--- a/board/aspeed/ast2600_intel/ipmi-handler.c ++++ b/board/aspeed/ast2600_intel/ipmi-handler.c +@@ -4,11 +4,28 @@ + #include "ipmi-handler.h" + + /* IPMI network function codes */ +-#define NETFN_APP 0x06 ++#define NETFN_APP 0x06 ++#define NETFN_FIRMWARE 0x08 ++#define NETFN_INTEL_OEM 0x30 + + /* IPMI command codes */ + #define CMD_GET_DEV_ID 0x01 + #define CMD_GET_SELF_TEST_RESULTS 0x04 ++#define CMD_FWUPD_GET_EXECUTION_CTX 0x23 ++#define CMD_INTL_OEM_GET_BUFFER_SIZE 0x66 ++#define CMD_INTL_OEM_GET_SEC_MODE 0xB3 ++#define CMD_INTL_OEM_SET_SEC_MODE 0xB4 ++ ++#define MAX_KCS_BUF_SIZE 1020 /* (0xFF * 4) */ ++#define MAX_IPMB_BUF_SIZE 1020 /* (0xFF * 4) */ ++ ++/* Restriction mode values */ ++#define RESTRICTION_MODE_MIN_VALUE 3 /*Provisioning*/ ++#define RESTRICION_MODE_MAX_VALUE 5 /*Provisioned host disabled */ ++ ++#define STR_ENV_PROVISION "provision" ++ ++#define PRIMARY_IMAGE 0x01 + + typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res); + +@@ -28,6 +45,21 @@ struct self_test_res { + u8 completion_code; + u8 res_byte[2]; + }; ++struct fwupd_get_exe_ctx_res { ++ u8 completion_code; ++ u8 execution_ctx; ++ u8 partition_ptr; ++}; ++struct intc_get_buf_size_res { ++ u8 completion_code; ++ u8 kcs_size; ++ u8 ipmb_size; ++}; ++struct intc_get_secuirty_mode_res { ++ u8 completion_code; ++ u8 restriction_mode; ++ u8 special_mode; ++}; + + struct ipmi_cmd_table { + u8 net_fun; +@@ -84,9 +116,91 @@ static u16 get_self_test_result(u8 *req, u16 req_len, u8 *res) + return sizeof(struct self_test_res); + } + ++u16 fwupd_get_execution_ctx(u8 *req, u16 req_len, u8 *res) { ++ ++ /* Get firmware update execution context */ ++ struct fwupd_get_exe_ctx_res *result = (struct fwupd_get_exe_ctx_res *)res; ++ ++ /* For PFR platforms, only primary/active image always */ ++ result->partition_ptr = PRIMARY_IMAGE; ++ result->execution_ctx = 0x11; /* Forced Firmware Update mode */ ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(struct fwupd_get_exe_ctx_res); ++} ++ ++static u16 intel_get_buffer_size(u8 *req, u16 req_len, u8 *res) { ++ ++ /* Get buffer size */ ++ struct intc_get_buf_size_res *result = (struct intc_get_buf_size_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ /* Size is multiples of four bytes */ ++ result->completion_code = IPMI_CC_OK; ++ result->kcs_size = MAX_KCS_BUF_SIZE / 4; ++ result->ipmb_size = MAX_IPMB_BUF_SIZE / 4; ++ ++ return sizeof(struct intc_get_buf_size_res); ++} ++ ++static u16 intel_get_security_mode(u8 *req, u16 req_len, u8 *res) { ++ ++ char *cmdline = NULL; ++ /* Get security mode */ ++ struct intc_get_secuirty_mode_res *result = ++ (struct intc_get_secuirty_mode_res *)res; ++ ++ if (req_len != 0) { ++ result->completion_code = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(result->completion_code); ++ } ++ ++ cmdline = env_get(STR_ENV_PROVISION); ++ ++ if (!cmdline) { ++ /* Default provision must be set only by linux */ ++ result->completion_code = IPMI_CC_UNSPECIFIED; ++ return sizeof(result->completion_code); ++ } ++ ++ result->restriction_mode = simple_strtol(cmdline, NULL, 10); ++ /* special mode is non-volatile and not applicable in U-Boot */ ++ result->special_mode = 0; ++ result->completion_code = IPMI_CC_OK; ++ ++ return sizeof(*result); ++} ++ ++static u16 intel_set_security_mode(u8 *req, u16 req_len, u8 *res) { ++ ++ if (req_len != sizeof(*req)) { ++ *res = IPMI_CC_INVALID_DATA_LENGTH; ++ return sizeof(*res); ++ } ++ ++ if (*req > RESTRICION_MODE_MAX_VALUE || *req < RESTRICTION_MODE_MIN_VALUE) { ++ *res = IPMI_CC_INVALID_DATA_FIELD; ++ return sizeof(*res); ++ } ++ ++ env_set_ulong(STR_ENV_PROVISION, *req); ++ env_save(); ++ *res = IPMI_CC_OK; ++ ++ return sizeof(*res); ++} ++ + const struct ipmi_cmd_table cmd_info[] = { +- { NETFN_APP, CMD_GET_DEV_ID, get_device_id }, +- { NETFN_APP, CMD_GET_SELF_TEST_RESULTS, get_self_test_result } ++ { NETFN_APP, CMD_GET_DEV_ID, get_device_id}, ++ { NETFN_APP, CMD_GET_SELF_TEST_RESULTS, get_self_test_result}, ++ { NETFN_FIRMWARE, CMD_FWUPD_GET_EXECUTION_CTX, fwupd_get_execution_ctx}, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_BUFFER_SIZE, intel_get_buffer_size}, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_GET_SEC_MODE, intel_get_security_mode}, ++ { NETFN_INTEL_OEM, CMD_INTL_OEM_SET_SEC_MODE, intel_set_security_mode} + }; + + #define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0035-Remove-u-boot-delay-before-autoboot-in-release-image.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0035-Remove-u-boot-delay-before-autoboot-in-release-image.patch new file mode 100644 index 000000000..17ef21308 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0035-Remove-u-boot-delay-before-autoboot-in-release-image.patch @@ -0,0 +1,34 @@ +From 7aeedcb63c6d83e7ad61b55a7098c2e6381a917c Mon Sep 17 00:00:00 2001 +From: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +Date: Sun, 12 Sep 2021 19:16:59 +0000 +Subject: [PATCH] Remove u-boot delay before autoboot in release image + +Removed the delay in u-boot which allowed the user to stop +automatically booting to kernel in release image by changing +the delay value to negative. + +Tested: +After the fix, unable to stop the release image at u-boot +and prevent autoboot. + +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +--- + include/configs/aspeed-common.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h +index 2be63a5c66..9707a49f90 100644 +--- a/include/configs/aspeed-common.h ++++ b/include/configs/aspeed-common.h +@@ -85,6 +85,8 @@ + + #define CONFIG_ENV_SECT_SIZE (4 << 10) + ++#define CONFIG_BOOTDELAY -2 ++ + /* + * Ethernet related + */ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0036-Disable-BMC-MMIO-Decode-on-VGA-SCU-register-bit.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0036-Disable-BMC-MMIO-Decode-on-VGA-SCU-register-bit.patch new file mode 100644 index 000000000..f48532102 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0036-Disable-BMC-MMIO-Decode-on-VGA-SCU-register-bit.patch @@ -0,0 +1,62 @@ +From 700d71d2c9ef669583acb6900a913620bbb68ce0 Mon Sep 17 00:00:00 2001 +From: sureshv1 <suresh.vijayakumar@intel.com> +Date: Mon, 20 Sep 2021 11:27:46 +0530 +Subject: [PATCH] Disable BMC MMIO Decode on VGA SCU register bit + +This patch is required to avoid un-necessary logging of +redfish log(P2A Bridge Enabled) as the default value of +SCUC20 has this bit set causing the default/init value +to be taken into consideration and logging the event. + +Tested: +Flashed the image and performed AC Power cycle multiple +times also to check whether any critical events related +to P2A Bridge enabled log, this redfish log is not being +logged after this changes. + +Change-Id: If24fbea338ce17e3b4f1ba93b4d11c7843ddb952 +Signed-off-by: sureshv1 <suresh.vijayakumar@intel.com> +--- + board/aspeed/ast2600_intel/intel.c | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c +index 1791045ee8..103bf538b5 100644 +--- a/board/aspeed/ast2600_intel/intel.c ++++ b/board/aspeed/ast2600_intel/intel.c +@@ -478,6 +478,23 @@ static void pwm_init(void) + } + } + ++/* ++ * Description: Disable BMC MMIO Decode on VGA ++ * which is not being used. ++ */ ++void disable_bmc_mmio_decode_vga() ++{ ++#define AST_SCU_BASE 0x1E6E2000 ++#define AST_PCI_CONFIG_REG 0xC20 ++ ++ u32 pcie_config_val = readl(AST_SCU_BASE + AST_PCI_CONFIG_REG); ++ ++ if (pcie_config_val & BIT(1)) { ++ writel(pcie_config_val & ~BIT(1), ++ AST_SCU_BASE + AST_PCI_CONFIG_REG); ++ } ++} ++ + int board_early_init_f(void) + { + /* This is called before relocation; beware! */ +@@ -680,6 +697,8 @@ int board_late_init(void) + + pwm_init(); + ++ disable_bmc_mmio_decode_vga(); ++ + /* Add reset reason to bootargs */ + snprintf(value, sizeof(value), "0x%x", gd->reset_reason); + update_bootargs_cmd("resetreason", value); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0037-Enable-I2C-clock-stretching-and-multi-master-support.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0037-Enable-I2C-clock-stretching-and-multi-master-support.patch new file mode 100644 index 000000000..014915772 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0037-Enable-I2C-clock-stretching-and-multi-master-support.patch @@ -0,0 +1,143 @@ +From 292700faccff983b60a6bf210af36d9bf7a0ac1a Mon Sep 17 00:00:00 2001 +From: Jan Sowinski <jan.sowinski@intel.com> +Date: Fri, 15 Oct 2021 23:34:10 +0200 +Subject: [PATCH] Enable I2C clock stretching and multi-master support for + AST2600 + +Enabled I2C clock stretching by default to +improve general compatibility with various devices. + +Added support for multi-master mode enabled with +"multi-master" property set in DTS for every i2c node. + +Signed-off-by: Jan Sowinski <jan.sowinski@intel.com> +--- + arch/arm/dts/ast2600-intel.dts | 8 ++++++++ + drivers/i2c/ast_i2c.c | 19 ++++++++++++------- + 2 files changed, 20 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/dts/ast2600-intel.dts b/arch/arm/dts/ast2600-intel.dts +index a76193716d..dba62fd254 100644 +--- a/arch/arm/dts/ast2600-intel.dts ++++ b/arch/arm/dts/ast2600-intel.dts +@@ -168,6 +168,7 @@ + + &i2c4 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5_default>; +@@ -175,6 +176,7 @@ + + &i2c5 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c6_default>; +@@ -182,6 +184,7 @@ + + &i2c6 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c7_default>; +@@ -189,6 +192,7 @@ + + &i2c7 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c8_default>; +@@ -196,6 +200,7 @@ + + &i2c8 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c9_default>; +@@ -203,6 +208,7 @@ + + &i2c9 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c10_default>; +@@ -210,6 +216,7 @@ + + &i2c12 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c13_default>; +@@ -217,6 +224,7 @@ + + &i2c13 { + status = "okay"; ++ multi-master; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c14_default>; +diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c +index bbc32d6cdb..974641220b 100644 +--- a/drivers/i2c/ast_i2c.c ++++ b/drivers/i2c/ast_i2c.c +@@ -31,6 +31,8 @@ struct ast_i2c_priv { + struct ast_i2c_regs *regs; + /* I2C speed in Hz */ + int speed; ++ /* Multi-master mode */ ++ bool multi_master; + }; + + /* +@@ -67,14 +69,14 @@ static void ast_i2c_clear_interrupts(struct udevice *dev) + static void ast_i2c_init_bus(struct udevice *dev) + { + struct ast_i2c_priv *priv = dev_get_priv(dev); ++ u32 fun_ctrl_reg = I2CD_MASTER_EN; + + /* Reset device */ + writel(0, &priv->regs->fcr); +- /* Enable Master Mode. Assuming single-master */ +- writel(I2CD_MASTER_EN +- | I2CD_M_SDA_LOCK_EN +- | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, +- &priv->regs->fcr); ++ /* Enable Single-Master or Multi-Master Mode. */ ++ if (!priv->multi_master) ++ fun_ctrl_reg |= I2CD_MULTI_MASTER_DIS; ++ writel(fun_ctrl_reg, &priv->regs->fcr); + /* Enable Interrupts */ + writel(I2CD_INTR_TX_ACK + | I2CD_INTR_TX_NAK +@@ -100,6 +102,9 @@ static int ast_i2c_ofdata_to_platdata(struct udevice *dev) + return ret; + } + ++ if (dev_read_bool(dev, "multi-master")) ++ priv->multi_master = true; ++ + return 0; + } + +@@ -246,8 +251,8 @@ static int ast_i2c_deblock(struct udevice *dev) + bool scl_high = csr & I2CD_SCL_LINE_STS; + int ret = 0; + +- if (sda_high && scl_high) { +- /* Bus is idle, no deblocking needed. */ ++ if ((sda_high && scl_high) || priv->multi_master) { ++ /* Bus is idle or multi-master mode enabled, no deblocking needed. */ + return 0; + } else if (sda_high) { + /* Send stop command */ +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0043-AST2600-PFR-u-boot-env-changes-as-per-PFR-BMC-image.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0043-AST2600-PFR-u-boot-env-changes-as-per-PFR-BMC-image.patch new file mode 100644 index 000000000..df26cb5a9 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0043-AST2600-PFR-u-boot-env-changes-as-per-PFR-BMC-image.patch @@ -0,0 +1,35 @@ +From 0b1cf63187baba9016fa01df7e58989c80d57465 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Mon, 13 Apr 2020 09:30:14 +0800 +Subject: [PATCH] PFR u-boot env changes as per PFR BMC image + +u-boot env changes as per PFR BMC flash layout. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + include/configs/aspeed-common.h | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h +index d5befb185b6a..2be63a5c662b 100644 +--- a/include/configs/aspeed-common.h ++++ b/include/configs/aspeed-common.h +@@ -68,9 +68,11 @@ + #define CONFIG_ENV_SIZE 0x10000 + #endif + +-#ifndef CONFIG_ENV_OFFSET +-#define CONFIG_ENV_OFFSET 0x2400000 +-#endif ++#undef CONFIG_BOOTCOMMAND ++#define CONFIG_BOOTCOMMAND "bootm 20b00000" ++ ++#undef CONFIG_ENV_OFFSET ++#define CONFIG_ENV_OFFSET 0xa0000 + + #define CONFIG_SYS_REDUNDAND_ENVIRONMENT + #define CONFIG_ENV_OVERWRITE +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11059/0001-Fix-ext4-block-group-descriptor-sizing.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11059/0001-Fix-ext4-block-group-descriptor-sizing.patch new file mode 100644 index 000000000..d35ee0ac1 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11059/0001-Fix-ext4-block-group-descriptor-sizing.patch @@ -0,0 +1,62 @@ +From febbc583319b567fe3d83e521cc2ace9be8d1501 Mon Sep 17 00:00:00 2001 +From: Benjamin Lim <jarsp.ctf@gmail.com> +Date: Fri, 29 Mar 2019 07:29:45 -0400 +Subject: [PATCH] Fix ext4 block group descriptor sizing + +Ext4 allows for arbitrarily sized block group descriptors when 64-bit +addressing is enabled, which was previously not properly supported. This +patch dynamically allocates a chunk of memory of the correct size. + +Signed-off-by: Benjamin Lim <jarsp.ctf@gmail.com> +--- + fs/ext4/ext4_common.c | 19 +++++++++++++++---- + 1 file changed, 15 insertions(+), 4 deletions(-) + +diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c +index feffbfa9a9eb..464c33d0d74c 100644 +--- a/fs/ext4/ext4_common.c ++++ b/fs/ext4/ext4_common.c +@@ -1587,7 +1587,7 @@ static int ext4fs_blockgroup + + int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode) + { +- struct ext2_block_group blkgrp; ++ struct ext2_block_group *blkgrp; + struct ext2_sblock *sblock = &data->sblock; + struct ext_filesystem *fs = get_fs(); + int log2blksz = get_fs()->dev_desc->log2blksz; +@@ -1595,17 +1595,28 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode) + long int blkno; + unsigned int blkoff; + ++ /* Allocate blkgrp based on gdsize (for 64-bit support). */ ++ blkgrp = zalloc(get_fs()->gdsize); ++ if (!blkgrp) ++ return 0; ++ + /* It is easier to calculate if the first inode is 0. */ + ino--; + status = ext4fs_blockgroup(data, ino / le32_to_cpu +- (sblock->inodes_per_group), &blkgrp); +- if (status == 0) ++ (sblock->inodes_per_group), blkgrp); ++ if (status == 0) { ++ free(blkgrp); + return 0; ++ } + + inodes_per_block = EXT2_BLOCK_SIZE(data) / fs->inodesz; +- blkno = ext4fs_bg_get_inode_table_id(&blkgrp, fs) + ++ blkno = ext4fs_bg_get_inode_table_id(blkgrp, fs) + + (ino % le32_to_cpu(sblock->inodes_per_group)) / inodes_per_block; + blkoff = (ino % inodes_per_block) * fs->inodesz; ++ ++ /* Free blkgrp as it is no longer required. */ ++ free(blkgrp); ++ + /* Read the inode. */ + status = ext4fs_devread((lbaint_t)blkno << (LOG2_BLOCK_SIZE(data) - + log2blksz), blkoff, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11690/0001-lib-uuid-Fix-unseeded-PRNG-on-RANDOM_UUID-y.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11690/0001-lib-uuid-Fix-unseeded-PRNG-on-RANDOM_UUID-y.patch new file mode 100644 index 000000000..c793df2f4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-11690/0001-lib-uuid-Fix-unseeded-PRNG-on-RANDOM_UUID-y.patch @@ -0,0 +1,95 @@ +From 4ccf678f37731d8ec09eae8dca5f4cbe84132a52 Mon Sep 17 00:00:00 2001 +From: Eugeniu Rosca <erosca@de.adit-jv.com> +Date: Thu, 2 May 2019 14:27:06 +0200 +Subject: [PATCH] lib: uuid: Fix unseeded PRNG on RANDOM_UUID=y + +The random uuid values (enabled via CONFIG_RANDOM_UUID=y) on our +platform are always the same. Below is consistent on each cold boot: + + => ### interrupt autoboot + => env default -a; gpt write mmc 1 $partitions; print uuid_gpt_misc + ... + uuid_gpt_misc=d117f98e-6f2c-d04b-a5b2-331a19f91cb2 + => env default -a; gpt write mmc 1 $partitions; print uuid_gpt_misc + ... + uuid_gpt_misc=ad5ec4b6-2d9f-8544-9417-fe3bd1c9b1b3 + => env default -a; gpt write mmc 1 $partitions; print uuid_gpt_misc + ... + uuid_gpt_misc=cceb0b18-39cb-d547-9db7-03b405fa77d4 + => env default -a; gpt write mmc 1 $partitions; print uuid_gpt_misc + ... + uuid_gpt_misc=d4981a2b-0478-544e-9607-7fd3c651068d + => env default -a; gpt write mmc 1 $partitions; print uuid_gpt_misc + ... + uuid_gpt_misc=6d6c9a36-e919-264d-a9ee-bd00379686c7 + +While the uuids do change on every 'gpt write' command, the values +appear to be taken from the same pool, in the same order. + +Assuming U-Boot with RANDOM_UUID=y is deployed on a large number of +devices, all those devices would essentially expose the same UUID, +breaking the assumption of system/RFS/application designers who rely +on UUID as being globally unique (e.g. a database using UUID as key +would alias/mix up entries/records due to duplicated UUID). + +The root cause seems to be simply _not_ seeding PRNG before generating +a random value. It turns out this belongs to an established class of +PRNG-specific problems, commonly known as "unseeded randomness", for +which I am able to find below bugs/CVE/CWE: + - https://bugzilla.redhat.com/show_bug.cgi?id=CVE-2015-0285 + ("CVE-2015-0285 openssl: handshake with unseeded PRNG") + - https://bugzilla.redhat.com/show_bug.cgi?id=CVE-2015-9019 + ("CVE-2015-9019 libxslt: math.random() in xslt uses unseeded + randomness") + - https://cwe.mitre.org/data/definitions/336.html + ("CWE-336: Same Seed in Pseudo-Random Number Generator (PRNG)") + +The first revision [1] of this patch updated the seed based on the +output of get_timer(), similar to [4]. + +There are two problems with this approach: + - get_timer() has a poor _ms_ resolution + - when gen_rand_uuid() is called in a loop, get_timer() returns the + same result, leading to the same seed being passed to srand(), + leading to the same uuid being generated for several partitions + with different names + +The above drawbacks have been addressed in the second version [2]. +In its third revision (current), the patch reworded the description +and summary line to emphasize it is a *fix* rather than an improvement. + +Testing [3] consisted of running 'gpt write mmc 1 $partitions' in a +loop on R-Car3 for several minutes, collecting 8844 randomly generated +UUIDS. Two consecutive cold boots are concatenated in the log. +As a result, all uuid values are unique (scripted check). + +Thanks to Roman, who reported the issue and provided support in fixing. + +[1] https://patchwork.ozlabs.org/patch/1091802/ +[2] https://patchwork.ozlabs.org/patch/1092945/ +[3] https://gist.github.com/erosca/2820be9d554f76b982edd48474d0e7ca +[4] commit da384a9d7628 ("net: rename and refactor eth_rand_ethaddr() function") + +Reported-by: Roman Stratiienko <roman.stratiienko@globallogic.com> +Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> +Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> +--- + lib/uuid.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/lib/uuid.c b/lib/uuid.c +index fa20ee39fc32..2d4d6ef7e461 100644 +--- a/lib/uuid.c ++++ b/lib/uuid.c +@@ -238,6 +238,8 @@ void gen_rand_uuid(unsigned char *uuid_bin) + unsigned int *ptr = (unsigned int *)&uuid; + int i; + ++ srand(get_ticks() + rand()); ++ + /* Set all fields randomly */ + for (i = 0; i < sizeof(struct uuid) / sizeof(*ptr); i++) + *(ptr + i) = cpu_to_be32(rand()); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13104/0001-CVE-2019-13104-ext4-check-for-underflow-in-ext4fs_re.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13104/0001-CVE-2019-13104-ext4-check-for-underflow-in-ext4fs_re.patch new file mode 100644 index 000000000..fbb9098fe --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13104/0001-CVE-2019-13104-ext4-check-for-underflow-in-ext4fs_re.patch @@ -0,0 +1,41 @@ +From 878269dbe74229005dd7f27aca66c554e31dad8e Mon Sep 17 00:00:00 2001 +From: Paul Emge <paulemge@forallsecure.com> +Date: Mon, 8 Jul 2019 16:37:05 -0700 +Subject: [PATCH] CVE-2019-13104: ext4: check for underflow in ext4fs_read_file + +in ext4fs_read_file, it is possible for a broken/malicious file +system to cause a memcpy of a negative number of bytes, which +overflows all memory. This patch fixes the issue by checking for +a negative length. + +Signed-off-by: Paul Emge <paulemge@forallsecure.com> +--- + fs/ext4/ext4fs.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c +index 85dc122f3003..e2b740cac405 100644 +--- a/fs/ext4/ext4fs.c ++++ b/fs/ext4/ext4fs.c +@@ -66,13 +66,15 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + + ext_cache_init(&cache); + +- if (blocksize <= 0) +- return -1; +- + /* Adjust len so it we can't read past the end of the file. */ + if (len + pos > filesize) + len = (filesize - pos); + ++ if (blocksize <= 0 || len <= 0) { ++ ext_cache_fini(&cache); ++ return -1; ++ } ++ + blockcnt = lldiv(((len + pos) + blocksize - 1), blocksize); + + for (i = lldiv(pos, blocksize); i < blockcnt; i++) { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0001-fs-ext4-cache-extent-data.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0001-fs-ext4-cache-extent-data.patch new file mode 100644 index 000000000..4daf1649e --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0001-fs-ext4-cache-extent-data.patch @@ -0,0 +1,409 @@ +From c7422737dc7c2ecd7c2118540fbc0dad48affaf5 Mon Sep 17 00:00:00 2001 +From: Stephen Warren <swarren@nvidia.com> +Date: Wed, 30 Jan 2019 12:58:05 -0700 +Subject: [PATCH] fs: ext4: cache extent data + +When a file contains extents, U-Boot currently reads extent-related data +for each block in the file, even if that data is located in the same +block each time. This significantly slows down loading of files that use +extents. Implement a very dumb cache to prevent repeatedly reading the +same block. Files with extents now load as fast as files without. + +Note: There are many cases where read_allocated_block() is called. This +patch only addresses one of those places; all others still read redundant +data in any case they did before. This is a minimal patch to fix the +load command; other cases aren't fixed. + +Signed-off-by: Stephen Warren <swarren@nvidia.com> +--- + fs/ext4/ext4_common.c | 45 ++++++++++++++++++++++--------------- + fs/ext4/ext4_journal.c | 22 +++++++++--------- + fs/ext4/ext4_write.c | 6 ++--- + fs/ext4/ext4fs.c | 51 +++++++++++++++++++++++++++++++++++++----- + include/ext4fs.h | 12 +++++++++- + 5 files changed, 99 insertions(+), 37 deletions(-) + +diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c +index 67e2471bd388..29308e3b4474 100644 +--- a/fs/ext4/ext4_common.c ++++ b/fs/ext4/ext4_common.c +@@ -510,7 +510,8 @@ restart: + + restart_read: + /* read the block no allocated to a file */ +- first_block_no_of_root = read_allocated_block(g_parent_inode, blk_idx); ++ first_block_no_of_root = read_allocated_block(g_parent_inode, blk_idx, ++ NULL); + if (first_block_no_of_root <= 0) + goto fail; + +@@ -646,7 +647,7 @@ static int search_dir(struct ext2_inode *parent_inode, char *dirname) + + /* get the block no allocated to a file */ + for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) { +- blknr = read_allocated_block(parent_inode, blk_idx); ++ blknr = read_allocated_block(parent_inode, blk_idx, NULL); + if (blknr <= 0) + goto fail; + +@@ -943,7 +944,7 @@ int ext4fs_filename_unlink(char *filename) + + /* read the block no allocated to a file */ + for (blk_idx = 0; blk_idx < directory_blocks; blk_idx++) { +- blknr = read_allocated_block(g_parent_inode, blk_idx); ++ blknr = read_allocated_block(g_parent_inode, blk_idx, NULL); + if (blknr <= 0) + break; + inodeno = unlink_filename(filename, blknr); +@@ -1522,7 +1523,7 @@ void ext4fs_allocate_blocks(struct ext2_inode *file_inode, + #endif + + static struct ext4_extent_header *ext4fs_get_extent_block +- (struct ext2_data *data, char *buf, ++ (struct ext2_data *data, struct ext_block_cache *cache, + struct ext4_extent_header *ext_block, + uint32_t fileblock, int log2_blksz) + { +@@ -1551,12 +1552,10 @@ static struct ext4_extent_header *ext4fs_get_extent_block + + block = le16_to_cpu(index[i].ei_leaf_hi); + block = (block << 32) + le32_to_cpu(index[i].ei_leaf_lo); +- +- if (ext4fs_devread((lbaint_t)block << log2_blksz, 0, blksz, +- buf)) +- ext_block = (struct ext4_extent_header *)buf; +- else ++ block <<= log2_blksz; ++ if (!ext_cache_read(cache, (lbaint_t)block, blksz)) + return NULL; ++ ext_block = (struct ext4_extent_header *)cache->buf; + } + } + +@@ -1613,7 +1612,8 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode) + return 1; + } + +-long int read_allocated_block(struct ext2_inode *inode, int fileblock) ++long int read_allocated_block(struct ext2_inode *inode, int fileblock, ++ struct ext_block_cache *cache) + { + long int blknr; + int blksz; +@@ -1630,20 +1630,26 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock) + + if (le32_to_cpu(inode->flags) & EXT4_EXTENTS_FL) { + long int startblock, endblock; +- char *buf = zalloc(blksz); +- if (!buf) +- return -ENOMEM; ++ struct ext_block_cache *c, cd; + struct ext4_extent_header *ext_block; + struct ext4_extent *extent; + int i; ++ ++ if (cache) { ++ c = cache; ++ } else { ++ c = &cd; ++ ext_cache_init(c); ++ } + ext_block = +- ext4fs_get_extent_block(ext4fs_root, buf, ++ ext4fs_get_extent_block(ext4fs_root, c, + (struct ext4_extent_header *) + inode->b.blocks.dir_blocks, + fileblock, log2_blksz); + if (!ext_block) { + printf("invalid extent block\n"); +- free(buf); ++ if (!cache) ++ ext_cache_fini(c); + return -EINVAL; + } + +@@ -1655,19 +1661,22 @@ long int read_allocated_block(struct ext2_inode *inode, int fileblock) + + if (startblock > fileblock) { + /* Sparse file */ +- free(buf); ++ if (!cache) ++ ext_cache_fini(c); + return 0; + + } else if (fileblock < endblock) { + start = le16_to_cpu(extent[i].ee_start_hi); + start = (start << 32) + + le32_to_cpu(extent[i].ee_start_lo); +- free(buf); ++ if (!cache) ++ ext_cache_fini(c); + return (fileblock - startblock) + start; + } + } + +- free(buf); ++ if (!cache) ++ ext_cache_fini(c); + return 0; + } + +diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c +index 148593da7fef..6adbab93a68f 100644 +--- a/fs/ext4/ext4_journal.c ++++ b/fs/ext4/ext4_journal.c +@@ -347,7 +347,7 @@ void recover_transaction(int prev_desc_logical_no) + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, + (struct ext2_inode *)&inode_journal); + blknr = read_allocated_block((struct ext2_inode *) +- &inode_journal, i); ++ &inode_journal, i, NULL); + ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0, fs->blksz, + temp_buff); + p_jdb = (char *)temp_buff; +@@ -372,7 +372,7 @@ void recover_transaction(int prev_desc_logical_no) + be32_to_cpu(jdb->h_sequence)) == 0) + continue; + } +- blknr = read_allocated_block(&inode_journal, i); ++ blknr = read_allocated_block(&inode_journal, i, NULL); + ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0, + fs->blksz, metadata_buff); + put_ext4((uint64_t)((uint64_t)be32_to_cpu(tag->block) * (uint64_t)fs->blksz), +@@ -419,7 +419,8 @@ int ext4fs_check_journal_state(int recovery_flag) + } + + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, &inode_journal); +- blknr = read_allocated_block(&inode_journal, EXT2_JOURNAL_SUPERBLOCK); ++ blknr = read_allocated_block(&inode_journal, EXT2_JOURNAL_SUPERBLOCK, ++ NULL); + ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0, fs->blksz, + temp_buff); + jsb = (struct journal_superblock_t *) temp_buff; +@@ -443,7 +444,7 @@ int ext4fs_check_journal_state(int recovery_flag) + + i = be32_to_cpu(jsb->s_first); + while (1) { +- blknr = read_allocated_block(&inode_journal, i); ++ blknr = read_allocated_block(&inode_journal, i, NULL); + memset(temp_buff1, '\0', fs->blksz); + ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, + 0, fs->blksz, temp_buff1); +@@ -537,7 +538,7 @@ end: + ext4_read_superblock((char *)fs->sb); + + blknr = read_allocated_block(&inode_journal, +- EXT2_JOURNAL_SUPERBLOCK); ++ EXT2_JOURNAL_SUPERBLOCK, NULL); + put_ext4((uint64_t) ((uint64_t)blknr * (uint64_t)fs->blksz), + (struct journal_superblock_t *)temp_buff, + (uint32_t) fs->blksz); +@@ -566,7 +567,7 @@ static void update_descriptor_block(long int blknr) + + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, &inode_journal); + jsb_blknr = read_allocated_block(&inode_journal, +- EXT2_JOURNAL_SUPERBLOCK); ++ EXT2_JOURNAL_SUPERBLOCK, NULL); + ext4fs_devread((lbaint_t)jsb_blknr * fs->sect_perblk, 0, fs->blksz, + temp_buff); + jsb = (struct journal_superblock_t *) temp_buff; +@@ -618,7 +619,7 @@ static void update_commit_block(long int blknr) + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, + &inode_journal); + jsb_blknr = read_allocated_block(&inode_journal, +- EXT2_JOURNAL_SUPERBLOCK); ++ EXT2_JOURNAL_SUPERBLOCK, NULL); + ext4fs_devread((lbaint_t)jsb_blknr * fs->sect_perblk, 0, fs->blksz, + temp_buff); + jsb = (struct journal_superblock_t *) temp_buff; +@@ -645,16 +646,17 @@ void ext4fs_update_journal(void) + long int blknr; + int i; + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, &inode_journal); +- blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++); ++ blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++, NULL); + update_descriptor_block(blknr); + for (i = 0; i < MAX_JOURNAL_ENTRIES; i++) { + if (journal_ptr[i]->blknr == -1) + break; +- blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++); ++ blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++, ++ NULL); + put_ext4((uint64_t) ((uint64_t)blknr * (uint64_t)fs->blksz), + journal_ptr[i]->buf, fs->blksz); + } +- blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++); ++ blknr = read_allocated_block(&inode_journal, jrnl_blk_idx++, NULL); + update_commit_block(blknr); + printf("update journal finished\n"); + } +diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c +index 4eb77c327ef3..95ffa3dfad51 100644 +--- a/fs/ext4/ext4_write.c ++++ b/fs/ext4/ext4_write.c +@@ -479,7 +479,7 @@ static int ext4fs_delete_file(int inodeno) + + /* release data blocks */ + for (i = 0; i < no_blocks; i++) { +- blknr = read_allocated_block(&inode, i); ++ blknr = read_allocated_block(&inode, i, NULL); + if (blknr == 0) + continue; + if (blknr < 0) +@@ -695,7 +695,7 @@ void ext4fs_deinit(void) + ext4fs_read_inode(ext4fs_root, EXT2_JOURNAL_INO, + &inode_journal); + blknr = read_allocated_block(&inode_journal, +- EXT2_JOURNAL_SUPERBLOCK); ++ EXT2_JOURNAL_SUPERBLOCK, NULL); + ext4fs_devread((lbaint_t)blknr * fs->sect_perblk, 0, fs->blksz, + temp_buff); + jsb = (struct journal_superblock_t *)temp_buff; +@@ -776,7 +776,7 @@ static int ext4fs_write_file(struct ext2_inode *file_inode, + long int blknr; + int blockend = fs->blksz; + int skipfirst = 0; +- blknr = read_allocated_block(file_inode, i); ++ blknr = read_allocated_block(file_inode, i, NULL); + if (blknr <= 0) + return -1; + +diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c +index 2a28031d14ca..26db677a1f17 100644 +--- a/fs/ext4/ext4fs.c ++++ b/fs/ext4/ext4fs.c +@@ -62,6 +62,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + lbaint_t delayed_next = 0; + char *delayed_buf = NULL; + short status; ++ struct ext_block_cache cache; ++ ++ ext_cache_init(&cache); + + if (blocksize <= 0) + return -1; +@@ -77,9 +80,11 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + int blockoff = pos - (blocksize * i); + int blockend = blocksize; + int skipfirst = 0; +- blknr = read_allocated_block(&(node->inode), i); +- if (blknr < 0) ++ blknr = read_allocated_block(&node->inode, i, &cache); ++ if (blknr < 0) { ++ ext_cache_fini(&cache); + return -1; ++ } + + blknr = blknr << log2_fs_blocksize; + +@@ -109,8 +114,10 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + delayed_skipfirst, + delayed_extent, + delayed_buf); +- if (status == 0) ++ if (status == 0) { ++ ext_cache_fini(&cache); + return -1; ++ } + previous_block_number = blknr; + delayed_start = blknr; + delayed_extent = blockend; +@@ -136,8 +143,10 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + delayed_skipfirst, + delayed_extent, + delayed_buf); +- if (status == 0) ++ if (status == 0) { ++ ext_cache_fini(&cache); + return -1; ++ } + previous_block_number = -1; + } + /* Zero no more than `len' bytes. */ +@@ -153,12 +162,15 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + status = ext4fs_devread(delayed_start, + delayed_skipfirst, delayed_extent, + delayed_buf); +- if (status == 0) ++ if (status == 0) { ++ ext_cache_fini(&cache); + return -1; ++ } + previous_block_number = -1; + } + + *actread = len; ++ ext_cache_fini(&cache); + return 0; + } + +@@ -252,3 +264,32 @@ int ext4fs_uuid(char *uuid_str) + return -ENOSYS; + #endif + } ++ ++void ext_cache_init(struct ext_block_cache *cache) ++{ ++ memset(cache, 0, sizeof(*cache)); ++} ++ ++void ext_cache_fini(struct ext_block_cache *cache) ++{ ++ free(cache->buf); ++ ext_cache_init(cache); ++} ++ ++int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) ++{ ++ /* This could be more lenient, but this is simple and enough for now */ ++ if (cache->buf && cache->block == block && cache->size == size) ++ return 1; ++ ext_cache_fini(cache); ++ cache->buf = malloc(size); ++ if (!cache->buf) ++ return 0; ++ if (!ext4fs_devread(block, 0, size, cache->buf)) { ++ free(cache->buf); ++ return 0; ++ } ++ cache->block = block; ++ cache->size = size; ++ return 1; ++} +diff --git a/include/ext4fs.h b/include/ext4fs.h +index 24210113411a..4b5de6e7b636 100644 +--- a/include/ext4fs.h ++++ b/include/ext4fs.h +@@ -117,6 +117,12 @@ struct ext_filesystem { + struct blk_desc *dev_desc; + }; + ++struct ext_block_cache { ++ char *buf; ++ lbaint_t block; ++ int size; ++}; ++ + extern struct ext2_data *ext4fs_root; + extern struct ext2fs_node *ext4fs_file; + +@@ -146,11 +152,15 @@ int ext4fs_size(const char *filename, loff_t *size); + void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot); + int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf); + void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info); +-long int read_allocated_block(struct ext2_inode *inode, int fileblock); ++long int read_allocated_block(struct ext2_inode *inode, int fileblock, ++ struct ext_block_cache *cache); + int ext4fs_probe(struct blk_desc *fs_dev_desc, + disk_partition_t *fs_partition); + int ext4_read_file(const char *filename, void *buf, loff_t offset, loff_t len, + loff_t *actread); + int ext4_read_superblock(char *buffer); + int ext4fs_uuid(char *uuid_str); ++void ext_cache_init(struct ext_block_cache *cache); ++void ext_cache_fini(struct ext_block_cache *cache); ++int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size); + #endif +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0002-CVE-2019-13105-ext4-fix-double-free-in-ext4_cache_re.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0002-CVE-2019-13105-ext4-fix-double-free-in-ext4_cache_re.patch new file mode 100644 index 000000000..f7ccb41f4 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13105/0002-CVE-2019-13105-ext4-fix-double-free-in-ext4_cache_re.patch @@ -0,0 +1,30 @@ +From 6e5a79de658cb1c8012c86e0837379aa6eabd024 Mon Sep 17 00:00:00 2001 +From: Paul Emge <paulemge@forallsecure.com> +Date: Mon, 8 Jul 2019 16:37:04 -0700 +Subject: [PATCH] CVE-2019-13105: ext4: fix double-free in ext4_cache_read + +ext_cache_read doesn't null cache->buf, after freeing, which results +in a later function double-freeing it. This patch fixes +ext_cache_read to call ext_cache_fini instead of free. + +Signed-off-by: Paul Emge <paulemge@forallsecure.com> +--- + fs/ext4/ext4fs.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c +index 26db677a1f17..85dc122f3003 100644 +--- a/fs/ext4/ext4fs.c ++++ b/fs/ext4/ext4fs.c +@@ -286,7 +286,7 @@ int ext_cache_read(struct ext_block_cache *cache, lbaint_t block, int size) + if (!cache->buf) + return 0; + if (!ext4fs_devread(block, 0, size, cache->buf)) { +- free(cache->buf); ++ ext_cache_fini(cache); + return 0; + } + cache->block = block; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13106/0001-CVE-2019-13106-ext4-fix-out-of-bounds-memset.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13106/0001-CVE-2019-13106-ext4-fix-out-of-bounds-memset.patch new file mode 100644 index 000000000..9bd0b27a8 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2019-13106/0001-CVE-2019-13106-ext4-fix-out-of-bounds-memset.patch @@ -0,0 +1,49 @@ +From e205896c5383c938274262524adceb2775fb03ba Mon Sep 17 00:00:00 2001 +From: Paul Emge <paulemge@forallsecure.com> +Date: Mon, 8 Jul 2019 16:37:07 -0700 +Subject: [PATCH] CVE-2019-13106: ext4: fix out-of-bounds memset + +In ext4fs_read_file in ext4fs.c, a memset can overwrite the bounds of +the destination memory region. This patch adds a check to disallow +this. + +Signed-off-by: Paul Emge <paulemge@forallsecure.com> +--- + fs/ext4/ext4fs.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c +index e2b740cac405..37b31d9f0fcc 100644 +--- a/fs/ext4/ext4fs.c ++++ b/fs/ext4/ext4fs.c +@@ -61,6 +61,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + lbaint_t delayed_skipfirst = 0; + lbaint_t delayed_next = 0; + char *delayed_buf = NULL; ++ char *start_buf = buf; + short status; + struct ext_block_cache cache; + +@@ -139,6 +140,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + } + } else { + int n; ++ int n_left; + if (previous_block_number != -1) { + /* spill */ + status = ext4fs_devread(delayed_start, +@@ -153,8 +155,9 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + } + /* Zero no more than `len' bytes. */ + n = blocksize - skipfirst; +- if (n > len) +- n = len; ++ n_left = len - ( buf - start_buf ); ++ if (n > n_left) ++ n = n_left; + memset(buf, 0, n); + } + buf += blocksize - skipfirst; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch new file mode 100644 index 000000000..8c922f5e8 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0001-image-Correct-comment-for-fit_conf_get_node.patch @@ -0,0 +1,77 @@ +From 211549e16fa6601f9783e6e3802db9aaa3f4922e Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Correct comment for fit_conf_get_node() + +This should mention that conf_uname can be NULL and should be in the +header file. Fix this. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + common/image-fit.c | 18 ------------------ + include/image.h | 19 +++++++++++++++++++ + 2 files changed, 19 insertions(+), 18 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index ac901e131ca1..06f3358c931c 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -1612,24 +1612,6 @@ int fit_conf_find_compat(const void *fit, const void *fdt) + return best_match_offset; + } + +-/** +- * fit_conf_get_node - get node offset for configuration of a given unit name +- * @fit: pointer to the FIT format image header +- * @conf_uname: configuration node unit name +- * +- * fit_conf_get_node() finds a configuration (within the '/configurations' +- * parent node) of a provided unit name. If configuration is found its node +- * offset is returned to the caller. +- * +- * When NULL is provided in second argument fit_conf_get_node() will search +- * for a default configuration node instead. Default configuration node unit +- * name is retrieved from FIT_DEFAULT_PROP property of the '/configurations' +- * node. +- * +- * returns: +- * configuration node offset when found (>=0) +- * negative number on failure (FDT_ERR_* code) +- */ + int fit_conf_get_node(const void *fit, const char *conf_uname) + { + int noffset, confs_noffset; +diff --git a/include/image.h b/include/image.h +index 765ffecee0a7..4b764d11c70d 100644 +--- a/include/image.h ++++ b/include/image.h +@@ -1045,6 +1045,25 @@ int fit_image_check_comp(const void *fit, int noffset, uint8_t comp); + int fit_check_format(const void *fit); + + int fit_conf_find_compat(const void *fit, const void *fdt); ++ ++/** ++ * fit_conf_get_node - get node offset for configuration of a given unit name ++ * @fit: pointer to the FIT format image header ++ * @conf_uname: configuration node unit name (NULL to use default) ++ * ++ * fit_conf_get_node() finds a configuration (within the '/configurations' ++ * parent node) of a provided unit name. If configuration is found its node ++ * offset is returned to the caller. ++ * ++ * When NULL is provided in second argument fit_conf_get_node() will search ++ * for a default configuration node instead. Default configuration node unit ++ * name is retrieved from FIT_DEFAULT_PROP property of the '/configurations' ++ * node. ++ * ++ * returns: ++ * configuration node offset when found (>=0) ++ * negative number on failure (FDT_ERR_* code) ++ */ + int fit_conf_get_node(const void *fit, const char *conf_uname); + + /** +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch new file mode 100644 index 000000000..9a6b64b06 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0008-image-Load-the-correct-configuration-in-fit_check_si.patch @@ -0,0 +1,51 @@ +From 0b274994cc0fe1631c27837a4e4c546b37d7dc77 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Load the correct configuration in fit_check_sign + +At present bootm_host_load_images() is passed the configuration that has +been verified, but ignores it and just uses the default configuration. +This may not be the same. + +Update this function to use the selected configuration. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + common/bootm.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/common/bootm.c b/common/bootm.c +index 3adbceaa38e3..29091be0a1c8 100644 +--- a/common/bootm.c ++++ b/common/bootm.c +@@ -929,7 +929,8 @@ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) + memmove(to, from, len); + } + +-static int bootm_host_load_image(const void *fit, int req_image_type) ++static int bootm_host_load_image(const void *fit, int req_image_type, ++ int cfg_noffset) + { + const char *fit_uname_config = NULL; + ulong data, len; +@@ -941,6 +942,7 @@ static int bootm_host_load_image(const void *fit, int req_image_type) + void *load_buf; + int ret; + ++ fit_uname_config = fdt_get_name(fit, cfg_noffset, NULL); + memset(&images, '\0', sizeof(images)); + images.verify = 1; + noffset = fit_image_load(&images, (ulong)fit, +@@ -985,7 +987,7 @@ int bootm_host_load_images(const void *fit, int cfg_noffset) + for (i = 0; i < ARRAY_SIZE(image_types); i++) { + int ret; + +- ret = bootm_host_load_image(fit, image_types[i]); ++ ret = bootm_host_load_image(fit, image_types[i], cfg_noffset); + if (!err && ret && ret != -ENOENT) + err = ret; + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch new file mode 100644 index 000000000..3094e7ecc --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch @@ -0,0 +1,101 @@ +From 77b652268cacc0f114ba9e92b79e7ff372ec62ee Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] fit_check_sign: Allow selecting the configuration to verify + +This tool always verifies the default configuration. It is useful to be +able to verify a specific one. Add a command-line flag for this and plumb +the logic through. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + tools/fdt_host.h | 3 ++- + tools/fit_check_sign.c | 8 ++++++-- + tools/image-host.c | 6 ++++-- + 3 files changed, 12 insertions(+), 5 deletions(-) + +diff --git a/tools/fdt_host.h b/tools/fdt_host.h +index 99b009b22109..15c07c7a96ed 100644 +--- a/tools/fdt_host.h ++++ b/tools/fdt_host.h +@@ -27,6 +27,7 @@ + */ + int fdt_remove_unused_strings(const void *old, void *new); + +-int fit_check_sign(const void *working_fdt, const void *key); ++int fit_check_sign(const void *fit, const void *key, ++ const char *fit_uname_config); + + #endif /* __FDT_HOST_H__ */ +diff --git a/tools/fit_check_sign.c b/tools/fit_check_sign.c +index 62adc751cbce..303e878ddb4d 100644 +--- a/tools/fit_check_sign.c ++++ b/tools/fit_check_sign.c +@@ -41,6 +41,7 @@ int main(int argc, char **argv) + void *fit_blob; + char *fdtfile = NULL; + char *keyfile = NULL; ++ char *config_name = NULL; + char cmdname[256]; + int ret; + void *key_blob; +@@ -48,7 +49,7 @@ int main(int argc, char **argv) + + strncpy(cmdname, *argv, sizeof(cmdname) - 1); + cmdname[sizeof(cmdname) - 1] = '\0'; +- while ((c = getopt(argc, argv, "f:k:")) != -1) ++ while ((c = getopt(argc, argv, "f:k:c:")) != -1) + switch (c) { + case 'f': + fdtfile = optarg; +@@ -56,6 +57,9 @@ int main(int argc, char **argv) + case 'k': + keyfile = optarg; + break; ++ case 'c': ++ config_name = optarg; ++ break; + default: + usage(cmdname); + break; +@@ -78,7 +82,7 @@ int main(int argc, char **argv) + return EXIT_FAILURE; + + image_set_host_blob(key_blob); +- ret = fit_check_sign(fit_blob, key_blob); ++ ret = fit_check_sign(fit_blob, key_blob, config_name); + if (!ret) { + ret = EXIT_SUCCESS; + fprintf(stderr, "Signature check OK\n"); +diff --git a/tools/image-host.c b/tools/image-host.c +index 8e94ee8f3e31..28474bc7fc8b 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -734,12 +734,13 @@ int fit_add_verification_data(const char *keydir, void *keydest, void *fit, + } + + #ifdef CONFIG_FIT_SIGNATURE +-int fit_check_sign(const void *fit, const void *key) ++int fit_check_sign(const void *fit, const void *key, ++ const char *fit_uname_config) + { + int cfg_noffset; + int ret; + +- cfg_noffset = fit_conf_get_node(fit, NULL); ++ cfg_noffset = fit_conf_get_node(fit, fit_uname_config); + if (!cfg_noffset) + return -1; + +@@ -748,6 +749,7 @@ int fit_check_sign(const void *fit, const void *key) + ret = fit_config_verify(fit, cfg_noffset); + if (ret) + return ret; ++ printf("Verified OK, loading images\n"); + ret = bootm_host_load_images(fit, cfg_noffset); + + return ret; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch new file mode 100644 index 000000000..6cdaaa656 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2020-10648/0012-image-Use-constants-for-required-and-key-name-hint.patch @@ -0,0 +1,152 @@ +From b7249b8a036200cd461d0676a330b865f7309231 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Tue, 31 Mar 2020 18:43:55 +0200 +Subject: [PATCH] image: Use constants for 'required' and 'key-name-hint' + +These are used in multiple places so update them to use a shared #define. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> +--- + common/image-fit.c | 6 +++--- + common/image-sig.c | 8 +++++--- + include/image.h | 4 +++- + lib/rsa/rsa-sign.c | 6 +++--- + tools/image-host.c | 6 +++--- + 5 files changed, 17 insertions(+), 13 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index 58923cbc9371..b2f41ba408be 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -166,7 +166,7 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + int value_len; + char *algo; + const char *padding; +- int required; ++ bool required; + int ret, i; + + debug("%s %s node: '%s'\n", p, type, +@@ -177,8 +177,8 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p, + return; + } + printf("%s", algo); +- keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); +- required = fdt_getprop(fit, noffset, "required", NULL) != NULL; ++ keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); ++ required = fdt_getprop(fit, noffset, FIT_KEY_REQUIRED, NULL) != NULL; + if (keyname) + printf(":%s", keyname); + if (required) +diff --git a/common/image-sig.c b/common/image-sig.c +index 4526c82acf75..e0987af4f5e8 100644 +--- a/common/image-sig.c ++++ b/common/image-sig.c +@@ -200,7 +200,7 @@ static int fit_image_setup_verify(struct image_sign_info *info, + padding_name = RSA_DEFAULT_PADDING_NAME; + + memset(info, '\0', sizeof(*info)); +- info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info->keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + info->fit = (void *)fit; + info->node_offset = noffset; + info->name = algo_name; +@@ -311,7 +311,8 @@ int fit_image_verify_required_sigs(const void *fit, int image_noffset, + const char *required; + int ret; + +- required = fdt_getprop(sig_blob, noffset, "required", NULL); ++ required = fdt_getprop(sig_blob, noffset, FIT_KEY_REQUIRED, ++ NULL); + if (!required || strcmp(required, "image")) + continue; + ret = fit_image_verify_sig(fit, image_noffset, data, size, +@@ -528,7 +529,8 @@ int fit_config_verify_required_sigs(const void *fit, int conf_noffset, + const char *required; + int ret; + +- required = fdt_getprop(sig_blob, noffset, "required", NULL); ++ required = fdt_getprop(sig_blob, noffset, FIT_KEY_REQUIRED, ++ NULL); + if (!required || strcmp(required, "conf")) + continue; + ret = fit_config_verify_sig(fit, conf_noffset, sig_blob, +diff --git a/include/image.h b/include/image.h +index 4b764d11c70d..afb9bea17c34 100644 +--- a/include/image.h ++++ b/include/image.h +@@ -903,12 +903,14 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, + #define FIT_IMAGES_PATH "/images" + #define FIT_CONFS_PATH "/configurations" + +-/* hash/signature node */ ++/* hash/signature/key node */ + #define FIT_HASH_NODENAME "hash" + #define FIT_ALGO_PROP "algo" + #define FIT_VALUE_PROP "value" + #define FIT_IGNORE_PROP "uboot-ignore" + #define FIT_SIG_NODENAME "signature" ++#define FIT_KEY_REQUIRED "required" ++#define FIT_KEY_HINT "key-name-hint" + + /* image node */ + #define FIT_DATA_PROP "data" +diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c +index fb5e07b56d8a..5f0f27d2f6f9 100644 +--- a/lib/rsa/rsa-sign.c ++++ b/lib/rsa/rsa-sign.c +@@ -773,8 +773,8 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest) + } + + if (!ret) { +- ret = fdt_setprop_string(keydest, node, "key-name-hint", +- info->keyname); ++ ret = fdt_setprop_string(keydest, node, FIT_KEY_HINT, ++ info->keyname); + } + if (!ret) + ret = fdt_setprop_u32(keydest, node, "rsa,num-bits", bits); +@@ -796,7 +796,7 @@ int rsa_add_verify_data(struct image_sign_info *info, void *keydest) + info->name); + } + if (!ret && info->require_keys) { +- ret = fdt_setprop_string(keydest, node, "required", ++ ret = fdt_setprop_string(keydest, node, FIT_KEY_REQUIRED, + info->require_keys); + } + done: +diff --git a/tools/image-host.c b/tools/image-host.c +index 28474bc7fc8b..3396d8234e52 100644 +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -170,7 +170,7 @@ static int fit_image_setup_sig(struct image_sign_info *info, + + memset(info, '\0', sizeof(*info)); + info->keydir = keydir; +- info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info->keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + info->fit = fit; + info->node_offset = noffset; + info->name = strdup(algo_name); +@@ -249,7 +249,7 @@ static int fit_image_process_sig(const char *keydir, void *keydest, + free(value); + + /* Get keyname again, as FDT has changed and invalidated our pointer */ +- info.keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info.keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + + /* + * Write the public key into the supplied FDT file; this might fail +@@ -630,7 +630,7 @@ static int fit_config_process_sig(const char *keydir, void *keydest, + free(region_prop); + + /* Get keyname again, as FDT has changed and invalidated our pointer */ +- info.keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); ++ info.keyname = fdt_getprop(fit, noffset, FIT_KEY_HINT, NULL); + + /* Write the public key into the supplied FDT file */ + if (keydest) { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0001-image-Adjust-the-workings-of-fit_check_format.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0001-image-Adjust-the-workings-of-fit_check_format.patch new file mode 100644 index 000000000..97814024f --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0001-image-Adjust-the-workings-of-fit_check_format.patch @@ -0,0 +1,397 @@ +From d676a491fb465f11271c47185f1eb3e479c5c738 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Mon, 15 Feb 2021 17:08:09 -0700 +Subject: [PATCH] image: Adjust the workings of fit_check_format() + +At present this function does not accept a size for the FIT. This means +that it must be read from the FIT itself, introducing potential security +risk. Update the function to include a size parameter, which can be +invalid, in which case fit_check_format() calculates it. + +For now no callers pass the size, but this can be updated later. + +Also adjust the return value to an error code so that all the different +types of problems can be distinguished by the user. + +Signed-off-by: Simon Glass <sjg@chromium.org> +Reported-by: Bruce Monroe <bruce.monroe@intel.com> +Reported-by: Arie Haenel <arie.haenel@intel.com> +Reported-by: Julien Lenoir <julien.lenoir@intel.com> +--- + arch/arm/cpu/armv8/sec_firmware.c | 2 +- + cmd/bootm.c | 6 ++-- + cmd/disk.c | 2 +- + cmd/fdc.c | 2 +- + cmd/fpga.c | 2 +- + cmd/nand.c | 2 +- + cmd/source.c | 2 +- + cmd/ximg.c | 2 +- + common/image-fdt.c | 2 +- + common/image-fit.c | 45 +++++++++++++----------------- + common/splash_source.c | 4 +-- + common/update.c | 2 +- + drivers/net/fsl-mc/mc.c | 2 +- + drivers/net/pfe_eth/pfe_firmware.c | 2 +- + include/image.h | 21 +++++++++++++- + tools/fit_common.c | 3 +- + tools/fit_image.c | 2 +- + tools/mkimage.h | 2 ++ + 18 files changed, 61 insertions(+), 44 deletions(-) + +diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c +index 8dc0ac92668f..3c5249541222 100644 +--- a/arch/arm/cpu/armv8/sec_firmware.c ++++ b/arch/arm/cpu/armv8/sec_firmware.c +@@ -310,7 +310,7 @@ __weak bool sec_firmware_is_valid(const void *sec_firmware_img) + return false; + } + +- if (!fit_check_format(sec_firmware_img)) { ++ if (fit_check_format(sec_firmware_img, IMAGE_SIZE_INVAL)) { + printf("SEC Firmware: Bad firmware image (bad FIT header)\n"); + return false; + } +diff --git a/cmd/bootm.c b/cmd/bootm.c +index c3a063474ac6..1d6ec0d4cacc 100644 +--- a/cmd/bootm.c ++++ b/cmd/bootm.c +@@ -282,7 +282,7 @@ static int image_info(ulong addr) + case IMAGE_FORMAT_FIT: + puts(" FIT image found\n"); + +- if (!fit_check_format(hdr)) { ++ if (fit_check_format(hdr, IMAGE_SIZE_INVAL)) { + puts("Bad FIT image format!\n"); + return 1; + } +@@ -355,7 +355,7 @@ static int do_imls_nor(void) + #endif + #if defined(CONFIG_FIT) + case IMAGE_FORMAT_FIT: +- if (!fit_check_format(hdr)) ++ if (fit_check_format(hdr), IMAGE_SIZE_INVAL) + goto next_sector; + + printf("FIT Image at %08lX:\n", (ulong)hdr); +@@ -435,7 +435,7 @@ static int nand_imls_fitimage(struct mtd_info *mtd, int nand_dev, loff_t off, + return ret; + } + +- if (!fit_check_format(imgdata)) { ++ if (fit_check_format(imgdata), IMAGE_SIZE_INVAL) { + free(imgdata); + return 0; + } +diff --git a/cmd/disk.c b/cmd/disk.c +index dcc36a6c2cb7..294fc111023a 100644 +--- a/cmd/disk.c ++++ b/cmd/disk.c +@@ -110,7 +110,7 @@ int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc, + /* This cannot be done earlier, + * we need complete FIT image in RAM first */ + if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) { +- if (!fit_check_format(fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + bootstage_error(BOOTSTAGE_ID_IDE_FIT_READ); + puts("** Bad FIT image format\n"); + return 1; +diff --git a/cmd/fdc.c b/cmd/fdc.c +index 906845d4049b..37e557a1e7d7 100644 +--- a/cmd/fdc.c ++++ b/cmd/fdc.c +@@ -730,7 +730,7 @@ int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) + #if defined(CONFIG_FIT) + /* This cannot be done earlier, we need complete FIT image in RAM first */ + if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) { +- if (!fit_check_format (fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + puts ("** Bad FIT image format\n"); + return 1; + } +diff --git a/cmd/fpga.c b/cmd/fpga.c +index 88a8e3f3186b..9093026ff6ce 100644 +--- a/cmd/fpga.c ++++ b/cmd/fpga.c +@@ -325,7 +325,7 @@ static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc, + return CMD_RET_FAILURE; + } + +- if (!fit_check_format(fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + puts("Bad FIT image format\n"); + return CMD_RET_FAILURE; + } +diff --git a/cmd/nand.c b/cmd/nand.c +index a22945d144b3..536a11be9605 100644 +--- a/cmd/nand.c ++++ b/cmd/nand.c +@@ -911,7 +911,7 @@ static int nand_load_image(cmd_tbl_t *cmdtp, struct mtd_info *mtd, + #if defined(CONFIG_FIT) + /* This cannot be done earlier, we need complete FIT image in RAM first */ + if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) { +- if (!fit_check_format (fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + bootstage_error(BOOTSTAGE_ID_NAND_FIT_READ); + puts ("** Bad FIT image format\n"); + return 1; +diff --git a/cmd/source.c b/cmd/source.c +index 6d98a1cfd32b..897b97057d85 100644 +--- a/cmd/source.c ++++ b/cmd/source.c +@@ -106,7 +106,7 @@ source (ulong addr, const char *fit_uname) + #if defined(CONFIG_FIT) + case IMAGE_FORMAT_FIT: + fit_hdr = buf; +- if (!fit_check_format (fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + puts ("Bad FIT image format\n"); + return 1; + } +diff --git a/cmd/ximg.c b/cmd/ximg.c +index 8572a67a0063..51af741c827b 100644 +--- a/cmd/ximg.c ++++ b/cmd/ximg.c +@@ -131,7 +131,7 @@ do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) + "at %08lx ...\n", uname, addr); + + fit_hdr = (const void *)addr; +- if (!fit_check_format(fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + puts("Bad FIT image format\n"); + return 1; + } +diff --git a/common/image-fdt.c b/common/image-fdt.c +index 52ada56fc17b..3aa6c427362c 100644 +--- a/common/image-fdt.c ++++ b/common/image-fdt.c +@@ -394,7 +394,7 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch, + */ + #if CONFIG_IS_ENABLED(FIT) + /* check FDT blob vs FIT blob */ +- if (fit_check_format(buf)) { ++ if (!fit_check_format(buf, IMAGE_SIZE_INVAL)) { + ulong load, len; + + fdt_noffset = boot_get_fdt_fit(images, +diff --git a/common/image-fit.c b/common/image-fit.c +index 6894384b47b9..124d8895cffd 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -8,6 +8,8 @@ + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + */ + ++#define LOG_CATEGORY LOGC_BOOT ++ + #ifdef USE_HOSTCC + #include "mkimage.h" + #include <time.h> +@@ -1460,46 +1462,39 @@ int fit_image_check_comp(const void *fit, int noffset, uint8_t comp) + return (comp == image_comp); + } + +-/** +- * fit_check_format - sanity check FIT image format +- * @fit: pointer to the FIT format image header +- * +- * fit_check_format() runs a basic sanity FIT image verification. +- * Routine checks for mandatory properties, nodes, etc. +- * +- * returns: +- * 1, on success +- * 0, on failure +- */ +-int fit_check_format(const void *fit) ++int fit_check_format(const void *fit, ulong size) + { ++ int ret; ++ + /* A FIT image must be a valid FDT */ +- if (fdt_check_header(fit)) { +- debug("Wrong FIT format: not a flattened device tree\n"); +- return 0; ++ ret = fdt_check_header(fit); ++ if (ret) { ++ log_debug("Wrong FIT format: not a flattened device tree (err=%d)\n", ++ ret); ++ return -ENOEXEC; + } + + /* mandatory / node 'description' property */ +- if (fdt_getprop(fit, 0, FIT_DESC_PROP, NULL) == NULL) { +- debug("Wrong FIT format: no description\n"); +- return 0; ++ if (!fdt_getprop(fit, 0, FIT_DESC_PROP, NULL)) { ++ log_debug("Wrong FIT format: no description\n"); ++ return -ENOMSG; + } + + if (IMAGE_ENABLE_TIMESTAMP) { + /* mandatory / node 'timestamp' property */ +- if (fdt_getprop(fit, 0, FIT_TIMESTAMP_PROP, NULL) == NULL) { +- debug("Wrong FIT format: no timestamp\n"); +- return 0; ++ if (!fdt_getprop(fit, 0, FIT_TIMESTAMP_PROP, NULL)) { ++ log_debug("Wrong FIT format: no timestamp\n"); ++ return -ENODATA; + } + } + + /* mandatory subimages parent '/images' node */ + if (fdt_path_offset(fit, FIT_IMAGES_PATH) < 0) { +- debug("Wrong FIT format: no images parent node\n"); +- return 0; ++ log_debug("Wrong FIT format: no images parent node\n"); ++ return -ENOENT; + } + +- return 1; ++ return 0; + } + + +@@ -1813,7 +1808,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr, + printf("## Loading %s from FIT Image at %08lx ...\n", prop_name, addr); + + bootstage_mark(bootstage_id + BOOTSTAGE_SUB_FORMAT); +- if (!fit_check_format(fit)) { ++ if (fit_check_format(fit, IMAGE_SIZE_INVAL)) { + printf("Bad FIT %s image format!\n", prop_name); + bootstage_error(bootstage_id + BOOTSTAGE_SUB_FORMAT); + return -ENOEXEC; +diff --git a/common/splash_source.c b/common/splash_source.c +index 62763b9ebd56..d43dd0b2cd98 100644 +--- a/common/splash_source.c ++++ b/common/splash_source.c +@@ -329,8 +329,8 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr) + if (res < 0) + return res; + +- res = fit_check_format(fit_header); +- if (!res) { ++ res = fit_check_format(fit_header, IMAGE_SIZE_INVAL); ++ if (res) { + debug("Could not find valid FIT image\n"); + return -EINVAL; + } +diff --git a/common/update.c b/common/update.c +index f237ea53bb2a..42950edbbf22 100644 +--- a/common/update.c ++++ b/common/update.c +@@ -280,7 +280,7 @@ int update_tftp(ulong addr, char *interface, char *devstring) + got_update_file: + fit = (void *)addr; + +- if (!fit_check_format((void *)fit)) { ++ if (fit_check_format((void *)fit, IMAGE_SIZE_INVAL)) { + printf("Bad FIT format of the update file, aborting " + "auto-update\n"); + return 1; +diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c +index cc59b21f9f48..c4f35e7325b2 100644 +--- a/drivers/net/fsl-mc/mc.c ++++ b/drivers/net/fsl-mc/mc.c +@@ -130,7 +130,7 @@ int parse_mc_firmware_fit_image(u64 mc_fw_addr, + return -EINVAL; + } + +- if (!fit_check_format(fit_hdr)) { ++ if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) { + printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n"); + return -EINVAL; + } +diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c +index adb2d06010ce..7b930ecc2a02 100644 +--- a/drivers/net/pfe_eth/pfe_firmware.c ++++ b/drivers/net/pfe_eth/pfe_firmware.c +@@ -150,7 +150,7 @@ static int pfe_fit_check(void) + return ret; + } + +- if (!fit_check_format(pfe_fit_addr)) { ++ if (fit_check_format(pfe_fit_addr, IMAGE_SIZE_INVAL)) { + printf("PFE Firmware: Bad firmware image (bad FIT header)\n"); + ret = -1; + return ret; +diff --git a/include/image.h b/include/image.h +index ea4c05ca2586..b73f739c1585 100644 +--- a/include/image.h ++++ b/include/image.h +@@ -453,6 +453,9 @@ extern bootm_headers_t images; + #define uimage_to_cpu(x) be32_to_cpu(x) + #define cpu_to_uimage(x) cpu_to_be32(x) + ++/* An invalid size, meaning that the image size is not known */ ++#define IMAGE_SIZE_INVAL (-1UL) ++ + /* + * Translation table for entries of a specific type; used by + * get_table_entry_id() and get_table_entry_name(). +@@ -1062,7 +1065,23 @@ int fit_image_check_os(const void *fit, int noffset, uint8_t os); + int fit_image_check_arch(const void *fit, int noffset, uint8_t arch); + int fit_image_check_type(const void *fit, int noffset, uint8_t type); + int fit_image_check_comp(const void *fit, int noffset, uint8_t comp); +-int fit_check_format(const void *fit); ++ ++/** ++ * fit_check_format() - Check that the FIT is valid ++ * ++ * This performs various checks on the FIT to make sure it is suitable for ++ * use, looking for mandatory properties, nodes, etc. ++ * ++ * If FIT_FULL_CHECK is enabled, it also runs it through libfdt to make ++ * sure that there are no strange tags or broken nodes in the FIT. ++ * ++ * @fit: pointer to the FIT format image header ++ * @return 0 if OK, -ENOEXEC if not an FDT file, -EINVAL if the full FDT check ++ * failed (e.g. due to bad structure), -ENOMSG if the description is ++ * missing, -ENODATA if the timestamp is missing, -ENOENT if the /images ++ * path is missing ++ */ ++int fit_check_format(const void *fit, ulong size); + + int fit_conf_find_compat(const void *fit, const void *fdt); + +diff --git a/tools/fit_common.c b/tools/fit_common.c +index 9506390214ce..5e85ca221ac9 100644 +--- a/tools/fit_common.c ++++ b/tools/fit_common.c +@@ -26,7 +26,8 @@ + int fit_verify_header(unsigned char *ptr, int image_size, + struct image_tool_params *params) + { +- if (fdt_check_header(ptr) != EXIT_SUCCESS || !fit_check_format(ptr)) ++ if (fdt_check_header(ptr) != EXIT_SUCCESS || ++ fit_check_format(ptr, IMAGE_SIZE_INVAL)) + return EXIT_FAILURE; + + return EXIT_SUCCESS; +diff --git a/tools/fit_image.c b/tools/fit_image.c +index 3b867e06564e..21fc11c084c9 100644 +--- a/tools/fit_image.c ++++ b/tools/fit_image.c +@@ -764,7 +764,7 @@ static int fit_extract_contents(void *ptr, struct image_tool_params *params) + /* Indent string is defined in header image.h */ + p = IMAGE_INDENT_STRING; + +- if (!fit_check_format(fit)) { ++ if (fit_check_format(fit, IMAGE_SIZE_INVAL)) { + printf("Bad FIT image format\n"); + return -1; + } +diff --git a/tools/mkimage.h b/tools/mkimage.h +index 0254af59fbed..d32625f0a234 100644 +--- a/tools/mkimage.h ++++ b/tools/mkimage.h +@@ -29,6 +29,8 @@ + #define debug(fmt,args...) + #endif /* MKIMAGE_DEBUG */ + ++#define log_debug(fmt, args...) debug(fmt, ##args) ++ + static inline void *map_sysmem(ulong paddr, unsigned long len) + { + return (void *)(uintptr_t)paddr; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0002-image-Add-an-option-to-do-a-full-check-of-the-FIT.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0002-image-Add-an-option-to-do-a-full-check-of-the-FIT.patch new file mode 100644 index 000000000..51d858470 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27097/0002-image-Add-an-option-to-do-a-full-check-of-the-FIT.patch @@ -0,0 +1,212 @@ +From cf469ab0783da6783f89a8e31c213f19fdf38dba Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Mon, 15 Feb 2021 17:08:10 -0700 +Subject: [PATCH] image: Add an option to do a full check of the FIT + +Some strange modifications of the FIT can introduce security risks. Add an +option to check it thoroughly, using libfdt's fdt_check_full() function. + +Enable this by default if signature verification is enabled. + +CVE-2021-27097 + +Signed-off-by: Simon Glass <sjg@chromium.org> +Reported-by: Bruce Monroe <bruce.monroe@intel.com> +Reported-by: Arie Haenel <arie.haenel@intel.com> +Reported-by: Julien Lenoir <julien.lenoir@intel.com> +--- + Kconfig | 19 ++++++++++++ + common/image-fit.c | 20 ++++++++++++- + include/linux/libfdt.h | 2 ++ + lib/libfdt/fdt_ro.c | 65 ++++++++++++++++++++++++++++++++++++++++++ + 4 files changed, 105 insertions(+), 1 deletion(-) + +diff --git a/Kconfig b/Kconfig +index b62bcdbccf1e..0165ca33c5d1 100644 +--- a/Kconfig ++++ b/Kconfig +@@ -318,11 +318,21 @@ config FIT_ENABLE_SHA512_SUPPORT + SHA512 checksum is a 512-bit (64-byte) hash value used to check that + the image contents have not been corrupted. + ++config FIT_FULL_CHECK ++ bool "Do a full check of the FIT before using it" ++ default y ++ help ++ Enable this do a full check of the FIT to make sure it is valid. This ++ helps to protect against carefully crafted FITs which take advantage ++ of bugs or omissions in the code. This includes a bad structure, ++ multiple root nodes and the like. ++ + config FIT_SIGNATURE + bool "Enable signature verification of FIT uImages" + depends on DM + select HASH + select RSA ++ select FIT_FULL_CHECK + help + This option enables signature verification of FIT uImages, + using a hash signed and verified using RSA. If +@@ -398,6 +408,14 @@ config SPL_FIT_PRINT + help + Support printing the content of the fitImage in a verbose manner in SPL. + ++config SPL_FIT_FULL_CHECK ++ bool "Do a full check of the FIT before using it" ++ help ++ Enable this do a full check of the FIT to make sure it is valid. This ++ helps to protect against carefully crafted FITs which take advantage ++ of bugs or omissions in the code. This includes a bad structure, ++ multiple root nodes and the like. ++ + config SPL_FIT_SIGNATURE + bool "Enable signature verification of FIT firmware within SPL" + depends on SPL_DM +@@ -405,6 +423,7 @@ config SPL_FIT_SIGNATURE + select SPL_CRYPTO_SUPPORT + select SPL_HASH_SUPPORT + select SPL_RSA ++ select SPL_FIT_FULL_CHECK + + config SPL_LOAD_FIT + bool "Enable SPL loading U-Boot as a FIT" +diff --git a/common/image-fit.c b/common/image-fit.c +index 124d8895cffd..b1926d8b53f8 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -15,7 +15,6 @@ + #include <time.h> + #else + #include <linux/compiler.h> +-#include <linux/kconfig.h> + #include <common.h> + #include <errno.h> + #include <mapmem.h> +@@ -26,12 +25,15 @@ DECLARE_GLOBAL_DATA_PTR; + + #include <image.h> + #include <bootstage.h> ++#include <linux/kconfig.h> + #include <u-boot/crc.h> + #include <u-boot/md5.h> + #include <u-boot/sha1.h> + #include <u-boot/sha256.h> + #include <u-boot/sha512.h> + ++#define log_debug(fmt, args...) debug(fmt, ##args) ++ + /*****************************************************************************/ + /* New uImage format routines */ + /*****************************************************************************/ +@@ -1487,6 +1489,22 @@ int fit_check_format(const void *fit, ulong size) + return -ENODATA; + } + } ++ ++ if (CONFIG_IS_ENABLED(FIT_FULL_CHECK)) { ++ /* ++ * If we are not given the size, make do wtih calculating it. ++ * This is not as secure, so we should consider a flag to ++ * control this. ++ */ ++ if (size == IMAGE_SIZE_INVAL) ++ size = fdt_totalsize(fit); ++ ret = fdt_check_full(fit, size); ++ ++ if (ret) { ++ log_debug("FIT check error %d\n", ret); ++ return -EINVAL; ++ } ++ } + + /* mandatory subimages parent '/images' node */ + if (fdt_path_offset(fit, FIT_IMAGES_PATH) < 0) { +diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h +index eeb2344971f3..29c997ada398 100644 +--- a/include/linux/libfdt.h ++++ b/include/linux/libfdt.h +@@ -305,6 +305,8 @@ int fdt_next_region(const void *fdt, + */ + int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count, + int max_regions, struct fdt_region_state *info); ++ ++int fdt_check_full(const void *fdt, size_t bufsize); + #endif /* SWIG */ + + extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ +diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c +index b6ca4e0b0c30..dfbeb2c21a85 100644 +--- a/lib/libfdt/fdt_ro.c ++++ b/lib/libfdt/fdt_ro.c +@@ -680,3 +680,68 @@ int fdt_node_offset_by_compatible(const void *fdt, int startoffset, + + return offset; /* error from fdt_next_node() */ + } ++ ++#define INT_MAX ((int)(~0U>>1)) ++ ++int fdt_check_full(const void *fdt, size_t bufsize) ++{ ++ int err; ++ int num_memrsv; ++ int offset, nextoffset = 0; ++ uint32_t tag; ++ unsigned depth = 0; ++ const void *prop; ++ const char *propname; ++ ++ if (bufsize < FDT_V1_SIZE) ++ return -FDT_ERR_TRUNCATED; ++ err = fdt_check_header(fdt); ++ if (err != 0) ++ return err; ++ if (bufsize < fdt_totalsize(fdt)) ++ return -FDT_ERR_TRUNCATED; ++ ++ num_memrsv = fdt_num_mem_rsv(fdt); ++ if (num_memrsv < 0) ++ return num_memrsv; ++ ++ while (1) { ++ offset = nextoffset; ++ tag = fdt_next_tag(fdt, offset, &nextoffset); ++ ++ if (nextoffset < 0) ++ return nextoffset; ++ ++ switch (tag) { ++ case FDT_NOP: ++ break; ++ ++ case FDT_END: ++ if (depth != 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ return 0; ++ ++ case FDT_BEGIN_NODE: ++ depth++; ++ if (depth > INT_MAX) ++ return -FDT_ERR_BADSTRUCTURE; ++ break; ++ ++ case FDT_END_NODE: ++ if (depth == 0) ++ return -FDT_ERR_BADSTRUCTURE; ++ depth--; ++ break; ++ ++ case FDT_PROP: ++ prop = fdt_getprop_by_offset(fdt, offset, &propname, ++ &err); ++ if (!prop) ++ return err; ++ break; ++ ++ default: ++ return -FDT_ERR_INTERNAL; ++ } ++ } ++} +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27138/0001-image-Check-for-unit-addresses-in-FITs.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27138/0001-image-Check-for-unit-addresses-in-FITs.patch new file mode 100644 index 000000000..33dbf15be --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/CVE-2021-27138/0001-image-Check-for-unit-addresses-in-FITs.patch @@ -0,0 +1,106 @@ +From dbfcf0735d5f4d27445176f72e6174edf064c118 Mon Sep 17 00:00:00 2001 +From: Simon Glass <sjg@chromium.org> +Date: Mon, 15 Feb 2021 17:08:12 -0700 +Subject: [PATCH] image: Check for unit addresses in FITs + +Using unit addresses in a FIT is a security risk. Add a check for this +and disallow it. + +CVE-2021-27138 + +Signed-off-by: Simon Glass <sjg@chromium.org> +Reported-by: Bruce Monroe <bruce.monroe@intel.com> +Reported-by: Arie Haenel <arie.haenel@intel.com> +Reported-by: Julien Lenoir <julien.lenoir@intel.com> +--- + common/image-fit.c | 56 ++++++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 52 insertions(+), 4 deletions(-) + +diff --git a/common/image-fit.c b/common/image-fit.c +index 78db32e89f6f..6c495ffa4349 100644 +--- a/common/image-fit.c ++++ b/common/image-fit.c +@@ -1217,6 +1217,34 @@ int fit_image_check_comp(const void *fit, int noffset, uint8_t comp) + return (comp == image_comp); + } + ++/** ++ * fdt_check_no_at() - Check for nodes whose names contain '@' ++ * ++ * This checks the parent node and all subnodes recursively ++ * ++ * @fit: FIT to check ++ * @parent: Parent node to check ++ * @return 0 if OK, -EADDRNOTAVAIL is a node has a name containing '@' ++ */ ++static int fdt_check_no_at(const void *fit, int parent) ++{ ++ const char *name; ++ int node; ++ int ret; ++ ++ name = fdt_get_name(fit, parent, NULL); ++ if (!name || strchr(name, '@')) ++ return -EADDRNOTAVAIL; ++ ++ fdt_for_each_subnode(node, fit, parent) { ++ ret = fdt_check_no_at(fit, node); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} ++ + int fit_check_format(const void *fit, ulong size) + { + int ret; +@@ -1251,10 +1279,27 @@ int fit_check_format(const void *fit, ulong size) + if (size == IMAGE_SIZE_INVAL) + size = fdt_totalsize(fit); + ret = fdt_check_full(fit, size); ++ if (ret) ++ ret = -EINVAL; ++ ++ /* ++ * U-Boot stopped using unit addressed in 2017. Since libfdt ++ * can match nodes ignoring any unit address, signature ++ * verification can see the wrong node if one is inserted with ++ * the same name as a valid node but with a unit address ++ * attached. Protect against this by disallowing unit addresses. ++ */ ++ if (!ret && CONFIG_IS_ENABLED(FIT_SIGNATURE)) { ++ ret = fdt_check_no_at(fit, 0); + ++ if (ret) { ++ log_debug("FIT check error %d\n", ret); ++ return ret; ++ } ++ } + if (ret) { + log_debug("FIT check error %d\n", ret); +- return -EINVAL; ++ return ret; + } + } + +@@ -1604,10 +1649,13 @@ int fit_image_load(bootm_headers_t *images, ulong addr, + printf("## Loading %s from FIT Image at %08lx ...\n", prop_name, addr); + + bootstage_mark(bootstage_id + BOOTSTAGE_SUB_FORMAT); +- if (fit_check_format(fit, IMAGE_SIZE_INVAL)) { +- printf("Bad FIT %s image format!\n", prop_name); ++ ret = fit_check_format(fit, IMAGE_SIZE_INVAL); ++ if (ret) { ++ printf("Bad FIT %s image format! (err=%d)\n", prop_name, ret); ++ if (CONFIG_IS_ENABLED(FIT_SIGNATURE) && ret == -EADDRNOTAVAIL) ++ printf("Signature checking prevents use of unit addresses (@) in nodes\n"); + bootstage_error(bootstage_id + BOOTSTAGE_SUB_FORMAT); +- return -ENOEXEC; ++ return ret; + } + bootstage_mark(bootstage_id + BOOTSTAGE_SUB_FORMAT_OK); + if (fit_uname) { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/intel.cfg b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/intel.cfg new file mode 100644 index 000000000..7d64f1584 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/intel.cfg @@ -0,0 +1,37 @@ +CONFIG_MISC_INIT_R=y +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_CMD_LED=y +CONFIG_TARGET_AST2600_INTEL=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SYS_ARCH_TIMER=y +CONFIG_USE_IRQ=y +CONFIG_CMD_IRQ=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x2400000 +CONFIG_BOARD_LATE_INIT=y +CONFIG_DM_PWM=y +CONFIG_PWM_ASPEED=y +CONFIG_TARGET_EVB_AST2600A1=n +CONFIG_PHY_NCSI=n +CONFIG_CMD_USB=n +CONFIG_CMD_EXT4=n +CONFIG_CMD_EXT4_WRITE=n +CONFIG_CMD_FAT=n +CONFIG_CMD_FS_GENERIC=n +CONFIG_CMD_MTDPARTS=n +CONFIG_EFI_PARTITION=n +CONFIG_EFI_LOADER=n +CONFIG_USB=n +CONFIG_DM_USB=n +CONFIG_USB_EHCI_HCD=n +CONFIG_USB_STORAGE=n +CONFIG_NETCONSOLE=n +CONFIG_CMD_NFS=n +CONFIG_POSITION_INDEPENDENT=n +CONFIG_SYS_TEXT_BASE=0x0 +CONFIG_SPL=n +CONFIG_ASPEED_DP=n +CONFIG_PHY_BROADCOM=n
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend new file mode 100644 index 000000000..1e20585bc --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend @@ -0,0 +1,114 @@ +COMPATIBLE_MACHINE = "intel-ast2600" +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files:" + +# the meta-phosphor layer adds this patch, which conflicts +# with the intel layout for environment + +SRC_URI:append:intel-ast2600 = " \ + file://intel.cfg \ + file://0001-Add-ast2600-intel-as-a-new-board.patch \ + file://0002-AST2600-Enable-host-searial-port-clock-configuration.patch \ + file://0003-ast2600-intel-layout-environment-addr.patch \ + file://0004-AST2600-Adjust-default-GPIO-settings.patch \ + file://0005-Ast2600-Enable-interrupt-in-u-boot.patch \ + file://0006-SPI-Quad-IO-Mode.patch \ + file://0007-ast2600-Override-OTP-strap-settings.patch \ + file://0008-AST2600-Add-TPM-pulse-trigger.patch \ + file://0009-AST2600-Disable-DMA-arbitration-options-on-MAC1-and-.patch \ + file://0010-Fix-timer-support.patch \ + file://0011-KCS-driver-support-in-uBoot.patch \ + file://0012-IPMI-command-handler-implementation-in-uboot.patch \ + file://0013-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch \ + file://0014-Add-a-workaround-to-cover-eSPI-OOB-free-bug-in-AST26.patch \ + file://0015-net-phy-realtek-Change-LED-configuration.patch \ + file://0016-Add-system-reset-status-support.patch \ + file://0016-Add-LED-control-support.patch \ + file://0017-Manufacturing-mode-physical-presence-detection.patch \ + file://0018-Add-a-workaround-to-cover-VGA-memory-size-bug-in-A0.patch \ + file://0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch \ + file://0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch \ + file://0023-Add-WDT-to-u-boot-to-cover-booting-failures.patch \ + file://0024-fix-SUS_WARN-handling-logic.patch \ + file://0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch \ + file://0026-Enable-PCIe-L1-support.patch \ + file://0027-ast2600-Add-Mailbox-init-function.patch \ + file://0028-Improve-randomness-of-mac-address-generation.patch \ + file://0029-Set-UART-routing-in-lowlevel_init.patch \ + file://0030-Add-Aspeed-PWM-uclass-driver.patch \ + file://0031-Add-a-workaround-to-fix-AST2600-A0-booting-issue.patch \ + file://0032-Disable-eSPI-initialization-in-u-boot-for-normal-boo.patch \ + file://0033-Disable-debug-interfaces.patch \ + file://0034-Implement-the-IPMI-commands-in-FFUJ-mode-in-u-boot.patch \ + file://0036-Disable-BMC-MMIO-Decode-on-VGA-SCU-register-bit.patch \ + file://0037-Enable-I2C-clock-stretching-and-multi-master-support.patch \ + " + +# CVE-2020-10648 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2020-10648:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-image-Correct-comment-for-fit_conf_get_node.patch \ + file://0008-image-Load-the-correct-configuration-in-fit_check_si.patch \ + file://0009-fit_check_sign-Allow-selecting-the-configuration-to-.patch \ + file://0012-image-Use-constants-for-required-and-key-name-hint.patch \ + " + +# CVE-2019-11059 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2019-11059:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-Fix-ext4-block-group-descriptor-sizing.patch \ + " + +# CVE-2019-11690 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2019-11690:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-lib-uuid-Fix-unseeded-PRNG-on-RANDOM_UUID-y.patch \ + " + +# CVE-2019-13105 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2019-13105:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-fs-ext4-cache-extent-data.patch \ + file://0002-CVE-2019-13105-ext4-fix-double-free-in-ext4_cache_re.patch \ + " + +# CVE-2019-13104 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2019-13104:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-CVE-2019-13104-ext4-check-for-underflow-in-ext4fs_re.patch \ + " + +# CVE-2019-13106 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2019-13106:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-CVE-2019-13106-ext4-fix-out-of-bounds-memset.patch \ + " + +# CVE-2021-27097 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2021-27097:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-image-Adjust-the-workings-of-fit_check_format.patch \ + file://0002-image-Add-an-option-to-do-a-full-check-of-the-FIT.patch \ + " + +# CVE-2021-27138 vulnerability fix +FILESEXTRAPATHS:append:intel-ast2600:= "${THISDIR}/files/CVE-2021-27138:" +SRC_URI:append:intel-ast2600 = " \ + file://0001-image-Check-for-unit-addresses-in-FITs.patch \ + " + +PFR_SRC_URI = " \ + file://0043-AST2600-PFR-u-boot-env-changes-as-per-PFR-BMC-image.patch \ + " + +AUTOBOOT_SRC_URI = " \ + file://0035-Remove-u-boot-delay-before-autoboot-in-release-image.patch \ + " + +SRC_URI:append:intel-ast2600 += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', PFR_SRC_URI, '', d)}" +SRC_URI:append:intel-ast2600 += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', '', AUTOBOOT_SRC_URI, d)}" + +do_install:append () { + install -m 0644 ${WORKDIR}/fw_env.config ${D}${sysconfdir}/fw_env.config + install -m 0644 ${WORKDIR}/fw_env.config ${S}/tools/env/fw_env.config +} +RDEPENDS:${PN} = "udev-aspeed-mtd-partitions" diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-fw-utils-aspeed-sdk_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-fw-utils-aspeed-sdk_%.bbappend new file mode 120000 index 000000000..c73fd75cc --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-fw-utils-aspeed-sdk_%.bbappend @@ -0,0 +1 @@ +u-boot-aspeed-sdk_%.bbappend
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Enable-per-frame-CRC-calculation-option-to-save-netw.patch b/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Enable-per-frame-CRC-calculation-option-to-save-netw.patch new file mode 100644 index 000000000..459d0dddc --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm/0001-Enable-per-frame-CRC-calculation-option-to-save-netw.patch @@ -0,0 +1,30 @@ +From fa81ec28629d59b8bad623ff8d3285162671d45a Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 21 Jul 2021 13:03:22 -0700 +Subject: [PATCH] Enable per-frame CRC calculation option to save network + bandwidth + +This commit enables per-frame CRC calculation option to save network +bandwidth by dropping off frames that don't have changes. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + start-ipkvm.service | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/start-ipkvm.service b/start-ipkvm.service +index 60234b231da3..10e424845599 100644 +--- a/start-ipkvm.service ++++ b/start-ipkvm.service +@@ -5,7 +5,7 @@ ConditionPathIsMountPoint=/sys/kernel/config + [Service] + Restart=always + ExecStartPre=/usr/bin/create_usbhid.sh disconnect +-ExecStart=/usr/bin/obmc-ikvm -v /dev/video0 -k /dev/hidg0 -p /dev/hidg1 ++ExecStart=/usr/bin/obmc-ikvm -c -v /dev/video0 -k /dev/hidg0 -p /dev/hidg1 + + [Install] + WantedBy=multi-user.target +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend new file mode 100644 index 000000000..85e3ffc26 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +SRC_URI += " \ + file://0001-Enable-per-frame-CRC-calculation-option-to-save-netw.patch \ + " diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0001-serial-8250-Add-Aspeed-UART-driver-with-DMA-supporte.patch b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0001-serial-8250-Add-Aspeed-UART-driver-with-DMA-supporte.patch new file mode 100644 index 000000000..525b910d0 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0001-serial-8250-Add-Aspeed-UART-driver-with-DMA-supporte.patch @@ -0,0 +1,1184 @@ +From a4897aed25195742ec9fd992a52a6e7bf872f318 Mon Sep 17 00:00:00 2001 +From: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com> +Date: Wed, 22 Jul 2020 13:46:21 +0800 +Subject: [PATCH] serial: 8250: Add Aspeed UART driver with DMA supported + +This patch adds drivers for Aspeed UARTs, which are 16550A compatible. +The drivers includes an wrapper to support the extended DMA feature of +UART devices and another UDMA driver to control the UART DMA engine. + +Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> +--- + arch/arm/boot/dts/aspeed-ast2600-evb.dts | 5 - + .../arm/boot/dts/aspeed-bmc-intel-ast2600.dts | 2 - + arch/arm/boot/dts/aspeed-g6.dtsi | 28 +- + drivers/soc/aspeed/Kconfig | 8 + + drivers/soc/aspeed/Makefile | 1 + + drivers/soc/aspeed/aspeed-udma.c | 441 ++++++++++++++++ + drivers/tty/serial/8250/8250_aspeed.c | 494 ++++++++++++++++++ + drivers/tty/serial/8250/Kconfig | 8 + + drivers/tty/serial/8250/Makefile | 1 + + include/linux/soc/aspeed/aspeed-udma.h | 30 ++ + 10 files changed, 997 insertions(+), 21 deletions(-) + create mode 100644 drivers/soc/aspeed/aspeed-udma.c + create mode 100644 drivers/tty/serial/8250/8250_aspeed.c + create mode 100644 include/linux/soc/aspeed/aspeed-udma.h + +diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts b/arch/arm/boot/dts/aspeed-ast2600-evb.dts +index acbd1c947465..913749205c1d 100644 +--- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts ++++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts +@@ -180,11 +180,6 @@ + }; + }; + +-&uart5 { +- // Workaround for A0 +- compatible = "snps,dw-apb-uart"; +-}; +- + &i2c0 { + status = "okay"; + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +index 02c837c3e2c4..210d2bbdf836 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +@@ -427,8 +427,6 @@ + + &uart5 { + status = "okay"; +- // Workaround for A0 +- compatible = "snps,dw-apb-uart"; + }; + + &uart_routing { +diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi +index e76dfb73430e..001ecf9ad33c 100644 +--- a/arch/arm/boot/dts/aspeed-g6.dtsi ++++ b/arch/arm/boot/dts/aspeed-g6.dtsi +@@ -524,23 +524,22 @@ + }; + + uart1: serial@1e783000 { +- compatible = "ns16550a"; ++ compatible = "aspeed,ast2600-uart"; + reg = <0x1e783000 0x20>; +- reg-shift = <2>; +- reg-io-width = <4>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; + resets = <&lpc_reset 4>; + no-loopback-test; ++ dma-mode; ++ dma-channel = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; + status = "disabled"; + }; + + uart5: serial@1e784000 { +- compatible = "ns16550a"; ++ compatible = "aspeed,ast2600-uart"; + reg = <0x1e784000 0x1000>; +- reg-shift = <2>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; + no-loopback-test; +@@ -754,10 +753,8 @@ + }; + + uart2: serial@1e78d000 { +- compatible = "ns16550a"; ++ compatible = "aspeed,ast2600-uart"; + reg = <0x1e78d000 0x20>; +- reg-shift = <2>; +- reg-io-width = <4>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; + resets = <&lpc_reset 5>; +@@ -768,10 +765,8 @@ + }; + + uart3: serial@1e78e000 { +- compatible = "ns16550a"; ++ compatible = "aspeed,ast2600-uart"; + reg = <0x1e78e000 0x20>; +- reg-shift = <2>; +- reg-io-width = <4>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; + resets = <&lpc_reset 6>; +@@ -782,10 +777,8 @@ + }; + + uart4: serial@1e78f000 { +- compatible = "ns16550a"; ++ compatible = "aspeed,ast2600-uart"; + reg = <0x1e78f000 0x20>; +- reg-shift = <2>; +- reg-io-width = <4>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; + resets = <&lpc_reset 7>; +@@ -834,6 +827,13 @@ + clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; + status = "disabled"; + }; ++ ++ udma: uart-dma@1e79e000 { ++ compatible = "aspeed,ast2600-udma"; ++ reg = <0x1e79e000 0x400>; ++ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; ++ }; ++ + }; + }; + }; +diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig +index d36ee43451a5..ca284ac2f0ab 100644 +--- a/drivers/soc/aspeed/Kconfig ++++ b/drivers/soc/aspeed/Kconfig +@@ -90,6 +90,14 @@ config ASPEED_XDMA + SoCs. The XDMA engine can perform PCIe DMA operations between the BMC + and a host processor. + ++config ASPEED_UDMA ++ tristate "Aspeed UDMA Engine Driver" ++ depends on SOC_ASPEED && REGMAP && MFD_SYSCON && HAS_DMA ++ help ++ Enable support for the Aspeed UDMA Engine found on the Aspeed AST2XXX ++ SOCs. The UDMA engine can perform UART DMA operations between the memory ++ buffer and the UART/VUART devices. ++ + config ASPEED_VGA_SHAREDMEM + tristate "Aspeed VGA Shared memory" + help +diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile +index f3afc32b58b9..e6248ecdeee3 100644 +--- a/drivers/soc/aspeed/Makefile ++++ b/drivers/soc/aspeed/Makefile +@@ -8,5 +8,6 @@ obj-$(CONFIG_ASPEED_LPC_SNOOP) += aspeed-lpc-snoop.o + obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o + obj-$(CONFIG_ASPEED_SOCINFO) += aspeed-socinfo.o + obj-$(CONFIG_ASPEED_XDMA) += aspeed-xdma.o ++obj-$(CONFIG_ASPEED_UDMA) += aspeed-udma.o + obj-$(CONFIG_ASPEED_VGA_SHAREDMEM) += aspeed-vga-sharedmem.o + obj-$(CONFIG_ASPEED_MCTP) += aspeed-mctp.o +diff --git a/drivers/soc/aspeed/aspeed-udma.c b/drivers/soc/aspeed/aspeed-udma.c +new file mode 100644 +index 000000000000..01b73ebe1880 +--- /dev/null ++++ b/drivers/soc/aspeed/aspeed-udma.c +@@ -0,0 +1,441 @@ ++#include <linux/io.h> ++#include <linux/module.h> ++#include <linux/interrupt.h> ++#include <linux/module.h> ++#include <linux/of.h> ++#include <linux/of_device.h> ++#include <linux/platform_device.h> ++#include <linux/dma-mapping.h> ++#include <linux/spinlock.h> ++#include <linux/soc/aspeed/aspeed-udma.h> ++ ++#define DEVICE_NAME "aspeed-udma" ++ ++/* UART DMA registers offset */ ++#define UDMA_TX_DMA_EN 0x000 ++#define UDMA_RX_DMA_EN 0x004 ++#define UDMA_TIMEOUT_TIMER 0x00c ++#define UDMA_TX_DMA_RST 0x020 ++#define UDMA_RX_DMA_RST 0x024 ++#define UDMA_TX_DMA_INT_EN 0x030 ++#define UDMA_TX_DMA_INT_STAT 0x034 ++#define UDMA_RX_DMA_INT_EN 0x038 ++#define UDMA_RX_DMA_INT_STAT 0x03c ++ ++#define UDMA_CHX_OFF(x) ((x) * 0x20) ++#define UDMA_CHX_TX_RD_PTR(x) (0x040 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_TX_WR_PTR(x) (0x044 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_TX_BUF_BASE(x) (0x048 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_TX_CTRL(x) (0x04c + UDMA_CHX_OFF(x)) ++#define UDMA_TX_CTRL_TMOUT_DISABLE BIT(4) ++#define UDMA_TX_CTRL_BUFSZ_MASK GENMASK(3, 0) ++#define UDMA_TX_CTRL_BUFSZ_SHIFT 0 ++#define UDMA_CHX_RX_RD_PTR(x) (0x050 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_RX_WR_PTR(x) (0x054 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_RX_BUF_BASE(x) (0x058 + UDMA_CHX_OFF(x)) ++#define UDMA_CHX_RX_CTRL(x) (0x05c + UDMA_CHX_OFF(x)) ++#define UDMA_RX_CTRL_TMOUT_DISABLE BIT(4) ++#define UDMA_RX_CTRL_BUFSZ_MASK GENMASK(3, 0) ++#define UDMA_RX_CTRL_BUFSZ_SHIFT 0 ++ ++#define UDMA_MAX_CHANNEL 14 ++#define UDMA_TIMEOUT 0x200 ++ ++enum aspeed_udma_bufsz_code { ++ UDMA_BUFSZ_CODE_1KB, ++ UDMA_BUFSZ_CODE_4KB, ++ UDMA_BUFSZ_CODE_16KB, ++ UDMA_BUFSZ_CODE_64KB, ++ ++ /* ++ * 128KB and above are supported ONLY for ++ * virtual UARTs. For physical UARTs, the ++ * size code is wrapped around at the 64K ++ * boundary. ++ */ ++ UDMA_BUFSZ_CODE_128KB, ++ UDMA_BUFSZ_CODE_256KB, ++ UDMA_BUFSZ_CODE_512KB, ++ UDMA_BUFSZ_CODE_1024KB, ++ UDMA_BUFSZ_CODE_2048KB, ++ UDMA_BUFSZ_CODE_4096KB, ++ UDMA_BUFSZ_CODE_8192KB, ++ UDMA_BUFSZ_CODE_16384KB, ++}; ++ ++struct aspeed_udma_chan { ++ dma_addr_t dma_addr; ++ ++ struct circ_buf *rb; ++ u32 rb_sz; ++ ++ aspeed_udma_cb_t cb; ++ void *cb_arg; ++ ++ bool dis_tmout; ++}; ++ ++struct aspeed_udma { ++ struct device *dev; ++ u8 __iomem *regs; ++ u32 irq; ++ struct aspeed_udma_chan tx_chs[UDMA_MAX_CHANNEL]; ++ struct aspeed_udma_chan rx_chs[UDMA_MAX_CHANNEL]; ++ spinlock_t lock; ++}; ++ ++struct aspeed_udma udma[1]; ++ ++static int aspeed_udma_get_bufsz_code(u32 buf_sz) ++{ ++ switch (buf_sz) { ++ case 0x400: ++ return UDMA_BUFSZ_CODE_1KB; ++ case 0x1000: ++ return UDMA_BUFSZ_CODE_4KB; ++ case 0x4000: ++ return UDMA_BUFSZ_CODE_16KB; ++ case 0x10000: ++ return UDMA_BUFSZ_CODE_64KB; ++ case 0x20000: ++ return UDMA_BUFSZ_CODE_128KB; ++ case 0x40000: ++ return UDMA_BUFSZ_CODE_256KB; ++ case 0x80000: ++ return UDMA_BUFSZ_CODE_512KB; ++ case 0x100000: ++ return UDMA_BUFSZ_CODE_1024KB; ++ case 0x200000: ++ return UDMA_BUFSZ_CODE_2048KB; ++ case 0x400000: ++ return UDMA_BUFSZ_CODE_4096KB; ++ case 0x800000: ++ return UDMA_BUFSZ_CODE_8192KB; ++ case 0x1000000: ++ return UDMA_BUFSZ_CODE_16384KB; ++ default: ++ return -1; ++ } ++ ++ return -1; ++} ++ ++static u32 aspeed_udma_get_tx_rptr(u32 ch_no) ++{ ++ return readl(udma->regs + UDMA_CHX_TX_RD_PTR(ch_no)); ++} ++ ++static u32 aspeed_udma_get_rx_wptr(u32 ch_no) ++{ ++ return readl(udma->regs + UDMA_CHX_RX_WR_PTR(ch_no)); ++} ++ ++static void aspeed_udma_set_ptr(u32 ch_no, u32 ptr, bool is_tx) ++{ ++ writel(ptr, udma->regs + ++ ((is_tx) ? ++ UDMA_CHX_TX_WR_PTR(ch_no) : ++ UDMA_CHX_RX_RD_PTR(ch_no))); ++} ++ ++void aspeed_udma_set_tx_wptr(u32 ch_no, u32 wptr) ++{ ++ aspeed_udma_set_ptr(ch_no, wptr, true); ++} ++EXPORT_SYMBOL(aspeed_udma_set_tx_wptr); ++ ++void aspeed_udma_set_rx_rptr(u32 ch_no, u32 rptr) ++{ ++ aspeed_udma_set_ptr(ch_no, rptr, false); ++} ++EXPORT_SYMBOL(aspeed_udma_set_rx_rptr); ++ ++static int aspeed_udma_free_chan(u32 ch_no, bool is_tx) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ if (ch_no > UDMA_MAX_CHANNEL) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&udma->lock, flags); ++ ++ reg = readl(udma->regs + ++ ((is_tx) ? UDMA_TX_DMA_INT_EN : UDMA_RX_DMA_INT_EN)); ++ reg &= ~(0x1 << ch_no); ++ ++ writel(reg, udma->regs + ++ ((is_tx) ? UDMA_TX_DMA_INT_EN : UDMA_RX_DMA_INT_EN)); ++ ++ spin_unlock_irqrestore(&udma->lock, flags); ++ ++ return 0; ++} ++ ++int aspeed_udma_free_tx_chan(u32 ch_no) ++{ ++ return aspeed_udma_free_chan(ch_no, true); ++} ++EXPORT_SYMBOL(aspeed_udma_free_tx_chan); ++ ++int aspeed_udma_free_rx_chan(u32 ch_no) ++{ ++ return aspeed_udma_free_chan(ch_no, false); ++} ++EXPORT_SYMBOL(aspeed_udma_free_rx_chan); ++ ++static int aspeed_udma_request_chan(u32 ch_no, dma_addr_t addr, ++ struct circ_buf *rb, u32 rb_sz, ++ aspeed_udma_cb_t cb, void *id, bool dis_tmout, bool is_tx) ++{ ++ int retval = 0; ++ int rbsz_code; ++ ++ u32 reg; ++ unsigned long flags; ++ struct aspeed_udma_chan *ch; ++ ++ if (ch_no > UDMA_MAX_CHANNEL) { ++ retval = -EINVAL; ++ goto out; ++ } ++ ++ if (IS_ERR_OR_NULL(rb) || IS_ERR_OR_NULL(rb->buf)) { ++ retval = -EINVAL; ++ goto out; ++ } ++ ++ rbsz_code = aspeed_udma_get_bufsz_code(rb_sz); ++ if (rbsz_code < 0) { ++ retval = -EINVAL; ++ goto out; ++ } ++ ++ spin_lock_irqsave(&udma->lock, flags); ++ ++ if (is_tx) { ++ reg = readl(udma->regs + UDMA_TX_DMA_INT_EN); ++ if (reg & (0x1 << ch_no)) { ++ retval = -EBUSY; ++ goto unlock_n_out; ++ } ++ ++ reg |= (0x1 << ch_no); ++ writel(reg, udma->regs + UDMA_TX_DMA_INT_EN); ++ ++ reg = readl(udma->regs + UDMA_CHX_TX_CTRL(ch_no)); ++ reg |= (dis_tmout) ? UDMA_TX_CTRL_TMOUT_DISABLE : 0; ++ reg |= (rbsz_code << UDMA_TX_CTRL_BUFSZ_SHIFT) & UDMA_TX_CTRL_BUFSZ_MASK; ++ writel(reg, udma->regs + UDMA_CHX_TX_CTRL(ch_no)); ++ ++ writel(addr, udma->regs + UDMA_CHX_TX_BUF_BASE(ch_no)); ++ } ++ else { ++ reg = readl(udma->regs + UDMA_RX_DMA_INT_EN); ++ if (reg & (0x1 << ch_no)) { ++ retval = -EBUSY; ++ goto unlock_n_out; ++ } ++ ++ reg |= (0x1 << ch_no); ++ writel(reg, udma->regs + UDMA_RX_DMA_INT_EN); ++ ++ reg = readl(udma->regs + UDMA_CHX_RX_CTRL(ch_no)); ++ reg |= (dis_tmout) ? UDMA_RX_CTRL_TMOUT_DISABLE : 0; ++ reg |= (rbsz_code << UDMA_RX_CTRL_BUFSZ_SHIFT) & UDMA_RX_CTRL_BUFSZ_MASK; ++ writel(reg, udma->regs + UDMA_CHX_RX_CTRL(ch_no)); ++ ++ writel(addr, udma->regs + UDMA_CHX_RX_BUF_BASE(ch_no)); ++ } ++ ++ ch = (is_tx) ? &udma->tx_chs[ch_no] : &udma->rx_chs[ch_no]; ++ ch->rb = rb; ++ ch->rb_sz = rb_sz; ++ ch->cb = cb; ++ ch->cb_arg = id; ++ ch->dma_addr = addr; ++ ch->dis_tmout = dis_tmout; ++ ++unlock_n_out: ++ spin_unlock_irqrestore(&udma->lock, flags); ++out: ++ return 0; ++} ++ ++int aspeed_udma_request_tx_chan(u32 ch_no, dma_addr_t addr, ++ struct circ_buf *rb, u32 rb_sz, ++ aspeed_udma_cb_t cb, void *id, bool dis_tmout) ++{ ++ return aspeed_udma_request_chan(ch_no, addr, rb, rb_sz, cb, id, ++ dis_tmout, true); ++} ++EXPORT_SYMBOL(aspeed_udma_request_tx_chan); ++ ++int aspeed_udma_request_rx_chan(u32 ch_no, dma_addr_t addr, ++ struct circ_buf *rb, u32 rb_sz, ++ aspeed_udma_cb_t cb, void *id, bool dis_tmout) ++{ ++ return aspeed_udma_request_chan(ch_no, addr, rb, rb_sz, cb, id, ++ dis_tmout, false); ++} ++EXPORT_SYMBOL(aspeed_udma_request_rx_chan); ++ ++static void aspeed_udma_chan_ctrl(u32 ch_no, u32 op, bool is_tx) ++{ ++ unsigned long flags; ++ u32 reg_en, reg_rst; ++ u32 reg_en_off = (is_tx) ? UDMA_TX_DMA_EN : UDMA_RX_DMA_EN; ++ u32 reg_rst_off = (is_tx) ? UDMA_TX_DMA_RST : UDMA_TX_DMA_RST; ++ ++ if (ch_no > UDMA_MAX_CHANNEL) ++ return; ++ ++ spin_lock_irqsave(&udma->lock, flags); ++ ++ reg_en = readl(udma->regs + reg_en_off); ++ reg_rst = readl(udma->regs + reg_rst_off); ++ ++ switch (op) { ++ case ASPEED_UDMA_OP_ENABLE: ++ reg_en |= (0x1 << ch_no); ++ writel(reg_en, udma->regs + reg_en_off); ++ break; ++ case ASPEED_UDMA_OP_DISABLE: ++ reg_en &= ~(0x1 << ch_no); ++ writel(reg_en, udma->regs + reg_en_off); ++ break; ++ case ASPEED_UDMA_OP_RESET: ++ reg_en &= ~(0x1 << ch_no); ++ writel(reg_en, udma->regs + reg_en_off); ++ reg_rst |= (0x1 << ch_no); ++ writel(reg_rst, udma->regs + reg_rst_off); ++ reg_rst &= ~(0x1 << ch_no); ++ writel(reg_rst, udma->regs + reg_rst_off); ++ break; ++ default: ++ break; ++ } ++ ++ spin_unlock_irqrestore(&udma->lock, flags); ++} ++ ++void aspeed_udma_tx_chan_ctrl(u32 ch_no, enum aspeed_udma_ops op) ++{ ++ aspeed_udma_chan_ctrl(ch_no, op, true); ++} ++EXPORT_SYMBOL(aspeed_udma_tx_chan_ctrl); ++ ++void aspeed_udma_rx_chan_ctrl(u32 ch_no, enum aspeed_udma_ops op) ++{ ++ aspeed_udma_chan_ctrl(ch_no, op, false); ++} ++EXPORT_SYMBOL(aspeed_udma_rx_chan_ctrl); ++ ++static irqreturn_t aspeed_udma_isr(int irq, void *arg) ++{ ++ u32 bit; ++ unsigned long tx_stat = readl(udma->regs + UDMA_TX_DMA_INT_STAT); ++ unsigned long rx_stat = readl(udma->regs + UDMA_RX_DMA_INT_STAT); ++ ++ if (udma != (struct aspeed_udma *)arg) ++ return IRQ_NONE; ++ ++ if (tx_stat == 0 && rx_stat == 0) ++ return IRQ_NONE; ++ ++ for_each_set_bit(bit, &tx_stat, UDMA_MAX_CHANNEL) { ++ writel((0x1 << bit), udma->regs + UDMA_TX_DMA_INT_STAT); ++ if (udma->tx_chs[bit].cb) ++ udma->tx_chs[bit].cb(aspeed_udma_get_tx_rptr(bit), ++ udma->tx_chs[bit].cb_arg); ++ } ++ ++ for_each_set_bit(bit, &rx_stat, UDMA_MAX_CHANNEL) { ++ writel((0x1 << bit), udma->regs + UDMA_RX_DMA_INT_STAT); ++ if (udma->rx_chs[bit].cb) ++ udma->rx_chs[bit].cb(aspeed_udma_get_rx_wptr(bit), ++ udma->rx_chs[bit].cb_arg); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int aspeed_udma_probe(struct platform_device *pdev) ++{ ++ int i, rc; ++ struct resource *res; ++ struct device *dev = &pdev->dev; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (IS_ERR_OR_NULL(res)) { ++ dev_err(dev, "failed to get register base\n"); ++ return -ENODEV; ++ } ++ ++ udma->regs = devm_ioremap_resource(dev, res); ++ if (IS_ERR_OR_NULL(udma->regs)) { ++ dev_err(dev, "failed to map registers\n"); ++ return PTR_ERR(udma->regs); ++ } ++ ++ /* disable for safety */ ++ writel(0x0, udma->regs + UDMA_TX_DMA_EN); ++ writel(0x0, udma->regs + UDMA_RX_DMA_EN); ++ ++ udma->irq = platform_get_irq(pdev, 0); ++ if (udma->irq < 0) { ++ dev_err(dev, "failed to get IRQ number\n"); ++ return -ENODEV; ++ } ++ ++ rc = devm_request_irq(dev, udma->irq, aspeed_udma_isr, ++ IRQF_SHARED, DEVICE_NAME, udma); ++ if (rc) { ++ dev_err(dev, "failed to request IRQ handler\n"); ++ return rc; ++ } ++ ++ for (i = 0; i < UDMA_MAX_CHANNEL; ++i) { ++ writel(0, udma->regs + UDMA_CHX_TX_WR_PTR(i)); ++ writel(0, udma->regs + UDMA_CHX_RX_RD_PTR(i)); ++ } ++ ++ writel(0xffffffff, udma->regs + UDMA_TX_DMA_RST); ++ writel(0x0, udma->regs + UDMA_TX_DMA_RST); ++ ++ writel(0xffffffff, udma->regs + UDMA_RX_DMA_RST); ++ writel(0x0, udma->regs + UDMA_RX_DMA_RST); ++ ++ writel(0x0, udma->regs + UDMA_TX_DMA_INT_EN); ++ writel(0xffffffff, udma->regs + UDMA_TX_DMA_INT_STAT); ++ writel(0x0, udma->regs + UDMA_RX_DMA_INT_EN); ++ writel(0xffffffff, udma->regs + UDMA_RX_DMA_INT_STAT); ++ ++ writel(UDMA_TIMEOUT, udma->regs + UDMA_TIMEOUT_TIMER); ++ ++ spin_lock_init(&udma->lock); ++ ++ dev_set_drvdata(dev, udma); ++ ++ return 0; ++} ++ ++static const struct of_device_id aspeed_udma_match[] = { ++ { .compatible = "aspeed,ast2500-udma" }, ++ { .compatible = "aspeed,ast2600-udma" }, ++}; ++ ++static struct platform_driver aspeed_udma_driver = { ++ .driver = { ++ .name = DEVICE_NAME, ++ .of_match_table = aspeed_udma_match, ++ ++ }, ++ .probe = aspeed_udma_probe, ++}; ++ ++module_platform_driver(aspeed_udma_driver); ++ ++MODULE_AUTHOR("Chia-Wei Wang <chiawei_wang@aspeedtech.com>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Aspeed UDMA Engine Driver"); +diff --git a/drivers/tty/serial/8250/8250_aspeed.c b/drivers/tty/serial/8250/8250_aspeed.c +new file mode 100644 +index 000000000000..1dc798298fca +--- /dev/null ++++ b/drivers/tty/serial/8250/8250_aspeed.c +@@ -0,0 +1,494 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) ASPEED Technology Inc. ++ */ ++#include <linux/device.h> ++#include <linux/io.h> ++#include <linux/module.h> ++#include <linux/serial_8250.h> ++#include <linux/serial_reg.h> ++#include <linux/of.h> ++#include <linux/of_irq.h> ++#include <linux/of_platform.h> ++#include <linux/platform_device.h> ++#include <linux/clk.h> ++#include <linux/reset.h> ++#include <linux/dma-mapping.h> ++#include <linux/circ_buf.h> ++#include <linux/tty_flip.h> ++#include <linux/pm_runtime.h> ++#include <linux/soc/aspeed/aspeed-udma.h> ++ ++#include "8250.h" ++ ++#define DEVICE_NAME "aspeed-uart" ++ ++/* offsets for the aspeed virtual uart registers */ ++#define VUART_GCRA 0x20 ++#define VUART_GCRA_VUART_EN BIT(0) ++#define VUART_GCRA_SIRQ_POLARITY BIT(1) ++#define VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5) ++#define VUART_GCRB 0x24 ++#define VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4) ++#define VUART_GCRB_HOST_SIRQ_SHIFT 4 ++#define VUART_ADDRL 0x28 ++#define VUART_ADDRH 0x2c ++ ++#define DMA_TX_BUFSZ PAGE_SIZE ++#define DMA_RX_BUFSZ (64 * 1024) ++ ++struct uart_ops ast8250_pops; ++ ++struct ast8250_vuart { ++ u32 port; ++ u32 sirq; ++ u32 sirq_pol; ++}; ++ ++struct ast8250_udma { ++ u32 ch; ++ ++ u32 tx_rbsz; ++ u32 rx_rbsz; ++ ++ dma_addr_t tx_addr; ++ dma_addr_t rx_addr; ++ ++ struct circ_buf *tx_rb; ++ struct circ_buf *rx_rb; ++ ++ bool tx_tmout_dis; ++ bool rx_tmout_dis; ++}; ++ ++struct ast8250_data { ++ int line; ++ ++ u8 __iomem *regs; ++ ++ bool is_vuart; ++ bool use_dma; ++ ++ struct reset_control *rst; ++ struct clk *clk; ++ ++ struct ast8250_vuart vuart; ++ struct ast8250_udma dma; ++}; ++ ++static void ast8250_dma_tx_complete(int tx_rb_rptr, void *id) ++{ ++ u32 count; ++ unsigned long flags; ++ struct uart_port *port = (struct uart_port*)id; ++ struct ast8250_data *data = port->private_data; ++ ++ spin_lock_irqsave(&port->lock, flags); ++ ++ count = CIRC_CNT(tx_rb_rptr, port->state->xmit.tail, data->dma.tx_rbsz); ++ port->state->xmit.tail = tx_rb_rptr; ++ port->icount.tx += count; ++ ++ if (uart_circ_chars_pending(&port->state->xmit) < WAKEUP_CHARS) ++ uart_write_wakeup(port); ++ ++ spin_unlock_irqrestore(&port->lock, flags); ++} ++ ++static void ast8250_dma_rx_complete(int rx_rb_wptr, void *id) ++{ ++ unsigned long flags; ++ struct uart_port *up = (struct uart_port*)id; ++ struct tty_port *tp = &up->state->port; ++ struct ast8250_data *data = up->private_data; ++ struct ast8250_udma *dma = &data->dma; ++ struct circ_buf *rx_rb = dma->rx_rb; ++ u32 rx_rbsz = dma->rx_rbsz; ++ u32 count = 0; ++ ++ spin_lock_irqsave(&up->lock, flags); ++ ++ rx_rb->head = rx_rb_wptr; ++ ++ dma_sync_single_for_cpu(up->dev, ++ dma->rx_addr, dma->rx_rbsz, DMA_FROM_DEVICE); ++ ++ while (CIRC_CNT(rx_rb->head, rx_rb->tail, rx_rbsz)) { ++ count = CIRC_CNT_TO_END(rx_rb->head, rx_rb->tail, rx_rbsz); ++ ++ tty_insert_flip_string(tp, rx_rb->buf + rx_rb->tail, count); ++ ++ rx_rb->tail += count; ++ rx_rb->tail %= rx_rbsz; ++ ++ up->icount.rx += count; ++ } ++ ++ if (count) { ++ aspeed_udma_set_rx_rptr(data->dma.ch, rx_rb->tail); ++ tty_flip_buffer_push(tp); ++ } ++ ++ spin_unlock_irqrestore(&up->lock, flags); ++} ++ ++static void ast8250_dma_start_tx(struct uart_port *port) ++{ ++ struct ast8250_data *data = port->private_data; ++ struct ast8250_udma *dma = &data->dma; ++ struct circ_buf *tx_rb = dma->tx_rb; ++ ++ dma_sync_single_for_device(port->dev, ++ dma->tx_addr, dma->tx_rbsz, DMA_TO_DEVICE); ++ ++ aspeed_udma_set_tx_wptr(dma->ch, tx_rb->head); ++} ++ ++static void ast8250_dma_pops_hook(struct uart_port *port) ++{ ++ static int first = 1; ++ ++ if (first) { ++ ast8250_pops = *port->ops; ++ ast8250_pops.start_tx = ast8250_dma_start_tx; ++ } ++ ++ first = 0; ++ port->ops = &ast8250_pops; ++} ++ ++static void ast8250_vuart_init(struct ast8250_data *data) ++{ ++ u8 reg; ++ struct ast8250_vuart *vuart = &data->vuart; ++ ++ /* IO port address */ ++ writeb((u8)(vuart->port >> 0), data->regs + VUART_ADDRL); ++ writeb((u8)(vuart->port >> 8), data->regs + VUART_ADDRH); ++ ++ /* SIRQ number */ ++ reg = readb(data->regs + VUART_GCRB); ++ reg &= ~VUART_GCRB_HOST_SIRQ_MASK; ++ reg |= ((vuart->sirq << VUART_GCRB_HOST_SIRQ_SHIFT) & VUART_GCRB_HOST_SIRQ_MASK); ++ writeb(reg, data->regs + VUART_GCRB); ++ ++ /* SIRQ polarity */ ++ reg = readb(data->regs + VUART_GCRA); ++ if (vuart->sirq_pol) ++ reg |= VUART_GCRA_SIRQ_POLARITY; ++ else ++ reg &= ~VUART_GCRA_SIRQ_POLARITY; ++ writeb(reg, data->regs + VUART_GCRA); ++} ++ ++static void ast8250_vuart_set_host_tx_discard(struct ast8250_data *data, bool discard) ++{ ++ u8 reg; ++ ++ reg = readb(data->regs + VUART_GCRA); ++ if (discard) ++ reg &= ~VUART_GCRA_DISABLE_HOST_TX_DISCARD; ++ else ++ reg |= VUART_GCRA_DISABLE_HOST_TX_DISCARD; ++ writeb(reg, data->regs + VUART_GCRA); ++} ++ ++static void ast8250_vuart_set_enable(struct ast8250_data *data, bool enable) ++{ ++ u8 reg; ++ ++ reg = readb(data->regs + VUART_GCRA); ++ if (enable) ++ reg |= VUART_GCRA_VUART_EN; ++ else ++ reg &= ~VUART_GCRA_VUART_EN; ++ writeb(reg, data->regs + VUART_GCRA); ++} ++ ++static int ast8250_handle_irq(struct uart_port *port) ++{ ++ u32 iir = port->serial_in(port, UART_IIR); ++ return serial8250_handle_irq(port, iir); ++} ++ ++static int ast8250_startup(struct uart_port *port) ++{ ++ int rc = 0; ++ struct ast8250_data *data = port->private_data; ++ struct ast8250_udma *dma; ++ ++ if (data->is_vuart) ++ ast8250_vuart_set_host_tx_discard(data, false); ++ ++ if (data->use_dma) { ++ dma = &data->dma; ++ ++ dma->tx_rbsz = DMA_TX_BUFSZ; ++ dma->rx_rbsz = DMA_RX_BUFSZ; ++ ++ /* ++ * We take the xmit buffer passed from upper layers as ++ * the DMA TX buffer and allocate a new buffer for the ++ * RX use. ++ * ++ * To keep the TX/RX operation consistency, we use the ++ * streaming DMA interface instead of the coherent one ++ */ ++ dma->tx_rb = &port->state->xmit; ++ dma->rx_rb->buf = kzalloc(data->dma.rx_rbsz, GFP_KERNEL); ++ if (IS_ERR_OR_NULL(dma->rx_rb->buf)) { ++ dev_err(port->dev, "failed to allcoate RX DMA buffer\n"); ++ rc = -ENOMEM; ++ goto out; ++ } ++ ++ dma->tx_addr = dma_map_single(port->dev, dma->tx_rb->buf, ++ dma->tx_rbsz, DMA_TO_DEVICE); ++ if (dma_mapping_error(port->dev, dma->tx_addr)) { ++ dev_err(port->dev, "failed to map streaming TX DMA region\n"); ++ rc = -ENOMEM; ++ goto free_dma_n_out; ++ } ++ ++ dma->rx_addr = dma_map_single(port->dev, dma->rx_rb->buf, ++ dma->rx_rbsz, DMA_FROM_DEVICE); ++ if (dma_mapping_error(port->dev, dma->rx_addr)) { ++ dev_err(port->dev, "failed to map streaming RX DMA region\n"); ++ rc = -ENOMEM; ++ goto free_dma_n_out; ++ } ++ ++ rc = aspeed_udma_request_tx_chan(dma->ch, dma->tx_addr, ++ dma->tx_rb, dma->tx_rbsz, ast8250_dma_tx_complete, port, dma->tx_tmout_dis); ++ if (rc) { ++ dev_err(port->dev, "failed to request DMA TX channel\n"); ++ goto free_dma_n_out; ++ } ++ ++ rc = aspeed_udma_request_rx_chan(dma->ch, dma->rx_addr, ++ dma->rx_rb, dma->rx_rbsz, ast8250_dma_rx_complete, port, dma->tx_tmout_dis); ++ if (rc) { ++ dev_err(port->dev, "failed to request DMA RX channel\n"); ++ goto free_dma_n_out; ++ } ++ ++ ast8250_dma_pops_hook(port); ++ ++ aspeed_udma_tx_chan_ctrl(dma->ch, ASPEED_UDMA_OP_ENABLE); ++ aspeed_udma_rx_chan_ctrl(dma->ch, ASPEED_UDMA_OP_ENABLE); ++ } ++ ++ memset(&port->icount, 0, sizeof(port->icount)); ++ return serial8250_do_startup(port); ++ ++free_dma_n_out: ++ kfree(dma->rx_rb->buf); ++out: ++ return rc; ++} ++ ++static void ast8250_shutdown(struct uart_port *port) ++{ ++ int rc; ++ struct ast8250_data *data = port->private_data; ++ struct ast8250_udma *dma; ++ ++ if (data->use_dma) { ++ dma = &data->dma; ++ ++ aspeed_udma_tx_chan_ctrl(dma->ch, ASPEED_UDMA_OP_DISABLE); ++ aspeed_udma_rx_chan_ctrl(dma->ch, ASPEED_UDMA_OP_DISABLE); ++ ++ rc = aspeed_udma_free_tx_chan(dma->ch); ++ if (rc) ++ dev_err(port->dev, "failed to free DMA TX channel, rc=%d\n", rc); ++ ++ rc = aspeed_udma_free_rx_chan(dma->ch); ++ if (rc) ++ dev_err(port->dev, "failed to free DMA TX channel, rc=%d\n", rc); ++ ++ dma_unmap_single(port->dev, dma->tx_addr, ++ dma->tx_rbsz, DMA_TO_DEVICE); ++ dma_unmap_single(port->dev, dma->rx_addr, ++ dma->rx_rbsz, DMA_FROM_DEVICE); ++ ++ if (dma->rx_rb->buf) ++ kfree(dma->rx_rb->buf); ++ } ++ ++ if (data->is_vuart) ++ ast8250_vuart_set_host_tx_discard(data, true); ++ ++ serial8250_do_shutdown(port); ++} ++ ++static int __maybe_unused ast8250_suspend(struct device *dev) ++{ ++ struct ast8250_data *data = dev_get_drvdata(dev); ++ serial8250_suspend_port(data->line); ++ return 0; ++} ++ ++static int __maybe_unused ast8250_resume(struct device *dev) ++{ ++ struct ast8250_data *data = dev_get_drvdata(dev); ++ serial8250_resume_port(data->line); ++ return 0; ++} ++ ++static int ast8250_probe(struct platform_device *pdev) ++{ ++ int rc; ++ struct uart_8250_port uart = {}; ++ struct uart_port *port = &uart.port; ++ struct device *dev = &pdev->dev; ++ struct ast8250_data *data; ++ ++ struct resource *res; ++ u32 irq; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (data == NULL) ++ return -ENOMEM; ++ ++ data->dma.rx_rb = devm_kzalloc(dev, sizeof(data->dma.rx_rb), GFP_KERNEL); ++ if (data->dma.rx_rb == NULL) ++ return -ENOMEM; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ if (irq != -EPROBE_DEFER) ++ dev_err(dev, "failed to get IRQ number\n"); ++ return irq; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (res == NULL) { ++ dev_err(dev, "failed to get register base\n"); ++ return -ENODEV; ++ } ++ ++ data->regs = devm_ioremap(dev, res->start, resource_size(res)); ++ if (IS_ERR(data->regs)) { ++ dev_err(dev, "failed to map registers\n"); ++ return PTR_ERR(data->regs); ++ } ++ ++ data->clk = devm_clk_get(dev, NULL); ++ if (IS_ERR(data->clk)) { ++ dev_err(dev, "failed to get clocks\n"); ++ return -ENODEV; ++ } ++ ++ rc = clk_prepare_enable(data->clk); ++ if (rc) { ++ dev_err(dev, "failed to enable clock\n"); ++ return rc; ++ } ++ ++ data->rst = devm_reset_control_get_optional_exclusive(dev, NULL); ++ if (!IS_ERR(data->rst)) ++ reset_control_deassert(data->rst); ++ ++ data->is_vuart = of_property_read_bool(dev->of_node, "virtual"); ++ if (data->is_vuart) { ++ rc = of_property_read_u32(dev->of_node, "port", &data->vuart.port); ++ if (rc) { ++ dev_err(dev, "failed to get VUART port address\n"); ++ return -ENODEV; ++ } ++ ++ rc = of_property_read_u32(dev->of_node, "sirq", &data->vuart.sirq); ++ if (rc) { ++ dev_err(dev, "failed to get VUART SIRQ number\n"); ++ return -ENODEV; ++ } ++ ++ rc = of_property_read_u32(dev->of_node, "sirq-polarity", &data->vuart.sirq_pol); ++ if (rc) { ++ dev_err(dev, "failed to get VUART SIRQ polarity\n"); ++ return -ENODEV; ++ } ++ ++ ast8250_vuart_init(data); ++ ast8250_vuart_set_host_tx_discard(data, true); ++ ast8250_vuart_set_enable(data, true); ++ } ++ ++ data->use_dma = of_property_read_bool(dev->of_node, "dma-mode"); ++ if (data->use_dma) { ++ rc = of_property_read_u32(dev->of_node, "dma-channel", &data->dma.ch); ++ if (rc) { ++ dev_err(dev, "failed to get DMA channel\n"); ++ return -ENODEV; ++ } ++ ++ data->dma.tx_tmout_dis = of_property_read_bool(dev->of_node, "dma-tx-timeout-disable"); ++ data->dma.rx_tmout_dis = of_property_read_bool(dev->of_node, "dma-rx-timeout-disable"); ++ } ++ ++ spin_lock_init(&port->lock); ++ port->dev = dev; ++ port->type = PORT_16550; ++ port->irq = irq; ++ port->line = of_alias_get_id(dev->of_node, "serial"); ++ port->handle_irq = ast8250_handle_irq; ++ port->mapbase = res->start; ++ port->mapsize = resource_size(res); ++ port->membase = data->regs; ++ port->uartclk = clk_get_rate(data->clk); ++ port->regshift = 2; ++ port->iotype = UPIO_MEM32; ++ port->flags = UPF_FIXED_PORT | UPF_SHARE_IRQ; ++ port->startup = ast8250_startup; ++ port->shutdown = ast8250_shutdown; ++ port->private_data = data; ++ ++ data->line = serial8250_register_8250_port(&uart); ++ if (data->line < 0) { ++ dev_err(dev, "failed to register 8250 port\n"); ++ return data->line; ++ } ++ ++ pm_runtime_set_active(&pdev->dev); ++ pm_runtime_enable(&pdev->dev); ++ ++ platform_set_drvdata(pdev, data); ++ return 0; ++} ++ ++static int ast8250_remove(struct platform_device *pdev) ++{ ++ struct ast8250_data *data = platform_get_drvdata(pdev); ++ ++ if (data->is_vuart) ++ ast8250_vuart_set_enable(data, false); ++ ++ serial8250_unregister_port(data->line); ++ return 0; ++} ++ ++static const struct dev_pm_ops ast8250_pm_ops = { ++ SET_SYSTEM_SLEEP_PM_OPS(ast8250_suspend, ast8250_resume) ++}; ++ ++static const struct of_device_id ast8250_of_match[] = { ++ { .compatible = "aspeed,ast2500-uart" }, ++ { .compatible = "aspeed,ast2600-uart" }, ++}; ++ ++static struct platform_driver ast8250_platform_driver = { ++ .driver = { ++ .name = DEVICE_NAME, ++ .pm = &ast8250_pm_ops, ++ .of_match_table = ast8250_of_match, ++ }, ++ .probe = ast8250_probe, ++ .remove = ast8250_remove, ++}; ++ ++module_platform_driver(ast8250_platform_driver); ++ ++MODULE_AUTHOR("Chia-Wei Wang <chiawei_wang@aspeedtech.com>"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Aspeed UART Driver"); +diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig +index d1b3c2373fa4..b62a972c9c97 100644 +--- a/drivers/tty/serial/8250/Kconfig ++++ b/drivers/tty/serial/8250/Kconfig +@@ -249,6 +249,14 @@ config SERIAL_8250_ACCENT + To compile this driver as a module, choose M here: the module + will be called 8250_accent. + ++config SERIAL_8250_ASPEED ++ tristate "Aspeed serial port support" ++ depends on SERIAL_8250 && ARCH_ASPEED ++ select ASPEED_UDMA ++ help ++ If you have a system using an Aspeed ASTXXXX SoCs and wish to make use ++ of its UARTs, say Y to this option. If unsure, say N. ++ + config SERIAL_8250_ASPEED_VUART + tristate "Aspeed Virtual UART" + depends on SERIAL_8250 +diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile +index b9bcd73c8997..310375fe8d7e 100644 +--- a/drivers/tty/serial/8250/Makefile ++++ b/drivers/tty/serial/8250/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_SERIAL_8250_EXAR) += 8250_exar.o + obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o + obj-$(CONFIG_SERIAL_8250_CS) += serial_cs.o + obj-$(CONFIG_SERIAL_8250_ACORN) += 8250_acorn.o ++obj-$(CONFIG_SERIAL_8250_ASPEED) += 8250_aspeed.o + obj-$(CONFIG_SERIAL_8250_ASPEED_VUART) += 8250_aspeed_vuart.o + obj-$(CONFIG_SERIAL_8250_BCM2835AUX) += 8250_bcm2835aux.o + obj-$(CONFIG_SERIAL_8250_CONSOLE) += 8250_early.o +diff --git a/include/linux/soc/aspeed/aspeed-udma.h b/include/linux/soc/aspeed/aspeed-udma.h +new file mode 100644 +index 000000000000..33acea745f1c +--- /dev/null ++++ b/include/linux/soc/aspeed/aspeed-udma.h +@@ -0,0 +1,30 @@ ++#ifndef __ASPEED_UDMA_H__ ++#define __ASPEED_UDMA_H__ ++ ++#include <linux/circ_buf.h> ++ ++typedef void (*aspeed_udma_cb_t)(int rb_rwptr, void *id); ++ ++enum aspeed_udma_ops { ++ ASPEED_UDMA_OP_ENABLE, ++ ASPEED_UDMA_OP_DISABLE, ++ ASPEED_UDMA_OP_RESET, ++}; ++ ++void aspeed_udma_set_tx_wptr(u32 ch_no, u32 wptr); ++void aspeed_udma_set_rx_rptr(u32 ch_no, u32 rptr); ++ ++void aspeed_udma_tx_chan_ctrl(u32 ch_no, enum aspeed_udma_ops op); ++void aspeed_udma_rx_chan_ctrl(u32 ch_no, enum aspeed_udma_ops op); ++ ++int aspeed_udma_request_tx_chan(u32 ch_no, dma_addr_t addr, ++ struct circ_buf *rb, u32 rb_sz, ++ aspeed_udma_cb_t cb, void *id, bool en_tmout); ++int aspeed_udma_request_rx_chan(u32 ch_no, dma_addr_t addr, ++ struct circ_buf *rb, u32 rb_sz, ++ aspeed_udma_cb_t cb, void *id, bool en_tmout); ++ ++int aspeed_udma_free_tx_chan(u32 ch_no); ++int aspeed_udma_free_rx_chan(u32 ch_no); ++ ++#endif +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0002-serial-8250-Fix-RX-DMA-time-out-property.patch b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0002-serial-8250-Fix-RX-DMA-time-out-property.patch new file mode 100644 index 000000000..bbadb8b01 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0002-serial-8250-Fix-RX-DMA-time-out-property.patch @@ -0,0 +1,29 @@ +From 64897e97edeefc7fbc89b07aaece760009ba76a0 Mon Sep 17 00:00:00 2001 +From: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com> +Date: Mon, 21 Dec 2020 16:27:20 +0800 +Subject: [PATCH] serial: 8250: Fix RX DMA time out property + +Fix the typo that passing the TX DMA time out property +to the RX configuration. + +Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> +--- + drivers/tty/serial/8250/8250_aspeed.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/tty/serial/8250/8250_aspeed.c b/drivers/tty/serial/8250/8250_aspeed.c +index 1dc798298fca..fc14c86d3761 100644 +--- a/drivers/tty/serial/8250/8250_aspeed.c ++++ b/drivers/tty/serial/8250/8250_aspeed.c +@@ -266,7 +266,7 @@ static int ast8250_startup(struct uart_port *port) + } + + rc = aspeed_udma_request_rx_chan(dma->ch, dma->rx_addr, +- dma->rx_rb, dma->rx_rbsz, ast8250_dma_rx_complete, port, dma->tx_tmout_dis); ++ dma->rx_rb, dma->rx_rbsz, ast8250_dma_rx_complete, port, dma->rx_tmout_dis); + if (rc) { + dev_err(port->dev, "failed to request DMA RX channel\n"); + goto free_dma_n_out; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0003-serial-8250_aspeed-Make-port-type-fixed.patch b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0003-serial-8250_aspeed-Make-port-type-fixed.patch new file mode 100644 index 000000000..4a0e221b6 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0003-serial-8250_aspeed-Make-port-type-fixed.patch @@ -0,0 +1,57 @@ +From a7a8bf2f7df17f69a407abe21a14b3f0f2c7338c Mon Sep 17 00:00:00 2001 +From: Chia-Wei Wang <chiawei_wang@aspeedtech.com> +Date: Mon, 31 May 2021 15:39:59 +0800 +Subject: [PATCH] serial/8250_aspeed: Make port type fixed + +Make the UART port type fixed to 16550A to +avoid redundant probing. + +Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> +Change-Id: Id179725b1cd475cd52c18c43b6c312dcd912fc20 +--- + drivers/tty/serial/8250/8250_aspeed.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/drivers/tty/serial/8250/8250_aspeed.c b/drivers/tty/serial/8250/8250_aspeed.c +index fc14c86d3761..bb3955bb8c24 100644 +--- a/drivers/tty/serial/8250/8250_aspeed.c ++++ b/drivers/tty/serial/8250/8250_aspeed.c +@@ -25,12 +25,12 @@ + + /* offsets for the aspeed virtual uart registers */ + #define VUART_GCRA 0x20 +-#define VUART_GCRA_VUART_EN BIT(0) +-#define VUART_GCRA_SIRQ_POLARITY BIT(1) +-#define VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5) ++#define VUART_GCRA_VUART_EN BIT(0) ++#define VUART_GCRA_SIRQ_POLARITY BIT(1) ++#define VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5) + #define VUART_GCRB 0x24 +-#define VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4) +-#define VUART_GCRB_HOST_SIRQ_SHIFT 4 ++#define VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4) ++#define VUART_GCRB_HOST_SIRQ_SHIFT 4 + #define VUART_ADDRL 0x28 + #define VUART_ADDRH 0x2c + +@@ -429,7 +429,7 @@ static int ast8250_probe(struct platform_device *pdev) + + spin_lock_init(&port->lock); + port->dev = dev; +- port->type = PORT_16550; ++ port->type = PORT_16550A; + port->irq = irq; + port->line = of_alias_get_id(dev->of_node, "serial"); + port->handle_irq = ast8250_handle_irq; +@@ -439,7 +439,7 @@ static int ast8250_probe(struct platform_device *pdev) + port->uartclk = clk_get_rate(data->clk); + port->regshift = 2; + port->iotype = UPIO_MEM32; +- port->flags = UPF_FIXED_PORT | UPF_SHARE_IRQ; ++ port->flags = UPF_FIXED_TYPE | UPF_FIXED_PORT | UPF_SHARE_IRQ; + port->startup = ast8250_startup; + port->shutdown = ast8250_shutdown; + port->private_data = data; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0004-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0004-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch new file mode 100644 index 000000000..757b00a25 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/0004-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch @@ -0,0 +1,269 @@ +From a9b43dbf68a4b5650dd98332243d4a2951717eb5 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 27 Apr 2020 12:11:06 -0700 +Subject: [PATCH] Add a workaround to cover UART interrupt bug in AST2600 A0 + +This commit adds a workaround to cover UART interrupt bug in +AST2600 A0 revision. It makes infinite reading on the UART +0x7c +register for clearing abnormal interrupts in every milli-second. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + .../arm/boot/dts/aspeed-bmc-intel-ast2600.dts | 4 ++ + drivers/tty/serial/8250/8250_aspeed.c | 56 ++++++++++++++++- + drivers/tty/serial/8250/8250_early.c | 1 + + drivers/tty/serial/8250/8250_of.c | 63 +++++++++++++++++++ + 4 files changed, 123 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +index c648c123c315..bf375634082c 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +@@ -392,6 +392,7 @@ + }; + + &uart1 { ++ reg = <0x1e783000 0x20>, <0x1e6e2014 0x4>, <0x1e78307c 0x4>; + status = "okay"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default +@@ -404,6 +405,7 @@ + }; + + &uart2 { ++ reg = <0x1e78d000 0x20>, <0x1e6e2014 0x4>, <0x1e78d07c 0x4>; + status = "okay"; + pinctrl-0 = <&pinctrl_txd2_default + &pinctrl_rxd2_default +@@ -416,11 +418,13 @@ + }; + + &uart3 { ++ reg = <0x1e78e000 0x20>, <0x1e6e2014 0x4>, <0x1e78e07c 0x4>; + status = "okay"; + pinctrl-0 = <>; + }; + + &uart4 { ++ reg = <0x1e78f000 0x20>, <0x1e6e2014 0x4>, <0x1e78f07c 0x4>; + status = "okay"; + pinctrl-0 = <>; + }; +diff --git a/drivers/tty/serial/8250/8250_aspeed.c b/drivers/tty/serial/8250/8250_aspeed.c +index bb3955bb8c24..1ba4423d5e2f 100644 +--- a/drivers/tty/serial/8250/8250_aspeed.c ++++ b/drivers/tty/serial/8250/8250_aspeed.c +@@ -74,6 +74,10 @@ struct ast8250_data { + + struct ast8250_vuart vuart; + struct ast8250_udma dma; ++ ++ struct workqueue_struct *work_queue; ++ struct delayed_work work_handler; ++ void __iomem *wa_base; + }; + + static void ast8250_dma_tx_complete(int tx_rb_rptr, void *id) +@@ -336,12 +340,25 @@ static int __maybe_unused ast8250_resume(struct device *dev) + return 0; + } + ++#define WA_DELAY_JIFFIES msecs_to_jiffies(1) ++static void ast8250_clear_abnormal_int_flags(struct work_struct *work) ++{ ++ struct delayed_work *dwork = to_delayed_work(work); ++ struct ast8250_data *data = container_of(dwork, struct ast8250_data, ++ work_handler); ++ ++ (void) readl(data->wa_base); ++ queue_delayed_work(data->work_queue, &data->work_handler, ++ WA_DELAY_JIFFIES); ++} ++ + static int ast8250_probe(struct platform_device *pdev) + { + int rc; + struct uart_8250_port uart = {}; + struct uart_port *port = &uart.port; + struct device *dev = &pdev->dev; ++ void __iomem *chip_id_base; + struct ast8250_data *data; + + struct resource *res; +@@ -454,6 +471,37 @@ static int ast8250_probe(struct platform_device *pdev) + pm_runtime_enable(&pdev->dev); + + platform_set_drvdata(pdev, data); ++ ++ #define REV_ID_AST2600A0 0x05000303 ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!res || resource_size(res) < 2) ++ return 0; ++ ++ data->wa_base = devm_platform_ioremap_resource(pdev, 2); ++ if (IS_ERR(data->wa_base)) ++ return 0; ++ ++ chip_id_base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(chip_id_base)) ++ return 0; ++ ++ if (readl(chip_id_base) == REV_ID_AST2600A0) { ++ data->work_queue = alloc_ordered_workqueue(pdev->name, 0); ++ if (data->work_queue) { ++ INIT_DELAYED_WORK(&data->work_handler, ++ ast8250_clear_abnormal_int_flags); ++ queue_delayed_work(data->work_queue, ++ &data->work_handler, ++ WA_DELAY_JIFFIES); ++ dev_info(dev, "AST2600 A0 WA initiated\n"); ++ } else { ++ dev_err(dev, "Can't enable AST2600 A0 UART WA\n"); ++ } ++ } ++ ++ devm_iounmap(dev, chip_id_base); ++ devm_release_mem_region(dev, res->start, resource_size(res)); ++ + return 0; + } + +@@ -464,7 +512,13 @@ static int ast8250_remove(struct platform_device *pdev) + if (data->is_vuart) + ast8250_vuart_set_enable(data, false); + +- serial8250_unregister_port(data->line); ++ if (data->work_queue) { ++ cancel_delayed_work_sync(&data->work_handler); ++ destroy_workqueue(data->work_queue); ++ } ++ ++ serial8250_unregister_port(data->line); ++ + return 0; + } + +diff --git a/drivers/tty/serial/8250/8250_early.c b/drivers/tty/serial/8250/8250_early.c +index c171ce6db691..6d7bb63fe0c6 100644 +--- a/drivers/tty/serial/8250/8250_early.c ++++ b/drivers/tty/serial/8250/8250_early.c +@@ -180,6 +180,7 @@ OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup); + OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup); + OF_EARLYCON_DECLARE(uart, "nvidia,tegra20-uart", early_serial8250_setup); + OF_EARLYCON_DECLARE(uart, "snps,dw-apb-uart", early_serial8250_setup); ++OF_EARLYCON_DECLARE(uart, "aspeed,ast2600-uart", early_serial8250_setup); + + #ifdef CONFIG_SERIAL_8250_OMAP + +diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c +index bce28729dd7b..6159d8af6fef 100644 +--- a/drivers/tty/serial/8250/8250_of.c ++++ b/drivers/tty/serial/8250/8250_of.c +@@ -15,6 +15,7 @@ + #include <linux/pm_runtime.h> + #include <linux/clk.h> + #include <linux/reset.h> ++#include <linux/workqueue.h> + + #include "8250.h" + +@@ -23,6 +24,9 @@ struct of_serial_info { + struct reset_control *rst; + int type; + int line; ++ struct workqueue_struct *work_queue; ++ struct delayed_work work_handler; ++ void __iomem *wa_base; + }; + + /* +@@ -181,6 +185,18 @@ static int of_platform_serial_setup(struct platform_device *ofdev, + return ret; + } + ++#define WA_DELAY_JIFFIES msecs_to_jiffies(1) ++static void clear_abnormal_int_flags(struct work_struct *work) ++{ ++ struct delayed_work *dwork = to_delayed_work(work); ++ struct of_serial_info *info = container_of(dwork, struct of_serial_info, ++ work_handler); ++ ++ (void) readl(info->wa_base); ++ queue_delayed_work(info->work_queue, &info->work_handler, ++ WA_DELAY_JIFFIES); ++} ++ + /* + * Try to register a serial port + */ +@@ -233,6 +249,47 @@ static int of_platform_serial_probe(struct platform_device *ofdev) + if (ret < 0) + goto err_dispose; + ++ if (of_device_is_compatible(ofdev->dev.of_node, ++ "aspeed,ast2600-uart")) { ++ #define REV_ID_AST2600A0 0x05000303 ++ void __iomem *chip_id_base; ++ struct resource *res = platform_get_resource(ofdev, ++ IORESOURCE_MEM, 1); ++ ++ if (!res || resource_size(res) < 2) ++ goto skip_wa; ++ ++ info->wa_base = devm_platform_ioremap_resource(ofdev, 2); ++ if (IS_ERR(info->wa_base)) ++ goto skip_wa; ++ ++ chip_id_base = devm_ioremap_resource(&ofdev->dev, res); ++ if (IS_ERR(chip_id_base)) ++ goto skip_wa; ++ ++ if (readl(chip_id_base) == REV_ID_AST2600A0) { ++ info->work_queue = alloc_ordered_workqueue(ofdev->name, ++ 0); ++ if (info->work_queue) { ++ INIT_DELAYED_WORK(&info->work_handler, ++ clear_abnormal_int_flags); ++ queue_delayed_work(info->work_queue, ++ &info->work_handler, ++ WA_DELAY_JIFFIES); ++ dev_info(&ofdev->dev, ++ "AST2600 A0 WA initiated\n"); ++ } else { ++ dev_err(&ofdev->dev, ++ "Can't enable AST2600 A0 UART WA\n"); ++ } ++ } ++ ++ devm_iounmap(&ofdev->dev, chip_id_base); ++ devm_release_mem_region(&ofdev->dev, res->start, ++ resource_size(res)); ++ } ++ ++skip_wa: + info->type = port_type; + info->line = ret; + platform_set_drvdata(ofdev, info); +@@ -254,6 +311,11 @@ static int of_platform_serial_remove(struct platform_device *ofdev) + { + struct of_serial_info *info = platform_get_drvdata(ofdev); + ++ if (info->work_queue) { ++ cancel_delayed_work_sync(&info->work_handler); ++ destroy_workqueue(info->work_queue); ++ } ++ + serial8250_unregister_port(info->line); + + reset_control_assert(info->rst); +@@ -324,6 +386,7 @@ static const struct of_device_id of_platform_serial_table[] = { + { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, }, + { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, }, + { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, }, ++ { .compatible = "aspeed,ast2600-uart", .data = (void *)PORT_16550A, }, + { /* end of list */ }, + }; + MODULE_DEVICE_TABLE(of, of_platform_serial_table); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/intel-ast2600.cfg b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/intel-ast2600.cfg new file mode 100644 index 000000000..9bd1535be --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed/intel-ast2600.cfg @@ -0,0 +1,23 @@ +CONFIG_SENSORS_ASPEED=n +CONFIG_SENSORS_ASPEED_G6=y +CONFIG_SPI_ASPEED_SMC=y +CONFIG_SPI_FMC=y +CONFIG_I3C=y +CONFIG_DW_I3C_MASTER=y +CONFIG_I3CDEV=y +CONFIG_U_SERIAL_CONSOLE=n +CONFIG_HIGHMEM=n +CONFIG_I2C_SLAVE_MQUEUE=y +CONFIG_PINCTRL_ASPEED_G6=y +CONFIG_DEBUG_LL=n +CONFIG_DEBUG_LL_UART_8250=n +CONFIG_EARLY_PRINTK=n +CONFIG_LOG_BUF_SHIFT=21 +CONFIG_DEBUG_PINCTRL=n +CONFIG_SUSPEND=n +CONFIG_ASPEED_MCTP=y +CONFIG_KERNEL_LZO=n +CONFIG_KERNEL_XZ=y +CONFIG_SERIAL_8250_DW=n +CONFIG_SERIAL_8250_ASPEED=y +CONFIG_ASPEED_UDMA=y diff --git a/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed_%.bbappend new file mode 100644 index 000000000..df3901d77 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -0,0 +1,10 @@ +COMPATIBLE_MACHINE = "intel-ast2600" +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://intel-ast2600.cfg \ + file://0001-serial-8250-Add-Aspeed-UART-driver-with-DMA-supporte.patch \ + file://0002-serial-8250-Fix-RX-DMA-time-out-property.patch \ + file://0003-serial-8250_aspeed-Make-port-type-fixed.patch \ + file://0004-Add-a-workaround-to-cover-UART-interrupt-bug-in-AST2.patch \ + " diff --git a/meta-openbmc-mods/meta-ast2600/recipes.txt b/meta-openbmc-mods/meta-ast2600/recipes.txt new file mode 100644 index 000000000..2f89155c3 --- /dev/null +++ b/meta-openbmc-mods/meta-ast2600/recipes.txt @@ -0,0 +1,3 @@ +recipes-bsp - Anything with links to specific hardware or hardware configuration information +recipes-kernel - The kernel and generic applications/libraries with strong kernel dependencies +recipes-phosphor - Phosphor OpenBMC applications and configuration diff --git a/meta-openbmc-mods/meta-common-small/conf/layer.conf b/meta-openbmc-mods/meta-common-small/conf/layer.conf new file mode 100644 index 000000000..a8c66a9da --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/conf/layer.conf @@ -0,0 +1,11 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "common-small" +BBFILE_PATTERN_common-small = "^${LAYERDIR}/" +BBFILE_PRIORITY_common-small = "9" +LAYERSERIES_COMPAT_common-small = "gatesgarth hardknott honister" diff --git a/meta-openbmc-mods/meta-common-small/recipes-core/systemd/systemd_%.bbappend b/meta-openbmc-mods/meta-common-small/recipes-core/systemd/systemd_%.bbappend new file mode 100644 index 000000000..547b6ae30 --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-core/systemd/systemd_%.bbappend @@ -0,0 +1,14 @@ +# add some configuration overrides for systemd default /usr/lib/tmpfiles.d/ + +LICENSE = "GPL-2.0" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +# Disable udev hwdb +RRECOMMENDS:${PN}:remove += "udev-hwdb" +PACKAGES:remove += "udev-hwdb" + +do_install:append() { + rm -rf ${D}${rootlibexecdir}/udev/hwdb.d + rm -f ${D}${sysconfdir}/udev/hwdb.bin +} diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python-pycryptodomex.inc b/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python-pycryptodomex.inc new file mode 100644 index 000000000..83aa4bcd8 --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python-pycryptodomex.inc @@ -0,0 +1,28 @@ +SUMMARY = "Cryptographic library for Python" +DESCRIPTION = "PyCryptodome is a self-contained Python package of low-level\ + cryptographic primitives." +HOMEPAGE = "http://www.pycryptodome.org" +LICENSE = "PD & BSD-2-Clause" +LIC_FILES_CHKSUM = "file://LICENSE.rst;md5=6dc0e2a13d2f25d6f123c434b761faba" + +SRC_URI[md5sum] = "46ba513d95b6e323734074d960a7d57b" +SRC_URI[sha256sum] = "22d970cee5c096b9123415e183ae03702b2cd4d3ba3f0ced25c4e1aba3967167" + +inherit pypi + +RDEPENDS:${PN} += " \ + ${PYTHON_PN}-io \ + ${PYTHON_PN}-math \ +" + +RDEPENDS:${PN}-tests += " \ + ${PYTHON_PN}-unittest \ +" + +PACKAGES =+ "${PN}-tests" + +FILES:${PN}-tests += " \ + ${PYTHON_SITEPACKAGES_DIR}/Cryptodome/SelfTest/ \ + ${PYTHON_SITEPACKAGES_DIR}/Cryptodome/SelfTest/__pycache__/ \ +" +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python3-pycryptodomex_3.9.4.bb b/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python3-pycryptodomex_3.9.4.bb new file mode 100644 index 000000000..be66430e1 --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/python/python3-pycryptodomex_3.9.4.bb @@ -0,0 +1,2 @@ +require python-pycryptodomex.inc +inherit setuptools3 diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0001-hw-arm-aspeed-Add-an-intel-ast2500-machine-type.patch b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0001-hw-arm-aspeed-Add-an-intel-ast2500-machine-type.patch new file mode 100644 index 000000000..4db72085d --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0001-hw-arm-aspeed-Add-an-intel-ast2500-machine-type.patch @@ -0,0 +1,99 @@ +From 48aa1135cffd72d2c2f4067f3e96ae25d6dbfc30 Mon Sep 17 00:00:00 2001 +From: "Wludzik, Jozef" <jozef.wludzik@intel.com> +Date: Mon, 16 Nov 2020 15:48:04 +0100 +Subject: [PATCH] hw/arm/aspeed: Add an intel-ast2500 machine type + +Include the HW strap setting and some I2C temperature sensors. + +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + hw/arm/aspeed.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 54 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index fcb1a7cd..514dca85 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -68,6 +68,21 @@ struct AspeedMachineState { + SCU_HW_STRAP_MAC0_RGMII) & \ + ~SCU_HW_STRAP_2ND_BOOT_WDT) + ++/* intel ast2500 hardware value: 0xF3CCC286 */ ++#define INTEL_AST2500_BMC_HW_STRAP1 (( \ ++ AST2500_HW_STRAP1_DEFAULTS | \ ++ SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ ++ SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ ++ SCU_AST2500_HW_STRAP_UART_DEBUG | \ ++ SCU_AST2500_HW_STRAP_ESPI_ENABLE | \ ++ SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ ++ SCU_HW_STRAP_GPIOE_PT_EN | \ ++ SCU_AST2400_HW_STRAP_ACPI_DIS | \ ++ SCU_HW_STRAP_CLK_48M_IN | \ ++ SCU_HW_STRAP_VGA_CLASS_CODE | \ ++ SCU_HW_STRAP_MAC1_RGMII) & \ ++ ~SCU_HW_STRAP_2ND_BOOT_WDT) ++ + /* Romulus hardware value: 0xF10AD206 */ + #define ROMULUS_BMC_HW_STRAP1 ( \ + AST2500_HW_STRAP1_DEFAULTS | \ +@@ -417,6 +432,24 @@ static void ast2500_evb_i2c_init(AspeedMachineState *bmc) + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 11), "ds1338", 0x32); + } + ++static void intel_ast2500_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = &bmc->soc; ++ DeviceState *dev; ++ ++ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp421", 0x4d)); ++ object_property_set_int(OBJECT(dev), "temperature0", 50000, &error_abort); ++ /* The s2600wf expects a TMP75 but a TMP105 is compatible */ ++ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x48)); ++ object_property_set_int(OBJECT(dev), "temperature", 50000, &error_abort); ++ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x49)); ++ object_property_set_int(OBJECT(dev), "temperature", 50000, &error_abort); ++ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x4a)); ++ object_property_set_int(OBJECT(dev), "temperature", 50000, &error_abort); ++ dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 6), "tmp105", 0x4b)); ++ object_property_set_int(OBJECT(dev), "temperature", 50000, &error_abort); ++} ++ + static void ast2600_evb_i2c_init(AspeedMachineState *bmc) + { + /* Start with some devices on our I2C busses */ +@@ -620,6 +653,23 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) + aspeed_soc_num_cpus(amc->soc_name); + }; + ++static void aspeed_machine_intel_ast2500_class_init(ObjectClass *oc, void *data) ++{ ++ MachineClass *mc = MACHINE_CLASS(oc); ++ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); ++ ++ mc->desc = "Intel AST2500 BMC (ARM1176)"; ++ amc->soc_name = "ast2500-a1"; ++ amc->hw_strap1 = INTEL_AST2500_BMC_HW_STRAP1; ++ amc->fmc_model = "n25q512a"; ++ amc->spi_model = "n25q512a"; ++ amc->num_cs = 1; ++ amc->i2c_init = intel_ast2500_i2c_init; ++ mc->default_ram_size = 512 * MiB; ++ mc->default_cpus = mc->min_cpus = mc->max_cpus = ++ aspeed_soc_num_cpus(amc->soc_name); ++}; ++ + static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) + { + MachineClass *mc = MACHINE_CLASS(oc); +@@ -735,6 +785,10 @@ static const TypeInfo aspeed_machine_types[] = { + .name = MACHINE_TYPE_NAME("ast2500-evb"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_ast2500_evb_class_init, ++ }, { ++ .name = MACHINE_TYPE_NAME("intel-ast2500"), ++ .parent = TYPE_ASPEED_MACHINE, ++ .class_init = aspeed_machine_intel_ast2500_class_init, + }, { + .name = MACHINE_TYPE_NAME("romulus-bmc"), + .parent = TYPE_ASPEED_MACHINE, diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0002-hw-arm-aspeed-Add-an-intel-ast2600-machine-type.patch b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0002-hw-arm-aspeed-Add-an-intel-ast2600-machine-type.patch new file mode 100644 index 000000000..2d5bd8faa --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0002-hw-arm-aspeed-Add-an-intel-ast2600-machine-type.patch @@ -0,0 +1,65 @@ +From 165f4bc884b9f9ed5bf568f5b930dba6835a2edd Mon Sep 17 00:00:00 2001 +From: "Wludzik, Jozef" <jozef.wludzik@intel.com> +Date: Mon, 16 Nov 2020 15:52:12 +0100 +Subject: [PATCH] hw/arm/aspeed: Add an intel-ast2600 machine type + +Signed-off-by: Wludzik, Jozef <jozef.wludzik@intel.com> +--- + hw/arm/aspeed.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 514dca85..be9e1455 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -126,6 +126,10 @@ struct AspeedMachineState { + #define AST2600_EVB_HW_STRAP1 0x000000C0 + #define AST2600_EVB_HW_STRAP2 0x00000003 + ++/* Intel AST2600 hardware value */ ++#define INTEL_AST2600_HW_STRAP1 0x00000000 ++#define INTEL_AST2600_HW_STRAP2 0x00000040 ++ + /* Tacoma hardware value */ + #define TACOMA_BMC_HW_STRAP1 0x00000000 + #define TACOMA_BMC_HW_STRAP2 0x00000040 +@@ -670,6 +674,25 @@ static void aspeed_machine_intel_ast2500_class_init(ObjectClass *oc, void *data) + aspeed_soc_num_cpus(amc->soc_name); + }; + ++static void aspeed_machine_intel_ast2600_class_init(ObjectClass *oc, void *data) ++{ ++ MachineClass *mc = MACHINE_CLASS(oc); ++ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); ++ ++ mc->desc = "Intel AST2600 BMC (Cortex A7)"; ++ amc->soc_name = "ast2600-a1"; ++ amc->hw_strap1 = INTEL_AST2600_HW_STRAP1; ++ amc->hw_strap2 = INTEL_AST2600_HW_STRAP2; ++ amc->fmc_model = "n25q512a"; ++ amc->spi_model = "n25q512a"; ++ amc->num_cs = 1; ++ amc->macs_mask = ASPEED_MAC1_ON | ASPEED_MAC2_ON | ASPEED_MAC3_ON; ++ amc->i2c_init = intel_ast2500_i2c_init; ++ mc->default_ram_size = 1 * GiB; ++ mc->default_cpus = mc->min_cpus = mc->max_cpus = ++ aspeed_soc_num_cpus(amc->soc_name); ++}; ++ + static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) + { + MachineClass *mc = MACHINE_CLASS(oc); +@@ -789,6 +812,10 @@ static const TypeInfo aspeed_machine_types[] = { + .name = MACHINE_TYPE_NAME("intel-ast2500"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_intel_ast2500_class_init, ++ }, { ++ .name = MACHINE_TYPE_NAME("intel-ast2600"), ++ .parent = TYPE_ASPEED_MACHINE, ++ .class_init = aspeed_machine_intel_ast2600_class_init, + }, { + .name = MACHINE_TYPE_NAME("romulus-bmc"), + .parent = TYPE_ASPEED_MACHINE, +-- +2.16.6 + diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0003-Remove-clearing-aspeed-GPIO-registers.patch b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0003-Remove-clearing-aspeed-GPIO-registers.patch new file mode 100644 index 000000000..d1e9752a5 --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/files/0003-Remove-clearing-aspeed-GPIO-registers.patch @@ -0,0 +1,30 @@ +From c0f3add0f49818992f752d04f33204ee1f27e885 Mon Sep 17 00:00:00 2001 +From: "Wludzik, Jozef" <jozef.wludzik@intel.com> +Date: Mon, 30 Nov 2020 14:32:52 +0100 +Subject: [PATCH] Remove clearing aspeed GPIO registers + +Removed clearing aspeed GPIO registers to omit clearing set GPIO +lines at machine initialization. It does not affect aspeed +simulation. intel-ast machines boot with success. + +Signed-off-by: Wludzik, Jozef <jozef.wludzik@intel.com> +--- + hw/gpio/aspeed_gpio.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c +index 985a259e05..9f93a10887 100644 +--- a/hw/gpio/aspeed_gpio.c ++++ b/hw/gpio/aspeed_gpio.c +@@ -830,7 +830,7 @@ static void aspeed_gpio_reset(DeviceState *dev) + AspeedGPIOState *s = ASPEED_GPIO(dev); + + /* TODO: respect the reset tolerance registers */ +- memset(s->sets, 0, sizeof(s->sets)); ++ //memset(s->sets, 0, sizeof(s->sets)); + } + + static void aspeed_gpio_realize(DeviceState *dev, Error **errp) +-- +2.16.6 + diff --git a/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/qemu-system-native_%.bbappend b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/qemu-system-native_%.bbappend new file mode 100644 index 000000000..1bc423139 --- /dev/null +++ b/meta-openbmc-mods/meta-common-small/recipes-devtools/qemu/qemu-system-native_%.bbappend @@ -0,0 +1,24 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" +SRC_URI += "file://0001-hw-arm-aspeed-Add-an-intel-ast2500-machine-type.patch \ + file://0002-hw-arm-aspeed-Add-an-intel-ast2600-machine-type.patch \ + file://0003-Remove-clearing-aspeed-GPIO-registers.patch" + +QEMU_TARGETS = "arm" +EXTRA_OECONF = " \ + --prefix=${prefix} \ + --bindir=${bindir} \ + --includedir=${includedir} \ + --libdir=${libdir} \ + --mandir=${mandir} \ + --datadir=${datadir} \ + --docdir=${docdir}/${BPN} \ + --sysconfdir=${sysconfdir} \ + --libexecdir=${libexecdir} \ + --localstatedir=${localstatedir} \ + --disable-strip \ + --disable-werror \ + --extra-cflags='${CFLAGS}' \ + --extra-ldflags='${LDFLAGS}' \ + --python=${HOSTTOOLS_DIR}/python3 \ + ${PACKAGECONFIG_CONFARGS} \ + " diff --git a/meta-openbmc-mods/meta-common/COPYING.MIT b/meta-openbmc-mods/meta-common/COPYING.MIT new file mode 100644 index 000000000..89de35479 --- /dev/null +++ b/meta-openbmc-mods/meta-common/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/meta-openbmc-mods/meta-common/README b/meta-openbmc-mods/meta-common/README new file mode 100644 index 000000000..9d4a8a1e6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/README @@ -0,0 +1,64 @@ +This README file contains information on the contents of the +common layer. + +Please see the corresponding sections below for details. + + +Dependencies +============ + +This layer depends on: + + URI: git://git.openembedded.org/bitbake + branch: master + + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master + + URI: git://git.yoctoproject.org/xxxx + layers: xxxx + branch: master + + +Patches +======= + +Please submit any patches against the common layer to the +xxxx mailing list (xxxx@zzzz.org) and cc: the maintainer: + +Maintainer: XXX YYYYYY <xxx.yyyyyy@zzzzz.com> + + +Table of Contents +================= + + I. Adding the common layer to your build + II. Misc + + +I. Adding the common layer to your build +================================================= + +--- replace with specific instructions for the common layer --- + +In order to use this layer, you need to make the build system aware of +it. + +Assuming the common layer exists at the top-level of your +yocto build tree, you can add it to the build system by adding the +location of the common layer to bblayers.conf, along with any +other layers needed. e.g.: + + BBLAYERS ?= " \ + /path/to/yocto/meta \ + /path/to/yocto/meta-poky \ + /path/to/yocto/meta-yocto-bsp \ + /path/to/yocto/meta-common \ + " + + +II. Misc +======== + +--- replace with specific information about the common layer --- diff --git a/meta-openbmc-mods/meta-common/classes/image_types_intel_pfr.bbclass b/meta-openbmc-mods/meta-common/classes/image_types_intel_pfr.bbclass new file mode 100644 index 000000000..866766f2a --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/image_types_intel_pfr.bbclass @@ -0,0 +1,167 @@ + + +inherit obmc-phosphor-full-fitimage +inherit image_types_phosphor_auto +DEPENDS += "obmc-intel-pfr-image-native python3-native intel-pfr-signing-utility-native" + +require recipes-core/os-release/version-vars.inc + +IMAGE_TYPES += "intel-pfr" + +IMAGE_TYPEDEP:intel-pfr = "mtd-auto" +IMAGE_TYPES_MASKED += "intel-pfr" + +# PFR images directory +PFR_IMAGES_DIR = "${DEPLOY_DIR_IMAGE}/pfr_images" + +# PFR image generation script directory +PFR_SCRIPT_DIR = "${STAGING_DIR_NATIVE}${bindir}" + +# PFR image config directory +PFR_CFG_DIR = "${STAGING_DIR_NATIVE}${datadir}/pfrconfig" + +# Refer flash map in manifest.json for the addresses offset +PFM_OFFSET = "0x80000" + +# 0x80000/1024 = 0x200 or 512, 1K Page size. +PFM_OFFSET_PAGE = "512" + +# RC_IMAGE +RC_IMAGE_OFFSET = "0x02a00000" + +# RC_IMAGE_PAGE= 0x02a00000/1024 = 0xA800 or 43008 +RC_IMAGE_PAGE = "43008" + +do_image_pfr_internal () { + local manifest_json="pfr_manifest${bld_suffix}.json" + local pfmconfig_xml="pfm_config${bld_suffix}.xml" + local bmcconfig_xml="bmc_config${bld_suffix}.xml" + local pfm_signed_bin="pfm_signed${bld_suffix}.bin" + local signed_cap_bin="bmc_signedcap${bld_suffix}.bin" + local unsigned_cap_bin="bmc_unsigned_cap${bld_suffix}.bin" + local unsigned_cap_align_bin="bmc_unsigned_cap${bld_suffix}.bin_aligned" + local output_bin="image-mtd-pfr${bld_suffix}" + local SIGN_UTILITY=${PFR_SCRIPT_DIR}/intel-pfr-signing-utility + + # python script that does creating PFM & BMC unsigned, compressed image (from BMC 128MB raw binary file). + ${PFR_SCRIPT_DIR}/pfr_image.py -m ${PFR_CFG_DIR}/${manifest_json} -i ${DEPLOY_DIR_IMAGE}/image-mtd -n ${build_version} -b ${build_number} \ + -h ${build_hash} -s ${SHA} -o ${output_bin} + + # sign the PFM region + ${SIGN_UTILITY} -c ${PFR_CFG_DIR}/${pfmconfig_xml} -o ${PFR_IMAGES_DIR}/${pfm_signed_bin} ${PFR_IMAGES_DIR}/pfm.bin -v + + # Add the signed PFM to rom image + dd bs=1k conv=notrunc seek=${PFM_OFFSET_PAGE} if=${PFR_IMAGES_DIR}/${pfm_signed_bin} of=${PFR_IMAGES_DIR}/${output_bin} + + # Create unsigned BMC update capsule - append with 1. pfm_signed, 2. pbc, 3. bmc compressed + dd if=${PFR_IMAGES_DIR}/${pfm_signed_bin} bs=1k >> ${PFR_IMAGES_DIR}/${unsigned_cap_bin} + + dd if=${PFR_IMAGES_DIR}/pbc.bin bs=1k >> ${PFR_IMAGES_DIR}/${unsigned_cap_bin} + + dd if=${PFR_IMAGES_DIR}/bmc_compressed.bin bs=1k >> ${PFR_IMAGES_DIR}/${unsigned_cap_bin} + + # Sign the BMC update capsule + ${SIGN_UTILITY} -c ${PFR_CFG_DIR}/${bmcconfig_xml} -o ${PFR_IMAGES_DIR}/${signed_cap_bin} ${PFR_IMAGES_DIR}/${unsigned_cap_bin} -v + + # Add the signed bmc update capsule to full rom image @ 0x2a00000 + dd bs=1k conv=notrunc seek=${RC_IMAGE_PAGE} if=${PFR_IMAGES_DIR}/${signed_cap_bin} of=${PFR_IMAGES_DIR}/${output_bin} + + # Rename all PFR output images by appending date and time, so that they don't meddle with subsequent call to this function. + mv ${PFR_IMAGES_DIR}/${pfm_signed_bin} ${PFR_IMAGES_DIR}/pfm_signed${bld_suffix}-${DATETIME}.bin + mv ${PFR_IMAGES_DIR}/${unsigned_cap_bin} ${PFR_IMAGES_DIR}/bmc_unsigned_cap${bld_suffix}-${DATETIME}.bin + mv ${PFR_IMAGES_DIR}/${unsigned_cap_align_bin} ${PFR_IMAGES_DIR}/bmc_unsigned_cap${bld_suffix}-${DATETIME}.bin_aligned + mv ${PFR_IMAGES_DIR}/${signed_cap_bin} ${PFR_IMAGES_DIR}/bmc_signed_cap${bld_suffix}-${DATETIME}.bin + mv ${PFR_IMAGES_DIR}/${output_bin} ${PFR_IMAGES_DIR}/image-mtd-pfr${bld_suffix}-${DATETIME}.bin + # Append date and time to all 'pfr_image.py' output binaries. + mv ${PFR_IMAGES_DIR}/pfm.bin ${PFR_IMAGES_DIR}/pfm${bld_suffix}-${DATETIME}.bin + mv ${PFR_IMAGES_DIR}/pfm.bin_aligned ${PFR_IMAGES_DIR}/pfm${bld_suffix}-${DATETIME}.bin_aligned + mv ${PFR_IMAGES_DIR}/pbc.bin ${PFR_IMAGES_DIR}/pbc${bld_suffix}-${DATETIME}.bin + mv ${PFR_IMAGES_DIR}/bmc_compressed.bin ${PFR_IMAGES_DIR}/bmc_compressed${bld_suffix}-${DATETIME}.bin + + # Use relative links. The build process removes some of the build + # artifacts and that makes fully qualified pathes break. Relative links + # work because of the 'cd "${PFR_IMAGES_DIR}"' at the start of this section. + ln -sf image-mtd-pfr${bld_suffix}-${DATETIME}.bin ${PFR_IMAGES_DIR}/image-mtd-pfr${bld_suffix}.bin + ln -sf image-mtd-pfr${bld_suffix}-${DATETIME}.bin ${PFR_IMAGES_DIR}/OBMC${bld_suffix}-${@ do_get_version(d)}-pfr-full.ROM + ln -sf bmc_signed_cap${bld_suffix}-${DATETIME}.bin ${PFR_IMAGES_DIR}/bmc_signed_cap${bld_suffix}.bin + ln -sf bmc_signed_cap${bld_suffix}-${DATETIME}.bin ${PFR_IMAGES_DIR}/OBMC${bld_suffix}-${@ do_get_version(d)}-pfr-oob.bin +} + +do_image_pfr () { + # PFR image, additional build components information suffix. + local bld_suffix="" + + bbplain "Generating Intel PFR compliant BMC image for '${PRODUCT_GENERATION}'" + + bbplain "Build Version = ${build_version}" + bbplain "Build Number = ${build_number}" + bbplain "Build Hash = ${build_hash}" + bbplain "Build SHA = ${SHA_NAME}" + + mkdir -p "${PFR_IMAGES_DIR}" + cd "${PFR_IMAGES_DIR}" + + # First, Build default image. + bld_suffix="" + do_image_pfr_internal + + if [ ${PRODUCT_GENERATION} = "wht" ]; then + #Build additional component images also, for whitley generation, if needed. + if ! [ -z ${BUILD_SEGD} ] && [ ${BUILD_SEGD} = "yes" ]; then + bld_suffix="_d" + do_image_pfr_internal + fi + fi +} + +# Include 'do_image_pfr_internal' in 'vardepsexclude';Else Taskhash mismatch error will occur. +do_image_pfr[vardepsexclude] += "do_image_pfr_internal DATE DATETIME BUILD_SEGD" +do_image_pfr[vardeps] += "IPMI_MAJOR IPMI_MINOR IPMI_AUX13 IPMI_AUX14 IPMI_AUX15 IPMI_AUX16" +do_image_pfr[depends] += " \ + obmc-intel-pfr-image-native:do_populate_sysroot \ + intel-pfr-signing-utility-native:do_populate_sysroot \ + " + +python() { + product_gen = d.getVar('PRODUCT_GENERATION', True) + if product_gen == "wht": + d.setVar('SHA', "1")# 1- SHA256 + d.setVar('SHA_NAME', "SHA256") + + types = d.getVar('IMAGE_FSTYPES', True).split() + + if 'intel-pfr' in types: + + bld_ver1 = d.getVar('IPMI_MAJOR', True) + bld_ver1 = int(bld_ver1) << 8 + + bld_ver2 = d.getVar('IPMI_MINOR', True) + bld_ver2 = int(bld_ver2) + + bld_ver = bld_ver1 | bld_ver2 + d.setVar('build_version', str(bld_ver)) + + bld_num = d.getVar('IPMI_AUX13', True) + + d.setVar('build_number', bld_num) + + bld_hash1 = d.getVar('IPMI_AUX14', True) + bld_hash2 = d.getVar('IPMI_AUX15', True) + bld_hash3 = d.getVar('IPMI_AUX16', True) + + bld_hash1 = int(bld_hash1, 16) + bld_hash2 = int(bld_hash2, 16) + bld_hash3 = int(bld_hash3, 16) + + bld_hash = bld_hash3 << 16 + bld_hash |= bld_hash2 << 8 + bld_hash |= bld_hash1 + + d.setVar('build_hash', str(bld_hash)) + + bb.build.addtask(# task, depends_on_task, task_depends_on, d ) + 'do_image_pfr', + 'do_build', + 'do_generate_auto', d) +} + diff --git a/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass b/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass new file mode 100644 index 000000000..3efbfe092 --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass @@ -0,0 +1,80 @@ +# Base image class extension, inlined into every image. + +# Phosphor image types +# +# New image types based on DTS partition information +# +inherit logging + +# Image composition +FLASH_FULL_IMAGE ?= "fitImage-rootfs-${MACHINE}.bin" + +IMAGE_BASETYPE ?= "squashfs-xz" +OVERLAY_BASETYPE ?= "jffs2" + +IMAGE_TYPES += "mtd-auto" + +IMAGE_TYPEDEP:mtd-auto = "${IMAGE_BASETYPE}" +IMAGE_TYPES_MASKED += "mtd-auto" + +# Flash characteristics in KB unless otherwise noted +python() { + types = d.getVar('IMAGE_FSTYPES', True).split() + + # TODO: find partition list in DTS + d.setVar('FLASH_UBOOT_OFFSET', str(0)) + if 'intel-pfr' in types: + d.setVar('FLASH_SIZE', str(128*1024)) + DTB_FULL_FIT_IMAGE_OFFSETS = [0xb00000] + else: + d.setVar('FLASH_SIZE', str(64*1024)) + DTB_FULL_FIT_IMAGE_OFFSETS = [0x80000, 0x2480000] + + d.setVar('FLASH_RUNTIME_OFFSETS', ' '.join( + [str(int(x/1024)) for x in DTB_FULL_FIT_IMAGE_OFFSETS] + ) + ) +} + +mk_nor_image() { + image_dst="$1" + image_size_kb=$2 + dd if=/dev/zero bs=1k count=$image_size_kb \ + | tr '\000' '\377' > $image_dst +} + +do_generate_auto() { + bbdebug 1 "do_generate_auto IMAGE_TYPES=${IMAGE_TYPES} size=${FLASH_SIZE}KB (${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.auto.mtd)" + # Assemble the flash image + mk_nor_image ${IMGDEPLOYDIR}/${IMAGE_NAME}.auto.mtd ${FLASH_SIZE} + dd bs=1k conv=notrunc seek=${FLASH_UBOOT_OFFSET} \ + if=${DEPLOY_DIR_IMAGE}/u-boot.${UBOOT_SUFFIX} \ + of=${IMGDEPLOYDIR}/${IMAGE_NAME}.auto.mtd + + for OFFSET in ${FLASH_RUNTIME_OFFSETS}; do + dd bs=1k conv=notrunc seek=${OFFSET} \ + if=${DEPLOY_DIR_IMAGE}/${FLASH_FULL_IMAGE} \ + of=${IMGDEPLOYDIR}/${IMAGE_NAME}.auto.mtd + done + + ln ${IMGDEPLOYDIR}/${IMAGE_NAME}.auto.mtd \ + ${DEPLOY_DIR_IMAGE}/${IMAGE_NAME}.auto.mtd + ln -sf ${IMAGE_NAME}.auto.mtd ${DEPLOY_DIR_IMAGE}/image-mtd + ln -sf ${IMAGE_NAME}.auto.mtd ${DEPLOY_DIR_IMAGE}/OBMC-${@ do_get_version(d)}.ROM +} +do_generate_auto[dirs] = "${S}/auto" +do_generate_auto[depends] += " \ + ${PN}:do_image_${@d.getVar('IMAGE_BASETYPE', True).replace('-', '_')} \ + virtual/kernel:do_deploy \ + u-boot:do_populate_sysroot \ + " + +python() { + types = d.getVar('IMAGE_FSTYPES', True).split() + + if 'mtd-auto' in types: + bb.build.addtask(# task, depends_on_task, task_depends_on, d ) + 'do_generate_auto', + 'do_build', + 'do_image_complete', d) +} diff --git a/meta-openbmc-mods/meta-common/classes/obmc-phosphor-full-fitimage.bbclass b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-full-fitimage.bbclass new file mode 100644 index 000000000..6e0411a5c --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-full-fitimage.bbclass @@ -0,0 +1,573 @@ +inherit uboot-sign logging + +DEPENDS += "u-boot-mkimage-native" + +SIGNING_KEY ?= "${STAGING_DIR_NATIVE}${datadir}/OpenBMC.priv" +INSECURE_KEY = "${@'${SIGNING_KEY}' == '${STAGING_DIR_NATIVE}${datadir}/OpenBMC.priv'}" +SIGNING_KEY_DEPENDS = "${@oe.utils.conditional('INSECURE_KEY', 'True', 'phosphor-insecure-signing-key-native:do_populate_sysroot', '', d)}" + +DEPS = " ${PN}:do_image_${@d.getVar('IMAGE_BASETYPE', True).replace('-', '_')} \ + virtual/kernel:do_deploy \ + u-boot:do_populate_sysroot " + +# Options for the device tree compiler passed to mkimage '-D' feature: +UBOOT_MKIMAGE_DTCOPTS ??= "" + +# +# Emit the fitImage ITS header +# +# $1 ... .its filename +fitimage_emit_fit_header() { + cat << EOF >> ${1} +/dts-v1/; + +/ { + description = "U-Boot fitImage for ${DISTRO_NAME}/${PV}/${MACHINE}"; + #address-cells = <1>; +EOF +} + +# +# Emit the fitImage section bits +# +# $1 ... .its filename +# $2 ... Section bit type: imagestart - image section start +# confstart - configuration section start +# sectend - section end +# fitend - fitimage end +# +fitimage_emit_section_maint() { + case $2 in + imagestart) + cat << EOF >> ${1} + + images { +EOF + ;; + confstart) + cat << EOF >> ${1} + + configurations { +EOF + ;; + sectend) + cat << EOF >> ${1} + }; +EOF + ;; + fitend) + cat << EOF >> ${1} +}; +EOF + ;; + esac +} + +# +# Emit the fitImage ITS kernel section +# +# $1 ... .its filename +# $2 ... Image counter +# $3 ... Path to kernel image +# $4 ... Compression type +# $5 ... Hash type +fitimage_emit_section_kernel() { + + kernel_csum="${5}" + + if [ -n "${kernel_csum}" ]; then + hash_blk=$(cat << EOF + hash-1 { + algo = "${kernel_csum}"; + }; +EOF + ) + fi + + ENTRYPOINT=${UBOOT_ENTRYPOINT} + if [ -n "${UBOOT_ENTRYSYMBOL}" ]; then + ENTRYPOINT=`${HOST_PREFIX}nm vmlinux | \ + awk '$3=="${UBOOT_ENTRYSYMBOL}" {print "0x"$1;exit}'` + fi + + cat << EOF >> ${1} + kernel-${2} { + description = "Linux kernel"; + data = /incbin/("${3}"); + type = "kernel"; + arch = "${UBOOT_ARCH}"; + os = "linux"; + compression = "${4}"; + load = <${UBOOT_LOADADDRESS}>; + entry = <${ENTRYPOINT}>; + ${hash_blk} + }; +EOF +} + +# +# Emit the fitImage ITS DTB section +# +# $1 ... .its filename +# $2 ... Image counter +# $3 ... Path to DTB image +# $4 ... Hash type +fitimage_emit_section_dtb() { + + dtb_csum="${4}" + if [ -n "${dtb_csum}" ]; then + hash_blk=$(cat << EOF + hash-1 { + algo = "${dtb_csum}"; + }; +EOF + ) + fi + + cat << EOF >> ${1} + fdt-${2} { + description = "Flattened Device Tree blob"; + data = /incbin/("${3}"); + type = "flat_dt"; + arch = "${UBOOT_ARCH}"; + compression = "none"; + ${hash_blk} + }; +EOF +} + +# +# Emit the fitImage ITS setup section +# +# $1 ... .its filename +# $2 ... Image counter +# $3 ... Path to setup image +# $4 ... Hash type +fitimage_emit_section_setup() { + + setup_csum="${4}" + if [ -n "${setup_csum}" ]; then + hash_blk=$(cat << EOF + hash-1 { + algo = "${setup_csum}"; + }; +EOF + ) + fi + + cat << EOF >> ${1} + setup-${2} { + description = "Linux setup.bin"; + data = /incbin/("${3}"); + type = "x86_setup"; + arch = "${UBOOT_ARCH}"; + os = "linux"; + compression = "none"; + load = <0x00090000>; + entry = <0x00090000>; + ${hash_blk} + }; +EOF +} + +# +# Emit the fitImage ITS ramdisk section +# +# $1 ... .its filename +# $2 ... Image counter +# $3 ... Path to ramdisk image +# $4 ... Hash type +fitimage_emit_section_ramdisk() { + + ramdisk_csum="${4}" + if [ -n "${ramdisk_csum}" ]; then + hash_blk=$(cat << EOF + hash-1 { + algo = "${ramdisk_csum}"; + }; +EOF + ) + fi + ramdisk_ctype="none" + ramdisk_loadline="" + ramdisk_entryline="" + + if [ -n "${UBOOT_RD_LOADADDRESS}" ]; then + ramdisk_loadline="load = <${UBOOT_RD_LOADADDRESS}>;" + fi + if [ -n "${UBOOT_RD_ENTRYPOINT}" ]; then + ramdisk_entryline="entry = <${UBOOT_RD_ENTRYPOINT}>;" + fi + + case $3 in + *.gz) + ramdisk_ctype="gzip" + ;; + *.bz2) + ramdisk_ctype="bzip2" + ;; + *.lzma) + ramdisk_ctype="lzma" + ;; + *.lzo) + ramdisk_ctype="lzo" + ;; + *.lz4) + ramdisk_ctype="lz4" + ;; + esac + + cat << EOF >> ${1} + ramdisk-${2} { + description = "${INITRAMFS_IMAGE}"; + data = /incbin/("${3}"); + type = "ramdisk"; + arch = "${UBOOT_ARCH}"; + os = "linux"; + compression = "${ramdisk_ctype}"; + ${ramdisk_loadline} + ${ramdisk_entryline} + ${hash_blk} + }; +EOF +} + +# +# Emit the fitImage ITS configuration section +# +# $1 ... .its filename +# $2 ... Linux kernel ID +# $3 ... DTB image name +# $4 ... ramdisk ID +# $5 ... config ID +# $6 ... default flag +# $7 ... Hash type +# $8 ... DTB index +fitimage_emit_section_config() { + + conf_csum="${7}" + if [ -n "${conf_csum}" ]; then + hash_blk=$(cat << EOF + hash-1 { + algo = "${conf_csum}"; + }; +EOF + ) + fi + if [ -n "${UBOOT_SIGN_ENABLE}" ] ; then + conf_sign_keyname="${UBOOT_SIGN_KEYNAME}" + fi + + # Test if we have any DTBs at all + conf_desc="Linux kernel" + kernel_line="kernel = \"kernel-${2}\";" + fdt_line="" + ramdisk_line="" + setup_line="" + default_line="" + + if [ -n "${3}" ]; then + conf_desc="${conf_desc}, FDT blob" + fdt_line="fdt = \"fdt-${3}\";" + fi + + if [ -n "${4}" ]; then + conf_desc="${conf_desc}, ramdisk" + ramdisk_line="ramdisk = \"ramdisk-${4}\";" + fi + + if [ -n "${5}" ]; then + conf_desc="${conf_desc}, setup" + setup_line="setup = \"setup-${5}\";" + fi + + if [ "${6}" = "1" ]; then + default_line="default = \"conf-${3}\";" + fi + + cat << EOF >> ${1} + ${default_line} + conf-${3} { + description = "${6} ${conf_desc}"; + ${kernel_line} + ${fdt_line} + ${ramdisk_line} + ${setup_line} + ${hash_blk} +EOF + + if [ ! -z "${conf_sign_keyname}" ] ; then + + sign_line="sign-images = \"kernel\"" + + if [ -n "${3}" ]; then + sign_line="${sign_line}, \"fdt\"" + fi + + if [ -n "${4}" ]; then + sign_line="${sign_line}, \"ramdisk\"" + fi + + if [ -n "${5}" ]; then + sign_line="${sign_line}, \"setup\"" + fi + + sign_line="${sign_line};" + + cat << EOF >> ${1} + signature-1 { + algo = "${conf_csum},rsa2048"; + key-name-hint = "${conf_sign_keyname}"; + ${sign_line} + }; +EOF + fi + + cat << EOF >> ${1} + }; +EOF +} + +# +# Assemble fitImage +# +# $1 ... .its filename +# $2 ... fitImage name +# $3 ... include rootfs +fitimage_assemble() { + kernelcount=1 + dtbcount="" + DTBS="" + ramdiskcount=${3} + setupcount="" + #hash_type="sha256" + hash_type="" + rm -f ${1} ${2} + + # + # Step 0: find the kernel image in the deploy/images/$machine dir + # + KIMG="" + for KTYPE in zImage bzImage vmlinuz; do + if [ -e "${DEPLOY_DIR_IMAGE}/${ktype}" ]; then + KIMG="${DEPLOY_DIR_IMAGE}/${KTYPE}" + break + fi + done + if [ -z "${KIMG}" ]; then + bbdebug 1 "Failed to find kernel image to pack into full fitimage" + return 1 + fi + + fitimage_emit_fit_header ${1} + + # + # Step 1: Prepare a kernel image section. + # + fitimage_emit_section_maint ${1} imagestart + + fitimage_emit_section_kernel ${1} "${kernelcount}" "${KIMG}" "none" "${hash_type}" + + # + # Step 2: Prepare a DTB image section + # + if [ -n "${KERNEL_DEVICETREE}" ]; then + dtbcount=1 + for DTB in ${KERNEL_DEVICETREE}; do + if echo ${DTB} | grep -q '/dts/'; then + bberror "${DTB} contains the full path to the the dts file, but only the dtb name should be used." + DTB=`basename ${DTB} | sed 's,\.dts$,.dtb,g'` + fi + DTB_PATH="${DEPLOY_DIR_IMAGE}/${DTB}" + if [ ! -e "${DTB_PATH}" ]; then + bbwarn "${DTB_PATH} does not exist" + continue + fi + + DTB=$(echo "${DTB}" | tr '/' '_') + DTBS="${DTBS} ${DTB}" + fitimage_emit_section_dtb ${1} ${DTB} ${DTB_PATH} "${hash_type}" + done + fi + + # + # Step 3: Prepare a setup section. (For x86) + # + if [ -e arch/${ARCH}/boot/setup.bin ]; then + setupcount=1 + fitimage_emit_section_setup ${1} "${setupcount}" arch/${ARCH}/boot/setup.bin "${hash_type}" + fi + + # + # Step 4: Prepare a ramdisk section. + # + if [ "x${ramdiskcount}" = "x1" ] ; then + bbdebug 1 "searching for requested rootfs" + # Find and use the first initramfs image archive type we find + for img in squashfs-lz4 squashfs-xz squashfs cpio.lz4 cpio.lzo cpio.lzma cpio.xz cpio.gz cpio; do + initramfs_path="${DEPLOY_DIR_IMAGE}/${IMAGE_BASENAME}-${MACHINE}.${img}" + bbdebug 1 "looking for ${initramfs_path}" + if [ -e "${initramfs_path}" ]; then + bbdebug 1 "Found ${initramfs_path}" + fitimage_emit_section_ramdisk ${1} "${ramdiskcount}" "${initramfs_path}" "${hash_type}" + break + fi + done + fi + + fitimage_emit_section_maint ${1} sectend + + # Force the first Kernel and DTB in the default config + kernelcount=1 + if [ -n "${dtbcount}" ]; then + dtbcount=1 + fi + + # + # Step 5: Prepare a configurations section + # + fitimage_emit_section_maint ${1} confstart + + if [ -n "${DTBS}" ]; then + i=1 + for DTB in ${DTBS}; do + fitimage_emit_section_config ${1} "${kernelcount}" "${DTB}" "${ramdiskcount}" "${setupcount}" "`expr ${i} = ${dtbcount}`" "${hash_type}" "${i}" + i=`expr ${i} + 1` + done + fi + + fitimage_emit_section_maint ${1} sectend + + fitimage_emit_section_maint ${1} fitend + + # + # Step 6: Assemble the image + # + uboot-mkimage \ + ${@'-D "${UBOOT_MKIMAGE_DTCOPTS}"' if len('${UBOOT_MKIMAGE_DTCOPTS}') else ''} \ + -f ${1} ${2} + + # + # Step 7: Sign the image and add public key to U-Boot dtb + # + if [ "x${UBOOT_SIGN_ENABLE}" = "x1" ] ; then + uboot-mkimage \ + ${@'-D "${UBOOT_MKIMAGE_DTCOPTS}"' if len('${UBOOT_MKIMAGE_DTCOPTS}') else ''} \ + -F -k "${UBOOT_SIGN_KEYDIR}" \ + -K "${DEPLOY_DIR_IMAGE}/${UBOOT_DTB_BINARY}" \ + -r ${2} + fi +} + +python do_generate_phosphor_manifest() { + import os.path + b = d.getVar('B', True) + manifest_filename = os.path.join(b, "MANIFEST") + version = do_get_version(d) + with open(manifest_filename, 'w') as fd: + fd.write('purpose=xyz.openbmc_project.Software.Version.VersionPurpose.BMC\n') + fd.write('version={}\n'.format(version.strip('"'))) + fd.write('KeyType={}\n'.format("OpenBMC")) + fd.write('HashType=RSA-SHA256\n') +} + +# Get HEAD git hash +def get_head_hash(codebase): + err = None + try: + cmd = 'git --work-tree {} --git-dir {}/.git {}'.format(codebase, codebase, "rev-parse HEAD") + ret, err = bb.process.run(cmd) + if err is not None: + ret += err + except bb.process.ExecutionError as e: + ret = '' + if e.stdout is not None: + ret += e.stdout + if e.stderr is not None: + ret += e.stderr + except Exception as e: + ret = str(e) + return ret.split("\n")[0] + +# Generate file 'RELEASE' +# It contains git hash info which is required by rest of release process (release note, for example) +python do_generate_release_metainfo() { + b = d.getVar('DEPLOY_DIR_IMAGE', True) + corebase = d.getVar('COREBASE', True) + intelbase = os.path.join(corebase, 'meta-openbmc-mods') + filename = os.path.join(b, "RELEASE") + version = do_get_version(d) + + with open(filename, 'w') as fd: + fd.write('VERSION_ID={}\n'.format(version.strip('"'))) + if os.path.exists(corebase): + obmc_hash = get_head_hash(corebase) + fd.write('COMMUNITY_HASH={}\n'.format(obmc_hash)) + if os.path.exists(intelbase): + intel_hash = get_head_hash(intelbase) + fd.write('INTEL_HASH={}\n'.format(intel_hash)) +} + +def get_pubkey_type(d): + return os.listdir(get_pubkey_basedir(d))[0] + +def get_pubkey_path(d): + return os.path.join( + get_pubkey_basedir(d), + get_pubkey_type(d), + 'publickey') +python do_copy_signing_pubkey() { + with open(get_pubkey_path(d), 'r') as read_fd: + with open('publickey', 'w') as write_fd: + write_fd.write(read_fd.read()) +} + +do_copy_signing_pubkey[dirs] = "${S}" +do_copy_signing_pubkey[depends] += " \ + phosphor-image-signing:do_populate_sysroot \ + " + +do_image_fitimage_rootfs() { + bbdebug 1 "check for rootfs phosphor fitimage" + cd ${B} + bbdebug 1 "building rootfs phosphor fitimage" + fitimage_assemble fitImage-rootfs-${MACHINE}-${DATETIME}.its \ + fitImage-rootfs-${MACHINE}-${DATETIME}.bin 1 + + for SFX in its bin; do + SRC="fitImage-rootfs-${MACHINE}-${DATETIME}.${SFX}" + SYM="fitImage-rootfs-${MACHINE}.${SFX}" + if [ -e "${B}/${SRC}" ]; then + install -m 0644 "${B}/${SRC}" "${DEPLOY_DIR_IMAGE}/${SRC}" + ln -sf "${SRC}" "${DEPLOY_DIR_IMAGE}/${SYM}" + fi + done + ln -sf "${DEPLOY_DIR_IMAGE}/fitImage-rootfs-${MACHINE}.bin" "image-runtime" + # build a tarball with the right parts: MANIFEST, signatures, etc. + # create a directory for the tarball + mkdir -p "${B}/img" + cd "${B}/img" + # add symlinks for the contents + ln -sf "${DEPLOY_DIR_IMAGE}/u-boot.${UBOOT_SUFFIX}" "image-u-boot" + ln -sf "${DEPLOY_DIR_IMAGE}/fitImage-rootfs-${MACHINE}.bin" "image-runtime" + # add the manifest + bbdebug 1 "Manifest file: ${B}/MANIFEST" + ln -sf ${B}/MANIFEST . + # touch the required files to minimize change + touch image-kernel image-rofs image-rwfs + + tar -h -cvf "${DEPLOY_DIR_IMAGE}/${PN}-image-update-${MACHINE}-${DATETIME}.tar" MANIFEST image-u-boot image-runtime image-kernel image-rofs image-rwfs + # make a symlink + ln -sf "${PN}-image-update-${MACHINE}-${DATETIME}.tar" "${DEPLOY_DIR_IMAGE}/image-update-${MACHINE}" + ln -sf "${PN}-image-update-${MACHINE}-${DATETIME}.tar" "${DEPLOY_DIR_IMAGE}/OBMC-${@ do_get_version(d)}-oob.bin" + ln -sf "image-update-${MACHINE}" "${DEPLOY_DIR_IMAGE}/image-update" + ln -sf "image-update-${MACHINE}" "${DEPLOY_DIR_IMAGE}/OBMC-${@ do_get_version(d)}-inband.bin" +} + +do_image_fitimage_rootfs[vardepsexclude] = "DATETIME" +do_image_fitimage_rootfs[depends] += " ${DEPS}" + + +addtask do_image_fitimage_rootfs before do_generate_auto after do_image_complete +addtask do_generate_phosphor_manifest before do_image_fitimage_rootfs after do_image_complete +addtask do_generate_release_metainfo before do_generate_phosphor_manifest after do_image_complete diff --git a/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass new file mode 100644 index 000000000..bc20e5a29 --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-common.bbclass @@ -0,0 +1,90 @@ +inherit obmc-phosphor-image + +IMAGE_FEATURES += " \ + obmc-bmc-state-mgmt \ + obmc-bmcweb \ + obmc-chassis-mgmt \ + obmc-chassis-state-mgmt \ + obmc-devtools \ + obmc-fan-control \ + obmc-fan-mgmt \ + obmc-flash-mgmt \ + obmc-host-ctl \ + obmc-host-ipmi \ + obmc-host-state-mgmt \ + obmc-inventory \ + obmc-leds \ + obmc-logging-mgmt \ + obmc-remote-logging-mgmt \ + obmc-net-ipmi \ + obmc-sensors \ + obmc-software \ + obmc-system-mgmt \ + obmc-user-mgmt \ + ${@bb.utils.contains('DISTRO_FEATURES', 'obmc-ubi-fs', 'read-only-rootfs', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'phosphor-mmc', 'read-only-rootfs', '', d)} \ + ssh-server-dropbear \ + obmc-debug-collector \ + obmc-network-mgmt \ + obmc-settings-mgmt \ + obmc-console \ + " + +IMAGE_INSTALL:append = " \ + dbus-broker \ + entity-manager \ + fru-device \ + ipmitool \ + intel-ipmi-oem \ + phosphor-ipmi-ipmb \ + phosphor-node-manager-proxy \ + dbus-sensors \ + at-scale-debug \ + phosphor-pid-control \ + phosphor-host-postd \ + phosphor-certificate-manager \ + phosphor-sel-logger \ + smbios-mdrv2 \ + obmc-ikvm \ + system-watchdog \ + srvcfg-manager \ + callback-manager \ + phosphor-post-code-manager \ + preinit-mounts \ + mtd-utils-ubifs \ + special-mode-mgr \ + rsyslog \ + static-mac-addr \ + phosphor-u-boot-mgr \ + prov-mode-mgr \ + ac-boot-check \ + host-error-monitor \ + beepcode-mgr \ + psu-manager \ + kernel-panic-check \ + id-led-off \ + hsbp-manager \ + security-registers-check \ + nv-sync \ + security-manager \ + multi-node-nl \ + virtual-media \ + enable-nics \ + host-misc-comm-manager \ + biosconfig-manager \ + telemetry \ + i3c-tools \ + configure-usb-c \ + zip \ + peci-pcie \ + collectd \ + " + +IMAGE_INSTALL:append = " ${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'pfr-manager', '', d)}" + +IMAGE_INSTALL:append = " ${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'ncsi-monitor', '', d)}" + +# this package was flagged as a security risk +IMAGE_INSTALL:remove += " lrzsz" + +BAD_RECOMMENDATIONS += "phosphor-settings-manager" diff --git a/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-dev.bbclass b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-dev.bbclass new file mode 100644 index 000000000..1bc1653dc --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/obmc-phosphor-image-dev.bbclass @@ -0,0 +1,7 @@ +IMAGE_INSTALL:append = " \ + mtd-util \ + io-app \ + intel-fw-update \ + lpc-cmds \ + beeper-test \ + " diff --git a/meta-openbmc-mods/meta-common/classes/print-src.bbclass b/meta-openbmc-mods/meta-common/classes/print-src.bbclass new file mode 100644 index 000000000..63613b6a0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/classes/print-src.bbclass @@ -0,0 +1,8 @@ +python do_print_src () { + srcuri = d.getVar('SRC_URI', True).split() + srcrev = d.getVar('SRCREV', True).split() + thisdir = d.getVar('THISDIR', True).split() + bb.warn("THISDIR: %s SRC_URI: %s SRCREV: %s" % (thisdir, srcuri, srcrev)) +} + +addtask do_print_src before do_fetch diff --git a/meta-openbmc-mods/meta-common/conf/layer.conf b/meta-openbmc-mods/meta-common/conf/layer.conf new file mode 100644 index 000000000..8d9452850 --- /dev/null +++ b/meta-openbmc-mods/meta-common/conf/layer.conf @@ -0,0 +1,11 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "common" +BBFILE_PATTERN_common = "^${LAYERDIR}/" +BBFILE_PRIORITY_common = "9" +LAYERSERIES_COMPAT_common = "gatesgarth hardknott honister" diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/fw_env.config b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/fw_env.config new file mode 100644 index 000000000..19ace4b88 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/fw_env.config @@ -0,0 +1,25 @@ +# Configuration file for fw_(printenv/setenv) utility. +# Up to two entries are valid, in this case the redundant +# environment sector is assumed present. +# Notice, that the "Number of sectors" is ignored on NOR and SPI-dataflash. +# Furthermore, if the Flash sector size is omitted, this value is assumed to +# be the same as the Environment size, which is valid for NOR and SPI-dataflash + +# NOR example +# MTD device name Device offset Env. size Flash sector size Number of sectors +#/dev/mtd1 0x0000 0x20000 0x20000 +#/dev/mtd2 0x0000 0x4000 0x4000 + +# MTD SPI-dataflash example +# MTD device name Device offset Env. size Flash sector size Number of sectors +#/dev/mtd2 0x00000 0x20000 +/dev/mtd/u-boot-env 0x00000 0x10000 +/dev/mtd/u-boot-env 0x10000 0x10000 +#/dev/mtd5 0x4200 0x4200 +#/dev/mtd6 0x4200 0x4200 + +# NAND example +#/dev/mtd0 0x4000 0x4000 0x20000 2 + +# Block device example +#/dev/mmcblk0 0xc0000 0x20000 diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-%.bbappend new file mode 100644 index 000000000..e9093b403 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +SRC_URI += " \ + file://fw_env.config \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/avahi/avahi_%.bbappend b/meta-openbmc-mods/meta-common/recipes-connectivity/avahi/avahi_%.bbappend new file mode 100644 index 000000000..fa58d9726 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/avahi/avahi_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/files/environment.d-openssl.sh b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/files/environment.d-openssl.sh new file mode 100644 index 000000000..b9cc24a7a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/files/environment.d-openssl.sh @@ -0,0 +1 @@ +export OPENSSL_CONF="$OECORE_NATIVE_SYSROOT/usr/lib/ssl/openssl.cnf" diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-buildinfo-strip-sysroot-and-debug-prefix-map-from-co.patch b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-buildinfo-strip-sysroot-and-debug-prefix-map-from-co.patch new file mode 100644 index 000000000..949c78834 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-buildinfo-strip-sysroot-and-debug-prefix-map-from-co.patch @@ -0,0 +1,76 @@ +From 3e1d00481093e10775eaf69d619c45b32a4aa7dc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Martin=20Hundeb=C3=B8ll?= <martin@geanix.com> +Date: Tue, 6 Nov 2018 14:50:47 +0100 +Subject: [PATCH] buildinfo: strip sysroot and debug-prefix-map from compiler + info +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The openssl build system generates buildinf.h containing the full +compiler command line used to compile objects. This breaks +reproducibility, as the compile command is baked into libcrypto, where +it is used when running `openssl version -f`. + +Add stripped build variables for the compiler and cflags lines, and use +those when generating buildinfo.h. + +This is based on a similar patch for older openssl versions: +https://patchwork.openembedded.org/patch/147229/ + +Upstream-Status: Inappropriate [OE specific] +Signed-off-by: Martin Hundebøll <martin@geanix.com> + + +Update to fix buildpaths qa issue for '-fmacro-prefix-map'. + +Signed-off-by: Kai Kang <kai.kang@windriver.com> +--- + Configurations/unix-Makefile.tmpl | 10 +++++++++- + crypto/build.info | 2 +- + 2 files changed, 10 insertions(+), 2 deletions(-) + +diff --git a/Configurations/unix-Makefile.tmpl b/Configurations/unix-Makefile.tmpl +index 16af4d2087..54c162784c 100644 +--- a/Configurations/unix-Makefile.tmpl ++++ b/Configurations/unix-Makefile.tmpl +@@ -317,13 +317,22 @@ BIN_LDFLAGS={- join(' ', $target{bin_lflags} || (), + '$(CNF_LDFLAGS)', '$(LDFLAGS)') -} + BIN_EX_LIBS=$(CNF_EX_LIBS) $(EX_LIBS) + +-# CPPFLAGS_Q is used for one thing only: to build up buildinf.h ++# *_Q variables are used for one thing only: to build up buildinf.h + CPPFLAGS_Q={- $cppflags1 =~ s|([\\"])|\\$1|g; + $cppflags2 =~ s|([\\"])|\\$1|g; + $lib_cppflags =~ s|([\\"])|\\$1|g; + join(' ', $lib_cppflags || (), $cppflags2 || (), + $cppflags1 || ()) -} + ++CFLAGS_Q={- for (@{$config{CFLAGS}}) { ++ s|-fdebug-prefix-map=[^ ]+|-fdebug-prefix-map=|g; ++ s|-fmacro-prefix-map=[^ ]+|-fmacro-prefix-map=|g; ++ } ++ join(' ', @{$config{CFLAGS}}) -} ++ ++CC_Q={- $config{CC} =~ s|--sysroot=[^ ]+|--sysroot=recipe-sysroot|g; ++ join(' ', $config{CC}) -} ++ + PERLASM_SCHEME= {- $target{perlasm_scheme} -} + + # For x86 assembler: Set PROCESSOR to 386 if you want to support +diff --git a/crypto/build.info b/crypto/build.info +index b515b7318e..8c9cee2a09 100644 +--- a/crypto/build.info ++++ b/crypto/build.info +@@ -10,7 +10,7 @@ EXTRA= ../ms/uplink-x86.pl ../ms/uplink.c ../ms/applink.c \ + ppccpuid.pl pariscid.pl alphacpuid.pl arm64cpuid.pl armv4cpuid.pl + + DEPEND[cversion.o]=buildinf.h +-GENERATE[buildinf.h]=../util/mkbuildinf.pl "$(CC) $(LIB_CFLAGS) $(CPPFLAGS_Q)" "$(PLATFORM)" ++GENERATE[buildinf.h]=../util/mkbuildinf.pl "$(CC_Q) $(CFLAGS_Q) $(CPPFLAGS_Q)" "$(PLATFORM)" + DEPEND[buildinf.h]=../configdata.pm + + GENERATE[uplink-x86.s]=../ms/uplink-x86.pl $(PERLASM_SCHEME) +-- +2.19.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-skip-test_symbol_presence.patch b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-skip-test_symbol_presence.patch new file mode 100644 index 000000000..d8d9651b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/0001-skip-test_symbol_presence.patch @@ -0,0 +1,46 @@ +From a9401b2289656c5a36dd1b0ecebf0d23e291ce70 Mon Sep 17 00:00:00 2001 +From: Hongxu Jia <hongxu.jia@windriver.com> +Date: Tue, 2 Oct 2018 23:58:24 +0800 +Subject: [PATCH] skip test_symbol_presence + +We cannot skip `01-test_symbol_presence.t' by configuring option `no-shared' +as INSTALL told us the shared libraries will not be built. + +[INSTALL snip] + Notes on shared libraries + ------------------------- + + For most systems the OpenSSL Configure script knows what is needed to + build shared libraries for libcrypto and libssl. On these systems + the shared libraries will be created by default. This can be suppressed and + only static libraries created by using the "no-shared" option. On systems + where OpenSSL does not know how to build shared libraries the "no-shared" + option will be forced and only static libraries will be created. +[INSTALL snip] + +Hence directly modification the case to skip it. + +Upstream-Status: Inappropriate [OE Specific] + +Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> +--- + test/recipes/01-test_symbol_presence.t | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/test/recipes/01-test_symbol_presence.t b/test/recipes/01-test_symbol_presence.t +index 7f2a2d7..0b93745 100644 +--- a/test/recipes/01-test_symbol_presence.t ++++ b/test/recipes/01-test_symbol_presence.t +@@ -14,8 +14,7 @@ use OpenSSL::Test::Utils; + + setup("test_symbol_presence"); + +-plan skip_all => "Only useful when building shared libraries" +- if disabled("shared"); ++plan skip_all => "The case needs debug symbols then we just disable it"; + + my @libnames = ("crypto", "ssl"); + my $testcount = scalar @libnames; +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/afalg.patch b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/afalg.patch new file mode 100644 index 000000000..b7c0e9697 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/afalg.patch @@ -0,0 +1,31 @@ +Don't refuse to build afalgeng if cross-compiling or the host kernel is too old. + +Upstream-Status: Submitted [hhttps://github.com/openssl/openssl/pull/7688] +Signed-off-by: Ross Burton <ross.burton@intel.com> + +diff --git a/Configure b/Configure +index 3baa8ce..9ef52ed 100755 +--- a/Configure ++++ b/Configure +@@ -1550,20 +1550,7 @@ unless ($disabled{"crypto-mdebug-backtrace"}) + unless ($disabled{afalgeng}) { + $config{afalgeng}=""; + if (grep { $_ eq 'afalgeng' } @{$target{enable}}) { +- my $minver = 4*10000 + 1*100 + 0; +- if ($config{CROSS_COMPILE} eq "") { +- my $verstr = `uname -r`; +- my ($ma, $mi1, $mi2) = split("\\.", $verstr); +- ($mi2) = $mi2 =~ /(\d+)/; +- my $ver = $ma*10000 + $mi1*100 + $mi2; +- if ($ver < $minver) { +- disable('too-old-kernel', 'afalgeng'); +- } else { +- push @{$config{engdirs}}, "afalg"; +- } +- } else { +- disable('cross-compiling', 'afalgeng'); +- } ++ push @{$config{engdirs}}, "afalg"; + } else { + disable('not-linux', 'afalgeng'); + } diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/reproducible.patch b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/reproducible.patch new file mode 100644 index 000000000..a24260c95 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/reproducible.patch @@ -0,0 +1,32 @@ +The value for perl_archname can vary depending on the host, e.g. +x86_64-linux-gnu-thread-multi or x86_64-linux-thread-multi which +makes the ptest package non-reproducible. Its unused other than +these references so drop it. + +RP 2020/2/6 + +Upstream-Status: Pending +Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> + +Index: openssl-1.1.1d/Configure +=================================================================== +--- openssl-1.1.1d.orig/Configure ++++ openssl-1.1.1d/Configure +@@ -286,7 +286,7 @@ if (defined env($local_config_envname)) + # Save away perl command information + $config{perl_cmd} = $^X; + $config{perl_version} = $Config{version}; +-$config{perl_archname} = $Config{archname}; ++#$config{perl_archname} = $Config{archname}; + + $config{prefix}=""; + $config{openssldir}=""; +@@ -2517,7 +2517,7 @@ _____ + @{$config{perlargv}}), "\n"; + print "\nPerl information:\n\n"; + print ' ',$config{perl_cmd},"\n"; +- print ' ',$config{perl_version},' for ',$config{perl_archname},"\n"; ++ print ' ',$config{perl_version},"\n"; + } + if ($dump || $options) { + my $longest = 0; diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/run-ptest b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/run-ptest new file mode 100644 index 000000000..3fb22471f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl/run-ptest @@ -0,0 +1,12 @@ +#!/bin/sh + +set -e + +# Optional arguments are 'list' to lists all tests, or the test name (base name +# ie test_evp, not 03_test_evp.t). + +export TOP=. +# OPENSSL_ENGINES is relative from the test binaries +export OPENSSL_ENGINES=../engines + +perl ./test/run_tests.pl $* | perl -0pe 's#(.*) \.*.ok#PASS: \1#g; s#(.*) \.*.skipped: (.*)#SKIP: \1 (\2)#g; s#(.*) \.*.\nDubious#FAIL: \1#;' diff --git a/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl_1.1.1l.bb b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl_1.1.1l.bb new file mode 100644 index 000000000..e395de665 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-connectivity/openssl/openssl_1.1.1l.bb @@ -0,0 +1,211 @@ +SUMMARY = "Secure Socket Layer" +DESCRIPTION = "Secure Socket Layer (SSL) binary and related cryptographic tools." +HOMEPAGE = "http://www.openssl.org/" +BUGTRACKER = "http://www.openssl.org/news/vulnerabilities.html" +SECTION = "libs/network" + +# "openssl" here actually means both OpenSSL and SSLeay licenses apply +# (see meta/files/common-licenses/OpenSSL to which "openssl" is SPDXLICENSEMAPped) +LICENSE = "openssl" +LIC_FILES_CHKSUM = "file://LICENSE;md5=d343e62fc9c833710bbbed25f27364c8" + +DEPENDS = "hostperl-runtime-native" + +SRC_URI = "http://www.openssl.org/source/openssl-${PV}.tar.gz \ + file://run-ptest \ + file://0001-skip-test_symbol_presence.patch \ + file://0001-buildinfo-strip-sysroot-and-debug-prefix-map-from-co.patch \ + file://afalg.patch \ + file://reproducible.patch \ + " + +SRC_URI:append:class-nativesdk = " \ + file://environment.d-openssl.sh \ + " + +SRC_URI[sha256sum] = "0b7a3e5e59c34827fe0c3a74b7ec8baef302b98fa80088d7f9153aa16fa76bd1" + +inherit lib_package multilib_header multilib_script ptest +MULTILIB_SCRIPTS = "${PN}-bin:${bindir}/c_rehash" + +PACKAGECONFIG ?= "" +PACKAGECONFIG:class-native = "" +PACKAGECONFIG:class-nativesdk = "" + +PACKAGECONFIG[cryptodev-linux] = "enable-devcryptoeng,disable-devcryptoeng,cryptodev-linux,,cryptodev-module" + +B = "${WORKDIR}/build" +do_configure[cleandirs] = "${B}" + +#| ./libcrypto.so: undefined reference to `getcontext' +#| ./libcrypto.so: undefined reference to `setcontext' +#| ./libcrypto.so: undefined reference to `makecontext' +EXTRA_OECONF:append:libc-musl = " no-async" +EXTRA_OECONF:append:libc-musl:powerpc64 = " no-asm" + +# adding devrandom prevents openssl from using getrandom() which is not available on older glibc versions +# (native versions can be built with newer glibc, but then relocated onto a system with older glibc) +EXTRA_OECONF:class-native = "--with-rand-seed=os,devrandom" +EXTRA_OECONF:class-nativesdk = "--with-rand-seed=os,devrandom" + +# Relying on hardcoded built-in paths causes openssl-native to not be relocateable from sstate. +CFLAGS:append:class-native = " -DOPENSSLDIR=/not/builtin -DENGINESDIR=/not/builtin" +CFLAGS:append:class-nativesdk = " -DOPENSSLDIR=/not/builtin -DENGINESDIR=/not/builtin" + +do_configure () { + os=${HOST_OS} + case $os in + linux-gnueabi |\ + linux-gnuspe |\ + linux-musleabi |\ + linux-muslspe |\ + linux-musl ) + os=linux + ;; + *) + ;; + esac + target="$os-${HOST_ARCH}" + case $target in + linux-arm*) + target=linux-armv4 + ;; + linux-aarch64*) + target=linux-aarch64 + ;; + linux-i?86 | linux-viac3) + target=linux-x86 + ;; + linux-gnux32-x86_64 | linux-muslx32-x86_64 ) + target=linux-x32 + ;; + linux-gnu64-x86_64) + target=linux-x86_64 + ;; + linux-mips | linux-mipsel) + # specifying TARGET_CC_ARCH prevents openssl from (incorrectly) adding target architecture flags + target="linux-mips32 ${TARGET_CC_ARCH}" + ;; + linux-gnun32-mips*) + target=linux-mips64 + ;; + linux-*-mips64 | linux-mips64 | linux-*-mips64el | linux-mips64el) + target=linux64-mips64 + ;; + linux-microblaze* | linux-nios2* | linux-sh3 | linux-sh4 | linux-arc*) + target=linux-generic32 + ;; + linux-powerpc) + target=linux-ppc + ;; + linux-powerpc64) + target=linux-ppc64 + ;; + linux-powerpc64le) + target=linux-ppc64le + ;; + linux-riscv32) + target=linux-generic32 + ;; + linux-riscv64) + target=linux-generic64 + ;; + linux-sparc | linux-supersparc) + target=linux-sparcv9 + ;; + esac + + useprefix=${prefix} + if [ "x$useprefix" = "x" ]; then + useprefix=/ + fi + # WARNING: do not set compiler/linker flags (-I/-D etc.) in EXTRA_OECONF, as they will fully replace the + # environment variables set by bitbake. Adjust the environment variables instead. + HASHBANGPERL="/usr/bin/env perl" PERL=perl PERL5LIB="${S}/external/perl/Text-Template-1.46/lib/" \ + perl ${S}/Configure ${EXTRA_OECONF} ${PACKAGECONFIG_CONFARGS} --prefix=$useprefix --openssldir=${libdir}/ssl-1.1 --libdir=${libdir} $target + perl ${B}/configdata.pm --dump +} + +do_install () { + oe_runmake DESTDIR="${D}" MANDIR="${mandir}" MANSUFFIX=ssl install + + oe_multilib_header openssl/opensslconf.h + + # Create SSL structure for packages such as ca-certificates which + # contain hard-coded paths to /etc/ssl. Debian does the same. + install -d ${D}${sysconfdir}/ssl + mv ${D}${libdir}/ssl-1.1/certs \ + ${D}${libdir}/ssl-1.1/private \ + ${D}${libdir}/ssl-1.1/openssl.cnf \ + ${D}${sysconfdir}/ssl/ + + # Although absolute symlinks would be OK for the target, they become + # invalid if native or nativesdk are relocated from sstate. + ln -sf ${@oe.path.relative('${libdir}/ssl-1.1', '${sysconfdir}/ssl/certs')} ${D}${libdir}/ssl-1.1/certs + ln -sf ${@oe.path.relative('${libdir}/ssl-1.1', '${sysconfdir}/ssl/private')} ${D}${libdir}/ssl-1.1/private + ln -sf ${@oe.path.relative('${libdir}/ssl-1.1', '${sysconfdir}/ssl/openssl.cnf')} ${D}${libdir}/ssl-1.1/openssl.cnf +} + +do_install:append:class-native () { + create_wrapper ${D}${bindir}/openssl \ + OPENSSL_CONF=${libdir}/ssl-1.1/openssl.cnf \ + SSL_CERT_DIR=${libdir}/ssl-1.1/certs \ + SSL_CERT_FILE=${libdir}/ssl-1.1/cert.pem \ + OPENSSL_ENGINES=${libdir}/engines-1.1 +} + +do_install:append:class-nativesdk () { + mkdir -p ${D}${SDKPATHNATIVE}/environment-setup.d + install -m 644 ${WORKDIR}/environment.d-openssl.sh ${D}${SDKPATHNATIVE}/environment-setup.d/openssl.sh + sed 's|/usr/lib/ssl/|/usr/lib/ssl-1.1/|g' -i ${D}${SDKPATHNATIVE}/environment-setup.d/openssl.sh +} + +PTEST_BUILD_HOST_FILES += "configdata.pm" +PTEST_BUILD_HOST_PATTERN = "perl_version =" +do_install_ptest () { + # Prune the build tree + rm -f ${B}/fuzz/*.* ${B}/test/*.* + + cp ${S}/Configure ${B}/configdata.pm ${D}${PTEST_PATH} + cp -r ${S}/external ${B}/test ${S}/test ${B}/fuzz ${S}/util ${B}/util ${D}${PTEST_PATH} + + # For test_shlibload + ln -s ${libdir}/libcrypto.so.1.1 ${D}${PTEST_PATH}/ + ln -s ${libdir}/libssl.so.1.1 ${D}${PTEST_PATH}/ + + install -d ${D}${PTEST_PATH}/apps + ln -s ${bindir}/openssl ${D}${PTEST_PATH}/apps + install -m644 ${S}/apps/*.pem ${S}/apps/*.srl ${S}/apps/openssl.cnf ${D}${PTEST_PATH}/apps + install -m755 ${B}/apps/CA.pl ${D}${PTEST_PATH}/apps + + install -d ${D}${PTEST_PATH}/engines + install -m755 ${B}/engines/ossltest.so ${D}${PTEST_PATH}/engines +} + +# Add the openssl.cnf file to the openssl-conf package. Make the libcrypto +# package RRECOMMENDS on this package. This will enable the configuration +# file to be installed for both the openssl-bin package and the libcrypto +# package since the openssl-bin package depends on the libcrypto package. + +PACKAGES =+ "libcrypto libssl openssl-conf ${PN}-engines ${PN}-misc" + +FILES:libcrypto = "${libdir}/libcrypto${SOLIBS}" +FILES:libssl = "${libdir}/libssl${SOLIBS}" +FILES:openssl-conf = "${sysconfdir}/ssl/openssl.cnf" +FILES:${PN}-engines = "${libdir}/engines-1.1" +FILES:${PN}-misc = "${libdir}/ssl-1.1/misc" +FILES:${PN} =+ "${libdir}/ssl-1.1/*" +FILES:${PN}:append:class-nativesdk = " ${SDKPATHNATIVE}/environment-setup.d/openssl.sh" + +CONFFILES:openssl-conf = "${sysconfdir}/ssl/openssl.cnf" + +RRECOMMENDS:libcrypto += "openssl-conf" +RDEPENDS:${PN}-ptest += "openssl-bin perl perl-modules bash" + +BBCLASSEXTEND = "native nativesdk" + +CVE_PRODUCT = "openssl:openssl" + +# Only affects OpenSSL >= 1.1.1 in combination with Apache < 2.4.37 +# Apache in meta-webserver is already recent enough +CVE_CHECK_WHITELIST += "CVE-2019-0190" diff --git a/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.service b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.service new file mode 100644 index 000000000..e8b563850 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.service @@ -0,0 +1,10 @@ +[Unit] +Description=Check for AC boot +After=xyz.openbmc_project.Settings.service + +[Service] +Type=oneshot +ExecStart=/usr/bin/ac-boot-check.sh + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.sh b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.sh new file mode 100644 index 000000000..bf5377482 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check/ac-boot-check.sh @@ -0,0 +1,26 @@ +#!/bin/sh + +bitWiseAnd() { + local IFS='&' + printf "%s\n" "$(( $* ))" +} + +ACBOOT="False" + +while IFS=' ' read -ra OPTIONS; do + for i in "${OPTIONS[@]}"; do + while IFS='=' read option param; do + if [ "resetreason" == "$option" ]; then + if [ $(bitWiseAnd "$param" "0x1") -ne 0 ]; then + ACBOOT="True" + fi + fi + done <<< $i + done +done < /proc/cmdline + +busctl set-property xyz.openbmc_project.Settings /xyz/openbmc_project/control/host0/ac_boot xyz.openbmc_project.Common.ACBoot ACBoot s "$ACBOOT" + +source /etc/os-release + +echo "VERSION INFO - BMC - ${VERSION_ID}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check_git.bb b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check_git.bb new file mode 100644 index 000000000..10d2c6f29 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/ac-boot-check/ac-boot-check_git.bb @@ -0,0 +1,24 @@ +SUMMARY = "AC Boot Check" +DESCRIPTION = "Script to check the resetreason for AC boot" + +S = "${WORKDIR}" +SRC_URI = "file://ac-boot-check.sh \ + file://ac-boot-check.service \ +" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/ac-boot-check.service" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/ac-boot-check.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${S}/ac-boot-check.sh ${D}/${bindir}/ac-boot-check.sh +} + +SYSTEMD_SERVICE:${PN} += " ac-boot-check.service" diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug_git.bb b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug_git.bb new file mode 100644 index 000000000..74db92917 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug_git.bb @@ -0,0 +1,41 @@ +inherit obmc-phosphor-systemd + +SUMMARY = "At Scale Debug Service" +DESCRIPTION = "At Scale Debug Service exposes remote JTAG target debug capabilities" + +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://LICENSE;md5=8929d33c051277ca2294fe0f5b062f38" + + +inherit cmake +DEPENDS = "sdbusplus openssl libpam libgpiod safec" + +do_configure[depends] += "virtual/kernel:do_shared_workdir" + +SRC_URI = "git://github.com/Intel-BMC/asd;protocol=git" +SRCREV = "1.4.6" + +inherit useradd + +USERADD_PACKAGES = "${PN}" + +# add a special user asdbg +USERADD_PARAM:${PN} = "-u 999 asdbg" + +S = "${WORKDIR}/git" + +SYSTEMD_SERVICE:${PN} += "com.intel.AtScaleDebug.service" + +# Specify any options you want to pass to cmake using EXTRA_OECMAKE: +EXTRA_OECMAKE = "-DBUILD_UT=OFF" + +CFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include/uapi" +CFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include" + +# Copying the depricated header from kernel as a temporary fix to resolve build breaks. +# It should be removed later after fixing the header dependency in this repository. +SRC_URI += "file://asm/rwonce.h" +do_configure:prepend() { + cp -r ${WORKDIR}/asm ${S}/asm +} +CFLAGS:append = " -I ${S}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/asm/rwonce.h b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/asm/rwonce.h new file mode 100644 index 000000000..11619bdbe --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/asm/rwonce.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Prevent the compiler from merging or refetching reads or writes. The + * compiler is also forbidden from reordering successive instances of + * READ_ONCE and WRITE_ONCE, but only when the compiler is aware of some + * particular ordering. One way to make the compiler aware of ordering is to + * put the two invocations of READ_ONCE or WRITE_ONCE in different C + * statements. + * + * These two macros will also work on aggregate data types like structs or + * unions. + * + * Their two major use cases are: (1) Mediating communication between + * process-level code and irq/NMI handlers, all running on the same CPU, + * and (2) Ensuring that the compiler does not fold, spindle, or otherwise + * mutilate accesses that either do not require ordering or that interact + * with an explicit memory barrier or atomic instruction that provides the + * required ordering. + */ +#ifndef __ASM_GENERIC_RWONCE_H +#define __ASM_GENERIC_RWONCE_H + +#ifndef __ASSEMBLY__ + +#include <linux/compiler_types.h> +#include <linux/kasan-checks.h> +#include <linux/kcsan-checks.h> + +/* + * Yes, this permits 64-bit accesses on 32-bit architectures. These will + * actually be atomic in some cases (namely Armv7 + LPAE), but for others we + * rely on the access being split into 2x32-bit accesses for a 32-bit quantity + * (e.g. a virtual address) and a strong prevailing wind. + */ +#define compiletime_assert_rwonce_type(t) \ + compiletime_assert(__native_word(t) || sizeof(t) == sizeof(long long), \ + "Unsupported access size for {READ,WRITE}_ONCE().") + +/* + * Use __READ_ONCE() instead of READ_ONCE() if you do not require any + * atomicity. Note that this may result in tears! + */ +#ifndef __READ_ONCE +#define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x)) +#endif + +#define READ_ONCE(x) \ +({ \ + compiletime_assert_rwonce_type(x); \ + __READ_ONCE(x); \ +}) + +#define __WRITE_ONCE(x, val) \ +do { \ + *(volatile typeof(x) *)&(x) = (val); \ +} while (0) + +#define WRITE_ONCE(x, val) \ +do { \ + compiletime_assert_rwonce_type(x); \ + __WRITE_ONCE(x, val); \ +} while (0) + +static __always_inline +unsigned long __read_once_word_nocheck(const void *addr) +{ + return __READ_ONCE(*(unsigned long *)addr); +} + +/* + * Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need to load a + * word from memory atomically but without telling KASAN/KCSAN. This is + * usually used by unwinding code when walking the stack of a running process. + */ +#define READ_ONCE_NOCHECK(x) \ +({ \ + compiletime_assert(sizeof(x) == sizeof(unsigned long), \ + "Unsupported access size for READ_ONCE_NOCHECK()."); \ + (typeof(x))__read_once_word_nocheck(&(x)); \ +}) + +static __always_inline +unsigned long read_word_at_a_time(const void *addr) +{ + kasan_check_read(addr, 1); + return *(unsigned long *)addr; +} + +#endif /* __ASSEMBLY__ */ +#endif /* __ASM_GENERIC_RWONCE_H */ diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebug.service b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebug.service new file mode 100644 index 000000000..4411de11c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebug.service @@ -0,0 +1,12 @@ +[Unit] +Description=Intel BMC At Scale Debug +Requires=network-online.target + +[Service] +Restart=always +RestartSec=30 +ExecStart={bindir}/asd +Type=simple +SyslogIdentifier=asd + + diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebugJtagTest.service b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebugJtagTest.service new file mode 100644 index 000000000..281d1a993 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/files/com.intel.AtScaleDebugJtagTest.service @@ -0,0 +1,12 @@ +[Unit] +Description=Intel BMC At Scale Debug JTAG test to check if remote debug setting is enabled + +[Service] +Type=oneshot +ExecStartPre=/bin/sleep 10 +ExecStart={bindir}/jtag_test +SyslogIdentifier=jtag_test +RemainAfterExit=true + +[Install] +WantedBy=obmc-host-start@0.target diff --git a/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/40-oom_reboot.conf b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/40-oom_reboot.conf new file mode 100644 index 000000000..43967a28b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/40-oom_reboot.conf @@ -0,0 +1,4 @@ +# panic kernel on OOM +vm.panic_on_oom=2 +# reboot after 10 sec on panic +kernel.panic=10 diff --git a/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/fstab b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/fstab new file mode 100644 index 000000000..0b53093ae --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files/fstab @@ -0,0 +1,10 @@ +/dev/root / auto defaults 1 1 +proc /proc proc defaults 0 0 +devpts /dev/pts devpts mode=0620,gid=5 0 0 +tmpfs /run tmpfs mode=0755,nodev,nosuid,strictatime 0 0 +tmpfs /var/lib/systemd/coredump tmpfs rw,nosuid,nodev,size=67108864 0 0 +tmpfs /media tmpfs rw 0 0 + +# uncomment this if your device has a SD/MMC/Transflash slot +#/dev/mmcblk0p1 /media/card auto defaults,sync,noauto 0 0 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files_%.bbappend new file mode 100644 index 000000000..ba5e41360 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/base-files/base-files_%.bbappend @@ -0,0 +1,15 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI:append = " \ + file://fstab \ + file://40-oom_reboot.conf \ + " + +add_oom_reboot_config() { + install -d ${D}/${libdir}/sysctl.d + install -D -m 644 ${WORKDIR}/40-oom_reboot.conf ${D}/${libdir}/sysctl.d/40-oom_reboot.conf +} + +do_install:append() { + ${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', '', 'add_oom_reboot_config', d)} +} + diff --git a/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/dev-only.cfg b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/dev-only.cfg new file mode 100644 index 000000000..f8f49e001 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/dev-only.cfg @@ -0,0 +1,4 @@ +CONFIG_NC=y +CONFIG_NETSTAT=y +CONFIG_TFTP=y +CONFIG_WGET=y diff --git a/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/disable.cfg b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/disable.cfg new file mode 100644 index 000000000..2550ffaf5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/disable.cfg @@ -0,0 +1,6 @@ +CONFIG_NC=n +CONFIG_NETSTAT=n +CONFIG_TELNET=n +CONFIG_TFTP=n +CONFIG_WGET=n +CONFIG_UDHCPD=n diff --git a/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/enable.cfg b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/enable.cfg new file mode 100644 index 000000000..7e1b90da6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox/enable.cfg @@ -0,0 +1 @@ +CONFIG_TRUNCATE=y diff --git a/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox_%.bbappend new file mode 100644 index 000000000..ee6330b69 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/busybox/busybox_%.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI += " \ + file://disable.cfg \ + file://enable.cfg \ + " + +SRC_URI += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks','file://dev-only.cfg','',d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/dropbear/dropbear_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/dropbear/dropbear_%.bbappend new file mode 100644 index 000000000..029defb67 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/dropbear/dropbear_%.bbappend @@ -0,0 +1,12 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +SRC_URI += "file://enable-ssh.sh \ + file://0001-Enable-UART-mux-setting-before-SOL-activation-via-SS.patch \ + " + +do_install:append() { + install -m 0755 ${WORKDIR}/enable-ssh.sh ${D}${bindir}/ +} + +# Enable dropbear.socket and dropbearkey.service only for debug-tweaks +SYSTEMD_AUTO_ENABLE:${PN} = "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', 'enable', 'disable', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/0001-Enable-UART-mux-setting-before-SOL-activation-via-SS.patch b/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/0001-Enable-UART-mux-setting-before-SOL-activation-via-SS.patch new file mode 100644 index 000000000..22aed3a07 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/0001-Enable-UART-mux-setting-before-SOL-activation-via-SS.patch @@ -0,0 +1,43 @@ +From 41a43e4b149af0bbfa82ca1b9479dd7dfb2455de Mon Sep 17 00:00:00 2001 +From: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +Date: Wed, 13 Oct 2021 22:52:34 +0000 +Subject: [PATCH] Enable UART mux setting before SOL activation via SSH + +Switching UART routing when starting obmc-service introduces garbled +character printing out on physical host serial output and it's +inevitable so this commit moves the routing logic into host console +connection flow in SSH SOL to avoid the issue until SOL is actually +activated. + +Tested: SOL activation is working fine via SSH + +Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +--- + svr-runopts.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/svr-runopts.c b/svr-runopts.c +index 2c905dd..6fc25e8 100644 +--- a/svr-runopts.c ++++ b/svr-runopts.c +@@ -414,6 +414,17 @@ void svr_getopts(int argc, char ** argv) { + } + + if (svr_opts.forced_command) { ++ if (strcmp(svr_opts.forced_command, "/usr/bin/obmc-console-client") == 0) { ++ FILE *fp; ++ fp = fopen("/sys/bus/platform/drivers/aspeed-uart-routing/" ++ "1e789098.uart-routing/hicra", ++ "w"); ++ if (fp != NULL) { ++ char *uartMuxCtrlVal = "0x03450003"; ++ fprintf(fp, "%s", uartMuxCtrlVal); ++ fclose(fp); ++ } ++ } + dropbear_log(LOG_INFO, "Forced command set to '%s'", svr_opts.forced_command); + } + #if DROPBEAR_PLUGIN +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/enable-ssh.sh b/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/enable-ssh.sh new file mode 100755 index 000000000..01ebe098f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/dropbear/files/enable-ssh.sh @@ -0,0 +1,31 @@ +#!/bin/sh + +usage="$(basename $0) [-h] [-d] -- Enable/Disable ssh for root user +where: + -h help + -d disable ssh and remove priv-admin permission for root user" + +enable_ssh() { + systemctl enable --now dropbear.socket + groupmems -g priv-admin -a root + echo "Enabled SSH service for root user successful" +} + +disable_ssh() { + systemctl disable --now dropbear.socket + systemctl stop dropbear@*.service + groupmems -g priv-admin -d root + echo "Disabled SSH service" +} + +case "$1" in +"-h") + echo ${usage} + ;; +"-d") + disable_ssh + ;; +*) + enable_ssh + ;; +esac diff --git a/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh new file mode 100644 index 000000000..96ec876cc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh @@ -0,0 +1,366 @@ +#!/bin/sh + +log() { + echo "$@" +} + +FWTYPE="" +FWVER="" +redfish_log_fw_evt() { + local evt=$1 + local sev="" + local msg="" + [ -z "$FWTYPE" ] && return + [ -z "$FWVER" ] && return + case "$evt" in + start) + evt=OpenBMC.0.1.FirmwareUpdateStarted + msg="${FWTYPE} firmware update to version ${FWVER} started." + sev=OK + ;; + success) + evt=OpenBMC.0.1.FirmwareUpdateCompleted + msg="${FWTYPE} firmware update to version ${FWVER} completed successfully." + sev=OK + ;; + abort) + evt=OpenBMC.0.1.FirmwareUpdateFailed + msg="${FWTYPE} firmware update to version ${FWVER} failed." + sev=Warning + ;; + *) return ;; + esac + logger-systemd --journald <<-EOF + MESSAGE=$msg + PRIORITY=2 + SEVERITY=${sev} + REDFISH_MESSAGE_ID=${evt} + REDFISH_MESSAGE_ARGS=${FWTYPE},${FWVER} + EOF +} + +wait_for_log_sync() +{ + sync + sleep 5 +} + +PFR_BUS=4 +PFR_ADDR=0x38 +PFR_ID_REG=0x00 +PFR_STATE_REG=0x03 +PFR_PROV_REG=0x0a +PFR_INTENT_REG=0x13 +pfr_read() { + [ $# -ne 1 ] && return 1 + local reg=$1 + i2cget -y $PFR_BUS $PFR_ADDR $reg 2>/dev/null +} + +pfr_write() { + [ $# -ne 2 ] && return 1 + local reg=$1 + local val=$2 + i2cset -y $PFR_BUS $PFR_ADDR $reg $val >&/dev/null +} + +pfr_active_update() { + local factory_reset="" + local recovery_offset=0x2a00000 + systemctl stop nv-sync.service || \ + log "BMC NV sync failed to stop" + # transition from non-PFR to PFR image requires factory reset + if [ ! -e /usr/share/pfr ]; then + factory_reset="-r" + mtd-util pfr stage $LOCAL_PATH $recovery_offset + fi + mtd-util $factory_reset pfr write $LOCAL_PATH + redfish_log_fw_evt success + # only wait for logging if not transitioning from non-PFR to PFR + if [ -e /usr/share/pfr ]; then + # exit bmc no nv mode + systemctl start nv-sync.service || log "failed to start nv-sync" + wait_for_log_sync + fi + reboot -f +} + +pfr_staging_update() { + log "Updating $(basename $TGT)" + flash_erase $TGT $erase_offset $blk_cnt + log "Writing $(stat -c "%s" "$LOCAL_PATH") bytes" + # cat "$LOCAL_PATH" > "$TGT" + dd bs=4k seek=$(($erase_offset / 0x1000)) if=$LOCAL_PATH of=$TGT 2>/dev/null + + # remove the updated image from /tmp + rm -f $LOCAL_PATH + redfish_log_fw_evt success + log "Setting update intent in PFR CPLD" + wait_for_log_sync + + # write to PFRCPLD about BMC update intent. + pfr_write 0x13 $upd_intent_val +} + +pfr_active_mode() { + # check for 0xde in register file 0 + local id=$(pfr_read $PFR_ID_REG) || return 1 + [ "$id" == "0xde" ] || return 1 + local state=$(pfr_read $PFR_STATE_REG) || return 1 + local prov=$(pfr_read $PFR_PROV_REG) || return 1 + prov=$((prov & 0x20)) + [ "$prov" == "32" ] && return 0 + return 1 +} + +blk0blk1_update() { + # PFR-style image update section + # read the image type from the uploaded image + # Byte at location 0x8 gives image type + TGT="/dev/mtd/image-stg" + img_type=$(hexdump -s 8 -n 1 -e '/1 "%02x\n"' $LOCAL_PATH) + log "image-type=$img_type" + + if [ $local_file -eq 0 ]; then + img_type_str=$(busctl get-property xyz.openbmc_project.Software.BMC.Updater /xyz/openbmc_project/software/$img_obj xyz.openbmc_project.Software.Version Purpose | cut -d " " -f 2 | cut -d "." -f 6 | sed 's/.\{1\}$//') + img_target=$(busctl get-property xyz.openbmc_project.Software.BMC.Updater /xyz/openbmc_project/software/$img_obj xyz.openbmc_project.Software.Activation RequestedActivation | cut -d " " -f 2| cut -d "." -f 6 | sed 's/.\{1\}$//') + else + img_type_str='BMC' + img_target='Active' + fi + + apply_time=$(busctl get-property xyz.openbmc_project.Settings /xyz/openbmc_project/software/apply_time xyz.openbmc_project.Software.ApplyTime RequestedApplyTime | cut -d " " -f 2 | cut -d "." -f 6 | sed 's/.\{1\}$//') + log "image-name=$img_type_str" + log "image-target=$img_target" + log "apply_time=$apply_time" + + case "$img_type" in + 04) + if [ "$img_type_str" == 'BMC' ]; then + # BMC image - max size 32MB + log "BMC firmware image" + img_size=33554432 + if [ "$img_target" == 'StandbySpare' ]; then + upd_intent_val=0x10 + else + upd_intent_val=0x08 + fi + erase_offset=0 + FWTYPE="BMC" + FWVER="${RANDOM}-fixme" + else + # log error the image selected for update is not same as downloaded. + log "Mismatch: image selected for update and image parsed are different" + redfish_log_fw_evt abort + return 1 + fi + ;; + 00) + if [ "$img_type_str" == 'Other' ]; then + log "CPLD firmware image" + # CPLD image- max size 1MB + img_size=1048576 + if [ "$img_target" == 'StandbySpare' ]; then + upd_intent_val=0x20 + else + upd_intent_val=0x04 + fi + erase_offset=0x3000000 + FWTYPE="CPLD" + FWVER="${RANDOM}-fixme" + else + # log error the image selected for update is not same as downloaded. + log "Mismatch: image selected for update and image parsed are different" + redfish_log_fw_evt abort + return 1 + fi + ;; + 02) + if [ "$img_type_str" = 'Host' ]; then + # BIOS image- max size 16MB + log "BIOS firmware image" + img_size=16777216 + if [ "$img_target" == 'StandbySpare' ]; then + upd_intent_val=0x02 + else + upd_intent_val=0x41 + fi + erase_offset=0x2000000 + # TODO: parse out the fwtype and fwver once that is specified + FWTYPE="BIOS" + FWVER="${RANDOM}-fixme" + else + # log error the image selected for update is not same as downloaded. + log "Mismatch: image selected for update and image parsed are different" + redfish_log_fw_evt abort + return 1 + fi + ;; + *) + log "Unknown image type ${img_type}" + return 1 + ;; + esac + + # For deferred updates + if [ "$apply_time" == 'OnReset' ]; then + upd_intent_val=$(( "$upd_intent_val"|0x80 )) + fi + + # do a quick sanity check on the image + if [ $(stat -c "%s" "$LOCAL_PATH") -gt $img_size ]; then + log "Update file "$LOCAL_PATH" is bigger than the supported image size" + redfish_log_fw_evt abort + return 1 + fi + blk_cnt=$((img_size / 0x10000)) + + if pfr_active_mode; then + # pfr enforcing mode; any b0b1 image type + pfr_staging_update + elif [ "$img_type" == '04' ]; then + # legacy mode; pfr is not present but we got a pfr image + log "Updating BMC active firmware- PFR unprovisioned mode" + pfr_active_update + else + # error; pfr is not present but we got a pfr image, + # an invalid image, or nonBMC image + log "PFR inactive or invalid image type:${img_type}, cowardly refusing to process image" + redfish_log_fw_evt abort + return 1 + fi +} + +ping_pong_update() { + # if some one tries to update with non-PFR on PFR image + # just exit + if [ -e /usr/share/pfr ]; then + log "Update exited as non-PFR image is tried onto PFR image" + redfish_log_fw_evt abort + return 1 + fi + # do a quick sanity check on the image + if [ $(stat -c "%s" "$LOCAL_PATH") -lt 10000000 ]; then + log "Update file "$LOCAL_PATH" seems to be too small" + redfish_log_fw_evt abort + return 1 + fi + dtc -I dtb -O dtb "$LOCAL_PATH" > /dev/null 2>&1 + if [ $? -ne 0 ]; then + log "Update file $LOCAL_PATH doesn't seem to be in the proper format" + redfish_log_fw_evt abort + return 1 + fi + + # guess based on fw_env which partition we booted from + local BOOTADDR=$(fw_printenv bootcmd | awk '{print $2}') + local TGT="/dev/mtd/image-a" + case "$BOOTADDR" in + 20080000) TGT="/dev/mtd/image-b"; BOOTADDR="22480000" ;; + 22480000) TGT="/dev/mtd/image-a"; BOOTADDR="20080000" ;; + *) TGT="/dev/mtd/image-a"; BOOTADDR="20080000" ;; + esac + log "Updating $(basename $TGT) (use bootm $BOOTADDR)" + flash_erase $TGT 0 0 + log "Writing $(stat -c "%s" "$LOCAL_PATH") bytes" + cat "$LOCAL_PATH" > "$TGT" + fw_setenv "bootcmd" "bootm ${BOOTADDR}" + redfish_log_fw_evt success + wait_for_log_sync + # reboot + reboot -f +} + +fetch_fw() { + PROTO=$(echo "$URI" | sed 's,\([a-z]*\)://.*$,\1,') + REMOTE=$(echo "$URI" | sed 's,.*://\(.*\)$,\1,') + REMOTE_HOST=$(echo "$REMOTE" | sed 's,\([^/]*\)/.*$,\1,') + if [ "$PROTO" = 'scp' ]; then + REMOTE_PATH=$(echo "$REMOTE" | cut -d':' -f2) + else + REMOTE_PATH=$(echo "$REMOTE" | sed 's,[^/]*/\(.*\)$,\1,') + fi + LOCAL_PATH="/tmp/$(basename $REMOTE_PATH)" + log "PROTO=$PROTO" + log "REMOTE=$REMOTE" + log "REMOTE_HOST=$REMOTE_HOST" + log "REMOTE_PATH=$REMOTE_PATH" + if [ ! -e $LOCAL_PATH ] || [ $(stat -c %s $LOCAL_PATH) -eq 0 ]; then + log "Download '$REMOTE_PATH' from $PROTO $REMOTE_HOST $REMOTE_PATH" + case "$PROTO" in + scp) + mkdir -p $HOME/.ssh + if [ -e "$SSH_ID" ]; then + ARG_ID="-i $SSH_ID" + fi + scp $ARG_ID $REMOTE_HOST$REMOTE_PATH $LOCAL_PATH + if [ $? -ne 0 ]; then + log "scp $REMOTE $LOCAL_PATH failed!" + return 1 + fi + ;; + tftp) + cd /tmp + tftp -g -r "$REMOTE_PATH" "$REMOTE_HOST" + if [ $? -ne 0 ]; then + log "tftp -g -r \"$REMOTE_PATH\" \"$REMOTE_HOST\" failed!" + return 1 + fi + ;; + http|https|ftp) + wget --no-check-certificate "$URI" -O "$LOCAL_PATH" + if [ $? -ne 0 ]; then + log "wget $URI failed!" + return 1 + fi + ;; + file) + LOCAL_PATH=$(echo $URI | sed 's,^file://,,') + ;; + *) + log "Invalid URI $URI" + return 1 + ;; + esac + fi +} + +update_fw() { + redfish_log_fw_evt start + # determine firmware file type + local magic=$(hexdump -n 4 -v -e '/1 "%02x"' "$LOCAL_PATH") + case "$magic" in + d00dfeed) ping_pong_update ;; + 19fdeab6) blk0blk1_update ;; + *) log "Uknown file type ${magic}" + esac +} + +# if this script was sourced, just return without executing anything +[ "$_" != "$0" ] && return 0 >&/dev/null + +usage() { + echo "usage: $(basename $0) uri" + echo " uri is something like: file:///path/to/fw" + echo " tftp://tftp.server.ip.addr/path/to/fw" + echo " scp://[user@]scp.server.ip.addr:/path/to/fw" + echo " http[s]://web.server.ip.addr/path/to/fw" + echo " ftp://[user@]ftp.server.ip.addr/path/to/fw" + exit 1 +} + +if [ "$1" = "-h" ] || [ "$1" = "--help" ]; then usage; fi +if [ $# -eq 0 ]; then + # set DEFURI in $HOME/.fwupd.defaults + URI="$DEFURI" +else + if [[ "$1" == *"/"* ]]; then + URI=$1 # local file + local_file=1 ; + else + URI="file:////tmp/images/$1/image-runtime" + img_obj=$1 + local_file=0 ; + fi +fi +fetch_fw && update_fw diff --git a/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/usb-ctrl b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/usb-ctrl new file mode 100644 index 000000000..ae9f54263 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/usb-ctrl @@ -0,0 +1,136 @@ +#!/bin/sh + +setup_image() +{ + set -x + local storage="$1" + local sz_mb="$2" + # create the backing store + dd if=/dev/zero of=$storage bs=1M seek=$sz_mb count=0 2>/dev/null + # this shows up as 23FC-F676 in /dev/disk/by-uuid + local diskid=0x23FCF676 + mkdosfs -n 'OPENBMC-FW' -i $diskid -I $storage >/dev/null 2>&1 +} + +mount_image() +{ + set -x + local storage="$1" + local stormnt="$2" + mkdir -p $stormnt || exit 1 + mount -o loop -t vfat $storage $stormnt +} + +cleanup_image() +{ + set -x + local storage="$1" + local stormnt="$2" + umount -f "$stormnt" + rm -f "$storage" + rmdir "$stormnt" +} + +GADGET_BASE=/sys/kernel/config/usb_gadget + +which_dev() +{ + local in_use=$(cat $GADGET_BASE/*/UDC) + cd /sys/class/udc + for D in *; do + case "$in_use" in + *"$D"*) ;; + *) echo "$D"; return 0;; + esac + done + return 1 +} + +usb_ms_insert() +{ + local name="$1" + local storage="$2" + + if [ -d $GADGET_BASE/$name ]; then + echo "device $name already exists" >&2 + return 1 + fi + mkdir $GADGET_BASE/$name + cd $GADGET_BASE/$name + + echo 0x1d6b > idVendor # Linux Foundation + echo 0x0105 > idProduct # FunctionFS Gadget + mkdir strings/0x409 + local machineid=$(cat /etc/machine-id) + local data="OpenBMC USB mass storage gadget device serial number" + local serial=$( echo -n "${machineid}${data}${machineid}" | \ + sha256sum | cut -b 0-12 ) + echo $serial > strings/0x409/serialnumber + echo OpenBMC > strings/0x409/manufacturer + echo "OpenBMC Mass Storage" > strings/0x409/product + + mkdir configs/c.1 + mkdir functions/mass_storage.$name + echo $storage > functions/mass_storage.$name/lun.0/file + echo 0 > functions/mass_storage.$name/lun.0/removable + mkdir configs/c.1/strings/0x409 + + echo "Conf 1" > configs/c.1/strings/0x409/configuration + echo 120 > configs/c.1/MaxPower + ln -s functions/mass_storage.$name configs/c.1 + local dev=$(which_dev) + echo $dev > UDC +} + +usb_ms_eject() +{ + local name="$1" + + echo '' > $GADGET_BASE/$name/UDC + + rm -f $GADGET_BASE/$name/configs/c.1/mass_storage.$name + rmdir $GADGET_BASE/$name/configs/c.1/strings/0x409 + rmdir $GADGET_BASE/$name/configs/c.1 + rmdir $GADGET_BASE/$name/functions/mass_storage.$name + rmdir $GADGET_BASE/$name/strings/0x409 + rmdir $GADGET_BASE/$name +} + +usage() +{ + echo "Usage: $0 <action> ..." + echo " $0 setup <file> <sizeMB>" + echo " $0 insert <name> <file>" + echo " $0 eject <name>" + echo " $0 mount <file> <mnt>" + echo " $0 cleanup <file> <mnt>" + exit 1 +} + +echo "$#: $0 $@" +case "$1" in + insert) + shift + usb_ms_insert "$@" + ;; + eject) + shift + usb_ms_eject "$@" + ;; + setup) + shift + setup_image "$@" + ;; + mount) + shift + mount_image "$@" + ;; + cleanup) + shift + cleanup_image "$@" + ;; + *) + usage + ;; +esac +exit $? diff --git a/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb b/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb new file mode 100644 index 000000000..fb76cfb3c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb @@ -0,0 +1,36 @@ +SUMMARY = "Temporary intel-fw-update script" +DESCRIPTION = "At runtime, perform a firmware update and reboot" +PR = "r1" + +# flash_eraseall +RDEPENDS:intel-fw-update += "mtd-utils" +# wget tftp scp +RDEPENDS:intel-fw-update += "busybox dropbear" +# mkfs.vfat, parted +RDEPENDS:intel-fw-update += "dosfstools dtc" + +RDEPENDS:intel-fw-update += "bash" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +PFR_EN = "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'pfr', '', d)}" + +SRC_URI += "file://fwupd.sh" +SRC_URI += "file://usb-ctrl" + +DEPENDS += "obmc-intel-pfr-image-native" + +# runtime authentication of some features requires the root key certificate +FILES:${PN} += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', '${datadir}/pfr/rk_cert.pem', '', d)}" +PFR_CFG_DIR = "${STAGING_DIR_NATIVE}${datadir}/pfrconfig" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/fwupd.sh ${D}${bindir} + install -m 0755 ${WORKDIR}/usb-ctrl ${D}${bindir} + + if [ "${PFR_EN}" = "pfr" ]; then + install -d ${D}${datadir}/pfr + install -m 0644 ${PFR_CFG_DIR}/rk_cert.pem ${D}${datadir}/pfr + fi +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0035-Fix-build-error.patch b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0035-Fix-build-error.patch new file mode 100644 index 000000000..6cf56c64f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0035-Fix-build-error.patch @@ -0,0 +1,26 @@ +From 2a246ee8129e7cd4660fe76f7ab656191be7bc5e Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Thu, 11 Mar 2021 11:23:00 -0800 +Subject: [PATCH] Fix build error + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + stdlib/canonicalize.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/stdlib/canonicalize.c b/stdlib/canonicalize.c +index 698f9ede2557..cac1f73d7471 100644 +--- a/stdlib/canonicalize.c ++++ b/stdlib/canonicalize.c +@@ -198,7 +198,7 @@ static char * + realpath_stk (const char *name, char *resolved, + struct scratch_buffer *rname_buf) + { +- char *dest; ++ char *dest = NULL; + char const *start; + char const *end; + int num_links = 0; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0036-sunrpc-use-snprintf-to-guard-against-buffer-overflow.patch b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0036-sunrpc-use-snprintf-to-guard-against-buffer-overflow.patch new file mode 100644 index 000000000..079ce0faa --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc/0036-sunrpc-use-snprintf-to-guard-against-buffer-overflow.patch @@ -0,0 +1,35 @@ +From 174f4391195960b0b728fb5ee4959fcb9e12d59a Mon Sep 17 00:00:00 2001 +From: Philipp Tomsich <philipp.tomsich@vrull.eu> +Date: Wed, 2 Dec 2020 20:04:11 +0100 +Subject: [PATCH] sunrpc: use snprintf to guard against buffer overflow + +GCC11 has improved detection of buffer overflows detectable through the analysis +of format strings and parameters, which identifies the following issue: + netname.c:52:28: error: '%s' directive writing up to 255 bytes into a region + of size between 239 and 249 [-Werror=format-overflow=] + +This rewrites user2netname() to use snprintf to guard against overflows. +--- + sunrpc/netname.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/sunrpc/netname.c b/sunrpc/netname.c +index ceed23b1a72d..1a18b7a39453 100644 +--- a/sunrpc/netname.c ++++ b/sunrpc/netname.c +@@ -49,8 +49,10 @@ user2netname (char netname[MAXNETNAMELEN + 1], const uid_t uid, + if ((strlen (dfltdom) + OPSYS_LEN + 3 + MAXIPRINT) > (size_t) MAXNETNAMELEN) + return 0; + +- sprintf (netname, "%s.%d@%s", OPSYS, uid, dfltdom); +- i = strlen (netname); ++ i = snprintf (netname, MAXNETNAMELEN + 1, "%s.%d@%s", OPSYS, uid, dfltdom); ++ if (i > (size_t) MAXNETNAMELEN) ++ return 0; ++ + if (netname[i - 1] == '.') + netname[i - 1] = '\0'; + return 1; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc_%.bbappend new file mode 100644 index 000000000..19e136238 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/glibc/glibc_%.bbappend @@ -0,0 +1,6 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://0035-Fix-build-error.patch \ + file://0036-sunrpc-use-snprintf-to-guard-against-buffer-overflow.patch \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-core/host-error-monitor/host-error-monitor_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/host-error-monitor/host-error-monitor_%.bbappend new file mode 100644 index 000000000..4b0ce63f9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/host-error-monitor/host-error-monitor_%.bbappend @@ -0,0 +1,4 @@ +SRC_URI = "git://github.com/openbmc/host-error-monitor" +SRCREV = "1c208480e6de77a5a41b0733c595e8d4a99e5311" + +EXTRA_OECMAKE = "-DYOCTO=1" diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/.clang-format b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/.clang-format new file mode 100644 index 000000000..86a2a9d63 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/.clang-format @@ -0,0 +1,21 @@ +--- +BasedOnStyle: LLVM +Language: Cpp +IndentWidth: 8 +UseTab: Always +BreakBeforeBraces: Linux +AlwaysBreakBeforeMultilineStrings: true +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AllowShortFunctionsOnASingleLine: false +IndentCaseLabels: false +AlignEscapedNewlinesLeft: false +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: false +AlignAfterOpenBracket: true +SpaceAfterCStyleCast: false +MaxEmptyLinesToKeep: 2 +BreakBeforeBinaryOperators: NonAssignment +BreakStringLiterals: false +SortIncludes: true +ContinuationIndentWidth: 8 diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0001-Smbus-changes-for-libmctp.patch b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0001-Smbus-changes-for-libmctp.patch new file mode 100644 index 000000000..d537b5db7 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0001-Smbus-changes-for-libmctp.patch @@ -0,0 +1,121 @@ +From 8e3ae96546010c5d4f3fce6df9c32aece1093458 Mon Sep 17 00:00:00 2001 +From: Nikhil Potade <nikhil.potade@linux.intel.com> +Date: Tue, 19 Feb 2019 14:16:20 +0800 +Subject: [PATCH 1/1] Smbus changes for libmctp + +Signed-off-by: James Feist <james.feist@linux.intel.com> + +--- + core.c | 2 ++ + libmctp.h | 40 ++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 42 insertions(+) + +diff --git a/core.c b/core.c +index 6e59993..3b11672 100644 +--- a/core.c ++++ b/core.c +@@ -19,6 +19,7 @@ + + /* Internal data structures */ + ++/* clang-format off */ + struct mctp_bus { + mctp_eid_t eid; + struct mctp_binding *binding; +@@ -58,6 +59,7 @@ struct mctp { + ROUTE_BRIDGE, + } route_policy; + }; ++/* clang-format on */ + + #ifndef BUILD_ASSERT + #define BUILD_ASSERT(x) \ +diff --git a/libmctp.h b/libmctp.h +index 40e5371..766473b 100644 +--- a/libmctp.h ++++ b/libmctp.h +@@ -19,6 +19,7 @@ typedef uint8_t mctp_eid_t; + #define MCTP_EID_BROADCAST 0xff + + /* MCTP packet definitions */ ++/* clang-format off */ + struct mctp_hdr { + uint8_t ver; + uint8_t dest; +@@ -34,20 +35,57 @@ struct mctp_hdr { + #define MCTP_HDR_SEQ_MASK (0x3) + #define MCTP_HDR_TAG_SHIFT (0) + #define MCTP_HDR_TAG_MASK (0x7) ++/* clang-format on */ + + /* Baseline Transmission Unit and packet size */ + #define MCTP_BTU 64 + #define MCTP_PACKET_SIZE(unit) ((unit) + sizeof(struct mctp_hdr)) + #define MCTP_BODY_SIZE(unit) ((unit) - sizeof(struct mctp_hdr)) + ++#define MCTP_CONTROL_MESSAGE_TYPE 0x00 ++ ++enum MCTP_COMMAND_CODE { ++ MCTP_COMMAND_CODE_SET_EID = 0x01, ++ MCTP_COMMAND_CODE_GET_EID = 0x02, ++ MCTP_COMMAND_CODE_GET_ENDPOINT_UUID = 0x03, ++ MCTP_COMMAND_CODE_GET_MCTP_VERSION_SUPPORT = 0x04, ++ MCTP_COMMAND_CODE_GET_MESSAGE_TYPE_SUPPORT = 0x05, ++ MCTP_COMMAND_CODE_GET_VENDOR_DEFINED_MSG_SUPPORT= 0x06, ++ MCTP_COMMAND_CODE_RESOLVE_ENDPOINT_ID = 0x07, ++ MCTP_COMMAND_CODE_ALLOCATE_ENDPOINT_IDS = 0x08, ++ MCTP_COMMAND_CODE_ROUTING_INFORMATION_UPDATE = 0x09, ++ MCTP_COMMAND_CODE_GET_ROUTING_TABLE_ENTRIES = 0x0A, ++ MCTP_COMMAND_CODE_PREPARE_FOR_ENDPOINT_DISCOVERY= 0x0B, ++ MCTP_COMMAND_CODE_ENDPOINT_DISCOVERY = 0x0C, ++ MCTP_COMMAND_CODE_DISCOVERY_NOTIFY = 0x0D, ++ MCTP_COMMAND_CODE_GET_NETWORK_ID = 0x0E, ++ MCTP_COMMAND_CODE_QUERY_HOP = 0x0F, ++ MCTP_COMMAND_CODE_RESOLVE_UUID = 0x10, ++ MCTP_COMMAND_CODE_QUERY_RATE_LIMIT = 0x11, ++ MCTP_COMMAND_CODE_REQUEST_TX_RATE_LIMIT = 0x12, ++ MCTP_COMMAND_CODE_UPDATE_RATE_LIMIT = 0x13, ++ MCTP_COMMAND_CODE_QUERY_SUPPORTED_INTERFACES = 0x14 ++}; ++ ++enum MCTP_CONTROL_MSG_COMPLETION_CODE { ++ MCTP_CONTROL_MSG_STATUS_SUCCESS = 0x00, ++ MCTP_CONTROL_MSG_STATUS_ERROR = 0x01, ++ MCTP_CONTROL_MSG_STATUS_ERROR_INVALID_DATA = 0x02, ++ MCTP_CONTROL_MSG_STATUS_ERROR_INVALID_LENGTH = 0x03, ++ MCTP_CONTROL_MSG_STATUS_ERROR_NOT_READY = 0x04, ++ MCTP_CONTROL_MSG_STATUS_ERROR_UNSUPPORTED_CMD = 0x05 ++}; ++ + /* packet buffers */ + ++/* clang-format off */ + struct mctp_pktbuf { + size_t start, end, size; + size_t mctp_hdr_off; + struct mctp_pktbuf *next; + unsigned char data[]; + }; ++/* clang-format on */ + + struct mctp_binding; + +@@ -96,6 +134,7 @@ int mctp_message_tx(struct mctp *mctp, mctp_eid_t eid, + void *msg, size_t msg_len); + + /* hardware bindings */ ++/* clang-format off */ + struct mctp_binding { + const char *name; + uint8_t version; +@@ -108,6 +147,7 @@ struct mctp_binding { + mctp_rx_fn control_rx; + void *control_rx_data; + }; ++/* clang-format on */ + + void mctp_binding_set_tx_enabled(struct mctp_binding *binding, bool enable); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0002-Fix-Memory-Leak.patch b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0002-Fix-Memory-Leak.patch new file mode 100644 index 000000000..52acac1ab --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/0002-Fix-Memory-Leak.patch @@ -0,0 +1,36 @@ +From bda505bc62f95ee927b75f87c52e04584dab4d79 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Fri, 26 Jun 2020 13:50:08 -0700 +Subject: [PATCH 1/1] Fix Memory Leak + +In mctp_send_tx_queue if rc is of an error, +the packet does not get freed, causing a leak. + +Change-Id: Ic39b0920b454608841e6e879cc028e455520e67d +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + core.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/core.c b/core.c +index 6e59993..c251b72 100644 +--- a/core.c ++++ b/core.c +@@ -543,11 +543,11 @@ static void mctp_send_tx_queue(struct mctp_bus *bus) + int rc; + + rc = mctp_packet_tx(bus, pkt); +- if (rc) +- break; +- + bus->tx_queue_head = pkt->next; + mctp_pktbuf_free(pkt); ++ ++ if (rc) ++ break; + } + + if (!bus->tx_queue_head) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/CMakeLists.txt new file mode 100644 index 000000000..28354123e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/CMakeLists.txt @@ -0,0 +1,27 @@ +cmake_minimum_required(VERSION 3.5 FATAL_ERROR) + +add_definitions(-DMCTP_LOG_STDERR) +add_definitions(-DMCTP_HAVE_FILEIO) +add_definitions(-DMCTP_HAVE_STDIO) +add_definitions(-DMCTP_DEFAULT_ALLOC) + +add_library( + libmctp STATIC alloc.c core.c log.c libmctp.h serial.c smbus.c crc32c.c) + +target_include_directories(libmctp + PUBLIC + $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}> + $<INSTALL_INTERFACE:include/libmctp) + +enable_testing() + +add_executable(test_eid tests/test_eid.c tests/test-utils.c) +target_link_libraries(test_eid libmctp) + +add_executable(test_seq tests/test_seq.c tests/test-utils.c) +target_link_libraries(test_seq libmctp) + +install(TARGETS libmctp DESTINATION lib) +install( + FILES libmctp.h libmctp-smbus.h libmctp-serial.h crc32c.h DESTINATION include) + diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/asm/rwonce.h b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/asm/rwonce.h new file mode 100644 index 000000000..c8beb875d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/asm/rwonce.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Prevent the compiler from merging or refetching reads or writes. The + * compiler is also forbidden from reordering successive instances of + * READ_ONCE and WRITE_ONCE, but only when the compiler is aware of some + * particular ordering. One way to make the compiler aware of ordering is to + * put the two invocations of READ_ONCE or WRITE_ONCE in different C + * statements. + * + * These two macros will also work on aggregate data types like structs or + * unions. + * + * Their two major use cases are: (1) Mediating communication between + * process-level code and irq/NMI handlers, all running on the same CPU, + * and (2) Ensuring that the compiler does not fold, spindle, or otherwise + * mutilate accesses that either do not require ordering or that interact + * with an explicit memory barrier or atomic instruction that provides the + * required ordering. + */ +#ifndef __ASM_GENERIC_RWONCE_H +#define __ASM_GENERIC_RWONCE_H + +#ifndef __ASSEMBLY__ + +#include <linux/compiler_types.h> +#include <linux/kasan-checks.h> +#include <linux/kcsan-checks.h> + +/* + * Yes, this permits 64-bit accesses on 32-bit architectures. These will + * actually be atomic in some cases (namely Armv7 + LPAE), but for others we + * rely on the access being split into 2x32-bit accesses for a 32-bit quantity + * (e.g. a virtual address) and a strong prevailing wind. + */ +#define compiletime_assert_rwonce_type(t) \ + compiletime_assert(__native_word(t) || sizeof(t) == sizeof(long long), \ + "Unsupported access size for {READ,WRITE}_ONCE().") + +/* + * Use __READ_ONCE() instead of READ_ONCE() if you do not require any + * atomicity. Note that this may result in tears! + */ +#ifndef __READ_ONCE +#define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x)) +#endif + +#define READ_ONCE(x) \ + ({ \ + compiletime_assert_rwonce_type(x); \ + __READ_ONCE(x); \ + }) + +#define __WRITE_ONCE(x, val) \ + do { \ + *(volatile typeof(x) *)&(x) = (val); \ + } while (0) + +#define WRITE_ONCE(x, val) \ + do { \ + compiletime_assert_rwonce_type(x); \ + __WRITE_ONCE(x, val); \ + } while (0) + +static __always_inline unsigned long __read_once_word_nocheck(const void *addr) +{ + return __READ_ONCE(*(unsigned long *)addr); +} + +/* + * Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need to load a + * word from memory atomically but without telling KASAN/KCSAN. This is + * usually used by unwinding code when walking the stack of a running process. + */ +#define READ_ONCE_NOCHECK(x) \ + ({ \ + compiletime_assert( \ + sizeof(x) == sizeof(unsigned long), \ + "Unsupported access size for READ_ONCE_NOCHECK()."); \ + (typeof(x)) __read_once_word_nocheck(&(x)); \ + }) + +static __always_inline unsigned long read_word_at_a_time(const void *addr) +{ + kasan_check_read(addr, 1); + return *(unsigned long *)addr; +} + +#endif /* __ASSEMBLY__ */ +#endif /* __ASM_GENERIC_RWONCE_H */ diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.c b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.c new file mode 100644 index 000000000..0d5090e2c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.c @@ -0,0 +1,93 @@ +#include "crc32c.h" +/*****************************************************************/ +/* */ +/* CRC LOOKUP TABLE */ +/* ================ */ +/* The following CRC lookup table was generated automagically */ +/* by the Rocksoft^tm Model CRC Algorithm Table Generation */ +/* Program V1.0 using the following model parameters: */ +/* */ +/* Width : 4 bytes. */ +/* Poly : 0x1EDC6F41L */ +/* Reverse : TRUE. */ +/* */ +/* For more information on the Rocksoft^tm Model CRC Algorithm, */ +/* see the document titled "A Painless Guide to CRC Error */ +/* Detection Algorithms" by Ross Williams */ +/* (ross@guest.adelaide.edu.au.). This document is likely to be */ +/* in the FTP archive "ftp.adelaide.edu.au/pub/rocksoft". */ +/* */ +/*****************************************************************/ + +unsigned long crctable[256] = { + 0x00000000L, 0xF26B8303L, 0xE13B70F7L, 0x1350F3F4L, 0xC79A971FL, + 0x35F1141CL, 0x26A1E7E8L, 0xD4CA64EBL, 0x8AD958CFL, 0x78B2DBCCL, + 0x6BE22838L, 0x9989AB3BL, 0x4D43CFD0L, 0xBF284CD3L, 0xAC78BF27L, + 0x5E133C24L, 0x105EC76FL, 0xE235446CL, 0xF165B798L, 0x030E349BL, + 0xD7C45070L, 0x25AFD373L, 0x36FF2087L, 0xC494A384L, 0x9A879FA0L, + 0x68EC1CA3L, 0x7BBCEF57L, 0x89D76C54L, 0x5D1D08BFL, 0xAF768BBCL, + 0xBC267848L, 0x4E4DFB4BL, 0x20BD8EDEL, 0xD2D60DDDL, 0xC186FE29L, + 0x33ED7D2AL, 0xE72719C1L, 0x154C9AC2L, 0x061C6936L, 0xF477EA35L, + 0xAA64D611L, 0x580F5512L, 0x4B5FA6E6L, 0xB93425E5L, 0x6DFE410EL, + 0x9F95C20DL, 0x8CC531F9L, 0x7EAEB2FAL, 0x30E349B1L, 0xC288CAB2L, + 0xD1D83946L, 0x23B3BA45L, 0xF779DEAEL, 0x05125DADL, 0x1642AE59L, + 0xE4292D5AL, 0xBA3A117EL, 0x4851927DL, 0x5B016189L, 0xA96AE28AL, + 0x7DA08661L, 0x8FCB0562L, 0x9C9BF696L, 0x6EF07595L, 0x417B1DBCL, + 0xB3109EBFL, 0xA0406D4BL, 0x522BEE48L, 0x86E18AA3L, 0x748A09A0L, + 0x67DAFA54L, 0x95B17957L, 0xCBA24573L, 0x39C9C670L, 0x2A993584L, + 0xD8F2B687L, 0x0C38D26CL, 0xFE53516FL, 0xED03A29BL, 0x1F682198L, + 0x5125DAD3L, 0xA34E59D0L, 0xB01EAA24L, 0x42752927L, 0x96BF4DCCL, + 0x64D4CECFL, 0x77843D3BL, 0x85EFBE38L, 0xDBFC821CL, 0x2997011FL, + 0x3AC7F2EBL, 0xC8AC71E8L, 0x1C661503L, 0xEE0D9600L, 0xFD5D65F4L, + 0x0F36E6F7L, 0x61C69362L, 0x93AD1061L, 0x80FDE395L, 0x72966096L, + 0xA65C047DL, 0x5437877EL, 0x4767748AL, 0xB50CF789L, 0xEB1FCBADL, + 0x197448AEL, 0x0A24BB5AL, 0xF84F3859L, 0x2C855CB2L, 0xDEEEDFB1L, + 0xCDBE2C45L, 0x3FD5AF46L, 0x7198540DL, 0x83F3D70EL, 0x90A324FAL, + 0x62C8A7F9L, 0xB602C312L, 0x44694011L, 0x5739B3E5L, 0xA55230E6L, + 0xFB410CC2L, 0x092A8FC1L, 0x1A7A7C35L, 0xE811FF36L, 0x3CDB9BDDL, + 0xCEB018DEL, 0xDDE0EB2AL, 0x2F8B6829L, 0x82F63B78L, 0x709DB87BL, + 0x63CD4B8FL, 0x91A6C88CL, 0x456CAC67L, 0xB7072F64L, 0xA457DC90L, + 0x563C5F93L, 0x082F63B7L, 0xFA44E0B4L, 0xE9141340L, 0x1B7F9043L, + 0xCFB5F4A8L, 0x3DDE77ABL, 0x2E8E845FL, 0xDCE5075CL, 0x92A8FC17L, + 0x60C37F14L, 0x73938CE0L, 0x81F80FE3L, 0x55326B08L, 0xA759E80BL, + 0xB4091BFFL, 0x466298FCL, 0x1871A4D8L, 0xEA1A27DBL, 0xF94AD42FL, + 0x0B21572CL, 0xDFEB33C7L, 0x2D80B0C4L, 0x3ED04330L, 0xCCBBC033L, + 0xA24BB5A6L, 0x502036A5L, 0x4370C551L, 0xB11B4652L, 0x65D122B9L, + 0x97BAA1BAL, 0x84EA524EL, 0x7681D14DL, 0x2892ED69L, 0xDAF96E6AL, + 0xC9A99D9EL, 0x3BC21E9DL, 0xEF087A76L, 0x1D63F975L, 0x0E330A81L, + 0xFC588982L, 0xB21572C9L, 0x407EF1CAL, 0x532E023EL, 0xA145813DL, + 0x758FE5D6L, 0x87E466D5L, 0x94B49521L, 0x66DF1622L, 0x38CC2A06L, + 0xCAA7A905L, 0xD9F75AF1L, 0x2B9CD9F2L, 0xFF56BD19L, 0x0D3D3E1AL, + 0x1E6DCDEEL, 0xEC064EEDL, 0xC38D26C4L, 0x31E6A5C7L, 0x22B65633L, + 0xD0DDD530L, 0x0417B1DBL, 0xF67C32D8L, 0xE52CC12CL, 0x1747422FL, + 0x49547E0BL, 0xBB3FFD08L, 0xA86F0EFCL, 0x5A048DFFL, 0x8ECEE914L, + 0x7CA56A17L, 0x6FF599E3L, 0x9D9E1AE0L, 0xD3D3E1ABL, 0x21B862A8L, + 0x32E8915CL, 0xC083125FL, 0x144976B4L, 0xE622F5B7L, 0xF5720643L, + 0x07198540L, 0x590AB964L, 0xAB613A67L, 0xB831C993L, 0x4A5A4A90L, + 0x9E902E7BL, 0x6CFBAD78L, 0x7FAB5E8CL, 0x8DC0DD8FL, 0xE330A81AL, + 0x115B2B19L, 0x020BD8EDL, 0xF0605BEEL, 0x24AA3F05L, 0xD6C1BC06L, + 0xC5914FF2L, 0x37FACCF1L, 0x69E9F0D5L, 0x9B8273D6L, 0x88D28022L, + 0x7AB90321L, 0xAE7367CAL, 0x5C18E4C9L, 0x4F48173DL, 0xBD23943EL, + 0xF36E6F75L, 0x0105EC76L, 0x12551F82L, 0xE03E9C81L, 0x34F4F86AL, + 0xC69F7B69L, 0xD5CF889DL, 0x27A40B9EL, 0x79B737BAL, 0x8BDCB4B9L, + 0x988C474DL, 0x6AE7C44EL, 0xBE2DA0A5L, 0x4C4623A6L, 0x5F16D052L, + 0xAD7D5351L}; + +/*****************************************************************/ +/* End of CRC Lookup Table */ +/*****************************************************************/ + +uint32_t crc32c(uint8_t *data, int length) +{ + const uint32_t CRC_INIT = 0xffffffffL; + const uint32_t XO_ROT = 0xffffffffL; + + uint32_t crc = CRC_INIT; + + while (length--) { + crc = crctable[(crc ^ *data++) & 0xFFL] ^ (crc >> 8); + } + crc = crc ^ XO_ROT; + + return crc; +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.h b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.h new file mode 100644 index 000000000..4586547e6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/crc32c.h @@ -0,0 +1,16 @@ +#ifndef CRC32C_H +#define CRC32C_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <stdlib.h> + +uint32_t crc32c(uint8_t *buf, int len); + +#ifdef __cplusplus +} +#endif +#endif /* CRC32C_H */ diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/libmctp-smbus.h b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/libmctp-smbus.h new file mode 100644 index 000000000..67690bcb3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/libmctp-smbus.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef _LIBMCTP_SMBUS_H +#define _LIBMCTP_SMBUS_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "libmctp.h" + +struct mctp_binding_smbus; + +struct mctp_binding_smbus *mctp_smbus_init(void); +int mctp_smbus_get_out_fd(struct mctp_binding_smbus *smbus); +int mctp_smbus_get_in_fd(struct mctp_binding_smbus *smbus); +void mctp_smbus_register_bus(struct mctp_binding_smbus *smbus, + struct mctp *mctp, mctp_eid_t eid); +int mctp_smbus_read(struct mctp_binding_smbus *smbus); +int mctp_smbus_open_bus(struct mctp_binding_smbus *smbus, int out_bus_num, + int root_bus_num); +void mctp_smbus_free(struct mctp_binding_smbus *smbus); +int mctp_smbus_open_in_bus(struct mctp_binding_smbus *smbus, int in_bus); +int mctp_smbus_open_out_bus(struct mctp_binding_smbus *smbus, int out_bus); +int mctp_smbus_set_in_fd(struct mctp_binding_smbus *smbus, int fd); +int mctp_smbus_set_out_fd(struct mctp_binding_smbus *smbus, int fd); + +#ifdef __cplusplus +} +#endif +#endif /* _LIBMCTP_SMBUS_H */ diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/smbus.c b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/smbus.c new file mode 100644 index 000000000..2f099a7e5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp/smbus.c @@ -0,0 +1,467 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include <assert.h> +#include <stdbool.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#ifdef MCTP_HAVE_FILEIO +#include <fcntl.h> +#endif + +#define pr_fmt(x) "smbus: " x + +#include <i2c/smbus.h> +#include <linux/i2c-dev.h> +#include <linux/i2c.h> +#include <sys/ioctl.h> + +#include "libmctp-alloc.h" +#include "libmctp-log.h" +#include "libmctp-smbus.h" +#include "libmctp.h" + +struct mctp_binding_smbus { + struct mctp_binding binding; + int out_fd; + int in_fd; + + unsigned long bus_id; + + /* receive buffer */ + uint8_t rxbuf[1024]; + struct mctp_pktbuf *rx_pkt; + + /* temporary transmit buffer */ + uint8_t txbuf[256]; +}; + +#ifndef container_of +#define container_of(ptr, type, member) \ + (type *)((char *)(ptr) - (char *)&((type *)0)->member) +#endif + +#define binding_to_smbus(b) container_of(b, struct mctp_binding_smbus, binding) + +#define MCTP_COMMAND_CODE 0x0F +#define MCTP_SLAVE_ADDRESS 0x1d +#define MCTP_SOURCE_SLAVE_ADDRESS 0x21 + +#define SMBUS_PEC_BYTE_SIZE 1 +#define SMBUS_COMMAND_CODE_SIZE 1 +#define SMBUS_LENGTH_FIELD_SIZE 1 +#define SMBUS_ADDR_OFFSET_SLAVE 0x1000 + +struct mctp_smbus_header_tx { + uint8_t source_slave_address; +}; + +struct mctp_smbus_header_rx { + uint8_t destination_slave_address; + uint8_t command_code; + uint8_t byte_count; + uint8_t source_slave_address; +}; + +#define POLYCHECK (0x1070U << 3) +static uint8_t crc8_calculate(uint16_t d) +{ + int i; + + for (i = 0; i < 8; i++) { + if (d & 0x8000) { + d = d ^ POLYCHECK; + } + d = d << 1; + } + + return (uint8_t)(d >> 8); +} + +/* Incremental CRC8 over count bytes in the array pointed to by p */ +static uint8_t pec_calculate(uint8_t crc, uint8_t *p, size_t count) +{ + int i; + + for (i = 0; i < count; i++) { + crc = crc8_calculate((crc ^ p[i]) << 8); + } + + return crc; +} + +static uint8_t calculate_pec_byte(uint8_t *buf, size_t len, uint8_t address, + uint16_t flags) +{ + uint8_t addr = (address << 1) | (flags & I2C_M_RD ? 1 : 0); + uint8_t pec = pec_calculate(0, &addr, 1); + pec = pec_calculate(pec, buf, len); + + return pec; +} + +static int mctp_smbus_tx(struct mctp_binding_smbus *smbus, uint8_t len) +{ + +#ifdef I2C_M_HOLD + /* Hold message */ + static uint16_t holdtimeout = 1000; // timeout in ms. + struct i2c_msg msg[2] = +#else // !I2C_M_HOLD + struct i2c_msg msg[1] = +#endif // I2C_M_HOLD + {{.addr = MCTP_SLAVE_ADDRESS, + .flags = 0, + .len = len, + .buf = (__uint8_t *)smbus->txbuf} +#ifdef I2C_M_HOLD + , + {.addr = 0, + .flags = I2C_M_HOLD, + .len = sizeof(holdtimeout), + .buf = (__uint8_t *)&holdtimeout} +#endif // I2C_M_HOLD + }; + +#ifdef I2C_M_HOLD + struct i2c_rdwr_ioctl_data msgrdwr = {&msg, 2}; +#else // !I2C_M_HOLD + struct i2c_rdwr_ioctl_data msgrdwr = {&msg, 1}; +#endif // I2C_M_HOLD + + return ioctl(smbus->out_fd, I2C_RDWR, &msgrdwr); +} + +#ifdef I2C_M_HOLD +static int mctp_smbus_unhold_bus(struct mctp_binding_smbus *smbus) +{ + /* Unhold message */ + static uint16_t holdtimeout = 0; // unhold + struct i2c_msg holdmsg = {0, I2C_M_HOLD, sizeof(holdtimeout), + (__uint8_t *)&holdtimeout}; + + struct i2c_rdwr_ioctl_data msgrdwr = {&holdmsg, 1}; + + return ioctl(smbus->out_fd, I2C_RDWR, &msgrdwr); +} +#endif // I2C_M_HOLD + +static int mctp_binding_smbus_tx(struct mctp_binding *b, + struct mctp_pktbuf *pkt) +{ + struct mctp_binding_smbus *smbus = binding_to_smbus(b); + struct mctp_smbus_header_tx *hdr; + size_t pkt_length; + + uint8_t i2c_message_buf[256]; + uint8_t *buf_ptr; + uint8_t i2c_message_len; + + uint16_t timeout = 1000; + + /* the length field in the header excludes smbus framing + * and escape sequences */ + pkt_length = mctp_pktbuf_size(pkt); + + buf_ptr = (void *)smbus->txbuf; + *buf_ptr = MCTP_COMMAND_CODE; + buf_ptr++; + *buf_ptr = pkt_length + sizeof(*hdr); + buf_ptr++; + + hdr = (void *)buf_ptr; + hdr->source_slave_address = MCTP_SOURCE_SLAVE_ADDRESS; + buf_ptr = (buf_ptr + sizeof(*hdr)); + memcpy(buf_ptr, &pkt->data[pkt->start], pkt_length); + buf_ptr = buf_ptr + pkt_length; + + uint8_t pec_byte = calculate_pec_byte( + smbus->txbuf, + SMBUS_COMMAND_CODE_SIZE + SMBUS_LENGTH_FIELD_SIZE + sizeof(*hdr) + + pkt_length, + MCTP_SLAVE_ADDRESS, 0); + + *buf_ptr = pec_byte; + + i2c_message_len = SMBUS_COMMAND_CODE_SIZE + SMBUS_LENGTH_FIELD_SIZE + + sizeof(*hdr) + pkt_length + + SMBUS_PEC_BYTE_SIZE; // command code, length, + // header, data, pec byte + + if (mctp_smbus_tx(smbus, i2c_message_len)) { + mctp_prerr("Can't hold mux"); + return -1; + } + + return 0; +} + +#ifdef MCTP_HAVE_FILEIO +int mctp_smbus_read(struct mctp_binding_smbus *smbus) +{ + ssize_t len = 0; + struct mctp_smbus_header_rx *hdr; + int ret = 0; + + do { + ret = lseek(smbus->in_fd, 0, SEEK_SET); + if (ret < 0) { + mctp_prerr("Failed to seek"); + ret = -1; + } + + len = read(smbus->in_fd, smbus->rxbuf, sizeof(smbus->rxbuf)); + if (len < sizeof(*hdr)) { + // This condition hits from from time to time, even with + // a properly written poll loop, although it's not clear + // why. Return an error so that the upper layer can + // retry. + ret = 0; + break; + } + + hdr = (void *)smbus->rxbuf; + if (hdr->destination_slave_address + != (MCTP_SOURCE_SLAVE_ADDRESS & ~1)) { + mctp_prerr("Got bad slave address %d", + hdr->destination_slave_address); + ret = 0; + break; + } + if (hdr->command_code != MCTP_COMMAND_CODE) { + mctp_prerr("Got bad command code %d", + hdr->command_code); + // Not a payload intended for us + ret = 0; + break; + } + + if (hdr->byte_count != (len - sizeof(*hdr))) { + // Got an incorrectly sized payload + mctp_prerr("Got smbus payload sized %d, expecting %d", + hdr->byte_count, len - sizeof(*hdr)); + ret = 0; + break; + } + + if (len < 0) { + mctp_prerr("can't read from smbus device: %m"); + ret = -1; + break; + } + + smbus->rx_pkt = mctp_pktbuf_alloc(&(smbus->binding), 0); + assert(smbus->rx_pkt); + + if (mctp_pktbuf_push(smbus->rx_pkt, &smbus->rxbuf[sizeof(*hdr)], + len - sizeof(*hdr) - SMBUS_PEC_BYTE_SIZE) + != 0) { + mctp_prerr("Can't push tok pktbuf: %m"); + ret = -1; + break; + } + + mctp_bus_rx(&(smbus->binding), smbus->rx_pkt); + + smbus->rx_pkt = NULL; + + } while (0); + +#ifdef I2C_M_HOLD + if (mctp_smbus_unhold_bus(smbus)) { + mctp_prerr("Can't hold mux"); + ret = -1; + } +#endif // I2C_M_HOLD + + return ret; +} + +int mctp_smbus_get_in_fd(struct mctp_binding_smbus *smbus) +{ + return smbus->in_fd; +} + + +int mctp_smbus_set_in_fd(struct mctp_binding_smbus *smbus, int fd) +{ + smbus->in_fd = fd; +} + +int mctp_smbus_set_out_fd(struct mctp_binding_smbus *smbus, int fd) +{ + smbus->out_fd = fd; +} + +int mctp_smbus_get_out_fd(struct mctp_binding_smbus *smbus) +{ + return smbus->out_fd; +} + +int mctp_smbus_open_in_bus(struct mctp_binding_smbus *smbus, int in_bus) +{ + char filename[60]; + size_t filename_size = 0; + char slave_mqueue[20]; + size_t mqueue_size = 0; + int fd = 0; + size_t size = sizeof(filename); + int address_7_bit = MCTP_SOURCE_SLAVE_ADDRESS >> 1; + int ret = -1; + + snprintf(filename, size, + "/sys/bus/i2c/devices/i2c-%d/%d-%04x/slave-mqueue", in_bus, + in_bus, SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + ret = open(filename, O_RDONLY | O_NONBLOCK | O_CLOEXEC); + if (ret >= 0) { + return ret; + } + + // Device doesn't exist. Create it. + filename_size = sizeof(filename); + snprintf(filename, filename_size, + "/sys/bus/i2c/devices/i2c-%d/new_device", in_bus); + filename[filename_size - 1] = '\0'; + + fd = open(filename, O_WRONLY); + if (fd < 0) { + mctp_prerr("can't open root device %s: %m", filename); + return -1; + } + + mqueue_size = sizeof(slave_mqueue); + snprintf(slave_mqueue, mqueue_size, "slave-mqueue %#04x", + SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + size = write(fd, slave_mqueue, mqueue_size); + close(fd); + if (size != mqueue_size) { + mctp_prerr("can't create mqueue device on %s: %m", filename); + return -1; + } + + size = sizeof(filename); + snprintf(filename, size, + "/sys/bus/i2c/devices/i2c-%d/%d-%04x/slave-mqueue", in_bus, + in_bus, SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + return open(filename, O_RDONLY | O_NONBLOCK | O_CLOEXEC); +} + +int mctp_smbus_open_out_bus(struct mctp_binding_smbus *smbus, int out_bus) +{ + char filename[60]; + size_t size = sizeof(filename); + snprintf(filename, size, "/dev/i2c-%d", out_bus); + filename[size - 1] = '\0'; + + return open(filename, O_RDWR | O_NONBLOCK); +} + +/* +int mctp_smbus_open_bus(struct mctp_binding_smbus *smbus, int out_bus_num, + int root_bus_num) +{ + char filename[60]; + size_t filename_size = 0; + char slave_mqueue[20]; + size_t mqueue_size = 0; + int fd = 0; + size_t size = sizeof(filename); + int address_7_bit = MCTP_SOURCE_SLAVE_ADDRESS >> 1; + + snprintf(filename, size, + "/sys/bus/i2c/devices/i2c-%d/%d-%04x/slave-mqueue", + root_bus_num, root_bus_num, + SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + smbus->in_fd = open(filename, O_RDONLY | O_NONBLOCK | O_CLOEXEC); + if (smbus->in_fd < 0) { + // Device doesn't exist. Create it. + filename_size = sizeof(filename); + snprintf(filename, filename_size, + "/sys/bus/i2c/devices/i2c-%d/new_device", + root_bus_num); + filename[filename_size - 1] = '\0'; + + fd = open(filename, O_WRONLY); + if (fd < 0) { + mctp_prerr("can't open root device %s: %m", filename); + return -1; + } + + mqueue_size = sizeof(slave_mqueue); + snprintf(slave_mqueue, mqueue_size, "slave-mqueue %#04x", + SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + size = write(fd, slave_mqueue, mqueue_size); + close(fd); + if (size != mqueue_size) { + mctp_prerr("can't create mqueue device on %s: %m", + filename); + return -1; + } + + size = sizeof(filename); + snprintf(filename, size, + "/sys/bus/i2c/devices/i2c-%d/%d-%04x/slave-mqueue", + root_bus_num, root_bus_num, + SMBUS_ADDR_OFFSET_SLAVE | address_7_bit); + + smbus->in_fd = + open(filename, O_RDONLY | O_NONBLOCK | O_CLOEXEC); + if (smbus->in_fd < 0) { + mctp_prerr("can't open mqueue device on %s: %m", + filename); + return -2; + } + } + + size = sizeof(filename); + snprintf(filename, size, "/dev/i2c-%d", out_bus_num); + filename[size - 1] = '\0'; + + smbus->out_fd = open(filename, O_RDWR | O_NONBLOCK); + if (smbus->out_fd < 0) { + close(smbus->in_fd); + mctp_prerr("can't open device %s: %m", filename); + } + + return 0; +} +*/ +#endif + +void mctp_smbus_register_bus(struct mctp_binding_smbus *smbus, + struct mctp *mctp, mctp_eid_t eid) +{ + smbus->bus_id = mctp_register_bus(mctp, &smbus->binding, eid); + mctp_binding_set_tx_enabled(&smbus->binding, true); +} + +struct mctp_binding_smbus *mctp_smbus_init(void) +{ + struct mctp_binding_smbus *smbus; + + smbus = __mctp_alloc(sizeof(*smbus)); + memset(&(smbus->binding), 0, sizeof(smbus->binding)); + + smbus->in_fd = -1; + smbus->out_fd = -1; + + smbus->rx_pkt = NULL; + smbus->binding.name = "smbus"; + smbus->binding.version = 1; + smbus->binding.pkt_size = sizeof(smbus->rxbuf); + + smbus->binding.tx = mctp_binding_smbus_tx; + return smbus; +} + +void mctp_smbus_free(struct mctp_binding_smbus *smbus) +{ + __mctp_free(smbus); +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp_git.bb b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp_git.bb new file mode 100644 index 000000000..eba56f829 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/interfaces/libmctp_git.bb @@ -0,0 +1,47 @@ +SUMMARY = "libmctp" +DESCRIPTION = "Implementation of MCTP (DTMF DSP0236)" + +SRC_URI = "git://github.com/openbmc/libmctp.git" +SRCREV = "663ec39ea107c2a736f9bcb20cbfdfa623092ab1" + +PV = "0.1+git${SRCPV}" + +LICENSE = "Apache-2.0 | GPLv2" +LIC_FILES_CHKSUM = "file://LICENSE;md5=0d30807bb7a4f16d36e96b78f9ed8fae" + +inherit cmake + +S = "${WORKDIR}/git" + +DEPENDS += "i2c-tools" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://0001-Smbus-changes-for-libmctp.patch \ + file://0002-Fix-Memory-Leak.patch \ + file://CMakeLists.txt \ + file://crc32c.c \ + file://crc32c.h \ + file://libmctp-smbus.h \ + file://smbus.c" + +do_configure:prepend() { + cp -f ${WORKDIR}/*.c ${S} + cp -f ${WORKDIR}/*.h ${S} + cp -f ${WORKDIR}/CMakeLists.txt ${S} +} + +# linux-libc-headers guides this way to include custom uapi headers +CFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include/uapi" +CFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include" +CXXFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include/uapi" +CXXFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include" + +do_configure[depends] += "virtual/kernel:do_shared_workdir" + +# Copying the depricated header from kernel as a temporary fix to resolve build breaks. +# It should be removed later after fixing the header dependency in this repository. +SRC_URI += "file://asm/rwonce.h" +do_configure:prepend() { + cp -r ${WORKDIR}/asm ${S}/asm +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend new file mode 100644 index 000000000..ac61d983c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend @@ -0,0 +1,8 @@ +EXTRA_OECMAKE += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', '-DINTEL_PFR_ENABLED=ON', '', d)}" +EXTRA_OECMAKE += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'validation-unsecure', '-DBMC_VALIDATION_UNSECURE_FEATURE=ON', '', d)}" +EXTRA_OECMAKE += "-DUSING_ENTITY_MANAGER_DECORATORS=OFF" +SRC_URI = "git://github.com/openbmc/intel-ipmi-oem.git" +SRCREV = "9e58cfe1ba5ca5bcd5263b50730c5a231eabdd4f" + +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + diff --git a/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check.bb b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check.bb new file mode 100644 index 000000000..b95f426c4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check.bb @@ -0,0 +1,26 @@ +SUMMARY = "Kernel panic Check" +DESCRIPTION = "script tool to check if the reboot is caused by kernel panic \ + log the kernel panic to systemd journal, and also log to redfish \ + " + +S = "${WORKDIR}" +SRC_URI = "file://kernel-panic-check.sh \ + file://kernel-panic-check.service \ +" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash logger-systemd" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/kernel-panic-check.service" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/kernel-panic-check.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${S}/kernel-panic-check.sh ${D}/${bindir}/kernel-panic-check.sh +} + +SYSTEMD_SERVICE:${PN} += " kernel-panic-check.service" diff --git a/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.service b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.service new file mode 100644 index 000000000..afe017baf --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.service @@ -0,0 +1,9 @@ +[Unit] +Description=Check for kernel panic + +[Service] +Type=oneshot +ExecStart=/usr/bin/kernel-panic-check.sh + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.sh b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.sh new file mode 100755 index 000000000..815f50b71 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/kernel-panic-check/kernel-panic-check/kernel-panic-check.sh @@ -0,0 +1,16 @@ +#!/bin/sh +panicFile="/sys/fs/pstore/dmesg-ramoops-0" +if [ -f $panicFile ] +then + # log the detailed last kernel panic messages + logger -t kernel-panic-check "Reboot from kernel panic! Log as following:" + cat $panicFile | logger + # Also log it to redfish + cat <<EOF | logger-systemd --journald +REDFISH_MESSAGE_ID=OpenBMC.0.1.BMCKernelPanic +PRIORITY=4 +MESSAGE=BMC rebooted due to kernel panic +EOF + + rm -rf $panicFile +fi diff --git a/meta-openbmc-mods/meta-common/recipes-core/libpeci/libpeci_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/libpeci/libpeci_%.bbappend new file mode 100644 index 000000000..cea8fd6ed --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/libpeci/libpeci_%.bbappend @@ -0,0 +1,3 @@ +# Enable downstream autobump +SRC_URI = "git://github.com/openbmc/libpeci" +SRCREV = "6a00e9aa72f75d66eb8b9572c7fd3894f91c6bba" diff --git a/meta-openbmc-mods/meta-common/recipes-core/libxcrypt/libxcrypt_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/libxcrypt/libxcrypt_%.bbappend new file mode 100644 index 000000000..386bc8204 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/libxcrypt/libxcrypt_%.bbappend @@ -0,0 +1,5 @@ +# libxcrypt fails to compile under gcc with the -Os flag. Because we want to +# be able to compile the rest of the system with -Os, override the global +# setting here to fall back to -O3 +CFLAGS:append = " --param max-inline-insns-single=1000" +FULL_OPTIMIZATION = "-O3 -pipe ${DEBUG_FLAGS}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd.inc b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd.inc new file mode 100644 index 000000000..7dffc7c51 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd.inc @@ -0,0 +1,42 @@ +SUMMARY = "logger tool in util-linux with systemd support" +HOMEPAGE = "http://userweb.kernel.org/~kzak/util-linux/" +DESCRIPTION = "logger tool with systemd support, used to add log to systemd journald." + +SECTION = "base" + +LICENSE = "GPLv2+ & LGPLv2.1+ & BSD-3-Clause & BSD-4-Clause" + +LIC_FILES_CHKSUM = "file://README.licensing;md5=972a134f1e14b2b060e365df2fab0099 \ + file://COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://Documentation/licenses/COPYING.GPL-2.0-or-later;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://Documentation/licenses/COPYING.LGPL-2.1-or-later;md5=4fbd65380cdd255951079008b364516c \ + file://Documentation/licenses/COPYING.BSD-3-Clause;md5=58dcd8452651fc8b07d1f65ce07ca8af \ + file://Documentation/licenses/COPYING.BSD-4-Clause-UC;md5=263860f8968d8bafa5392cab74285262 \ + file://libuuid/COPYING;md5=6d2cafc999feb2c2de84d4d24b23290c \ + file://libmount/COPYING;md5=7c7e39fb7d70ffe5d693a643e29987c2 \ + file://libblkid/COPYING;md5=693bcbbe16d3a4a4b37bc906bc01cc04" + +inherit autotools gettext pkgconfig +DEPENDS = "libcap-ng ncurses virtual/crypt zlib systemd " +#DEPENDS:intel-ast2500 += " systemd " + +MAJOR_VERSION = "${@'.'.join(d.getVar('PV').split('.')[0:2])}" +SRC_URI = "${KERNELORG_MIRROR}/linux/utils/util-linux/v${MAJOR_VERSION}/util-linux-${MAJOR_VERSION}.tar.xz \ + " + +S = "${WORKDIR}/util-linux-${MAJOR_VERSION}" + +EXTRA_OECONF = " --disable-nls --disable-all-programs \ + --disable-libuuid --disable-libblkid --disable-libmount \ + --disable-libsmartcols --disable-libfdisk --disable-pylibmount \ + --with-systemd \ + --enable-logger \ + " + +do_install:append () { + mv ${D}${bindir}/logger ${D}${bindir}/logger-systemd + rm -rf ${D}${sbindir} + rm -rf ${D}${base_libdir} + rm -rf ${D}${libdir} + rm -rf ${D}${datadir} +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/avoid_parallel_tests.patch b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/avoid_parallel_tests.patch new file mode 100644 index 000000000..748b6ef09 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/avoid_parallel_tests.patch @@ -0,0 +1,20 @@ +Ptest needs buildtest-TESTS and runtest-TESTS targets. +serial-tests is required to generate those targets. +Revert run.sh script accordingly to serialize running tests + +Signed-off-by: Tudor Florea <tudor.florea@enea.com> +Upstream-Status: Inappropriate + +Index: util-linux-2.32/configure.ac +=================================================================== +--- util-linux-2.32.orig/configure.ac ++++ util-linux-2.32/configure.ac +@@ -11,7 +11,7 @@ AC_CONFIG_MACRO_DIR([m4]) + dnl AC_USE_SYSTEM_EXTENSIONS must be called before any macros that run + dnl the compiler (like AC_PROG_LIBTOOL) to avoid autoconf errors. + AC_USE_SYSTEM_EXTENSIONS +-AM_INIT_AUTOMAKE([-Wall foreign 1.10 tar-pax no-dist-gzip dist-xz subdir-objects]) ++AM_INIT_AUTOMAKE([-Wall foreign 1.10 tar-pax no-dist-gzip dist-xz subdir-objects serial-tests]) + + m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])], + [AC_SUBST([AM_DEFAULT_VERBOSITY], [1])]) diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/configure-sbindir.patch b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/configure-sbindir.patch new file mode 100644 index 000000000..e475289f6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/configure-sbindir.patch @@ -0,0 +1,23 @@ +util-linux: take ${sbindir} from the environment if it is set there +fix the test, the [ ] syntax was getting eaten by autoconf + +Signed-off-by: Phil Blundell <pb@pbcl.net> +Signed-off-by: Saul Wold <sgw@linux.intel.com +Upstream-Status: Inappropriate [configuration] + +Index: util-linux-2.31/configure.ac +=================================================================== +--- util-linux-2.31.orig/configure.ac ++++ util-linux-2.31/configure.ac +@@ -89,7 +89,10 @@ AC_SUBST([runstatedir]) + usrbin_execdir='${exec_prefix}/bin' + AC_SUBST([usrbin_execdir]) + +-usrsbin_execdir='${exec_prefix}/sbin' ++if test -z "$usrsbin_execdir" ; ++then ++ usrsbin_execdir='${exec_prefix}/sbin' ++fi + AC_SUBST([usrsbin_execdir]) + + AS_CASE([$libdir], diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/display_testname_for_subtest.patch b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/display_testname_for_subtest.patch new file mode 100644 index 000000000..417ca1d98 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/display_testname_for_subtest.patch @@ -0,0 +1,25 @@ +Display testname for subtest + +Signed-off-by: Tudor Florea <tudor.florea@enea.com> +Upstream-Status: Pending + +--- + tests/functions.sh | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tests/functions.sh b/tests/functions.sh +index 5246605..b24dc15 100644 +--- a/tests/functions.sh ++++ b/tests/functions.sh +@@ -320,7 +320,7 @@ function ts_init_subtest { + + if [ "$TS_PARSABLE" != "yes" ]; then + [ $TS_NSUBTESTS -eq 1 ] && echo +- printf "%16s: %-27s ..." "" "$TS_SUBNAME" ++ printf "%13s: %-30s ..." "$TS_COMPONENT" "$TS_SUBNAME" + fi + } + +-- +2.8.3 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/ptest.patch b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/ptest.patch new file mode 100644 index 000000000..0537f7d85 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/ptest.patch @@ -0,0 +1,23 @@ +Define TESTS variable + +Signed-off-by: Tudor Florea <tudor.florea@enea.com> +Upstream-Status: Pending +--- + Makefile.am | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Makefile.am b/Makefile.am +index bbaccb1..7d5a6bb 100644 +--- a/Makefile.am ++++ b/Makefile.am +@@ -48,6 +48,7 @@ systemdsystemunit_DATA = + dist_bashcompletion_DATA = + check_PROGRAMS = + dist_check_SCRIPTS = ++TESTS = $(check_PROGRAMS) + + PATHFILES = + +-- +2.8.3 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/run-ptest b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/run-ptest new file mode 100644 index 000000000..e135ee583 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/run-ptest @@ -0,0 +1,43 @@ +#!/bin/sh + + +# When udevd (from eudev) is running most eject/mount tests will fail because +# of automount. We need to stop udevd before executing util-linux's tests. +# The systemd-udevd daemon doesn't change the outcome of util-linux's tests. +UDEV_PID="`pidof "@base_sbindir@/udevd"`" +if [ "x$UDEV_PID" != "x" ]; then + /etc/init.d/udev stop +fi + +current_path=$(readlink -f $0) +export bindir=$(dirname $current_path) +export PATH=$bindir/bin:$PATH + +cd tests || exit 1 + +comps=$(find ts/ -type f -perm -111 -regex ".*/[^\.~]*" | sort) + + +echo +echo "-------------------- util-linux regression tests --------------------" +echo +echo " For development purpose only. " +echo " Don't execute on production system! " +echo + +res=0 +count=0 +for ts in $comps; +do + $ts | sed -u '{ + s/^\(.*\):\(.*\) \.\.\. OK$/PASS: \1:\2/ + s/^\(.*\):\(.*\) \.\.\. FAILED \(.*\)$/FAIL: \1:\2 \3/ + s/^\(.*\):\(.*\) \.\.\. SKIPPED \(.*\)$/SKIP: \1:\2 \3/ + }' +done + + +if [ "x$UDEV_PID" != "x" ]; then + /etc/init.d/udev start +fi + diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser-l.pamd b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser-l.pamd new file mode 100644 index 000000000..4b368ccf5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser-l.pamd @@ -0,0 +1,3 @@ +auth include runuser +session optional pam_keyinit.so force revoke +session include runuser diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser.pamd b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser.pamd new file mode 100644 index 000000000..48d133b9e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd/runuser.pamd @@ -0,0 +1,4 @@ +auth sufficient pam_rootok.so +session optional pam_keyinit.so revoke +session required pam_limits.so +session required pam_unix.so diff --git a/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd_2.34.bb b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd_2.34.bb new file mode 100644 index 000000000..b58628667 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/logger-systemd/logger-systemd_2.34.bb @@ -0,0 +1,12 @@ +require logger-systemd.inc + +SRC_URI += "file://configure-sbindir.patch \ + file://runuser.pamd \ + file://runuser-l.pamd \ + file://ptest.patch \ + file://run-ptest \ + file://display_testname_for_subtest.patch \ + file://avoid_parallel_tests.patch \ +" +SRC_URI[md5sum] = "a78cbeaed9c39094b96a48ba8f891d50" +SRC_URI[sha256sum] = "743f9d0c7252b6db246b659c1e1ce0bd45d8d4508b4dfa427bbb4a3e9b9f62b5"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-core/microsoft-gsl/microsoft-gsl.bb b/meta-openbmc-mods/meta-common/recipes-core/microsoft-gsl/microsoft-gsl.bb new file mode 100644 index 000000000..645811f09 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/microsoft-gsl/microsoft-gsl.bb @@ -0,0 +1,24 @@ +# Add GSL: Guideline Support Library for c++ +# https://github.com/Microsoft/GSL + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE;md5=363055e71e77071107ba2bb9a54bd9a7" + +SRC_URI = "git://github.com/Microsoft/GSL.git;protocol=https;nobranch=1" + +# Modify these as desired +PV = "1.0+git${SRCPV}" +#SRCREV = "${AUTOREV}" +SRCREV = "be43c79742dc36ee55b21c5d531a5ff301d0ef8d" + +S = "${WORKDIR}/git" + +do_install () { + install -d ${D}/usr/include + install -d ${D}/usr/include/gsl + for F in ${S}/include/gsl/*; do + install -m 0644 ${F} ${D}/usr/include/gsl + done +} + +ALLOW_EMPTY:${PN} = "1" diff --git a/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync-tmp.conf b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync-tmp.conf new file mode 100644 index 000000000..e73e47129 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync-tmp.conf @@ -0,0 +1,2 @@ +x /tmp/.rwfs - - - - +x /tmp/.overlay - - - - diff --git a/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync.service b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync.service new file mode 100644 index 000000000..4595541c6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-sync.service @@ -0,0 +1,11 @@ +[Unit] +Description=Overlay sync to NV storage + +[Service] +# Run a job to periodically sync the overlay to NV storage +ExecStart=/usr/bin/nv-syncd +# Due to sync delay stopping this service will take more than default 10 seconds +TimeoutStopSec=20 + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-syncd b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-syncd new file mode 100644 index 000000000..538c96875 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync/nv-syncd @@ -0,0 +1,38 @@ +#!/bin/bash + +NVMP=/tmp/.rwfs +SOMP=/var/sofs + +clean_var_volatile_tmp() { + rm -rf $NVMP/.overlay/var/volatile/tmp/* || : +} + +do_sync() { + rsync -a --delete --exclude='**/var/volatile/tmp/**' /tmp/.overlay/ $NVMP/.overlay + sync $NVMP/.overlay +} + +stop_nv() { + history -a + do_sync + mount -o remount,ro $NVMP + mount -o remount,ro $SOMP + exit 0 +} + +# register cleanup function +trap stop_nv SIGINT +trap stop_nv SIGTERM +trap stop_nv EXIT + +# make sure the mount points are RW +mount -o remount,rw $NVMP +mount -o remount,rw $SOMP + +clean_var_volatile_tmp + +# Run rsync periodically to sync the overlay to NV storage +while true; do + do_sync + sleep 10 +done diff --git a/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync_git.bb b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync_git.bb new file mode 100644 index 000000000..a30df4dc6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/nv-sync/nv-sync_git.bb @@ -0,0 +1,29 @@ +SUMMARY = "NV Overlay Sync" +DESCRIPTION = "Script to periodically sync the overlay to NV storage" + +S = "${WORKDIR}" +SRC_URI = "file://nv-sync.service \ + file://nv-syncd \ + file://nv-sync-tmp.conf \ +" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +inherit systemd + +RDEPENDS:${PN} += "bash" + +FILES:${PN} += "${systemd_system_unitdir}/nv-sync.service \ + ${libdir}/tmpfiles.d/nv-sync-tmp.conf" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/nv-sync.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/nv-syncd ${D}${bindir}/nv-syncd + install -d ${D}${libdir}/tmpfiles.d + install -m 0644 ${WORKDIR}/nv-sync-tmp.conf ${D}${libdir}/tmpfiles.d/ +} + +SYSTEMD_SERVICE:${PN} += " nv-sync.service" diff --git a/meta-openbmc-mods/meta-common/recipes-core/os-release/os-release.bbappend b/meta-openbmc-mods/meta-common/recipes-core/os-release/os-release.bbappend new file mode 100644 index 000000000..65739f638 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/os-release/os-release.bbappend @@ -0,0 +1,36 @@ +# WARNING! +# +# These modifications to os-release disable the bitbake parse +# cache (for the os-release recipe only). Before copying +# and pasting into another recipe ensure it is understood +# what that means! + +require version-vars.inc + +OS_RELEASE_FIELDS:append = " OPENBMC_VERSION IPMI_MAJOR IPMI_MINOR IPMI_AUX13 IPMI_AUX14 IPMI_AUX15 IPMI_AUX16" + +OS_RELEASE_FIELDS:remove = "BUILD_ID" + +python do_compile:append () { + import glob + with open(d.expand('${B}/os-release'), 'a') as f: + corebase = d.getVar('COREBASE', True) + f.write('\n# Build Configuration Details\n') + repo_status(d, f, corebase, '') + repo_status(d, f, os.path.join(corebase, 'meta-openbmc-mods'), '--tags') + appends_dir = os.path.join(d.getVar('TOPDIR', True), 'workspace', 'appends') + + for fn in glob.glob(os.path.join(appends_dir, '*.bbappend')): + with open(fn, 'r') as bb_f: + for line in bb_f: + if line.startswith('# srctreebase: '): + srctreebase = line.split(':', 1)[1].strip() + repo_status(d, f, srctreebase, '--tags') +} + + +# Ensure the git commands run every time bitbake is invoked. +BB_DONT_CACHE = "1" + +# Make os-release available to other recipes. +SYSROOT_DIRS:append = " ${sysconfdir}" diff --git a/meta-openbmc-mods/meta-common/recipes-core/os-release/version-vars.inc b/meta-openbmc-mods/meta-common/recipes-core/os-release/version-vars.inc new file mode 100644 index 000000000..df43dae89 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/os-release/version-vars.inc @@ -0,0 +1,93 @@ +def irun_git(d, oeroot, git_cmd, **kwargs): + err = None + try: + cmd = 'git --work-tree {} --git-dir {}/.git {}'.format(oeroot, oeroot, git_cmd) + ret, err = bb.process.run(cmd, **kwargs) + if err is not None: + ret += err + except bb.process.ExecutionError as e: + ret = '' + if e.stdout is not None: + ret += e.stdout + if e.stderr is not None: + ret += e.stderr + except Exception as e: + ret = str(e) + return ret.strip('\n') + +def repo_status(d, f, repo, tagargs): + import subprocess + + cmd_list = [['HEAD', 'rev-parse HEAD'], + ['TAG', 'describe {} --dirty --long'.format(tagargs)], + ['STATUS', 'status -sb']] + + f.write(('\n# REPOSITORY: {} '.format(os.path.basename(repo))).ljust(80, '+') + '\n') + for item in cmd_list: + f.write('# {}: '.format(item[0])) + sb = irun_git(d, repo, item[1]) + if sb: + sb_lines = sb.split('\n') + if len(sb_lines) == 1: + f.write(sb_lines[0]) + else: + f.write('\n# ' + '\n# '.join(sb_lines)) + f.write('\n') + +python() { + import re + + gen = d.getVar('PRODUCT_GENERATION', True) + if gen is None: + gen = 'unknown' + + corebase = d.getVar('COREBASE', True) + mibase = os.path.join(corebase, 'meta-openbmc-mods') + obmc_vers = irun_git(d, corebase, 'describe --dirty --long') + if obmc_vers is None: + raise bb.build.FuncFailed("Missing version tag for openbmc-openbmc") + d.setVar('OPENBMC_VERSION', obmc_vers) + + obmc_hash = irun_git(d, corebase, 'rev-parse HEAD') + meta_vers = irun_git(d, mibase, + 'describe --long --abbrev=6 ' + + '--match \'{}-[0-9]*\.[0-9]*\''.format(gen)) + + # If no tag, provide default version + if meta_vers.startswith('fatal:'): + ver_list = obmc_vers.split('-') + obmc_tag_list = ver_list[1].split('.') + obmc_major_revision = 0 + obmc_minor_revision = 0 + obmc_minor_spare = 0 + try: + obmc_major_revision = int(obmc_tag_list[0]) + obmc_minor_revision = int(obmc_tag_list[1]) + obmc_minor_spare = int(ver_list[2]) + except ValueError: + bb.warn("Invalid obmc_vers: {}".format(obmc_vers)) + meta_vers = '{}-{}.{}-{}-g{}'.format(gen,obmc_major_revision, + obmc_minor_revision,obmc_minor_spare,obmc_hash[0:6]) + + meta_hash = irun_git(d, mibase, 'rev-parse HEAD') + # If no hash, provide default + if meta_hash.startswith('fatal:'): + meta_hash = obmc_hash[0:7] + version_id = '{}-{}'.format(meta_vers, obmc_hash[0:7]) + if version_id: + d.setVar('VERSION_ID', version_id) + versionList = version_id.split('-') + versionList = re.split('-|\.', version_id) + version = '{}.{}-{}'.format(versionList[0], versionList[1], versionList[2]) + d.setVar('VERSION', version) + d.setVar('IPMI_MAJOR', versionList[1]) + d.setVar('IPMI_MINOR', versionList[2]) + d.setVar('IPMI_AUX13', hex(min(int(versionList[3]), 0xff))) + d.setVar('IPMI_AUX14', '0x{}'.format(meta_hash[0:2])) + d.setVar('IPMI_AUX15', '0x{}'.format(meta_hash[2:4])) + d.setVar('IPMI_AUX16', '0x{}'.format(meta_hash[4:6])) + + build_id = irun_git(d, mibase, 'describe --abbrev=0') + if build_id: + d.setVar('BUILD_ID', build_id) +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/packagegroups/packagegroup-core-standalone-sdk-target.bbappend b/meta-openbmc-mods/meta-common/recipes-core/packagegroups/packagegroup-core-standalone-sdk-target.bbappend new file mode 100644 index 000000000..fc644c307 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/packagegroups/packagegroup-core-standalone-sdk-target.bbappend @@ -0,0 +1 @@ +RRECOMMENDS:${PN}:append = " vim cmake sdbusplus" diff --git a/meta-openbmc-mods/meta-common/recipes-core/readline/readline/inputrc b/meta-openbmc-mods/meta-common/recipes-core/readline/readline/inputrc new file mode 100644 index 000000000..7b84c9916 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/readline/readline/inputrc @@ -0,0 +1,61 @@ +# /etc/inputrc - global inputrc for libreadline +# See readline(3readline) and `info rluserman' for more information. + +# Be 8 bit clean. +set input-meta on +set output-meta on + +# To allow the use of 8bit-characters like the german umlauts, comment out +# the line below. However this makes the meta key not work as a meta key, +# which is annoying to those which don't need to type in 8-bit characters. + +# set convert-meta off + +# try to enable the application keypad when it is called. Some systems +# need this to enable the arrow keys. +# set enable-keypad on + +# see /usr/share/doc/bash/inputrc.arrows for other codes of arrow keys + +# do not bell on tab-completion +# set bell-style none + +# some defaults / modifications for the emacs mode +$if mode=emacs + +# allow the use of the Home/End keys + "\e[1~": beginning-of-line + "\e[4~": end-of-line + +# allow the use of the Delete/Insert keys + "\e[3~": delete-char +# "\e[2~": quoted-insert + +# mappings for "page up" and "page down" to step to the beginning/end +# of the history +# "\e[5~": beginning-of-history +# "\e[6~": end-of-history + +# alternate mappings for "page up" and "page down" to search the history +# "\e[5~": history-search-backward +# "\e[6~": history-search-forward + +# # mappings for Ctrl-left-arrow and Ctrl-right-arrow for word moving +# "\e[5C": forward-word +# "\e[5D": backward-word +# "\e\e[C": forward-word +# "\e\e[D": backward-word + +# $if term=rxvt +# "\e[8~": end-of-line +# $endif + +# for non RH/Debian xterm, can't hurt for RH/DEbian xterm +# "\eOH": beginning-of-line +# "\eOF": end-of-line + +# for freebsd console +# "\e[H": beginning-of-line +# "\e[F": end-of-line + +$endif diff --git a/meta-openbmc-mods/meta-common/recipes-core/readline/readline_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/readline/readline_%.bbappend new file mode 100644 index 000000000..a16994583 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/readline/readline_%.bbappend @@ -0,0 +1,2 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI:append = " file://inputrc" diff --git a/meta-openbmc-mods/meta-common/recipes-core/safec/safec_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/safec/safec_%.bbappend new file mode 100644 index 000000000..b8256e2b1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/safec/safec_%.bbappend @@ -0,0 +1,11 @@ +RDEPENDS:${PN} = "" +do_install:append() { + F=$(find ${D} -name check_for_unsafe_apis) + if [ -n "${F}" ]; then + # remove the unused perl script + rm -f "${F}" + # remove the script's destination directory, only if it is empty + rmdir "$(dirname ${F})" 2>/dev/null || : + fi +} + diff --git a/meta-openbmc-mods/meta-common/recipes-core/safec/safec_3.4.bb b/meta-openbmc-mods/meta-common/recipes-core/safec/safec_3.4.bb new file mode 100644 index 000000000..cf83203ec --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/safec/safec_3.4.bb @@ -0,0 +1,15 @@ +SUMMARY = "Safe C Library" + +LICENSE = "safec" +LIC_FILES_CHKSUM = "file://COPYING;md5=6d0eb7dfc57806a006fcbc4e389cf164" +SECTION = "lib" + +inherit autotools pkgconfig + +S = "${WORKDIR}/git" +SRCREV = "e8bf1fff157ba931692130a0ec6f2833fa7d5f87" +SRC_URI = "git://github.com/rurban/safeclib.git" + +COMPATIBLE_HOST = '(x86_64|i.86|powerpc|powerpc64|arm|aarch64).*-linux' + +RDEPENDS:${PN} = "perl" diff --git a/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check.bb b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check.bb new file mode 100644 index 000000000..2c4770471 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check.bb @@ -0,0 +1,26 @@ +SUMMARY = "Security registers check" +DESCRIPTION = "script tool to check if registers value are security \ + log the security event to systemd journal, and also log to redfish \ + " + +S = "${WORKDIR}" +SRC_URI = "file://security-registers-check.sh \ + file://security-registers-check.service \ +" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash logger-systemd" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/security-registers-check.service" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/security-registers-check.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${S}/security-registers-check.sh ${D}/${bindir}/security-registers-check.sh +} + +SYSTEMD_SERVICE:${PN} += " security-registers-check.service" diff --git a/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.service b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.service new file mode 100644 index 000000000..b824dbe3e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.service @@ -0,0 +1,10 @@ +[Unit] +Description=Check for security registers + +[Service] +Type=oneshot +ExecStart=/usr/bin/security-registers-check.sh +Nice=5 + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.sh b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.sh new file mode 100644 index 000000000..211120c78 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/security-registers-check/security-registers-check/security-registers-check.sh @@ -0,0 +1,42 @@ +#!/bin/sh +value=`cat /sys/devices/platform/ahb/ahb:apb/1e6e2000.syscon/1e6e2000.syscon:misc_control/uart_port_debug` +if [ $value == 0 ] + then + # log the detailed last security registers check messages + logger -t security-registers-check "Uart port debug is enabled! Log as following:" + echo "Uart port debug is enabled." | logger + # Also log it to redfish + cat <<EOF | logger-systemd --journald +REDFISH_MESSAGE_ID=OpenBMC.0.1.SecurityUartPortDebugEnabled +PRIORITY=4 +MESSAGE=BMC Uart port debug is enabled +EOF +fi + +value=`cat /sys/devices/platform/ahb/ahb:apb/1e6e2000.syscon/1e6e2000.syscon:misc_control/p2a-bridge` +if [ $value == 1 ] + then + # log the detailed last security registers check messages + logger -t security-registers-check "P2A(PCIe to AHB) bridge is enabled! Log as following:" + echo "P2A(PCIe to AHB) bridge is enabled." | logger + # Also log it to redfish + cat <<EOF | logger-systemd --journald +REDFISH_MESSAGE_ID=OpenBMC.0.1.SecurityP2aBridgeEnabled +PRIORITY=4 +MESSAGE=BMC P2A(PCIe to AHB) bridge is enabled +EOF +fi + +value=`cat /sys/devices/platform/ahb/ahb:apb/1e6e2000.syscon/1e6e2000.syscon:misc_control/boot-2nd-flash` +if [ $value == 1 ] + then + # log the detailed last security registers check messages + logger -t security-registers-check "BMC 2nd boot flash is enabled! Log as following:" + echo "BMC 2nd boot flash is enabled." | logger + # Also log it to redfish + cat <<EOF | logger-systemd --journald +REDFISH_MESSAGE_ID=OpenBMC.0.1.SecurityBoot2ndFlashEnabled +PRIORITY=4 +MESSAGE=BMC 2nd boot flash is enabled +EOF +fi diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend new file mode 100644 index 000000000..adbdb0e6e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/obmc-targets.bbappend @@ -0,0 +1,10 @@ +# Remove these files since they are provided by obmc-intel-targets +SYSTEMD_SERVICE:${PN}:remove += " obmc-host-start@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-host-stop@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-host-shutdown@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-host-reboot@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-host-startmin@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-chassis-poweron@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-chassis-poweroff@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-chassis-hard-poweroff@.target" +SYSTEMD_SERVICE:${PN}:remove += " obmc-chassis-powerreset@.target" diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf new file mode 100644 index 000000000..48c60d36b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/journald.conf @@ -0,0 +1,42 @@ +# This file is part of systemd. +# +# systemd is free software; you can redistribute it and/or modify it +# under the terms of the GNU Lesser General Public License as published by +# the Free Software Foundation; either version 2.1 of the License, or +# (at your option) any later version. +# +# Entries in this file show the compile time defaults. +# You can change settings by editing this file. +# Defaults can be restored by simply deleting this file. +# +# See journald.conf(5) for details. + +[Journal] +Storage=volatile +#Compress=yes +#Seal=yes +#SplitMode=uid +#SyncIntervalSec=5m +#RateLimitIntervalSec=30s +#RateLimitBurst=10000 +#SystemMaxUse=6M +#SystemKeepFree= +#SystemMaxFileSize=512K +#SystemMaxFiles=32 +RuntimeMaxUse=32M +#RuntimeKeepFree= +#RuntimeMaxFileSize= +#RuntimeMaxFiles=4 +#MaxRetentionSec= +#MaxFileSec=1month +#ForwardToSyslog=no +#ForwardToKMsg=no +#ForwardToConsole=no +#ForwardToWall=yes +#TTYPath=/dev/console +#MaxLevelStore=notice +#MaxLevelSyslog=debug +#MaxLevelKMsg=notice +#MaxLevelConsole=info +#MaxLevelWall=emerg +#LineMax=48K diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/systemd-timesyncd-save-time.conf b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/systemd-timesyncd-save-time.conf new file mode 100644 index 000000000..aa455cbcb --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf/systemd-timesyncd-save-time.conf @@ -0,0 +1,2 @@ +[Service] +ExecStop=touch /var/lib/systemd/timesync/clock
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend new file mode 100644 index 000000000..b7bd6796c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend @@ -0,0 +1,11 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://journald.conf \ + file://systemd-timesyncd-save-time.conf \ + " + +FILES:${PN} += " ${systemd_system_unitdir}/systemd-timesyncd.service.d/systemd-timesyncd-save-time.conf" + +do_install:append() { + install -m 644 -D ${WORKDIR}/systemd-timesyncd-save-time.conf ${D}${systemd_system_unitdir}/systemd-timesyncd.service.d/systemd-timesyncd-save-time.conf +} diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd/0002-Add-event-log-for-system-time-synchronization.patch b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd/0002-Add-event-log-for-system-time-synchronization.patch new file mode 100644 index 000000000..8e07ad56a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd/0002-Add-event-log-for-system-time-synchronization.patch @@ -0,0 +1,114 @@ +From 5be7b53e598faa7605add3f9856d3b3eb4b50fe1 Mon Sep 17 00:00:00 2001 +From: Joshi-Mansi <mansi.joshi@linux.intel.com> +Date: Thu, 13 May 2021 03:09:24 +0530 +Subject: [PATCH] Add event log for time synchronization + +Adding time synchronization event logs can be helpful in distinguishing +older date and newly synced date with the first initialization +(from 1970) or any later syncs either done via NTP or Manually. + +Tested: +Confirmed that the event is getting logged correctly in Redfish. + +Signed-off-by: Joshi-Mansi <mansi.joshi@linux.intel.com> +Change-Id: I8901227990ee7bc41de30af13c775cc45016a626 +--- + src/timedate/timedated.c | 14 ++++++++++++++ + src/timesync/timesyncd-manager.c | 14 ++++++++++++++ + 2 files changed, 28 insertions(+) + +diff --git a/src/timedate/timedated.c b/src/timedate/timedated.c +index 8149facb34..5da7158c0d 100644 +--- a/src/timedate/timedated.c ++++ b/src/timedate/timedated.c +@@ -8,6 +8,7 @@ + #include "sd-bus.h" + #include "sd-event.h" + #include "sd-messages.h" ++#include "sd-journal.h" + + #include "alloc-util.h" + #include "bus-common-errors.h" +@@ -805,6 +806,8 @@ static int method_set_time(sd_bus_message *m, void *userdata, sd_bus_error *erro + struct timespec ts; + usec_t start; + struct tm tm; ++ char olddate[FORMAT_TIMESTAMP_MAX]; ++ char newdate[FORMAT_TIMESTAMP_MAX]; + + assert(m); + assert(c); +@@ -819,6 +822,9 @@ static int method_set_time(sd_bus_message *m, void *userdata, sd_bus_error *erro + if (context_ntp_service_is_active(c) > 0) + return sd_bus_error_set(error, BUS_ERROR_AUTOMATIC_TIME_SYNC_ENABLED, "Automatic time synchronization is enabled"); + ++ usec_t oldtime = now(CLOCK_REALTIME); ++ format_timestamp(olddate, sizeof(olddate), oldtime); ++ + /* this only gets used if dbus does not provide a timestamp */ + start = now(CLOCK_MONOTONIC); + +@@ -886,6 +892,14 @@ static int method_set_time(sd_bus_message *m, void *userdata, sd_bus_error *erro + "REALTIME="USEC_FMT, timespec_load(&ts), + LOG_MESSAGE("Changed local time to %s", ctime(&ts.tv_sec))); + ++ // Log an event when the system time is set manually ++ usec_t newtime = now(CLOCK_REALTIME); ++ format_timestamp(newdate, sizeof(newdate), newtime); ++ sd_journal_send("MESSAGE=BMC time updated Manually: New time=%s, Old time=%s", ++ newdate, olddate, "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", "OpenBMC.0.1.BMCTimeUpdatedManually", ++ "REDFISH_MESSAGE_ARGS=%s,%s", newdate, olddate, NULL); ++ + return sd_bus_reply_method_return(m, NULL); + } + +diff --git a/src/timesync/timesyncd-manager.c b/src/timesync/timesyncd-manager.c +index 93ba4ef87d..d46097da07 100644 +--- a/src/timesync/timesyncd-manager.c ++++ b/src/timesync/timesyncd-manager.c +@@ -11,6 +11,7 @@ + #include <sys/types.h> + + #include "sd-daemon.h" ++#include "sd-journal.h" + + #include "alloc-util.h" + #include "dns-domain.h" +@@ -425,6 +426,8 @@ static int manager_receive_response(sd_event_source *source, int fd, uint32_t re + bool spike; + int leap_sec; + int r; ++ char olddate[FORMAT_TIMESTAMP_MAX]; ++ char newdate[FORMAT_TIMESTAMP_MAX]; + + assert(source); + assert(m); +@@ -513,6 +516,9 @@ static int manager_receive_response(sd_event_source *source, int fd, uint32_t re + return manager_connect(m); + } + ++ usec_t oldtime = now(CLOCK_REALTIME); ++ format_timestamp(olddate, sizeof(olddate), oldtime); ++ + /* valid packet */ + m->pending = false; + m->retry_interval = 0; +@@ -610,6 +616,14 @@ static int manager_receive_response(sd_event_source *source, int fd, uint32_t re + + server_address_pretty(m->current_server_address, &pretty); + /* "Initial", as further successful syncs will not be logged. */ ++ /* Log an event for NTP Synchronization from older date to newly synced date. */ ++ usec_t newtime = now(CLOCK_REALTIME); ++ format_timestamp(newdate, sizeof(newdate), newtime); ++ sd_journal_send("MESSAGE=BMC time updated via NTP: New time=%s, Old time=%s", ++ newdate, olddate, "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", "OpenBMC.0.1.BMCTimeUpdatedViaNTP", ++ "REDFISH_MESSAGE_ARGS=%s,%s", newdate, olddate, NULL); ++ + log_info("Initial synchronization to time server %s (%s).", strna(pretty), m->current_server_name->string); + sd_notifyf(false, "STATUS=Initial synchronization to time server %s (%s).", strna(pretty), m->current_server_name->string); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd_%.bbappend new file mode 100644 index 000000000..2eb5330d8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd_%.bbappend @@ -0,0 +1,11 @@ +# add some configuration overrides for systemd defaults + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://0002-Add-event-log-for-system-time-synchronization.patch \ + " + +# We don't support loadable modules in kernel config +PACKAGECONFIG:remove = "kmod" +# Add systemd-logind service to get shutdown inhibition support +PACKAGECONFIG:append = " logind" diff --git a/meta-openbmc-mods/meta-common/recipes-core/util-linux/util-linux_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/util-linux/util-linux_%.bbappend new file mode 100644 index 000000000..fa58d9726 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-core/util-linux/util-linux_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-devtools/boost-url/boost-url_%.bbappend b/meta-openbmc-mods/meta-common/recipes-devtools/boost-url/boost-url_%.bbappend new file mode 100644 index 000000000..323788fe8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-devtools/boost-url/boost-url_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +# Temporary pin to resolve build breaks +SRCREV = "2c867fbe284ae532f1329b87a86ad3f8cd382867" diff --git a/meta-openbmc-mods/meta-common/recipes-devtools/cjson/cjson_%.bbappend b/meta-openbmc-mods/meta-common/recipes-devtools/cjson/cjson_%.bbappend new file mode 100644 index 000000000..c0e17b456 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-devtools/cjson/cjson_%.bbappend @@ -0,0 +1,3 @@ +FILES:${PN}-dev += "${libdir}/cmake/cJSON/*" + +EXTRA_OECMAKE += " -DENABLE_CUSTOM_COMPILER_FLAGS=OFF -DENABLE_TARGET_EXPORT=OFF" diff --git a/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb b/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb new file mode 100644 index 000000000..5b59dd909 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-devtools/mtd-util/mtd-util.bb @@ -0,0 +1,21 @@ +DESCRIPTION = "OpenBMC mtd-util" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://COPYING;md5=b77c43ae4eaf67bd73fb6452b2f113a3" + +SRC_URI = "git://github.com/Intel-BMC/mtd-util;protocol=ssh" + +PV = "1.0+git${SRCPV}" +SRCREV = "708072b62a3cecb520eeaacac88b4f2c2e101fe4" + + +S = "${WORKDIR}/git" + +DEPENDS += "dbus systemd sdbusplus openssl zlib boost microsoft-gsl i2c-tools" + +inherit cmake pkgconfig + +# Specify any options you want to pass to cmake using EXTRA_OECMAKE: +EXTRA_OECMAKE = "" + +EXTRA_OECMAKE += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', '-DDEVELOPER_OPTIONS=ON', '', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-extended/pam/libpam_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/pam/libpam_%.bbappend new file mode 100644 index 000000000..21e1d88ea --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/pam/libpam_%.bbappend @@ -0,0 +1,7 @@ +RDEPENDS:${PN}-runtime += "${MLPREFIX}pam-plugin-localuser-${libpam_suffix}" + +#Default settings lockout duration to 300 seconds and threshold value to 10 +do_install:append() { + sed -i 's/deny=0/deny=10/' ${D}${sysconfdir}/pam.d/common-auth + sed -i 's/unlock_time=0/unlock_time=300/' ${D}${sysconfdir}/pam.d/common-auth +} diff --git a/meta-openbmc-mods/meta-common/recipes-extended/pam/pam-ipmi_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/pam/pam-ipmi_%.bbappend new file mode 100644 index 000000000..971fe4290 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/pam/pam-ipmi_%.bbappend @@ -0,0 +1,4 @@ +do_install:append () { +# Remove ipmi_pass from image, if debug-tweaks is not enabled + ${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', '', 'rm ${D}/${sysconfdir}/ipmi_pass', d)} +} diff --git a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0001-Revert-server-Check-return-code-for-sd_bus_add_objec.patch b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0001-Revert-server-Check-return-code-for-sd_bus_add_objec.patch new file mode 100644 index 000000000..9aaf2f952 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0001-Revert-server-Check-return-code-for-sd_bus_add_objec.patch @@ -0,0 +1,34 @@ +From baff58f6e8f7aef4fd56be959fdd2e5e3c429eef Mon Sep 17 00:00:00 2001 +From: Johnathan Mantey <johnathanx.mantey@intel.com> +Date: Mon, 13 Jul 2020 11:51:54 -0700 +Subject: [PATCH] Revert "server: Check return code for + sd_bus_add_object_vtable()" + +This reverts commit 017a19da5f67a74daedf4d63111569902d4764e6. +--- + src/server/interface.cpp | 9 ++------- + 1 file changed, 2 insertions(+), 7 deletions(-) + +diff --git a/src/server/interface.cpp b/src/server/interface.cpp +index a72c656..0155b6d 100644 +--- a/src/server/interface.cpp ++++ b/src/server/interface.cpp +@@ -17,13 +17,8 @@ interface::interface(sdbusplus::bus::bus& bus, const char* path, + _interface_added(false) + { + sd_bus_slot* slot = nullptr; +- int r = _intf->sd_bus_add_object_vtable(_bus.get(), &slot, _path.c_str(), +- _interf.c_str(), vtable, context); +- if (r < 0) +- { +- throw exception::SdBusError(-r, "sd_bus_add_object_vtable"); +- } +- ++ _intf->sd_bus_add_object_vtable(_bus.get(), &slot, _path.c_str(), ++ _interf.c_str(), vtable, context); + _slot = decltype(_slot){slot}; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0002-Skip-decoding-some-dbus-identifiers.patch b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0002-Skip-decoding-some-dbus-identifiers.patch new file mode 100644 index 000000000..3f65cd16f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus/0002-Skip-decoding-some-dbus-identifiers.patch @@ -0,0 +1,66 @@ +From 2765f7fe7e01f3bbf30b008d0aea5c4260c2bbb9 Mon Sep 17 00:00:00 2001 +From: Nidhin MS <nidhin.ms@intel.com> +Date: Tue, 22 Jun 2021 19:49:28 +0530 +Subject: [PATCH] Skip decoding some dbus identifiers + +Dbus identifiers starting with _ and having length less than 3 and also +those having incorrect encoding can be skipped from decoding in +filename() method. Services like user manager accepts usernames +starting with _ and does not restrict accepted usernames. +Ignore those dbus identifiers while decoding. + +Tested: +Small identifiers decoded correctly + +Change-Id: I11aea22060a789dcf756142ee02637dfe7d77c14 +Signed-off-by: Nidhin MS <nidhin.ms@intel.com> +--- + src/message/native_types.cpp | 7 +++++-- + test/message/types.cpp | 8 ++++---- + 2 files changed, 9 insertions(+), 6 deletions(-) + +diff --git a/src/message/native_types.cpp b/src/message/native_types.cpp +index f0a7747..118d829 100644 +--- a/src/message/native_types.cpp ++++ b/src/message/native_types.cpp +@@ -79,13 +79,16 @@ std::string string_path_wrapper::filename() const + } + if (i + 2 >= filename.size()) + { +- return ""; ++ out.append(1, filename[i]); ++ continue; + } ++ + auto ch = unhex[filename[i + 1]]; + auto cl = unhex[filename[i + 2]]; + if (ch == -1 || cl == -1) + { +- return ""; ++ out.append(1, filename[i]); ++ continue; + } + out.append(1, (ch << 4) | cl); + i += 2; +diff --git a/test/message/types.cpp b/test/message/types.cpp +index d666008..2c639f5 100644 +--- a/test/message/types.cpp ++++ b/test/message/types.cpp +@@ -53,10 +53,10 @@ TEST(MessageTypes, ObjectPathFilename) + EXPECT_EQ(sdbusplus::message::object_path("/_2d").filename(), "-"); + EXPECT_EQ(sdbusplus::message::object_path("/_20").filename(), " "); + EXPECT_EQ(sdbusplus::message::object_path("/_2F").filename(), "/"); +- EXPECT_EQ(sdbusplus::message::object_path("/_").filename(), ""); +- EXPECT_EQ(sdbusplus::message::object_path("/_2").filename(), ""); +- EXPECT_EQ(sdbusplus::message::object_path("/_2y").filename(), ""); +- EXPECT_EQ(sdbusplus::message::object_path("/_y2").filename(), ""); ++ EXPECT_EQ(sdbusplus::message::object_path("/_").filename(), "_"); ++ EXPECT_EQ(sdbusplus::message::object_path("/_2").filename(), "_2"); ++ EXPECT_EQ(sdbusplus::message::object_path("/_2y").filename(), "_2y"); ++ EXPECT_EQ(sdbusplus::message::object_path("/_y2").filename(), "_y2"); + EXPECT_EQ(sdbusplus::message::object_path("/bios_active").filename(), + "bios_active"); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend new file mode 100644 index 000000000..a33c265f6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend @@ -0,0 +1,9 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://0001-Revert-server-Check-return-code-for-sd_bus_add_objec.patch \ + file://0002-Skip-decoding-some-dbus-identifiers.patch \ + " + +# Temporary pin to resolve build breaks +SRCREV="dfb5642201699dc42a7dda12d72718a8b9568151" diff --git a/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow/pam.d/login b/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow/pam.d/login new file mode 100644 index 000000000..51dd3a83b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow/pam.d/login @@ -0,0 +1,90 @@ +# +# The PAM configuration file for the Shadow `login' service +# + +# Enforce a minimal delay in case of failure (in microseconds). +# (Replaces the `FAIL_DELAY' setting from login.defs) +# Note that other modules may require another minimal delay. (for example, +# to disable any delay, you should add the nodelay option to pam_unix) +auth optional pam_faildelay.so delay=3000000 + +# Outputs an issue file prior to each login prompt (Replaces the +# ISSUE_FILE option from login.defs). Uncomment for use +# auth required pam_issue.so issue=/etc/issue + +# Disallows root logins except on tty's listed in /etc/securetty +# (Replaces the `CONSOLE' setting from login.defs) +# Note that it is included as a "requisite" module. No password prompts will +# be displayed if this module fails to avoid having the root password +# transmitted on unsecure ttys. +# You can change it to a "required" module if you think it permits to +# guess valid user names of your system (invalid user names are considered +# as possibly being root). +auth [success=ok ignore=ignore user_unknown=ignore default=die] pam_securetty.so + +# Disallows other than root logins when /etc/nologin exists +# (Replaces the `NOLOGINS_FILE' option from login.defs) +auth requisite pam_nologin.so + +# This module parses environment configuration file(s) +# and also allows you to use an extended config +# file /etc/security/pam_env.conf. +# +# parsing /etc/environment needs "readenv=1" +session required pam_env.so readenv=1 + +# Allow only uid 0 for login prompt authentication +auth required pam_succeed_if.so uid eq 0 + +# Do regular pam unix based authentication. Allow null password. +auth [success=2 default=ignore] pam_unix.so quiet nullok_secure +# here's the fallback if no module succeeds +auth requisite pam_deny.so +# prime the stack with a positive return value if there isn't one already; +# this avoids us returning an error just because nothing sets a success code +# since the modules above will each just jump around +auth required pam_permit.so + +# This allows certain extra groups to be granted to a user +# based on things like time of day, tty, service, and user. +# Please edit /etc/security/group.conf to fit your needs +# (Replaces the `CONSOLE_GROUPS' option in login.defs) +auth optional pam_group.so + +# Uncomment and edit /etc/security/time.conf if you need to set +# time restrainst on logins. +# (Replaces the `PORTTIME_CHECKS_ENAB' option from login.defs +# as well as /etc/porttime) +# account requisite pam_time.so + +# Uncomment and edit /etc/security/access.conf if you need to +# set access limits. +# (Replaces /etc/login.access file) +# account required pam_access.so + +# Sets up user limits according to /etc/security/limits.conf +# (Replaces the use of /etc/limits in old login) +session required pam_limits.so + +# Prints the last login info upon succesful login +# (Replaces the `LASTLOG_ENAB' option from login.defs) +session optional pam_lastlog.so + +# Prints the motd upon succesful login +# (Replaces the `MOTD_FILE' option in login.defs) +session optional pam_motd.so + +# Prints the status of the user's mailbox upon succesful login +# (Replaces the `MAIL_CHECK_ENAB' option from login.defs). +# +# This also defines the MAIL environment variable +# However, userdel also needs MAIL_DIR and MAIL_FILE variables +# in /etc/login.defs to make sure that removing a user +# also removes the user's mail spool file. +# See comments in /etc/login.defs +session optional pam_mail.so standard + +# Standard Un*x account and session +account include common-account +password include common-password +session include common-session diff --git a/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow_%.bbappend new file mode 100644 index 000000000..31952588b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-extended/shadow/shadow_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +PAM_SRC_URI += "file://pam.d/login \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend new file mode 100644 index 000000000..dbd591c86 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +# Use the latest to support obmc-ikvm properly +SRC_URI = "git://github.com/LibVNC/libvncserver" +SRCREV = "c1f29b73e4f111fc3d4b5941936218be0c6c430f" diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend new file mode 100644 index 000000000..faee3bf4c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +#SRC_URI = "git://github.com/openbmc/obmc-ikvm" +SRCREV = "f90f68d1e9bc6c53f49ebac6d0b8e11257de77a9" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/configure-usb-c.bb b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/configure-usb-c.bb new file mode 100644 index 000000000..e46b96115 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/configure-usb-c.bb @@ -0,0 +1,25 @@ +SUMMARY = "Configure USB Type C controller" +DESCRIPTION = "Configure USB Type C CC controller which requires basic initialization on every G3 to S5 cycle" + +S = "${WORKDIR}" +SRC_URI = " \ + file://configure-usb-c.sh \ + file://configure-usb-c.service \ + " + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/configure-usb-c.service" + +do_install:append() { + install -d ${D}${bindir} + install -m 0755 ${S}/configure-usb-c.sh ${D}/${bindir}/configure-usb-c.sh + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${S}/configure-usb-c.service ${D}${base_libdir}/systemd/system +} + +SYSTEMD_SERVICE:${PN} = "configure-usb-c.service" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.service b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.service new file mode 100644 index 000000000..465ddd77f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.service @@ -0,0 +1,9 @@ +[Unit] +Description=Configure USB Type C controller + +[Service] +ExecStart=/usr/bin/configure-usb-c.sh +Type=oneshot + +[Install] +WantedBy=basic.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.sh b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.sh new file mode 100644 index 000000000..c7cc4a231 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/configure-usb-c/files/configure-usb-c.sh @@ -0,0 +1,29 @@ +#!/bin/bash + +I2C_BUS=7 +CHIP_ADDR=0x47 + +read_id() { + local idx=0 + local result=0 + local value=0 + for ((idx=0; idx<6; idx++)) + do + typeset -i value=$(gpioget $(gpiofind "FM_BMC_BOARD_SKU_ID${idx}_N")) + value=$((value << idx)) + result=$((result | value)) + done + echo $result +} + +BOARD_ID=$(read_id) +if grep -q 'CPU part\s*: 0xc07' /proc/cpuinfo; then # AST2600 + if [[ $BOARD_ID == 62 || $BOARD_ID == 61 ]]; then + # Write 0x01 data into General Control Register (offset 0x0A) + # Write 0x21 data into General Control Register (offset 0x0A) + # Write 0x80 data into Connection Status Register (offset 0x08) + # Write 0x20 data into General Control Register (offset 0x0A) + i2cset -y $I2C_BUS $CHIP_ADDR 0x0a 0x01; i2cset -y $I2C_BUS $CHIP_ADDR 0x0a 0x21; i2cset -y $I2C_BUS $CHIP_ADDR 0x08 0x80; i2cset -y $I2C_BUS $CHIP_ADDR 0x0a 0x20 + echo "Configured USB Type C controller" + fi +fi diff --git a/meta-openbmc-mods/meta-common/recipes-intel/host-misc-comm-manager/host-misc-comm-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-intel/host-misc-comm-manager/host-misc-comm-manager_git.bb new file mode 100644 index 000000000..6b54189e6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/host-misc-comm-manager/host-misc-comm-manager_git.bb @@ -0,0 +1,19 @@ +SUMMARY = "Miscellaneous host interface communication manager" +DESCRIPTION = "Daemon exposes Miscellaneous host interface communications like \ + platform reset, mail box & scratch pad" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/host-misc-comm-manager.git;protocol=ssh" + +SRCREV = "470facc6e94ecbd01ca9c3f0749ae603dffff0e9" + +inherit cmake systemd +SYSTEMD_SERVICE:${PN} = "xyz.openbmc_project.Host.Misc.Manager.service" + +DEPENDS = "boost sdbusplus phosphor-logging" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/hsbp/hsbp-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-intel/hsbp/hsbp-manager_git.bb new file mode 100644 index 000000000..a2ce25369 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/hsbp/hsbp-manager_git.bb @@ -0,0 +1,22 @@ +SUMMARY = "HSBP Manager" +DESCRIPTION = "HSBP Manager monitors HSBPs through SMBUS" + +SRC_URI = "git://github.com/openbmc/s2600wf-misc.git" +SRCREV = "0c5059f685f6df0704a4b773f2e617cf10d03210" +PV = "0.1+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${COREBASE}/meta/files/common-licenses/Apache-2.0;md5=89aea4e17d99a7cacdbeed46a0096b10" + +SYSTEMD_SERVICE:${PN} = "hsbp-manager.service" + +DEPENDS = "boost \ + i2c-tools \ + sdbusplus \ + libgpiod" + +S = "${WORKDIR}/git/hsbp-manager" +inherit cmake systemd + +EXTRA_OECMAKE = "-DYOCTO=1" + diff --git a/meta-openbmc-mods/meta-common/recipes-intel/images/intel-platforms.bb b/meta-openbmc-mods/meta-common/recipes-intel/images/intel-platforms.bb new file mode 100644 index 000000000..d0b324239 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/images/intel-platforms.bb @@ -0,0 +1,19 @@ +DESCRIPTION = "Image with Intel content based upon Phosphor, an OpenBMC framework." + +inherit obmc-phosphor-full-fitimage +inherit obmc-phosphor-image-common +inherit obmc-phosphor-image-dev +inherit ${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'image_types_intel_pfr', '', d)} + +DEPENDS += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'obmc-intel-pfr-image-native', '', d)}" +DEPENDS += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'pfr-manager', '', d)}" +DEPENDS += "dtc-native" + +FEATURE_PACKAGES_obmc-sensors = "" +FEATURE_PACKAGES_obmc-debug-collector = "" + +fix_shadow_perms() { + chgrp shadow ${IMAGE_ROOTFS}${sysconfdir}/shadow + chmod u=rw,g+r ${IMAGE_ROOTFS}${sysconfdir}/shadow +} +ROOTFS_POSTPROCESS_COMMAND += "fix_shadow_perms ; " diff --git a/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/files/pfr_image.py b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/files/pfr_image.py new file mode 100755 index 000000000..baa174349 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/files/pfr_image.py @@ -0,0 +1,439 @@ +#!/usr/bin/env python3 + +# Copyright (c) 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# coding: utf-8 +# our image is contained as parts, including the hash +# then it gets zipped up and signed again + +# this internal signature is for boot and recovery, but +# will be checked prior to writing to flash as well. + +# the internal signature format is a PFR-specific block +# including a hash bitmap, certificates (public keys), +# and the actual signature data as well, for both active +# and recovery images + +# TODO: figure out if active and recovery actually have different sigs +# TODO: build hashmap from payload manifest +# TODO: figure out exact struct layout for PFR metadata +import os, hashlib, struct, json, sys, subprocess, mmap, io, array, binascii, copy, shutil, re, getopt +from array import array +from binascii import unhexlify +from hashlib import sha1, sha256, sha384, sha512 +from shutil import copyfile +# Flash Map +# ----------------------------------------------- +# Start addr Contents +# 0x00000000 S U-Boot +# 0x00080000 S+ PFM +# 0x000a0000 U U-boot Env +# 0x000C0000 U SOFS +# 0x002c0000 U RWFS +# 0x00b00000 S fit-image +# 0x02a00000 S+ rc-image +# 0x04a00000 U staging-image +# * partially signed (not full 64k page) +# + unsigned, owned by pfr + +# TODO: The below defines should go to manifest files. +# Keeping it here hard coded for now. +# The pages to be skipped for HASH and PBC +# Pages: 0x80 to 0x9f - starting PFM region until end of pfm +# Pages: 0x2a00 to 0x7FFF - starting RC-image until end of flash +EXCLUDE_PAGES =[[0x80, 0x9f],[0x2a00,0x7fff]] + +# SPI PFM globals +PFM_OFFSET = 0x80000 +PFM_SPI = 0x1 +PFM_I2C = 0x2 +PFM_DEF_SIZE = 32 # 32 bytes of PFM header +PFM_SPI_SIZE_DEF = 16 # 16 bytes of SPI PFM +PFM_I2C_SIZE = 40 # 40 bytes of i2c rules region in PFM +PAGE_SIZE = 0x1000 # 4KB size of page + +def load_manifest(fname): + manifest = {} + with open(fname, 'r') as fd: + manifest = json.load(fd) + return manifest + +class pfm_spi(object): + + def __init__(self, prot_mask, start_addr, end_addr, hash, hash_pres): + self.spi_pfm = PFM_SPI + self.spi_prot_mask = prot_mask + self.spi_hash_pres = hash_pres + print("hash_pres={}".format(self.spi_hash_pres)) + print("spi_hash={}".format(hash)) + print("spi_start_addr={}".format(start_addr)) + print("spi_end_addr={}".format(end_addr)) + if hash_pres != 0: + self.spi_hash = hash + self.spi_pfm_rsvd = 0xffffffff # b'\xff'*4 + self.spi_start_addr = start_addr + self.spi_end_addr = end_addr + +class pfm_i2c(object): + + def __init__(self, bus_id, rule_id, address, cmd_map): + self.i2c_pfm = PFM_I2C + self.i2c_pfm_rsvd = 0xffffffff # b'\xff'*4 + self.i2c_bus_id = bus_id + self.i2c_rule_id = rule_id + self.i2c_address = address + self.i2c_cmd_whitelist = cmd_map + +class pfr_bmc_image(object): + +# json_file, firmware_file + def __init__(self, manifest, firmware_file, build_ver, build_num, build_hash, sha, output_filename): + + self.manifest = load_manifest(manifest) + self.firmware_file = firmware_file + self.build_version = build_ver + self.build_number = build_num + self.build_hash = build_hash + self.sha = sha + if self.sha == "2": + self.sha_version = 0x2 + self.pfm_spi_size_hash = 48 + if self.sha == "1": + self.pfm_spi_size_hash = 32 + self.sha_version = 0x1 + self.pfr_rom_file = output_filename + open(self.pfr_rom_file, 'a').close() + + self.page_size = PAGE_SIZE + self.empty = b'\xff' * self.page_size + + self.image_parts = [] + for p in self.manifest['image-parts']: + # the json should have in the order- filename, index, offset, size and protection byte + self.image_parts.append((p['name'], p['index'], p['offset'], p['size'], p['prot_mask'], p['pfm'], p['hash'], p['compress'])) + if self.sha == "1": + self.act_dgst = hashlib.sha256() + if self.sha == "2": + self.act_dgst = hashlib.sha384() + # SPI regions PFM array + self.pfm_spi_regions = [] + self.pfm_bytes = PFM_DEF_SIZE # PFM definition bytes (SPI regions + SMBUS) + + # hash, erase and compression bit maps for 128MB + self.pbc_erase_bitmap = bytearray(4096) + self.pbc_comp_bitmap = bytearray(4096) + + self.pbc_comp_payload = 0 + self.sec_rev = 1 + + # fill in the calculated data + self.hash_and_map() + + self.i2c_rules = [] + for i in self.manifest['i2c-rules']: + # the json should have in the order- bus-id, rule-id, address, size and cmd-whitelist + self.i2c_rules.append((i['bus-id'], i['rule-id'], i['address'], i['cmd-whitelist'])) + + # I2C rules PFM array + self.pfm_i2c_rules = [] + + # Generate the i2c rules + self.build_i2c_rules() + + # Generate PFM region binary - pfm.bin + self.build_pfm() + print("PFM build done") + + # Generate PBC region - pbc.bin + self.pbc_hdr() + print("PBC build done") + + def hash_compress_regions(self, p, upd): + + # JSON format as below + # 0. "name": <image region name> + # 1. "index": 1, + # 2. "offset": <start addr>, + # 3. "size": <size of the region>, + # 4. "prot_mask": <PFR protection mask>, + # 5. "pfm": <1|0 -add in PFM or not>, + # 6. "hash": <hashing of the region needed>, + # 7. "compress": <region to be compressed> + + image_name = p[0] + start_addr = int(p[2],16) #image part start address + size = int(p[3],16) #size of the image part + pfm_prot_mask = p[4] # pfm protection mask + pfm_flag = p[5] # pfm needed? + hash_flag = p[6] #to be hashed? + compress = p[7] #compress flag + index = p[1] # image part index + # 1 page is 4KB + page = start_addr >> 12 + + with open(self.firmware_file, "rb") as f: + f.seek(start_addr) + skip = False + + if hash_flag == 1: + if self.sha == "1": + hash_dgst = hashlib.sha256() + if self.sha == "2": + hash_dgst = hashlib.sha384() + for chunk in iter(lambda: f.read(self.page_size), b''): + chunk_len = len(chunk) + if chunk_len != self.page_size: + chunk = b''.join([chunk, b'\xff' * (self.page_size - chunk_len)]) + + for p in EXCLUDE_PAGES: + if (page >= p[0]) and (page <= p[1]): + #print("Exclude page={}".format(page)) + skip = True + break + + if not skip: + # add to the hash + if hash_flag == 1: + # HASH for the region + self.act_dgst.update(chunk) + hash_dgst.update(chunk) + + if compress == 1: + self.pbc_erase_bitmap[page >> 3] |= 1 << (7- (page % 8)) # Big endian bit map + # add to the pbc map + if chunk != self.empty: + #print("compressed page ={}".format(page)) + upd.write(chunk) + self.pbc_comp_bitmap[page >> 3] |= 1 << (7- (page % 8)) # Big Endian bit map + self.pbc_comp_payload += chunk_len # compressed payload bytes + + page += 1 + + if (page * self.page_size) >= (size + start_addr): + break + + if pfm_flag == 1: + self.pfm_bytes += PFM_SPI_SIZE_DEF + + hash = bytearray(self.pfm_spi_size_hash) + hash_pres = 0 + + if hash_flag == 1: + # region's hash + hash = hash_dgst.hexdigest() + hash_pres = self.sha_version + self.pfm_bytes += self.pfm_spi_size_hash + # append to SPI regions in PFM + self.pfm_spi_regions.append(pfm_spi(pfm_prot_mask, start_addr, (start_addr+size), hash, hash_pres)) + + def add_i2c_rules(self, i): + bus_id = i[0] # I2C Bus number + rule_id = i[1] # I2C rule number + addr = i[2] # I2C device address + cmds = i[3] # I2C white listed commands for which i2c write to be allowed + whitelist_map = bytearray(32) + + self.pfm_bytes += PFM_I2C_SIZE # add upto PFM size + + for c in cmds: + if c == "all": + for i in range(32): + whitelist_map[i] = 0xff + break + else: + idx = int(c,16) // 8 # index in the 32 bytes of white list i2c cmds + bit = int(c,16) % 8 # bit position to set + whitelist_map[idx] |= (1 << bit) + + # append to I2C rules in PFM + self.pfm_i2c_rules.append(pfm_i2c(bus_id, rule_id, addr, whitelist_map)) + + def build_i2c_rules(self): + for i in self.i2c_rules: + self.add_i2c_rules(i) + + def hash_and_map(self): + + # have copy of the update file for appending with PFR meta and compression + copyfile(self.firmware_file, self.pfr_rom_file) + with open("bmc_compressed.bin", "wb+") as upd: + for p in self.image_parts: + #filename, index, offset, size, protection. + print(p[0], p[1], p[2], p[3], p[4]) + self.hash_compress_regions(p, upd) + + def pbc_hdr(self): + ''' + typedef struct { + uint8_t tag[4]; /* PBC tag */ + uint32_t version; /* PBC Version- 0x0000_0002 */ + uint32_t page_size; /* NOR Flash page size = 0x0000_1000 */ + uint32_t pattern_size; /* 0xFF as pattern 1byte = 0x0000_0001 */ + uint32_t pattern; /* 0xFF pattern = 0x0000_00FF */ + uint32_t bitmap_size; /* 32768 pages for 128MB- 0x0000_8000 */ + uint32_t payload_length /* payload */ + uint8_t reserved[100]; /* Reserved 100bytes */ + uint8_t erase_bitmap[4096]; /* erase bit map for 32768 pages */ + uint8_t comp_bitmap[4096]; /* compression bit map for 32768 pages */ + uint8_t comp_payload; /* compressed payload */ + ''' + names = [ + 'tag', 'pbc_ver', 'page_sz', 'pattern_sz', 'pattern', 'bitmap_sz', + 'payload_size', 'resvd0', 'erase_bitmap', 'comp_bitmap', + ] + parts = { + 'tag': b'CBP_', + 'pbc_ver': struct.pack('<i',0x00000002), + 'page_sz': struct.pack('<i',0x00001000), + 'pattern_sz': struct.pack('<i',0x00000001), + 'pattern': struct.pack('<i',0x000000FF), + 'bitmap_sz': struct.pack('<i',0x00008000), + 'payload_size': struct.pack('<i',self.pbc_comp_payload), + 'resvd0' : b'\x00'*100, + 'erase_bitmap': bytes(self.pbc_erase_bitmap), + 'comp_bitmap': bytes(self.pbc_comp_bitmap), + } + + with open("pbc.bin", "wb+") as pbf: + pbf.write(b''.join([parts[n] for n in names])) + pbf.seek(0) # rewind to beginning of PBC file + self.act_dgst.update(pbf.read()) # add up PBC data for hashing + + def build_pfm(self): + ''' + typedef struct { + uint32_t tag; /* PFM_HDR_TAG above, no terminating null */ + uint8_t SVN; /* SVN- security revision of associated image data */ + uint8_t bkc; /* bkc */ + uint8_t pfm_ver_major; /* PFM revision */ + uint8_t pfm_ver_minor; + uint8_t reserved0[4]; + uint8_t build_num; + uint8_t build_hash[3]; + uint8_t reserved1[12]; /* reserved */ + uint32_t pfm_length; /* PFM size in bytes */ + pfm_spi pfm_spi[2]; /* PFM SPI regions - u-boot & fit-image */ + pfm_smbus pfm_smbus[4]; /* defined smbus rules for PSUs and HSBP */ + } __attribute__((packed)) pfm_hdr; + ''' + names = [ + 'tag', 'sec_rev', 'bkc', 'pfm_ver_major', 'pfm_ver_minor', 'resvd0', 'build_num', 'build_hash1', 'build_hash2', 'build_hash3', 'resvd1', 'pfm_len', + ] + parts = { + 'tag': struct.pack("<I", 0x02b3ce1d), + 'sec_rev': struct.pack('<B', self.sec_rev), + 'bkc': struct.pack('<B', 0x01), + 'pfm_ver_major': struct.pack('<B', ((int(self.build_version) >> 8) & 0xff)), + 'pfm_ver_minor': struct.pack('<B', (int(self.build_version) & 0x00ff)), + 'resvd0': b'\xff'* 4, + 'build_num': struct.pack('<B', int(self.build_number,16)), + 'build_hash1': struct.pack('<B', (int(self.build_hash) & 0xff)), + 'build_hash2': struct.pack('<B', ((int(self.build_hash) >> 8) & 0xff)), + 'build_hash3': struct.pack('<B', ((int(self.build_hash) >> 16) & 0xff)), + 'resvd1': b'\xff'* 12, + 'pfm_len': '' + } + + # PFM should be 128bytes aligned, find the padding bytes + padding_bytes = 0 + if (self.pfm_bytes % 128) != 0: + padding_bytes = 128 - (self.pfm_bytes % 128) + + print("padding={}".format(padding_bytes)) + print("PFM size1={}".format(self.pfm_bytes)) + self.pfm_bytes += padding_bytes + parts['pfm_len'] = struct.pack('<I', self.pfm_bytes) + print("PFM size2={}".format(self.pfm_bytes)) + + with open("pfm.bin", "wb+") as f: + f.write(b''.join([parts[n] for n in names])) + for i in self.pfm_spi_regions: + f.write(struct.pack('<B', int(i.spi_pfm))) + f.write(struct.pack('<B', int(i.spi_prot_mask))) + f.write(struct.pack('<h', int(i.spi_hash_pres))) + f.write(struct.pack('<I', int(i.spi_pfm_rsvd))) + f.write(struct.pack('<I', int(i.spi_start_addr))) + f.write(struct.pack('<I', int(i.spi_end_addr))) + + if i.spi_hash_pres != 0: + f.write(bytearray.fromhex(i.spi_hash)) + + for r in self.pfm_i2c_rules: + f.write(struct.pack('<B', int(r.i2c_pfm))) + f.write(struct.pack('<I', int(r.i2c_pfm_rsvd))) + f.write(struct.pack('<B', int(r.i2c_bus_id))) + f.write(struct.pack('<B', int(r.i2c_rule_id))) + f.write(struct.pack('<B', int(r.i2c_address, 16))) + f.write(r.i2c_cmd_whitelist) + + # write the padding bytes at the end + f.write(b'\xff' * padding_bytes) + +def usage(prog): + sys.stderr.write(prog + + " -m manifest -i rom-image -n build_version -b build_number -h build_hash -s sha -o output_file_name\n") + +def main(): + try: + opts, args = getopt.getopt(sys.argv[1:], "m:i:n:b:h:s:o:", + ["manifest=", "image=", "build_version=","build_number=","build_hash=","sha=", "output_file_name="]) + except getopt.GetoptError as err: + sys.stderr.write(str(err) + "\n") + sys.exit(2) + json_file = None + firmware_file = None + build_ver = None + build_num = None + build_hash = None + sha = None + output_filename = None + + for o, a in opts: + if o in ("-m", "--manifest"): + json_file = a + elif o in ("-i", "--image"): + firmware_file = a + elif o in ("-n", "--build_version"): + build_ver = a + elif o in ("-b", "--build_number"): + build_num = a + elif o in ("-h", "--build_hash"): + build_hash = a + elif o in ("-s", "--sha"): + sha = a + elif o in ("-o", "--output_file_name"): + output_filename = a + else: + usage(sys.argv[0]) + assert False, "unhandled argument: " + o + + if json_file is None or firmware_file is None or build_ver is None or build_num is None or build_hash is None or sha is None or output_filename is None: + usage(sys.argv[0]) + sys.exit(-1) + + print("manifest: %s" % json_file) + print("image: %s" % firmware_file) + print("build_ver: %s" % build_ver) + print("build_number: %s" % build_num) + print("build_hash: %s" % build_hash) + print("Sha: %s" % sha) + print("output_filename: %s" % output_filename) + + + # function to generate BMC PFM, PBC header and BMC compressed image + pfr_bmc_image(json_file, firmware_file, build_ver, build_num, build_hash, sha ,output_filename) + +if __name__ == '__main__': + main() diff --git a/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/intel-pfr-signing-utility-native.bb b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/intel-pfr-signing-utility-native.bb new file mode 100644 index 000000000..72e7857ef --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/intel-pfr-signing-utility-native.bb @@ -0,0 +1,20 @@ +SUMMARY = "Intel(R) Platform Firmware Resilience Signing Utility" +DESCRIPTION = "Image signing tool for building Intel(R) PFR image" + +inherit cmake native + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +DEPENDS = "openssl-native libxml2-native " + +SRC_URI = "git://github.com/Intel-BMC/intel-pfr-signing-utility;protocol=ssh" + +SRCREV = "33b8e02e9b25d5150b744fcbda4cf1e508813194" + +S = "${WORKDIR}/git" + +do_install:append() { + install -d ${D}/${bindir} + install -m 775 ${B}/intel-pfr-signing-utility ${D}/${bindir} +} diff --git a/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bb b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bb new file mode 100644 index 000000000..be7251555 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bb @@ -0,0 +1,23 @@ +SUMMARY = "Intel PFR image manifest and image signing keys" +DESCRIPTION = "This copies PFR image generation scripts and image signing keys to staging area" + +PR = "r1" +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +inherit native + +DEPENDS += " intel-pfr-signing-utility-native" + +SRC_URI = " \ + file://pfr_image.py \ + " + +do_install () { + bbplain "Copying intel pfr image generation scripts and image signing keys" + + install -d ${D}${bindir} + install -d ${D}/${datadir}/pfrconfig + install -m 775 ${WORKDIR}/pfr_image.py ${D}${bindir}/pfr_image.py +} + diff --git a/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/pfr-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/pfr-manager_%.bbappend new file mode 100644 index 000000000..2ae1e372b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/intel-pfr/pfr-manager_%.bbappend @@ -0,0 +1,5 @@ +# Enable downstream autobump +SRC_URI = "git://github.com/openbmc/pfr-manager" +SRCREV = "8491692089f9295cf2efab456d4747f3cf1fb098" +DEPENDS += " libgpiod \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics.bb b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics.bb new file mode 100644 index 000000000..4d5102386 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics.bb @@ -0,0 +1,24 @@ +SUMMARY = "One time automatically enable every NIC" +DESCRIPTION = "Re-enable NIC accidentally disabled by earlier BMC firmware." + +S = "${WORKDIR}" +SRC_URI = "file://enable-nics.sh \ + file://enable-nics.service \ + " + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/enable-nics.service" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/enable-nics.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${S}/enable-nics.sh ${D}/${bindir}/enable-nics.sh +} + +SYSTEMD_SERVICE:${PN} += " enable-nics.service" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.service b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.service new file mode 100644 index 000000000..c1d0f602f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.service @@ -0,0 +1,10 @@ +[Unit] +Description=Re-enable NICs mistakenly disabled by earlier BMC firmware +Wants=multi-user.target + +[Service] +Type=oneshot +ExecStart=/usr/bin/enable-nics.sh + +[Install] +WantedBy=network.target diff --git a/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.sh b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.sh new file mode 100755 index 000000000..ce1473be1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/nic/enable-nics/enable-nics.sh @@ -0,0 +1,14 @@ +#!/bin/sh + +SEMAPHORE_FILE=/var/cache/private/nic_fixup_complete + +if [ -a $SEMAPHORE_FILE ]; then + exit 0 +fi + +for nicFile in /etc/systemd/network/*.network +do + sed -i -e"/Unmanaged/d" $nicFile +done + +touch $SEMAPHORE_FILE diff --git a/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-intel-apps.bb b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-intel-apps.bb new file mode 100644 index 000000000..edee2c70b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-intel-apps.bb @@ -0,0 +1,43 @@ +SUMMARY = "OpenBMC for Intel - Applications" +PR = "r1" + +inherit packagegroup + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +PROVIDES = "${PACKAGES}" +PACKAGES = " \ + ${PN}-chassis \ + ${PN}-fans \ + ${PN}-flash \ + ${PN}-system \ + " + +PROVIDES += "virtual/obmc-chassis-mgmt" +PROVIDES += "virtual/obmc-fan-mgmt" +PROVIDES += "virtual/obmc-flash-mgmt" +PROVIDES += "virtual/obmc-system-mgmt" + +RPROVIDES:${PN}-chassis += "virtual-obmc-chassis-mgmt" +RPROVIDES:${PN}-fans += "virtual-obmc-fan-mgmt" +RPROVIDES:${PN}-flash += "virtual-obmc-flash-mgmt" +RPROVIDES:${PN}-system += "virtual-obmc-system-mgmt" + +SUMMARY:${PN}-chassis = "Intel Chassis" +RDEPENDS:${PN}-chassis = " \ + x86-power-control \ + " + +SUMMARY:${PN}-fans = "Intel Fans" +RDEPENDS:${PN}-fans = " \ + phosphor-pid-control \ + " + +SUMMARY:${PN}-flash = "Intel Flash" +RDEPENDS:${PN}-flash = "" + +SUMMARY:${PN}-system = "Intel System" +RDEPENDS:${PN}-system = " \ + webui-vue \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend new file mode 100644 index 000000000..e3fccea14 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend @@ -0,0 +1,7 @@ +RDEPENDS:${PN}-extrasdevtools = "libgpiod-tools" +RDEPENDS:${PN}-chassis-state-mgmt:remove = "obmc-phosphor-power" +RDEPENDS:${PN}-devtools:remove = "ffdc" + +PACKAGES:remove = "${PN}-debug-collector" + +RDEPENDS:${PN}-settings = "settings" diff --git a/meta-openbmc-mods/meta-common/recipes-intel/psu-manager/psu-manager.bb b/meta-openbmc-mods/meta-common/recipes-intel/psu-manager/psu-manager.bb new file mode 100644 index 000000000..9cd2eec6f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/psu-manager/psu-manager.bb @@ -0,0 +1,26 @@ +SUMMARY = "Power supply manager for Intel based platform" +DESCRIPTION = "Power supply manager which include PSU Cold Redundancy service" + +SRC_URI = "git://github.com/Intel-BMC/psu-manager.git;protocol=ssh" +SRCREV = "30788892792c302b1317bac4e7f837ca1374d789" + +S = "${WORKDIR}/git" + +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${S}/LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +inherit cmake +inherit systemd + +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.coldredundancy.service" + +DEPENDS += " \ + systemd \ + sdbusplus \ + phosphor-dbus-interfaces \ + phosphor-logging \ + boost \ + i2c-tools \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb new file mode 100644 index 000000000..9eca05bae --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb @@ -0,0 +1,31 @@ +SUMMARY = "SMBIOS MDR version 1 service for Intel based platform" +DESCRIPTION = "SMBIOS MDR version 1 service for Intel based platfrom" + +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh;nobranch=1" +SRCREV = "6aab8bcc8fd0550753c87265036b1b7c4c8a9f71" + +S = "${WORKDIR}/git/services/smbios" + +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${S}/LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +inherit cmake pkgconfig +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE:${PN} += "smbios-mdrv1.service" + +DEPENDS += " \ + autoconf-archive-native \ + systemd \ + sdbusplus \ + phosphor-dbus-interfaces \ + phosphor-logging \ + " +RDEPENDS:${PN} += " \ + libsystemd \ + sdbusplus \ + phosphor-dbus-interfaces \ + phosphor-logging \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1/smbios-mdrv1.service b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1/smbios-mdrv1.service new file mode 100644 index 000000000..edfd3bf70 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1/smbios-mdrv1.service @@ -0,0 +1,13 @@ +[Unit] +Description=Intel BMC SMBIOS MDR V1 + +[Service] +Restart=always +RestartSec=5 +StartLimitBurst=10 +ExecStartPre=/bin/mkdir -p /etc/smbios +ExecStart=/usr/bin/env smbiosapp +SyslogIdentifier=smbiosapp + +[Install] +WantedBy={SYSTEMD_DEFAULT_TARGET} diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb new file mode 100644 index 000000000..683497208 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb @@ -0,0 +1,35 @@ +SUMMARY = "SMBIOS MDR version 2 service for Intel based platform" +DESCRIPTION = "SMBIOS MDR version 2 service for Intel based platfrom" + +SRC_URI = "git://github.com/openbmc/smbios-mdr.git" +SRCREV = "631388e621abad855abbe4abbfb20111da9056f1" + +S = "${WORKDIR}/git" + +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${S}/LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +inherit cmake pkgconfig +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE:${PN} += "smbios-mdrv2.service" +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.cpuinfo.service" + +DEPENDS += " \ + autoconf-archive-native \ + boost \ + systemd \ + sdbusplus \ + phosphor-dbus-interfaces \ + phosphor-logging \ + libpeci \ + i2c-tools \ + nlohmann-json \ + " + +EXTRA_OECMAKE="-DYOCTO=1 -DIPMI_BLOB=0" + +PACKAGECONFIG ??= "${@bb.utils.filter('DISTRO_FEATURES', 'smbios-no-dimm', d)}" +PACKAGECONFIG[smbios-no-dimm] = "-DDIMM_DBUS=OFF, -DDIMM_DBUS=ON" diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch new file mode 100644 index 000000000..7dd9990a9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch @@ -0,0 +1,45 @@ +From ca0fa975d066b15637188e8fe37dd6d12e0e2bc4 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Tue, 28 Apr 2020 22:32:41 +0800 +Subject: [PATCH] Selecting 128MB for PFR + +PFR platforms requires 128MB flash mapping. +This will override the existing 64MB flash map +and loads 128MB flash map. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts | 2 +- + arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +index 13b94bdf5d62..2cab5fb38d4f 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +@@ -96,7 +96,7 @@ + flash@0 { + status = "okay"; + m25p,fast-read; +-#include "openbmc-flash-layout-intel-64MB.dtsi" ++#include "openbmc-flash-layout-intel-128MB.dtsi" + }; + }; + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +index a95b5ac828b3..bf66e1b6c0fd 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +@@ -94,7 +94,7 @@ + spi-max-frequency = <40000000>; + spi-tx-bus-width = <4>; + m25p,fast-read; +-#include "openbmc-flash-layout-intel-64MB.dtsi" ++#include "openbmc-flash-layout-intel-128MB.dtsi" + }; + }; + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg new file mode 100644 index 000000000..bbc7fa5b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg @@ -0,0 +1,2 @@ +CONFIG_DEVMEM = y +CONFIG_DEVMEM_BOOTPARAM = n diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg new file mode 100644 index 000000000..c33020874 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg @@ -0,0 +1,96 @@ +CONFIG_BLK_DEV_RAM=y +CONFIG_HWMON=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_IIO=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_ASPEED_ADC=y +CONFIG_GPIO_ASPEED_SGPIO=y +CONFIG_CRC8=y +CONFIG_PECI=y +CONFIG_PECI_CHARDEV=y +CONFIG_PECI_ASPEED=y +CONFIG_SENSORS_PECI_CPUTEMP=y +CONFIG_SENSORS_PECI_DIMMTEMP=y +CONFIG_SENSORS_PECI_CPUPOWER=y +CONFIG_SENSORS_PECI_DIMMPOWER=y +CONFIG_SENSORS_PECI_PLATFORMPOWER=y +CONFIG_CONFIGFS_FS=y +CONFIG_BLK_DEV_RAM_SIZE=49152 +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_ASPEED_ESPI_SLAVE=y +CONFIG_ASPEED_KCS_IPMI_BMC=y +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_MQUEUE=y +CONFIG_I2C_SLAVE_MQUEUE_MESSAGE_SIZE=256 +CONFIG_I2C_SLAVE_MQUEUE_QUEUE_SIZE=32 +CONFIG_ASPEED_BT_IPMI_BMC=n +CONFIG_ASPEED_LPC_CTRL=n +CONFIG_ASPEED_LPC_MBOX=y +CONFIG_ASPEED_LPC_SIO=y +CONFIG_JTAG=y +CONFIG_JTAG_ASPEED=y +CONFIG_FRAME_VECTOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_ASPEED=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_HID=y +CONFIG_USB_GADGET=y +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_ASPEED_VHUB=y +CONFIG_USB_MASS_STORAGE=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_ASPEED_UART_ROUTING=y +CONFIG_ASPEED_VGA_SHAREDMEM=y +CONFIG_PWM=y +CONFIG_PWM_FTTMR010=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PWM_BEEPER=y +CONFIG_VFAT_FS=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_CIFS=y +CONFIG_CIFS_XATTR=y +CONFIG_PSTORE=y +CONFIG_PSTORE_ZLIB_COMPRESS=y +CONFIG_PSTORE_RAM=y +CONFIG_FSI=n +CONFIG_FSI_MASTER_HUB=n +CONFIG_FSI_MASTER_ASPEED=n +CONFIG_FSI_SCOM=n +CONFIG_FSI_SBEFIFO=n +CONFIG_FSI_OCC=n +CONFIG_ASPEED_P2A_CTRL=n +CONFIG_USB=n +CONFIG_USB_ANNOUNCE_NEW_DEVICES=n +CONFIG_USB_DYNAMIC_MINORS=n +CONFIG_USB_EHCI_HCD=n +CONFIG_USB_EHCI_ROOT_HUB_TT=n +CONFIG_USB_EHCI_HCD_PLATFORM=n +CONFIG_IPMB_DEVICE_INTERFACE=y +CONFIG_BPF_SYSCALL=n +CONFIG_IPV6_SIT=n +CONFIG_RTC_DRV_PCHC620=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend new file mode 100644 index 000000000..fb05aa1a0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -0,0 +1,21 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +LINUX_VERSION = "5.15" + +KBRANCH = "dev-5.15-intel" +KSRC = "git://github.com/Intel-BMC/linux;protocol=ssh;branch=${KBRANCH}" +# Include this as a comment only for downstream auto-bump +# SRC_URI = "git://github.com/Intel-BMC/linux;protocol=ssh;branch=dev-5.15-intel" +SRCREV="c7981259e359523e74044f926b69a804c61c86b1" + +do_compile:prepend(){ + # device tree compiler flags + export DTC_FLAGS=-@ +} + +SRC_URI += " \ + file://intel.cfg \ + " + +SRC_URI += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', 'file://1000-128MB-flashmap-for-PFR.patch', '', d)}" +SRC_URI += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'debug-tweaks', 'file://debug.cfg', '', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor.bb b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor.bb new file mode 100644 index 000000000..cdb8e2097 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor.bb @@ -0,0 +1,25 @@ +SUMMARY = "Check for host in reset to disable the NCSI iface" +DESCRIPTION = "If the host is in reset, the NCSI NIC will not be \ + available, so this will manually disable the NIC" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" + +PV = "1.0" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SRC_URI = "\ + file://check-for-host-in-reset \ + file://${BPN}.service \ + " + +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE:${PN} += "${BPN}.service" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/check-for-host-in-reset ${D}/${bindir}/check-for-host-in-reset + +} diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/check-for-host-in-reset b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/check-for-host-in-reset new file mode 100755 index 000000000..aa17aebf2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/check-for-host-in-reset @@ -0,0 +1,65 @@ +#!/bin/sh + +# PFR Boot Time Detection +# +# The Platform Firmware Recovery system is designed to confirm the server is +# running valid images. The server boot process is controlled with a +# programmable device. The programmable device prevents the system, and the +# BMC from booting until after it has confirmed the firmware images match a +# known checksum. Two reset controls are asserted while the checksum +# calculation is being performed. One prevents the BMC from booting, the other +# (RSMRST_N) prevents the main processors from leaving reset. +# +# If the BMC FW checksum is correct the BMC is allowed to boot. +# If the BIOS checksum fails the BIOS is not allowed to boot. +# In this condition the BMC will boot believing the NCSI NIC is functional. +# This will not be the case when RMSRST_N is asserted. The BIOS will not +# configure the shared NIC. The BMC will not be able to send or receive +# network traffic via the shared NIC. This becomes a problem depending on how +# the NCSI channel is configured. +# +# When the NCSI channel is configured using DHCP the BMC is unable to +# communicate to a DHCP server. Unable to acquire a valid IP state, the NCSI +# NIC is left DOWN. +# The problem that occurs is when the NIC is configured with a static +# address. The BMC is unable to determine the configuration state of the NCSI +# NIC, and behaves as if everything is working. The problem is the network +# routing table will, in most cases, be left in a state that prevents traffic +# from being sent/received from the dedicated NIC. This prevents network +# access to the BMC, which in turn leaves the system unrecoverable. +# +# The purpose of this script is to check for the assertion of the RSMRST_N +# control at BMC boot time. It will perform this test once. In the event the +# RSMRST_N is found to be asserted, the BMC will take the NCSI NIC down. No +# logic for detecting the deassertion will be performed. Once the new image +# for the BIOS has been transferred, and the checksum confirmed, the BMC will +# be reset by the programmable device. The programmable device will confirm +# the checksums, and release both the BMC and the BIOS to boot normally. +# +# Flow: +# The service will be a one-shot that waits for the network.target, as is done +# by BMCWeb. +# During a normal boot the RSMRST_N will not be asserted, and this script will +# not perform an action. +# When RSMRST_N is asserted the NCSI channel will be given a link down +# command. This regardless of static or DHCP configuration mode. + +GPIOFIND=/usr/bin/gpiofind +GPIOGET=/usr/bin/gpioget +RSMRST="RSMRST_N" + +# Read the assertion state from the RSMRST_N input +function get_rsmrst_state { + local __resultVal=$1 + local gpio_state=$($GPIOGET $($GPIOFIND "$RSMRST")) + eval $__resultVal="'$gpio_state'" + return 0 +} + +get_rsmrst_state rsmrst_val + +if [ "$rsmrst_val" -eq 0 ] +then + echo "RSMRST_N is asserted, take eth1 down" + ip link set down dev eth1 +fi diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/ncsi-monitor.service b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/ncsi-monitor.service new file mode 100644 index 000000000..19554c94d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/ncsi-monitor/ncsi-monitor.service @@ -0,0 +1,11 @@ +[Unit] +Description=Check for host in reset +After=multi-user.target + +[Service] +Type=oneshot +Restart=no +ExecStart=/usr/bin/check-for-host-in-reset + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch new file mode 100644 index 000000000..f21283a75 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch @@ -0,0 +1,412 @@ +From 145778897e36f407773844b3b96847ff10306ee8 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Thu, 2 Apr 2020 17:06:07 +0530 +Subject: [PATCH] Adding channel specific privilege to network + + - Adding the channel access information to the network + interface object. This privilege will be used in + channel specific authorization. + - Get supported priv from user manager service dynamically. + - Signal handling for capturing the supported priv list + changes from user managerment. + +Tested-by: +Verified channel access through ipmitool get/set channel +access command + +Change-Id: I3b592a19363eef684e31d5f7c34dad8f2f9211df +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +Signed-off-by: Johnathan Mantey <johnathanx.mantey@intel.com> +Signed-off-by: Ramya Narayana <ramyax.narayana@intel.com> +--- + src/ethernet_interface.cpp | 124 +++++++++++++++++++++++++++++++++++++ + src/ethernet_interface.hpp | 37 ++++++++++- + src/network_manager.cpp | 102 ++++++++++++++++++++++++++++++ + src/network_manager.hpp | 9 +++ + 4 files changed, 271 insertions(+), 1 deletion(-) + +diff --git a/src/ethernet_interface.cpp b/src/ethernet_interface.cpp +index 2e15803..1145773 100644 +--- a/src/ethernet_interface.cpp ++++ b/src/ethernet_interface.cpp +@@ -48,6 +48,10 @@ constexpr auto PROPERTY_INTERFACE = "org.freedesktop.DBus.Properties"; + constexpr auto RESOLVED_SERVICE_PATH = "/org/freedesktop/resolve1/link/"; + constexpr auto METHOD_GET = "Get"; + ++static constexpr const char* networkChannelCfgFile = ++ "/var/channel_intf_data.json"; ++static constexpr const char* defaultChannelPriv = "priv-admin"; ++ + struct EthernetIntfSocket + { + EthernetIntfSocket(int domain, int type, int protocol) +@@ -132,6 +136,7 @@ EthernetInterface::EthernetInterface(sdbusplus::bus::bus& bus, + EthernetInterfaceIntf::autoNeg(std::get<2>(ifInfo)); + EthernetInterfaceIntf::speed(std::get<0>(ifInfo)); + #endif ++ getChannelPrivilege(intfName); + + // Emit deferred signal. + if (emitSignal) +@@ -1322,5 +1327,124 @@ std::string EthernetInterface::defaultGateway6(std::string gateway) + + return gw; + } ++ ++nlohmann::json EthernetInterface::readJsonFile(const std::string& configFile) ++{ ++ std::ifstream jsonFile(configFile); ++ if (!jsonFile.good()) ++ { ++ log<level::ERR>("JSON file not found"); ++ return nullptr; ++ } ++ ++ nlohmann::json data = nullptr; ++ try ++ { ++ data = nlohmann::json::parse(jsonFile, nullptr, false); ++ } ++ catch (nlohmann::json::parse_error& e) ++ { ++ log<level::DEBUG>("Corrupted channel config.", ++ entry("MSG: %s", e.what())); ++ throw std::runtime_error("Corrupted channel config file"); ++ } ++ ++ return data; ++} ++ ++int EthernetInterface::writeJsonFile(const std::string& configFile, ++ const nlohmann::json& jsonData) ++{ ++ std::ofstream jsonFile(configFile); ++ if (!jsonFile.good()) ++ { ++ log<level::ERR>("JSON file open failed", ++ entry("FILE=%s", networkChannelCfgFile)); ++ return -1; ++ } ++ ++ // Write JSON to file ++ jsonFile << jsonData; ++ ++ jsonFile.flush(); ++ return 0; ++} ++ ++std::string ++ EthernetInterface::getChannelPrivilege(const std::string& interfaceName) ++{ ++ std::string priv(defaultChannelPriv); ++ std::string retPriv; ++ ++ nlohmann::json jsonData = readJsonFile(networkChannelCfgFile); ++ if (jsonData != nullptr) ++ { ++ try ++ { ++ priv = jsonData[interfaceName].get<std::string>(); ++ retPriv = ChannelAccessIntf::maxPrivilege(std::move(priv)); ++ return retPriv; ++ } ++ catch (const nlohmann::json::exception& e) ++ { ++ jsonData[interfaceName] = priv; ++ } ++ } ++ else ++ { ++ jsonData[interfaceName] = priv; ++ } ++ ++ if (writeJsonFile(networkChannelCfgFile, jsonData) != 0) ++ { ++ log<level::DEBUG>("Error in write JSON data to file", ++ entry("FILE=%s", networkChannelCfgFile)); ++ elog<InternalFailure>(); ++ } ++ ++ retPriv = ChannelAccessIntf::maxPrivilege(std::move(priv)); ++ ++ return retPriv; ++} ++ ++std::string EthernetInterface::maxPrivilege(std::string priv) ++{ ++ std::string intfName = interfaceName(); ++ ++ if (manager.supportedPrivList.empty()) ++ { ++ // Populate the supported privilege list ++ manager.initSupportedPrivilges(); ++ } ++ ++ if (!priv.empty() && (std::find(manager.supportedPrivList.begin(), ++ manager.supportedPrivList.end(), ++ priv) == manager.supportedPrivList.end())) ++ { ++ log<level::ERR>("Invalid privilege"); ++ elog<InvalidArgument>(Argument::ARGUMENT_NAME("Privilege"), ++ Argument::ARGUMENT_VALUE(priv.c_str())); ++ } ++ ++ if (ChannelAccessIntf::maxPrivilege() == priv) ++ { ++ // No change in privilege so just return. ++ return priv; ++ } ++ ++ nlohmann::json jsonData = readJsonFile(networkChannelCfgFile); ++ jsonData[intfName] = priv; ++ ++ if (writeJsonFile(networkChannelCfgFile, jsonData) != 0) ++ { ++ log<level::DEBUG>("Error in write JSON data to file", ++ entry("FILE=%s", networkChannelCfgFile)); ++ elog<InternalFailure>(); ++ } ++ ++ // Property change signal will be sent ++ return ChannelAccessIntf::maxPrivilege(std::move(priv)); ++} ++ + } // namespace network + } // namespace phosphor +diff --git a/src/ethernet_interface.hpp b/src/ethernet_interface.hpp +index 0fe3778..fa5c889 100644 +--- a/src/ethernet_interface.hpp ++++ b/src/ethernet_interface.hpp +@@ -2,11 +2,14 @@ + + #include "types.hpp" + #include "util.hpp" ++#include "xyz/openbmc_project/Channel/ChannelAccess/server.hpp" + #include "xyz/openbmc_project/Network/IP/Create/server.hpp" + #include "xyz/openbmc_project/Network/Neighbor/CreateStatic/server.hpp" + + #include <filesystem> ++#include <nlohmann/json.hpp> + #include <sdbusplus/bus.hpp> ++#include <sdbusplus/bus/match.hpp> + #include <sdbusplus/server/object.hpp> + #include <string> + #include <xyz/openbmc_project/Collection/DeleteAll/server.hpp> +@@ -23,7 +26,8 @@ using Ifaces = sdbusplus::server::object::object< + sdbusplus::xyz::openbmc_project::Network::server::MACAddress, + sdbusplus::xyz::openbmc_project::Network::IP::server::Create, + sdbusplus::xyz::openbmc_project::Network::Neighbor::server::CreateStatic, +- sdbusplus::xyz::openbmc_project::Collection::server::DeleteAll>; ++ sdbusplus::xyz::openbmc_project::Collection::server::DeleteAll, ++ sdbusplus::xyz::openbmc_project::Channel::server::ChannelAccess>; + + using IP = sdbusplus::xyz::openbmc_project::Network::server::IP; + +@@ -31,11 +35,14 @@ using EthernetInterfaceIntf = + sdbusplus::xyz::openbmc_project::Network::server::EthernetInterface; + using MacAddressIntf = + sdbusplus::xyz::openbmc_project::Network::server::MACAddress; ++using ChannelAccessIntf = ++ sdbusplus::xyz::openbmc_project::Channel::server::ChannelAccess; + + using ServerList = std::vector<std::string>; + using ObjectPath = sdbusplus::message::object_path; + + namespace fs = std::filesystem; ++using DbusVariant = std::variant<std::string, std::vector<std::string>>; + + class Manager; // forward declaration of network manager. + +@@ -240,6 +247,14 @@ class EthernetInterface : public Ifaces + std::string defaultGateway6(std::string gateway) override; + + using EthernetInterfaceIntf::dhcpEnabled; ++ /** @brief sets the channel maxium privilege. ++ * @param[in] value - Channel privilege which needs to be set on the ++ * system. ++ * @returns privilege of the interface or throws an error. ++ */ ++ std::string maxPrivilege(std::string value) override; ++ ++ using ChannelAccessIntf::maxPrivilege; + using EthernetInterfaceIntf::interfaceName; + using EthernetInterfaceIntf::linkUp; + using EthernetInterfaceIntf::mtu; +@@ -372,6 +387,26 @@ class EthernetInterface : public Ifaces + * @returns true/false value if the NIC is enabled + */ + bool queryNicEnabled() const; ++ ++ /** @brief gets the channel privilege. ++ * @param[in] interfaceName - Network interface name. ++ * @returns privilege of the interface ++ */ ++ std::string getChannelPrivilege(const std::string& interfaceName); ++ ++ /** @brief reads the channel access info from file. ++ * @param[in] configFile - channel access filename ++ * @returns json file data ++ */ ++ nlohmann::json readJsonFile(const std::string& configFile); ++ ++ /** @brief writes the channel access info to file. ++ * @param[in] configFile - channel access filename ++ * @param[in] jsonData - json data to write ++ * @returns success or failure ++ */ ++ int writeJsonFile(const std::string& configFile, ++ const nlohmann::json& jsonData); + }; + + } // namespace network +diff --git a/src/network_manager.cpp b/src/network_manager.cpp +index fe59f0b..01a99a3 100644 +--- a/src/network_manager.cpp ++++ b/src/network_manager.cpp +@@ -39,6 +39,13 @@ extern std::unique_ptr<Timer> refreshObjectTimer; + using namespace phosphor::logging; + using namespace sdbusplus::xyz::openbmc_project::Common::Error; + ++static constexpr const char* userMgrObjBasePath = "/xyz/openbmc_project/user"; ++static constexpr const char* userMgrInterface = ++ "xyz.openbmc_project.User.Manager"; ++static constexpr const char* propNameAllPrivileges = "AllPrivileges"; ++ ++std::unique_ptr<sdbusplus::bus::match_t> usrMgmtSignal(nullptr); ++ + Manager::Manager(sdbusplus::bus::bus& bus, const char* objPath, + const std::string& path) : + details::VLANCreateIface(bus, objPath, true), +@@ -46,6 +53,101 @@ Manager::Manager(sdbusplus::bus::bus& bus, const char* objPath, + { + fs::path confDir(path); + setConfDir(confDir); ++ initSupportedPrivilges(); ++} ++ ++std::string getUserService(sdbusplus::bus::bus& bus, const std::string& intf, ++ const std::string& path) ++{ ++ auto mapperCall = ++ bus.new_method_call("xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject"); ++ ++ mapperCall.append(path); ++ mapperCall.append(std::vector<std::string>({intf})); ++ ++ auto mapperResponseMsg = bus.call(mapperCall); ++ ++ std::map<std::string, std::vector<std::string>> mapperResponse; ++ mapperResponseMsg.read(mapperResponse); ++ ++ if (mapperResponse.begin() == mapperResponse.end()) ++ { ++ throw std::runtime_error("ERROR in reading the mapper response"); ++ } ++ ++ return mapperResponse.begin()->first; ++} ++ ++std::string Manager::getUserServiceName() ++{ ++ static std::string userMgmtService; ++ if (userMgmtService.empty()) ++ { ++ try ++ { ++ userMgmtService = ++ getUserService(bus, userMgrInterface, userMgrObjBasePath); ++ } ++ catch (const std::exception& e) ++ { ++ log<level::ERR>("Exception caught in getUserServiceName."); ++ userMgmtService.clear(); ++ } ++ } ++ return userMgmtService; ++} ++ ++void Manager::initSupportedPrivilges() ++{ ++ std::string userServiceName = getUserServiceName(); ++ if (!userServiceName.empty()) ++ { ++ auto method = bus.new_method_call( ++ getUserServiceName().c_str(), userMgrObjBasePath, ++ "org.freedesktop.DBus.Properties", "Get"); ++ method.append(userMgrInterface, propNameAllPrivileges); ++ ++ auto reply = bus.call(method); ++ if (reply.is_method_error()) ++ { ++ log<level::DEBUG>("get-property AllPrivileges failed", ++ entry("OBJPATH:%s", userMgrObjBasePath), ++ entry("INTERFACE:%s", userMgrInterface)); ++ return; ++ } ++ ++ std::variant<std::vector<std::string>> result; ++ reply.read(result); ++ ++ supportedPrivList = std::get<std::vector<std::string>>(result); ++ } ++ ++ // Resgister the signal ++ if (usrMgmtSignal == nullptr) ++ { ++ log<level::DEBUG>("Registering User.Manager propertychange signal."); ++ usrMgmtSignal = std::make_unique<sdbusplus::bus::match_t>( ++ bus, ++ sdbusplus::bus::match::rules::propertiesChanged(userMgrObjBasePath, ++ userMgrInterface), ++ [&](sdbusplus::message::message& msg) { ++ log<level::DEBUG>("UserMgr properties changed signal"); ++ std::map<std::string, DbusVariant> props; ++ std::string iface; ++ msg.read(iface, props); ++ for (const auto& t : props) ++ { ++ if (t.first == propNameAllPrivileges) ++ { ++ supportedPrivList = ++ std::get<std::vector<std::string>>(t.second); ++ } ++ } ++ }); ++ } ++ return; + } + + bool Manager::createDefaultNetworkFiles(bool force) +diff --git a/src/network_manager.hpp b/src/network_manager.hpp +index fb3cc32..0c3d49b 100644 +--- a/src/network_manager.hpp ++++ b/src/network_manager.hpp +@@ -156,6 +156,12 @@ class Manager : public details::VLANCreateIface + return routeTable; + } + ++ /** supported privilege list **/ ++ std::vector<std::string> supportedPrivList; ++ ++ /** @brief initializes the supportedPrivilege List */ ++ void initSupportedPrivilges(); ++ + protected: + /** @brief Persistent sdbusplus DBus bus connection. */ + sdbusplus::bus::bus& bus; +@@ -181,6 +187,9 @@ class Manager : public details::VLANCreateIface + + /** @brief The routing table */ + route::Table routeTable; ++ ++ /** Get the user management service name dynamically **/ ++ std::string getUserServiceName(); + }; + + } // namespace network +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0004-Fix-for-updating-MAC-address-from-RedFish.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0004-Fix-for-updating-MAC-address-from-RedFish.patch new file mode 100644 index 000000000..90bbc1d5b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0004-Fix-for-updating-MAC-address-from-RedFish.patch @@ -0,0 +1,109 @@ +From cbd034daf844529eb7f098c990dc8f44c12f6b97 Mon Sep 17 00:00:00 2001 +From: sunitakx <sunitax.kumari@linux.intel.com> +Date: Tue, 13 Jul 2021 12:54:01 +0000 +Subject: [PATCH] Fix for updating MAC address from RedFish + +Issue: When IP address source for an interface is DHCP and its MAC +address is patched using RedFish, response code is not reaching the +RedFish request initiator (client). + +RootCause: After bmcweb patches the MAC address, immediately IP address +of that interface also changes to new value (because of DHCP). +Due to this, success response from bmcweb is not reaching the client as +expected. + +Fix: Do MAC-ADDR patching after validating the request and responding +"200 OK" to RedFish client. i.e Start a timer which will modify the +MAC-ADDR at the end of its expiry. + +Tested: +Update the MAC address from RedFish. +PATCH: https://<bmc_ip>/redfish/v1/Managers/bmc/EthernetInterfaces/eth0 +Body: + {"MACAddress": "xx:xx:xx:xx:xx:xx"} + +Response code: {"200 OK"} received. + +Signed-off-by: sunitakx <sunitax.kumari@linux.intel.com> +Signed-off-by: Ramya Narayana <ramyax.narayana@intel.com> +--- + src/ethernet_interface.cpp | 17 ++++++++++++----- + src/ethernet_interface.hpp | 5 +++++ + 2 files changed, 17 insertions(+), 5 deletions(-) + +diff --git a/src/ethernet_interface.cpp b/src/ethernet_interface.cpp +index 1145773..129905e 100644 +--- a/src/ethernet_interface.cpp ++++ b/src/ethernet_interface.cpp +@@ -143,6 +143,8 @@ EthernetInterface::EthernetInterface(sdbusplus::bus::bus& bus, + { + this->emit_object_added(); + } ++ macUpdateTimer = std::make_unique<phosphor::Timer>( ++ [this](void) { macAddressTimeoutHandler(); }); + } + + static IP::Protocol convertFamily(int family) +@@ -1209,8 +1211,17 @@ void EthernetInterface::writeDHCPSection(std::fstream& stream) + } + } + ++void EthernetInterface::macAddressTimeoutHandler() ++{ ++ macUpdateTimer->stop(); ++ // The MAC and LLADDRs will only update if the NIC is already down ++ EthernetIntfSocket eifSocket(PF_INET, SOCK_DGRAM, IPPROTO_IP); ++ setNICAdminState(eifSocket.sock, interfaceName().c_str(), false); ++ manager.reloadConfigs(); ++} + std::string EthernetInterface::macAddress(std::string value) + { ++ std::chrono::seconds usec(defaultTimeout); + ether_addr newMAC; + try + { +@@ -1244,12 +1255,8 @@ std::string EthernetInterface::macAddress(std::string value) + intf->MacAddressIntf::macAddress(validMAC); + } + MacAddressIntf::macAddress(validMAC); +- ++ macUpdateTimer->start(usec); + writeConfigurationFile(); +- // The MAC and LLADDRs will only update if the NIC is already down +- EthernetIntfSocket eifSocket(PF_INET, SOCK_DGRAM, IPPROTO_IP); +- setNICAdminState(eifSocket.sock, interface.c_str(), false); +- manager.reloadConfigs(); + } + + #ifdef HAVE_UBOOT_ENV +diff --git a/src/ethernet_interface.hpp b/src/ethernet_interface.hpp +index fa5c889..70f4756 100644 +--- a/src/ethernet_interface.hpp ++++ b/src/ethernet_interface.hpp +@@ -11,11 +11,14 @@ + #include <sdbusplus/bus.hpp> + #include <sdbusplus/bus/match.hpp> + #include <sdbusplus/server/object.hpp> ++#include <sdbusplus/timer.hpp> + #include <string> + #include <xyz/openbmc_project/Collection/DeleteAll/server.hpp> + #include <xyz/openbmc_project/Network/EthernetInterface/server.hpp> + #include <xyz/openbmc_project/Network/MACAddress/server.hpp> + ++static constexpr const uint32_t defaultTimeout = 1; ++ + namespace phosphor + { + namespace network +@@ -84,6 +87,8 @@ class EthernetInterface : public Ifaces + EthernetInterface& operator=(EthernetInterface&&) = delete; + virtual ~EthernetInterface() = default; + ++ std::unique_ptr<phosphor::Timer> macUpdateTimer; ++ void macAddressTimeoutHandler(); + /** @brief Constructor to put object onto bus at a dbus path. + * @param[in] bus - Bus to attach to. + * @param[in] objPath - Path to attach at. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend new file mode 100644 index 000000000..4828c9ea0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend @@ -0,0 +1,13 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += "nlohmann-json boost" + +SRC_URI = "git://github.com/openbmc/phosphor-networkd" +SRCREV = "ee2cba8a7d22ef4a251181087e9ef9bfc5c4b165" + +SRC_URI += " file://0003-Adding-channel-specific-privilege-to-network.patch \ + file://0004-Fix-for-updating-MAC-address-from-RedFish.patch \ + " + +EXTRA_OECONF:append = " --enable-nic-ethtool=yes" +EXTRA_OECONF:append = " --enable-ipv6-accept-ra=yes" diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb new file mode 100644 index 000000000..ee55c5407 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr.bb @@ -0,0 +1,24 @@ +SUMMARY = "Enforce static MAC addresses" +DESCRIPTION = "Set a priority on MAC addresses to run with: \ + factory-specified > u-boot-specified > random" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +PV = "1.0" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SRC_URI = "\ + file://mac-check \ + file://${PN}.service \ + " + +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE:${PN} += "${PN}.service" + +do_install() { + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/mac-check ${D}${bindir} +} diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check new file mode 100644 index 000000000..39d7dd8a7 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/mac-check @@ -0,0 +1,161 @@ +#!/bin/sh +# Copyright 2018 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +SOFS_MNT=/var/sofs +SOFS_MACDIR=${SOFS_MNT}/factory-settings/network/mac + +read_hw_mac() { + local iface="$1" + cat /sys/class/net/"$iface"/address 2>/dev/null | tr [:upper:] [:lower:] 2>/dev/null +} + +set_hw_mac() { + local iface="$1" + local mac="$2" + ip link show dev "$iface" | grep -q "${iface}:.*\<UP\>" 2>/dev/null + local up=$? + [[ $up -eq 0 ]] && ip link set dev "$iface" down + ip link set dev "$iface" address "$mac" + [[ $up -eq 0 ]] && ip link set dev "$iface" up +} + +read_sofs_mac() { + local iface="$1" + cat "${SOFS_MACDIR}/${iface}" 2>/dev/null | tr [:upper:] [:lower:] 2>/dev/null +} + +read_fw_env_mac() { + local envname="$1" + fw_printenv "$envname" 2>/dev/null | sed "s/^$envname=//" 2>/dev/null | tr [:upper:] [:lower:] 2>/dev/null +} + +set_fw_env_mac() { + local envname="$1" + local mac="$2" + fw_setenv "$envname" "$mac" +} + +create_macdir() { +if [ -a ${SOFS_MACDIR} ]; then + if [ ! -d ${SOFS_MACDIR} ]; then + rm -rf ${SOFS_MACDIR} + mkdir -p ${SOFS_MACDIR} + fi +else + mkdir -p ${SOFS_MACDIR} +fi +return 0 +} + +# An earlier version of the mac_check utility disabled the netipmid for +# eth1. This was done to eliminate an error message being logged in the +# journal for systems that only had a single NIC. The error message is +# undesirable as it is present in Redfish session log output. + +# Systems that have both NICs have also had the eth1 netipmid disabled. +# The reason for this is failing to specify the correct kernel device +# tree during the U-Boot kernel boot process. Without the correct +# device tree, eth1 is not enumerated by the kernel. The mac-check +# script turned off the netipmid service for eth1. + +# The configure_netipmid_svc_eth1 function manages enabling and +# disabling netipmid for eth1. It is explicit, and does not rely upon +# previous state to enable or disable the service. + +# Note: Enabling the service is independent of the IPMI channel +# enable/disable command. This means "ipmitool lan set <chid> access +# off" functions correctly with the netipmid service enabled. +configure_netipmid_svc_eth1() { + if [ -h /sys/class/net/eth1 ]; then + if [ $(systemctl is-enabled phosphor-ipmi-net@eth1.socket) == "disabled" ]; + then + /bin/systemctl enable "phosphor-ipmi-net@eth1.socket" + /bin/systemctl start "phosphor-ipmi-net@eth1.socket" + fi + if [ $(systemctl is-enabled phosphor-ipmi-net@eth1.service) =="disabled" ]; + then + /bin/systemctl enable "phosphor-ipmi-net@eth1.service" + /bin/systemctl start "phosphor-ipmi-net@eth1.service" + fi + else + if [ $(systemctl is-enabled phosphor-ipmi-net@eth1.socket) == "enabled" ]; + then + /bin/systemctl disable "phosphor-ipmi-net@eth1.socket" + /bin/systemctl stop "phosphor-ipmi-net@eth1.socket" + fi + if [ $(systemctl is-enabled phosphor-ipmi-net@eth1.service) == "enabled" ]; + then + /bin/systemctl disable "phosphor-ipmi-net@eth1.service" + /bin/systemctl stop "phosphor-ipmi-net@eth1.service" + fi + fi +} + +mac_check() { + local iface="$1" + local envname="$2" + + # Read the MAC address in use by the NIC + local hw_mac=$(read_hw_mac "$iface") + + # Read the MAC address stored in the non-volatile file provisioned in + # manufacturing. + local sofs_mac=$(read_sofs_mac "$iface") + + if [ -n "$sofs_mac" ] && [ "$hw_mac" != "$sofs_mac" ]; then + # A factory assigned address was found, and it is newly assigned. + # Update the active interface and save the new value to the u-boot + # environment. + set_hw_mac "$iface" "$sofs_mac" + set_fw_env_mac "$envname" "$sofs_mac" + return $? + elif [ -n "$hw_mac" ]; then + # Read the MAC address stored by U-Boot + local fw_env_mac=$(read_fw_env_mac "$envname") + if [ -z "$fw_env_mac" ] || [ "$fw_env_mac" != "$hw_mac" ]; then + set_fw_env_mac "$envname" "$hw_mac" + return $? + fi + else + # Could not identify a MAC address + return 255 + fi + return 0 +} + +create_macdir + +configure_netipmid_svc_eth1 + +error=0 +first_error_seen=0 + +while read IFACE UBDEV; do + # Try to configure the MAC address if the kernel finds the NIC. Blindly + # trying all of the interfaces listed in the DOCSTRING (END_CONF) below + # may result in first_error_seen being set to a non-zero value. If that + # happens the journal log will report the error, which is undesirable. + if [ -h /sys/class/net/$IFACE ]; then + mac_check "$IFACE" "$UBDEV" + error=$? + if [ $error -ne 0 ] && [ $first_error_seen -eq 0 ]; then + first_error_seen=$error + fi + fi +done <<-END_CONF + eth0 eth1addr + eth1 ethaddr +END_CONF +exit $first_error_seen diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service new file mode 100644 index 000000000..86371db11 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-network/network/static-mac-addr/static-mac-addr.service @@ -0,0 +1,11 @@ +[Unit] +Description=Enforce Static MAC addr mapping + +[Service] +Type=oneshot +Restart=no +ExecStart=/usr/bin/mac-check + +[Install] +WantedBy=network.target + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/beepcode-mgr.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/beepcode-mgr.bb new file mode 100644 index 000000000..f24f69a5f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/beepcode-mgr.bb @@ -0,0 +1,23 @@ + +SUMMARY = "Beep code manager service" +DESCRIPTION = "The beep code manager service will provide a method for beep code" + +SRC_URI = "\ + file://CMakeLists.txt;subdir=${BP} \ + file://beepcode_mgr.cpp;subdir=${BP} \ + " +PV = "0.1" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SYSTEMD_SERVICE:${PN} = "beepcode-mgr.service" + +inherit cmake +inherit obmc-phosphor-systemd + +DEPENDS += " \ + sdbusplus \ + phosphor-logging \ + boost \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/.clang-format b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/.clang-format new file mode 100644 index 000000000..dd2770837 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/.clang-format @@ -0,0 +1,98 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: false +AlignOperands: true +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: false +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: true +PointerAlignment: Left +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 5 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.hpp"' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 2 + - Regex: '^<.*' + Priority: 3 + - Regex: '.*' + Priority: 4 +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +KeepEmptyLinesAtTheStartOfBlocks: true +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +PointerAlignment: Right +ReflowComments: true +SortIncludes: true +SpaceAfterCStyleCast: false +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp11 +TabWidth: 4 +UseTab: Never +... diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/CMakeLists.txt new file mode 100644 index 000000000..472257279 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/CMakeLists.txt @@ -0,0 +1,39 @@ +cmake_minimum_required (VERSION 3.5 FATAL_ERROR) +project (beepcode-mgr CXX) +set (CMAKE_CXX_STANDARD 17) +set (CMAKE_CXX_STANDARD_REQUIRED ON) +set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-rtti") +set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-rtti") + +include_directories (${CMAKE_CURRENT_SOURCE_DIR}) + +# boost support +find_package (Boost REQUIRED) +# pkg_check_modules(Boost boost REQUIRED) +include_directories (${Boost_INCLUDE_DIRS}) +add_definitions (-DBOOST_ERROR_CODE_HEADER_ONLY) +add_definitions (-DBOOST_SYSTEM_NO_DEPRECATED) +add_definitions (-DBOOST_ALL_NO_LIB) +add_definitions (-DBOOST_NO_RTTI) +add_definitions (-DBOOST_NO_TYPEID) +add_definitions (-DBOOST_ASIO_DISABLE_THREADS) + +# import sdbusplus +find_package (PkgConfig REQUIRED) +pkg_check_modules (SDBUSPLUSPLUS sdbusplus REQUIRED) +include_directories (${SDBUSPLUSPLUS_INCLUDE_DIRS}) +link_directories (${SDBUSPLUSPLUS_LIBRARY_DIRS}) + +# import phosphor-logging +find_package (PkgConfig REQUIRED) +pkg_check_modules (LOGGING phosphor-logging REQUIRED) +include_directories (${LOGGING_INCLUDE_DIRS}) +link_directories (${LOGGING_LIBRARY_DIRS}) + +add_executable (beepcode-mgr beepcode_mgr.cpp) + +target_link_libraries (${PROJECT_NAME} ${Boost_LIBRARIES}) +target_link_libraries (${PROJECT_NAME} ${SDBUSPLUSPLUS_LIBRARIES} + phosphor_logging) + +install (TARGETS beepcode-mgr DESTINATION bin) diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode-mgr.service b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode-mgr.service new file mode 100644 index 000000000..8099e2541 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode-mgr.service @@ -0,0 +1,12 @@ +[Unit] +Description=Beep code manager + +[Service] +Restart=always +RestartSec=2 +ExecStart=/usr/bin/beepcode-mgr +StartLimitInterval=0 +Type=simple + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode_mgr.cpp b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode_mgr.cpp new file mode 100644 index 000000000..5a2deceaf --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/beepcode_mgr.cpp @@ -0,0 +1,321 @@ +/* Copyright 2019 Intel + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <fcntl.h> +#include <linux/input.h> + +#include <boost/asio/io_service.hpp> +#include <boost/asio/steady_timer.hpp> +#include <boost/date_time/posix_time/posix_time.hpp> +#include <chrono> +#include <iostream> +#include <phosphor-logging/log.hpp> +#include <sdbusplus/asio/object_server.hpp> + +static constexpr uint32_t defaultBeepFrequence = 2000; +static constexpr uint32_t defaultBeepDurationMs = 300; +// Duration between two beeps +static constexpr uint32_t defaultInterBeepDurationMs = 300; +// Duration between two 4-bit digitals +static constexpr uint32_t defaultInterDigitBeepDurationMs = 800; +// Duration between two patterns +static constexpr uint32_t defaultPostBeepDurationMs = 1000; + +static constexpr uint8_t offBeepState = 0; +static constexpr uint8_t onBeepState = 1; +// finish 1 bit beep +static constexpr uint8_t interBeepState = 2; +// finish 4 bits beep +static constexpr uint8_t interDigitBeepState = 3; +// finish all bits beep +static constexpr uint8_t postBeepState = 4; + +static const std::vector<uint32_t> beepDelayTable = { + 0, defaultBeepDurationMs, defaultInterBeepDurationMs, + defaultInterDigitBeepDurationMs, defaultPostBeepDurationMs}; + +static constexpr uint32_t bpBitCount = 4; +static constexpr uint32_t bpShiftCount = 32; +static constexpr uint32_t bpMask = 0xf0000000; + +// beep code priority +static constexpr uint8_t beepOff = 0; +static constexpr uint8_t beepVRWatchdogTimeout = 1; +static constexpr uint8_t beepPSUFailure = 2; +static constexpr uint8_t beepCPUMIssing = 3; +static constexpr uint8_t beepCPUCatError = 4; +static constexpr uint8_t beepCPUErr2 = 5; +static constexpr uint8_t beepVoltageMismatch = 6; +static constexpr uint8_t beepCPUConfigError = 7; +static constexpr uint8_t beepPowerFail = 8; +static constexpr uint8_t beepPowerGoodTimeOut = 9; +static constexpr uint8_t beepMax = 10; + +// priority, abbrev name map +static const std::map<uint8_t, std::string> beepCodeNameList = { + {beepVRWatchdogTimeout, "VRWatchdogTimeout"}, + {beepPSUFailure, "PSUFailure"}, + {beepCPUMIssing, "CPUMissing"}, + {beepCPUCatError, "CPUCatError"}, + {beepCPUErr2, "CPUErr2"}, + {beepVoltageMismatch, "VoltageMismatch"}, + {beepCPUConfigError, "CPUConfigError"}, + {beepPowerFail, "PowerFail"}, + {beepPowerGoodTimeOut, "PowerGoodTimeOut"}, +}; + +// priority, code pattern map +static const std::map<uint8_t, std::string> beepCodePatternList = { + {beepVRWatchdogTimeout, "1-5-1-2"}, {beepPSUFailure, "1-5-1-4"}, + {beepCPUMIssing, "1-5-2-1"}, {beepCPUCatError, "1-5-2-2"}, + {beepCPUErr2, "1-5-2-3"}, {beepVoltageMismatch, "1-5-2-4"}, + {beepCPUConfigError, "1-5-2-5"}, {beepPowerFail, "1-5-4-2"}, + {beepPowerGoodTimeOut, "1-5-4-4"}, +}; + +static const std::vector<uint32_t> beepCodeTable = { + 0, 0x1512, 0x1514, 0x1521, 0x1522, 0x1523, 0x1524, 0x1525, 0x1542, 0x1544}; + +static constexpr char bpDevName[] = "/dev/input/event0"; +static constexpr char bpBusName[] = "xyz.openbmc_project.BeepCode"; +static constexpr char bpObjName[] = "/xyz/openbmc_project/BeepCode"; +static constexpr char bpIntfName[] = "xyz.openbmc_project.BeepCode"; +static constexpr char bpMethodName[] = "Beep"; + +static std::shared_ptr<sdbusplus::asio::dbus_interface> bpIface; +static boost::asio::io_service io; +static auto conn = std::make_shared<sdbusplus::asio::connection>(io); + +class Beeper +{ + public: + Beeper(boost::asio::io_service& io) + { + timer = std::make_unique<boost::asio::steady_timer>(io); + fdBeepDev = -1; + currentCount = 0; + currentBeepCode = 0; + currentMask = bpMask; + currentShift = bpShiftCount; + currentState = offBeepState; + timerRunning = false; + } + + ~Beeper() + { + } + + void beep(const uint8_t& beepPriority) + { + if (timerRunning) + { + pendingList.push_back(beepPriority); + pendingList.sort(std::greater<uint8_t>()); + return; + } + + performBeep(beepPriority); + } + + private: + void performBeep(const uint8_t& beepPriority) + { + currentBeepCode = beepCodeTable[beepPriority]; + currentCount = 0; + currentMask = bpMask; + currentShift = bpShiftCount; + getCurrentCount(); + startBeep(defaultBeepFrequence); + currentState = onBeepState; + currentCount--; + timerRunning = true; + startBeepTimer(); + } + + void startBeepTimer() + { + timer->expires_after( + std::chrono::milliseconds(beepDelayTable[currentState])); + timer->async_wait([this](const boost::system::error_code& ec) { + // timer timeout + switch (currentState) + { + case onBeepState: + stopBeep(); + if (currentCount == 0) + { + // finished the current 4-bit + if (currentBeepCode == 0) + { + // finished all bits + currentState = postBeepState; + } + else + { + // start next 4-bit + currentState = interDigitBeepState; + getCurrentCount(); + currentCount--; + } + } + else + { + // still in 4-bit processing + currentCount--; + currentState = interBeepState; + } + startBeepTimer(); + break; + + case interBeepState: + case interDigitBeepState: + startBeep(defaultBeepFrequence); + currentState = onBeepState; + startBeepTimer(); + break; + case postBeepState: + if (pendingList.size() != 0) + { + // continue the next new beepcode + uint8_t beepPriority = pendingList.front(); + pendingList.pop_front(); + performBeep(beepPriority); + } + else + { + timerRunning = false; + } + break; + + default: + std::cerr << "Incorrect beepState: " + << static_cast<unsigned int>(currentState) + << std::endl; + break; + } + }); + } + + void startBeep(uint32_t freq) + { + if (fdBeepDev != -1) + { + std::cerr << "beep device is opening already!" << std::endl; + ::close(fdBeepDev); + fdBeepDev = -1; + } + + if ((fdBeepDev = ::open(bpDevName, O_RDWR | O_CLOEXEC)) < 0) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Failed to open input device"); + return; + } + + struct input_event event; + event.type = EV_SND; + event.code = SND_TONE; + event.value = freq; + + if (::write(fdBeepDev, &event, sizeof(struct input_event)) != + sizeof(struct input_event)) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Failed to write a tone sound event"); + ::close(fdBeepDev); + fdBeepDev = -1; + return; + } + return; + } + + void stopBeep() + { + if (fdBeepDev == -1) + { + std::cerr << "beep device is closed!" << std::endl; + return; + } + + ::close(fdBeepDev); + fdBeepDev = -1; + } + + // Split the beep code based on bpBitCount, for example 0x1544, + // currentCount=1, 5, 4, 4 + void getCurrentCount() + { + while (currentCount == 0) + { + currentCount = currentMask & currentBeepCode; + currentShift -= bpBitCount; + currentCount >>= currentShift; + currentBeepCode = currentBeepCode & ~currentMask; + currentMask >>= bpBitCount; + if (currentMask == 0) + { + break; + } + } + } + + int fdBeepDev; + bool timerRunning; + uint32_t currentCount; + uint32_t currentBeepCode; + uint32_t currentMask; + uint32_t currentShift; + uint8_t currentState; + std::unique_ptr<boost::asio::steady_timer> timer; + std::list<uint8_t> pendingList; +}; + +static Beeper beeper(io); + +// dbus method +static void beep(const uint8_t& beepPriority) +{ + if ((beepPriority >= beepMax) || (beepPriority == beepOff)) + { + std::cerr << "Incorrect input: " + << static_cast<unsigned int>(beepPriority) << std::endl; + return; + } + + beeper.beep(beepPriority); + + return; +} + +int main(int argc, char** argv) +{ + phosphor::logging::log<phosphor::logging::level::INFO>( + "Starting BeepCode service"); + + conn->request_name(bpBusName); + sdbusplus::asio::object_server server = + sdbusplus::asio::object_server(conn); + bpIface = server.add_interface(bpObjName, bpIntfName); + + bpIface->register_property("BeepCodeNameList", beepCodeNameList, + sdbusplus::asio::PropertyPermission::readOnly); + bpIface->register_property("BeepCodePatternList", beepCodePatternList, + sdbusplus::asio::PropertyPermission::readOnly); + bpIface->register_method(bpMethodName, beep); + bpIface->initialize(); + + io.run(); + return 0; +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/cmake-format.json b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/cmake-format.json new file mode 100644 index 000000000..583c255a3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/beepcode-mgr/files/cmake-format.json @@ -0,0 +1,12 @@ +{ + "enum_char": ".", + "line_ending": "unix", + "bullet_char": "*", + "max_subargs_per_line": 99, + "command_case": "lower", + "tab_size": 4, + "line_width": 80, + "separate_fn_name_with_space": true, + "dangle_parens": true, + "separate_ctrl_name_with_space": true +}
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/biosconfig-manager/biosconfig-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/biosconfig-manager/biosconfig-manager_git.bb new file mode 100644 index 000000000..711e4eced --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/biosconfig-manager/biosconfig-manager_git.bb @@ -0,0 +1,28 @@ +SUMMARY = "BIOS Config Manager daemon for managing the BIOS configuration" +DESCRIPTION = "To view and modify BIOS setup configuration remotely via BMC" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +inherit meson systemd + +SRC_URI = "git://github.com/openbmc/bios-settings-mgr.git" +SRCREV = "29656f07b7e81c0bb13ca119b4c6ef62f5e79a18" + +SYSTEMD_SERVICE:${PN} += " \ + xyz.openbmc_project.biosconfig_manager.service \ + xyz.openbmc_project.biosconfig_password.service \ + " + +DEPENDS += " \ + systemd \ + sdbusplus \ + libgpiod \ + phosphor-logging \ + boost \ + nlohmann-json \ + libtinyxml2 \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Improve-initialization-of-I2C-sensors.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Improve-initialization-of-I2C-sensors.patch new file mode 100644 index 000000000..e47111c56 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0001-Improve-initialization-of-I2C-sensors.patch @@ -0,0 +1,493 @@ +From a85d4c9cf702965593ec771e57a975e30d1d5853 Mon Sep 17 00:00:00 2001 +From: Johnathan Mantey <johnathanx.mantey@intel.com> +Date: Tue, 13 Oct 2020 15:00:51 -0700 +Subject: [PATCH] Improve initialization of I2C sensors + +After an AC cycle validation has witnessed some systems sensors are +missing. As Entity Manager begins the process of scanning for +sesnsors, and creating the hardware monitoring nodes, there are +occassionally some failures to correctly create the node. This +manifests itself by the 'dd' kernel driver emitting an -EBUSY error +message. Unfortunately the 'dd' driver also eats the error code, and +continues. This is by design. + +This commit modifies how the nodes are initialized. The steps taken: +1. Determine if the node is already present +2. Create the node if it is not +3. Set a timer, to give the kernel time to create the node +4. For those sensors that create a "hwmon" subdir, search for that +directory after the timer elapses. +5. If the subdir is not present, delete the device, and try again by +initiating another timer. +6. Continue until the subdir exists, or a retry count expires. + +Tested: +Ran AC cycles via a script. +After each cycle, wait for the SUT to DC on, and arrive at the EFI +Shell> propmt. +Issue "ipmitool sensor list", capturing the results +Search the list for all of the sensors that have been reported as +missing after AC cycles. + +Change-Id: I118df674162677d66e7d211b089430fce384086b +Signed-off-by: Johnathan Mantey <johnathanx.mantey@intel.com> +--- + include/devices.hpp | 167 +++++++++++++++++++++----------------- + src/Overlay.cpp | 192 ++++++++++++++++++++++++++++++++++---------- + 2 files changed, 243 insertions(+), 116 deletions(-) + +diff --git a/include/devices.hpp b/include/devices.hpp +index 50fbe63..2e299a0 100644 +--- a/include/devices.hpp ++++ b/include/devices.hpp +@@ -31,107 +31,130 @@ struct CmpStr + + struct ExportTemplate + { +- ExportTemplate(const char* params, const char* dev) : +- parameters(params), device(dev){}; ++ ExportTemplate(const char* params, const char* dev, const char* constructor, ++ const char* destructor, bool createsHWMon) : ++ parameters(params), ++ devicePath(dev), add(constructor), remove(destructor), ++ createsHWMon(createsHWMon){}; + const char* parameters; +- const char* device; ++ const char* devicePath; ++ const char* add; ++ const char* remove; ++ bool createsHWMon; + }; + + const boost::container::flat_map<const char*, ExportTemplate, CmpStr> + exportTemplates{ + {{"EEPROM_24C02", + ExportTemplate("24c02 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ "/sys/bus/i2c/devices/i2c-$Bus/new_device", ++ "new_device", "delete_device", false)}, + {"EEPROM_24C64", + ExportTemplate("24c64 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"ADM1266", +- ExportTemplate("adm1266 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ "/sys/bus/i2c/devices/i2c-$Bus/new_device", ++ "new_device", "delete_device", false)}, ++ {"24C02", ++ ExportTemplate("24c02 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, ++ {"24C64", ++ ExportTemplate("24c64 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, ++ {"ADM1266", ExportTemplate("adm1266 $Address", ++ "/sys/bus/i2c/devices/i2c-$Bus/new_device", ++ "new_device", "delete_device", false)}, + {"ADM1272", +- ExportTemplate("adm1272 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"EEPROM", ExportTemplate("eeprom $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("adm1272 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, ++ {"EEPROM", ++ ExportTemplate("eeprom $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, + {"EMC1412", +- ExportTemplate("emc1412 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("emc1412 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"EMC1413", +- ExportTemplate("emc1413 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("emc1413 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"EMC1414", +- ExportTemplate("emc1414 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"Gpio", ExportTemplate("$Index", "/sys/class/gpio/export")}, +- {"INA230", ExportTemplate("ina230 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("emc1414 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"Gpio", ExportTemplate("$Index", "/sys/class/gpio", "export", ++ "unexport", false)}, ++ {"INA230", ++ ExportTemplate("ina230 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"ISL68137", +- ExportTemplate("isl68137 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("isl68137 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"ISL68223", +- ExportTemplate("isl68223 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("isl68223 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"ISL69243", +- ExportTemplate("isl69243 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("isl69243 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX16601", +- ExportTemplate("max16601 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max16601 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX20710", +- ExportTemplate("max20710 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max20710 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX20730", +- ExportTemplate("max20730 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max20730 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX20734", +- ExportTemplate("max20734 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max20734 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX20796", +- ExportTemplate("max20796 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max20796 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX31725", +- ExportTemplate("max31725 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max31725 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX31730", +- ExportTemplate("max31730 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"MAX34440", +- ExportTemplate("max34440 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max31730 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"MAX34440", ExportTemplate("max34440 $Address", ++ "/sys/bus/i2c/devices/i2c-$Bus/new_device", ++ "new_device", "delete_device", true)}, + {"MAX34451", +- ExportTemplate("max34451 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max34451 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"MAX6654", +- ExportTemplate("max6654 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("max6654 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"PCA9543Mux", +- ExportTemplate("pca9543 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("pca9543 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, + {"PCA9544Mux", +- ExportTemplate("pca9544 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("pca9544 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, + {"PCA9545Mux", +- ExportTemplate("pca9545 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("pca9545 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, + {"PCA9546Mux", +- ExportTemplate("pca9546 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("pca9546 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, + {"PCA9547Mux", +- ExportTemplate("pca9547 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"SBTSI", ExportTemplate("sbtsi $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"pmbus", ExportTemplate("pmbus $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"TMP112", ExportTemplate("tmp112 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"TMP175", ExportTemplate("tmp175 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"TMP421", ExportTemplate("tmp421 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, +- {"TMP441", ExportTemplate("tmp441 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}, ++ ExportTemplate("pca9547 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", false)}, ++ {"SBTSI", ++ ExportTemplate("sbtsi $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"pmbus", ++ ExportTemplate("pmbus $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"TMP112", ++ ExportTemplate("tmp112 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"TMP175", ++ ExportTemplate("tmp175 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"TMP421", ++ ExportTemplate("tmp421 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, ++ {"TMP441", ++ ExportTemplate("tmp441 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}, + {"TMP75", +- ExportTemplate("tmp75 $Address", +- "/sys/bus/i2c/devices/i2c-$Bus/new_device")}}}; ++ ExportTemplate("tmp75 $Address", "/sys/bus/i2c/devices/i2c-$Bus", ++ "new_device", "delete_device", true)}}}; + } // namespace devices +diff --git a/src/Overlay.cpp b/src/Overlay.cpp +index cb6ed10..7a3089e 100644 +--- a/src/Overlay.cpp ++++ b/src/Overlay.cpp +@@ -21,6 +21,8 @@ + #include "devices.hpp" + + #include <boost/algorithm/string/predicate.hpp> ++#include <boost/asio/io_context.hpp> ++#include <boost/asio/steady_timer.hpp> + #include <boost/container/flat_map.hpp> + #include <boost/container/flat_set.hpp> + #include <boost/process/child.hpp> +@@ -32,6 +34,8 @@ + #include <regex> + #include <string> + ++extern boost::asio::io_context io; ++ + constexpr const char* OUTPUT_DIR = "/tmp/overlays"; + constexpr const char* TEMPLATE_CHAR = "$"; + constexpr const char* HEX_FORMAT_STR = "0x"; +@@ -113,16 +117,149 @@ void linkMux(const std::string& muxName, size_t busIndex, size_t address, + } + } + ++static int deleteDevice(const std::string& devicePath, ++ std::shared_ptr<uint64_t> address, ++ const std::string& destructor) ++{ ++ if (!address) ++ { ++ return -1; ++ } ++ std::filesystem::path deviceDestructor(devicePath); ++ deviceDestructor /= destructor; ++ std::ofstream deviceFile(deviceDestructor); ++ if (!deviceFile.good()) ++ { ++ std::cerr << "Error writing " << deviceDestructor << "\n"; ++ return -1; ++ } ++ deviceFile << std::to_string(*address); ++ deviceFile.close(); ++ return 0; ++} ++ ++static int createDevice(const std::string& devicePath, ++ const std::string& parameters, ++ const std::string& constructor) ++{ ++ std::filesystem::path deviceConstructor(devicePath); ++ deviceConstructor /= constructor; ++ std::ofstream deviceFile(deviceConstructor); ++ if (!deviceFile.good()) ++ { ++ std::cerr << "Error writing " << deviceConstructor << "\n"; ++ return -1; ++ } ++ deviceFile << parameters; ++ deviceFile.close(); ++ ++ return 0; ++} ++ ++static bool deviceIsCreated(const std::string& devicePath, ++ std::shared_ptr<uint64_t> bus, ++ std::shared_ptr<uint64_t> address, ++ const bool retrying) ++{ ++ // Prevent the device from being created a second time. ++ if (bus && address) ++ { ++ std::ostringstream hex; ++ hex << std::hex << *address; ++ std::string addressHex = hex.str(); ++ std::string busStr = std::to_string(*bus); ++ ++ if (std::filesystem::is_directory(devicePath)) ++ { ++ for (const auto& path : ++ std::filesystem::directory_iterator(devicePath)) ++ { ++ if (!std::filesystem::is_directory(path)) ++ { ++ continue; ++ } ++ ++ const std::string& directoryName = path.path().filename(); ++ if (boost::starts_with(directoryName, busStr) && ++ boost::ends_with(directoryName, addressHex)) ++ { ++ if (retrying) ++ { ++ // subsequent attempts should find the hwmon subdir. ++ std::filesystem::path hwmonDir(devicePath); ++ hwmonDir /= directoryName; ++ hwmonDir /= "hwmon"; ++ bool dirFound = ++ (std::filesystem::is_directory(hwmonDir)); ++ return dirFound; ++ } ++ else ++ { ++ return true; ++ } ++ } ++ } ++ return false; ++ } ++ } ++ return false; ++} ++ ++constexpr size_t totalBuildDeviceRetries = 5; ++static int buildDevice(const std::string& devicePath, ++ const std::string& parameters, ++ std::shared_ptr<uint64_t> bus, ++ std::shared_ptr<uint64_t> address, ++ const std::string& constructor, ++ const std::string& destructor, const bool createsHWMon, ++ const size_t retries = totalBuildDeviceRetries) ++{ ++ bool tryAgain = false; ++ if (!retries) ++ { ++ return -1; ++ } ++ ++ if (!deviceIsCreated(devicePath, bus, address, false)) ++ { ++ createDevice(devicePath, parameters, constructor); ++ tryAgain = true; ++ } ++ else if (createsHWMon && !deviceIsCreated(devicePath, bus, address, true)) ++ { ++ // device is present, hwmon subdir missing ++ deleteDevice(devicePath, address, destructor); ++ tryAgain = true; ++ } ++ ++ if (tryAgain) ++ { ++ std::shared_ptr<boost::asio::steady_timer> createTimer = ++ std::make_shared<boost::asio::steady_timer>(io); ++ createTimer->expires_after(std::chrono::milliseconds(500)); ++ createTimer->async_wait([createTimer, devicePath, parameters, bus, ++ address, constructor, destructor, createsHWMon, ++ retries](const boost::system::error_code&) { ++ buildDevice(devicePath, parameters, bus, address, constructor, ++ destructor, createsHWMon, retries - 1); ++ }); ++ } ++ return 0; ++} ++ + void exportDevice(const std::string& type, + const devices::ExportTemplate& exportTemplate, + const nlohmann::json& configuration) + { + + std::string parameters = exportTemplate.parameters; +- std::string device = exportTemplate.device; ++ std::string devicePath = exportTemplate.devicePath; ++ std::string constructor = exportTemplate.add; ++ std::string destructor = exportTemplate.remove; ++ bool createsHWMon = exportTemplate.createsHWMon; + std::string name = "unknown"; +- const uint64_t* bus = nullptr; +- const uint64_t* address = nullptr; ++ std::shared_ptr<uint64_t> bus = nullptr; ++ std::shared_ptr<uint64_t> address = nullptr; + const nlohmann::json::array_t* channels = nullptr; + + for (auto keyPair = configuration.begin(); keyPair != configuration.end(); +@@ -144,11 +281,13 @@ void exportDevice(const std::string& type, + + if (keyPair.key() == "Bus") + { +- bus = keyPair.value().get_ptr<const uint64_t*>(); ++ bus = std::make_shared<uint64_t>( ++ *keyPair.value().get_ptr<const uint64_t*>()); + } + else if (keyPair.key() == "Address") + { +- address = keyPair.value().get_ptr<const uint64_t*>(); ++ address = std::make_shared<uint64_t>( ++ *keyPair.value().get_ptr<const uint64_t*>()); + } + else if (keyPair.key() == "ChannelNames") + { +@@ -157,49 +296,14 @@ void exportDevice(const std::string& type, + } + boost::replace_all(parameters, TEMPLATE_CHAR + keyPair.key(), + subsituteString); +- boost::replace_all(device, TEMPLATE_CHAR + keyPair.key(), ++ boost::replace_all(devicePath, TEMPLATE_CHAR + keyPair.key(), + subsituteString); + } + +- // if we found bus and address we can attempt to prevent errors +- if (bus != nullptr && address != nullptr) +- { +- std::ostringstream hex; +- hex << std::hex << *address; +- const std::string& addressHex = hex.str(); +- std::string busStr = std::to_string(*bus); ++ int err = buildDevice(devicePath, parameters, bus, address, constructor, ++ destructor, createsHWMon); + +- std::filesystem::path devicePath(device); +- std::filesystem::path parentPath = devicePath.parent_path(); +- if (std::filesystem::is_directory(parentPath)) +- { +- for (const auto& path : +- std::filesystem::directory_iterator(parentPath)) +- { +- if (!std::filesystem::is_directory(path)) +- { +- continue; +- } +- +- const std::string& directoryName = path.path().filename(); +- if (boost::starts_with(directoryName, busStr) && +- boost::ends_with(directoryName, addressHex)) +- { +- return; // already exported +- } +- } +- } +- } +- +- std::ofstream deviceFile(device); +- if (!deviceFile.good()) +- { +- std::cerr << "Error writing " << device << "\n"; +- return; +- } +- deviceFile << parameters; +- deviceFile.close(); +- if (boost::ends_with(type, "Mux") && bus && address && channels) ++ if (!err && boost::ends_with(type, "Mux") && bus && address && channels) + { + linkMux(name, static_cast<size_t>(*bus), static_cast<size_t>(*address), + *channels); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0002-Entity-manager-Add-support-to-update-assetTag.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0002-Entity-manager-Add-support-to-update-assetTag.patch new file mode 100644 index 000000000..0fea3e8a0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0002-Entity-manager-Add-support-to-update-assetTag.patch @@ -0,0 +1,176 @@ +From 0941036f4206d74bfc3d3e505a5d269fb39c48ff Mon Sep 17 00:00:00 2001 +From: mansijos <mansi.joshi@intel.com> +Date: Tue, 6 Apr 2021 02:12:56 +0530 +Subject: [PATCH] Entity-manager: Add support to update assetTag + +Asset tag is an updateable property from User level interface like +Redfish. User-level interface will update Asset tag in entity-manager, +which will further update the needed FRU interface property exposed. + +Tested: +Successfully updated in assetTag interface as well as in fru interface +while using set-property and using redfish as well. +The new value is preserved after BMC resets. + +Change-Id: If7fbfd8325488280f500ab0e2c8b38475813cc3f +Signed-off-by: mansijos <mansi.joshi@intel.com> +--- + src/EntityManager.cpp | 95 +++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 91 insertions(+), 4 deletions(-) + +diff --git a/src/EntityManager.cpp b/src/EntityManager.cpp +index 490c0f5..139ba9a 100644 +--- a/src/EntityManager.cpp ++++ b/src/EntityManager.cpp +@@ -48,9 +48,19 @@ constexpr const char* lastConfiguration = "/tmp/configuration/last.json"; + constexpr const char* currentConfiguration = "/var/configuration/system.json"; + constexpr const char* globalSchema = "global.json"; + constexpr const int32_t maxMapperDepth = 0; ++constexpr const char* foundObject = "FoundProbe"; + + constexpr const bool debug = false; + ++ ++ ++using foundProbeData = std::map<std::string, std::string>; ++static foundProbeData foundData; ++static std::map<std::string, foundProbeData> mapFoundData; ++ ++constexpr const char* fruConn = "xyz.openbmc_project.FruDevice"; ++constexpr const char* fruIntf = "xyz.openbmc_project.FruDevice"; ++ + struct CmpStr + { + bool operator()(const char* a, const char* b) const +@@ -577,6 +587,43 @@ void addArrayToDbus(const std::string& name, const nlohmann::json& array, + } + } + ++template <typename PropertyType> ++bool persistAssetTag(const PropertyType& newVal, ++ const std::string& jsonPointerString) ++{ ++ std::size_t found = jsonPointerString.find_last_of("/\\"); ++ std::string jsonPointerPath = jsonPointerString.substr(0, found); ++ ++ auto it = mapFoundData.find(jsonPointerPath); ++ if (it == mapFoundData.end()) ++ { ++ std::cerr << "Error in finding jsonPointerPath in mapFoundData" ++ << "\n"; ++ return false; ++ } ++ ++ foundProbeData& tmpMap = it->second; ++ auto foundPath = tmpMap.find("foundPath"); ++ if (foundPath == tmpMap.end()) ++ { ++ std::cerr << "No prob object data is avaliable in foundProbeData" ++ << "\n"; ++ return false; ++ } ++ ++ systemBus->async_method_call( ++ [](const boost::system::error_code& ec) { ++ if (ec) ++ { ++ std::cerr << "Error setting AssetTag in FRU interface " << ec ++ << "\n"; ++ } ++ }, ++ fruConn, foundPath->second, "org.freedesktop.DBus.Properties", "Set", ++ fruIntf, "PRODUCT_ASSET_TAG", std::variant<PropertyType>(newVal)); ++ return true; ++} ++ + template <typename PropertyType> + void addProperty(const std::string& propertyName, const PropertyType& value, + sdbusplus::asio::dbus_interface* iface, +@@ -591,9 +638,18 @@ void addProperty(const std::string& propertyName, const PropertyType& value, + } + iface->register_property( + propertyName, value, +- [&systemConfiguration, ++ [propertyName, &systemConfiguration, + jsonPointerString{std::string(jsonPointerString)}]( + const PropertyType& newVal, PropertyType& val) { ++ if (propertyName == "AssetTag") ++ { ++ if (!persistAssetTag(newVal, jsonPointerString)) ++ { ++ std::cerr << "error setting AssetTag in FRU interface\n"; ++ return -1; ++ } ++ } ++ + val = newVal; + if (!setJsonFromPointer(jsonPointerString, val, + systemConfiguration)) +@@ -993,6 +1049,9 @@ void postToDbus(const nlohmann::json& newConfiguration, + populateInterfaceFromJson(systemConfiguration, jsonPointerPath, + boardIface, boardValues, objServer); + jsonPointerPath += "/"; ++ ++ std::string foundPath; ++ + // iterate through board properties + for (auto& boardField : boardValues.items()) + { +@@ -1002,9 +1061,28 @@ void postToDbus(const nlohmann::json& newConfiguration, + createInterface(objServer, boardName, boardField.key(), + boardKeyOrig); + +- populateInterfaceFromJson(systemConfiguration, +- jsonPointerPath + boardField.key(), +- iface, boardField.value(), objServer); ++ if (boardField.key() == "FoundProbe") ++ { ++ foundPath = boardField.value()["Path"]; ++ } ++ if (boardField.key() == ++ "xyz.openbmc_project.Inventory.Decorator.AssetTag") ++ { ++ foundData["foundPath"] = foundPath; ++ mapFoundData[jsonPointerPath + boardField.key()] = ++ foundData; ++ ++ populateInterfaceFromJson( ++ systemConfiguration, jsonPointerPath + boardField.key(), ++ iface, boardField.value(), objServer, ++ sdbusplus::asio::PropertyPermission::readWrite); ++ } ++ else ++ { ++ populateInterfaceFromJson( ++ systemConfiguration, jsonPointerPath + boardField.key(), ++ iface, boardField.value(), objServer); ++ } + } + } + +@@ -1362,6 +1440,11 @@ void PerformScan::run() + { + continue; // non-numeric replacement + } ++ ++ nlohmann::json recordVal = *recordPtr; ++ // Save the dbus path info of the device ++ recordVal[foundObject]["Path"] = std::get<1>(*itr); ++ + usedNames.insert(nameIt.value()); + auto usedIt = std::find(indexes.begin(), + indexes.end(), index); +@@ -1439,6 +1522,10 @@ void PerformScan::run() + } + } + ++ // Save the dbus path info of the device ++ record[foundObject]["Path"] = ++ std::get<1>(foundDeviceAndPath); ++ + if (replaceStr) + { + std::cerr << "Duplicates found, replacing " +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0003-Add-logs-to-fwVersionIsSame.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0003-Add-logs-to-fwVersionIsSame.patch new file mode 100644 index 000000000..94af67967 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0003-Add-logs-to-fwVersionIsSame.patch @@ -0,0 +1,56 @@ +From 28525b56161e1b659e85e85c33fc00dc397758aa Mon Sep 17 00:00:00 2001 +From: Helen Huang <he.huang@intel.com> +Date: Mon, 19 Apr 2021 16:06:15 +0800 +Subject: [PATCH] Add logs to fwVersionIsSame() + +Add logs to fwVersionIsSame() to indicate whether the firmware +version is changed or not. + +Tested: +Logs are printed as expected when firmware updating and BMC rebooting. + +Log of rebooting: +The firmware version is similiar as the last boot, +Hash value of versionFile is:3336889560 + +Log of Firmware update: +The firmware version is changed since the last boot, +hash value of current versionFile is:3336889560, +hash value of versionFile of last boot is:834871226 + +Change-Id: I5306917329d2e2e015af58cad1e9c59881f0b217 +Signed-off-by: Helen Huang <he.huang@intel.com> +--- + include/Utils.hpp | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/include/Utils.hpp b/include/Utils.hpp +index 657af92..8238807 100644 +--- a/include/Utils.hpp ++++ b/include/Utils.hpp +@@ -116,13 +116,22 @@ inline bool fwVersionIsSame(void) + + if (expectedHash == hashString) + { ++ std::cout << "The firmware version is similiar as the last boot, " ++ "hash value of versionFile is:" ++ << hashString.c_str() << "\n"; + return true; + } ++ std::cout << "The firmware version is changed since the last boot, hash " ++ "value of current versionFile is:" ++ << expectedHash.c_str() ++ << ", hash value of versionFile of last boot is:" ++ << hashString.c_str() << "\n"; + hashFile.close(); + } + + std::ofstream output(versionHashFile); + output << expectedHash; ++ + return false; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0004-Adding-MUX-and-Drives-present-in-HSBP-in-json-config.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0004-Adding-MUX-and-Drives-present-in-HSBP-in-json-config.patch new file mode 100644 index 000000000..4f6679dde --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0004-Adding-MUX-and-Drives-present-in-HSBP-in-json-config.patch @@ -0,0 +1,149 @@ +From 95a1f9e5f65d35adc3cf8d3b3095d92b63c17f85 Mon Sep 17 00:00:00 2001 +From: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +Date: Sun, 20 Jun 2021 18:22:34 +0000 +Subject: [PATCH] Add MUX and Drives present in HSBP in json configuration + +Added Mux addresses for all 3 HSBP configuration and the drive +names to be exposed via entity manager when the HSBP is connected + +Added board instance to separate each HSBP board. + +Tested: +After this addition, detected the MUXes in entity manager +tree as well as in /dev/i2c-mux location. Also able to detect +the drive address. + +Change-Id: Ic07e3880cf5b6f8a47ee7b8f1f98e12042765da8 +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> + +--- + configurations/F2U8X25 HSBP.json | 78 ++++++++++++++++++++++++++++++-- + 1 file changed, 75 insertions(+), 3 deletions(-) + +diff --git a/configurations/F2U8X25 HSBP.json b/configurations/F2U8X25 HSBP.json +index c6c7678..e2eedfa 100644 +--- a/configurations/F2U8X25 HSBP.json ++++ b/configurations/F2U8X25 HSBP.json +@@ -7,6 +7,30 @@ + "Name": "F2U8X25 HSBP1 FRU", + "Type": "EEPROM" + }, ++ { ++ "Address": "0x70", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_1", ++ "Drive_2", ++ "Drive_3", ++ "Drive_4" ++ ], ++ "Name": "Drive Mux 1", ++ "Type": "PCA9546Mux" ++ }, ++ { ++ "Address": "0x74", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_5", ++ "Drive_6", ++ "Drive_7", ++ "Drive_8" ++ ], ++ "Name": "Drive Mux 2", ++ "Type": "PCA9546Mux" ++ }, + { + "Address": "0x48", + "Bus": "$bus", +@@ -40,7 +64,7 @@ + "Type": "TMP75" + } + ], +- "Name": "F2U8X25 HSBP", ++ "Name": "F2U8X25 HSBP 1", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 80})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { +@@ -58,6 +82,30 @@ + "Name": "F2U8X25 HSBP2 FRU", + "Type": "EEPROM" + }, ++ { ++ "Address": "0x73", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_9", ++ "Drive_10", ++ "Drive_11", ++ "Drive_12" ++ ], ++ "Name": "Drive Mux 3", ++ "Type": "PCA9546Mux" ++ }, ++ { ++ "Address": "0x77", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_13", ++ "Drive_14", ++ "Drive_15", ++ "Drive_16" ++ ], ++ "Name": "Drive Mux 4", ++ "Type": "PCA9546Mux" ++ }, + { + "Address": "0x4B", + "Bus": "$bus", +@@ -91,7 +139,7 @@ + "Type": "TMP75" + } + ], +- "Name": "F2U8X25 HSBP", ++ "Name": "F2U8X25 HSBP 2", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 83})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { +@@ -109,6 +157,30 @@ + "Name": "F2U8X25 HSBP3 FRU", + "Type": "EEPROM" + }, ++ { ++ "Address": "0x72", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_17", ++ "Drive_18", ++ "Drive_19", ++ "Drive_20" ++ ], ++ "Name": "Drive Mux 5", ++ "Type": "PCA9546Mux" ++ }, ++ { ++ "Address": "0x76", ++ "Bus": "$bus", ++ "ChannelNames": [ ++ "Drive_21", ++ "Drive_22", ++ "Drive_23", ++ "Drive_24" ++ ], ++ "Name": "Drive Mux 6", ++ "Type": "PCA9546Mux" ++ }, + { + "Address": "0x4A", + "Bus": "$bus", +@@ -142,7 +214,7 @@ + "Type": "TMP75" + } + ], +- "Name": "F2U8X25 HSBP", ++ "Name": "F2U8X25 HSBP 3", + "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 82})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0005-Allow-MUX-idle-state-to-be-configured-as-DISCONNECT.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0005-Allow-MUX-idle-state-to-be-configured-as-DISCONNECT.patch new file mode 100644 index 000000000..ac0995614 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0005-Allow-MUX-idle-state-to-be-configured-as-DISCONNECT.patch @@ -0,0 +1,131 @@ +From aada39602a21e83d7e8c39c39fb8c5c32122863c Mon Sep 17 00:00:00 2001 +From: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +Date: Thu, 2 Sep 2021 11:11:40 +0000 +Subject: [PATCH] Allow MUX idle state to be configured as DISCONNECT + +The existing Linux behavior is to leave the Mux status as it is after +an operation. In HSBP and in other places we have more than one MUX +parallel in same root bus. The existing behavior will result in reading +multiple buses of different MUXes at the same time and causes bad read. +In this fix, we can configure "MuxIdleMode" as "Disconnect" in +configuration file as shown below + +{ + "Address": "0x70", + "Bus": "$bus", + "ChannelNames": [ + "Drive_1", + "Drive_2", + "Drive_3", + "Drive_4" + ], + "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 1", + "Type": "PCA9546Mux" + +Tested: +Set the MUX idle mode to Disconnect in MUXes present in HSBP board and +only one channel is read at a time. + +Change-Id: I6d29cd3be350682c386bd3072e76b930a7d45587 +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +--- + src/Overlay.cpp | 55 ++++++++++++++++++++++++++++++++++++++++++++++--- + 1 file changed, 52 insertions(+), 3 deletions(-) + +diff --git a/src/Overlay.cpp b/src/Overlay.cpp +index 4454423..2843c31 100644 +--- a/src/Overlay.cpp ++++ b/src/Overlay.cpp +@@ -38,11 +38,46 @@ constexpr const char* outputDir = "/tmp/overlays"; + constexpr const char* templateChar = "$"; + constexpr const char* i2CDevsDir = "/sys/bus/i2c/devices"; + constexpr const char* muxSymlinkDir = "/dev/i2c-mux"; ++constexpr const char* idleModeAsIs = "-1"; ++constexpr const char* idleModeDisconnect = "-2"; + + constexpr const bool debug = false; + + std::regex illegalNameRegex("[^A-Za-z0-9_]"); + ++void setIdleMode(const std::string& muxName, size_t busIndex, size_t address, ++ const std::string& idleMode) ++{ ++ std::error_code ec; ++ ++ std::ostringstream hexAddress; ++ hexAddress << std::hex << std::setfill('0') << std::setw(4) << address; ++ ++ std::filesystem::path idlePath(i2CDevsDir); ++ idlePath /= ++ std::to_string(busIndex) + "-" + hexAddress.str() + "/idle_state"; ++ ++ std::string modeData = ++ (idleMode == "Disconnect") ? idleModeDisconnect : idleModeAsIs; ++ ++ if (debug) ++ { ++ std::cerr << "Setting " << muxName << " idle state to " << modeData ++ << " in " << idlePath << "\n"; ++ } ++ ++ std::ofstream idleFile(idlePath); ++ if (!idleFile.good()) ++ { ++ std::cerr << "Can't set idle mode in " << idlePath << " for " << muxName ++ << "\n"; ++ } ++ else ++ { ++ idleFile << modeData; ++ } ++} ++ + // helper function to make json types into string + std::string jsonToString(const nlohmann::json& in) + { +@@ -285,6 +320,7 @@ void exportDevice(const std::string& type, + std::shared_ptr<uint64_t> bus = nullptr; + std::shared_ptr<uint64_t> address = nullptr; + const nlohmann::json::array_t* channels = nullptr; ++ std::string idleMode; + + for (auto keyPair = configuration.begin(); keyPair != configuration.end(); + keyPair++) +@@ -318,6 +354,11 @@ void exportDevice(const std::string& type, + channels = + keyPair.value().get_ptr<const nlohmann::json::array_t*>(); + } ++ else if (keyPair.key() == "MuxIdleMode") ++ { ++ idleMode = keyPair.value().get<std::string>(); ++ } ++ + boost::replace_all(parameters, templateChar + keyPair.key(), + subsituteString); + boost::replace_all(devicePath, templateChar + keyPair.key(), +@@ -327,10 +368,18 @@ void exportDevice(const std::string& type, + int err = buildDevice(devicePath, parameters, bus, address, constructor, + destructor, createsHWMon); + +- if (!err && boost::ends_with(type, "Mux") && bus && address && channels) ++ if (!err && boost::ends_with(type, "Mux") && bus && address) + { +- linkMux(name, static_cast<size_t>(*bus), static_cast<size_t>(*address), +- *channels); ++ if (channels) ++ { ++ linkMux(name, static_cast<size_t>(*bus), ++ static_cast<size_t>(*address), *channels); ++ } ++ if (!idleMode.empty()) ++ { ++ setIdleMode(name, static_cast<size_t>(*bus), ++ static_cast<size_t>(*address), idleMode); ++ } + } + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0006-Change-HSBP-FRU-address-and-add-MUX-mode-configurati.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0006-Change-HSBP-FRU-address-and-add-MUX-mode-configurati.patch new file mode 100644 index 000000000..a3d065fd9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0006-Change-HSBP-FRU-address-and-add-MUX-mode-configurati.patch @@ -0,0 +1,96 @@ +From 0ece2ae628f6d4ee57319dc7e153680cdddff1d2 Mon Sep 17 00:00:00 2001 +From: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +Date: Sun, 12 Sep 2021 22:21:55 +0000 +Subject: [PATCH] Change HSBP FRU address and add MUX mode configuration + +Changed the HSBP EEPROM FRU address according to Hardware +rework and added the MUX idle mode configuration as +"Disconnect". The later will keep MUX channel mode in +disconnected state after the channel is accessed. + +Tested: +1. Detected and read the HSBP EEPROM FRU with new address +on reworked board. +2. Confirmed the idle state of MUX channel after it is +accessed is disconnected, this solved the bad read +caused by reading multiple buses of different MUXes at +same time. + +Signed-off-by: AKSHAY RAVEENDRAN K <akshay.raveendran.k@intel.com> +--- + configurations/F2U8X25 HSBP.json | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/configurations/F2U8X25 HSBP.json b/configurations/F2U8X25 HSBP.json +index e2eedfa..60e7817 100644 +--- a/configurations/F2U8X25 HSBP.json ++++ b/configurations/F2U8X25 HSBP.json +@@ -16,6 +16,7 @@ + "Drive_3", + "Drive_4" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 1", + "Type": "PCA9546Mux" + }, +@@ -28,6 +29,7 @@ + "Drive_7", + "Drive_8" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 2", + "Type": "PCA9546Mux" + }, +@@ -65,7 +67,7 @@ + } + ], + "Name": "F2U8X25 HSBP 1", +- "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 80})", ++ "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 84})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", +@@ -91,6 +93,7 @@ + "Drive_11", + "Drive_12" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 3", + "Type": "PCA9546Mux" + }, +@@ -103,6 +106,7 @@ + "Drive_15", + "Drive_16" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 4", + "Type": "PCA9546Mux" + }, +@@ -140,7 +144,7 @@ + } + ], + "Name": "F2U8X25 HSBP 2", +- "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 83})", ++ "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'F2U8X25PCIHSBP', 'ADDRESS': 87})", + "Type": "Board", + "xyz.openbmc_project.Inventory.Decorator.Asset": { + "Manufacturer": "$BOARD_MANUFACTURER", +@@ -166,6 +170,7 @@ + "Drive_19", + "Drive_20" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 5", + "Type": "PCA9546Mux" + }, +@@ -178,6 +183,7 @@ + "Drive_23", + "Drive_24" + ], ++ "MuxIdleMode": "Disconnect", + "Name": "Drive Mux 6", + "Type": "PCA9546Mux" + }, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0007-Add-HSBP-FRU-details-in-json-configuration.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0007-Add-HSBP-FRU-details-in-json-configuration.patch new file mode 100644 index 000000000..9ad2641bc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager/0007-Add-HSBP-FRU-details-in-json-configuration.patch @@ -0,0 +1,78 @@ +From ff4b6cab1dead31bad114321c211797ac28b36b1 Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Wed, 10 Nov 2021 15:17:13 +0000 +Subject: [PATCH] Add HSBP FRU details in json configuration + +Added Intel specific HSBP CPLD FRU details in json configuration file. + +Tested: +1. Detected and read the HSBP FRU with new address on reworked board. +2. busctl tree xyz.openbmc_project.HsbpManager +└─/xyz + └─/xyz/openbmc_project + ├─/xyz/openbmc_project/inventory + │ └─/xyz/openbmc_project/inventory/item + │ ├─/xyz/openbmc_project/inventory/item/drive + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_1 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_10 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_11 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_12 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_13 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_14 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_15 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_16 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_2 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_3 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_4 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_5 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_6 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_7 + │ │ ├─/xyz/openbmc_project/inventory/item/drive/Drive_8 + │ │ └─/xyz/openbmc_project/inventory/item/drive/Drive_9 + │ └─/xyz/openbmc_project/inventory/item/hsbp + │ ├─/xyz/openbmc_project/inventory/item/hsbp/HSBP_1 + │ └─/xyz/openbmc_project/inventory/item/hsbp/HSBP_2 + └─/xyz/openbmc_project/software + ├─/xyz/openbmc_project/software/HSBP_1 + └─/xyz/openbmc_project/software/HSBP_2 + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + configurations/F2U8X25 HSBP.json | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/configurations/F2U8X25 HSBP.json b/configurations/F2U8X25 HSBP.json +index 60e7817..cdf9076 100644 +--- a/configurations/F2U8X25 HSBP.json ++++ b/configurations/F2U8X25 HSBP.json +@@ -7,6 +7,13 @@ + "Name": "F2U8X25 HSBP1 FRU", + "Type": "EEPROM" + }, ++ { ++ "Address": "0x68", ++ "Bus": "$bus", ++ "Index": 1, ++ "Name": "HSBP 1", ++ "Type": "Intel HSBP CPLD" ++ }, + { + "Address": "0x70", + "Bus": "$bus", +@@ -84,6 +91,13 @@ + "Name": "F2U8X25 HSBP2 FRU", + "Type": "EEPROM" + }, ++ { ++ "Address": "0x69", ++ "Bus": "$bus", ++ "Index": 2, ++ "Name": "HSBP 2", ++ "Type": "Intel HSBP CPLD" ++ }, + { + "Address": "0x73", + "Bus": "$bus", +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend new file mode 100644 index 000000000..ba51f9454 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend @@ -0,0 +1,14 @@ +# this is here just to bump faster than upstream +# SRC_URI = "git://github.com/openbmc/entity-manager.git" +SRCREV = "2c412eef8eb76bf2a998c9d193f2dc92aaec39f8" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " file://0002-Entity-manager-Add-support-to-update-assetTag.patch \ + file://0003-Add-logs-to-fwVersionIsSame.patch \ + file://0004-Adding-MUX-and-Drives-present-in-HSBP-in-json-config.patch \ + file://0005-Allow-MUX-idle-state-to-be-configured-as-DISCONNECT.patch \ + file://0006-Change-HSBP-FRU-address-and-add-MUX-mode-configurati.patch \ + file://0007-Add-HSBP-FRU-details-in-json-configuration.patch \ + " + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console.conf b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console.conf new file mode 100644 index 000000000..1d332e2a2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console.conf @@ -0,0 +1,3 @@ +baud = 921600 +local-tty = ttyS3 +local-tty-baud = 921600 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console@.service b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console@.service new file mode 100644 index 000000000..4ec453d9e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/obmc-console@.service @@ -0,0 +1,14 @@ +[Unit] +Description=Phosphor Console Muxer listening on device /dev/%I +BindsTo=dev-%i.device +After=dev-%i.device + +[Service] +ExecStartPre=/usr/bin/sol-option-check.sh +ExecStart=/usr/bin/env obmc-console-server --config {sysconfdir}/obmc-console.conf %i +ExecStopPost=/bin/sh -c 'echo -n "0" > /sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/hicra' +SyslogIdentifier=obmc-console-server +Restart=always + +[Install] +WantedBy={SYSTEMD_DEFAULT_TARGET} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/sol-option-check.sh b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/sol-option-check.sh new file mode 100755 index 000000000..19179c497 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console/sol-option-check.sh @@ -0,0 +1,32 @@ +#!/bin/sh + +# Copyright 2017-2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# + +CPUPART="CPU part" +AST2500_ID="0xb76" +AST2600_ID="0xc07" + +if ([ $(grep "$CPUPART" /proc/cpuinfo | grep "$AST2500_ID" | wc -l) != 0 ] && \ + [ $(grep 192000000 /sys/class/tty/ttyS0/uartclk | wc -l) != 0 ]) || \ + ([ $(grep "$CPUPART" /proc/cpuinfo | grep "$AST2600_ID" | wc -l) != 0 ] && \ + [ $(grep 14769216 /sys/class/tty/ttyS0/uartclk | wc -l) != 0 ]); then + echo "hs-uart" + sed -i -e 's/115200/921600/g' /etc/obmc-console.conf +else + echo "normal uart" + sed -i -e 's/921600/115200/g' /etc/obmc-console.conf +fi diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console_%.bbappend new file mode 100644 index 000000000..9a0eae176 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/console/obmc-console_%.bbappend @@ -0,0 +1,17 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" +OBMC_CONSOLE_HOST_TTY = "ttyS2" +SRC_URI += "file://sol-option-check.sh \ + file://obmc-console@.service \ + " +inherit obmc-phosphor-systemd + +SYSTEMD_SERVICE:${PN} += " \ + ${PN}@${OBMC_CONSOLE_HOST_TTY}.service \ + " + +do_install:append() { + rm -rf ${D}${base_libdir}/udev/rules.d/80-obmc-console-uart.rules + install -m 0644 ${WORKDIR}/${PN}@.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${WORKDIR}/sol-option-check.sh ${D}${bindir} +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync.bb new file mode 100644 index 000000000..83630fc36 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync.bb @@ -0,0 +1,24 @@ + +SUMMARY = "PCH BMC time service" +DESCRIPTION = "This service will read date/time from PCH device periodically, and set the BMC system time accordingly" + +SRC_URI = "\ + file://CMakeLists.txt;subdir=${BP} \ + file://pch-time-sync.cpp;subdir=${BP} \ + " +PV = "0.1" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SYSTEMD_SERVICE:${PN} = "pch-time-sync.service" + +inherit cmake +inherit obmc-phosphor-systemd + +DEPENDS += " \ + sdbusplus \ + phosphor-logging \ + boost \ + i2c-tools \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/.clang-format b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/.clang-format new file mode 100644 index 000000000..dd2770837 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/.clang-format @@ -0,0 +1,98 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: false +AlignOperands: true +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: false +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: true +PointerAlignment: Left +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 5 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.hpp"' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 2 + - Regex: '^<.*' + Priority: 3 + - Regex: '.*' + Priority: 4 +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +KeepEmptyLinesAtTheStartOfBlocks: true +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +PointerAlignment: Right +ReflowComments: true +SortIncludes: true +SpaceAfterCStyleCast: false +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp11 +TabWidth: 4 +UseTab: Never +... diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/CMakeLists.txt new file mode 100644 index 000000000..a4cf8155f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/CMakeLists.txt @@ -0,0 +1,40 @@ +cmake_minimum_required (VERSION 3.5 FATAL_ERROR) +project (pch-time-sync CXX) +set (CMAKE_CXX_STANDARD 17) +set (CMAKE_CXX_STANDARD_REQUIRED ON) +set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-rtti") +set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-rtti") + +include_directories (${CMAKE_CURRENT_SOURCE_DIR}) + +# boost support +find_package (Boost REQUIRED) +# pkg_check_modules(Boost boost REQUIRED) +include_directories (${Boost_INCLUDE_DIRS}) +add_definitions (-DBOOST_ERROR_CODE_HEADER_ONLY) +add_definitions (-DBOOST_SYSTEM_NO_DEPRECATED) +add_definitions (-DBOOST_ALL_NO_LIB) +add_definitions (-DBOOST_NO_RTTI) +add_definitions (-DBOOST_NO_TYPEID) +add_definitions (-DBOOST_ASIO_DISABLE_THREADS) + +# import sdbusplus +find_package (PkgConfig REQUIRED) +pkg_check_modules (SDBUSPLUSPLUS sdbusplus REQUIRED) +include_directories (${SDBUSPLUSPLUS_INCLUDE_DIRS}) +link_directories (${SDBUSPLUSPLUS_LIBRARY_DIRS}) + +# import phosphor-logging +find_package (PkgConfig REQUIRED) +pkg_check_modules (LOGGING phosphor-logging REQUIRED) +include_directories (${LOGGING_INCLUDE_DIRS}) +link_directories (${LOGGING_LIBRARY_DIRS}) + +add_executable (pch-time-sync pch-time-sync.cpp) + +target_link_libraries (${PROJECT_NAME} ${Boost_LIBRARIES}) +target_link_libraries (${PROJECT_NAME} ${SDBUSPLUSPLUS_LIBRARIES} + phosphor_logging) +target_link_libraries (${PROJECT_NAME} i2c) + +install (TARGETS pch-time-sync DESTINATION bin) diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/cmake-format.json b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/cmake-format.json new file mode 100644 index 000000000..583c255a3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/cmake-format.json @@ -0,0 +1,12 @@ +{ + "enum_char": ".", + "line_ending": "unix", + "bullet_char": "*", + "max_subargs_per_line": 99, + "command_case": "lower", + "tab_size": 4, + "line_width": 80, + "separate_fn_name_with_space": true, + "dangle_parens": true, + "separate_ctrl_name_with_space": true +}
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.cpp b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.cpp new file mode 100644 index 000000000..454bdc1db --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.cpp @@ -0,0 +1,431 @@ +/* Copyright 2019 Intel + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <systemd/sd-journal.h> +#include <time.h> + +#include <boost/asio/io_service.hpp> +#include <boost/asio/steady_timer.hpp> +#include <boost/date_time/posix_time/posix_time.hpp> +#include <chrono> +#include <filesystem> +#include <iostream> +#include <phosphor-logging/log.hpp> +#include <sdbusplus/asio/object_server.hpp> +extern "C" { +#include <i2c/smbus.h> +#include <linux/i2c-dev.h> +} + +static constexpr uint32_t syncIntervalNormalMS = 60000; +static constexpr uint32_t syncIntervalFastMS = (syncIntervalNormalMS / 2); +static constexpr uint32_t syncIntervalBootMS = 5000; + +static uint32_t syncIntervalMS = syncIntervalNormalMS; + +// will update bmc time if the time difference beyond this value +static constexpr uint8_t timeDiffAllowedSecond = 1; +static uint8_t pchDevI2cBusNo = 0; +static uint8_t pchDevI2cSlaveAddr = 0; +static bool getPCHI2cAddrFlag = false; +static constexpr const char* clockFile = "/var/lib/systemd/timesync/clock"; +static inline uint8_t bcd2Decimal(uint8_t hex) +{ + uint8_t dec = ((hex & 0xF0) >> 4) * 10 + (hex & 0x0F); + return dec; +} + +class I2CFile +{ + private: + int fd = -1; + + public: + I2CFile(const int& i2cBus, const int& slaveAddr, const int& flags) + { + std::string i2cDev = "/dev/i2c-" + std::to_string(i2cBus); + + fd = open(i2cDev.c_str(), flags); + if (fd < 0) + { + throw std::runtime_error("Unable to open i2c device."); + } + + if (ioctl(fd, I2C_SLAVE_FORCE, slaveAddr) < 0) + { + close(fd); + fd = -1; + throw std::runtime_error("Unable to set i2c slave address."); + } + } + + uint8_t i2cReadByteData(const uint8_t& offset) + { + int ret = i2c_smbus_read_byte_data(fd, offset); + + if (ret < 0) + { + throw std::runtime_error("i2c read failed"); + } + return static_cast<uint8_t>(ret); + } + + ~I2CFile() + { + if (!(fd < 0)) + { + close(fd); + } + } +}; + +static void getPCHI2cAddr(std::shared_ptr<sdbusplus::asio::connection>& conn, + const std::string& service, const std::string& object, + const std::string& interface) +{ + conn->async_method_call( + [](boost::system::error_code ec, + const std::vector< + std::pair<std::string, std::variant<std::string, uint64_t>>>& + propertiesList) { + if (ec) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "DBUS response error: cannot get I2c address of PCH timer", + phosphor::logging::entry("ECVALUE=%x", ec.value()), + phosphor::logging::entry("ECMESSAGE=%s", + ec.message().c_str())); + return; + } + const uint64_t* i2cBusNoValue = nullptr; + const uint64_t* i2cSlaveAddrValue = nullptr; + for (const auto& property : propertiesList) + { + + if (property.first == "PchSmbusSlaveI2cBus") + { + i2cBusNoValue = std::get_if<uint64_t>(&property.second); + } + if (property.first == "PchSmbusSlaveI2cAddress") + { + i2cSlaveAddrValue = std::get_if<uint64_t>(&property.second); + } + } + if ((i2cBusNoValue != nullptr) && (i2cSlaveAddrValue != nullptr)) + { + pchDevI2cBusNo = static_cast<uint8_t>(*i2cBusNoValue); + pchDevI2cSlaveAddr = static_cast<uint8_t>(*i2cSlaveAddrValue); + getPCHI2cAddrFlag = true; + } + }, + service, object, "org.freedesktop.DBus.Properties", "GetAll", + interface); +} + +static void + getPCHTimerConfiguration(std::shared_ptr<sdbusplus::asio::connection>& conn) +{ + conn->async_method_call( + [&conn]( + boost::system::error_code ec, + const std::vector<std::pair< + std::string, + std::vector<std::pair<std::string, std::vector<std::string>>>>>& + subtree) { + if (ec) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "DBUS response error:cannot get PCH configuration", + phosphor::logging::entry("ECVALUE=%x", ec.value()), + phosphor::logging::entry("ECMESSAGE=%s", + ec.message().c_str())); + return; + } + if (subtree.empty()) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "subtree empty"); + return; + } + getPCHI2cAddr(conn, subtree[0].second[0].first, subtree[0].first, + "xyz.openbmc_project.Configuration.PchSmbusSlave"); + return; + }, + "xyz.openbmc_project.ObjectMapper", + "/xyz/openbmc_project/object_mapper", + "xyz.openbmc_project.ObjectMapper", "GetSubTree", + "/xyz/openbmc_project/", 0, + std::array<const char*, 1>{ + "xyz.openbmc_project.Configuration.PchSmbusSlave"}); + + return; +} + +class PCHSync +{ + private: + bool getPCHDate(uint8_t& year, uint8_t& month, uint8_t& day, uint8_t& hour, + uint8_t& minute, uint8_t& second) + { + try + { + constexpr uint8_t pchDevRegRTCYear = 0x0f; + constexpr uint8_t pchDevRegRTCMonth = 0x0e; + constexpr uint8_t pchDevRegRTCDay = 0x0d; + constexpr uint8_t pchDevRegRTCHour = 0x0b; + constexpr uint8_t pchDevRegRTCMinute = 0x0a; + constexpr uint8_t pchDevRegRTCSecond = 0x09; + I2CFile pchDev(pchDevI2cBusNo, pchDevI2cSlaveAddr, + O_RDWR | O_CLOEXEC); + year = pchDev.i2cReadByteData(pchDevRegRTCYear); + year = bcd2Decimal(year); + if (year > 99) + { + return false; + } + + month = pchDev.i2cReadByteData(pchDevRegRTCMonth); + month = bcd2Decimal(month); + if ((month < 1) || (month > 12)) + { + return false; + } + + day = pchDev.i2cReadByteData(pchDevRegRTCDay); + day = bcd2Decimal(day); + if ((day < 1) || (day > 31)) + { + return false; + } + + hour = pchDev.i2cReadByteData(pchDevRegRTCHour); + hour = bcd2Decimal(hour); + if (hour >= 24) + { + return false; + } + + minute = pchDev.i2cReadByteData(pchDevRegRTCMinute); + minute = bcd2Decimal(minute); + if (minute >= 60) + { + return false; + } + + second = pchDev.i2cReadByteData(pchDevRegRTCSecond); + second = bcd2Decimal(second); + if (second >= 60) + { + return false; + } + } + catch (const std::exception& e) + { + return false; + } + + return true; + } + + bool getSystemTime(time_t& timeSeconds) + { + struct timespec sTime = {0}; + int ret = 0; + + ret = clock_gettime(CLOCK_REALTIME, &sTime); + + if (ret != 0) + { + return false; + } + timeSeconds = sTime.tv_sec; + return true; + } + + bool updateClockFileTimestamp() + { + if (!std::filesystem::exists(clockFile)) + { + phosphor::logging::log<phosphor::logging::level::WARNING>( + "The systemd timestamp synchronization file doesn't exist: ", + phosphor::logging::entry("PATHNAME=%s", clockFile)); + return false; + } + int rc = utimensat(AT_FDCWD, clockFile, nullptr, 0); + if (rc) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "utimensat systemd timestamp synchronization file fail: ", + phosphor::logging::entry("PATHNAME=%s", clockFile), + phosphor::logging::entry("ERRCODE=%x", errno)); + return false; + } + return true; + } + bool setSystemTime(uint32_t timeSeconds) + { + struct timespec sTime = {0}; + int ret = 0; + + sTime.tv_sec = timeSeconds; + sTime.tv_nsec = 0; + + ret = clock_settime(CLOCK_REALTIME, &sTime); + + return (ret == 0); + } + + bool updateBMCTime() + { + int ret = 0; + time_t BMCTimeSeconds = 0; + time_t PCHTimeSeconds = 0; + struct tm tm = {0}; + + // get PCH and system time + + if (!getPCHDate(year, month, day, hour, minute, second)) + { + return false; + }; + if (!getSystemTime(BMCTimeSeconds)) + { + return false; + } + // fix error when year is set to 2000-2009. + std::string dateString = + std::to_string(2000 + year) + "-" + std::to_string(month) + "-" + + std::to_string(day) + " " + std::to_string(hour) + ":" + + std::to_string(minute) + ":" + std::to_string(second); + + strptime(dateString.c_str(), "%Y-%m-%d %H:%M:%S", &tm); + + PCHTimeSeconds = mktime(&tm); + if (PCHTimeSeconds == -1) + { + return false; + } + + if (std::abs(PCHTimeSeconds - BMCTimeSeconds) > timeDiffAllowedSecond) + { + if (!setSystemTime(PCHTimeSeconds)) + { + return false; + } + char newDateString[32] = {0}; + strftime(newDateString, sizeof(newDateString), "%F %T", + gmtime(&PCHTimeSeconds)); + + struct tm* timeinfo; + char oldDateString[32] = {0}; + timeinfo = gmtime(&BMCTimeSeconds); + strftime(oldDateString, sizeof(oldDateString), "%F %T", timeinfo); + + // Log event about BMC time update via PCH + sd_journal_send( + "MESSAGE=BMC time updated via PCH: New time=%s, Old time=%s", + newDateString, oldDateString, "PRIORITY=%i", LOG_INFO, + "REDFISH_MESSAGE_ID=%s", "OpenBMC.0.1.BMCTimeUpdatedViaHost", + "REDFISH_MESSAGE_ARGS=%s,%s", newDateString, oldDateString, + NULL); + } + + // During the boot time, systemd-timesyncd.service checks + // "/var/lib/systemd/timesync/clock" and updates the system time with + // the timestamp of the file + if (!updateClockFileTimestamp()) + { + return false; + } + + return true; + } + + void startSyncTimer(std::shared_ptr<sdbusplus::asio::connection>& conn) + { + // retry 10 times (10 * 5s = 50s ) to get the pch timer + // configuration. + static uint8_t retrytimes = 10; + if (!getPCHI2cAddrFlag) + { + if (retrytimes == 0) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Get pch timer configuration fail"); + return; + } + syncIntervalMS = syncIntervalBootMS; + getPCHTimerConfiguration(conn); + retrytimes--; + } + else + { + if (updateBMCTime()) + { + syncIntervalMS = syncIntervalNormalMS; + } + else + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Update BMC time Fail"); + syncIntervalMS = syncIntervalFastMS; + } + } + + syncTimer->expires_after(std::chrono::milliseconds(syncIntervalMS)); + syncTimer->async_wait( + [this, &conn](const boost::system::error_code& ec) { + if (ec) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Timer cancelled", + phosphor::logging::entry("ECVALUE=%x", ec.value()), + phosphor::logging::entry("ECMESSAGE=%s", + ec.message().c_str())); + return; + } + startSyncTimer(conn); + }); + } + + std::unique_ptr<boost::asio::steady_timer> syncTimer; + uint8_t year, month, day, hour, minute, second; + + public: + PCHSync(boost::asio::io_service& io, + std::shared_ptr<sdbusplus::asio::connection>& conn) + { + syncTimer = std::make_unique<boost::asio::steady_timer>(io); + startSyncTimer(conn); + } + + ~PCHSync() = default; +}; + +int main(int argc, char** argv) +{ + boost::asio::io_service io; + std::shared_ptr<sdbusplus::asio::connection> conn = + std::make_shared<sdbusplus::asio::connection>(io); + sdbusplus::asio::object_server server = + sdbusplus::asio::object_server(conn); + PCHSync pchSyncer(io, conn); + + phosphor::logging::log<phosphor::logging::level::INFO>( + "Starting PCH time sync service"); + + io.run(); + return 0; +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service new file mode 100644 index 000000000..bf4e2a30e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/pch-time-sync/pch-time-sync.service @@ -0,0 +1,15 @@ +[Unit] +Description=PCH BMC time sync service +Conflicts=systemd-timesyncd.service +Requires=xyz.openbmc_project.EntityManager.service +After=xyz.openbmc_project.EntityManager.service + +[Service] +Restart=always +RestartSec=10 +ExecStart=/usr/bin/pch-time-sync +StartLimitInterval=0 +Type=simple + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/phosphor-time-manager_git.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/phosphor-time-manager_git.bbappend new file mode 100644 index 000000000..4d6031b03 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/datetime/phosphor-time-manager_git.bbappend @@ -0,0 +1,2 @@ +RDEPENDS:${PN}:remove = "phosphor-settings-manager" +RDEPENDS:${PN} += " settings" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/0027-Apply-Options-interface-for-Software.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/0027-Apply-Options-interface-for-Software.patch new file mode 100644 index 000000000..3d2cc43e2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/0027-Apply-Options-interface-for-Software.patch @@ -0,0 +1,47 @@ +From 153b125043c28f933579330727d82658979caef3 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Mon, 18 May 2020 20:16:04 +0530 +Subject: [PATCH] Apply Options interface for Software + +Apply Options interface is used to pass the settings related to +firmware image activation such as ClearConfig. +ClearConfig property is used to denote whether to clear firmware +configurations along with firmware image activation or not. + +Example case: +BIOS usually requires its NVRAM configuration to be updated or +erased for certain BIOS firmware updates. Current implementation +doesn't support to take this option and provide interface to do +the necessary actions. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +--- + .../Software/ApplyOptions.interface.yaml | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + create mode 100644 xyz/openbmc_project/Software/ApplyOptions.interface.yaml + +diff --git a/xyz/openbmc_project/Software/ApplyOptions.interface.yaml b/xyz/openbmc_project/Software/ApplyOptions.interface.yaml +new file mode 100644 +index 0000000..45a68ab +--- /dev/null ++++ b/xyz/openbmc_project/Software/ApplyOptions.interface.yaml +@@ -0,0 +1,16 @@ ++description: > ++ To implement the Activation apply options for a newly uploaded firmware ++ image. The apply options property is global and is specifically used with ++ each firmware update and is used during firmware activation. ++ ApplyOptions usage during firmware activation is implementation specific, ++ not all firmware targets need ApplyOptions. ++ The default value of this property is false. ++properties: ++ - name: ClearConfig ++ type: boolean ++ default: false ++ description: > ++ This property indicates whether to clear the software configurations ++ when the firmware image update is getting applied. A value of true ++ indicates the firmware configurations should be cleared along with ++ firmware image activation. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0007-ipmi-set-BIOS-id.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0007-ipmi-set-BIOS-id.patch new file mode 100644 index 000000000..2c443726d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0007-ipmi-set-BIOS-id.patch @@ -0,0 +1,32 @@ +From bc282f4e9537b115e32733dfc6e16c303f81b3e3 Mon Sep 17 00:00:00 2001 +From: "Jia, Chunhui" <chunhui.jia@intel.com> +Date: Tue, 24 Jul 2018 11:40:49 +0800 +Subject: [PATCH] set BIOS id + +change#2 +add new dbus interface for BIOS attributes + +Signed-off-by: Jia, Chunhui <chunhui.jia@intel.com> +--- + .../openbmc_project/Inventory/Item/Bios.interface.yaml | 9 +++++++++ + 1 file changed, 9 insertions(+) + create mode 100644 yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml + +diff --git a/yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml b/yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml +new file mode 100644 +index 000000000000..d7a6b95bfdce +--- /dev/null ++++ b/yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml +@@ -0,0 +1,9 @@ ++description: > ++ Implement to provide BIOS attributes. ++properties: ++ - name: BiosId ++ type: string ++ description: > ++ BIOS ID (version) string ++ ++# vim: tabstop=8 expandtab shiftwidth=4 softtabstop=4 +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0010-Increase-the-default-watchdog-timeout-value.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0010-Increase-the-default-watchdog-timeout-value.patch new file mode 100644 index 000000000..7f315db86 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0010-Increase-the-default-watchdog-timeout-value.patch @@ -0,0 +1,34 @@ +From 479b46d2ed42b576cf2aee2ecbd76de7940d0cfe Mon Sep 17 00:00:00 2001 +From: Yong Li <yong.b.li@linux.intel.com> +Date: Fri, 10 Aug 2018 16:23:13 +0800 +Subject: [PATCH] Increase the default watchdog timeout value + +The default timeout for poweron is 30 seconds, +but currently the host power on needs 120+ seconds +due to unimplemented ipmi commands for BIOS. + +Increase the value as a workaround, +to avoid the watchdog timeout during power on. +Will adjust this value in the future + +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +--- + yaml/xyz/openbmc_project/State/Watchdog.interface.yaml | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +index f54ec3b6e4fb..ede961da1942 100644 +--- a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml ++++ b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +@@ -37,7 +37,7 @@ properties: + type: uint64 + description: > + Time interval to arm the watchdog, in milli-second. +- default: 30000 ++ default: 600000 + - name: TimeRemaining + type: uint64 + description: > +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0012-Add-RestoreDelay-interface-for-power-restore-delay.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0012-Add-RestoreDelay-interface-for-power-restore-delay.patch new file mode 100644 index 000000000..aae1e0248 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0012-Add-RestoreDelay-interface-for-power-restore-delay.patch @@ -0,0 +1,34 @@ +From 6e8b18e2258c7b6327a9b26901846088dd82a663 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Fri, 24 Aug 2018 17:55:35 +0800 +Subject: [PATCH] Add RestoreDelay interface for power restore delay + +Which provide one property "PowerRestoreDelay" + +Change-Id: I4e6d3e45948b1e288301b4aa52cc08cace4f1bc2 +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + .../Control/Power/RestoreDelay.interface.yaml | 11 +++++++++++ + 1 file changed, 11 insertions(+) + create mode 100644 yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml + +diff --git a/yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml b/yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml +new file mode 100644 +index 000000000000..55ee80a75f7b +--- /dev/null ++++ b/yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml +@@ -0,0 +1,11 @@ ++description: > ++ Implement to specify power transition behavior on a BMC reset. ++ The implementation based on restore policy and set a delay time ++ for power restore. ++ ++properties: ++ - name: PowerRestoreDelay ++ type: uint16 ++ description: > ++ The delay time for power restore. ++ Power Restore Delay is NOT applied on power policy is "Always Off" +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0013-Add-ErrConfig.yaml-interface-for-processor-error-config.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0013-Add-ErrConfig.yaml-interface-for-processor-error-config.patch new file mode 100644 index 000000000..17aef45bf --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0013-Add-ErrConfig.yaml-interface-for-processor-error-config.patch @@ -0,0 +1,86 @@ +From 571ab872be4b486b98bfbed159630b5e21d9a586 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Thu, 30 Aug 2018 16:22:43 +0800 +Subject: [PATCH] Add ErrConfig.yaml interface for processor error + configuration. + +Which provide 3 properties: + ResetCfg + type: byte + description: > + Reset Configuration + [0]: CATERR Reset Enabled + 0b: Disabled + 1b: Enabled + [1]: ERR2 Reset Enabled + 0b: Disabled + 1b: Enabled + [7:2]: Reserved + ResetErrorOccurrenceCounts + type: byte + description: > + Reset Error Occurrence Counts + [0]: Reset CPU Error Counts + 0b: Keep CPU Error Counts + 1b: Reset all CPU Error Counts to zero + [7:1]: Reserved + CATERRStatus + type: array[byte] + description: > + For all CPUs including the non-legacy socket CPU + CPU CATERR (Core Error) occurrence + [5:0]: Error Occurrence Count + [7:6]: CPU Status + 00b: Disabled + 01b: Enabled + 11b: Not Present + +Change-Id: Ibc5a7a5e15c998e56c04e23b1043d99243a91171 +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + .../Processor/ErrConfig.interface.yaml | 33 +++++++++++++++++++ + 1 file changed, 33 insertions(+) + create mode 100644 yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml + +diff --git a/yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml b/yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml +new file mode 100644 +index 000000000000..23042633ca13 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml +@@ -0,0 +1,33 @@ ++description: > ++ This defines processor error configuration. ++properties: ++ - name: ResetCfg ++ type: byte ++ description: > ++ Reset Configuration ++ [0]: CATERR Reset Enabled ++ 0b: Disabled ++ 1b: Enabled ++ [1]: ERR2 Reset Enabled ++ 0b: Disabled ++ 1b: Enabled ++ [7:2]: Reserved ++ ++ - name: ResetErrorOccurrenceCounts ++ type: byte ++ description: > ++ Reset Error Occurrence Counts ++ [0]: Reset CPU Error Counts ++ 0b: Keep CPU Error Counts ++ 1b: Reset all CPU Error Counts to zero ++ [7:1]: Reserved ++ - name: CATERRStatus ++ type: array[byte] ++ description: > ++ For all CPUs including the non-legacy socket CPU ++ CPU CATERR (Core Error) occurrence ++ [5:0]: Error Occurrence Count ++ [7:6]: CPU Status ++ 00b: Disabled ++ 01b: Enabled ++ 11b: Not Present +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0024-Add-the-pre-timeout-interrupt-defined-in-IPMI-spec.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0024-Add-the-pre-timeout-interrupt-defined-in-IPMI-spec.patch new file mode 100644 index 000000000..06eed126f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0024-Add-the-pre-timeout-interrupt-defined-in-IPMI-spec.patch @@ -0,0 +1,57 @@ +From 45f4457c23a8da9d246bd33c3d426b52186b39f0 Mon Sep 17 00:00:00 2001 +From: Ren Yu <yux.ren@intel.com> +Date: Fri, 24 May 2019 14:55:10 +0800 +Subject: [PATCH] Add the pre-timeout interrupt defined in IPMI spec + +The IPMI watchdog pre-timeout interrupt is used to set the different +pre-timeout interrupt source. Add them as a dbus property, +IPMI set/get watchdog commands will use it. + +Signed-off-by: Ren Yu <yux.ren@intel.com> +--- + .../State/Watchdog.interface.yaml | 22 +++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +index ede961da1942..a67a6a30ea2c 100644 +--- a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml ++++ b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +@@ -33,6 +33,11 @@ properties: + description: > + The action the watchdog should perform when it expires. + default: 'HardReset' ++ - name: PreTimeoutInterrupt ++ type: enum[self.PreTimeoutInterruptAction] ++ description: > ++ The BMC generates the selected interrupt before the timer expires. ++ default: 'None' + - name: Interval + type: uint64 + description: > +@@ -73,6 +78,23 @@ enumerations: + description: > + Perform a power cycle of the system. + ++ - name: PreTimeoutInterruptAction ++ description: > ++ The type of PreTimeout Interrupt. ++ values: ++ - name: 'None' ++ description: > ++ Do nothing. ++ - name: 'SMI' ++ description: > ++ SMI. ++ - name: 'NMI' ++ description: > ++ NMI / Diagnostic Interrupt. ++ - name: 'MI' ++ description: > ++ Messaging Interrupt. ++ + - name: TimerUse + description: > + The type of timer use. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0025-Add-PreInterruptFlag-properity-in-DBUS.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0025-Add-PreInterruptFlag-properity-in-DBUS.patch new file mode 100644 index 000000000..54920fee3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0025-Add-PreInterruptFlag-properity-in-DBUS.patch @@ -0,0 +1,39 @@ +From c71c17951e5f00195c9cacd6829a359c3d253714 Mon Sep 17 00:00:00 2001 +From: Ren Yu <yux.ren@intel.com> +Date: Mon, 29 Jul 2019 10:51:12 +0800 +Subject: [PATCH] Add PreInterruptFlag properity in DBUS. + +PreTimeoutInterruptOccurFlag in DBUS would be set 'true' +when watchdog pre-timeout interrupt occurred. + +Tested: +Enable command(raw 0x06 0x31) that get message flag +can set right bit about watchdog, +need record PreTimeoutInterruptOccurFlag +at xyz.openbmmc_project.State.Watchdog when watchdog +pre-timeout interrupt occurred. + +Signed-off-by: Ren Yu <yux.ren@intel.com> +--- + yaml/xyz/openbmc_project/State/Watchdog.interface.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +index a67a6a30ea2c..d1ae8e3411e6 100644 +--- a/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml ++++ b/yaml/xyz/openbmc_project/State/Watchdog.interface.yaml +@@ -59,6 +59,11 @@ properties: + description: > + The timer user at the time of expiration. + default: 'Reserved' ++ - name: PreTimeoutInterruptOccurFlag ++ type: boolean ++ description: > ++ PreTimeoutInterruptOccurFlag that preTimeoutInterrupt action occurred. ++ default: false + + enumerations: + - name: Action +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0026-Add-StandbySpare-support-for-software-inventory.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0026-Add-StandbySpare-support-for-software-inventory.patch new file mode 100644 index 000000000..25ed9a403 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0026-Add-StandbySpare-support-for-software-inventory.patch @@ -0,0 +1,55 @@ +From 826946ecad67b34818db0634367c4cf7100d0890 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Wed, 15 Jan 2020 10:01:04 +0800 +Subject: [PATCH] Add StandbySpare support for software inventory + +Add support to allow update for active / recovery +regions of specified firmware. This update enables +the backend modules to advertise whether the +software object is active or recovery (StandbySpare) +image. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +--- + .../Software/Activation.interface.yaml | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/yaml/xyz/openbmc_project/Software/Activation.interface.yaml b/yaml/xyz/openbmc_project/Software/Activation.interface.yaml +index 6af2984b7b2e..26ab87b0262d 100644 +--- a/yaml/xyz/openbmc_project/Software/Activation.interface.yaml ++++ b/yaml/xyz/openbmc_project/Software/Activation.interface.yaml +@@ -28,12 +28,20 @@ enumerations: + - name: Activating + description: > + The Software.Version is in the process of being Activated. ++ - name: ActivatingAsStandbySpare ++ description: > ++ The Software.Version is in the process of being processed ++ as StandbySpare. + - name: Active + description: > + The Software.Version is currently Active. + - name: Failed + description: > + The Software.Version failed during or after Activation. ++ - name: StandbySpare ++ description: > ++ The Software.Version is part of a redundancy set and awaits ++ a failover or external action to activate. + - name: Staged + description: > + The Software.Version is currently in staged flash area. +@@ -52,6 +60,10 @@ enumerations: + - name: Active + description: > + The Software.Version has been requested for Activation. ++ - name: StandbySpare ++ description: > ++ The Software.Version has been requested to be enabled as ++ StandbySpare. + # TODO: Specify "EAGAIN" type error when requested is unable to be acted on + # due to current system state. Currently, sdbusplus does not support + # errors on properties. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0028-MCTP-Daemon-D-Bus-interface-definition.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0028-MCTP-Daemon-D-Bus-interface-definition.patch new file mode 100644 index 000000000..677b699be --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0028-MCTP-Daemon-D-Bus-interface-definition.patch @@ -0,0 +1,401 @@ +From 2c270f8fd9f45ff0792d2730c25eb2f673314115 Mon Sep 17 00:00:00 2001 +From: "Kowalski, Mariusz" <mariusz.kowalski@intel.com> +Date: Thu, 27 Feb 2020 15:48:56 +0100 +Subject: [PATCH] MCTP Daemon D-Bus interface definition. + +This interface definition was created on base of the MCTP design +proposed in this document: +https://gerrit.openbmc-project.xyz/c/openbmc/docs/+/28424/9/designs/mctp.md + +Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com> +Signed-off-by: Mariusz Kowalski <mariusz.kowalski@intel.com> +Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> +Change-Id: Ida66f8ffcf00003655edcb0fb0112202797b8e1a +--- + .../openbmc_project/MCTP/Base.interface.yaml | 227 ++++++++++++++++++ + .../MCTP/Binding/PCIe.interface.yaml | 29 +++ + .../MCTP/Binding/SMBus.interface.yaml | 17 ++ + .../MCTP/BusOwner.interface.yaml | 17 ++ + .../MCTP/Endpoint.interface.yaml | 4 + + .../MCTP/SupportedMessageTypes.interface.yaml | 36 +++ + 6 files changed, 330 insertions(+) + create mode 100644 yaml/xyz/openbmc_project/MCTP/Base.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml + +diff --git a/yaml/xyz/openbmc_project/MCTP/Base.interface.yaml b/yaml/xyz/openbmc_project/MCTP/Base.interface.yaml +new file mode 100644 +index 000000000000..9438551e648e +--- /dev/null ++++ b/yaml/xyz/openbmc_project/MCTP/Base.interface.yaml +@@ -0,0 +1,227 @@ ++description: > ++ Mandatory interface for each instance of the MCTP Daemon to expose ++ the base MCTP daemon and medium type interfaces. ++ ++methods: ++ - name: SendMctpMessagePayload ++ description: > ++ Sends message over MCTP interface ++ parameters: ++ - name: DestinationEID ++ type: byte ++ description: > ++ Destination Endpoint ID. The logical address used to route MCTP ++ messages to a specific MCTP endpoint. ++ - name: MsgTag ++ type: byte ++ description: > ++ Message tag. Field that, along with the Source Endpoint IDs and the ++ Tag Owner (TO) field, identifies a unique message at the MCTP ++ transport level. ++ - name: TagOwner ++ type: boolean ++ description: > ++ Tag Owner bit identifies whether the message tag was originated by ++ the endpoint that is the source of the message or by the endpoint ++ that is the destination of the message. ++ - name: Payload ++ type: array[byte] ++ description: Payload of message. ++ returns: ++ - name: Status ++ type: byte ++ description: 0 - if success ++ errors: ++ - xyz.openbmc_project.Common.Error.Timeout ++ - xyz.openbmc_project.Common.Error.InvalidArgument ++ - xyz.openbmc_project.Common.Error.InternalFailure ++ ++ - name: SendMctpMessageFileDescriptor ++ description: > ++ Sends message over MCTP interface ++ parameters: ++ - name: DestinationEID ++ type: byte ++ description: > ++ Destination Endpoint ID. The logical address used to route MCTP ++ messages to a specific MCTP endpoint. ++ - name: MsgTag ++ type: byte ++ description: > ++ Message tag. Field that, along with the Source Endpoint IDs and the ++ Tag Owner (TO) field, identifies a unique message at the MCTP ++ transport level. ++ - name: TagOwner ++ type: boolean ++ description: > ++ Tag Owner bit identifies whether the message tag was originated by ++ the endpoint that is the source of the message or by the endpoint ++ that is the destination of the message. ++ - name: FileDescriptor ++ type: unixfd ++ description: File descriptor of message. ++ returns: ++ - name: Status ++ type: byte ++ description: 0 - if success ++ errors: ++ - xyz.openbmc_project.Common.Error.Timeout ++ - xyz.openbmc_project.Common.Error.InvalidArgument ++ - xyz.openbmc_project.Common.Error.InternalFailure ++ ++signals: ++ - name: MessageReceivedSignal ++ description: > ++ Signal indicating upper layers about arrival of a MCTP message. ++ properties: ++ - name: MessageType ++ type: enum[self.MessageTypes] ++ description: > ++ Defines the values for the Message Type field for different message ++ types transported through MCTP. ++ - name: SrcEid ++ type: byte ++ description: > ++ Source Endpoint ID. The logical address used to route MCTP messages ++ to a specific MCTP endpoint. ++ - name: MsgTag ++ type: byte ++ description: > ++ Message tag. Field that, along with the Source Endpoint IDs and the ++ Tag Owner (TO) field, identifies a unique message at the MCTP ++ transport level. ++ - name: TagOwner ++ type: boolean ++ description: > ++ Tag Owner bit identifies whether the message tag was originated by ++ the endpoint that is the source of the message or by the endpoint ++ that is the destination of the message. ++ - name: Payload ++ type: array[byte] ++ description: Payload of message. ++ ++properties: ++ - name: Eid ++ type: byte ++ description: > ++ Endpoint ID. The logical address used to route MCTP messages to a ++ specific MCTP endpoint. ++ ++ - name: BindingID ++ type: enum[self.BindingTypes] ++ ++ - name: BindingMediumID ++ type: enum[self.MctpPhysicalMediumIdentifiers] ++ ++ - name: StaticEid ++ type: boolean ++ description: Support for statically/dynamicly allocated IDs ++ ++ - name: BindingMode ++ type: enum[self.BindingModeTypes] ++ description: Bus Owner / Endpoint / Bridge ++ ++enumerations: ++ - name: BindingTypes ++ description: > ++ All other values than described are reserved. ++ values: ++ - name: MctpOverSmbus ++ - name: MctpOverPcieVdm ++ - name: MctpOverUsb ++ description: Reserved for MCTP over USB ++ - name: MctpOverKcs ++ - name: MctpOverSerial ++ - name: VendorDefined ++ ++ - name: MctpPhysicalMediumIdentifiers ++ description: > ++ Identifies MCTP physical medium identifiers. see DSP0239. ++ values: ++ - name: Smbus ++ descritpion: SMBus 2.0 100 kHz compatible ++ - name: SmbusI2c ++ descritpion: SMBus 2.0 + I2C 100 kHz compatible ++ - name: I2cCompatible ++ description: I2C 100 kHz compatible (Standard-mode) ++ - name: Smbus3OrI2c400khzCompatible ++ description: SMBus 3.0 or I2C 400 kHz compatible (Fast-mode) ++ - name: Smbus3OrI2c1MhzCompatible ++ description: SMBus 3.0 or I2C 1 MHz compatible (Fast-mode Plus) ++ - name: I2c3Mhz4Compatible ++ description: I2C 3.4 MHz compatible (High-speed mode) ++ - name: Pcie11 ++ description: PCIe revision 1.1 compatible ++ - name: Pcie2 ++ description: PCIe revision 2.0 compatible ++ - name: Pcie21 ++ description: PCIe revision 2.1 compatible ++ - name: Pcie3 ++ description: PCIe revision 3.0 compatible ++ - name: Pcie4 ++ description: PCIe revision 4.0 compatible ++ - name: Pcie5 ++ description: PCIe revision 4.0 compatible ++ - name: PciCompatible ++ description: > ++ PCI compatible (PCI 1.0,2.0,2.1,2.2,2.3,3.0,PCI-X 1.0, PCI-X 2.0) ++ - name: Usb11Compatible ++ description: USB 1.1 compatible ++ - name: Usb20Compatible ++ description: USB 2.0 compatible ++ - name: Usb30Compatible ++ description: USB 3.0 compatible ++ - name: NcSiOverRbt ++ description: > ++ NC-SI over RBT (A physical interface based on RMII as defined in ++ DSP0222) ++ - name: KcsLegacy ++ description: KCS1 / Legacy (Fixed Address Decoding) ++ - name: KcsPci ++ description: KCS1 / PCI (Base Class 0xC0 Subclass 0x01) ++ - name: SerialHostLegacy ++ description: Serial Host2 / Legacy (Fixed Address Decoding) ++ - name: SerialHostPci ++ description: Serial Host2 / PCI (Base Class 0x07 Subclass 0x00) ++ - name: AsynchronousSerial ++ description: Asynchronous Serial (Between MCs and IMDs) ++ - name: I3cSDR ++ description: I3C 12.5 MHz compatible (SDR) ++ - name: I3cHDRDDR ++ description: I3C 25 MHz compatible (HDR-DDR) ++ ++ - name: BindingModeTypes ++ values: ++ - name: Endpoint ++ description: > ++ An MCTP communication terminus. An MCTP endpoint is a terminus or ++ origin of MCTP packets or messages. That is, the combined ++ functionality within a physical device that communicates using the ++ MCTP transport protocol and handles MCTP control commands. This ++ includes MCTP-capable management controllers and managed devices. ++ Also referred to in this document as "endpoint". ++ - name: BusOwner ++ description: > ++ The party responsible for managing address assignments (can be ++ logical or physical addresses) on a bus (for example, in MCTP, the ++ bus owner is the party responsible for managing EID assignments for ++ a given bus). A bus owner may also have additional media-specific ++ responsibilities, such as assignment of physical addresses. ++ - name: Bridge ++ description: > ++ An MCTP endpoint that can route MCTP messages not destined for ++ itself that it receives on one interconnect onto another without ++ interpreting them. The ingress and egress media at the bridge may ++ be either homogeneous or heterogeneous. Also referred to in this ++ document as a "bridge". ++ ++ - name: MessageTypes ++ values: ++ - name: MctpControl ++ - name: PLDM ++ - name: NCSI ++ - name: Ethernet ++ - name: NVMeMgmtMsg ++ - name: SPDM ++ - name: VDPCI ++ - name: VDIANA +diff --git a/yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml b/yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml +new file mode 100644 +index 000000000000..1bd28818b39a +--- /dev/null ++++ b/yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml +@@ -0,0 +1,29 @@ ++description: > ++ Interface exposed by MCTP daemon for PCIe binding ++ ++properties: ++ - name: DiscoveredFlag ++ type: enum[self.DiscoveryFlags] ++ description: > ++ Each endpoint (except the bus owner) on the PCIe bus maintains an ++ internal flag called the Discovered flag. The flag is set to the ++ discovered state when the Set Endpoint ID command is received. ++ ++ - name: BDF ++ type: uint16 ++ description: > ++ Byte 1 [7:0] Bus number ++ Byte 2 [7:3] Device number [2:0] Function Number ++ ++enumerations: ++ - name: DiscoveryFlags ++ description: > ++ The Prepare for Endpoint Discovery message causes each recipient ++ endpoint on the PCIe bus to set their respective Discovered flag to ++ the undiscovered state. For the Prepare for Endpoint Discovery request ++ message, the routing in the physical transport header should be set to ++ 011b (Broadcast from Root Complex). ++ values: ++ - name: Discovered ++ - name: Undiscovered ++ - name: NotApplicable +diff --git a/yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml b/yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml +new file mode 100644 +index 000000000000..9219ad02af06 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml +@@ -0,0 +1,17 @@ ++description: > ++ Interface exposed by MCTP daemon for SMBus binding ++ ++properties: ++ - name: ArpMasterSupport ++ type: boolean ++ description: > ++ The SMBus binding can also run ARP Master protocol and ++ assign SMBus addresses to the devices on the bus. ++ ++ - name: BusNumber ++ type: byte ++ description: I2C bus number of the medium used ++ ++ - name: SlaveAddress ++ type: byte ++ description: Slave address to be used for this medium +diff --git a/yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml b/yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml +new file mode 100644 +index 000000000000..d46298ed35b4 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml +@@ -0,0 +1,17 @@ ++description: > ++ Interface exposed by MCTP root object, when executing in Bus Owner mode. ++ ++properties: ++ - name: EidPool ++ type: array[struct[byte, byte]] ++ description: > ++ Pool of allowed EIDs to be used. ++ EID pool of 10-100 can be specified as {{10,100}}. ++ ++ - name: TopMostBusOwner ++ type: boolean ++ description: To indicate whether BMC is topmost Bus Owner ++ ++ - name: OwnEidPool ++ type: boolean ++ description: Indicates Eid pool is managed by self +diff --git a/yaml/xyz/openbmc_project/MCTP/Endpoint.interface.yaml b/yaml/xyz/openbmc_project/MCTP/Endpoint.interface.yaml +index 119f1c673c2c..abb3ac930236 100644 +--- a/yaml/xyz/openbmc_project/MCTP/Endpoint.interface.yaml ++++ b/yaml/xyz/openbmc_project/MCTP/Endpoint.interface.yaml +@@ -6,6 +6,10 @@ description: > + MCTP-capable management controllers and managed devices. + + properties: ++ - name: Mode ++ type: enum[xyz.openbmc_project.MCTP.Base.BindingModeTypes] ++ description: > ++ Endpoint / BusOwner / Bridge + + - name: NetworkId + type: size +diff --git a/yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml b/yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml +new file mode 100644 +index 000000000000..fa447ee6a3bb +--- /dev/null ++++ b/yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml +@@ -0,0 +1,36 @@ ++description: ++ Interface used to represent the supported MCTP message types. ++ This will be exposed by all MCTP endpoints. ++ ++properties: ++ - name: MctpControl ++ type: boolean ++ description: Indicates support availability ++ ++ - name: PLDM ++ type: boolean ++ description: Indicates support availability ++ ++ - name: NCSI ++ type: boolean ++ description: Indicates support availability ++ ++ - name: Ethernet ++ type: boolean ++ description: Indicates support availability ++ ++ - name: NVMeMgmtMsg ++ type: boolean ++ description: Indicates support availability ++ ++ - name: SPDM ++ type: boolean ++ description: Indicates support availability ++ ++ - name: VDPCI ++ type: boolean ++ description: Indicates support availability ++ ++ - name: VDIANA ++ type: boolean ++ description: Indicates support availability +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-D-Bus-interfaces-for-PLDM-FW-update.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-D-Bus-interfaces-for-PLDM-FW-update.patch new file mode 100644 index 000000000..6da1c2693 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0029-Add-D-Bus-interfaces-for-PLDM-FW-update.patch @@ -0,0 +1,494 @@ +From 2da0a05ae9b69cd8da67ced1bcac6ae7c6c5f930 Mon Sep 17 00:00:00 2001 +From: "Gade-RajasekharReddy@" <Gade-RajasekharReddy@> +Date: Wed, 16 Sep 2020 03:19:41 +0530 +Subject: [PATCH] Add D-Bus interfaces for PLDM FW update + +Added PLDM FW update base interface, which exposes a method. Using +this method PLDM FWU can be initiated. + +Added interfaces for exposing PLDM FW update inventory info. + +Test +supporting files are created for the yaml files. + +Signed-off-by: Gade-RajasekharReddy@ <raja.sekhar.reddy.gade@linux.intel.com> +--- + .../PLDM/FWU/ACPIDescriptor.interface.yaml | 14 +++ + ...ActiveComponentImageSetInfo.interface.yaml | 9 ++ + .../FWU/ActiveComponentInfo.interface.yaml | 55 ++++++++++ + .../CapabilitiesDuringUpdate.interface.yaml | 32 ++++++ + .../ComponentActivationMethods.interface.yaml | 40 +++++++ + .../PLDM/FWU/FWUBase.interface.yaml | 21 ++++ + .../PLDM/FWU/IANADescriptor.interface.yaml | 10 ++ + .../PLDM/FWU/PCIDescriptor.interface.yaml | 30 +++++ + ...endingComponentImageSetInfo.interface.yaml | 10 ++ + .../FWU/PendingComponentInfo.interface.yaml | 40 +++++++ + .../PLDM/FWU/PnPDescriptor.interface.yaml | 14 +++ + yaml/xyz/openbmc_project/PLDM/FWU/README.md | 103 ++++++++++++++++++ + 12 files changed, 378 insertions(+) + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml + create mode 100644 yaml/xyz/openbmc_project/PLDM/FWU/README.md + +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml +new file mode 100644 +index 000000000000..e225bade0df0 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml +@@ -0,0 +1,14 @@ ++description : > ++ This interface has ACPI descriptor properties. ++ ++properties : ++ ++ - name : ACPIVendorID ++ type : string ++ description: > ++ Property containing ACPI Vendor ID. ++ ++ - name : ACPIProductIdentifier ++ type : string ++ description: > ++ Property containing ACPI Product Identifier. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml +new file mode 100644 +index 000000000000..94115a33e1d9 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml +@@ -0,0 +1,9 @@ ++description : > ++ This interface has the PLDM FWU active component image set properties. ++ ++properties : ++ ++ - name : ActiveComponentImageSetVersionString ++ type : string ++ description: > ++ String describing the active component image set version. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml +new file mode 100644 +index 000000000000..77a75669439b +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml +@@ -0,0 +1,55 @@ ++description: > ++ This interface has the component entries for all of the updatable ++ active components that reside on the FD. ++ ++properties: ++ ++ - name: ComponentClassification ++ type: uint16 ++ description: > ++ Vendor specific component classification information. ++ Special values: 0x0000, 0xFFFF are reserved. ++ ++ - name: ComponentIdentifier ++ type: uint16 ++ description: > ++ FD vendor selected unique value to distinguish between ++ component images. ++ ++ - name: ComponentClassificationIndex ++ type: byte ++ description: > ++ Used to distinguish identical components that have the same ++ classification and identifier that can use the same component ++ image but the images are stored in different locations in the FD. ++ ++ - name: ActiveComponentComparisonStamp ++ type: uint32 ++ description: > ++ Optional Firmware component comparison stamp that is currently ++ active. If the firmware component does not provide a component ++ comparison stamp, this value should be set to 0x00000000. ++ ++ - name: ActiveComponentReleaseDate ++ type: string ++ description: > ++ Containing the date corresponding to the component version ++ level being reported – Format YYYYMMDD. ++ If the firmware component does not provide a date, this string ++ shall be empty. ++ ++ - name: ComponentAutoApply ++ type: boolean ++ description: > ++ Firmware Device performs an ‘auto-apply’ during transfer ++ phase and apply step will be completed immediately if this ++ property is true. ++ Firmware Device will execute an operation during the APPLY ++ state that will include migrating the new component image to its ++ final non-volatile storage destination if this property is ++ false. ++ ++ - name: ActiveComponentVersionString ++ type: string ++ description: > ++ String describing the active component version. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml +new file mode 100644 +index 000000000000..36560ff0742b +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml +@@ -0,0 +1,32 @@ ++description : > ++ This interface describes the capabilities during update. ++ ++properties : ++ ++ - name : UpdateModeRestrictions ++ type : boolean ++ description: > ++ This property tells whether update mode restrictions are ++ supported or not. ++ ++ - name : PartialUpdates ++ type : boolean ++ description: > ++ This property tells whether partial updates are supported or not. ++ ++ - name : HostFunctionalityDuringFirmwareUpdate ++ type : boolean ++ description: > ++ This property tells whether the host device functionality ++ during firmware update is reduced or not. ++ ++ - name : ComponentUpdateFailureRetryCapability ++ type : boolean ++ description: > ++ This property shows the component update failure retry capability. ++ ++ - name : ComponentUpdateFailureRecoveryCapability ++ type : boolean ++ description: > ++ This property shows the component update failure recovery ++ capability. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml +new file mode 100644 +index 000000000000..d5ec47cbc77f +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml +@@ -0,0 +1,40 @@ ++description: > ++ This interface has the component activation methods. ++ ++properties: ++ ++ - name: ACPowerCycle ++ type: boolean ++ description: > ++ Property that tells whether AC power cycle is an activation ++ method or not. ++ ++ - name: DCPowerCycle ++ type: boolean ++ description: > ++ Property that tells whether DC power cycle is an activation ++ method or not. ++ ++ - name: SystemReboot ++ type: boolean ++ description: > ++ Property that tells whether System reboot is an activation ++ method or not. ++ ++ - name: MediumSpecificReset ++ type: boolean ++ description: > ++ Property that tells whether Medium-specific reset is an ++ activation method or not. ++ ++ - name: SelfContained ++ type: boolean ++ description: > ++ Property that tells whether Self-Contained option is activation ++ method or not. ++ ++ - name: Automatic ++ type: boolean ++ description: > ++ Property that tells whether the component can be activated ++ automatically once apply completes. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml +new file mode 100644 +index 000000000000..2ba15e26c690 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml +@@ -0,0 +1,21 @@ ++description: > ++ This interface provides a method to initiate the PLDM FW update. ++ ++methods: ++ - name: StartFWUpdate ++ description: > ++ This method initiates the PLDM FW update. ++ parameters: ++ - name: filePath ++ type: string ++ description: > ++ PLDM FW update package path. ++ returns: ++ - name: status ++ type: byte ++ description: > ++ PLDM FW update status. ++ errors: ++ - xyz.openbmc_project.Common.Error.NotAllowed ++ - xyz.openbmc_project.Common.Error.InvalidArgument ++ - xyz.openbmc_project.Common.Error.ResourceNotFound +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml +new file mode 100644 +index 000000000000..c013955af3b6 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml +@@ -0,0 +1,10 @@ ++description : > ++ This interface has device identification info, in which IANA ++ Enterprise ID is used as descriptor. ++ ++properties : ++ ++ - name : IANAEnterpriseID ++ type : string ++ description: > ++ Property containing the IANA Enterprise ID. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml +new file mode 100644 +index 000000000000..8d758ed51192 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml +@@ -0,0 +1,30 @@ ++description : > ++ This interface has device identification info,in which PCI Vendor ID ++ is used as descriptor. ++ ++properties : ++ ++ - name : PCIVendorID ++ type : string ++ description: > ++ Property containing the PCI Vendor ID. ++ ++ - name : PCIDeviceID ++ type : string ++ description: > ++ Property containing the PCI Device ID. ++ ++ - name : PCISubsystemVendorID ++ type : string ++ description: > ++ Property containing the PCI Subsystem Vendor ID. ++ ++ - name : PCISubsystemID ++ type : string ++ description: > ++ Property containing the PCI Subsystem ID. ++ ++ - name : PCIRevisionID ++ type : string ++ description: > ++ Property containing the PCI Revision ID. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml +new file mode 100644 +index 000000000000..3861572d81a4 +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml +@@ -0,0 +1,10 @@ ++description : > ++ This interface has the PLDM FWU pending component image set ++ properties. ++ ++properties : ++ ++ - name : PendingComponentImageSetVersionString ++ type : string ++ description: > ++ String describing the pending component image set version. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml +new file mode 100644 +index 000000000000..59a2ad8dae8c +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml +@@ -0,0 +1,40 @@ ++description: > ++ This interface has the component entries for all of the pending ++ components that reside on the FD. ++ ++properties: ++ ++ - name: PendingComponentComparisonStamp ++ type: uint32 ++ description: > ++ Optional firmware component comparison stamp that is pending ++ activation. This field, and all other pending component fields, ++ are valid once the firmware device has received the ++ ActivateFirmware command to prepare the firmware component for ++ activation, but the activation method requires further action ++ to enable the pending image to become the actively running code ++ image. ++ If no pending firmware component exists, this value shall be ++ set to 0x00000000 ++ ++ - name: PendingComponentReleaseDate ++ type: string ++ description: > ++ Eight byte field containing the date corresponding to the ++ component version level being reported – Format YYYYMMDD. ++ If no pending firmware component exists, this string ++ shall be empty. ++ ++ ++ - name: PendingComponentVersionString ++ type: string ++ description: > ++ Firmware component version, which is pending activation. The ++ version reported here should be the one that will become active ++ on the next initialization or activation of the component. The ++ pending component version value may be same as the active ++ component version. Contains a variable type string describing ++ the pending component version. Refer to ++ PendingComponentComparisonStamp field for additional details. ++ If no pending firmware component exists, this field is zero ++ bytes in length. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml b/yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml +new file mode 100644 +index 000000000000..801db6d6380c +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml +@@ -0,0 +1,14 @@ ++description : > ++ This interface has PnP descriptor properties. ++ ++properties : ++ ++ - name : PnPVendorID ++ type : string ++ description: > ++ Property containing the PnP Vendor ID. ++ ++ - name : PnPProductIdentifier ++ type : string ++ description: > ++ Property containing the PnP Product Identifier. +diff --git a/yaml/xyz/openbmc_project/PLDM/FWU/README.md b/yaml/xyz/openbmc_project/PLDM/FWU/README.md +new file mode 100644 +index 000000000000..293173933baf +--- /dev/null ++++ b/yaml/xyz/openbmc_project/PLDM/FWU/README.md +@@ -0,0 +1,103 @@ ++#PLDM FW Update ++ ++##Overview ++ ++The PLDM FW update package contains two major sections: the FW package ++header, and the FW package payload. The FW package header is required to ++describe the target device that the package is intended to update and ++the component images that the FW update package contains. The FW ++package payload is the actual FW image which can be used by FW device ++for FW update. ++ ++Update Agent(BMC) will send the inventory commands to the all the ++devices which are capable of PLDM FW update and exposes the inventory ++info to the D-Bus. How PLDM FW update package reaches BMC is out of ++scope of PLDM FWU spec 1.0.1. Once BMC receives the FW package, it ++matches the package header with the inventory info, if matches proceeds ++for FW update. ++ ++###PLDM FW update interfaces overview and hierarchy ++ ++/xyz/openbmc_project/pldm/fwu ++|--xyz.openbmc_project.PLDM.FWU.FWUBase ++| ++|__/xyz/openbmc_project/pldm/fwu/<tid> ++ | ++ |__/xyz/openbmc_project/pldm/fwu/<tid>/deviceDescriptors ++ | |--xyz.openbmc_project.PLDM.FWU.PCIDescriptor ++ | |--xyz.openbmc_project.PLDM.FWU.IANADescriptor ++ | |--xyz.openbmc_project.PLDM.FWU.PnPDescriptor ++ | |--xyz.openbmc_project.PLDM.FWU.ACPIDescriptor ++ | ++ |__/xyz/openbmc_project/pldm/fwu/<tid>/componentImageSetInfo ++ | |--xyz.openbmc_project.PLDM.FWU.ActiveComponentImageSetInfo ++ | |--xyz.openbmc_project.PLDM.FWU.PendingComponentImageSetInfo ++ | ++ |__/xyz/openbmc_project/pldm/fwu/<tid>/componentImageSetInfo/component_<component_no> ++ |--xyz.openbmc_project.PLDM.FWU.ActiveComponentInfo ++ |--xyz.openbmc_project.PLDM.FWU.PendingComponentInfo ++ |--xyz.openbmc_project.PLDM.FWU.ComponentActivationMethods ++ |--xyz.openbmc_project.PLDM.FWU.CapabilitiesDuringUpdate ++ ++Note: ++Descriptor for a device shall be defined by one of the following ++(PCI Vendor ID, IANA Enterprise ID, UUID, PnP Vendor ID, or ACPI Vendor ++ID) and the corresponding descriptor`s interface is exposed by the. ++Device Descriptors object. ++No new UUID descriptor incterface is defined as the existing UUID ++interface will be used. ++ ++####FW Update Base ++It is exposed by the object `/xyz/openbmc_project/pldm/fwu` with the ++following interface ++1. `xyz.openbmc_project.pldm.FWUBase` exposes a method by which PLDM ++FWU can be initiated. ++ ++Each FW update capable device info is exposed by the object ++`/xyz/openbmc_project/pldm/fwu/<tid>`. ++It will have the following objects. ++1. Device Descriptors ++2. Component Image Set Info ++3. Component Image Info (Each component is exposed as an object) ++ ++####Device Descriptors ++Device Descriptors are exposed under the object path ++`/xyz/openbmc_project/pldm/fwu/deviceDescriptors` with one of the ++following interfaces. ++1. `xyz.openbmc_project.PLDM.FWU.PCIDescriptor` which exposes the PCI ++device descriptors. If the FD is a PCI device then this interface will ++be exposed by the device descriptors object. ++2. `xyz.openbmc_project.PLDM.FWU.IANADescriptor` which exposes IANA ++descriptor properties. If FD have IANA Enterprise ID as the descriptor ++type then this interface will be exposed by the device descriptors ++object. ++3. `xyz.openbmc_project.PLDM.FWU.PnPDescriptor` which exposes the Pnp ++descriptor properties. If FD have PnP vendor ID as the descriptor ++type then this interface will be exposed by the device descriptors ++object. ++4. `xyz.openbmc_project.PLDM.FWU.ACPIDescriptor` which exposes the ACPI ++descriptor properties. If FD have ACPI vendor ID as the descriptor ++type then this interface will be exposed by the device descriptors ++object. ++ ++####Component Image Set Info ++Component Image Set Info is exposed under the object path ++`/xyz/openbmc_project/pldm/fwu/componentImageSetInfo` with the ++following interface. ++1. `xyz.openbmc_project.PLDM.FWU.ActiveComponentImageSetInfo` which ++exposes the active component image set properties. ++2. `xyz.openbmc_project.PLDM.FWU.PendingComponentImageSetInfo` which ++exposes the pending component image set properties. ++ ++####Component Image Info ++Component Image Info is exposed under the object path ++`/xyz/openbmc_project/pldm/fwu/componentImageSetInfo/componentInfo_<component_no>' ++with the following interface ++1. `xyz.openbmc_project.PLDM.FWU.ActiveComponentInfo` which exposes the ++component Image properties. ++2. `xyz.openbmc_project.PLDM.FWU.PendingComponentInfo` which exposes the ++component Image properties. ++3. `xyz.openbmc_project.PLDM.FWU.CapabilitiesDuringUpdate` which exposes ++the capabilities of the component during update. ++4. `xyz.openbmc_project.PLDM.FWU.ComponentActivationMethods` which ++exposes the component activation methods. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0030-Add-PLDM-version-purpose-enumeration.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0030-Add-PLDM-version-purpose-enumeration.patch new file mode 100644 index 000000000..0a57733aa --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0030-Add-PLDM-version-purpose-enumeration.patch @@ -0,0 +1,28 @@ +From 114687e8f5b4728bd5d82b3c2dbc97cb40273cb8 Mon Sep 17 00:00:00 2001 +From: Ayushi Smriti <smriti.ayushi@intel.com> +Date: Wed, 23 Sep 2020 22:01:25 +0530 +Subject: [PATCH] Add PLDM version purpose enumeration + +This change is to add PLDM in enumeration of possible purposes +of the version to support pldm type version purpose + +Change-Id: I7b914d4323bfe44a4e3cd60ed4a627aeceb6b56f +Signed-off-by: Ayushi Smriti <smriti.ayushi@intel.com> +--- + yaml/xyz/openbmc_project/Software/Version.interface.yaml | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/yaml/xyz/openbmc_project/Software/Version.interface.yaml b/yaml/xyz/openbmc_project/Software/Version.interface.yaml +index 345e5b51f653..f2efbecce938 100644 +--- a/yaml/xyz/openbmc_project/Software/Version.interface.yaml ++++ b/yaml/xyz/openbmc_project/Software/Version.interface.yaml +@@ -38,3 +38,6 @@ enumerations: + - name: PSU + description: > + The version is a version for a PSU. ++ - name: PLDM ++ description: > ++ The version is a version for PLDM. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0031-update-meson-build-files-for-control-and-bios.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0031-update-meson-build-files-for-control-and-bios.patch new file mode 100644 index 000000000..31c5ad95b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0031-update-meson-build-files-for-control-and-bios.patch @@ -0,0 +1,149 @@ +From 20357179065a9157ad89f7c717ba214bf4fe4ded Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 8 Dec 2020 15:08:21 -0800 +Subject: [PATCH] update meson build files for control and bios + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + .../Control/Power/RestoreDelay/meson.build | 13 +++++++++++++ + gen/xyz/openbmc_project/Control/Power/meson.build | 14 ++++++++++++++ + .../Control/Processor/ErrConfig/meson.build | 13 +++++++++++++ + .../openbmc_project/Control/Processor/meson.build | 13 +++++++++++++ + .../Inventory/Item/Bios/meson.build | 13 +++++++++++++ + gen/xyz/openbmc_project/Inventory/Item/meson.build | 14 ++++++++++++++ + 6 files changed, 80 insertions(+) + create mode 100644 gen/xyz/openbmc_project/Control/Power/RestoreDelay/meson.build + create mode 100644 gen/xyz/openbmc_project/Control/Processor/ErrConfig/meson.build + create mode 100644 gen/xyz/openbmc_project/Inventory/Item/Bios/meson.build + +diff --git a/gen/xyz/openbmc_project/Control/Power/RestoreDelay/meson.build b/gen/xyz/openbmc_project/Control/Power/RestoreDelay/meson.build +new file mode 100644 +index 000000000000..1afe8d26b87d +--- /dev/null ++++ b/gen/xyz/openbmc_project/Control/Power/RestoreDelay/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/Control/Power/RestoreDelay__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/Control/Power/RestoreDelay', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/Control/Power/meson.build b/gen/xyz/openbmc_project/Control/Power/meson.build +index dbd3b409ead0..43ccf1958aa9 100644 +--- a/gen/xyz/openbmc_project/Control/Power/meson.build ++++ b/gen/xyz/openbmc_project/Control/Power/meson.build +@@ -41,6 +41,20 @@ generated_others += custom_target( + ], + ) + ++subdir('RestoreDelay') ++generated_others += custom_target( ++ 'xyz/openbmc_project/Control/Power/RestoreDelay__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/Control/Power/RestoreDelay.interface.yaml', ], ++ output: [ 'RestoreDelay.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/Control/Power/RestoreDelay', ++ ], ++) ++ + subdir('RestorePolicy') + generated_others += custom_target( + 'xyz/openbmc_project/Control/Power/RestorePolicy__markdown'.underscorify(), +diff --git a/gen/xyz/openbmc_project/Control/Processor/ErrConfig/meson.build b/gen/xyz/openbmc_project/Control/Processor/ErrConfig/meson.build +new file mode 100644 +index 000000000000..937004d3d68b +--- /dev/null ++++ b/gen/xyz/openbmc_project/Control/Processor/ErrConfig/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/Control/Processor/ErrConfig__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/Control/Processor/ErrConfig', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/Control/Processor/meson.build b/gen/xyz/openbmc_project/Control/Processor/meson.build +index fc32bf2f877f..cc2a1d6507b3 100644 +--- a/gen/xyz/openbmc_project/Control/Processor/meson.build ++++ b/gen/xyz/openbmc_project/Control/Processor/meson.build +@@ -13,3 +13,16 @@ generated_others += custom_target( + ], + ) + ++subdir('ErrConfig') ++generated_others += custom_target( ++ 'xyz/openbmc_project/Control/Processor/ErrConfig__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/Control/Processor/ErrConfig.interface.yaml', ], ++ output: [ 'ErrConfig.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/Control/Processor/ErrConfig', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/Inventory/Item/Bios/meson.build b/gen/xyz/openbmc_project/Inventory/Item/Bios/meson.build +new file mode 100644 +index 000000000000..28fbf85dd97c +--- /dev/null ++++ b/gen/xyz/openbmc_project/Inventory/Item/Bios/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/Inventory/Item/Bios__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/Inventory/Item/Bios', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/Inventory/Item/meson.build b/gen/xyz/openbmc_project/Inventory/Item/meson.build +index 77d9be8b6c03..7d22037b32b8 100644 +--- a/gen/xyz/openbmc_project/Inventory/Item/meson.build ++++ b/gen/xyz/openbmc_project/Inventory/Item/meson.build +@@ -40,6 +40,20 @@ generated_others += custom_target( + ], + ) + ++subdir('Bios') ++generated_others += custom_target( ++ 'xyz/openbmc_project/Inventory/Item/Bios__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/Inventory/Item/Bios.interface.yaml', ], ++ output: [ 'Bios.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/Inventory/Item/Bios', ++ ], ++) ++ + subdir('Bmc') + generated_others += custom_target( + 'xyz/openbmc_project/Inventory/Item/Bmc__markdown'.underscorify(), +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0032-update-meson-build-for-MCTP-interfaces.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0032-update-meson-build-for-MCTP-interfaces.patch new file mode 100644 index 000000000..ab13f55fe --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0032-update-meson-build-for-MCTP-interfaces.patch @@ -0,0 +1,209 @@ +From f4eddacc871c6bb759e6e355a89ccaaa12c63396 Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 8 Dec 2020 15:16:25 -0800 +Subject: [PATCH] update meson build for MCTP interfaces + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + gen/xyz/openbmc_project/MCTP/Base/meson.build | 13 ++++++ + .../MCTP/Binding/PCIe/meson.build | 13 ++++++ + .../MCTP/Binding/SMBus/meson.build | 13 ++++++ + .../openbmc_project/MCTP/Binding/meson.build | 30 +++++++++++++ + .../openbmc_project/MCTP/BusOwner/meson.build | 13 ++++++ + .../MCTP/SupportedMessageTypes/meson.build | 13 ++++++ + gen/xyz/openbmc_project/MCTP/meson.build | 42 +++++++++++++++++++ + 7 files changed, 137 insertions(+) + create mode 100644 gen/xyz/openbmc_project/MCTP/Base/meson.build + create mode 100644 gen/xyz/openbmc_project/MCTP/Binding/PCIe/meson.build + create mode 100644 gen/xyz/openbmc_project/MCTP/Binding/SMBus/meson.build + create mode 100644 gen/xyz/openbmc_project/MCTP/Binding/meson.build + create mode 100644 gen/xyz/openbmc_project/MCTP/BusOwner/meson.build + create mode 100644 gen/xyz/openbmc_project/MCTP/SupportedMessageTypes/meson.build + +diff --git a/gen/xyz/openbmc_project/MCTP/Base/meson.build b/gen/xyz/openbmc_project/MCTP/Base/meson.build +new file mode 100644 +index 000000000000..c605b2d496ac +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/Base/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/MCTP/Base__cpp'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/MCTP/Base.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Base', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/Binding/PCIe/meson.build b/gen/xyz/openbmc_project/MCTP/Binding/PCIe/meson.build +new file mode 100644 +index 000000000000..4573a64f4099 +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/Binding/PCIe/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/MCTP/Binding/PCIe__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Binding/PCIe', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/Binding/SMBus/meson.build b/gen/xyz/openbmc_project/MCTP/Binding/SMBus/meson.build +new file mode 100644 +index 000000000000..bfb4d040a54c +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/Binding/SMBus/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/MCTP/Binding/SMBus__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Binding/SMBus', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/Binding/meson.build b/gen/xyz/openbmc_project/MCTP/Binding/meson.build +new file mode 100644 +index 000000000000..36a74ddac294 +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/Binding/meson.build +@@ -0,0 +1,28 @@ ++# Generated file; do not modify. ++subdir('PCIe') ++generated_others += custom_target( ++ 'xyz/openbmc_project/MCTP/Binding/PCIe__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/MCTP/Binding/PCIe.interface.yaml', ], ++ output: [ 'PCIe.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Binding/PCIe', ++ ], ++) ++ ++subdir('SMBus') ++generated_others += custom_target( ++ 'xyz/openbmc_project/MCTP/Binding/SMBus__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/MCTP/Binding/SMBus.interface.yaml', ], ++ output: [ 'SMBus.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Binding/SMBus', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/BusOwner/meson.build b/gen/xyz/openbmc_project/MCTP/BusOwner/meson.build +new file mode 100644 +index 000000000000..4b28bd6b34e7 +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/BusOwner/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/MCTP/BusOwner__cpp'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/BusOwner', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/SupportedMessageTypes/meson.build b/gen/xyz/openbmc_project/MCTP/SupportedMessageTypes/meson.build +new file mode 100644 +index 000000000000..4fd46823ed17 +--- /dev/null ++++ b/gen/xyz/openbmc_project/MCTP/SupportedMessageTypes/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/MCTP/SupportedMessageTypes__cpp'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/MCTP/SupportedMessageTypes', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/MCTP/meson.build b/gen/xyz/openbmc_project/MCTP/meson.build +index b9598adf6fa7..6b6d00b833d2 100644 +--- a/gen/xyz/openbmc_project/MCTP/meson.build ++++ b/gen/xyz/openbmc_project/MCTP/meson.build +@@ -1,4 +1,33 @@ + # Generated file; do not modify. ++subdir('Base') ++generated_others += custom_target( ++ 'xyz/openbmc_project/MCTP/Base__markdown'.underscorify(), ++ input: [ '../../../../yaml/xyz/openbmc_project/MCTP/Base.interface.yaml', ], ++ output: [ 'Base.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../yaml', ++ 'xyz/openbmc_project/MCTP/Base', ++ ], ++) ++ ++subdir('Binding') ++subdir('BusOwner') ++generated_others += custom_target( ++ 'xyz/openbmc_project/MCTP/BusOwner__markdown'.underscorify(), ++ input: [ '../../../../yaml/xyz/openbmc_project/MCTP/BusOwner.interface.yaml', ], ++ output: [ 'BusOwner.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../yaml', ++ 'xyz/openbmc_project/MCTP/BusOwner', ++ ], ++) ++ + subdir('Endpoint') + generated_others += custom_target( + 'xyz/openbmc_project/MCTP/Endpoint__markdown'.underscorify(), +@@ -13,3 +42,16 @@ generated_others += custom_target( + ], + ) + ++subdir('SupportedMessageTypes') ++generated_others += custom_target( ++ 'xyz/openbmc_project/MCTP/SupportedMessageTypes__markdown'.underscorify(), ++ input: [ '../../../../yaml/xyz/openbmc_project/MCTP/SupportedMessageTypes.interface.yaml', ], ++ output: [ 'SupportedMessageTypes.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../yaml', ++ 'xyz/openbmc_project/MCTP/SupportedMessageTypes', ++ ], ++) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0033-update-meson-build-for-PLDM-FWU-interfaces.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0033-update-meson-build-for-PLDM-FWU-interfaces.patch new file mode 100644 index 000000000..6497d50d8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0033-update-meson-build-for-PLDM-FWU-interfaces.patch @@ -0,0 +1,418 @@ +From f73c64bbe2cf9369892269a71893e2911753ba4d Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 8 Dec 2020 15:28:42 -0800 +Subject: [PATCH] update meson build for PLDM FWU interfaces + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + .../PLDM/FWU/ACPIDescriptor/meson.build | 13 ++ + .../ActiveComponentImageSetInfo/meson.build | 13 ++ + .../PLDM/FWU/ActiveComponentInfo/meson.build | 13 ++ + .../FWU/CapabilitiesDuringUpdate/meson.build | 13 ++ + .../ComponentActivationMethods/meson.build | 13 ++ + .../PLDM/FWU/FWUBase/meson.build | 13 ++ + .../PLDM/FWU/IANADescriptor/meson.build | 13 ++ + .../PLDM/FWU/PCIDescriptor/meson.build | 13 ++ + .../PendingComponentImageSetInfo/meson.build | 13 ++ + .../PLDM/FWU/PendingComponentInfo/meson.build | 13 ++ + .../PLDM/FWU/PnPDescriptor/meson.build | 13 ++ + gen/xyz/openbmc_project/PLDM/FWU/meson.build | 154 ++++++++++++++++++ + gen/xyz/openbmc_project/PLDM/meson.build | 1 + + 13 files changed, 298 insertions(+) + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/FWUBase/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/IANADescriptor/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/PCIDescriptor/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/PnPDescriptor/meson.build + create mode 100644 gen/xyz/openbmc_project/PLDM/FWU/meson.build + +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor/meson.build +new file mode 100644 +index 000000000000..fbaf6c458645 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ACPIDescriptor__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ACPIDescriptor', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo/meson.build +new file mode 100644 +index 000000000000..af3df1483126 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo/meson.build +new file mode 100644 +index 000000000000..e5ff324231f5 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate/meson.build +new file mode 100644 +index 000000000000..03768e24090f +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods/meson.build +new file mode 100644 +index 000000000000..31cffd2e311b +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/FWUBase/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/FWUBase/meson.build +new file mode 100644 +index 000000000000..3b90b51e1b7f +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/FWUBase/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/FWUBase__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/FWUBase', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/IANADescriptor/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/IANADescriptor/meson.build +new file mode 100644 +index 000000000000..5d28fb5cca5a +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/IANADescriptor/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/IANADescriptor__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/IANADescriptor', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/PCIDescriptor/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/PCIDescriptor/meson.build +new file mode 100644 +index 000000000000..0c2a5d572dd1 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/PCIDescriptor/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PCIDescriptor__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PCIDescriptor', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo/meson.build +new file mode 100644 +index 000000000000..3fe7d85bbb29 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo/meson.build +new file mode 100644 +index 000000000000..a4d11a3317a4 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentInfo__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentInfo', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/PnPDescriptor/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/PnPDescriptor/meson.build +new file mode 100644 +index 000000000000..d0508ca366ae +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/PnPDescriptor/meson.build +@@ -0,0 +1,13 @@ ++# Generated file; do not modify. ++generated_sources += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PnPDescriptor__cpp'.underscorify(), ++ input: [ '../../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml', ], ++ output: [ 'server.cpp', 'server.hpp', 'client.hpp', ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'cpp', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PnPDescriptor', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/FWU/meson.build b/gen/xyz/openbmc_project/PLDM/FWU/meson.build +new file mode 100644 +index 000000000000..2bb71914b606 +--- /dev/null ++++ b/gen/xyz/openbmc_project/PLDM/FWU/meson.build +@@ -0,0 +1,154 @@ ++# Generated file; do not modify. ++subdir('ACPIDescriptor') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ACPIDescriptor__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ACPIDescriptor.interface.yaml', ], ++ output: [ 'ACPIDescriptor.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ACPIDescriptor', ++ ], ++) ++ ++subdir('ActiveComponentImageSetInfo') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo.interface.yaml', ], ++ output: [ 'ActiveComponentImageSetInfo.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentImageSetInfo', ++ ], ++) ++ ++subdir('ActiveComponentInfo') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo.interface.yaml', ], ++ output: [ 'ActiveComponentInfo.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ActiveComponentInfo', ++ ], ++) ++ ++subdir('CapabilitiesDuringUpdate') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate.interface.yaml', ], ++ output: [ 'CapabilitiesDuringUpdate.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/CapabilitiesDuringUpdate', ++ ], ++) ++ ++subdir('ComponentActivationMethods') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods.interface.yaml', ], ++ output: [ 'ComponentActivationMethods.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/ComponentActivationMethods', ++ ], ++) ++ ++subdir('FWUBase') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/FWUBase__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/FWUBase.interface.yaml', ], ++ output: [ 'FWUBase.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/FWUBase', ++ ], ++) ++ ++subdir('IANADescriptor') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/IANADescriptor__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/IANADescriptor.interface.yaml', ], ++ output: [ 'IANADescriptor.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/IANADescriptor', ++ ], ++) ++ ++subdir('PCIDescriptor') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PCIDescriptor__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PCIDescriptor.interface.yaml', ], ++ output: [ 'PCIDescriptor.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PCIDescriptor', ++ ], ++) ++ ++subdir('PendingComponentImageSetInfo') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo.interface.yaml', ], ++ output: [ 'PendingComponentImageSetInfo.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentImageSetInfo', ++ ], ++) ++ ++subdir('PendingComponentInfo') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentInfo__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PendingComponentInfo.interface.yaml', ], ++ output: [ 'PendingComponentInfo.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PendingComponentInfo', ++ ], ++) ++ ++subdir('PnPDescriptor') ++generated_others += custom_target( ++ 'xyz/openbmc_project/PLDM/FWU/PnPDescriptor__markdown'.underscorify(), ++ input: [ '../../../../../yaml/xyz/openbmc_project/PLDM/FWU/PnPDescriptor.interface.yaml', ], ++ output: [ 'PnPDescriptor.md' ], ++ command: [ ++ sdbuspp_gen_meson_prog, '--command', 'markdown', ++ '--output', meson.current_build_dir(), ++ '--tool', sdbusplusplus_prog, ++ '--directory', meson.current_source_dir() / '../../../../../yaml', ++ 'xyz/openbmc_project/PLDM/FWU/PnPDescriptor', ++ ], ++) +diff --git a/gen/xyz/openbmc_project/PLDM/meson.build b/gen/xyz/openbmc_project/PLDM/meson.build +index 2be636cbaac0..35ff301901b3 100644 +--- a/gen/xyz/openbmc_project/PLDM/meson.build ++++ b/gen/xyz/openbmc_project/PLDM/meson.build +@@ -13,6 +13,7 @@ generated_others += custom_target( + ], + ) + ++subdir('FWU') + subdir('PDR') + generated_others += custom_target( + 'xyz/openbmc_project/PLDM/PDR__markdown'.underscorify(), +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0034-Add-username-property-to-SessionInfo-interface.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0034-Add-username-property-to-SessionInfo-interface.patch new file mode 100644 index 000000000..f614f88c6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0034-Add-username-property-to-SessionInfo-interface.patch @@ -0,0 +1,64 @@ +From ee72d92baf3d64d066e0ec64cbd8723177219182 Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Tue, 1 Jun 2021 12:27:50 +0000 +Subject: [PATCH] Add username property to SessionInfo interface + +Add username property to SessionInfo interface to get username info on +individual IPMI session Id's on Redfish + +Tested: +Verified on SessionInfo D-bus interface. + +busctl introspect xyz.openbmc_project.Ipmi.Channel.eth0 + /xyz/openbmc_project/ipmi/session/eth0/0 +NAME TYPE SIGNATURE RESULT/VALUE FLAGS +...... +xyz.openbmc_project.Ipmi.SessionInfo interface - - - +.ChannelNum property y 0 emits-change writable +.CurrentPrivilege property y 0 emits-change writable +.RemoteIPAddr property u 2225389066 emits-change writable +.RemoteMACAddress property ay 0 emits-change writable +.RemotePort property q 35749 emits-change writable +.SessionHandle property y 0 emits-change writable +.State property y 0 emits-change writable +.UserID property y 0 emits-change writable +.Username property s "" emits-change writable + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + yaml/xyz/openbmc_project/Ipmi/SESSION_README.md | 1 + + yaml/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml | 6 ++++++ + 2 files changed, 7 insertions(+) + +diff --git a/yaml/xyz/openbmc_project/Ipmi/SESSION_README.md b/yaml/xyz/openbmc_project/Ipmi/SESSION_README.md +index c59b251bb88d..ed41c3bf181d 100644 +--- a/yaml/xyz/openbmc_project/Ipmi/SESSION_README.md ++++ b/yaml/xyz/openbmc_project/Ipmi/SESSION_README.md +@@ -16,6 +16,7 @@ so that both phosphor-ipmi-host & phosphr-ipmi-net will be in sync. + * RemotePort - Remote port address. + * RemoteMACAddress -Remote MAC Address. + * UserID - Session created by given user id. ++* Username - Session created by given username. + + + +diff --git a/yaml/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml b/yaml/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml +index 0ddc0250db50..50aff5c26072 100644 +--- a/yaml/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml ++++ b/yaml/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml +@@ -46,6 +46,12 @@ properties: + Session created by given user ID. + errors: + - xyz.openbmc_project.Common.Error.InternalFailure ++ - name: Username ++ type: string ++ description: > ++ Session created by given username. ++ errors: ++ - xyz.openbmc_project.Common.Error.InternalFailure + - name: State + type: byte + default: 0 +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend new file mode 100644 index 000000000..b8e0e7741 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend @@ -0,0 +1,22 @@ +# Keep this as a comment to enable the auto-bump script without +# stomping on SRC_URI from previous .bbappend files +#SRC_URI = "git://github.com/openbmc/phosphor-dbus-interfaces.git" +SRCREV = "e0764cf41d16b823a519e9d4f508b588e3e84aba" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += "file://0007-ipmi-set-BIOS-id.patch \ + file://0010-Increase-the-default-watchdog-timeout-value.patch \ + file://0012-Add-RestoreDelay-interface-for-power-restore-delay.patch \ + file://0013-Add-ErrConfig.yaml-interface-for-processor-error-config.patch \ + file://0024-Add-the-pre-timeout-interrupt-defined-in-IPMI-spec.patch \ + file://0025-Add-PreInterruptFlag-properity-in-DBUS.patch \ + file://0026-Add-StandbySpare-support-for-software-inventory.patch \ + file://0028-MCTP-Daemon-D-Bus-interface-definition.patch \ + file://0029-Add-D-Bus-interfaces-for-PLDM-FW-update.patch \ + file://0031-update-meson-build-files-for-control-and-bios.patch \ + file://0030-Add-PLDM-version-purpose-enumeration.patch \ + file://0032-update-meson-build-for-MCTP-interfaces.patch \ + file://0033-update-meson-build-for-PLDM-FWU-interfaces.patch \ + file://0034-Add-username-property-to-SessionInfo-interface.patch \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper/xyz.openbmc_project.ObjectMapper.service b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper/xyz.openbmc_project.ObjectMapper.service new file mode 100644 index 000000000..9af9af254 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper/xyz.openbmc_project.ObjectMapper.service @@ -0,0 +1,20 @@ +[Unit] +Description=Phosphor DBus Service Discovery Manager +Before=obmc-mapper.target +After=dbus.socket + +[Service] +Restart=always +Type=dbus +ExecStart=/usr/bin/env mapperx \ + --service-namespaces="xyz. com. org." \ + --interface-namespaces="org. com. xyz." \ + --service-blacklists="org.freedesktop.systemd1" +SyslogIdentifier=phosphor-mapper +BusName={BUSNAME} +TimeoutStartSec=300 +RestartSec=5 +EnvironmentFile={envfiledir}/obmc/mapper + +[Install] +WantedBy={SYSTEMD_DEFAULT_TARGET} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper_%.bbappend new file mode 100644 index 000000000..4fc41d058 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-mapper_%.bbappend @@ -0,0 +1 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/0001-allow-dbus-sensors-without-thresholds.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/0001-allow-dbus-sensors-without-thresholds.patch new file mode 100644 index 000000000..6af0a5702 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/0001-allow-dbus-sensors-without-thresholds.patch @@ -0,0 +1,39 @@ +From 6b4071c12bdcc3bd20e72a7bd2eed19ff14b97af Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Wed, 12 May 2021 19:11:08 -0700 +Subject: [PATCH] allow dbus sensors without thresholds + +catch dbus exceptions when query for thresholds interfaces. +log messages and continue. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + dbus/dbusconfiguration.cpp | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/dbus/dbusconfiguration.cpp b/dbus/dbusconfiguration.cpp +index 55151d3..fd7a138 100644 +--- a/dbus/dbusconfiguration.cpp ++++ b/dbus/dbusconfiguration.cpp +@@ -286,13 +286,15 @@ void populatePidInfo( + { + interface = thresholds::criticalInterface; + } +- const std::string& path = sensorConfig.at(info.inputs.front()).readPath; + +- DbusHelper helper(sdbusplus::bus::new_system()); +- std::string service = helper.getService(interface, path); + double reading = 0; + try + { ++ const std::string& path = sensorConfig.at(info.inputs.front()).readPath; ++ ++ DbusHelper helper(sdbusplus::bus::new_system()); ++ std::string service = helper.getService(interface, path); ++ + helper.getProperty(service, path, interface, *thresholdProperty, + reading); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service new file mode 100644 index 000000000..0e80b554a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service @@ -0,0 +1,14 @@ +[Unit] +Description=Phosphor-Pid-Control Margin-based Fan Control Daemon +After=xyz.openbmc_project.EntityManager.service +After=xyz.openbmc_project.ObjectMapper.service + +[Service] +Restart=always +ExecStart={bindir}/swampd +RestartSec=5 +StartLimitInterval=0 +Type=simple + +[Install] +WantedBy=basic.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend new file mode 100644 index 000000000..328176aca --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend @@ -0,0 +1,14 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +inherit obmc-phosphor-systemd +SYSTEMD_SERVICE:${PN} = "phosphor-pid-control.service" +EXTRA_OECONF = "--enable-configure-dbus=yes" + +SRC_URI = "git://github.com/openbmc/phosphor-pid-control.git" +SRCREV = "cca9c659889d149c06e95bab4b8808db4f1e3eab" + +SRC_URI += "\ + file://0001-allow-dbus-sensors-without-thresholds.patch \ + " + +FILES:${PN} = "${bindir}/swampd ${bindir}/setsensor" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch new file mode 100644 index 000000000..2a4c7e9b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0002-Redfish-firmware-activation.patch @@ -0,0 +1,44 @@ +From b6b3051c8078267153712ed8cf514373924fd07a Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Mon, 16 Jul 2018 19:15:04 -0700 +Subject: [PATCH 2/6] Redfish firmware activation -- Modified flash.cpp to + call to customized flash service + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I81c3185e9c4c2ee907feeb53620faa22723c04d4 +--- + ubi/flash.cpp | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/ubi/flash.cpp b/ubi/flash.cpp +index ffa9348..5af2a17 100644 +--- a/ubi/flash.cpp ++++ b/ubi/flash.cpp +@@ -15,10 +15,13 @@ void Activation::flashWrite() + { + auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); +- method.append("obmc-flash-bmc-ubirw.service", "replace"); ++ std::string rwServiceFile = ++ "obmc-flash-bmc-ubirw@" + versionId + ".service"; ++ method.append(rwServiceFile, "replace"); + bus.call_noreply(method); + +- auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; ++ std::string roServiceFile = ++ "obmc-flash-bmc-ubiro@" + versionId + ".service"; + method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); + method.append(roServiceFile, "replace"); +@@ -37,7 +40,7 @@ void Activation::onStateChanges(sdbusplus::message::message& msg) + // Read the msg and populate each variable + msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); + +- auto rwServiceFile = "obmc-flash-bmc-ubirw.service"; ++ auto rwServiceFile = "obmc-flash-bmc-ubirw@" + versionId + ".service"; + auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + auto ubootVarsServiceFile = + "obmc-flash-bmc-updateubootvars@" + versionId + ".service"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch new file mode 100644 index 000000000..bcf692f5e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0004-Changed-the-condition-of-software-version-service-wa.patch @@ -0,0 +1,41 @@ +From 1b00440d0c8fabfa2e3eda984a21c0f004ca2150 Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Fri, 26 Oct 2018 11:54:05 -0700 +Subject: [PATCH 4/6] Changed the condition of software version service + watching deamon + + Originally it watches only files that are "written" into /tmp/images directory. +This change modified the condition to also watch files that are "moved" into this directory. + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I3e9cf1ffc3f5350d4649d32d3d3837991322a65b +--- + watch.cpp | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/watch.cpp b/watch.cpp +index e46b8aa..eee1bc3 100644 +--- a/watch.cpp ++++ b/watch.cpp +@@ -46,7 +46,7 @@ Watch::Watch(sd_event* loop, std::function<int(std::string&)> imageCallback) : + std::strerror(error)); + } + +- wd = inotify_add_watch(fd, IMG_UPLOAD_DIR, IN_CLOSE_WRITE); ++ wd = inotify_add_watch(fd, IMG_UPLOAD_DIR, IN_CLOSE_WRITE | IN_MOVED_TO); + if (-1 == wd) + { + auto error = errno; +@@ -97,7 +97,8 @@ int Watch::callback(sd_event_source* /* s */, int fd, uint32_t revents, + while (offset < bytes) + { + auto event = reinterpret_cast<inotify_event*>(&buffer[offset]); +- if ((event->mask & IN_CLOSE_WRITE) && !(event->mask & IN_ISDIR)) ++ if ((event->mask & (IN_CLOSE_WRITE | IN_MOVED_TO)) && ++ !(event->mask & IN_ISDIR)) + { + auto tarballPath = std::string{IMG_UPLOAD_DIR} + '/' + event->name; + auto rc = static_cast<Watch*>(userdata)->imageCallback(tarballPath); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch new file mode 100644 index 000000000..fcdc75f8f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch @@ -0,0 +1,225 @@ +From 6e95f4a761021e3204912e3a7c5b80a18d9f16cf Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Mon, 10 Dec 2018 10:36:44 -0800 +Subject: [PATCH] Modified firmware activation to launch fwupd.sh through + + non-ubi fs code path to match more closely to the upstream design - + Added option FWUPD_SCRIPT to saperate intel customized code - Adopted + ActivationProgress from ubi fs activation code mainly for progress indicator + for ipmi update + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + activation.cpp | 50 +++++++++++++++++++++++++++++++++++++---------- + meson.build | 2 ++ + meson_options.txt | 3 +++ + static/flash.cpp | 42 +++++++++++++++++++++++++++++++++++++-- + ubi/flash.cpp | 9 +++------ + 5 files changed, 88 insertions(+), 18 deletions(-) + +diff --git a/activation.cpp b/activation.cpp +index 5490cd9974b3..e43959d78ed2 100644 +--- a/activation.cpp ++++ b/activation.cpp +@@ -88,20 +88,50 @@ auto Activation::activation(Activations value) -> Activations + + if (value == softwareServer::Activation::Activations::Activating) + { +-#ifdef WANT_SIGNATURE_VERIFY +- fs::path uploadDir(IMG_UPLOAD_DIR); +- if (!verifySignature(uploadDir / versionId, SIGNED_IMAGE_CONF_PATH)) ++#ifdef FWUPD_SCRIPT ++ if (!activationProgress) + { +- onVerifyFailed(); +- // Stop the activation process, if fieldMode is enabled. +- if (parent.control::FieldMode::fieldModeEnabled()) ++ // Enable systemd signals ++ Activation::subscribeToSystemdSignals(); ++ parent.freeSpace(*this); ++ ++ activationProgress = ++ std::make_unique<ActivationProgress>(bus, path); ++ ++#ifdef WANT_SIGNATURE_VERIFY ++ fs::path uploadDir(IMG_UPLOAD_DIR); ++ if (!verifySignature(uploadDir / versionId, SIGNED_IMAGE_CONF_PATH)) + { +- return softwareServer::Activation::activation( +- softwareServer::Activation::Activations::Failed); ++ onVerifyFailed(); ++ // Stop the activation process, if fieldMode is enabled. ++ if (parent.control::FieldMode::fieldModeEnabled()) ++ { ++ return softwareServer::Activation::activation( ++ softwareServer::Activation::Activations::Failed); ++ } + } +- } + #endif ++ flashWrite(); ++ } ++ else if (activationProgress->progress() == 100) ++ { ++ error("progress == 100..."); ++ if (!redundancyPriority) ++ { ++ redundancyPriority = ++ std::make_unique<RedundancyPriority>(bus, path, *this, 0); ++ } ++ ++ // Remove version object from image manager ++ Activation::deleteImageManagerObject(); + ++ // Create active association ++ parent.createActiveAssociation(path); ++ ++ return softwareServer::Activation::activation( ++ softwareServer::Activation::Activations::Active); ++ } ++#else // !FWUPD_SCRIPT + #ifdef HOST_BIOS_UPGRADE + auto purpose = parent.versions.find(versionId)->second->purpose(); + if (purpose == VersionPurpose::Host) +@@ -124,7 +154,6 @@ auto Activation::activation(Activations value) -> Activations + return softwareServer::Activation::activation(value); + } + #endif +- + auto versionStr = parent.versions.find(versionId)->second->version(); + + if (!minimum_ship_level::verify(versionStr)) +@@ -174,6 +203,7 @@ auto Activation::activation(Activations value) -> Activations + return softwareServer::Activation::activation( + softwareServer::Activation::Activations::Active); + #endif ++#endif // FWUPD_SCRIPT + } + else + { +diff --git a/meson.build b/meson.build +index a6ebcc43c0ec..5c7900924959 100644 +--- a/meson.build ++++ b/meson.build +@@ -59,6 +59,8 @@ conf.set('WANT_SIGNATURE_VERIFY', \ + get_option('verify-full-signature').enabled()) + conf.set('WANT_SIGNATURE_FULL_VERIFY', get_option('verify-full-signature').enabled()) + ++conf.set('FWUPD_SCRIPT', get_option('fwupd-script').enabled()) ++ + # Configurable variables + conf.set('ACTIVE_BMC_MAX_ALLOWED', get_option('active-bmc-max-allowed')) + conf.set_quoted('HASH_FILE_NAME', get_option('hash-file-name')) +diff --git a/meson_options.txt b/meson_options.txt +index 4def7f982809..74e757b75f01 100644 +--- a/meson_options.txt ++++ b/meson_options.txt +@@ -25,6 +25,9 @@ option('verify-signature', type: 'feature', + option('verify-full-signature', type: 'feature', + description: 'Enable image full signature validation.') + ++option('fwupd-script', type: 'feature', ++ description: 'Enable fwupd script support.') ++ + # Variables + option( + 'active-bmc-max-allowed', type: 'integer', +diff --git a/static/flash.cpp b/static/flash.cpp +index 101828b1ade5..5506a59ac499 100644 +--- a/static/flash.cpp ++++ b/static/flash.cpp +@@ -22,9 +22,11 @@ namespace updater + + namespace fs = std::filesystem; + using namespace phosphor::software::image; ++namespace softwareServer = sdbusplus::xyz::openbmc_project::Software::server; + + void Activation::flashWrite() + { ++#ifndef FWUPD_SCRIPT + // For static layout code update, just put images in /run/initramfs. + // It expects user to trigger a reboot and an updater script will program + // the image to flash during reboot. +@@ -36,11 +38,47 @@ void Activation::flashWrite() + fs::copy_file(uploadDir / versionId / bmcImage, toPath / bmcImage, + fs::copy_options::overwrite_existing); + } ++ ++#else ++ auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, ++ SYSTEMD_INTERFACE, "StartUnit"); ++ method.append("fwupd@" + versionId + ".service", "replace"); ++ bus.call_noreply(method); ++#endif + } + +-void Activation::onStateChanges(sdbusplus::message::message& /*msg*/) ++void Activation::onStateChanges(__attribute__((unused)) ++ sdbusplus::message::message& msg) + { +- // Empty ++#ifndef FWUPD_SCRIPT ++ uint32_t newStateID{}; ++ sdbusplus::message::object_path newStateObjPath; ++ std::string newStateUnit{}; ++ std::string newStateResult{}; ++ ++ msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); ++ ++ auto rwServiceFile = "fwupdw@" + versionId + ".service"; ++ ++ if (newStateUnit == rwServiceFile && newStateResult == "done") ++ { ++ activationProgress->progress(100); ++ } ++ ++ if (newStateUnit == rwServiceFile) ++ { ++ if (newStateResult == "failed" || newStateResult == "dependency") ++ { ++ Activation::activation( ++ softwareServer::Activation::Activations::Failed); ++ } ++ else ++ { ++ Activation::activation( ++ softwareServer::Activation::Activations::Activating); ++ } ++ } ++#endif + } + + } // namespace updater +diff --git a/ubi/flash.cpp b/ubi/flash.cpp +index a263bfb81116..c58eefc4ec48 100644 +--- a/ubi/flash.cpp ++++ b/ubi/flash.cpp +@@ -15,13 +15,10 @@ void Activation::flashWrite() + { + auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); +- std::string rwServiceFile = +- "obmc-flash-bmc-ubirw@" + versionId + ".service"; +- method.append(rwServiceFile, "replace"); ++ method.append("obmc-flash-bmc-ubirw.service", "replace"); + bus.call_noreply(method); + +- std::string roServiceFile = +- "obmc-flash-bmc-ubiro@" + versionId + ".service"; ++ auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, + SYSTEMD_INTERFACE, "StartUnit"); + method.append(roServiceFile, "replace"); +@@ -40,7 +37,7 @@ void Activation::onStateChanges(sdbusplus::message::message& msg) + // Read the msg and populate each variable + msg.read(newStateID, newStateObjPath, newStateUnit, newStateResult); + +- auto rwServiceFile = "obmc-flash-bmc-ubirw@" + versionId + ".service"; ++ auto rwServiceFile = "obmc-flash-bmc-ubirw.service"; + auto roServiceFile = "obmc-flash-bmc-ubiro@" + versionId + ".service"; + auto ubootVarsServiceFile = + "obmc-flash-bmc-updateubootvars@" + versionId + ".service"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch new file mode 100644 index 000000000..1f2a86fb9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch @@ -0,0 +1,44 @@ +From 9b3c44e9fb3d907c0152f14b967e23ab964c0e0b Mon Sep 17 00:00:00 2001 +From: Jennifer Lee <jennifer1.lee@intel.com> +Date: Thu, 14 Feb 2019 14:54:45 -0800 +Subject: [PATCH 6/6] Modify the ID of software image updater object on DBus to + allow force update onto same version image + +In the original design of image update, it does not allow the same version of image to be flashed onto itself. +But this blocks validation tests and in most of the cases we don't prevent user from doing such update. + +This patch appends a random number after the version ID hash string to unblock such limitation. + +Signed-off-by: Jennifer Lee <jennifer1.lee@intel.com> +Change-Id: I16aba4804ae1bc2e8784320f91c0419fb8b23c35 +--- + image_manager.cpp | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/image_manager.cpp b/image_manager.cpp +index 5b2ff49..e3d26e3 100644 +--- a/image_manager.cpp ++++ b/image_manager.cpp +@@ -9,6 +9,7 @@ + #include <stdlib.h> + #include <sys/stat.h> + #include <sys/wait.h> ++#include <time.h> + #include <unistd.h> + + #include <elog-errors.hpp> +@@ -174,6 +175,11 @@ int Manager::processImage(const std::string& tarFilePath) + // Compute id + auto id = Version::getId(version); + ++ // Append a random number after the original version hash ++ // This will allow forcing image update onto the same version ++ srand(time(NULL)); ++ id = id + "_" + std::to_string(rand()); ++ + fs::path imageDirPath = std::string{IMG_UPLOAD_DIR}; + imageDirPath /= id; + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-Adding-StandBySpare-for-firmware-activation.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-Adding-StandBySpare-for-firmware-activation.patch new file mode 100644 index 000000000..6039be44b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-Adding-StandBySpare-for-firmware-activation.patch @@ -0,0 +1,76 @@ +From c2ae3ac444f7a5e9674a82f47086874f947bcec6 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@linux.intel.com> +Date: Thu, 5 Dec 2019 12:38:21 +0530 +Subject: [PATCH] Adding StandBySpare for firmware activation + +Added new states 'StandBySpare', 'ActivatingAsStandbySpare' for +firmware activation. If the uploaded firmware image is for +backup/recovery, then it sets the "StandBySpare" value for +Activations. When backup/recovery image is in activating state, +then activations will be set to "ActivatingAsStandbySpare". + +Tested: +Tested using redfish interface. +Did the GET on "/redfish/v1/UpdateService/FirmwareInventory/<backup image>" +Response: + .... + "Status": { + "Health": "OK", + "HealthRollup": "OK", + "State": "StandbySpare" + } +....... + +Change-Id: I7f1608fac3196774a6d593b6128d58da3f5c88fc +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@linux.intel.com> +--- + activation.cpp | 22 ++++++++++++++++++++-- + 1 file changed, 20 insertions(+), 2 deletions(-) + +diff --git a/activation.cpp b/activation.cpp +index 2966b2f..a098784 100644 +--- a/activation.cpp ++++ b/activation.cpp +@@ -81,12 +81,16 @@ void Activation::unsubscribeFromSystemdSignals() + auto Activation::activation(Activations value) -> Activations + { + if ((value != softwareServer::Activation::Activations::Active) && +- (value != softwareServer::Activation::Activations::Activating)) ++ (value != softwareServer::Activation::Activations::Activating) && ++ (value != ++ softwareServer::Activation::Activations::ActivatingAsStandbySpare)) + { + redundancyPriority.reset(nullptr); + } + +- if (value == softwareServer::Activation::Activations::Activating) ++ if (value == softwareServer::Activation::Activations::Activating || ++ value == ++ softwareServer::Activation::Activations::ActivatingAsStandbySpare) + { + #ifdef FWUPD_SCRIPT + if (!activationProgress) +@@ -309,6 +313,20 @@ auto Activation::requestedActivation(RequestedActivations value) + softwareServer::Activation::Activations::Activating); + } + } ++ else if ((value == ++ softwareServer::Activation::RequestedActivations::StandbySpare) && ++ (softwareServer::Activation::requestedActivation() != ++ softwareServer::Activation::RequestedActivations::StandbySpare)) ++ { ++ if ((softwareServer::Activation::activation() == ++ softwareServer::Activation::Activations::Ready) || ++ (softwareServer::Activation::activation() == ++ softwareServer::Activation::Activations::Failed)) ++ { ++ Activation::activation(softwareServer::Activation::Activations:: ++ ActivatingAsStandbySpare); ++ } ++ } + return softwareServer::Activation::requestedActivation(value); + } + +-- +2.7.4 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-PFR-images-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-PFR-images-support.patch new file mode 100644 index 000000000..e1a7f1746 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0007-PFR-images-support.patch @@ -0,0 +1,411 @@ +From 51fd06346ff492d5d4862886cb34e024d05edb45 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Tue, 13 Aug 2019 22:43:12 +0530 +Subject: [PATCH] PFR images support in phosphor-software-manager + +This commit adds support for handling the PFR images +upload and processing. + +Testing: +tested PFR image uploads and updates + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> + +--- + item_updater.cpp | 7 +- + meson.build | 8 +- + meson_options.txt | 3 + + pfr_image_manager.cpp | 218 ++++++++++++++++++++++++++++++++++++++++++ + pfr_image_manager.hpp | 76 +++++++++++++++ + 5 files changed, 308 insertions(+), 4 deletions(-) + create mode 100644 pfr_image_manager.cpp + create mode 100644 pfr_image_manager.hpp + +diff --git a/item_updater.cpp b/item_updater.cpp +index 81fc01f..60e7d23 100644 +--- a/item_updater.cpp ++++ b/item_updater.cpp +@@ -65,10 +65,10 @@ void ItemUpdater::createActivation(sdbusplus::message::message& msg) + auto value = SVersion::convertVersionPurposeFromString( + std::get<std::string>(property.second)); + if (value == VersionPurpose::BMC || +-#ifdef HOST_BIOS_UPGRADE ++#if defined(HOST_BIOS_UPGRADE) || defined(PFR_UPDATE) + value == VersionPurpose::Host || + #endif +- value == VersionPurpose::System) ++ value == VersionPurpose::Other) + { + purpose = value; + } +@@ -414,6 +414,7 @@ void ItemUpdater::deleteAll() + ItemUpdater::ActivationStatus + ItemUpdater::validateSquashFSImage(const std::string& filePath) + { ++#ifndef PFR_UPDATE + bool valid = true; + + // Record the images which are being updated +@@ -431,7 +432,7 @@ ItemUpdater::ActivationStatus + return ItemUpdater::ActivationStatus::invalid; + } + } +- ++#endif + return ItemUpdater::ActivationStatus::ready; + } + +diff --git a/meson.build b/meson.build +index 5c79009..e33998d 100644 +--- a/meson.build ++++ b/meson.build +@@ -60,6 +60,7 @@ conf.set('WANT_SIGNATURE_VERIFY', \ + conf.set('WANT_SIGNATURE_FULL_VERIFY', get_option('verify-full-signature').enabled()) + + conf.set('FWUPD_SCRIPT', get_option('fwupd-script').enabled()) ++conf.set('PFR_UPDATE', get_option('pfr-update').enabled()) + + # Configurable variables + conf.set('ACTIVE_BMC_MAX_ALLOWED', get_option('active-bmc-max-allowed')) +@@ -205,12 +206,17 @@ executable( + install: true + ) + ++image_manager_source = files('image_manager.cpp') ++if get_option('pfr-update').enabled() ++ image_manager_source = files('pfr_image_manager.cpp') ++endif ++ + executable( + 'phosphor-version-software-manager', + image_error_cpp, + image_error_hpp, +- 'image_manager.cpp', + 'image_manager_main.cpp', ++ image_manager_source, + 'version.cpp', + 'watch.cpp', + dependencies: [deps, ssl], +diff --git a/meson_options.txt b/meson_options.txt +index da257b7..2204e04 100644 +--- a/meson_options.txt ++++ b/meson_options.txt +@@ -28,6 +28,9 @@ option('verify-full-signature', type: 'feature', + option('fwupd-script', type: 'feature', + description: 'Enable fwupd script support.') + ++option('pfr-update', type: 'feature', ++ description: 'Enable PFR image support.') ++ + # Variables + option( + 'active-bmc-max-allowed', type: 'integer', +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +new file mode 100644 +index 0000000..fec1e94 +--- /dev/null ++++ b/pfr_image_manager.cpp +@@ -0,0 +1,218 @@ ++#include "config.h" ++ ++#include "pfr_image_manager.hpp" ++ ++#include "version.hpp" ++#include "watch.hpp" ++ ++#include <stdio.h> ++#include <stdlib.h> ++#include <sys/stat.h> ++#include <sys/wait.h> ++#include <time.h> ++#include <unistd.h> ++ ++#include <elog-errors.hpp> ++#include <xyz/openbmc_project/Software/Image/error.hpp> ++ ++#include <algorithm> ++#include <cstring> ++#include <filesystem> ++#include <fstream> ++#include <iomanip> ++#include <sstream> ++#include <string> ++ ++namespace phosphor ++{ ++namespace software ++{ ++namespace manager ++{ ++ ++using namespace sdbusplus::xyz::openbmc_project::Software::Image::Error; ++namespace Software = phosphor::logging::xyz::openbmc_project::Software; ++ ++static constexpr const uint32_t pfmPos = 2054; ++ ++static int getPFRImgInfo(const std::filesystem::path imgPath, uint8_t& imgType, ++ std::string& version) ++{ ++ struct pfrImgBlock0 block0Data; ++ uint8_t verData[2]; ++ ++ if (std::filesystem::exists(imgPath)) ++ { ++ try ++ { ++ std::ifstream imgFile(imgPath, std::ios::binary | std::ios::in); ++ ++ if (!imgFile.good()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Image file read failed"); ++ return -1; ++ } ++ ++ imgFile.read(reinterpret_cast<char*>(&block0Data), ++ sizeof(block0Data)); ++ imgType = block0Data.pcType[0]; ++ imgFile.seekg(pfmPos, ++ std::ios::beg); // Version is at 0x806 in the PFM ++ imgFile.read(reinterpret_cast<char*>(&verData), sizeof(verData)); ++ imgFile.close(); ++ version = ++ std::to_string(verData[0]) + "." + std::to_string(verData[1]); ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "PFR image", ++ phosphor::logging::entry("PCType=%d", block0Data.pcType[0]), ++ phosphor::logging::entry("VERSION=%s", version.c_str())); ++ } ++ catch (std::exception& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>(e.what()); ++ return -1; ++ } ++ } ++ ++ return 0; ++} ++ ++int Manager::processImage(const std::string& imgFilePath) ++{ ++ std::filesystem::path imgPath(imgFilePath); ++ ++ if (!std::filesystem::exists(imgPath)) ++ return -1; ++ ++ uint8_t imgType; ++ int retry = 3; ++ std::string ver; ++ std::string purposeString; ++ ++ if (0 != getPFRImgInfo(imgFilePath, imgType, ver)) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error reading uploaded image type and version"); ++ return -1; ++ } ++ ++ if (ver.empty()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Empty version from image file"); ++ return -1; ++ } ++ ++ if (imgType == pfrBMCUpdateCap) ++ { ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.BMC"; ++ } ++ else if (imgType == pfrPCHUpdateCap) ++ { ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.Host"; ++ } ++ else if (imgType == pfrCPLDUpdateCap) ++ { ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.Other"; ++ } ++ else ++ { ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.Unknown"; ++ ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unknown image type"); ++ return -1; ++ } ++ ++ sdbusplus::xyz::openbmc_project::Software::server::Version::VersionPurpose ++ purpose = Version::VersionPurpose::Unknown; ++ try ++ { ++ purpose = Version::convertVersionPurposeFromString(purposeString); ++ } ++ catch (const sdbusplus::exception::InvalidEnumString& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error: Failed to convert purpose to enum." ++ " Setting to Unknown."); ++ } ++ ++ // Compute id ++ std::string id = Version::getId(ver); ++ ++ // Append a random number after the original version hash ++ // This will allow forcing image update onto the same version ++ // with 3 retries on random number generation. ++ do ++ { ++ srand(time(NULL)); ++ id = id + "_" + std::to_string(rand()); ++ } while ((versions.find(id) != versions.end()) && retry--); ++ ++ if (versions.find(id) != versions.end()) ++ { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "Software Object with the same version already exists, exiting " ++ "the update", ++ phosphor::logging::entry("VERSION_ID=%s", id.c_str())); ++ ++ return -1; ++ } ++ ++ std::filesystem::path imageDirPath(IMG_UPLOAD_DIR); ++ imageDirPath /= id; ++ ++ std::filesystem::create_directory(imageDirPath); ++ ++ std::filesystem::path newFileName = imageDirPath / "image-runtime"; ++ std::filesystem::rename(imgFilePath, newFileName); ++ ++ // Create Version object ++ std::string objPath = std::string{SOFTWARE_OBJPATH} + '/' + id; ++ ++ auto versionPtr = std::make_unique<Version>( ++ bus, objPath, ver, purpose, imageDirPath.string(), ++ std::bind(&Manager::erase, this, std::placeholders::_1)); ++ versionPtr->deleteObject = ++ std::make_unique<phosphor::software::manager::Delete>(bus, objPath, ++ *versionPtr); ++ versions.insert(std::make_pair(id, std::move(versionPtr))); ++ ++ return 0; ++} ++ ++void Manager::erase(std::string entryId) ++{ ++ auto it = versions.find(entryId); ++ if (it == versions.end()) ++ { ++ return; ++ } ++ ++ if (it->second->isFunctional()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ ("Error: Version " + entryId + ++ " is currently running on the BMC." ++ " Unable to remove.") ++ .c_str()); ++ return; ++ } ++ ++ // Delete image dir ++ std::filesystem::path imageDirPath = (*(it->second)).path(); ++ if (std::filesystem::exists(imageDirPath)) ++ { ++ std::filesystem::remove_all(imageDirPath); ++ } ++ this->versions.erase(entryId); ++} ++ ++} // namespace manager ++} // namespace software ++} // namespace phosphor +diff --git a/pfr_image_manager.hpp b/pfr_image_manager.hpp +new file mode 100644 +index 0000000..b9a5822 +--- /dev/null ++++ b/pfr_image_manager.hpp +@@ -0,0 +1,76 @@ ++#pragma once ++#include "version.hpp" ++ ++#include <sdbusplus/server.hpp> ++ ++namespace phosphor ++{ ++namespace software ++{ ++namespace manager ++{ ++ ++enum pfrImgPCType ++{ ++ pfrCPLDUpdateCap = 0x00, ++ pfrPCHPFM = 0x01, ++ pfrPCHUpdateCap = 0x02, ++ pfrBMCPFM = 0x03, ++ pfrBMCUpdateCap = 0x04 ++}; ++ ++/* PFR image block 0 - As defined in HAS */ ++struct pfrImgBlock0 ++{ ++ uint8_t tag[4]; ++ uint8_t pcLength[4]; ++ uint8_t pcType[4]; ++ uint8_t reserved1[4]; ++ uint8_t hash256[32]; ++ uint8_t hash384[48]; ++ uint8_t reserved2[32]; ++} __attribute__((packed)); ++ ++/** @class Manager ++ * @brief Contains a map of Version dbus objects. ++ * @details The software image manager class that contains the Version dbus ++ * objects and their version ids. ++ */ ++class Manager ++{ ++ public: ++ /** @brief Constructs Manager Class ++ * ++ * @param[in] bus - The Dbus bus object ++ */ ++ Manager(sdbusplus::bus::bus& bus) : bus(bus){}; ++ ++ /** ++ * @brief Verify the image and provide the image to updater. ++ * Create and populate the version and file path interfaces. ++ * ++ * @param[in] uploaded image. ++ * @param[out] result - 0 if successful. ++ */ ++ int processImage(const std::string& imageFilePath); ++ ++ /** ++ * @brief Erase specified entry d-bus object ++ * and deletes the image file. ++ * ++ * @param[in] entryId - unique identifier of the entry ++ */ ++ void erase(std::string entryId); ++ ++ private: ++ /** @brief Persistent map of Version dbus objects and their ++ * version id */ ++ std::map<std::string, std::unique_ptr<Version>> versions; ++ ++ /** @brief Persistent sdbusplus DBus bus connection. */ ++ sdbusplus::bus::bus& bus; ++}; ++ ++} // namespace manager ++} // namespace software ++} // namespace phosphor +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-PFR-image-HASH-verification.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-PFR-image-HASH-verification.patch new file mode 100644 index 000000000..72eb0beba --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-PFR-image-HASH-verification.patch @@ -0,0 +1,415 @@ +From ac6e0c217a1b136d82f93b691aff1acb40009f26 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@linux.intel.com> +Date: Thu, 5 Dec 2019 11:55:36 +0530 +Subject: [PATCH] PFR image HASH verification + +This adds HASH verification on PFR images uploaded for +firmware updates + +Tested: tested firmware update with good and bad HASH images. + +A) +1. Upload the corrupted image for fw update. +2. Image present in /tmp/images/ +-rw-r--r-- 1 root root 22969344 Jun 3 09:27 +5dea710b-8b85-4065-8af7-3149ada81edf + +3. Journalctl logs during image verification +Jun 03 09:27:20 intel-obmc phosphor-version-software-manager[4755]: +Firmware image HASH verification failed +Jun 03 09:27:20 intel-obmc phosphor-version-software-manager[4755]: +Error verifying uploaded image +Jun 03 09:27:20 intel-obmc phosphor-version-software-manager[4755]: +Error processing image + +4. image deleted from /tmp/images/ + +B) +1. Upload the correct image. +POST: https://<BMC_IP>/redfish/v1/UpdateService/ + with <BMC_signed_cap> binary file +2. Image verification is success and proceeds with update. +{ + "@odata.id": "/redfish/v1/TaskService/Tasks/0", + "@odata.type": "#Task.v1_4_3.Task", + "Id": "0", + "TaskState": "Running", + "TaskStatus": "OK" +} + +Change-Id: I9336980bfb74c8136690024782bfef45f6b08d56 +Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@linux.intel.com> +--- + pfr_image_manager.cpp | 150 +++++++++++++++++++++++++++++++++---------- + pfr_image_manager.hpp | 112 +++++++++++++++++++++++++++++-- + 2 files changed, 222 insertions(+), 40 deletions(-) + +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index 242a6ca..1a41cbe 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -5,6 +5,8 @@ + #include "version.hpp" + #include "watch.hpp" + ++#include <fcntl.h> ++#include <openssl/err.h> + #include <stdio.h> + #include <stdlib.h> + #include <sys/stat.h> +@@ -20,6 +22,7 @@ + #include <filesystem> + #include <fstream> + #include <iomanip> ++#include <set> + #include <sstream> + #include <string> + +@@ -34,12 +37,21 @@ using namespace sdbusplus::xyz::openbmc_project::Software::Image::Error; + namespace Software = phosphor::logging::xyz::openbmc_project::Software; + + static constexpr const uint32_t pfmPos = 2054; ++static constexpr const uint32_t block0Magic = 0xB6EAFD19; ++static constexpr const uint32_t lengthBlk0Blk1 = 1024; + +-static int getPFRImgInfo(const std::filesystem::path imgPath, uint8_t& imgType, +- std::string& version) ++int Manager::verifyPFRImage(const std::filesystem::path imgPath, ++ std::string& version, std::string& purposeString) + { +- struct pfrImgBlock0 block0Data; +- uint8_t verData[2]; ++ uint8_t imgType = 0; ++ uint32_t imgMagic = 0; ++ uint8_t verData[2] = {0}; ++ uint32_t hashLen = 0; ++ struct pfrImgBlock0 block0Data = {}; ++ ++ std::string imageName; ++ ++ EVP_MD_CTX* ctx; + + if (std::filesystem::exists(imgPath)) + { +@@ -56,17 +68,101 @@ static int getPFRImgInfo(const std::filesystem::path imgPath, uint8_t& imgType, + + imgFile.read(reinterpret_cast<char*>(&block0Data), + sizeof(block0Data)); ++ ++ imgMagic = block0Data.tag; ++ ++ if (imgMagic != block0Magic) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Image magic number match failed", ++ phosphor::logging::entry("IMAGEMAGIC=0x%x", imgMagic)); ++ return -1; ++ } ++ + imgType = block0Data.pcType[0]; ++ ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "Image Type", phosphor::logging::entry( ++ "IMAGETYPE=0x%x", static_cast<int>(imgType))); ++ ++ if (imgType == pfrBMCUpdateCap || imgType == pfrBMCPFM) ++ { ++ imageName = "BMC"; ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.BMC"; ++ } ++ else if (imgType == pfrPCHUpdateCap || imgType == pfrPCHPFM) ++ { ++ imageName = "BIOS"; ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.Host"; ++ } ++ else if (imgType == pfrCPLDUpdateCap) ++ { ++ imageName = "CPLD"; ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.Other"; ++ } ++ else ++ { ++ purposeString = "xyz.openbmc_project.Software.Version." ++ "VersionPurpose.Unknown"; ++ ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unknown image type"); ++ return -1; ++ } ++ + imgFile.seekg(pfmPos, + std::ios::beg); // Version is at 0x806 in the PFM + imgFile.read(reinterpret_cast<char*>(&verData), sizeof(verData)); + imgFile.close(); +- version = +- std::to_string(verData[0]) + "." + std::to_string(verData[1]); ++ ++ auto size = std::filesystem::file_size(imgPath); ++ ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "Image Size", phosphor::logging::entry("IMAGESIZE=0x%x", ++ static_cast<int>(size))); ++ ++ // Adds all digest algorithms to the internal table ++ OpenSSL_add_all_digests(); ++ ++ ctx = EVP_MD_CTX_create(); ++ EVP_DigestInit(ctx, EVP_sha256()); ++ ++ // Hash the image file and update the digest ++ auto dataPtr = mapFile(imgPath, size); ++ ++ EVP_DigestUpdate(ctx, ((uint8_t*)dataPtr() + lengthBlk0Blk1), ++ (size - lengthBlk0Blk1)); ++ ++ std::vector<uint8_t> digest(EVP_MD_size(EVP_sha256())); ++ std::vector<uint8_t> expectedDigest(block0Data.hash256, ++ &block0Data.hash256[0] + 32); ++ ++ EVP_DigestFinal(ctx, digest.data(), &hashLen); ++ EVP_MD_CTX_destroy(ctx); ++ ++ std::string redfishMsgID = "OpenBMC.0.1"; ++ ++ if (expectedDigest != digest) ++ { ++ redfishMsgID += ".GeneralFirmwareSecurityViolation"; ++ sd_journal_send("MESSAGE=%s", ++ "Firmware image HASH verification failed", ++ "PRIORITY=%i", LOG_ERR, "REDFISH_MESSAGE_ID=%s", ++ redfishMsgID.c_str(), "REDFISH_MESSAGE_ARGS=%s", ++ "Image HASH check fail", NULL); ++ return -1; ++ } ++ + phosphor::logging::log<phosphor::logging::level::INFO>( + "PFR image", + phosphor::logging::entry("PCType=%d", block0Data.pcType[0]), + phosphor::logging::entry("VERSION=%s", version.c_str())); ++ ++ version = ++ std::to_string(verData[0]) + "." + std::to_string(verData[1]); + } + catch (std::exception& e) + { +@@ -80,20 +176,21 @@ static int getPFRImgInfo(const std::filesystem::path imgPath, uint8_t& imgType, + + int Manager::processImage(const std::string& imgFilePath) + { ++ + std::filesystem::path imgPath(imgFilePath); + + if (!std::filesystem::exists(imgPath)) + return -1; + +- uint8_t imgType; + int retry = 3; + std::string ver; + std::string purposeString; + +- if (0 != getPFRImgInfo(imgFilePath, imgType, ver)) ++ if (0 != verifyPFRImage(imgFilePath, ver, purposeString)) + { + phosphor::logging::log<phosphor::logging::level::ERR>( +- "Error reading uploaded image type and version"); ++ "Error verifying uploaded image"); ++ std::filesystem::remove_all(imgFilePath); + return -1; + } + +@@ -104,31 +201,6 @@ int Manager::processImage(const std::string& imgFilePath) + return -1; + } + +- if (imgType == pfrBMCUpdateCap) +- { +- purposeString = +- "xyz.openbmc_project.Software.Version.VersionPurpose.BMC"; +- } +- else if (imgType == pfrPCHUpdateCap) +- { +- purposeString = +- "xyz.openbmc_project.Software.Version.VersionPurpose.Host"; +- } +- else if (imgType == pfrCPLDUpdateCap) +- { +- purposeString = +- "xyz.openbmc_project.Software.Version.VersionPurpose.Other"; +- } +- else +- { +- purposeString = +- "xyz.openbmc_project.Software.Version.VersionPurpose.Unknown"; +- +- phosphor::logging::log<phosphor::logging::level::ERR>( +- "Unknown image type"); +- return -1; +- } +- + sdbusplus::xyz::openbmc_project::Software::server::Version::VersionPurpose + purpose = Version::VersionPurpose::Unknown; + try +@@ -170,6 +242,7 @@ int Manager::processImage(const std::string& imgFilePath) + std::filesystem::create_directory(imageDirPath); + + std::filesystem::path newFileName = imageDirPath / "image-runtime"; ++ + std::filesystem::rename(imgFilePath, newFileName); + + // Create Version object +@@ -213,6 +286,14 @@ void Manager::erase(std::string entryId) + this->versions.erase(entryId); + } + ++CustomMap Manager::mapFile(const std::filesystem::path& path, size_t size) ++{ ++ ++ CustomFd fd(open(path.c_str(), O_RDONLY)); ++ ++ return CustomMap(mmap(nullptr, size, PROT_READ, MAP_PRIVATE, fd(), 0), ++ size); ++} + } // namespace manager + } // namespace software + } // namespace phosphor +diff --git a/pfr_image_manager.hpp b/pfr_image_manager.hpp +index c6ee6a4..5b7b2c3 100644 +--- a/pfr_image_manager.hpp ++++ b/pfr_image_manager.hpp +@@ -1,8 +1,16 @@ + #pragma once + #include "version.hpp" + ++#include <openssl/evp.h> ++#include <openssl/pem.h> ++#include <openssl/rsa.h> ++#include <sys/mman.h> ++#include <unistd.h> ++ + #include <sdbusplus/server.hpp> + ++#include <filesystem> ++ + namespace phosphor + { + namespace software +@@ -22,7 +30,7 @@ enum pfrImgPCType + /* PFR image block 0 - As defined in HAS */ + struct pfrImgBlock0 + { +- uint8_t tag[4]; ++ uint32_t tag; + uint8_t pcLength[4]; + uint8_t pcType[4]; + uint8_t reserved1[4]; +@@ -31,6 +39,82 @@ struct pfrImgBlock0 + uint8_t reserved2[32]; + } __attribute__((packed)); + ++/** @struct CustomFd ++ * ++ * RAII wrapper for file descriptor. ++ */ ++struct CustomFd ++{ ++ public: ++ CustomFd() = delete; ++ CustomFd(const CustomFd&) = delete; ++ CustomFd& operator=(const CustomFd&) = delete; ++ CustomFd(CustomFd&&) = default; ++ CustomFd& operator=(CustomFd&&) = default; ++ /** @brief Saves File descriptor and uses it to do file operation ++ * ++ * @param[in] fd - File descriptor ++ */ ++ CustomFd(int fd) : fd(fd) ++ {} ++ ++ ~CustomFd() ++ { ++ if (fd >= 0) ++ { ++ close(fd); ++ } ++ } ++ ++ int operator()() const ++ { ++ return fd; ++ } ++ ++ private: ++ /** @brief File descriptor */ ++ int fd = -1; ++}; ++ ++/** @struct CustomMap ++ * ++ * RAII wrapper for mmap. ++ */ ++struct CustomMap ++{ ++ private: ++ /** @brief starting address of the map */ ++ void* addr; ++ ++ /** @brief length of the mapping */ ++ size_t length; ++ ++ public: ++ CustomMap() = delete; ++ CustomMap(const CustomMap&) = delete; ++ CustomMap& operator=(const CustomMap&) = delete; ++ CustomMap(CustomMap&&) = default; ++ CustomMap& operator=(CustomMap&&) = default; ++ ++ /** @brief Saves starting address of the map and ++ * and length of the file. ++ * @param[in] addr - Starting address of the map ++ * @param[in] length - length of the map ++ */ ++ CustomMap(void* addr, size_t length) : addr(addr), length(length) ++ {} ++ ++ ~CustomMap() ++ { ++ munmap(addr, length); ++ } ++ ++ void* operator()() const ++ { ++ return addr; ++ } ++}; ++ + /** @class Manager + * @brief Contains a map of Version dbus objects. + * @details The software image manager class that contains the Version dbus +@@ -63,6 +147,22 @@ class Manager + void erase(std::string entryId); + + private: ++ /** ++ * @brief Memory map the file ++ * @param[in] - file path ++ * @param[in] - file size ++ * @param[out] - Custom Mmap address ++ */ ++ CustomMap mapFile(const std::filesystem::path& path, size_t size); ++ ++ /** ++ * @brief Verify the PFR image and return version and purpose ++ * @param[in] - file path ++ * @param[out] - version ++ * @param[out] - purpose ++ */ ++ int verifyPFRImage(const std::filesystem::path imgPath, ++ std::string& version, std::string& purposeString); + /** @brief Persistent map of Version dbus objects and their + * version id */ + std::map<std::string, std::unique_ptr<Version>> versions; diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-item_updater-update-the-bmc_active-objectPath.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-item_updater-update-the-bmc_active-objectPath.patch new file mode 100644 index 000000000..e0ff79795 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0008-item_updater-update-the-bmc_active-objectPath.patch @@ -0,0 +1,50 @@ +From d9e50ecf8bd8bc764838e7244084184644a3f0fc Mon Sep 17 00:00:00 2001 +From: Chalapathi <chalapathix.venkataramashetty@intel.com> +Date: Thu, 23 Apr 2020 19:06:19 +0000 +Subject: [PATCH] item_updater: update the bmc_active objectPath + +Update the Software object path to bmc_active instead of random Id. + +Signed-off-by: Chalapathi <chalapathix.venkataramashetty@intel.com> + +--- + item_updater.cpp | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +diff --git a/item_updater.cpp b/item_updater.cpp +index e6dd298..c3a846d 100644 +--- a/item_updater.cpp ++++ b/item_updater.cpp +@@ -175,7 +175,8 @@ void ItemUpdater::processBMCImage() + if (0 == + iter.path().native().compare(0, BMC_RO_PREFIX_LEN, BMC_ROFS_PREFIX)) + { +- // Get the version to calculate the id ++ std::string id = "bmc_active"; ++ // upstream changed this to relative_path ... is that right? + fs::path releaseFile(OS_RELEASE_FILE); + auto osRelease = iter.path() / releaseFile.relative_path(); + if (!fs::is_regular_file(osRelease)) +@@ -189,7 +190,6 @@ void ItemUpdater::processBMCImage() + // volumes created by the UBI layout for example have the id in + // the mount directory name. The worst that can happen is that + // erase() is called with an non-existent id and returns. +- auto id = iter.path().native().substr(BMC_RO_PREFIX_LEN); + ItemUpdater::erase(id); + + continue; +@@ -203,14 +203,11 @@ void ItemUpdater::processBMCImage() + + // Try to delete the version, same as above if the + // OS_RELEASE_FILE does not exist. +- auto id = iter.path().native().substr(BMC_RO_PREFIX_LEN); + ItemUpdater::erase(id); + + continue; + } + +- auto id = VersionClass::getId(version); +- + // Check if the id has already been added. This can happen if the + // BMC partitions / devices were manually flashed with the same + // image. diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0009-Add-ApplyOptions-D-bus-property-under-Software.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0009-Add-ApplyOptions-D-bus-property-under-Software.patch new file mode 100644 index 000000000..f150c1027 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0009-Add-ApplyOptions-D-bus-property-under-Software.patch @@ -0,0 +1,44 @@ +From 76f169e71be10b50b9617e606c38aff9553e6de8 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Fri, 15 May 2020 21:17:08 +0530 +Subject: [PATCH] Add ApplyOptions D-bus property under Software + +This change adds the ApplyOptions D-bus property +under xyz.openbmc_project.Software.BMC.Updater. +ApplyOptions is needed for BIOS NVRAM clear during +BIOS firmware update. ClearConfig attribute is passed +from RF to fwupd script. + +Tested: Set and Get of ClearConfig from fwupd.sh works + fine. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +--- + item_updater.hpp | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/item_updater.hpp b/item_updater.hpp +index 3f0530f..5c1a779 100644 +--- a/item_updater.hpp ++++ b/item_updater.hpp +@@ -9,6 +9,7 @@ + #include <xyz/openbmc_project/Association/Definitions/server.hpp> + #include <xyz/openbmc_project/Common/FactoryReset/server.hpp> + #include <xyz/openbmc_project/Control/FieldMode/server.hpp> ++#include <xyz/openbmc_project/Software/ApplyOptions/server.hpp> + + #include <string> + #include <vector> +@@ -24,7 +25,8 @@ using ItemUpdaterInherit = sdbusplus::server::object::object< + sdbusplus::xyz::openbmc_project::Common::server::FactoryReset, + sdbusplus::xyz::openbmc_project::Control::server::FieldMode, + sdbusplus::xyz::openbmc_project::Association::server::Definitions, +- sdbusplus::xyz::openbmc_project::Collection::server::DeleteAll>; ++ sdbusplus::xyz::openbmc_project::Collection::server::DeleteAll, ++ sdbusplus::xyz::openbmc_project::Software::server::ApplyOptions>; + + namespace MatchRules = sdbusplus::bus::match::rules; + using VersionClass = phosphor::software::manager::Version; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0010-Add-error-reporting-to-pfr_image_manager.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0010-Add-error-reporting-to-pfr_image_manager.patch new file mode 100644 index 000000000..e72398efd --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0010-Add-error-reporting-to-pfr_image_manager.patch @@ -0,0 +1,190 @@ +From ffa3642e436b559d8062f777f00458cc7b5ecb01 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Thu, 11 Jun 2020 13:30:02 -0700 +Subject: [PATCH 1/1] Add error reporting to pfr_image_manager + +This uses report functionality to update error +return status for redfish updates. + +Tested: Got 400 error with different messages based +on failure type + +{ + "error": { + "@Message.ExtendedInfo": [ + { + "@odata.type": "/redfish/v1/$metadata#Message.v1_0_0.Message", + "Message": "Invalid file uploaded to /redfish/v1/UpdateService: invalid archive.", + "MessageArgs": [ + "/redfish/v1/UpdateService", + "invalid archive" + ], + "MessageId": "OpenBMC.0.1.0.InvalidFile", + "Resolution": "None.", + "Severity": "Warning" + } + ], + "code": "OpenBMC.0.1.0.InvalidFile", + "message": "Invalid file uploaded to /redfish/v1/UpdateService: invalid archive." + } +} + +{ + "error": { + "@Message.ExtendedInfo": [ + { + "@odata.type": "/redfish/v1/$metadata#Message.v1_0_0.Message", + "Message": "Invalid file uploaded to /redfish/v1/UpdateService: invalid image format.", + "MessageArgs": [ + "/redfish/v1/UpdateService", + "invalid image format" + ], + "MessageId": "OpenBMC.0.1.0.InvalidFile", + "Resolution": "None.", + "Severity": "Warning" + } + ], + "code": "OpenBMC.0.1.0.InvalidFile", + "message": "Invalid file uploaded to /redfish/v1/UpdateService: invalid image format." + } +} + +{ + "error": { + "@Message.ExtendedInfo": [ + { + "@odata.type": "#Message.v1_0_0.Message", + "Message": "The resource /redfish/v1/UpdateService was unable to satisfy the request due to unavailability of resources.", + "MessageArgs": [ + "/redfish/v1/UpdateService" + ], + "MessageId": "Base.1.4.0.ResourceExhaustion", + "Resolution": "Ensure that the resources are available and resubmit the request.", + "Severity": "Critical" + } + ], + "code": "Base.1.4.0.ResourceExhaustion", + "message": "The resource /redfish/v1/UpdateService was unable to satisfy the request due to unavailability of resources." + } +} + +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + dbus_helpers.hpp | 30 ++++++++++++++++++++++++++++++ + pfr_image_manager.cpp | 18 ++++++++++++++++++ + 2 files changed, 48 insertions(+) + create mode 100644 dbus_helpers.hpp + +diff --git a/dbus_helpers.hpp b/dbus_helpers.hpp +new file mode 100644 +index 0000000..b9ffa36 +--- /dev/null ++++ b/dbus_helpers.hpp +@@ -0,0 +1,30 @@ ++#pragma once ++ ++#include "config.h" ++ ++#include <sdbusplus/bus.hpp> ++inline bool isFwupdScriptRunning(sdbusplus::bus::bus& bus) ++{ ++ using ObjectPath = sdbusplus::message::object_path; ++ // type is ssssssouso ++ using ListUnitsType = ++ std::tuple<std::string, std::string, std::string, std::string, ++ std::string, std::string, ObjectPath, uint32_t, std::string, ++ ObjectPath>; ++ auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, ++ SYSTEMD_INTERFACE, "ListUnits"); ++ ++ auto reply = bus.call(method); ++ std::vector<ListUnitsType> resp; ++ reply.read(resp); ++ ++ for (const auto& unit : resp) ++ { ++ if (std::get<0>(unit).find("fwupd@") != std::string::npos && ++ std::get<3>(unit) != "failed") ++ { ++ return true; ++ } ++ } ++ return false; ++} +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index 1a41cbe..fe1e6f9 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -2,6 +2,7 @@ + + #include "pfr_image_manager.hpp" + ++#include "dbus_helpers.hpp" + #include "version.hpp" + #include "watch.hpp" + +@@ -33,6 +34,9 @@ namespace manager + + using namespace sdbusplus::xyz::openbmc_project::Software::Image::Error; + namespace Software = phosphor::logging::xyz::openbmc_project::Software; ++using UnTarFail = Software::Image::UnTarFailure; ++using ImageFail = Software::Image::ImageFailure; ++using BusyFail = Software::Image::BusyFailure; + + static constexpr const uint32_t pfmPos = 2054; + static constexpr const uint32_t block0Magic = 0xB6EAFD19; +@@ -76,6 +80,8 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + phosphor::logging::log<phosphor::logging::level::ERR>( + "Image magic number match failed", + phosphor::logging::entry("IMAGEMAGIC=0x%x", imgMagic)); ++ phosphor::logging::report<UnTarFailure>( ++ UnTarFail::PATH(imgPath.c_str())); + return -1; + } + +@@ -110,6 +116,9 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + + phosphor::logging::log<phosphor::logging::level::ERR>( + "Unknown image type"); ++ phosphor::logging::report<ImageFailure>( ++ ImageFail::FAIL("Unknown image type"), ++ ImageFail::PATH(imgPath.c_str())); + return -1; + } + +@@ -153,6 +162,9 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + "PRIORITY=%i", LOG_ERR, "REDFISH_MESSAGE_ID=%s", + redfishMsgID.c_str(), "REDFISH_MESSAGE_ARGS=%s", + "Image HASH check fail", NULL); ++ phosphor::logging::report<ImageFailure>( ++ ImageFail::FAIL("Security violation: hash mismatch"), ++ ImageFail::PATH(imgPath.c_str())); + return -1; + } + +@@ -167,6 +179,9 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + catch (std::exception& e) + { + phosphor::logging::log<phosphor::logging::level::ERR>(e.what()); ++ phosphor::logging::report<ImageFailure>( ++ ImageFail::FAIL("Unhandled exception"), ++ ImageFail::PATH(imgPath.c_str())); + return -1; + } + } +@@ -182,6 +197,12 @@ int Manager::processImage(const std::string& imgFilePath) + if (!std::filesystem::exists(imgPath)) + return -1; + ++ if (isFwupdScriptRunning(bus)) ++ { ++ phosphor::logging::report<BusyFailure>(BusyFail::PATH(imgPath.c_str())); ++ return -1; ++ } ++ + int retry = 3; + std::string ver; + std::string purposeString; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0013-remove-image-file-on-pre-script-failures.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0013-remove-image-file-on-pre-script-failures.patch new file mode 100644 index 000000000..6bbd59918 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0013-remove-image-file-on-pre-script-failures.patch @@ -0,0 +1,40 @@ +From 0628db177655e6f890c4da8c7de7c3cd7487d528 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Thu, 16 Jul 2020 14:16:28 -0700 +Subject: [PATCH] remove image file on pre-script failures + +Multiple back-to-back updates of bad images will cause the software +manager to leave junk images hanging around. This is part of a fix that +will remove them if the software manager never gets around to launching +the fwupd.sh script. The other part is that the fwupd.sh script must +always delete the image file on exit, success or failure. + +Tested: posted a garbage file, saw that it was deleted even though + fwupd.sh was never invoked. + +Change-Id: I6b049916a3edcb48f9d4ebe0d4715b94214b4feb +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +--- + watch.cpp | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/watch.cpp b/watch.cpp +index d6c09a946fd0..5d70edbf52b4 100644 +--- a/watch.cpp ++++ b/watch.cpp +@@ -106,6 +106,12 @@ int Watch::callback(sd_event_source* /* s */, int fd, uint32_t revents, + { + error("Error ({RC}) processing image {IMAGE}", "RC", rc, + "IMAGE", tarballPath); ++ std::error_code ec{}; ++ fs::remove_all(tarballPath, ec); ++ if (!ec) ++ { ++ error("Unable to remove image on processing failure"); ++ } + } + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0014-PFR-image-verification.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0014-PFR-image-verification.patch new file mode 100644 index 000000000..dfc7f2e58 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0014-PFR-image-verification.patch @@ -0,0 +1,116 @@ +From 9d82d53b50769506926dd99273f197a268d68fa3 Mon Sep 17 00:00:00 2001 +From: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +Date: Thu, 30 Jul 2020 09:50:40 +0000 +Subject: [PATCH] PFR-image-verification + +Add support verify the complete fw image by using mtd-util repo's +pfr_authenticate function. + +Tested. +1. Upload the corrupted image. +POST: https://<BMC_IP>/redfish/v1/UpdateService/ + with <Corrupted BMC_signed_cap> binary file +Response: +{ + "error": { + "@Message.ExtendedInfo": [ + { + "@odata.type": "/redfish/v1/$metadata#Message.v1_0_0.Message", + "Message": "Invalid file uploaded to /redfish/v1/UpdateService: + Invalid image format.", + "MessageArgs": [ + "/redfish/v1/UpdateService", + "Invalid image format" + ], + "MessageId": "OpenBMC.0.1.0.InvalidUpload", + "Resolution": "None.", + "Severity": "Warning" + } + ], + "code": "OpenBMC.0.1.0.InvalidUpload", + "message": "Invalid file uploaded to /redfish/v1/UpdateService: + Invalid image format." + } +} + +2. Upload the correct image. +POST: https://<BMC_IP>/redfish/v1/UpdateService/ + with <BMC_signed_cap> binary file + +Image verified and firmware updated. +{ + "@odata.id": "/redfish/v1/TaskService/Tasks/0", + "@odata.type": "#Task.v1_4_3.Task", + "Id": "0", + "TaskState": "Running", + "TaskStatus": "OK" +} + +Command: +GET: https://<BMC_IP>/redfish/v1/Systems/system/LogServices/EventLog/ + Entries + +Response: +{ + "@odata.id": "/redfish/v1/Systems/system/LogServices/EventLog/ + Entries/1596082187", + "@odata.type": "#LogEntry.v1_4_0.LogEntry", + "Created": "2020-07-30T04:09:47+00:00", + "EntryType": "Event", + "Id": "1596082187", + "Message": "BMC firmware update to version 00.72 completed + successfully.", + "MessageArgs": [ + "BMC", + "00.72" + ], + "MessageId": "OpenBMC.0.1.FirmwareUpdateCompleted", + "Name": "System Event Log Entry", + "Severity": "OK" + }, + +Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +--- + pfr_image_manager.cpp | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index eeed4fe..16231fa 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -15,6 +15,7 @@ + #include <time.h> + #include <unistd.h> + ++#include <boost/process/child.hpp> + #include <elog-errors.hpp> + #include <xyz/openbmc_project/Software/Image/error.hpp> + +@@ -122,6 +123,24 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + return -1; + } + ++ // Verify the complete image ++ std::string mtdUtilfile = "/usr/bin/mtd-util"; ++ std::vector<std::string> mtdUtilCmd = {"p", "a"}; ++ mtdUtilCmd.push_back(imgPath); ++ ++ boost::process::child execProg(mtdUtilfile, mtdUtilCmd); ++ execProg.wait(); ++ if (execProg.exit_code()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Image authentication failed"); ++ phosphor::logging::report<ImageFailure>( ++ ImageFail::FAIL( ++ "Security violation: image authentication failure"), ++ ImageFail::PATH(imgPath.c_str())); ++ return -1; ++ } ++ + imgFile.seekg(pfmPos, + std::ios::beg); // Version is at 0x806 in the PFM + imgFile.read(reinterpret_cast<char*>(&verData), sizeof(verData)); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0016-Process-PLDM-image-type.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0016-Process-PLDM-image-type.patch new file mode 100644 index 000000000..bc94f00af --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0016-Process-PLDM-image-type.patch @@ -0,0 +1,234 @@ +From a78b7a609f58ac82623c357426ef0590d6d76971 Mon Sep 17 00:00:00 2001 +From: Ayushi Smriti <smriti.ayushi@intel.com> +Date: Mon, 9 Nov 2020 23:04:58 +0530 +Subject: [PATCH] Process PLDM image type + +This change is to check whether the image uploaded is of PLDM image +type based on the PackageHeaderIdentifier check which is a 16 bytes +uuid field in the pldm package header. + +Also, determine image purpose and version. +Purpose is set to pldm enum type and for version, PackageVersionString +is concluded based on PackageVersionStringLength value. + +Tested: +- On uploading a pldm image through Redfish. Uuid is identified and +matched correctly. +- Purpose and version is given to the image as expected and activation +intf got added. + - verified same with busctl cmd on xyz.openbmc_project.Software.Version + and xyz.openbmc_project.Software.BMC.Updater +- Verified the regular PFR update procedure works + - received expected redfish response from postman + - verified fwupd.sh script is reached + +Signed-off-by: Ayushi Smriti <smriti.ayushi@intel.com> +--- + item_updater.cpp | 4 +- + pfr_image_manager.cpp | 95 +++++++++++++++++++++++++++++++++++++++++-- + pfr_image_manager.hpp | 6 +-- + pldm.hpp | 21 ++++++++++ + 4 files changed, 119 insertions(+), 7 deletions(-) + create mode 100644 pldm.hpp + +diff --git a/item_updater.cpp b/item_updater.cpp +index db255d6..7af80e3 100644 +--- a/item_updater.cpp ++++ b/item_updater.cpp +@@ -67,6 +67,7 @@ void ItemUpdater::createActivation(sdbusplus::message::message& msg) + #if defined(HOST_BIOS_UPGRADE) || defined(PFR_UPDATE) + value == VersionPurpose::Host || + #endif ++ value == VersionPurpose::PLDM || + value == VersionPurpose::Other) + { + purpose = value; +@@ -397,7 +398,8 @@ void ItemUpdater::deleteAll() + } + + ItemUpdater::ActivationStatus +- ItemUpdater::validateSquashFSImage(const std::string& filePath) ++ ItemUpdater::validateSquashFSImage(__attribute__((unused)) ++ const std::string& filePath) + { + #ifndef PFR_UPDATE + bool valid = true; +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index 178367f..c923494 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -3,6 +3,7 @@ + #include "pfr_image_manager.hpp" + + #include "dbus_helpers.hpp" ++#include "pldm.hpp" + #include "version.hpp" + #include "watch.hpp" + +@@ -44,9 +45,10 @@ using BusyFail = Software::Image::BusyFailure; + static constexpr const uint32_t pfmPos = 2054; + static constexpr const uint32_t block0Magic = 0xB6EAFD19; + static constexpr const uint32_t lengthBlk0Blk1 = 1024; ++static constexpr const uint32_t pldmMagic = 0xF018878C; + +-int Manager::verifyPFRImage(const std::filesystem::path imgPath, +- std::string& version, std::string& purposeString) ++int Manager::verifyImage(const std::filesystem::path imgPath, ++ std::string& version, std::string& purposeString) + { + uint8_t imgType = 0; + uint32_t imgMagic = 0; +@@ -76,6 +78,93 @@ int Manager::verifyPFRImage(const std::filesystem::path imgPath, + + imgMagic = block0Data.tag; + ++ if (htobe32(imgMagic) == pldmMagic) ++ { ++ if (!version.empty()) ++ { ++ version.clear(); ++ } ++ ++ imgFile.seekg(0, std::ios_base::end); ++ ++ const size_t length = imgFile.tellg(); ++ constexpr size_t readBytes = 36; ++ ++ if (length < readBytes) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Insufficient file length to read the required " ++ "bytes"); ++ return -1; ++ } ++ ++ imgFile.seekg(0, std::ios::beg); ++ ++ std::array<char, readBytes> buffer = {}; ++ ++ imgFile.read( ++ buffer.data(), ++ buffer.size()); // read 36 bytes of PLDM Package Header ++ ++ if (!imgFile.good()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Image file read is not successful"); ++ return -1; ++ } ++ ++ if (!std::equal(buffer.begin(), ++ buffer.begin() + pldm::headerIdLen, ++ pldm::pldmPkgHeaderId ++ .begin())) // comparing 16 bytes of ++ // PackageHeaderIdentifier field ++ { ++ std::string redfishMsgID = ++ "OpenBMC.0.1.FirmwareUpdateFailed"; ++ sd_journal_send( ++ "MESSAGE=%s", "Firmware image verification failed", ++ "PRIORITY=%i", LOG_ERR, "REDFISH_MESSAGE_ID=%s", ++ redfishMsgID.c_str(), "REDFISH_MESSAGE_ARGS=%s", ++ "PLDM Image package header identifier check fail", ++ NULL); ++ ++ return -1; ++ } ++ ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "Package header identifier matched"); ++ purposeString = ++ "xyz.openbmc_project.Software.Version.VersionPurpose.PLDM"; ++ ++ const uint8_t pkgVerStrLen = static_cast<uint8_t>( ++ buffer[35]); // PackageVersionStringLen byte ++ ++ imgFile.seekg(readBytes, ++ std::ios::beg); // point to the begin of ++ // PackageVersionString field ++ // i.e. 36th pos ++ ++ std::array<char, 255> ver = {}; ++ imgFile.read(ver.data(), ++ pkgVerStrLen); // read PackageVersionString bytes ++ ++ if (!imgFile.good()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Image file read is not successful"); ++ return -1; ++ } ++ ++ version.assign(ver.data(), pkgVerStrLen); ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "Package version string value", ++ phosphor::logging::entry("IMAGE_VERSION=%s", ++ version.c_str())); ++ ++ imgFile.close(); ++ return 0; ++ } ++ + if (imgMagic != block0Magic) + { + phosphor::logging::log<phosphor::logging::level::ERR>( +@@ -226,7 +315,7 @@ int Manager::processImage(const std::string& imgFilePath) + std::string ver; + std::string purposeString; + +- if (0 != verifyPFRImage(imgFilePath, ver, purposeString)) ++ if (0 != verifyImage(imgFilePath, ver, purposeString)) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Error verifying uploaded image"); +diff --git a/pfr_image_manager.hpp b/pfr_image_manager.hpp +index 3591f1a..2facfe6 100644 +--- a/pfr_image_manager.hpp ++++ b/pfr_image_manager.hpp +@@ -156,13 +156,13 @@ class Manager + CustomMap mapFile(const std::filesystem::path& path, size_t size); + + /** +- * @brief Verify the PFR image and return version and purpose ++ * @brief Verify the uploaded image type and return version and purpose + * @param[in] - file path + * @param[out] - version + * @param[out] - purpose + */ +- int verifyPFRImage(const std::filesystem::path imgPath, +- std::string& version, std::string& purposeString); ++ int verifyImage(const std::filesystem::path imgPath, std::string& version, ++ std::string& purposeString); + /** @brief Persistent map of Version dbus objects and their + * version id */ + std::map<std::string, std::unique_ptr<Version>> versions; +diff --git a/pldm.hpp b/pldm.hpp +new file mode 100644 +index 0000000..edbd6ae +--- /dev/null ++++ b/pldm.hpp +@@ -0,0 +1,21 @@ ++namespace pldm ++{ ++ ++struct PldmPkgHeader ++{ ++ uint8_t uuid[16]; // PackageHeaderIdentifier ++ uint8_t formatRev; // PackageHeaderFormatRevision ++ uint16_t headerSize; // PackageHeaderSize ++ uint8_t timestamp[13]; // PackageReleaseDateTime ++ uint16_t bitmapLen; // ComponentBitmapBitLength ++ uint8_t verStringType; // PackageVersionStringType ++ uint8_t verStringLen; // PackageVersionStringLength ++} __attribute__((packed)); ++ ++constexpr size_t headerIdLen = 16; ++ ++const std::array<char, headerIdLen> pldmPkgHeaderId = { ++ 0xF0, 0x18, 0x87, 0x8C, 0xCB, 0x7D, 0x49, 0x43, ++ 0x98, 0x00, 0xA0, 0x2F, 0x05, 0x9A, 0xCA, 0x02}; // 16 bytes package header ++ // identifier uuid ++} // namespace pldm +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0017-Fix-build-error.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0017-Fix-build-error.patch new file mode 100644 index 000000000..d21dbd63c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0017-Fix-build-error.patch @@ -0,0 +1,34 @@ +From 1f3531eff8a05bb5375dea89c1ca9292f69863b0 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Thu, 11 Mar 2021 11:42:39 -0800 +Subject: [PATCH] Fix build error + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + pfr_image_manager.cpp | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index f844b8e79565..55ad21f8a3d4 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -333,6 +333,7 @@ int Manager::processImage(const std::string& imgFilePath) + + int retry = 3; + std::string ver; ++ std::string extVer; + std::string purposeString; + + if (0 != verifyImage(imgFilePath, ver, purposeString)) +@@ -398,7 +399,7 @@ int Manager::processImage(const std::string& imgFilePath) + std::string objPath = std::string{SOFTWARE_OBJPATH} + '/' + id; + + auto versionPtr = std::make_unique<Version>( +- bus, objPath, ver, purpose, imageDirPath.string(), ++ bus, objPath, ver, purpose, extVer, imageDirPath.string(), + std::bind(&Manager::erase, this, std::placeholders::_1)); + versionPtr->deleteObject = + std::make_unique<phosphor::software::manager::Delete>(bus, objPath, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0018-Fix-delete-image-by-ID-and-inhibit-removal-of-bmc_ac.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0018-Fix-delete-image-by-ID-and-inhibit-removal-of-bmc_ac.patch new file mode 100644 index 000000000..0b2026c92 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0018-Fix-delete-image-by-ID-and-inhibit-removal-of-bmc_ac.patch @@ -0,0 +1,171 @@ +From 77b861136b6780ce4eabfe9589a0b584e6ed2b43 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 21 Apr 2021 21:16:47 +0000 +Subject: [PATCH] Fix delete image by ID and inhibit removal of bmc_active + +Delete image by ID was broken because when hitting the delete dbus +interface, it recalculated the ID from the parent version, which then +does not match because of the random number addition that was added +to the ID when the parent interface was created. This saves away the +parent interface ID and recalls it rather than recalculating it. + +Also, there was a logic error in deleting images that would delete the +active BMC image. This fixes up that error. + +Tested: run multiple back-to back updates and see that when the fwupd + script calls delete, the interfaces are deleted and that the + bmc_active interface is not deleted. + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + image_manager.cpp | 2 +- + item_updater.cpp | 16 +++++++++++----- + pfr_image_manager.cpp | 2 +- + version.cpp | 2 +- + version.hpp | 19 +++++++++++++++---- + 5 files changed, 29 insertions(+), 12 deletions(-) + +diff --git a/image_manager.cpp b/image_manager.cpp +index 6334704cd980..4fefd221e6d2 100644 +--- a/image_manager.cpp ++++ b/image_manager.cpp +@@ -221,7 +221,7 @@ int Manager::processImage(const std::string& tarFilePath) + { + // Create Version object + auto versionPtr = std::make_unique<Version>( +- bus, objPath, version, purpose, extendedVersion, ++ bus, objPath, id, version, purpose, extendedVersion, + imageDirPath.string(), + std::bind(&Manager::erase, this, std::placeholders::_1)); + versionPtr->deleteObject = +diff --git a/item_updater.cpp b/item_updater.cpp +index 26b52b3f7846..3f64feb43c55 100644 +--- a/item_updater.cpp ++++ b/item_updater.cpp +@@ -145,7 +145,7 @@ void ItemUpdater::createActivation(sdbusplus::message::message& msg) + activationState, associations))); + + auto versionPtr = std::make_unique<VersionClass>( +- bus, path, version, purpose, extendedVersion, filePath, ++ bus, path, versionId, version, purpose, extendedVersion, filePath, + std::bind(&ItemUpdater::erase, this, std::placeholders::_1)); + versionPtr->deleteObject = + std::make_unique<phosphor::software::manager::Delete>(bus, path, +@@ -260,7 +260,7 @@ void ItemUpdater::processBMCImage() + + // Create Version instance for this version. + auto versionPtr = std::make_unique<VersionClass>( +- bus, path, version, purpose, extendedVersion, "", ++ bus, path, id, version, purpose, extendedVersion, "", + std::bind(&ItemUpdater::erase, this, std::placeholders::_1)); + auto isVersionFunctional = versionPtr->isFunctional(); + if (!isVersionFunctional) +@@ -336,9 +336,9 @@ void ItemUpdater::erase(std::string entryId) + auto it = versions.find(entryId); + if (it != versions.end()) + { +- if (it->second->isFunctional() && ACTIVE_BMC_MAX_ALLOWED > 1) ++ if (it->second->isFunctional()) + { +- error( ++ info( + "Version ({VERSIONID}) is currently running on the BMC; unable to remove.", + "VERSIONID", entryId); + return; +@@ -679,6 +679,12 @@ void ItemUpdater::freeSpace(Activation& caller) + std::size_t count = 0; + for (const auto& iter : activations) + { ++ if (versions.find(iter.second->versionId)->second->isFunctional()) ++ { ++ // don't bother with function versions ++ continue; ++ } ++ + if ((iter.second.get()->activation() == + server::Activation::Activations::Active) || + (iter.second.get()->activation() == +@@ -772,7 +778,7 @@ void ItemUpdater::createBIOSObject() + // Do nothing; + }; + biosVersion = std::make_unique<VersionClass>( +- bus, path, version, VersionPurpose::Host, "", "", ++ bus, path, versionId, version, VersionPurpose::Host, "", "", + std::bind(dummyErase, std::placeholders::_1)); + biosVersion->deleteObject = + std::make_unique<phosphor::software::manager::Delete>(bus, path, +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index 80db63ca4d85..03bc34a3a78b 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -399,7 +399,7 @@ int Manager::processImage(const std::string& imgFilePath) + std::string objPath = std::string{SOFTWARE_OBJPATH} + '/' + id; + + auto versionPtr = std::make_unique<Version>( +- bus, objPath, ver, purpose, extVer, imageDirPath.string(), ++ bus, objPath, id, ver, purpose, extVer, imageDirPath.string(), + std::bind(&Manager::erase, this, std::placeholders::_1)); + versionPtr->deleteObject = + std::make_unique<phosphor::software::manager::Delete>(bus, objPath, +diff --git a/version.cpp b/version.cpp +index 97f3be94b4aa..5410c38887f8 100644 +--- a/version.cpp ++++ b/version.cpp +@@ -208,7 +208,7 @@ void Delete::delete_() + { + if (parent.eraseCallback) + { +- parent.eraseCallback(parent.getId(parent.version())); ++ parent.eraseCallback(parent.getExtId()); + } + } + +diff --git a/version.hpp b/version.hpp +index 8a68cb5f7b1f..afc589c0226c 100644 +--- a/version.hpp ++++ b/version.hpp +@@ -77,11 +77,11 @@ class Version : public VersionInherit + * @param[in] callback - The eraseFunc callback + */ + Version(sdbusplus::bus::bus& bus, const std::string& objPath, +- const std::string& versionString, VersionPurpose versionPurpose, +- const std::string& extVersion, const std::string& filePath, +- eraseFunc callback) : ++ const std::string& extId, const std::string& versionString, ++ VersionPurpose versionPurpose, const std::string& extVersion, ++ const std::string& filePath, eraseFunc callback) : + VersionInherit(bus, (objPath).c_str(), true), +- eraseCallback(callback), versionStr(versionString) ++ eraseCallback(callback), versionStr(versionString), extId(extId) + { + // Set properties. + extendedVersion(extVersion); +@@ -150,6 +150,15 @@ class Version : public VersionInherit + */ + bool isFunctional(); + ++ /* @brief Return the extended ID of this version object ++ * ++ * @ return - returns the extended ID string ++ */ ++ std::string getExtId() ++ { ++ return extId; ++ } ++ + /** @brief Persistent Delete D-Bus object */ + std::unique_ptr<Delete> deleteObject; + +@@ -159,6 +168,8 @@ class Version : public VersionInherit + private: + /** @brief This Version's version string */ + const std::string versionStr; ++ /** @brief This is extended version string */ ++ const std::string extId; + }; + + } // namespace manager +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0019-log-redfish-errors-on-all-pfr-image-auth-failures.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0019-log-redfish-errors-on-all-pfr-image-auth-failures.patch new file mode 100644 index 000000000..3a245c944 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/0019-log-redfish-errors-on-all-pfr-image-auth-failures.patch @@ -0,0 +1,100 @@ +From 8d3eb2a57a70715b2cc6088904e8be007ab921b2 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Fri, 27 Aug 2021 11:44:02 -0700 +Subject: [PATCH 1/4] log redfish errors on all pfr image auth failures + +Previous code was doing a 'mtd-util pfr authenticate' prior to manually +calculating and comparing the hashes. This is incorrect behavior. There +is no need to manually calculate hashes since that is part of the pfr +authentication process. + +An unintended side effect of this is that if pfr authenticate fails for +some reason other than hash compare, the redfish log does not happen. + +Tested: phosphor-version-software-mananger logs a redfish log on rom id + mismatch as expected. + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +--- + pfr_image_manager.cpp | 51 +++++-------------------------------------- + 1 file changed, 5 insertions(+), 46 deletions(-) + +diff --git a/pfr_image_manager.cpp b/pfr_image_manager.cpp +index ce850cb..aa96a99 100644 +--- a/pfr_image_manager.cpp ++++ b/pfr_image_manager.cpp +@@ -53,13 +53,10 @@ int Manager::verifyImage(const std::filesystem::path imgPath, + uint8_t imgType = 0; + uint32_t imgMagic = 0; + uint8_t verData[2] = {0}; +- uint32_t hashLen = 0; + struct pfrImgBlock0 block0Data = {}; + + std::string imageName; + +- EVP_MD_CTX* ctx; +- + if (std::filesystem::exists(imgPath)) + { + try +@@ -227,52 +224,14 @@ int Manager::verifyImage(const std::filesystem::path imgPath, + ImageFail::FAIL( + "Security violation: image authentication failure"), + ImageFail::PATH(imgPath.c_str())); +- return -1; +- } +- +- imgFile.seekg(pfmPos, +- std::ios::beg); // Version is at 0x806 in the PFM +- imgFile.read(reinterpret_cast<char*>(&verData), sizeof(verData)); +- imgFile.close(); +- +- auto size = std::filesystem::file_size(imgPath); +- +- phosphor::logging::log<phosphor::logging::level::INFO>( +- "Image Size", phosphor::logging::entry("IMAGESIZE=0x%x", +- static_cast<int>(size))); +- +- // Adds all digest algorithms to the internal table +- OpenSSL_add_all_digests(); +- +- ctx = EVP_MD_CTX_create(); +- EVP_DigestInit(ctx, EVP_sha256()); + +- // Hash the image file and update the digest +- auto dataPtr = mapFile(imgPath, size); +- +- EVP_DigestUpdate(ctx, ((uint8_t*)dataPtr() + lengthBlk0Blk1), +- (size - lengthBlk0Blk1)); +- +- std::vector<uint8_t> digest(EVP_MD_size(EVP_sha256())); +- std::vector<uint8_t> expectedDigest(block0Data.hash256, +- &block0Data.hash256[0] + 32); +- +- EVP_DigestFinal(ctx, digest.data(), &hashLen); +- EVP_MD_CTX_destroy(ctx); +- +- std::string redfishMsgID = "OpenBMC.0.1"; +- +- if (expectedDigest != digest) +- { +- redfishMsgID += ".GeneralFirmwareSecurityViolation"; ++ constexpr const char* redfishMsgID = ++ "OpenBMC.0.1.GeneralFirmwareSecurityViolation"; + sd_journal_send("MESSAGE=%s", +- "Firmware image HASH verification failed", ++ "Firmware image authentication failed", + "PRIORITY=%i", LOG_ERR, "REDFISH_MESSAGE_ID=%s", +- redfishMsgID.c_str(), "REDFISH_MESSAGE_ARGS=%s", +- "Image HASH check fail", NULL); +- phosphor::logging::report<ImageFailure>( +- ImageFail::FAIL("Security violation: hash mismatch"), +- ImageFail::PATH(imgPath.c_str())); ++ redfishMsgID, "REDFISH_MESSAGE_ARGS=%s", ++ "Image authentication check fail", NULL); + return -1; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/fwupd@.service b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/fwupd@.service new file mode 100644 index 000000000..d21647611 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager/fwupd@.service @@ -0,0 +1,8 @@ +[Unit]
+Description=Flash BMC with fwupd script : %I
+
+[Service]
+Type=oneshot
+RemainAfterExit=no
+ExecStart=/bin/systemd-inhibit --what=shutdown:sleep --who=fwupd --why "Firmware Update %i" --mode=block /usr/bin/fwupd.sh %i
+SyslogIdentifier=fwupd
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend new file mode 100644 index 000000000..53d09387b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/flash/phosphor-software-manager_%.bbappend @@ -0,0 +1,30 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +EXTRA_OEMESON += "-Dfwupd-script=enabled" + +SYSTEMD_SERVICE:${PN}-updater += "fwupd@.service" + +EXTRA_OEMESON += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', '-Dpfr-update=enabled', '', d)}" + +SRC_URI += " \ + file://0002-Redfish-firmware-activation.patch \ + file://0004-Changed-the-condition-of-software-version-service-wa.patch \ + file://0005-Modified-firmware-activation-to-launch-fwupd.sh-thro.patch \ + file://0006-Modify-the-ID-of-software-image-updater-object-on-DB.patch \ + file://0007-Adding-StandBySpare-for-firmware-activation.patch \ + file://0008-item_updater-update-the-bmc_active-objectPath.patch \ + file://0009-Add-ApplyOptions-D-bus-property-under-Software.patch \ + file://0013-remove-image-file-on-pre-script-failures.patch \ + " + +SRC_URI_PFR = " \ + file://0007-PFR-images-support.patch \ + file://0008-PFR-image-HASH-verification.patch \ + file://0010-Add-error-reporting-to-pfr_image_manager.patch \ + file://0014-PFR-image-verification.patch \ + file://0016-Process-PLDM-image-type.patch \ + file://0017-Fix-build-error.patch \ + file://0018-Fix-delete-image-by-ID-and-inhibit-removal-of-bmc_ac.patch \ + file://0019-log-redfish-errors-on-all-pfr-image-auth-failures.patch \ + " + +SRC_URI += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', SRC_URI_PFR, '', d)}" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru.bb new file mode 100644 index 000000000..a8dd35487 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru.bb @@ -0,0 +1,26 @@ +SUMMARY = "Default Fru" +DESCRIPTION = "Builds a default FRU file at runtime based on board ID" + +inherit obmc-phosphor-systemd +inherit cmake + +SRC_URI = "file://checkFru.sh;subdir=${BP} \ + file://decodeBoardID.sh;subdir=${BP} \ + file://mkfru.cpp;subdir=${BP} \ + file://CMakeLists.txt;subdir=${BP} \ + " +SYSTEMD_SERVICE:${PN} = "SetBaseboardFru.service" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "\ + file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658 \ + file://mkfru.cpp;beginline=2;endline=14;md5=c451359f18a13ee69602afce1588c01a \ + " + +RDEPENDS:${PN} = "bash" + +do_install:append() { + install -d ${D}${bindir} + install -m 0755 ${S}/checkFru.sh ${D}${bindir}/checkFru.sh + install -m 0755 ${S}/decodeBoardID.sh ${D}${bindir}/decodeBoardID.sh +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/CMakeLists.txt new file mode 100644 index 000000000..a8e633644 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(mkfru CXX) +set(CMAKE_CXX_STANDARD 17) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +add_executable(mkfru mkfru.cpp) +install(TARGETS mkfru DESTINATION bin) + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/SetBaseboardFru.service b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/SetBaseboardFru.service new file mode 100644 index 000000000..d8c2a75ac --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/SetBaseboardFru.service @@ -0,0 +1,9 @@ +[Unit] +Description=Check for FRU presence + +[Service] +ExecStart=/usr/bin/checkFru.sh +Type=oneshot + +[Install] +WantedBy=basic.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/checkFru.sh b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/checkFru.sh new file mode 100755 index 000000000..18a6c7260 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/checkFru.sh @@ -0,0 +1,54 @@ +#!/bin/bash + +# this script checks the gpio id and loads the correct baseboard fru +FRUPATH="/etc/fru" +PRODIDPATH="/var/cache/private" +fruFile="$FRUPATH/baseboard.fru.bin" +prodIDFile="$PRODIDPATH/prodID" +source decodeBoardID.sh + +read_id() { + local idx=0 + local result=0 + local value=0 + for ((idx=0; idx<6; idx++)) + do + typeset -i value=$(gpioget $(gpiofind "FM_BMC_BOARD_SKU_ID${idx}_N")) + value=$((value << idx)) + result=$((result | value)) + done + echo $result +} + +if [ -f $fruFile -a -f $prodIDFile ] && + grep -q 'CPU part\s*: 0xc07' /proc/cpuinfo; then + exit 0 +fi + +NAME="Unknown" +PRODID="0x00" +EEPROM_FRU=false + +BOARD_ID=$(read_id) +decode_board_id + +if [ ! -e $prodIDFile ] +then + echo $PRODID >$prodIDFile +fi + +if $EEPROM_FRU; +then + # Remove baseboard filesystem FRU(if any), as this platform has EEPROM FRU. + rm -f $fruFile + exit 0 +fi + +if [ ! -f $fruFile ] +then + cd /tmp + mkdir -p $FRUPATH + mkfru $NAME + mv $NAME.fru.bin $fruFile +fi + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/decodeBoardID.sh b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/decodeBoardID.sh new file mode 100644 index 000000000..80710ae26 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/decodeBoardID.sh @@ -0,0 +1,6 @@ +#!/bin/bash + +# this script uses the BOARD_ID set from checkFru.sh and provides the NAME, +# PRODID, and EEPROM_FRU values for this platform +decode_board_id() { +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/mkfru.cpp b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/mkfru.cpp new file mode 100644 index 000000000..afadbd324 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fru/default-fru/mkfru.cpp @@ -0,0 +1,219 @@ +/* +// Copyright (c) 2019 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// Abstract: default FRU generation +// +*/ + +#include <fstream> +#include <iostream> +#include <iterator> +#include <numeric> +#include <string> +#include <vector> + +constexpr uint8_t fillChar = '.'; +constexpr uint8_t eof = 0xc1; +const std::string intel = "Intel Corporation"; + +// round up to nearest block size (power of 2) +constexpr size_t blockRound(size_t len, size_t blk) +{ + return ((len) + (((blk) - ((len) & ((blk)-1))) & ((blk)-1))); +} + +uint8_t mklen(uint8_t len) +{ + return static_cast<uint8_t>((0x3 << 6) | len); +} + +struct FruEntry +{ + static constexpr size_t fruBlockSize = 8; // type, length, checksum + static constexpr size_t fixedBytes = 3; // type, length, checksum + FruEntry() = delete; + FruEntry(const std::vector<uint8_t>& contents) + { + constexpr size_t verOffset = 0; + constexpr size_t lenOffset = 1; + value.resize(blockRound(fixedBytes + contents.size(), fruBlockSize)); + value[verOffset] = 1; + value[lenOffset] = blocks(); + std::copy(contents.begin(), contents.end(), value.begin() + 2); + addChecksum(); + } + + void addChecksum() + { + int sum = std::accumulate(value.begin(), value.end(), 0); + value.back() = static_cast<uint8_t>(256 - sum & 0xff); + } + + uint8_t blocks() const + { + return static_cast<uint8_t>(value.size() / 8); + } + + std::vector<uint8_t> value; +}; + +size_t fillDots(std::vector<uint8_t>::iterator start, size_t count) +{ + *start++ = mklen(count); // prefix with (0xc0 | count) + auto end = start + count++; + std::fill(start, end, '.'); + return count; +} + +size_t fillStr(std::vector<uint8_t>::iterator start, const std::string& str) +{ + size_t count = str.size(); + *start++ = mklen(count++); // prefix with (0xc0 | count) + std::copy(str.begin(), str.end(), start); + return count; +} + +std::vector<uint8_t> genChassisContents() +{ + constexpr size_t pnSize = 18; + constexpr size_t snSize = 18; + constexpr size_t amSize = 31; + constexpr size_t headerSize = 1; + constexpr size_t contentSize = headerSize + 1 + pnSize + 1 + snSize + 1 + + amSize + 1 + amSize + sizeof(eof); + std::vector<uint8_t> data(contentSize); + size_t offset = 0; + // chassis type (main server chassis) + data[offset++] = 0x17; + // chassis part number + offset += fillDots(data.begin() + offset, pnSize); + // chassis serial number + offset += fillDots(data.begin() + offset, snSize); + // info am1 + offset += fillDots(data.begin() + offset, amSize); + // info am2 + offset += fillDots(data.begin() + offset, amSize); + data[offset] = eof; + + return data; +} + +std::vector<uint8_t> genBoardContents(const std::string& name) +{ + constexpr size_t headerSize = 4; + constexpr size_t snSize = 12; + constexpr size_t pnSize = 10; + const std::string version = "FRU Ver 0.01"; + size_t contentSize = headerSize + 1 + name.size() + 1 + intel.size() + 1 + + snSize + 1 + pnSize + 1 + version.size() + sizeof(eof); + std::vector<uint8_t> data(contentSize); + size_t offset = 0; + // chassis type (main server chassis) + data[offset++] = 0; // language code + data[offset++] = 0; // mfg date/time + data[offset++] = 0; // mfg date/time + data[offset++] = 0; // mfg date/time + // manufacturer name + offset += fillStr(data.begin() + offset, intel); + // product name + offset += fillStr(data.begin() + offset, name); + // board sn + offset += fillDots(data.begin() + offset, snSize); + // board pn + offset += fillDots(data.begin() + offset, pnSize); + // fru version string + offset += fillStr(data.begin() + offset, version); + data[offset] = eof; + + return data; +} + +std::vector<uint8_t> genProductContents(const std::string& name) +{ + constexpr size_t headerSize = 1; + constexpr size_t pnSize = 10; + constexpr size_t pvSize = 20; + constexpr size_t snSize = 12; + constexpr size_t atSize = 20; + constexpr size_t idSize = 0; + const std::string version = "FRU Ver 0.01"; + size_t contentSize = headerSize + 1 + intel.size() + 1 + name.size() + 1 + + pnSize + 1 + pvSize + 1 + snSize + 1 + atSize + 1 + + idSize + sizeof(eof); + std::vector<uint8_t> data(contentSize); + size_t offset = 0; + // chassis type (main server chassis) + data[offset++] = 0; // language code + // manufacturer name + offset += fillStr(data.begin() + offset, intel); + // product name + offset += fillStr(data.begin() + offset, name); + // product part number + offset += fillDots(data.begin() + offset, pnSize); + // product version + offset += fillDots(data.begin() + offset, pvSize); + // product serial number + offset += fillDots(data.begin() + offset, snSize); + // product asset tag + offset += fillDots(data.begin() + offset, atSize); + // empty fru file id + offset += fillDots(data.begin() + offset, idSize); + data[offset] = eof; + + return data; +} + +int createFru(const std::string& name) +{ + std::vector<uint8_t> internal{1, 0, 0, 0, 0, 0, 0, 1}; // fixed data + FruEntry chassis(genChassisContents()); + FruEntry board(genBoardContents(name)); + FruEntry product(genProductContents(name)); + uint8_t offset = 1; // room for header's offset + FruEntry header({ + offset += 1, // internal size + offset += chassis.blocks(), + offset += board.blocks(), + }); + std::string filename = name + ".fru.bin"; + std::ofstream output(filename); + std::ostream_iterator<uint8_t> outputIter(output); + std::copy(header.value.begin(), header.value.end(), outputIter); + std::copy(internal.begin(), internal.end(), outputIter); + std::copy(chassis.value.begin(), chassis.value.end(), outputIter); + std::copy(board.value.begin(), board.value.end(), outputIter); + std::copy(product.value.begin(), product.value.end(), outputIter); + constexpr size_t minFruSize = 0x1ff; + size_t fruSize = header.value.size() + internal.size() + + chassis.value.size() + board.value.size() + + product.value.size(); + if (fruSize < minFruSize) + { + std::vector<uint8_t> padding(minFruSize - fruSize); + std::copy(padding.begin(), padding.end(), outputIter); + } + output.close(); + return 0; +} + +int main(int argc, const char* argv[]) +{ + if (argc != 2) + { + std::cerr << "Usage: " << argv[0] << " <'Product Name'>\n"; + return 1; + } + return createFru(argv[1]); +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/host/phosphor-host-postd_git.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/host/phosphor-host-postd_git.bbappend new file mode 100644 index 000000000..0c97b0b86 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/host/phosphor-host-postd_git.bbappend @@ -0,0 +1,4 @@ +DEPENDS += " gtest" + +#SRC_URI = "git://github.com/openbmc/phosphor-host-postd.git" +SRCREV = "996facb65d554f7c0f14c10e3c9252d67a01e21a" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0001-Firmware-update-configuration-changes.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0001-Firmware-update-configuration-changes.patch new file mode 100644 index 000000000..6621d2512 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0001-Firmware-update-configuration-changes.patch @@ -0,0 +1,832 @@ +From 7c005c318a12c53ed887b3081bd4b34ea0213053 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Mon, 28 Jun 2021 21:56:18 +0530 +Subject: [PATCH] Firmware update configuration changes + +This commit will provide user to PATCH the below firmware update +attributes before uploding the firmware image. + +1. This will have PATCH support for 'HttpPushUriTargets' and +'HttpPushUriTargetsBusy' attributes. These attributes enables +'HttpPushUri' to distinguish between the firmware update targets. + +2. ApplyOptions are used to specify firmware update specific options +such as ClearConfig which is used while activating the updated +firmware. This setting is maintained in a local static variable +when set using PATCH method. Its used in activate image as input +parameter. This attribute is added as Oem as the default +UpdateService interface doesn't specify any relevant or appropriate +attribute for this. + +Tested: + - GET on "/redfish/v1/UpdateService", got below response +......... + "HttpPushUriTargets": [], + "HttpPushUriTargetsBusy": false +........ + + - PATCH on "/redfish/v1/UpdateService" and works fine. +{ + "HttpPushUriTargets": ["bmc_recovery"], + "HttpPushUriTargetsBusy": true +} + + - Did Firmware update and verified end to end functionality + for both bmc active and backup images. + + - Tested setting ClearConfig to true or false using PATCH + method. + + - Successfully ran redfish validater with no new errors. + +Change-Id: I25ef6d64af3f1dcea3acba93d7fd2b505130142e +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + redfish-core/lib/update_service.hpp | 462 ++++++++++++++---- + static/redfish/v1/$metadata/index.xml | 3 + + .../JsonSchemas/OemUpdateService/index.json | 69 +++ + .../redfish/v1/schema/OemUpdateService_v1.xml | 40 ++ + 4 files changed, 484 insertions(+), 90 deletions(-) + create mode 100644 static/redfish/v1/JsonSchemas/OemUpdateService/index.json + create mode 100644 static/redfish/v1/schema/OemUpdateService_v1.xml + +diff --git a/redfish-core/lib/update_service.hpp b/redfish-core/lib/update_service.hpp +index e420130..b3270f0 100644 +--- a/redfish-core/lib/update_service.hpp ++++ b/redfish-core/lib/update_service.hpp +@@ -26,7 +26,9 @@ + + namespace redfish + { +- ++// params for multiple firmware targets ++std::vector<std::string> httpPushUriTargets; ++bool httpPushUriTargetBusy = false; + // Match signals added on software path + static std::unique_ptr<sdbusplus::bus::match::match> fwUpdateMatcher; + static std::unique_ptr<sdbusplus::bus::match::match> fwUpdateErrorMatcher; +@@ -34,6 +36,17 @@ static std::unique_ptr<sdbusplus::bus::match::match> fwUpdateErrorMatcher; + static bool fwUpdateInProgress = false; + // Timer for software available + static std::unique_ptr<boost::asio::steady_timer> fwAvailableTimer; ++static constexpr const char* versionIntf = ++ "xyz.openbmc_project.Software.Version"; ++static constexpr const char* activationIntf = ++ "xyz.openbmc_project.Software.Activation"; ++static constexpr const char* reqActivationPropName = "RequestedActivation"; ++static constexpr const char* reqActivationsActive = ++ "xyz.openbmc_project.Software.Activation.RequestedActivations.Active"; ++static constexpr const char* reqActivationsStandBySpare = ++ "xyz.openbmc_project.Software.Activation.RequestedActivations.StandbySpare"; ++static constexpr const char* activationsStandBySpare = ++ "xyz.openbmc_project.Software.Activation.Activations.StandbySpare"; + + inline static void cleanUp() + { +@@ -42,28 +55,120 @@ inline static void cleanUp() + fwUpdateErrorMatcher = nullptr; + } + inline static void activateImage(const std::string& objPath, +- const std::string& service) ++ const std::string& service, ++ const std::vector<std::string>& imgUriTargets) + { + BMCWEB_LOG_DEBUG << "Activate image for " << objPath << " " << service; ++ // If targets is empty, it will apply to the active. ++ if (imgUriTargets.size() == 0) ++ { ++ crow::connections::systemBus->async_method_call( ++ [](const boost::system::error_code error_code) { ++ if (error_code) ++ { ++ BMCWEB_LOG_DEBUG ++ << "RequestedActivation failed: error_code = " ++ << error_code; ++ BMCWEB_LOG_DEBUG << "error msg = " << error_code.message(); ++ } ++ }, ++ service, objPath, "org.freedesktop.DBus.Properties", "Set", ++ activationIntf, reqActivationPropName, ++ std::variant<std::string>(reqActivationsActive)); ++ return; ++ } ++ ++ // TODO: Now we support only one target becuase software-manager ++ // code support one activation per object. It will be enhanced ++ // to multiple targets for single image in future. For now, ++ // consider first target alone. + crow::connections::systemBus->async_method_call( +- [](const boost::system::error_code errorCode) { +- if (errorCode) ++ [objPath, service, imgTarget{imgUriTargets[0]}]( ++ const boost::system::error_code ec, ++ const crow::openbmc_mapper::GetSubTreeType& subtree) { ++ if (ec || !subtree.size()) ++ { ++ return; ++ } ++ ++ for (const auto& [invObjPath, invDict] : subtree) + { +- BMCWEB_LOG_DEBUG << "error_code = " << errorCode; +- BMCWEB_LOG_DEBUG << "error msg = " << errorCode.message(); ++ std::size_t idPos = invObjPath.rfind("/"); ++ if ((idPos == std::string::npos) || ++ ((idPos + 1) >= invObjPath.size())) ++ { ++ BMCWEB_LOG_DEBUG << "Can't parse firmware ID!!"; ++ return; ++ } ++ std::string swId = invObjPath.substr(idPos + 1); ++ ++ if (swId != imgTarget) ++ { ++ continue; ++ } ++ ++ if (invDict.size() < 1) ++ { ++ continue; ++ } ++ BMCWEB_LOG_DEBUG << "Image target matched with object " ++ << invObjPath; ++ crow::connections::systemBus->async_method_call( ++ [objPath, ++ service](const boost::system::error_code error_code, ++ const std::variant<std::string> value) { ++ if (error_code) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Error in querying activation value"; ++ // not all fwtypes are updateable, ++ // this is ok ++ return; ++ } ++ std::string activationValue = ++ std::get<std::string>(value); ++ BMCWEB_LOG_DEBUG << "Activation Value: " ++ << activationValue; ++ std::string reqActivation = reqActivationsActive; ++ if (activationValue == activationsStandBySpare) ++ { ++ reqActivation = reqActivationsStandBySpare; ++ } ++ BMCWEB_LOG_DEBUG ++ << "Setting RequestedActivation value as " ++ << reqActivation << " for " << service << " " ++ << objPath; ++ crow::connections::systemBus->async_method_call( ++ [](const boost::system::error_code error_code) { ++ if (error_code) ++ { ++ BMCWEB_LOG_DEBUG ++ << "RequestedActivation failed: ec = " ++ << error_code; ++ } ++ return; ++ }, ++ service, objPath, "org.freedesktop.DBus.Properties", ++ "Set", activationIntf, reqActivationPropName, ++ std::variant<std::string>(reqActivation)); ++ }, ++ invDict[0].first, ++ "/xyz/openbmc_project/software/" + imgTarget, ++ "org.freedesktop.DBus.Properties", "Get", activationIntf, ++ "Activation"); + } + }, +- service, objPath, "org.freedesktop.DBus.Properties", "Set", +- "xyz.openbmc_project.Software.Activation", "RequestedActivation", +- std::variant<std::string>( +- "xyz.openbmc_project.Software.Activation.RequestedActivations." +- "Active")); ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTree", "/", ++ static_cast<int32_t>(0), std::array<const char*, 1>{versionIntf}); + } + + // Note that asyncResp can be either a valid pointer or nullptr. If nullptr + // then no asyncResp updates will occur + static void + softwareInterfaceAdded(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const std::vector<std::string> imgUriTargets, + sdbusplus::message::message& m, + task::Payload&& payload) + { +@@ -76,23 +181,25 @@ static void + + m.read(objPath, interfacesProperties); + +- BMCWEB_LOG_DEBUG << "obj path = " << objPath.str; ++ BMCWEB_LOG_DEBUG << "Software Interface Added. obj path = " << objPath.str; + for (auto& interface : interfacesProperties) + { + BMCWEB_LOG_DEBUG << "interface = " << interface.first; + +- if (interface.first == "xyz.openbmc_project.Software.Activation") ++ if (interface.first == activationIntf) + { + // Retrieve service and activate + crow::connections::systemBus->async_method_call( +- [objPath, asyncResp, payload(std::move(payload))]( ++ [objPath, asyncResp, imgTargets{imgUriTargets}, ++ payload(std::move(payload))]( + const boost::system::error_code errorCode, +- const std::vector< +- std::pair<std::string, std::vector<std::string>>>& +- objInfo) mutable { ++ const std::vector<std::pair< ++ std::string, std::vector<std::string>>>& objInfo) { + if (errorCode) + { +- BMCWEB_LOG_DEBUG << "error_code = " << errorCode; ++ BMCWEB_LOG_DEBUG ++ << "GetSoftwareObject path failed: error_code = " ++ << errorCode; + BMCWEB_LOG_DEBUG << "error msg = " + << errorCode.message(); + if (asyncResp) +@@ -119,7 +226,7 @@ static void + // is added + fwAvailableTimer = nullptr; + +- activateImage(objPath.str, objInfo[0].first); ++ activateImage(objPath.str, objInfo[0].first, imgTargets); + if (asyncResp) + { + std::shared_ptr<task::TaskData> task = +@@ -251,8 +358,7 @@ static void + "xyz.openbmc_project.ObjectMapper", + "/xyz/openbmc_project/object_mapper", + "xyz.openbmc_project.ObjectMapper", "GetObject", objPath.str, +- std::array<const char*, 1>{ +- "xyz.openbmc_project.Software.Activation"}); ++ std::array<const char*, 1>{activationIntf}); + } + } + } +@@ -262,7 +368,7 @@ static void + static void monitorForSoftwareAvailable( + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + const crow::Request& req, const std::string& url, +- int timeoutTimeSeconds = 10) ++ const std::vector<std::string>& imgUriTargets, int timeoutTimeSeconds = 10) + { + // Only allow one FW update at a time + if (fwUpdateInProgress != false) +@@ -301,11 +407,12 @@ static void monitorForSoftwareAvailable( + redfish::messages::internalError(asyncResp->res); + } + }); ++ + task::Payload payload(req); +- auto callback = [asyncResp, ++ auto callback = [asyncResp, imgTargets{imgUriTargets}, + payload](sdbusplus::message::message& m) mutable { + BMCWEB_LOG_DEBUG << "Match fired"; +- softwareInterfaceAdded(asyncResp, m, std::move(payload)); ++ softwareInterfaceAdded(asyncResp, imgTargets, m, std::move(payload)); + }; + + fwUpdateInProgress = true; +@@ -470,12 +577,15 @@ inline void requestRoutesUpdateServiceActionsSimpleUpdate(App& app) + std::string fwFile = imageURI.substr(separator + 1); + BMCWEB_LOG_DEBUG << "Server: " << tftpServer + " File: " << fwFile; + ++ // We will pass empty targets and its handled in activation. ++ std::vector<std::string> httpUriTargets; ++ + // Setup callback for when new software detected + // Give TFTP 10 minutes to complete + monitorForSoftwareAvailable( + asyncResp, req, + "/redfish/v1/UpdateService/Actions/UpdateService.SimpleUpdate", +- 600); ++ httpUriTargets, 600); + + // TFTP can take up to 10 minutes depending on image size and + // connection speed. Return to caller as soon as the TFTP operation +@@ -524,6 +634,9 @@ inline void requestRoutesUpdateService(App& app) + asyncResp->res.jsonValue["Name"] = "Update Service"; + asyncResp->res.jsonValue["HttpPushUri"] = + "/redfish/v1/UpdateService"; ++ asyncResp->res.jsonValue["HttpPushUriTargets"] = httpPushUriTargets; ++ asyncResp->res.jsonValue["HttpPushUriTargetsBusy"] = ++ httpPushUriTargetBusy; + // UpdateService cannot be disabled + asyncResp->res.jsonValue["ServiceEnabled"] = true; + asyncResp->res.jsonValue["FirmwareInventory"] = { +@@ -538,7 +651,8 @@ inline void requestRoutesUpdateService(App& app) + asyncResp->res + .jsonValue["Actions"]["#UpdateService.SimpleUpdate"]; + updateSvcSimpleUpdate["target"] = +- "/redfish/v1/UpdateService/Actions/UpdateService.SimpleUpdate"; ++ "/redfish/v1/UpdateService/Actions/" ++ "UpdateService.SimpleUpdate"; + updateSvcSimpleUpdate["TransferProtocol@Redfish.AllowableValues"] = + {"TFTP"}; + #endif +@@ -580,89 +694,258 @@ inline void requestRoutesUpdateService(App& app) + "/xyz/openbmc_project/software/apply_time", + "org.freedesktop.DBus.Properties", "Get", + "xyz.openbmc_project.Software.ApplyTime", "RequestedApplyTime"); ++ ++ // Get the ApplyOptions value ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const std::variant<bool> applyOption) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG << "DBUS response error " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ const bool* b = std::get_if<bool>(&applyOption); ++ ++ if (b) ++ { ++ asyncResp->res ++ .jsonValue["Oem"]["ApplyOptions"]["@odata.type"] = ++ "#OemUpdateService.ApplyOptions"; ++ asyncResp->res ++ .jsonValue["Oem"]["ApplyOptions"]["ClearConfig"] = ++ *b; ++ } ++ }, ++ "xyz.openbmc_project.Software.BMC.Updater", ++ "/xyz/openbmc_project/software", ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.Software.ApplyOptions", "ClearConfig"); + }); ++ + BMCWEB_ROUTE(app, "/redfish/v1/UpdateService/") + .privileges(redfish::privileges::patchUpdateService) +- .methods(boost::beast::http::verb::patch)( +- [](const crow::Request& req, +- const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { +- BMCWEB_LOG_DEBUG << "doPatch..."; ++ .methods( ++ boost::beast::http::verb:: ++ patch)([](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ BMCWEB_LOG_DEBUG << "doPatch..."; ++ ++ std::optional<nlohmann::json> pushUriOptions; ++ std::optional<std::vector<std::string>> imgTargets; ++ std::optional<bool> imgTargetBusy; ++ std::optional<nlohmann::json> oemProps; ++ if (!json_util::readJson(req, asyncResp->res, "HttpPushUriOptions", ++ pushUriOptions, "HttpPushUriTargets", ++ imgTargets, "HttpPushUriTargetsBusy", ++ imgTargetBusy, "Oem", oemProps)) ++ { ++ BMCWEB_LOG_DEBUG ++ << "UpdateService doPatch: Invalid request body"; ++ return; ++ } ++ ++ if (oemProps) ++ { ++ std::optional<nlohmann::json> applyOptions; ++ ++ if (!json_util::readJson(*oemProps, asyncResp->res, ++ "ApplyOptions", applyOptions)) ++ { ++ return; ++ } ++ ++ if (applyOptions) ++ { ++ std::optional<bool> clearConfig; ++ if (!json_util::readJson(*applyOptions, asyncResp->res, ++ "ClearConfig", clearConfig)) ++ { ++ return; ++ } + +- std::optional<nlohmann::json> pushUriOptions; +- if (!json_util::readJson(req, asyncResp->res, +- "HttpPushUriOptions", pushUriOptions)) ++ if (clearConfig) ++ { ++ // Set the requested image apply time value ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "D-Bus responses error: " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ messages::success(asyncResp->res); ++ }, ++ "xyz.openbmc_project.Software.BMC.Updater", ++ "/xyz/openbmc_project/software", ++ "org.freedesktop.DBus.Properties", "Set", ++ "xyz.openbmc_project.Software.ApplyOptions", ++ "ClearConfig", std::variant<bool>{*clearConfig}); ++ } ++ } ++ } ++ if (pushUriOptions) ++ { ++ std::optional<nlohmann::json> pushUriApplyTime; ++ if (!json_util::readJson(*pushUriOptions, asyncResp->res, ++ "HttpPushUriApplyTime", ++ pushUriApplyTime)) + { + return; + } + +- if (pushUriOptions) ++ if (pushUriApplyTime) + { +- std::optional<nlohmann::json> pushUriApplyTime; +- if (!json_util::readJson(*pushUriOptions, asyncResp->res, +- "HttpPushUriApplyTime", +- pushUriApplyTime)) ++ std::optional<std::string> applyTime; ++ if (!json_util::readJson(*pushUriApplyTime, asyncResp->res, ++ "ApplyTime", applyTime)) + { + return; + } + +- if (pushUriApplyTime) ++ if (applyTime) + { +- std::optional<std::string> applyTime; +- if (!json_util::readJson(*pushUriApplyTime, +- asyncResp->res, "ApplyTime", +- applyTime)) ++ std::string applyTimeNewVal; ++ if (applyTime == "Immediate") + { ++ applyTimeNewVal = ++ "xyz.openbmc_project.Software.ApplyTime." ++ "RequestedApplyTimes.Immediate"; ++ } ++ else if (applyTime == "OnReset") ++ { ++ applyTimeNewVal = ++ "xyz.openbmc_project.Software.ApplyTime." ++ "RequestedApplyTimes.OnReset"; ++ } ++ else ++ { ++ BMCWEB_LOG_INFO ++ << "ApplyTime value is not in the list of " ++ "acceptable values"; ++ messages::propertyValueNotInList( ++ asyncResp->res, *applyTime, "ApplyTime"); + return; + } + +- if (applyTime) ++ // Set the requested image apply time value ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "D-Bus responses error: " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ messages::success(asyncResp->res); ++ }, ++ "xyz.openbmc_project.Settings", ++ "/xyz/openbmc_project/software/apply_time", ++ "org.freedesktop.DBus.Properties", "Set", ++ "xyz.openbmc_project.Software.ApplyTime", ++ "RequestedApplyTime", ++ std::variant<std::string>{applyTimeNewVal}); ++ } ++ } ++ } ++ if (imgTargetBusy) ++ { ++ if ((httpPushUriTargetBusy) && (*imgTargetBusy)) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Other client has reserved the HttpPushUriTargets " ++ "property for firmware updates."; ++ messages::resourceInUse(asyncResp->res); ++ return; ++ } ++ ++ if (imgTargets) ++ { ++ if (!(*imgTargetBusy)) ++ { ++ BMCWEB_LOG_DEBUG ++ << "UpdateService doPatch: httpPushUriTargetBusy " ++ "should be " ++ "true before setting httpPushUriTargets"; ++ messages::invalidObject(asyncResp->res, ++ "HttpPushUriTargetsBusy"); ++ return; ++ } ++ if ((*imgTargets).size() != 0) ++ { ++ // TODO: Now we support max one target becuase ++ // software-manager code support one activation per ++ // object. It will be enhanced to multiple targets for ++ // single image in future. For now, consider first ++ // target alone. ++ if ((*imgTargets).size() != 1) + { +- std::string applyTimeNewVal; +- if (applyTime == "Immediate") +- { +- applyTimeNewVal = +- "xyz.openbmc_project.Software.ApplyTime." +- "RequestedApplyTimes.Immediate"; +- } +- else if (applyTime == "OnReset") +- { +- applyTimeNewVal = +- "xyz.openbmc_project.Software.ApplyTime." +- "RequestedApplyTimes.OnReset"; +- } +- else +- { +- BMCWEB_LOG_INFO +- << "ApplyTime value is not in the list of " +- "acceptable values"; +- messages::propertyValueNotInList( +- asyncResp->res, *applyTime, "ApplyTime"); +- return; +- } ++ messages::invalidObject(asyncResp->res, ++ "HttpPushUriTargets"); ++ return; ++ } ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, uriTargets{*imgTargets}, ++ targetBusy{*imgTargetBusy}]( ++ const boost::system::error_code ec, ++ const std::vector<std::string> swInvPaths) { ++ if (ec) ++ { ++ return; ++ } + +- // Set the requested image apply time value +- crow::connections::systemBus->async_method_call( +- [asyncResp]( +- const boost::system::error_code ec) { +- if (ec) ++ bool swInvObjFound = false; ++ for (const std::string& path : swInvPaths) ++ { ++ std::size_t idPos = path.rfind("/"); ++ if ((idPos == std::string::npos) || ++ ((idPos + 1) >= path.size())) + { +- BMCWEB_LOG_ERROR +- << "D-Bus responses error: " << ec; + messages::internalError(asyncResp->res); ++ BMCWEB_LOG_DEBUG ++ << "Can't parse firmware ID!!"; + return; + } +- messages::success(asyncResp->res); +- }, +- "xyz.openbmc_project.Settings", +- "/xyz/openbmc_project/software/apply_time", +- "org.freedesktop.DBus.Properties", "Set", +- "xyz.openbmc_project.Software.ApplyTime", +- "RequestedApplyTime", +- std::variant<std::string>{applyTimeNewVal}); +- } ++ std::string swId = path.substr(idPos + 1); ++ ++ if (swId == uriTargets[0]) ++ { ++ swInvObjFound = true; ++ break; ++ } ++ } ++ if (!swInvObjFound) ++ { ++ messages::invalidObject( ++ asyncResp->res, "HttpPushUriTargets"); ++ return; ++ } ++ httpPushUriTargetBusy = targetBusy; ++ httpPushUriTargets = uriTargets; ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", ++ "GetSubTreePaths", "/", static_cast<int32_t>(0), ++ std::array<const char*, 1>{versionIntf}); ++ } ++ else ++ { ++ httpPushUriTargetBusy = *imgTargetBusy; ++ httpPushUriTargets = *imgTargets; + } + } +- }); ++ else ++ { ++ httpPushUriTargetBusy = *imgTargetBusy; ++ } ++ } ++ }); ++ + BMCWEB_ROUTE(app, "/redfish/v1/UpdateService/") + .privileges(redfish::privileges::postUpdateService) + .methods(boost::beast::http::verb::post)( +@@ -672,7 +955,8 @@ inline void requestRoutesUpdateService(App& app) + + // Setup callback for when new software detected + monitorForSoftwareAvailable(asyncResp, req, +- "/redfish/v1/UpdateService"); ++ "/redfish/v1/UpdateService", ++ httpPushUriTargets); + + std::string filepath("/tmp/images/" + + boost::uuids::to_string( +@@ -685,7 +969,7 @@ inline void requestRoutesUpdateService(App& app) + out.close(); + BMCWEB_LOG_DEBUG << "file upload complete!!"; + }); +-} ++} // namespace redfish + + inline void requestRoutesSoftwareInventoryCollection(App& app) + { +@@ -748,8 +1032,7 @@ inline void requestRoutesSoftwareInventoryCollection(App& app) + "/xyz/openbmc_project/object_mapper", + "xyz.openbmc_project.ObjectMapper", "GetSubTree", + "/xyz/openbmc_project/software", static_cast<int32_t>(0), +- std::array<const char*, 1>{ +- "xyz.openbmc_project.Software.Version"}); ++ std::array<const char*, 1>{versionIntf}); + }); + } + /* Fill related item links (i.e. bmc, bios) in for inventory */ +@@ -913,7 +1196,7 @@ inline void requestRoutesSoftwareInventory(App& app) + }, + obj.second[0].first, obj.first, + "org.freedesktop.DBus.Properties", "GetAll", +- "xyz.openbmc_project.Software.Version"); ++ versionIntf); + } + if (!found) + { +@@ -937,8 +1220,7 @@ inline void requestRoutesSoftwareInventory(App& app) + "/xyz/openbmc_project/object_mapper", + "xyz.openbmc_project.ObjectMapper", "GetSubTree", "/", + static_cast<int32_t>(0), +- std::array<const char*, 1>{ +- "xyz.openbmc_project.Software.Version"}); ++ std::array<const char*, 1>{versionIntf}); + }); + } + +diff --git a/static/redfish/v1/$metadata/index.xml b/static/redfish/v1/$metadata/index.xml +index 66b6faf..f0919c9 100644 +--- a/static/redfish/v1/$metadata/index.xml ++++ b/static/redfish/v1/$metadata/index.xml +@@ -2444,6 +2444,9 @@ + <edmx:Reference Uri="/redfish/v1/schema/OemComputerSystem_v1.xml"> + <edmx:Include Namespace="OemComputerSystem"/> + </edmx:Reference> ++ <edmx:Reference Uri="/redfish/v1/schema/OemUpdateService_v1.xml"> ++ <edmx:Include Namespace="OemUpdateService"/> ++ </edmx:Reference> + <edmx:Reference Uri="/redfish/v1/schema/OemVirtualMedia_v1.xml"> + <edmx:Include Namespace="OemVirtualMedia"/> + <edmx:Include Namespace="OemVirtualMedia.v1_0_0"/> +diff --git a/static/redfish/v1/JsonSchemas/OemUpdateService/index.json b/static/redfish/v1/JsonSchemas/OemUpdateService/index.json +new file mode 100644 +index 0000000..74e39cd +--- /dev/null ++++ b/static/redfish/v1/JsonSchemas/OemUpdateService/index.json +@@ -0,0 +1,69 @@ ++{ ++ "$id": "http://redfish.dmtf.org/schemas/v1/OemUpdateService.json", ++ "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json", ++ "copyright": "Copyright 2014-2019 DMTF. For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright", ++ "definitions": { ++ "ApplyOptions": { ++ "additionalProperties": false, ++ "description": "An indication by boolean value whether to update firmware configuration along with firmware image update.", ++ "patternProperties": { ++ "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": { ++ "description": "This property shall specify a valid odata or Redfish property.", ++ "type": [ ++ "array", ++ "boolean", ++ "integer", ++ "number", ++ "null", ++ "object", ++ "string" ++ ] ++ } ++ }, ++ "properties": { ++ "ClearConfig": { ++ "description": "This indicates whether to update firmware configuration or not.", ++ "longDescription": "The value of this property is used to indicate the firmware configuration update.", ++ "readonly": false, ++ "type": [ ++ "boolean", ++ "null" ++ ] ++ } ++ }, ++ "type": "object" ++ }, ++ "Oem": { ++ "additionalProperties": true, ++ "description": "OemUpdateService Oem properties.", ++ "patternProperties": { ++ "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": { ++ "description": "This property shall specify a valid odata or Redfish property.", ++ "type": [ ++ "array", ++ "boolean", ++ "integer", ++ "number", ++ "null", ++ "object", ++ "string" ++ ] ++ } ++ }, ++ "properties": { ++ "ApplyOptions": { ++ "anyOf": [ ++ { ++ "$ref": "#/definitions/ApplyOptions" ++ }, ++ { ++ "type": "null" ++ } ++ ] ++ } ++ }, ++ "type": "object" ++ } ++ }, ++ "title": "#OemUpdateService" ++} +diff --git a/static/redfish/v1/schema/OemUpdateService_v1.xml b/static/redfish/v1/schema/OemUpdateService_v1.xml +new file mode 100644 +index 0000000..cbb7aa4 +--- /dev/null ++++ b/static/redfish/v1/schema/OemUpdateService_v1.xml +@@ -0,0 +1,40 @@ ++<?xml version="1.0" encoding="UTF-8"?> ++<edmx:Edmx xmlns:edmx="http://docs.oasis-open.org/odata/ns/edmx" Version="4.0"> ++ <edmx:Reference Uri="http://docs.oasis-open.org/odata/odata/v4.0/errata03/csd01/complete/vocabularies/Org.OData.Core.V1.xml"> ++ <edmx:Include Namespace="Org.OData.Core.V1" Alias="OData" /> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/RedfishExtensions_v1.xml"> ++ <edmx:Include Namespace="Validation.v1_0_0" Alias="Validation"/> ++ <edmx:Include Namespace="RedfishExtensions.v1_0_0" Alias="Redfish"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/UpdateService_v1.xml"> ++ <edmx:Include Namespace="UpdateService"/> ++ <edmx:Include Namespace="UpdateService.v1_4_0"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/Resource_v1.xml"> ++ <edmx:Include Namespace="Resource"/> ++ <edmx:Include Namespace="Resource.v1_0_0"/> ++ </edmx:Reference> ++ ++ <edmx:DataServices> ++ <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="OemUpdateService"> ++ <ComplexType Name="Oem" BaseType="Resource.OemObject"> ++ <Annotation Term="OData.AdditionalProperties" Bool="true" /> ++ <Annotation Term="OData.Description" String="OemUpdateService Oem properties." /> ++ <Annotation Term="OData.AutoExpand"/> ++ <Property Name="ApplyOptions" Type="OemUpdateService.ApplyOptions"/> ++ </ComplexType> ++ ++ <ComplexType Name="ApplyOptions" BaseType="Resource.OemObject"> ++ <Annotation Term="OData.AdditionalProperties" Bool="false" /> ++ <Annotation Term="OData.Description" String="An indication by boolean value whether to update firmware configuration along with firmware image update." /> ++ <Property Name="ClearConfig" Type="Edm.Boolean"> ++ <Annotation Term="OData.Permissions" EnumMember="OData.Permission/ReadWrite"/> ++ <Annotation Term="OData.Description" String="This indicates whether to update firmware configuration or not."/> ++ <Annotation Term="OData.LongDescription" String="The value of this property is used to indicate the firmware configuration update."/> ++ </Property> ++ </ComplexType> ++ ++ </Schema> ++ </edmx:DataServices> ++</edmx:Edmx> +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0002-Use-chip-id-based-UUID-for-Service-Root.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0002-Use-chip-id-based-UUID-for-Service-Root.patch new file mode 100644 index 000000000..02f843bb8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0002-Use-chip-id-based-UUID-for-Service-Root.patch @@ -0,0 +1,74 @@ +From 034920eca21bc25899565484928ee72025e21ff8 Mon Sep 17 00:00:00 2001 +From: Wiktor Golgowski <wiktor.golgowski@linux.intel.com> +Date: Thu, 30 Apr 2020 11:09:35 +0200 +Subject: [PATCH] Use chip id-based UUID for Service Root. +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +If the sysfs-provided chip id is available, it will be used as +payload to generate Service Root UUID from hardcoded namespace. + +Tested: +Generated UUID is consistent between BMC image reflashes. +If the sysfs node is not available, code falls back to randomly +generated UUID. + +Signed-off-by: Wiktor Gołgowski <wiktor.golgowski@linux.intel.com> +--- + include/persistent_data.hpp | 32 +++++++++++++++++++++++++++++--- + 1 file changed, 29 insertions(+), 3 deletions(-) + +diff --git a/include/persistent_data.hpp b/include/persistent_data.hpp +index 24f7afd..8826b06 100644 +--- a/include/persistent_data.hpp ++++ b/include/persistent_data.hpp +@@ -25,6 +25,10 @@ class ConfigFile + public: + // todo(ed) should read this from a fixed location somewhere, not CWD + static constexpr const char* filename = "bmcweb_persistent_data.json"; ++ static constexpr const char* chipIdSysfsNode = "/sys/devices/platform" ++ "/ahb/ahb:apb/1e6e2000.syscon/1e6e2000.syscon:misc_control/chip_id"; ++ static constexpr const char* UuidNs = "{b7b0553a-54cc-4162-982d-" ++ "944847ed76f5}"; + + ConfigFile() + { +@@ -144,9 +148,31 @@ class ConfigFile + + if (systemUuid.empty()) + { +- systemUuid = +- boost::uuids::to_string(boost::uuids::random_generator()()); +- needWrite = true; ++ // Try to retrieve chip id-based uuid. ++ std::ifstream chipIdFile(chipIdSysfsNode); ++ if (chipIdFile.is_open()) ++ { ++ std::string chipId; ++ std::getline(chipIdFile, chipId); ++ if (!chipId.empty()) ++ { ++ boost::uuids::name_generator_sha1 gen( ++ boost::uuids::string_generator()(UuidNs)); ++ systemUuid = boost::uuids::to_string(gen(chipId.c_str())); ++ needWrite = true; ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Cannot get chip id-based System UUID."; ++ } ++ } ++ // If the above fails, generate random uuid. ++ if (systemUuid.empty()) ++ { ++ systemUuid = ++ boost::uuids::to_string(boost::uuids::random_generator()()); ++ needWrite = true; ++ } + } + if (fileRevision < jsonRevision) + { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0010-managers-add-attributes-for-Manager.CommandShell.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0010-managers-add-attributes-for-Manager.CommandShell.patch new file mode 100644 index 000000000..e54e495bb --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0010-managers-add-attributes-for-Manager.CommandShell.patch @@ -0,0 +1,60 @@ +From 971aa5058ac4bb626eeadf8b00738737748ed549 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Tue, 29 Jun 2021 15:25:38 +0000 +Subject: [PATCH] managers: add attributes for Manager.CommandShell + +Issue: ConnectTypesSupported, ServiceEnabled and + MaxConcurrentSessions Attributes are missing for + Manager.CommandShell, though Requirement mandates it. + +Fix: Added missing attributes to Manager.CommandShell + +Tested: +1. Verified redfish validator passed +2. Get bmc details from Redfish +Redfish URI: https://<BMC IP>/redfish/v1/Managers/bmc +Response: +{ + "@odata.id": "/redfish/v1/Managers/bmc", + "@odata.type": "#Manager.v1_9_0.Manager", +.... +.... + "CommandShell": { + "ConnectTypesSupported": [ + "SSH", + "IPMI" + ], + "MaxConcurrentSessions": 4, + "ServiceEnabled": true + }, +.... +.... + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Change-Id: I2a56db912fc81064098f7aa9f4d110ac3baf361d +--- + redfish-core/lib/managers.hpp | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/redfish-core/lib/managers.hpp b/redfish-core/lib/managers.hpp +index b286f19..186003b 100644 +--- a/redfish-core/lib/managers.hpp ++++ b/redfish-core/lib/managers.hpp +@@ -1998,6 +1998,14 @@ inline void requestRoutesManager(App& app) + 15; + asyncResp->res.jsonValue["SerialConsole"]["ConnectTypesSupported"] = + {"IPMI", "SSH"}; ++ ++ // Fill in CommandShell info ++ asyncResp->res.jsonValue["CommandShell"]["ServiceEnabled"] = true; ++ asyncResp->res.jsonValue["CommandShell"]["MaxConcurrentSessions"] = ++ 4; ++ asyncResp->res.jsonValue["CommandShell"]["ConnectTypesSupported"] = ++ {"SSH", "IPMI"}; ++ + #ifdef BMCWEB_ENABLE_KVM + // Fill in GraphicalConsole info + asyncResp->res.jsonValue["GraphicalConsole"]["ServiceEnabled"] = +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0011-bmcweb-Add-PhysicalContext-to-Thermal-resources.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0011-bmcweb-Add-PhysicalContext-to-Thermal-resources.patch new file mode 100644 index 000000000..f41e6f994 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0011-bmcweb-Add-PhysicalContext-to-Thermal-resources.patch @@ -0,0 +1,158 @@ +From b9747ecfce682f15dce0bb6e41e0c894f29419f3 Mon Sep 17 00:00:00 2001 +From: Snehalatha Venkatesh <snehalathax.v@intel.com> +Date: Thu, 8 Apr 2021 14:42:07 +0000 +Subject: [PATCH] bmcweb: Add PhysicalContext to Thermal resources + +Adding PhysicalContext to make redfish data compliance with OCP +Server Mgmt Interface v0.2.1.pdf and specific to Thermal resources. +https://github.com/opencomputeproject/OCP-Profiles/blob/master/ +OCPServerHardwareManagement.v0_2_4.json + +Tested: +1. Redfish validator - passed for this new change +2. GET - https://<bmc.ip>/redfish/v1/Chassis/<Board>/Thermal +Response: +{ + "@odata.id": "/redfish/v1/Chassis/<Board>/Thermal#/Temperatures/0", + "@odata.type": "#Thermal.v1_3_0.Temperature", + "LowerThresholdCritical": 0.0, + "LowerThresholdNonCritical": 5.0, + "MaxReadingRangeTemp": 127.0, + "MemberId": "BMC_Temp", + "MinReadingRangeTemp": -128.0, + "Name": "BMC Temp", + "PhysicalContext": "SystemBoard", + "ReadingCelsius": 25.75, + "Status": { + "Health": "OK", + "State": "Enabled" + }, + "UpperThresholdCritical": 115.0, + "UpperThresholdNonCritical": 110.0 +}, +{ + "@odata.id": "/redfish/v1/Chassis/<Board>/Thermal#/Temperatures/1", + "@odata.type": "#Thermal.v1_3_0.Temperature", + "LowerThresholdCritical": 0.0, + "LowerThresholdNonCritical": 5.0, + "MaxReadingRangeTemp": 255.0, + "MemberId": "CPU1_P12V_PVCCIN_VR_Temp", + "MinReadingRangeTemp": 0.0, + "Name": "CPU1 P12V PVCCIN VR Temp", + "PhysicalContext": "CPU", + "ReadingCelsius": 41.0, + "Status": { + "Health": "OK", + "State": "Enabled" + }, + "UpperThresholdCritical": 115.0, + "UpperThresholdNonCritical": 110.0 +}, +{ + "@odata.id": "/redfish/v1/Chassis/<Board>/Thermal#/Temperatures/28", + "@odata.type": "#Thermal.v1_3_0.Temperature", + "LowerThresholdCritical": 0.0, + "LowerThresholdNonCritical": 5.0, + "MaxReadingRangeTemp": 127.0, + "MemberId": "Inlet_BRD_Temp", + "MinReadingRangeTemp": -128.0, + "Name": "Inlet BRD Temp", + "PhysicalContext": "Intake", + "ReadingCelsius": 23.187, + "Status": { + "Health": "OK", + "State": "Enabled" + }, + "UpperThresholdCritical": 115.0, + "UpperThresholdNonCritical": 110.0 +}, +{ + @odata.id": "/redfish/v1/Chassis/F2U8X25_HSBP_2/Thermal#/Temperatures/0", + @odata.type": "#Thermal.v1_3_0.Temperature", + LowerThresholdCritical": 7.0, + LowerThresholdNonCritical": 12.0, + MaxReadingRangeTemp": 127.0, + MemberId": "HSBP2_Temp", + MinReadingRangeTemp": -128.0, + Name": "HSBP2 Temp", + PhysicalContext": "Backplane", + ReadingCelsius": 21.437, + Status": { + "Health": "OK", + "State": "Enabled" + }, + UpperThresholdCritical": 57.0, + UpperThresholdNonCritical": 52.0 +} +3. GET - https://<bmc.ip>/redfish/v1/Chassis/<Board>/Power +Response: +{ + "@odata.id": "/redfish/v1/Chassis/<Board>/Power#/Voltages/3", + "@odata.type": "#Power.v1_0_0.Voltage", + "LowerThresholdCritical": 1.648, + "LowerThresholdNonCritical": 1.699, + "MaxReadingRange": 2.3984009912875566, + "MemberId": "P1V8_PCH", + "MinReadingRange": 0.0, + "Name": "P1V8 PCH", + "ReadingVolts": 1.8055, + "Status": { + "Health": "OK", + "State": "Enabled" + }, + "UpperThresholdCritical": 1.961, + "UpperThresholdNonCritical": 1.904 +} +4. GET - https://<bmc.ip>/redfish/v1/Chassis/<Board>/Sensors/PSU1_Input_Current +Response: +{ + "@odata.id": "/redfish/v1/Chassis/<Board>/Sensors/PSU1_Input_Current", + "@odata.type": "#Sensor.v1_0_0.Sensor", + "Id": "PSU1_Input_Current", + "Name": "PSU1 Input Current", + "Reading": 0.947, + "ReadingRangeMax": 12.0, + "ReadingRangeMin": 0.0, + "ReadingType": "Current", + "ReadingUnits": "A", + "Status": { + "Health": "OK", + "State": "Enabled" + } +} +Signed-off-by: Snehalatha Venkatesh <snehalathax.v@intel.com> +Signed-off-by: sunitakx <sunitax.kumari@linux.intel.com> +--- + redfish-core/lib/sensors.hpp | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/redfish-core/lib/sensors.hpp b/redfish-core/lib/sensors.hpp +index 5d27577..d51d09f 100644 +--- a/redfish-core/lib/sensors.hpp ++++ b/redfish-core/lib/sensors.hpp +@@ -973,6 +973,22 @@ inline void objectInterfacesToJson( + { + unit = "/ReadingCelsius"_json_pointer; + sensorJson["@odata.type"] = "#Thermal.v1_3_0.Temperature"; ++ if (sensorName.find("CPU") != std::string::npos) ++ { ++ sensorJson["PhysicalContext"] = "CPU"; ++ } ++ else if (sensorName.find("Inlet") != std::string::npos) ++ { ++ sensorJson["PhysicalContext"] = "Intake"; ++ } ++ else if (sensorName.find("HSBP") != std::string::npos) ++ { ++ sensorJson["PhysicalContext"] = "Backplane"; ++ } ++ else ++ { ++ sensorJson["PhysicalContext"] = "SystemBoard"; ++ } + // TODO(ed) Documentation says that path should be type fan_tach, + // implementation seems to implement fan + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0012-Log-RedFish-event-for-Invalid-login-attempt.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0012-Log-RedFish-event-for-Invalid-login-attempt.patch new file mode 100644 index 000000000..3ef4ee2de --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0012-Log-RedFish-event-for-Invalid-login-attempt.patch @@ -0,0 +1,67 @@ +From 1f572a1991fc8d9b08689aa6e3470080467977a7 Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Thu, 15 Apr 2021 10:59:42 +0000 +Subject: [PATCH] Log RedFish event for Invalid login attempt + +This commit adds support for logging RedFish event log while user tries +to attempt login with invalid credentials. +When user trying to login with invalid credentials on HTTPS interface +like WebUI and RedFish, event should be logged in RedFish event log. +This event log is useful for further analysis to debug the root-cause +for failure. + +Tested: +1. Verified RedFish validator passed +2. Login with wrong credentials on HTTPS interface. +3. Verified for RedFish/WebUI events. RedFish event logged successfully. +GET: https://BMC-IP/redfish/v1/Systems/system/LogServices/ + EventLog/Entries +Response: +"Members": [ +{ + "@odata.id": "/redfish/v1/Systems/system/LogServices/EventLog/ + Entries/1618466128", + "@odata.type": "#LogEntry.v1_4_0.LogEntry", + "Created": "2021-04-15T05:55:28+00:00", + "EntryType": "Event", + "Id": "1618466128", + "Message": "Invalid username or password attempted on HTTPS.", + "MessageArgs": [ + "HTTPS" + ], + "MessageId": "OpenBMC.0.1.InvalidLoginAttempted", + "Name": "System Event Log Entry", + "Severity": "Warning" +} + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + include/pam_authenticate.hpp | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/include/pam_authenticate.hpp b/include/pam_authenticate.hpp +index 12f19c0..01bf301 100644 +--- a/include/pam_authenticate.hpp ++++ b/include/pam_authenticate.hpp +@@ -1,6 +1,7 @@ + #pragma once + + #include <security/pam_appl.h> ++#include <systemd/sd-journal.h> + + #include <boost/utility/string_view.hpp> + +@@ -75,6 +76,10 @@ inline int pamAuthenticateUser(const std::string_view username, + PAM_SILENT | PAM_DISALLOW_NULL_AUTHTOK); + if (retval != PAM_SUCCESS) + { ++ sd_journal_send("MESSAGE= %s", "Invalid login attempted on HTTPS", ++ "PRIORITY=%i", LOG_WARNING, "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.InvalidLoginAttempted", ++ "REDFISH_MESSAGE_ARGS=%s", "HTTPS", NULL); + pam_end(localAuthHandle, PAM_SUCCESS); // ignore retval + return retval; + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0013-Add-UART-routing-logic-into-host-console-connection-.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0013-Add-UART-routing-logic-into-host-console-connection-.patch new file mode 100644 index 000000000..41acb6057 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0013-Add-UART-routing-logic-into-host-console-connection-.patch @@ -0,0 +1,59 @@ +From 6c10adb53d3247f65e5d9399290e6b8e7962cdef Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 28 Apr 2021 17:19:50 -0700 +Subject: [PATCH] Add UART routing logic into host console connection flow + +Switching UART routing when starting obmc-service introduces garbled +character printing out on physical host serial output and it's +inevitable so this commit moves the routing logic into host console +connection flow in bmcweb to avoid the issue until SOL is actually +activated. + +Tested: The garbled character printing out was not observed during +BMC booting. SOL worked well. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + include/obmc_console.hpp | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/include/obmc_console.hpp b/include/obmc_console.hpp +index cdb19901e82d..9c4ae8821074 100644 +--- a/include/obmc_console.hpp ++++ b/include/obmc_console.hpp +@@ -22,6 +22,9 @@ static boost::container::flat_set<crow::websocket::Connection*> sessions; + + static bool doingWrite = false; + ++constexpr char const* uartMuxCtrlPath = "/sys/bus/platform/drivers/aspeed-uart-routing/1e789098.uart-routing/hicra"; ++constexpr char const* uartMuxCtrlVal = "0x03450003"; ++ + inline void doWrite() + { + if (doingWrite) +@@ -110,6 +113,22 @@ inline void connectHandler(const boost::system::error_code& ec) + return; + } + ++ FILE* file = fopen(uartMuxCtrlPath, "w"); ++ if (file != nullptr) ++ { ++ int rc = fputs(uartMuxCtrlVal, file); ++ fclose(file); ++ if (rc < 0) ++ { ++ BMCWEB_LOG_ERROR << "Couldn't change UART routing: " << rc; ++ for (crow::websocket::Connection* session : sessions) ++ { ++ session->close("Error in connecting to host port"); ++ } ++ return; ++ } ++ } ++ + doWrite(); + doRead(); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0014-recommended-fixes-by-crypto-review-team.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0014-recommended-fixes-by-crypto-review-team.patch new file mode 100644 index 000000000..5ffc259c0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0014-recommended-fixes-by-crypto-review-team.patch @@ -0,0 +1,75 @@ +From aaaa117817687a05284f8bfff07e2404e0d616b7 Mon Sep 17 00:00:00 2001 +From: Radivoje Jovanovic <radivoje.jovanovic@intel.com> +Date: Thu, 10 Dec 2020 13:42:20 -0800 +Subject: [PATCH] recommended fixes by crypto review team + +some curves/cyphers are forbiden to be used by +Intel crypto team. +Only enable approved ones. +the patch was created by aleksandr.v.tereschenko@intel.com + +Signed-off-by: Radivoje Jovanovic <radivoje.jovanovic@intel.com> +--- + include/ssl_key_handler.hpp | 39 ++++++++++++++++++++----------------- + 1 file changed, 21 insertions(+), 18 deletions(-) + +diff --git a/include/ssl_key_handler.hpp b/include/ssl_key_handler.hpp +index 39e83d7..8de7349 100644 +--- a/include/ssl_key_handler.hpp ++++ b/include/ssl_key_handler.hpp +@@ -381,31 +381,34 @@ inline std::shared_ptr<boost::asio::ssl::context> + mSslContext->use_private_key_file(sslPemFile, + boost::asio::ssl::context::pem); + +- // Set up EC curves to auto (boost asio doesn't have a method for this) +- // There is a pull request to add this. Once this is included in an asio +- // drop, use the right way +- // http://stackoverflow.com/questions/18929049/boost-asio-with-ecdsa-certificate-issue +- if (SSL_CTX_set_ecdh_auto(mSslContext->native_handle(), 1) != 1) ++ std::string handshakeCurves = "P-384:P-521:X448"; ++ if (SSL_CTX_set1_groups_list(mSslContext->native_handle(), handshakeCurves.c_str()) != 1) + { +- BMCWEB_LOG_ERROR << "Error setting tmp ecdh list\n"; ++ BMCWEB_LOG_ERROR << "Error setting ECDHE group list\n"; + } + +- std::string mozillaModern = "ECDHE-ECDSA-AES256-GCM-SHA384:" +- "ECDHE-RSA-AES256-GCM-SHA384:" +- "ECDHE-ECDSA-CHACHA20-POLY1305:" +- "ECDHE-RSA-CHACHA20-POLY1305:" +- "ECDHE-ECDSA-AES128-GCM-SHA256:" +- "ECDHE-RSA-AES128-GCM-SHA256:" +- "ECDHE-ECDSA-AES256-SHA384:" +- "ECDHE-RSA-AES256-SHA384:" +- "ECDHE-ECDSA-AES128-SHA256:" +- "ECDHE-RSA-AES128-SHA256"; ++ std::string tls12Ciphers = "ECDHE-ECDSA-AES256-GCM-SHA384:" ++ "ECDHE-RSA-AES256-GCM-SHA384"; ++ std::string tls13Ciphers = "TLS_AES_256_GCM_SHA384"; + + if (SSL_CTX_set_cipher_list(mSslContext->native_handle(), +- mozillaModern.c_str()) != 1) ++ tls12Ciphers.c_str()) != 1) + { +- BMCWEB_LOG_ERROR << "Error setting cipher list\n"; ++ BMCWEB_LOG_ERROR << "Error setting TLS 1.2 cipher list\n"; + } ++ ++ if (SSL_CTX_set_ciphersuites(mSslContext->native_handle(), ++ tls13Ciphers.c_str()) != 1) ++ { ++ BMCWEB_LOG_ERROR << "Error setting TLS 1.3 cipher list\n"; ++ } ++ ++ if ((SSL_CTX_set_options(mSslContext->native_handle(), ++ SSL_OP_CIPHER_SERVER_PREFERENCE) & SSL_OP_CIPHER_SERVER_PREFERENCE) == 0) ++ { ++ BMCWEB_LOG_ERROR << "Error setting TLS server preference option\n"; ++ } ++ + return mSslContext; + } + } // namespace ensuressl +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0015-Add-state-sensor-messages-to-the-registry.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0015-Add-state-sensor-messages-to-the-registry.patch new file mode 100644 index 000000000..1193fe9d1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0015-Add-state-sensor-messages-to-the-registry.patch @@ -0,0 +1,98 @@ +From b468b508176dfffe2e8e4adb3052577b9ff70d2f Mon Sep 17 00:00:00 2001 +From: "Arun P. Mohanan" <arun.p.m@linux.intel.com> +Date: Wed, 27 Jan 2021 18:22:58 +0530 +Subject: [PATCH] Add state sensor messages to the registry + +Add messages to registry to indicate state sensor state change. + +Tested: +Build and redfish validator passes. +Logged these events and confirmed that they appear as expected on +Redfish. +GET: https://<BMC IP>/redfish/v1/Systems/system/LogServices/EventLog/Entries/1612528180 +{ + "@odata.id": "/redfish/v1/Systems/system/LogServices/EventLog/Entries/1612528180", + "@odata.type": "#LogEntry.v1_4_0.LogEntry", + "Created": "2021-02-05T12:29:40+00:00", + "EntryType": "Event", + "Id": "1612528180", + "Message": "Operational Fault Status of Card_health_1 state sensor changed from Error to Normal.", + "MessageArgs": [ + "Operational Fault Status", + "Card_health_1", + "Error", + "Normal" + ], + "MessageId": "OpenBMC.0.1.StateSensorNormal", + "Name": "System Event Log Entry", + "Severity": "OK" +} + +Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com> +--- + .../registries/openbmc_message_registry.hpp | 36 +++++++++++++++++-- + 1 file changed, 34 insertions(+), 2 deletions(-) + +diff --git a/redfish-core/include/registries/openbmc_message_registry.hpp b/redfish-core/include/registries/openbmc_message_registry.hpp +index 6cf503f..87b2913 100644 +--- a/redfish-core/include/registries/openbmc_message_registry.hpp ++++ b/redfish-core/include/registries/openbmc_message_registry.hpp +@@ -29,7 +29,7 @@ const Header header = { + "0.2.0", + "OpenBMC", + }; +-constexpr std::array<MessageEntry, 188> registry = { ++constexpr std::array<MessageEntry, 191> registry = { + MessageEntry{ + "ADDDCCorrectable", + { +@@ -2331,6 +2331,39 @@ constexpr std::array<MessageEntry, 188> registry = { + {}, + "None.", + }}, ++ MessageEntry{ ++ "StateSensorNormal", ++ { ++ "Indicates that a state sensor has changed state to normal.", ++ "%1 of %2 state sensor changed from %3 to %4.", ++ "OK", ++ "OK", ++ 4, ++ {"string", "string", "string", "string"}, ++ "None.", ++ }}, ++ MessageEntry{ ++ "StateSensorWarning", ++ { ++ "Indicates that a state sensor has changed state to warning.", ++ "%1 of %2 state sensor changed from %3 to %4.", ++ "Warning", ++ "Warning", ++ 4, ++ {"string", "string", "string", "string"}, ++ "Check sensor subsystem for errors.", ++ }}, ++ MessageEntry{ ++ "StateSensorCritical", ++ { ++ "Indicates that a state sensor has changed state to critical.", ++ "%1 of %2 state sensor changed from %3 to %4.", ++ "Critical", ++ "Critical", ++ 4, ++ {"string", "string", "string", "string"}, ++ "Check sensor subsystem for errors.", ++ }}, + MessageEntry{"SystemInterfaceDisabledProvisioned", + { + "Indicates that the system interface is in the disabled " +@@ -2423,6 +2456,5 @@ constexpr std::array<MessageEntry, 188> registry = { + {"string"}, + "None.", + }}, +- + }; + } // namespace redfish::message_registries::openbmc +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0016-Fix-bmcweb-crashes-if-socket-directory-not-present.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0016-Fix-bmcweb-crashes-if-socket-directory-not-present.patch new file mode 100644 index 000000000..bc023839f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0016-Fix-bmcweb-crashes-if-socket-directory-not-present.patch @@ -0,0 +1,44 @@ +From 48fe2a68d634970795f9ff13903afbedca801088 Mon Sep 17 00:00:00 2001 +From: Nidhin MS <nidhin.ms@intel.com> +Date: Wed, 14 Apr 2021 11:28:44 +0530 +Subject: [PATCH] Fix: bmcweb crashes if socket directory not present + +When trying to mount virtual media image bmcweb tries to create unix +socket and if the parent directory does not exist +stream_protocol::acceptor throws error and bmcweb crashes. Fix the same + +Tested: +Removed directory and mounted the vm image. bmcweb crash was not +observed + +Change-Id: I3aea1d8e197c06238f425a97435c01d3c80552a9 +Signed-off-by: Nidhin MS <nidhin.ms@intel.com> +--- + include/nbd_proxy.hpp | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/include/nbd_proxy.hpp b/include/nbd_proxy.hpp +index 7b90e90..3b28823 100644 +--- a/include/nbd_proxy.hpp ++++ b/include/nbd_proxy.hpp +@@ -397,6 +397,17 @@ inline void requestRoutes(App& app) + // If the socket file exists (i.e. after bmcweb crash), + // we cannot reuse it. + std::remove((*socketValue).c_str()); ++ std::filesystem::path socketPath(*socketValue); ++ std::error_code fsErr; ++ if (!std::filesystem::exists(socketPath.parent_path(), ++ fsErr)) ++ { ++ BMCWEB_LOG_ERROR ++ << "VirtualMedia socket directory not present. " ++ << socketPath.parent_path(); ++ conn.close("Unable to create unix socket"); ++ return; ++ } + + sessions[&conn] = std::make_shared<NbdProxyServer>( + conn, *socketValue, *endpointValue, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0017-Add-msg-registry-for-subscription-related-actions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0017-Add-msg-registry-for-subscription-related-actions.patch new file mode 100644 index 000000000..35ac7a114 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0017-Add-msg-registry-for-subscription-related-actions.patch @@ -0,0 +1,81 @@ +From 40895934bdedb978e8cfd47930ae5a190e19b440 Mon Sep 17 00:00:00 2001 +From: Ayushi Smriti <smriti.ayushi@intel.com> +Date: Mon, 10 May 2021 12:32:30 +0530 +Subject: [PATCH] Add msg registry for subscription related actions + +For subscription event message log purpose, added message registry +entry for event service subscription related actions- add, update +and delete. + +Tested: + - Message registry entry appears in the log for the corresponding + subscription action. + +Signed-off-by: AppaRao Puli <apparao.puli@intel.com> +Signed-off-by: Ayushi Smriti <smriti.ayushi@intel.com> +--- + .../registries/openbmc_message_registry.hpp | 41 ++++++++++++++++++- + 1 file changed, 40 insertions(+), 1 deletion(-) + +diff --git a/redfish-core/include/registries/openbmc_message_registry.hpp b/redfish-core/include/registries/openbmc_message_registry.hpp +index 87b2913..1e493ca 100644 +--- a/redfish-core/include/registries/openbmc_message_registry.hpp ++++ b/redfish-core/include/registries/openbmc_message_registry.hpp +@@ -29,7 +29,7 @@ const Header header = { + "0.2.0", + "OpenBMC", + }; +-constexpr std::array<MessageEntry, 191> registry = { ++constexpr std::array<MessageEntry, 194> registry = { + MessageEntry{ + "ADDDCCorrectable", + { +@@ -417,6 +417,45 @@ constexpr std::array<MessageEntry, 191> registry = { + {}, + "None.", + }}, ++ MessageEntry{"EventSubscriptionAdded", ++ { ++ "Indicates that an Event subscription with specific " ++ "id was added.", ++ "Event subscription with id %1 was added.", ++ "OK", ++ "OK", ++ 1, ++ { ++ "string", ++ }, ++ "None.", ++ }}, ++ MessageEntry{"EventSubscriptionRemoved", ++ { ++ "Indicates that an Event subscription with specific " ++ "id was removed.", ++ "Event subscription with id %1 was removed.", ++ "OK", ++ "OK", ++ 1, ++ { ++ "string", ++ }, ++ "None.", ++ }}, ++ MessageEntry{"EventSubscriptionUpdated", ++ { ++ "Indicates that an Event subscription with specific " ++ " id was updated.", ++ "Event subscription with id %1 was updated.", ++ "OK", ++ "OK", ++ 1, ++ { ++ "string", ++ }, ++ "None.", ++ }}, + MessageEntry{"FanInserted", + { + "Indicates that a system fan has been inserted.", +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0018-bmcweb-Add-BMC-Time-update-log-to-the-registry.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0018-bmcweb-Add-BMC-Time-update-log-to-the-registry.patch new file mode 100644 index 000000000..54636cb3d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0018-bmcweb-Add-BMC-Time-update-log-to-the-registry.patch @@ -0,0 +1,77 @@ +From eeac51ebaaad82bb4ac65a029c81c221e32b33ea Mon Sep 17 00:00:00 2001 +From: mansijos <mansi.joshi@intel.com> +Date: Wed, 26 May 2021 17:40:04 +0530 +Subject: [PATCH] Add BMC Time update log to the registry + +Add message in registry to log an event that indicates BMC time +is set via NTP, Host or Manually. +During early stage of system boot if any critical events occur, +they are getting logged with 1970 timestamp till the time BMC +time update happens. This is expected behavior, but to call it out +explicitly it is good to log when BMC time is updated. + +Tested: +Built and validator passes. +Confirmed that the event is getting logged correctly in Redfish. + +Signed-off-by: mansijos <mansi.joshi@intel.com> +--- + .../registries/openbmc_message_registry.hpp | 35 ++++++++++++++++++- + 1 file changed, 34 insertions(+), 1 deletion(-) + +diff --git a/redfish-core/include/registries/openbmc_message_registry.hpp b/redfish-core/include/registries/openbmc_message_registry.hpp +index 1e493ca..967713f 100644 +--- a/redfish-core/include/registries/openbmc_message_registry.hpp ++++ b/redfish-core/include/registries/openbmc_message_registry.hpp +@@ -29,7 +29,7 @@ const Header header = { + "0.2.0", + "OpenBMC", + }; +-constexpr std::array<MessageEntry, 194> registry = { ++constexpr std::array<MessageEntry, 197> registry = { + MessageEntry{ + "ADDDCCorrectable", + { +@@ -286,6 +286,39 @@ constexpr std::array<MessageEntry, 194> registry = { + {}, + "None.", + }}, ++ MessageEntry{"BMCTimeUpdatedViaHost", ++ { ++ "Indicates that BMC time has been set via Host.", ++ "BMC time has been set via Host. " ++ "Date Time is set to %1 from %2.", ++ "OK", ++ "OK", ++ 2, ++ {"string", "string"}, ++ "None.", ++ }}, ++ MessageEntry{"BMCTimeUpdatedManually", ++ { ++ "Indicates that BMC time has been set Manually.", ++ "BMC time has been set Manually. " ++ "Date Time is set to %1 from %2.", ++ "OK", ++ "OK", ++ 2, ++ {"string", "string"}, ++ "None.", ++ }}, ++ MessageEntry{"BMCTimeUpdatedViaNTP", ++ { ++ "Indicates that BMC time has been set via NTP.", ++ "BMC time has been set via NTP. " ++ "Date Time is set to %1 from %2.", ++ "OK", ++ "OK", ++ 2, ++ {"string", "string"}, ++ "None.", ++ }}, + MessageEntry{"ChassisIntrusionDetected", + { + "Indicates that a physical security event " +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0019-Add-generic-message-PropertySizeExceeded.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0019-Add-generic-message-PropertySizeExceeded.patch new file mode 100644 index 000000000..522f04886 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0019-Add-generic-message-PropertySizeExceeded.patch @@ -0,0 +1,120 @@ +From 6bc3ec77e062e8f2108f755e9f0089a014031f91 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 6 Oct 2021 21:51:16 +0000 +Subject: [PATCH] Add generic message - PropertySizeExceeded + +Adding a generic error message "PropertySizeExceeded" +to address properties which exceed there defined size limit. + +Tested: +No functional change. Build passed. +Verified by explicitly sending this message as a response. + +Change-Id: I0e9f85f82a69c598e169fc8e9a68c3f66c0084d8 +Signed-off-by: Nitin Wankhade <nitinx.arunrao.wankhade@intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + redfish-core/include/error_messages.hpp | 12 +++++++++ + .../registries/base_message_registry.hpp | 17 +++++++++++- + redfish-core/src/error_messages.cpp | 27 +++++++++++++++++++ + 3 files changed, 55 insertions(+), 1 deletion(-) + +diff --git a/redfish-core/include/error_messages.hpp b/redfish-core/include/error_messages.hpp +index 3d11cc4..051cff1 100644 +--- a/redfish-core/include/error_messages.hpp ++++ b/redfish-core/include/error_messages.hpp +@@ -222,6 +222,18 @@ nlohmann::json propertyValueFormatError(const std::string& arg1, + void propertyValueFormatError(crow::Response& res, const std::string& arg1, + const std::string& arg2); + ++/** ++ * @brief Formats PropertySizeExceeded message into JSON ++ * Message body: "The property <arg1> is too long. The value exceeds its size ++ * limit." ++ * ++ * @param[in] arg1 Parameter of message that will replace %1 in its body. ++ * ++ * @returns Message PropertySizeExceeded formatted to JSON */ ++nlohmann::json propertySizeExceeded(const std::string& arg1); ++ ++void propertySizeExceeded(crow::Response& res, const std::string& arg1); ++ + /** + * @brief Formats PropertyValueNotInList message into JSON + * Message body: "The value <arg1> for the property <arg2> is not in the list of +diff --git a/redfish-core/include/registries/base_message_registry.hpp b/redfish-core/include/registries/base_message_registry.hpp +index 702cd6f..193df16 100644 +--- a/redfish-core/include/registries/base_message_registry.hpp ++++ b/redfish-core/include/registries/base_message_registry.hpp +@@ -22,7 +22,7 @@ const Header header = { + constexpr const char* url = + "https://redfish.dmtf.org/registries/Base.1.11.0.json"; + +-constexpr std::array<MessageEntry, 93> registry = { ++constexpr std::array<MessageEntry, 94> registry = { + MessageEntry{ + "AccessDenied", + { +@@ -692,6 +692,21 @@ constexpr std::array<MessageEntry, 93> registry = { + "Remove the property from the request body and resubmit " + "the request if the operation failed.", + }}, ++ MessageEntry{"PropertySizeExceeded", ++ { ++ "Indicates that a given property exceeds the size " ++ "limit imposed.", ++ "The property %1 is too long. The value exceeds " ++ "its size limit.", ++ "Warning", ++ "Warning", ++ 1, ++ { ++ "string", ++ }, ++ "Correct the value for the property in the request body " ++ "and resubmit the request if the operation failed.", ++ }}, + MessageEntry{"PropertyUnknown", + { + "Indicates that an unknown property was included in the " +diff --git a/redfish-core/src/error_messages.cpp b/redfish-core/src/error_messages.cpp +index 9c28e8f..854a1a5 100644 +--- a/redfish-core/src/error_messages.cpp ++++ b/redfish-core/src/error_messages.cpp +@@ -514,6 +514,33 @@ void propertyValueFormatError(crow::Response& res, const std::string& arg1, + addMessageToJson(res.jsonValue, propertyValueFormatError(arg1, arg2), arg2); + } + ++/** ++ * @internal ++ * @brief Formats PropertySizeExceeded message into JSON for the specified ++ * property ++ * ++ * See header file for more information ++ * @endinternal ++ */ ++nlohmann::json propertySizeExceeded(const std::string& arg1) ++{ ++ return nlohmann::json{ ++ {"@odata.type", "#Message.v1_1_1.Message"}, ++ {"MessageId", "Base.1.8.1.PropertySizeExceeded"}, ++ {"Message", "The property " + arg1 + ++ " is too long. The value exceeds its size limit."}, ++ {"MessageArgs", {arg1}}, ++ {"MessageSeverity", "Warning"}, ++ {"Resolution", "Correct the value for the property in the request body " ++ "and resubmit the request if the operation failed."}}; ++} ++ ++void propertySizeExceeded(crow::Response& res, const std::string& arg1) ++{ ++ res.result(boost::beast::http::status::bad_request); ++ addMessageToJson(res.jsonValue, propertySizeExceeded(arg1), arg1); ++} ++ + /** + * @internal + * @brief Formats PropertyValueNotInList message into JSON for the specified +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0020-Redfish-Deny-set-AccountLockDuration-to-zero.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0020-Redfish-Deny-set-AccountLockDuration-to-zero.patch new file mode 100644 index 000000000..cc9da3b8b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0020-Redfish-Deny-set-AccountLockDuration-to-zero.patch @@ -0,0 +1,85 @@ +From f75efac9eebea8bf8f548d10a8cbafa28f556a8f Mon Sep 17 00:00:00 2001 +From: Meera-Katta <meerax.katta@linux.intel.com> +Date: Wed, 7 Jul 2021 13:19:09 +0000 +Subject: [PATCH] Redfish: Deny set AccountLockDuration to zero +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Issue: Redfish schema says, no lockout shall occur in case of Account +LockoutDuration value is zero. But Linux PAM module documentation says, if +account lockout value is zero, account will be locked out indefinitely +after the number of failed login attempts. As per the current +implementation user can write any value into the PAM module. If user tried +to set unlock timeout value to zero, account will be locked out +indefinitely until administrator explicitly reenables it. + +Workaround: Denying user to set AccountLockDuration to zero from Redfish. +Setting ‘AccountLockDuration’ to 0 will be permitted only after +‘AccountLockoutCounterResetEnabled’ support is added. +Otherwise,account will be locked permanently after the AccountLockoutDuration +if ‘AccountLockDuration’ is set to zero, while +AccountLockoutThreshold is non zero. If someone wants no account lockout +irrespective of number of failed login attempts, it can be still achieved by +setting ‘AccountLockoutThreshold’ to zero +(instead of trying to set ‘AccountLockDuration’ to zero.) + +Tested: +1) Redfish Service Validator passed for this change. +2) Verified from Redfish +PATCH : https://<BMC IP>/redfish/v1/AccountService +Body: +{"AccountLockoutDuration":0} + +Response: +{ + "AccountLockoutDuration@Message.ExtendedInfo": [ + { + "@odata.type": "#Message.v1_1_1.Message", + "Message": "The value unlockTimeout for the property + AccountLockoutDuration is not in the list of acceptable values.", + "MessageArgs": [ + "unlockTimeout", + "AccountLockoutDuration" + ], + "MessageId": "Base.1.8.1.PropertyValueNotInList", + "MessageSeverity": "Warning", + "Resolution": "Choose a value from the enumeration list that the + implementation can support and resubmit the request if the + operation failed." + } + ] +} + +Signed-off-by: Meera-Katta <meerax.katta@linux.intel.com> +--- + redfish-core/lib/account_service.hpp | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/redfish-core/lib/account_service.hpp b/redfish-core/lib/account_service.hpp +index e6fe205..42085fa 100644 +--- a/redfish-core/lib/account_service.hpp ++++ b/redfish-core/lib/account_service.hpp +@@ -1448,6 +1448,19 @@ inline void requestAccountServiceRoutes(App& app) + + if (unlockTimeout) + { ++ // Account will be locked permanently after the N number ++ // of failed login attempts if we set unlockTimeout value ++ // to be 0. ++ if (unlockTimeout.value() == 0) ++ { ++ BMCWEB_LOG_INFO ++ << "Unlock timeout value must be greater" ++ "than zero"; ++ messages::propertyValueNotInList(asyncResp->res, ++ "unlockTimeout", ++ "AccountLockoutDuration"); ++ return; ++ } + crow::connections::systemBus->async_method_call( + [asyncResp](const boost::system::error_code ec) { + if (ec) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-Add-get-IPMI-session-id-s-to-Redfish.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-Add-get-IPMI-session-id-s-to-Redfish.patch new file mode 100644 index 000000000..b3feee39a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0023-Add-get-IPMI-session-id-s-to-Redfish.patch @@ -0,0 +1,390 @@ +From 5c79e34be9357c2a2cd9bac61cd0162dbd342a2d Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Fri, 30 Jul 2021 17:33:16 +0000 +Subject: [PATCH] Add/get IPMI session id's to Redfish + +As per existing implementation, Redfish supports to get only sessions +created on Redfish & EWS. But as per Redfish schema Redfish should +include to get IPMI sessions as well. +So add support to display IPMI session Id's as well on Redfish. +This commit will not impact any functionality/behavior of existing code. +Below functionalities implemented in this commit. +1. Get IPMI session collection +2. Get individual IPMI session information +3. Delete IPMI sessions - Respond with not supported as we can't delete + IPMI sessions from Redfish interface + +Tested: +1. Verified redfish validator passed with active IPMI session. +2. Get session details from Redfish +GET: https://<BMC-IP>/redfish/v1/SessionService/Sessions +Response: +{ + "@odata.id": "/redfish/v1/SessionService/Sessions/", + "@odata.type": "#SessionCollection.SessionCollection", + "Description": "Session Collection", + "Members": [ + { + "@odata.id": "/redfish/v1/SessionService/Sessions/TlFPbR9ZIn" + }, + { + "@odata.id": "/redfish/v1/SessionService/Sessions/184U3014ub" + }, + { + "@odata.id": "/redfish/v1/SessionService/Sessions/cV0xi5QoPy" + }, + { + "@odata.id": "/redfish/v1/SessionService/Sessions/8f6234d7_81" + } + ], + "Members@odata.count": 4, + "Name": "Session Collection" +} + +3. Get session details from RedFish +Case 1: RedFish session +GET: https://<BMC-IP>/redfish/v1/SessionService/Sessions/TlFPbR9ZIn +Response: +{ + "@odata.id": "/redfish/v1/SessionService/Sessions/TlFPbR9ZIn", + "@odata.type": "#Session.v1_3_0.Session", + "ClientOriginIPAddress": "::ffff:10.213.91.40", + "Description": "Manager User Session", + "Id": "TlFPbR9ZIn", + "Name": "User Session", + "UserName": "root" +} +Case 2: IPMI session +Verified and displayed IPMI session details on RedFish. +GET: https://<BMC-IP>/redfish/v1/SessionService/Sessions/8f6234d7_81 +Response: +{ + "@odata.id": "/redfish/v1/SessionService/Sessions/8f6234d7_81", + "@odata.type": "#Session.v1_3_0.Session", + "ClientOriginIPAddress": "xx.xx.xx.xx", + "Description": "Manager User Session", + "Id": "8f6234d7_81", + "Name": "User Session", + "UserName": "root" +} +4. Delete IPMI session: +Verified IPMI session is not allowed to delete from Redfish +DELETE: https://<BMC-IP>/redfish/v1/SessionService/Sessions/8f6234d7_81 +Response: +{ + "error": { + "@Message.ExtendedInfo": [ + { + "@odata.type": "#Message.v1_1_1.Message", + "Message": "The action deleting IPMI session from + Redfish is not supported by the resource.", + "MessageArgs": [ + "deleting IPMI session from Redfish" + ], + "MessageId": "Base.1.8.1.ActionNotSupported", + "MessageSeverity": "Critical", + "Resolution": "The action supplied cannot be resubmitted + to the implementation. Perhaps the action was invalid, + the wrong resource was the target or the implementation + documentation may be of assistance." + } + ], + "code": "Base.1.8.1.ActionNotSupported", + "message": "The action deleting IPMI session from Redfish is not + supported by the resource." + } +} +5. Delete RedFish session +Result: successfully deleted valid RedFish session. + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + redfish-core/lib/redfish_sessions.hpp | 244 +++++++++++++++++++++++--- + 1 file changed, 222 insertions(+), 22 deletions(-) + +diff --git a/redfish-core/lib/redfish_sessions.hpp b/redfish-core/lib/redfish_sessions.hpp +index 929e0c8..3c7a968 100644 +--- a/redfish-core/lib/redfish_sessions.hpp ++++ b/redfish-core/lib/redfish_sessions.hpp +@@ -56,14 +56,127 @@ inline void requestRoutesSession(App& app) + auto session = persistent_data::SessionStore::getInstance() + .getSessionByUid(sessionId); + +- if (session == nullptr) ++ if (session) + { +- messages::resourceNotFound(asyncResp->res, "Session", +- sessionId); ++ fillSessionObject(asyncResp->res, *session); + return; + } + +- fillSessionObject(asyncResp->res, *session); ++ std::array<std::string, 1> interfaces = { ++ "xyz.openbmc_project.Ipmi.SessionInfo"}; ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, sessionId](const boost::system::error_code ec, ++ const GetSubTreeType& subtree) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Error in querying GetSubTree with " ++ "Object Mapper. " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ if (subtree.size() == 0) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Can't find Session Info Attributes!"; ++ messages::resourceNotFound(asyncResp->res, ++ "Session", sessionId); ++ return; ++ } ++ bool ipmiSessionFound = false; ++ std::string ipmiSessionService; ++ std::string ipmiSessionInfPath; ++ for (const auto& [ipmiSessionPath, object] : subtree) ++ { ++ if (ipmiSessionPath.empty() || object.empty()) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Session Info Attributes mapper error!"; ++ continue; ++ } ++ if (!boost::ends_with(ipmiSessionPath, sessionId)) ++ { ++ continue; ++ } ++ ipmiSessionFound = true; ++ ipmiSessionService = object[0].first; ++ ipmiSessionInfPath = ipmiSessionPath; ++ break; ++ } ++ if (!ipmiSessionFound) ++ { ++ messages::resourceNotFound(asyncResp->res, ++ "Session", sessionId); ++ return; ++ } ++ if (ipmiSessionService.empty()) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Session Info Attributes mapper " ++ "error!"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, sessionId]( ++ const boost::system::error_code ec, ++ const std::vector<std::pair< ++ std::string, ++ std::variant<std::monostate, std::string, ++ uint32_t>>>& properties) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Error in querying Session " ++ "Info State property " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ std::string userName = ""; ++ uint32_t remoteIpAddr; ++ try ++ { ++ sdbusplus::unpackProperties( ++ properties, "Username", userName, ++ "RemoteIPAddr", remoteIpAddr); ++ asyncResp->res.jsonValue["Id"] = sessionId; ++ asyncResp->res.jsonValue["UserName"] = ++ userName; ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/SessionService/" ++ "Sessions/" + ++ sessionId; ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#Session.v1_3_0.Session"; ++ asyncResp->res.jsonValue["Name"] = ++ "User Session"; ++ asyncResp->res.jsonValue["Description"] = ++ "Manager User Session"; ++ struct in_addr ipAddr; ++ ipAddr.s_addr = remoteIpAddr; ++ asyncResp->res ++ .jsonValue["ClientOriginIPAddress"] = ++ inet_ntoa(ipAddr); ++ } ++ catch (const sdbusplus::exception:: ++ UnpackPropertyError& error) ++ { ++ BMCWEB_LOG_ERROR << error.what(); ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ return; ++ }, ++ ipmiSessionService, ipmiSessionInfPath, ++ "org.freedesktop.DBus.Properties", "GetAll", ++ "xyz.openbmc_project.Ipmi.SessionInfo"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTree", "/", 0, ++ interfaces); + }); + + BMCWEB_ROUTE(app, "/redfish/v1/SessionService/Sessions/<str>/") +@@ -75,34 +188,79 @@ inline void requestRoutesSession(App& app) + auto session = persistent_data::SessionStore::getInstance() + .getSessionByUid(sessionId); + +- if (session == nullptr) +- { +- messages::resourceNotFound(asyncResp->res, "Session", +- sessionId); +- return; +- } +- + // Perform a proper ConfigureSelf authority check. If a + // session is being used to DELETE some other user's session, + // then the ConfigureSelf privilege does not apply. In that + // case, perform the authority check again without the user's + // ConfigureSelf privilege. +- if (session->username != req.session->username) ++ if (session) + { +- Privileges effectiveUserPrivileges = +- redfish::getUserPrivileges(req.userRole); +- +- if (!effectiveUserPrivileges.isSupersetOf( +- {"ConfigureUsers"})) ++ if (session->username != req.session->username) + { +- messages::insufficientPrivilege(asyncResp->res); +- return; ++ Privileges effectiveUserPrivileges = ++ redfish::getUserPrivileges(req.userRole); ++ ++ if (!effectiveUserPrivileges.isSupersetOf( ++ {"ConfigureUsers"})) ++ { ++ messages::insufficientPrivilege(asyncResp->res); ++ return; ++ } + } ++ persistent_data::SessionStore::getInstance().removeSession( ++ session); ++ messages::success(asyncResp->res); ++ return; + } + +- persistent_data::SessionStore::getInstance().removeSession( +- session); +- messages::success(asyncResp->res); ++ std::array<std::string, 1> interfaces = { ++ "xyz.openbmc_project.Ipmi.SessionInfo"}; ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, ++ sessionId](const boost::system::error_code ec, ++ const std::vector<std::string>& ifaceList) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Error in querying GetSubTreePaths " ++ "with Object Mapper. " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ if (ifaceList.size() == 0) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Can't find Session Info Attributes!"; ++ return; ++ } ++ bool ipmiSessionFound = false; ++ for (const std::string& ipmiSessionPath : ifaceList) ++ { ++ if (!boost::ends_with(ipmiSessionPath, sessionId)) ++ { ++ continue; ++ } ++ ipmiSessionFound = true; ++ break; ++ } ++ if (ipmiSessionFound) ++ { ++ BMCWEB_LOG_DEBUG << "Deleting IPMI session from " ++ "Redfish is not allowed."; ++ messages::actionNotSupported( ++ asyncResp->res, ++ "deleting IPMI session from Redfish"); ++ return; ++ } ++ messages::resourceNotFound(asyncResp->res, "Session", ++ sessionId); ++ return; ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTreePaths", "/", ++ 0, interfaces); + }); + + BMCWEB_ROUTE(app, "/redfish/v1/SessionService/Sessions/") +@@ -131,6 +289,48 @@ inline void requestRoutesSession(App& app) + "/redfish/v1/SessionService/Sessions/"; + asyncResp->res.jsonValue["Name"] = "Session Collection"; + asyncResp->res.jsonValue["Description"] = "Session Collection"; ++ ++ std::array<std::string, 1> interfaces = { ++ "xyz.openbmc_project.Ipmi.SessionInfo"}; ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const std::vector<std::string>& ifaceList) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Error in querying GetSubTreePaths " ++ "with Object Mapper. " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ if (ifaceList.size() == 0) ++ { ++ BMCWEB_LOG_DEBUG ++ << "Can't find Session Info Attributes!"; ++ return; ++ } ++ for (const std::string& ipmiSessionPath : ifaceList) ++ { ++ std::filesystem::path filePath(ipmiSessionPath); ++ std::string ipmiSessionID = ++ filePath.has_filename() ? filePath.filename() ++ : ""; ++ if (!ipmiSessionID.empty() && ipmiSessionID != "0") ++ { ++ asyncResp->res.jsonValue["Members"].push_back( ++ {{"@odata.id", ++ "/redfish/v1/SessionService/Sessions/" + ++ ipmiSessionID}}); ++ } ++ } ++ asyncResp->res.jsonValue["Members@odata.count"] = ++ asyncResp->res.jsonValue["Members"].size(); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTreePaths", "/", ++ 0, interfaces); + }); + + BMCWEB_ROUTE(app, "/redfish/v1/SessionService/Sessions/") +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-Add-count-sensor-type.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-Add-count-sensor-type.patch new file mode 100644 index 000000000..22ae05fa3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0024-Add-count-sensor-type.patch @@ -0,0 +1,29 @@ +From 94a0ae774933b7801d0c8d843b3ac3a39a5e5646 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Adrian=20Ambro=C5=BCewicz?= <adrian.ambrozewicz@intel.com> +Date: Fri, 30 Jul 2021 15:25:29 +0200 +Subject: [PATCH] Add 'count' sensor type + +PMT exposes data mainly in raw counter formats. This change makes +bmcweb aware of new sensor type. + +Testing: +- values of type 'count' from PMT exposed successfully on Redfish +--- + redfish-core/lib/sensors.hpp | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/redfish-core/lib/sensors.hpp b/redfish-core/lib/sensors.hpp +index 45a1eb6..7405e5a 100644 +--- a/redfish-core/lib/sensors.hpp ++++ b/redfish-core/lib/sensors.hpp +@@ -63,6 +63,7 @@ static const boost::container::flat_map<std::string_view, + {node::sensors, + {"/xyz/openbmc_project/sensors/power", + "/xyz/openbmc_project/sensors/current", ++ "/xyz/openbmc_project/sensors/count", + "/xyz/openbmc_project/sensors/airflow", + #ifdef BMCWEB_NEW_POWERSUBSYSTEM_THERMALSUBSYSTEM + "/xyz/openbmc_project/sensors/voltage", +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-Model-CoreCount-to-ProcessorSummary.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-Model-CoreCount-to-ProcessorSummary.patch new file mode 100644 index 000000000..edf4d219e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/0025-Add-Model-CoreCount-to-ProcessorSummary.patch @@ -0,0 +1,288 @@ +From f4f15a52610d1a199ddac948c8f849df05d86151 Mon Sep 17 00:00:00 2001 +From: Ali Ahmed <ama213000@gmail.com> +Date: Fri, 3 Sep 2021 02:33:43 -0500 +Subject: [PATCH] Add Model & CoreCount to ProcessorSummary + +In Redfish ComputerSystem schema, the ProcessorSummary parameter +lists summary information of the Processors on the system. This commit +adds the 'Model' and 'CoreCount' properties to ProcessorSummary. + +If the CPU Models are different, then the 'Model' field takes the first +entry in alphabetical order. + +Testing: +1. Redfish Validator Testing successfully passed. +2. Curl testing: + +curl -k -H "X-Auth-Token: $tok" https://$bmc/redfish/v1/Systems/system + +... + "ProcessorSummary": { + "CoreCount": 24, + "Count": 2, + "Model": "test_name", + "Status": { + "Health": "OK", + "HealthRollup": "OK", + "State": "Disabled" + } + }, +... + +Change-Id: I39cbf6ed35c35ce3a3551c9689237d5023775326 +Signed-off-by: Ali Ahmed <ama213000@gmail.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + redfish-core/lib/systems.hpp | 229 ++++++++++++++++++++++------------- + 1 file changed, 147 insertions(+), 82 deletions(-) + +diff --git a/redfish-core/lib/systems.hpp b/redfish-core/lib/systems.hpp +index 680a0ee..3b5f9e4 100644 +--- a/redfish-core/lib/systems.hpp ++++ b/redfish-core/lib/systems.hpp +@@ -139,6 +139,152 @@ inline void + } + } + ++inline void getProcessorProperties( ++ const std::shared_ptr<bmcweb::AsyncResp>& aResp, const std::string& service, ++ const std::string& path, ++ const std::vector<std::pair< ++ std::string, std::variant<std::string, uint64_t, uint32_t, uint16_t>>>& ++ properties) ++{ ++ ++ BMCWEB_LOG_DEBUG << "Got " << properties.size() << " Cpu properties."; ++ ++ auto getCpuPresenceState = ++ [aResp](const boost::system::error_code ec3, ++ const std::variant<bool>& cpuPresenceCheck) { ++ if (ec3) ++ { ++ BMCWEB_LOG_ERROR << "DBUS response error " << ec3; ++ return; ++ } ++ modifyCpuPresenceState(aResp, cpuPresenceCheck); ++ }; ++ ++ auto getCpuFunctionalState = ++ [aResp](const boost::system::error_code ec3, ++ const std::variant<bool>& cpuFunctionalCheck) { ++ if (ec3) ++ { ++ BMCWEB_LOG_ERROR << "DBUS response error " << ec3; ++ return; ++ } ++ modifyCpuFunctionalState(aResp, cpuFunctionalCheck); ++ }; ++ ++ // Get the Presence of CPU ++ crow::connections::systemBus->async_method_call( ++ std::move(getCpuPresenceState), service, path, ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.Inventory.Item", "Present"); ++ ++ // Get the Functional State ++ crow::connections::systemBus->async_method_call( ++ std::move(getCpuFunctionalState), service, path, ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.State.Decorator.OperationalStatus", "Functional"); ++ ++ for (const auto& property : properties) ++ { ++ if (property.first == "Family") ++ { ++ // Get the CPU Model ++ const std::string* modelStr = ++ std::get_if<std::string>(&property.second); ++ if (!modelStr) ++ { ++ BMCWEB_LOG_DEBUG << "Failed to get CPU Family"; ++ // Skip it and continue with other properties ++ continue; ++ } ++ if ((*modelStr).size() < 1) ++ { ++ BMCWEB_LOG_DEBUG << "Empty CPU Family info, skipping..."; ++ continue; ++ } ++ nlohmann::json& prevModel = ++ aResp->res.jsonValue["ProcessorSummary"]["Model"]; ++ std::string* prevModelPtr = prevModel.get_ptr<std::string*>(); ++ ++ // If CPU Models are different, use the first entry in ++ // alphabetical order ++ ++ // If Model has never been set ++ // before, set it to *modelStr ++ if (prevModelPtr == nullptr) ++ { ++ prevModel = *modelStr; ++ } ++ // If Model has been set before, only change if new Model is ++ // higher in alphabetical order ++ else ++ { ++ if (*modelStr < *prevModelPtr) ++ { ++ prevModel = *modelStr; ++ } ++ } ++ } ++ else if (property.first == "CoreCount") ++ { ++ // Get CPU CoreCount and add it to the total ++ const uint16_t* coreCountVal = ++ std::get_if<uint16_t>(&property.second); ++ ++ if (!coreCountVal) ++ { ++ BMCWEB_LOG_DEBUG << "Failed to get CPU Core count"; ++ // Skip it and continue with other properties ++ continue; ++ } ++ ++ nlohmann::json& coreCount = ++ aResp->res.jsonValue["ProcessorSummary"]["CoreCount"]; ++ uint64_t* coreCountPtr = coreCount.get_ptr<uint64_t*>(); ++ ++ if (coreCountPtr == nullptr) ++ { ++ coreCount = *coreCountVal; ++ } ++ else ++ { ++ *coreCountPtr += *coreCountVal; ++ } ++ } ++ } ++} ++ ++/* ++ * @brief Get ProcessorSummary fields ++ * ++ * @param[in] aResp Shared pointer for completing asynchronous calls ++ * @param[in] service dbus service for Cpu Information ++ * @param[in] path dbus path for Cpu ++ * ++ * @return None. ++ */ ++inline void getProcessorSummary(const std::shared_ptr<bmcweb::AsyncResp>& aResp, ++ const std::string& service, ++ const std::string& path) ++{ ++ ++ crow::connections::systemBus->async_method_call( ++ [aResp, service, ++ path](const boost::system::error_code ec2, ++ const std::vector<std::pair< ++ std::string, std::variant<std::string, uint64_t, uint32_t, ++ uint16_t>>>& properties) { ++ if (ec2) ++ { ++ BMCWEB_LOG_ERROR << "DBUS response error " << ec2; ++ messages::internalError(aResp->res); ++ return; ++ } ++ getProcessorProperties(aResp, service, path, properties); ++ }, ++ service, path, "org.freedesktop.DBus.Properties", "GetAll", ++ "xyz.openbmc_project.Inventory.Item.Cpu"); ++} ++ + /* + * @brief Retrieves computer system properties over dbus + * +@@ -309,88 +455,7 @@ inline void + BMCWEB_LOG_DEBUG + << "Found Cpu, now get its properties."; + +- crow::connections::systemBus->async_method_call( +- [aResp, service{connection.first}, +- path](const boost::system::error_code ec2, +- const std::vector< +- std::pair<std::string, VariantType>>& +- properties) { +- if (ec2) +- { +- BMCWEB_LOG_ERROR +- << "DBUS response error " << ec2; +- messages::internalError(aResp->res); +- return; +- } +- BMCWEB_LOG_DEBUG << "Got " +- << properties.size() +- << " Cpu properties."; +- +- auto getCpuPresenceState = +- [aResp]( +- const boost::system::error_code ec3, +- const std::variant<bool>& +- cpuPresenceCheck) { +- if (ec3) +- { +- BMCWEB_LOG_ERROR +- << "DBUS response error " +- << ec3; +- return; +- } +- modifyCpuPresenceState( +- aResp, cpuPresenceCheck); +- }; +- +- auto getCpuFunctionalState = +- [aResp]( +- const boost::system::error_code ec3, +- const std::variant<bool>& +- cpuFunctionalCheck) { +- if (ec3) +- { +- BMCWEB_LOG_ERROR +- << "DBUS response error " +- << ec3; +- return; +- } +- modifyCpuFunctionalState( +- aResp, cpuFunctionalCheck); +- }; +- +- // Get the Presence of CPU +- crow::connections::systemBus +- ->async_method_call( +- std::move(getCpuPresenceState), +- service, path, +- "org.freedesktop.DBus." +- "Properties", +- "Get", +- "xyz.openbmc_project.Inventory." +- "Item", +- "Present"); +- +- // Get the Functional State +- crow::connections::systemBus +- ->async_method_call( +- std::move(getCpuFunctionalState), +- service, path, +- "org.freedesktop.DBus." +- "Properties", +- "Get", +- "xyz.openbmc_project.State." +- "Decorator." +- "OperationalStatus", +- "Functional"); +- +- // Get the MODEL from +- // xyz.openbmc_project.Inventory.Decorator.Asset +- // support it later as Model is Empty +- // currently. +- }, +- connection.first, path, +- "org.freedesktop.DBus.Properties", "GetAll", +- "xyz.openbmc_project.Inventory.Item.Cpu"); ++ getProcessorSummary(aResp, connection.first, path); + + cpuHealth->inventory.emplace_back(path); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0001-Define-Redfish-interface-Registries-Bios.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0001-Define-Redfish-interface-Registries-Bios.patch new file mode 100644 index 000000000..19a392873 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0001-Define-Redfish-interface-Registries-Bios.patch @@ -0,0 +1,875 @@ +From bde7f728d5a87522674bcd5515baaa02bf7b9373 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Fri, 4 Sep 2020 19:24:25 +0800 +Subject: [PATCH] Define Redfish interface "/Registries/Bios" and enable + Attributes property + +1. Define Redfish interface "/Registries/Bios" for BIOS Attribute Registry + RBC Daemon provide method to get BIOS attribute registry. +2. Eanble Attributes property for BIOS resource +3. Define Redfish interface "/Systems/system/Bios/Settings" for BIOS +settings +4. RBC daemon is at +https://gerrit.openbmc-project.xyz/#/c/openbmc/bios-settings-mgr/+/35563/ +5. IPMI command implementation is at +https://gerrit.openbmc-project.xyz/#/c/openbmc/intel-ipmi-oem/+/30827/ +6. Property design is at +https://github.com/openbmc/phosphor-dbus-interfaces/tree/master/xyz/openbmc_project/BIOSConfig +7. Design doc is at +https://github.com/openbmc/docs/blob/master/designs/remote-bios-configuration.md +8. There will be 95 test cases for this feature in the validation team. + +Tested: + +1. Use postman (Redfish tool) could get all the attributes in bios +resouce, get bios settings, get bios attribute +registry. +https://IP_ADDR/redfish/v1/Systems/system/Bios +{ + "@Redfish.Settings": { + "@odata.type": "#Settings.v1_3_0.Settings", + "SettingsObject": { + "@odata.id": "/redfish/v1/Systems/system/Bios/Settings" + } + }, + "@odata.id": "/redfish/v1/Systems/system/Bios", + "@odata.type": "#Bios.v1_1_0.Bios", + "Actions": { + "#Bios.ChangePassword": { + "target": "/redfish/v1/Systems/system/Bios/Actions/Bios.ChangePassword" + }, + "#Bios.ResetBios": { + "target": "/redfish/v1/Systems/system/Bios/Actions/Bios.ResetBios" + } + }, + "AttributeRegistry": "BiosAttributeRegistry", + "Attributes": { + "attr0": "current value" + }, + "Description": "BIOS Configuration Service", + "Id": "BIOS", + "Links": { + "ActiveSoftwareImage": { + "@odata.id": "/redfish/v1/UpdateService/FirmwareInventory/bios_active" + }, + "SoftwareImages": [ + { + "@odata.id": "/redfish/v1/UpdateService/FirmwareInventory/bios_active" + } + ], + "SoftwareImages@odata.count": 1 + }, + "Name": "BIOS Configuration" +} + +Redfish interface: https://BMCIP/redfish/v1/Registries/BiosAttributeRegistry +{ + "@odata.id": "/redfish/v1/Registries/BiosAttributeRegistry", + "@odata.type": "#MessageRegistryFile.v1_1_0.MessageRegistryFile", + "Description": "BiosAttributeRegistry Message Registry File Location", + "Id": "BiosAttributeRegistry", + "Languages": [ + "en" + ], + "Languages@odata.count": 1, + "Location": [ + { + "Language": "en", + "Uri": "/redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry" + } + ], + "Location@odata.count": 1, + "Name": "BiosAttributeRegistry Message Registry File", + "Registry": "BiosAttributeRegistry.1.0.0" +} + +Redfish interface: https://BMCIP/redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry +{ + "@odata.id": "/redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry", + "@odata.type": "#AttributeRegistry.v1_3_2.AttributeRegistry", + "Id": "BiosAttributeRegistry", + "Language": "en", + "Name": "Bios Attribute Registry", + "OwningEntity": "OpenBMC", + "RegistryEntries": { + "Attributes": [ + { + "AttributeName": "attr0", + "CurrentValue": "current value", + "DefaultValue": "default value", + "DisplayName": "display name for attr0", + "HelpText": "description for attr0", + "MenuPath": "./menu/path/for/attr0", + "ReadOnly": false, + "Type": "String", + "Value": [] + } + ] + }, + "RegistryVersion": "1.0.0" +} + +https://BMC_IPADDR/redfish/v1/Systems/system/Bios/Settings +{ + "@odata.id": "/redfish/v1/Systems/system/Bios/Settings", + "@odata.type": "#Bios.v1_1_0.Bios", + "AttributeRegistry": "BiosAttributeRegistry", + "Attributes": { + "QuietBoot": "0x0" + }, + "Id": "BiosSettingsV1", + "Name": "Bios Settings Version 1" +} + +2. Passed Validator check for bios resource and bios attribute registry +*** /redfish/v1/Systems/system/Bios +INFO - Type (#Bios.v1_1_0.Bios), GET SUCCESS (time: 1.57377) +INFO - PASS +*** /redfish/v1/Registries/BiosAttributeRegistry +INFO - Type (#MessageRegistryFile.v1_1_0.MessageRegistryFile), GET SUCCESS (time: 0.075438) +INFO - PASS +INFO - +*** /redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry +INFO - Type (#AttributeRegistry.v1_3_2.AttributeRegistry), GET SUCCESS (time: 0.075751) +INFO - PASS + +@odata.id /redfish/v1/Systems/system/Bios odata Exists PASS +@odata.type #Settings.v1_3_0.Settings odata Exists PASS +Links [JSON Object] Bios.v1_1_0.Links Yes complex +Links.ActiveSoftwareImage Link: /redfish/v1/UpdateService/FirmwareInventory/bios_active link to: SoftwareInventory Yes PASS +Links.SoftwareImages Array (size: 1) array of: SoftwareInventory Yes ... +Links.SoftwareImages[0] Link: /redfish/v1/UpdateService/FirmwareInventory/bios_active SoftwareInventory Yes PASS +Links.Oem - Resource.Oem No Optional +SoftwareImages@odata.count 1 odata Exists PASS +AttributeRegistry BiosAttributeRegistry string Yes PASS +Actions [JSON Object] Bios.v1_0_0.Actions Yes complex +Actions.#Bios.ResetBios Action - Yes PASS +Actions.#Bios.ChangePassword Action - Yes PASS +Attributes [JSON Object] Bios.v1_0_0.Attributes Yes complex +Attributes.attr0 current value primitive Yes PASS +Id BIOS string Yes PASS +Description BIOS Configuration Service string Yes PASS +Name BIOS Configuration string Yes PASS +Oem - Resource.Oem No Optional +@Redfish.Settings [JSON Object] Settings.Settings Yes complex +@Redfish.Settings.MaintenanceWindowResource - link to: ItemOrCollection No Optional +@Redfish.Settings.SupportedApplyTimes - string (enum) No Optional +@Redfish.Settings.Time - date No Optional +@Redfish.Settings.ETag - string No Optional +@Redfish.Settings.SettingsObject Link: /redfish/v1/Systems/system/Bios/Settings link to: Item Yes PASS +@Redfish.Settings.Messages - Message No Optional + +@odata.id /redfish/v1/Registries/BiosAttributeRegistry odata Exists PASS +@odata.type #MessageRegistryFile.v1_1_0.MessageRegistryFile odata Exists PASS +Languages@odata.count 1 odata Exists PASS +Location@odata.count 1 odata Exists PASS +Actions - MessageRegistryFile.v1_1_0.Actions No Optional +Languages Array (size: 1) string Yes ... +Languages[0] en string Yes PASS +Registry BiosAttributeRegistry.1.0.0 string Yes PASS +Location Array (size: 1) array of: Location Yes ... +Location[0] [JSON Object] Location Yes complex +Location[0].Language en string Yes PASS +Location[0].Uri /redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry string Yes PASS +Location[0].ArchiveUri - string No Optional +Location[0].PublicationUri - string No Optional +Location[0].ArchiveFile - string No Optional +Id BiosAttributeRegistry string Yes PASS +Description BiosAttributeRegistry Message Registry File Location string Yes PASS +Name BiosAttributeRegistry Message Registry File string Yes PASS +Oem - Resource.Oem No Optional + +@odata.id /redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry odata Exists PASS +@odata.type #AttributeRegistry.v1_3_2.AttributeRegistry odata Exists PASS +Actions - AttributeRegistry.v1_1_0.Actions No Optional +Language en string Yes PASS +RegistryVersion 1.0.0 string Yes PASS +OwningEntity OpenBMC string Yes PASS +SupportedSystems - SupportedSystems No Optional +RegistryEntries [JSON Object] AttributeRegistry.v1_0_0.RegistryEntries Yes complex +RegistryEntries.Attributes Array (size: 1) array of: Attributes Yes ... +RegistryEntries.Attributes[0] [JSON Object] Attributes Yes complex +RegistryEntries.Attributes[0].Oem - Resource.Oem No Optional +RegistryEntries.Attributes[0].ResetRequired - boolean No Optional +RegistryEntries.Attributes[0].UefiDevicePath - string No Optional +RegistryEntries.Attributes[0].UefiKeywordName - string No Optional +RegistryEntries.Attributes[0].UefiNamespaceId - string No Optional +RegistryEntries.Attributes[0].AttributeName attr0 string Yes PASS +RegistryEntries.Attributes[0].Type String string (enum) Yes PASS +RegistryEntries.Attributes[0].Value Array (size: 0) array of: AttributeValue Yes ... +RegistryEntries.Attributes[0].DisplayName display name for attr0 string Yes PASS +RegistryEntries.Attributes[0].HelpText description for attr0 string Yes PASS +RegistryEntries.Attributes[0].WarningText - string No Optional +RegistryEntries.Attributes[0].CurrentValue current value primitive Yes PASS +RegistryEntries.Attributes[0].DefaultValue default value primitive Yes PASS +RegistryEntries.Attributes[0].DisplayOrder - number No Optional +RegistryEntries.Attributes[0].MenuPath ./menu/path/for/attr0 string Yes PASS +RegistryEntries.Attributes[0].ReadOnly False boolean Yes PASS +RegistryEntries.Attributes[0].WriteOnly - boolean No Optional +RegistryEntries.Attributes[0].GrayOut - boolean No Optional +RegistryEntries.Attributes[0].Hidden - boolean No Optional +RegistryEntries.Attributes[0].Immutable - boolean No Optional +RegistryEntries.Attributes[0].IsSystemUniqueProperty - boolean No Optional +RegistryEntries.Attributes[0].MaxLength - number No Optional +RegistryEntries.Attributes[0].MinLength - number No Optional +RegistryEntries.Attributes[0].ScalarIncrement - number No Optional +RegistryEntries.Attributes[0].UpperBound - number No Optional +RegistryEntries.Attributes[0].LowerBound - number No Optional +RegistryEntries.Attributes[0].ValueExpression - string No Optional +RegistryEntries.Menus - Menus No Optional +RegistryEntries.Dependencies - Dependencies No Optional +Id BiosAttributeRegistry string Yes PASS +Description - string No Optional +Name Bios Attribute Registry string Yes PASS +Oem - Resource.Oem No Optional + +Change-Id: Iecc61018c350f0b8c89df59b2864b941508b1916 +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: Snehalatha Venkatesh <snehalathax.v@intel.com> +--- + redfish-core/include/redfish.hpp | 3 + + .../include/registries/bios_registry.hpp | 41 ++ + redfish-core/lib/bios.hpp | 511 ++++++++++++++++++ + redfish-core/lib/message_registries.hpp | 11 +- + 4 files changed, 565 insertions(+), 1 deletion(-) + create mode 100644 redfish-core/include/registries/bios_registry.hpp + +diff --git a/redfish-core/include/redfish.hpp b/redfish-core/include/redfish.hpp +index 0a97150..07a9417 100644 +--- a/redfish-core/include/redfish.hpp ++++ b/redfish-core/include/redfish.hpp +@@ -148,7 +148,10 @@ class RedfishService + requestRoutesSystemActionsReset(app); + requestRoutesSystemResetActionInfo(app); + requestRoutesBiosService(app); ++ requestRoutesBiosSettings(app); ++ requestRoutesBiosAttributeRegistry(app); + requestRoutesBiosReset(app); ++ requestRoutesBiosChangePassword(app); + + #ifdef BMCWEB_ENABLE_VM_NBDPROXY + requestNBDVirtualMediaRoutes(app); +diff --git a/redfish-core/include/registries/bios_registry.hpp b/redfish-core/include/registries/bios_registry.hpp +new file mode 100644 +index 0000000..c80937a +--- /dev/null ++++ b/redfish-core/include/registries/bios_registry.hpp +@@ -0,0 +1,41 @@ ++/* ++// Copyright (c) 2020 Intel Corporation ++// ++// Licensed under the Apache License, Version 2.0 (the "License"); ++// you may not use this file except in compliance with the License. ++// You may obtain a copy of the License at ++// ++// http://www.apache.org/licenses/LICENSE-2.0 ++// ++// Unless required by applicable law or agreed to in writing, software ++// distributed under the License is distributed on an "AS IS" BASIS, ++// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++// See the License for the specific language governing permissions and ++// limitations under the License. ++*/ ++#pragma once ++#include <registries.hpp> ++ ++namespace redfish::message_registries::bios ++{ ++const Header header = { ++ "Copyright 2020 OpenBMC. All rights reserved.", ++ "#MessageRegistry.v1_4_0.MessageRegistry", ++ "BiosAttributeRegistry.1.0.0", ++ "Bios Attribute Registry", ++ "en", ++ "This registry defines the messages for bios attribute registry.", ++ "BiosAttributeRegistry", ++ "1.0.0", ++ "OpenBMC", ++}; ++// BiosAttributeRegistry registry is not defined in DMTF, We should use ++// OEM defined registries for this purpose. ++// Below link is wrong - We need to define OEM registries and use ++// appropriate data here. ++constexpr const char* url = ++ "https://redfish.dmtf.org/registries/BiosAttributeRegistry.1.0.0.json"; ++ ++constexpr std::array<MessageEntry, 0> registry = { ++}; ++} // namespace redfish::message_registries::bios +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index c2fb284..87536d6 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -3,8 +3,140 @@ + #include <app.hpp> + #include <registries/privilege_registry.hpp> + #include <utils/fw_utils.hpp> ++ + namespace redfish + { ++ ++/*baseBIOSTable ++map{attributeName,struct{attributeType,readonlyStatus,displayname, ++ description,menuPath,current,default, ++ array{struct{optionstring,optionvalue}}}} ++*/ ++using BiosBaseTableType = std::vector<std::pair< ++ std::string, ++ std::tuple< ++ std::string, bool, std::string, std::string, std::string, ++ std::variant<int64_t, std::string>, std::variant<int64_t, std::string>, ++ std::vector< ++ std::tuple<std::string, std::variant<int64_t, std::string>>>>>>; ++using BiosBaseTableItemType = std::pair< ++ std::string, ++ std::tuple< ++ std::string, bool, std::string, std::string, std::string, ++ std::variant<int64_t, std::string>, std::variant<int64_t, std::string>, ++ std::vector< ++ std::tuple<std::string, std::variant<int64_t, std::string>>>>>; ++using OptionsItemType = ++ std::tuple<std::string, std::variant<int64_t, std::string>>; ++ ++enum BiosBaseTableIndex ++{ ++ biosBaseAttrType = 0, ++ biosBaseReadonlyStatus, ++ biosBaseDisplayName, ++ biosBaseDescription, ++ biosBaseMenuPath, ++ biosBaseCurrValue, ++ biosBaseDefaultValue, ++ biosBaseOptions ++}; ++enum OptionsItemIndex ++{ ++ optItemType = 0, ++ optItemValue ++}; ++/* ++ The Pending attribute name and new value. ++ ex- { {"QuietBoot",Type.Integer, 0x1}, ++ { "DdrFreqLimit",Type.String,"2933"} ++ } ++*/ ++using PendingAttributesType = std::vector<std::pair< ++ std::string, std::tuple<std::string, std::variant<int64_t, std::string>>>>; ++using PendingAttributesItemType = ++ std::pair<std::string, ++ std::tuple<std::string, std::variant<int64_t, std::string>>>; ++enum PendingAttributesIndex ++{ ++ pendingAttrType = 0, ++ pendingAttrValue ++}; ++static std::string mapAttrTypeToRedfish(const std::string_view typeDbus) ++{ ++ std::string ret; ++ if (typeDbus == "xyz.openbmc_project.BIOSConfig.Manager." ++ "AttributeType.Enumeration") ++ { ++ ret = "Enumeration"; ++ } ++ else if (typeDbus == "xyz.openbmc_project.BIOSConfig." ++ "Manager.AttributeType.String") ++ { ++ ret = "String"; ++ } ++ else if (typeDbus == "xyz.openbmc_project.BIOSConfig." ++ "Manager.AttributeType.Password") ++ { ++ ret = "Password"; ++ } ++ else if (typeDbus == "xyz.openbmc_project.BIOSConfig." ++ "Manager.AttributeType.Integer") ++ { ++ ret = "Integer"; ++ } ++ else if (typeDbus == "xyz.openbmc_project.BIOSConfig." ++ "Manager.AttributeType.Boolean") ++ { ++ ret = "Boolean"; ++ } ++ else ++ { ++ ret = "UNKNOWN"; ++ } ++ ++ return ret; ++} ++static std::string mapBoundTypeToRedfish(const std::string_view typeDbus) ++{ ++ std::string ret; ++ if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.ScalarIncrement") ++ { ++ ret = "ScalarIncrement"; ++ } ++ else if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.LowerBound") ++ { ++ ret = "LowerBound"; ++ } ++ else if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.UpperBound") ++ { ++ ret = "UpperBound"; ++ } ++ else if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.MinStringLength") ++ { ++ ret = "MinStringLength"; ++ } ++ else if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.MaxStringLength") ++ { ++ ret = "MaxStringLength"; ++ } ++ else if (typeDbus == ++ "xyz.openbmc_project.BIOSConfig.Manager.BoundType.OneOf") ++ { ++ ret = "OneOf"; ++ } ++ else ++ { ++ ret = "UNKNOWN"; ++ } ++ ++ return ret; ++} ++ + /** + * BiosService class supports handle get method for bios. + */ +@@ -23,6 +155,85 @@ inline void + // Get the ActiveSoftwareImage and SoftwareImages + fw_util::populateFirmwareInformation(asyncResp, fw_util::biosPurpose, "", + true); ++ ++ asyncResp->res.jsonValue["@Redfish.Settings"] = { ++ {"@odata.type", "#Settings.v1_3_0.Settings"}, ++ {"SettingsObject", ++ {{"@odata.id", "/redfish/v1/Systems/system/Bios/Settings"}}}}; ++ asyncResp->res.jsonValue["AttributeRegistry"] = "BiosAttributeRegistry"; ++ asyncResp->res.jsonValue["Attributes"] = {}; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "ObjectMapper::GetObject call failed: " ++ << ec; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ const std::string& service = getObjectType.begin()->first; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp]( ++ const boost::system::error_code ec, ++ const std::variant<BiosBaseTableType>& retBiosTable) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "getBiosAttributes DBUS error: " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ const BiosBaseTableType* baseBiosTable = ++ std::get_if<BiosBaseTableType>(&retBiosTable); ++ nlohmann::json& attributesJson = ++ asyncResp->res.jsonValue["Attributes"]; ++ if (baseBiosTable == nullptr) ++ { ++ BMCWEB_LOG_ERROR << "baseBiosTable == nullptr "; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ for (const BiosBaseTableItemType& item : *baseBiosTable) ++ { ++ const std::string& key = item.first; ++ const std::string& itemType = ++ std::get<biosBaseAttrType>(item.second); ++ std::string attrType = mapAttrTypeToRedfish(itemType); ++ if (attrType == "String") ++ { ++ const std::string* currValue = ++ std::get_if<std::string>( ++ &std::get<biosBaseCurrValue>(item.second)); ++ attributesJson.emplace( ++ key, currValue != nullptr ? *currValue : ""); ++ } ++ else if (attrType == "Integer") ++ { ++ const int64_t* currValue = std::get_if<int64_t>( ++ &std::get<biosBaseCurrValue>(item.second)); ++ attributesJson.emplace( ++ key, currValue != nullptr ? *currValue : 0); ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Unsupported attribute type."; ++ messages::internalError(asyncResp->res); ++ } ++ } ++ }, ++ service, "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.BIOSConfig.Manager", "BaseBIOSTable"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/bios_config/manager", ++ std::array<const char*, 0>()); + } + inline void requestRoutesBiosService(App& app) + { +@@ -31,6 +242,306 @@ inline void requestRoutesBiosService(App& app) + .methods(boost::beast::http::verb::get)(handleBiosServiceGet); + } + ++/** ++ * BiosSettings class supports handle GET/PATCH method for ++ * BIOS configuration pending settings. ++ */ ++inline void requestRoutesBiosSettings(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/Settings") ++ .privileges(redfish::privileges::getBios) ++ .methods(boost::beast::http::verb::get)( ++ [](const crow::Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ asyncResp->res.jsonValue["@odata.id"] = ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/Systems/system/Bios/Settings"; ++ asyncResp->res.jsonValue["@odata.type"] = "#Bios.v1_1_0.Bios"; ++ asyncResp->res.jsonValue["Name"] = "Bios Settings Version 1"; ++ asyncResp->res.jsonValue["Id"] = "BiosSettingsV1"; ++ asyncResp->res.jsonValue["AttributeRegistry"] = ++ "BiosAttributeRegistry"; ++ asyncResp->res.jsonValue["Attributes"] = {}; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "ObjectMapper::GetObject call failed: " ++ << ec; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ std::string service = getObjectType.begin()->first; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp]( ++ const boost::system::error_code ec, ++ const std::variant<PendingAttributesType>& ++ retPendingAttributes) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "getBiosSettings DBUS error: " << ec; ++ messages::resourceNotFound( ++ asyncResp->res, "Systems/system/Bios", ++ "Settings"); ++ return; ++ } ++ const PendingAttributesType* pendingAttributes = ++ std::get_if<PendingAttributesType>( ++ &retPendingAttributes); ++ nlohmann::json& attributesJson = ++ asyncResp->res.jsonValue["Attributes"]; ++ if (pendingAttributes == nullptr) ++ { ++ BMCWEB_LOG_ERROR ++ << "pendingAttributes == nullptr "; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ for (const PendingAttributesItemType& item : ++ *pendingAttributes) ++ { ++ const std::string& key = item.first; ++ const std::string& itemType = ++ std::get<pendingAttrType>(item.second); ++ std::string attrType = ++ mapAttrTypeToRedfish(itemType); ++ if (attrType == "String") ++ { ++ const std::string* currValue = ++ std::get_if<std::string>( ++ &std::get<pendingAttrValue>( ++ item.second)); ++ attributesJson.emplace( ++ key, currValue != nullptr ++ ? *currValue ++ : ""); ++ } ++ else if (attrType == "Integer") ++ { ++ const int64_t* currValue = ++ std::get_if<int64_t>( ++ &std::get<pendingAttrValue>( ++ item.second)); ++ attributesJson.emplace( ++ key, currValue != nullptr ++ ? *currValue ++ : 0); ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR ++ << "Unsupported attribute type."; ++ messages::internalError(asyncResp->res); ++ } ++ } ++ }, ++ service, "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.BIOSConfig.Manager", ++ "PendingAttributes"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/bios_config/manager", ++ std::array<const char*, 0>()); ++ }); ++} ++/** ++ * BiosAttributeRegistry class supports handle get method for BIOS attribute ++ * registry. ++ */ ++inline void requestRoutesBiosAttributeRegistry(App& app) ++{ ++ BMCWEB_ROUTE( ++ app, ++ "/redfish/v1/Registries/BiosAttributeRegistry/BiosAttributeRegistry/") ++ .privileges(redfish::privileges::getBios) ++ .methods( ++ boost::beast::http::verb:: ++ get)([](const crow::Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/Registries/BiosAttributeRegistry/" ++ "BiosAttributeRegistry"; ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#AttributeRegistry.v1_3_2.AttributeRegistry"; ++ asyncResp->res.jsonValue["Name"] = "Bios Attribute Registry"; ++ asyncResp->res.jsonValue["Id"] = "BiosAttributeRegistry"; ++ asyncResp->res.jsonValue["RegistryVersion"] = "1.0.0"; ++ asyncResp->res.jsonValue["Language"] = "en"; ++ asyncResp->res.jsonValue["OwningEntity"] = "OpenBMC"; ++ asyncResp->res.jsonValue["RegistryEntries"]["Attributes"] = ++ nlohmann::json::array(); ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "ObjectMapper::GetObject call failed: " << ec; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ std::string service = getObjectType.begin()->first; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const std::variant<BiosBaseTableType>& ++ retBiosTable) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "getBiosAttributeRegistry DBUS error: " ++ << ec; ++ messages::resourceNotFound( ++ asyncResp->res, "Registries/Bios", "Bios"); ++ return; ++ } ++ const BiosBaseTableType* baseBiosTable = ++ std::get_if<BiosBaseTableType>(&retBiosTable); ++ nlohmann::json& attributeArray = ++ asyncResp->res ++ .jsonValue["RegistryEntries"]["Attributes"]; ++ nlohmann::json optionsArray = ++ nlohmann::json::array(); ++ if (baseBiosTable == nullptr) ++ { ++ BMCWEB_LOG_ERROR << "baseBiosTable == nullptr "; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ for (const BiosBaseTableItemType& item : ++ *baseBiosTable) ++ { ++ const std::string& itemType = ++ std::get<biosBaseAttrType>(item.second); ++ std::string attrType = ++ mapAttrTypeToRedfish(itemType); ++ if (attrType == "UNKNOWN") ++ { ++ BMCWEB_LOG_ERROR << "attrType == UNKNOWN"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ nlohmann::json attributeItem; ++ attributeItem["AttributeName"] = item.first; ++ attributeItem["Type"] = attrType; ++ attributeItem["ReadOnly"] = ++ std::get<biosBaseReadonlyStatus>( ++ item.second); ++ attributeItem["DisplayName"] = ++ std::get<biosBaseDisplayName>(item.second); ++ attributeItem["HelpText"] = ++ std::get<biosBaseDescription>(item.second); ++ attributeItem["MenuPath"] = ++ std::get<biosBaseMenuPath>(item.second); ++ ++ if (attrType == "String") ++ { ++ const std::string* currValue = ++ std::get_if<std::string>( ++ &std::get<biosBaseCurrValue>( ++ item.second)); ++ const std::string* defValue = ++ std::get_if<std::string>( ++ &std::get<biosBaseDefaultValue>( ++ item.second)); ++ attributeItem["CurrentValue"] = ++ currValue != nullptr ? *currValue : ""; ++ attributeItem["DefaultValue"] = ++ defValue != nullptr ? *defValue : ""; ++ } ++ else if (attrType == "Integer") ++ { ++ const int64_t* currValue = ++ std::get_if<int64_t>( ++ &std::get<biosBaseCurrValue>( ++ item.second)); ++ const int64_t* defValue = ++ std::get_if<int64_t>( ++ &std::get<biosBaseDefaultValue>( ++ item.second)); ++ attributeItem["CurrentValue"] = ++ currValue != nullptr ? *currValue : 0; ++ attributeItem["DefaultValue"] = ++ defValue != nullptr ? *defValue : 0; ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR ++ << "Unsupported attribute type."; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ const std::vector<OptionsItemType>& ++ optionsVector = ++ std::get<biosBaseOptions>(item.second); ++ for (const OptionsItemType& optItem : ++ optionsVector) ++ { ++ nlohmann::json optItemJson; ++ const std::string& strOptItemType = ++ std::get<optItemType>(optItem); ++ std::string optItemTypeRedfish = ++ mapBoundTypeToRedfish(strOptItemType); ++ if (optItemTypeRedfish == "UNKNOWN") ++ { ++ BMCWEB_LOG_ERROR ++ << "optItemTypeRedfish == UNKNOWN"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ if (optItemTypeRedfish == "OneOf") ++ { ++ const std::string* currValue = ++ std::get_if<std::string>( ++ &std::get<optItemValue>( ++ optItem)); ++ optItemJson[optItemTypeRedfish] = ++ currValue != nullptr ? *currValue ++ : ""; ++ } ++ else ++ { ++ const int64_t* currValue = ++ std::get_if<int64_t>( ++ &std::get<optItemValue>( ++ optItem)); ++ optItemJson[optItemTypeRedfish] = ++ currValue != nullptr ? *currValue ++ : 0; ++ } ++ ++ optionsArray.push_back(optItemJson); ++ } ++ ++ attributeItem["Value"] = optionsArray; ++ attributeArray.push_back(attributeItem); ++ } ++ }, ++ service, "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.BIOSConfig.Manager", ++ "BaseBIOSTable"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/bios_config/manager", ++ std::array<const char*, 0>()); ++ }); ++} ++ + /** + * BiosReset class supports handle POST method for Reset bios. + * The class retrieves and sends data directly to D-Bus. +diff --git a/redfish-core/lib/message_registries.hpp b/redfish-core/lib/message_registries.hpp +index 43359e3..b2fb43c 100644 +--- a/redfish-core/lib/message_registries.hpp ++++ b/redfish-core/lib/message_registries.hpp +@@ -17,6 +17,7 @@ + + #include "registries.hpp" + #include "registries/base_message_registry.hpp" ++#include "registries/bios_registry.hpp" + #include "registries/openbmc_message_registry.hpp" + #include "registries/resource_event_message_registry.hpp" + #include "registries/task_event_message_registry.hpp" +@@ -125,7 +126,6 @@ inline void requestRoutesMessageRegistryFile(App& app) + inline void handleMessageRegistryGet( + const crow::Request&, const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + const std::string& registry, const std::string& registryMatch) +- + { + const message_registries::Header* header; + std::vector<const message_registries::MessageEntry*> registryEntries; +@@ -165,6 +165,15 @@ inline void handleMessageRegistryGet( + registryEntries.emplace_back(&entry); + } + } ++ else if (registry == "BiosAttributeRegistry") ++ { ++ header = &message_registries::bios::header; ++ for (const message_registries::MessageEntry& entry : ++ message_registries::bios::registry) ++ { ++ registryEntries.emplace_back(&entry); ++ } ++ } + else + { + messages::resourceNotFound( +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0002-BaseBiosTable-Add-support-for-PATCH-operation.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0002-BaseBiosTable-Add-support-for-PATCH-operation.patch new file mode 100644 index 000000000..099e6ddf5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0002-BaseBiosTable-Add-support-for-PATCH-operation.patch @@ -0,0 +1,148 @@ +From ffa924ef204930a5bb442bf654eac02543acfb8f Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Wed, 30 Jun 2021 15:18:46 +0000 +Subject: [PATCH 2/5] BaseBiosTable: Add support for PATCH operation + +This commit brings in support for PATCH operation of the +bios variables that updates the BaseBiosTable. + +Tested-By: +* Passed Redfish validator + +* Single Attribute: +PATCH https://${bmc}/redfish/v1/Systems/system/Bios/Settings -d +'{"data":[{"AttributeName": <attribute name>, "AttributeType": +<attribute type>, "AttributeValue": <attribute value>}]}' + +* Multiple Attributes: +PATCH https://${bmc}/redfish/v1/Systems/system/Bios/Settings -d +'{"data":[{"AttributeName": <attribute name>, "AttributeType": +<attribute type>, "AttributeValue": <attribute value>}, +{"AttributeName": <attribute name>, "AttributeType": +<attribute type>, "AttributeValue": <attribute value>}]}' + +This makes use of the "Set" of "PendingAttributes" in the +backend and that updates the BaseBiosTable. + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Change-Id: I12e78e5ac623c264c7a3e1dd5198aca67172736d +--- + redfish-core/lib/bios.hpp | 95 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 95 insertions(+) + +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index c1a5c56..14d2171 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -96,6 +96,29 @@ static std::string mapAttrTypeToRedfish(const std::string_view typeDbus) + + return ret; + } ++static std::string mapRedfishToAttrType(const std::string_view type) ++{ ++ std::string ret; ++ if (type == "string") ++ { ++ ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType.String"; ++ } ++ else if (type == "int") ++ { ++ ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType.Integer"; ++ } ++ else if (type == "enum") ++ { ++ ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType." ++ "Enumeration"; ++ } ++ else ++ { ++ ret = "UNKNOWN"; ++ } ++ ++ return ret; ++} + static std::string mapBoundTypeToRedfish(const std::string_view typeDbus) + { + std::string ret; +@@ -370,6 +393,78 @@ inline void requestRoutesBiosSettings(App& app) + "/xyz/openbmc_project/bios_config/manager", + std::array<const char*, 0>()); + }); ++ ++ BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/Settings") ++ .privileges({{"ConfigureComponents"}}) ++ .methods(boost::beast::http::verb::patch)( ++ [](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ nlohmann::json inpJson; ++ ++ if (!redfish::json_util::readJson(req, asyncResp->res, "data", ++ inpJson)) ++ { ++ return; ++ } ++ ++ for (auto& attrInfo : inpJson) ++ { ++ std::optional<std::string> attrName; ++ std::optional<std::string> attrType; ++ std::optional<std::string> attrValue; ++ if (!json_util::getValueFromJsonObject( ++ attrInfo, "AttributeName", attrName)) ++ { ++ messages::propertyMissing(asyncResp->res, ++ "AttributeName"); ++ return; ++ } ++ if (!json_util::getValueFromJsonObject( ++ attrInfo, "AttributeType", attrType)) ++ { ++ messages::propertyMissing(asyncResp->res, ++ "AttributeType"); ++ return; ++ } ++ if (!json_util::getValueFromJsonObject( ++ attrInfo, "AttributeValue", attrValue)) ++ { ++ messages::propertyMissing(asyncResp->res, ++ "AttributeValue"); ++ return; ++ } ++ std::string biosAttrType = mapRedfishToAttrType(*attrType); ++ ++ if (biosAttrType == "UNKNOWN") ++ { ++ BMCWEB_LOG_ERROR << "Invalid attribute type"; ++ messages::propertyValueNotInList( ++ asyncResp->res, "AttributeType", *attrType); ++ return; ++ } ++ ++ PendingAttributesType pendingAttributes; ++ pendingAttributes.emplace_back(std::make_pair( ++ *attrName, std::make_tuple(biosAttrType, *attrValue))); ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "doPatch resp_handler got error " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ }, ++ "xyz.openbmc_project.BIOSConfigManager", ++ "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Set", ++ "xyz.openbmc_project.BIOSConfig.Manager", ++ "PendingAttributes", ++ std::variant<PendingAttributesType>(pendingAttributes)); ++ } ++ }); + } + /** + * BiosAttributeRegistry class supports handle get method for BIOS attribute +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0003-Add-support-to-ResetBios-action.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0003-Add-support-to-ResetBios-action.patch new file mode 100644 index 000000000..5ed92cc3e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0003-Add-support-to-ResetBios-action.patch @@ -0,0 +1,53 @@ +From b7adca60dd69ac9566dc8f417065e244198fc711 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 6 Oct 2021 22:27:20 +0000 +Subject: [PATCH] Add support to ResetBios action + +Tested: + +Bios reset flag can be modified throw redfish +POST https://IP_ADDR/redfish/v1/Systems/system/Bios/Actions/Bios.ResetBios + +Change-Id: Ic719c55705e5f634539b3dd858b60922e505a8d0 +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + redfish-core/lib/bios.hpp | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index f5aa7b7..f613613 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -648,17 +648,23 @@ inline void + handleBiosResetPost(const crow::Request&, + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) + { ++ std::string resetFlag = ++ "xyz.openbmc_project.BIOSConfig.Manager.ResetFlag.FactoryDefaults"; ++ + crow::connections::systemBus->async_method_call( + [asyncResp](const boost::system::error_code ec) { + if (ec) + { +- BMCWEB_LOG_ERROR << "Failed to reset bios: " << ec; ++ BMCWEB_LOG_ERROR << "doPost bios reset got error " << ec; + messages::internalError(asyncResp->res); + return; + } + }, +- "org.open_power.Software.Host.Updater", "/xyz/openbmc_project/software", +- "xyz.openbmc_project.Common.FactoryReset", "Reset"); ++ "xyz.openbmc_project.BIOSConfigManager", ++ "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Set", ++ "xyz.openbmc_project.BIOSConfig.Manager", "ResetBIOSSettings", ++ std::variant<std::string>(resetFlag)); + } + + inline void requestRoutesBiosReset(App& app) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0004-Add-support-to-ChangePassword-action.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0004-Add-support-to-ChangePassword-action.patch new file mode 100644 index 000000000..4bfca3006 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0004-Add-support-to-ChangePassword-action.patch @@ -0,0 +1,117 @@ +From 22956921a228f6f1cbbbd3045a3cc3969732dca3 Mon Sep 17 00:00:00 2001 +From: Arun Lal K M <arun.lal@intel.com> +Date: Fri, 8 Oct 2021 20:56:00 +0000 +Subject: [PATCH] Add support to ChangePassword action + +Tested: + +Passed Redfish validator. +Bios change password: +root@intel-obmc:~# cat /var/lib/bios-settings-manager/seedData +{ +"UserPwdHash": "08D91157785366CDC3AA64D87E5E3C621EDAB13E26B6E484397EBA5E459E54C567BF5B1FFB36A43B6142B18F8D642E9D", +"AdminPwdHash": "08D91157785366CDC3AA64D87E5E3C621EDAB13E26B6E484397EBA5E459E54C567BF5B1FFB36A43B6142B18F8D642E9D", +"Seed": "123456", +"HashAlgo": "SHA384" +} +POST https://IP_ADDR/redfish/v1/Systems/system/Bios/Actions/Bios.ChangePassword +{ + "NewPassword": "12345678", + "OldPassword": "1234567890", + "PasswordName": "Administrator" +} +root@intel-obmc:~# cat /var/lib/bios-settings-manager/passwordData +{ + "CurrentPassword": "1234567890", + "IsAdminPwdChanged": 1, + "IsUserPwdChanged": 0, + "NewPassword": "2DD65D57EB60B1D92C5F3D2DC84724FCEE7BC02E57AA75E834712266ED94CAC704047B2FF7CEC1C36BED280B36BB5AC6", + "UserName": "Administrator" +} + +Signed-off-by: Arun Lal K M <arun.lal@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + redfish-core/lib/bios.hpp | 59 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 59 insertions(+) + +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index f613613..b06a904 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -175,6 +175,10 @@ inline void + asyncResp->res.jsonValue["Actions"]["#Bios.ResetBios"] = { + {"target", "/redfish/v1/Systems/system/Bios/Actions/Bios.ResetBios"}}; + ++ asyncResp->res.jsonValue["Actions"]["#Bios.ChangePassword"] = { ++ {"target", "/redfish/v1/Systems/system/Bios/Actions/" ++ "Bios.ChangePassword"}}; ++ + // Get the ActiveSoftwareImage and SoftwareImages + fw_util::populateFirmwareInformation(asyncResp, fw_util::biosPurpose, "", + true); +@@ -265,6 +269,61 @@ inline void requestRoutesBiosService(App& app) + .methods(boost::beast::http::verb::get)(handleBiosServiceGet); + } + ++/** ++ * BiosChangePassword class supports handle POST method for change bios ++ * password. The class retrieves and sends data directly to D-Bus. ++ */ ++inline void requestRoutesBiosChangePassword(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/") ++ .privileges({{"ConfigureComponents"}}) ++ .methods(boost::beast::http::verb::post)( ++ [](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ std::string currentPassword, newPassword, userName; ++ if (!json_util::readJson(req, asyncResp->res, "NewPassword", ++ newPassword, "OldPassword", ++ currentPassword, "PasswordName", ++ userName)) ++ { ++ return; ++ } ++ if (currentPassword.empty()) ++ { ++ messages::actionParameterUnknown( ++ asyncResp->res, "ChangePassword", "OldPassword"); ++ return; ++ } ++ if (newPassword.empty()) ++ { ++ messages::actionParameterUnknown( ++ asyncResp->res, "ChangePassword", "NewPassword"); ++ return; ++ } ++ if (userName.empty()) ++ { ++ messages::actionParameterUnknown( ++ asyncResp->res, "ChangePassword", "PasswordName"); ++ return; ++ } ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_CRITICAL ++ << "Failed in doPost(BiosChangePassword) " ++ << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ }, ++ "xyz.openbmc_project.BIOSConfigPassword", ++ "/xyz/openbmc_project/bios_config/password", ++ "xyz.openbmc_project.BIOSConfig.Password", "ChangePassword", ++ userName, currentPassword, newPassword); ++ }); ++} ++ + /** + * BiosSettings class supports handle GET/PATCH method for + * BIOS configuration pending settings. +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0005-Fix-remove-bios-user-pwd-change-option-via-Redfish.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0005-Fix-remove-bios-user-pwd-change-option-via-Redfish.patch new file mode 100644 index 000000000..26393bfee --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0005-Fix-remove-bios-user-pwd-change-option-via-Redfish.patch @@ -0,0 +1,46 @@ +From edc6925e8c0d9f60da1f70c524261efaf05b2710 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Wed, 30 Jun 2021 15:42:06 +0000 +Subject: [PATCH 5/5] Fix:remove bios user pwd change option via Redfish + +BMC should not provide user bios setup password change option via +Redfish as per bios security requirements. Only Admin BIOS setup +password is supported. + +Added check for the password name action parameter and +do not allow if it has User Password value from redfish side. + +Tested: sent POST query in redfish on URI: +https://<ip>/redfish/v1/Systems/system/Bios/Actions/Bios.ChangePassword +error occurs for UserPassword parameter and allows for AdminPassword. + +Signed-off-by: Ayushi Smriti <smriti.ayushi@intel.com> +Change-Id: I169cc6a4f786625d9e8b8dfe56816d52b1740f4c +--- + redfish-core/lib/bios.hpp | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index 0250c59..360a749 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -323,6 +323,16 @@ inline void requestRoutesBiosChangePassword(App& app) + asyncResp->res, "ChangePassword", "PasswordName"); + return; + } ++ ++ // In Intel BIOS, we are not supporting user password in BIOS ++ // setup ++ if (userName == "UserPassword") ++ { ++ messages::actionParameterUnknown( ++ asyncResp->res, "ChangePassword", "PasswordName"); ++ return; ++ } ++ + crow::connections::systemBus->async_method_call( + [asyncResp](const boost::system::error_code ec) { + if (ec) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0006-Add-fix-for-broken-feature-Pending-Attributes.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0006-Add-fix-for-broken-feature-Pending-Attributes.patch new file mode 100644 index 000000000..2e72a639d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/biosconfig/0006-Add-fix-for-broken-feature-Pending-Attributes.patch @@ -0,0 +1,928 @@ +From f75beb0472a42d5af512661470aadf12ac460470 Mon Sep 17 00:00:00 2001 +From: Arun Lal K M <arun.lal@intel.com> +Date: Fri, 8 Oct 2021 21:30:33 +0000 +Subject: [PATCH] Add fix for broken feature 'Pending Attributes'. + +Fix is added for the following: +1) GET to 'redfish/v1/Systems/system/Bios'. +2) PATCH to 'redfish/v1/Systems/system/Bios/Settings'. +3) GET to 'redfish/v1/Systems/system/Bios/Settings'. +4) Fix for incremental duplicate values in BiosAttributeRegistry. +5) POST to '/redfish/v1/Systems/system/Bios/Actions + /Bios.ChangePassword/'. + +Tested: +By giving PATCH to 'redfish/v1/Systems/system/Bios/Settings' +PATCH command raw data: +{ + "data":{ + "AmpPrefetchEnable": "0x1", + "Ce2LmLoggingEn": "0x1", + "DfxEadrDebugLogs": "0x2", + "PsfUrEnable": "0x1", + "ATS": "0x0" + } +} + +Response: +{ + "@Message.ExtendedInfo": [ + { + "@odata.type": "#Message.v1_1_1.Message", + "Message": "Successfully Completed Request", + "MessageArgs": [], + "MessageId": "Base.1.8.1.Success", + "MessageSeverity": "OK", + "Resolution": "None" + } + ] +} + +By giving GET to 'redfish/v1/Systems/system/Bios' +Response: +{ + "@Redfish.Settings": { + "@odata.type": "#Settings.v1_3_0.Settings", + "SettingsObject": { + "@odata.id": + "/redfish/v1/Systems/system/Bios/Settings" + } + }, + "@odata.id": "/redfish/v1/Systems/system/Bios", + "@odata.type": "#Bios.v1_1_0.Bios", + "Actions": { + "#Bios.ChangePassword": { + "target": + "/redfish/v1/Systems/system/Bios/Actions/Bios.ChangePassword" + }, + "#Bios.ResetBios": { + "target": + "/redfish/v1/Systems/system/Bios/Actions/Bios.ResetBios" + } + }, + "AttributeRegistry": "BiosAttributeRegistry", + "Attributes": { + "AEPErrorInjEn": "0x00", + "ARIEnable": "0x01", + "ARIForward": "0x00", + ... + ... + ... + "txEqCalibration": "0x01", + "volMemMode": "0x00", + "wrVrefCenter": "0x01" + }, + "Description": "BIOS Configuration Service", + "Id": "BIOS", + "Links": { + "ActiveSoftwareImage": { + "@odata.id": + "/redfish/v1/UpdateService/FirmwareInventory/bios_active" + }, + "SoftwareImages": [ + { + "@odata.id": + "/redfish/v1/UpdateService/FirmwareInventory/bios_active" + } + ], + "SoftwareImages@odata.count": 1 + }, + "Name": "BIOS Configuration" +} + +By giving GET to 'redfish/v1/Systems/system/Bios/Settings' +Response: +{ + "@odata.id": "/redfish/v1/Systems/system/Bios/Settings", + "@odata.type": "#Bios.v1_1_0.Bios", + "AttributeRegistry": "BiosAttributeRegistry", + "Attributes": { + "ATS": "0x0", + "AmpPrefetchEnable": "0x1", + "Ce2LmLoggingEn": "0x1", + "DfxEadrDebugLogs": "0x2", + "PsfUrEnable": "0x1" + }, + "Id": "BiosSettingsV1", + "Name": "Bios Settings Version 1" +} + +By giving POST to '/redfish/v1/Systems/system/Bios/Actions +/Bios.ChangePassword/' +Response: Success + +By running Redfish-Service-Validator +Result: +Elapsed time: 0:09:36 +invalidPropertyValue: 108 +metadataNamespaces: 2185 +missingNamespaces: 1 +optionalAction: 9 +pass: 13772 +passAction: 22 +passGet: 541 +reflink: 1 +repeat: 47 +serviceNamespaces: 75 +skipOptional: 9276 +unverifiedComplexAdditional: 1 +warnDeprecated: 230 +warningPresent: 54 +Validation has succeeded. + +Signed-off-by: Arun Lal K M <arun.lal@intel.com> +Signed-off-by: Snehalatha Venkatesh <snehalathax.v@intel.com> +--- + redfish-core/lib/bios.hpp | 586 ++++++++++++++++++++++++-------------- + 1 file changed, 376 insertions(+), 210 deletions(-) + +diff --git a/redfish-core/lib/bios.hpp b/redfish-core/lib/bios.hpp +index 0bb0b9e..de79be2 100644 +--- a/redfish-core/lib/bios.hpp ++++ b/redfish-core/lib/bios.hpp +@@ -12,13 +12,15 @@ map{attributeName,struct{attributeType,readonlyStatus,displayname, + description,menuPath,current,default, + array{struct{optionstring,optionvalue}}}} + */ +-using BiosBaseTableType = std::vector<std::pair< ++ ++using BiosBaseTableType = boost::container::flat_map< + std::string, + std::tuple< + std::string, bool, std::string, std::string, std::string, + std::variant<int64_t, std::string>, std::variant<int64_t, std::string>, + std::vector< +- std::tuple<std::string, std::variant<int64_t, std::string>>>>>>; ++ std::tuple<std::string, std::variant<int64_t, std::string>>>>>; ++ + using BiosBaseTableItemType = std::pair< + std::string, + std::tuple< +@@ -29,6 +31,13 @@ using BiosBaseTableItemType = std::pair< + using OptionsItemType = + std::tuple<std::string, std::variant<int64_t, std::string>>; + ++using PendingAttributesType = boost::container::flat_map< ++ std::string, std::tuple<std::string, std::variant<int64_t, std::string>>>; ++ ++using PendingAttributesItemType = ++ std::pair<std::string, ++ std::tuple<std::string, std::variant<int64_t, std::string>>>; ++ + enum BiosBaseTableIndex + { + biosBaseAttrType = 0, +@@ -45,17 +54,7 @@ enum OptionsItemIndex + optItemType = 0, + optItemValue + }; +-/* +- The Pending attribute name and new value. +- ex- { {"QuietBoot",Type.Integer, 0x1}, +- { "DdrFreqLimit",Type.String,"2933"} +- } +-*/ +-using PendingAttributesType = std::vector<std::pair< +- std::string, std::tuple<std::string, std::variant<int64_t, std::string>>>>; +-using PendingAttributesItemType = +- std::pair<std::string, +- std::tuple<std::string, std::variant<int64_t, std::string>>>; ++ + enum PendingAttributesIndex + { + pendingAttrType = 0, +@@ -64,31 +63,16 @@ enum PendingAttributesIndex + static std::string mapAttrTypeToRedfish(const std::string_view typeDbus) + { + std::string ret; +- if (typeDbus == "xyz.openbmc_project.BIOSConfig.Manager." +- "AttributeType.Enumeration") +- { +- ret = "Enumeration"; +- } +- else if (typeDbus == "xyz.openbmc_project.BIOSConfig." +- "Manager.AttributeType.String") ++ if (typeDbus == "xyz.openbmc_project.BIOSConfig." ++ "Manager.AttributeType.String") + { + ret = "String"; + } +- else if (typeDbus == "xyz.openbmc_project.BIOSConfig." +- "Manager.AttributeType.Password") +- { +- ret = "Password"; +- } + else if (typeDbus == "xyz.openbmc_project.BIOSConfig." + "Manager.AttributeType.Integer") + { + ret = "Integer"; + } +- else if (typeDbus == "xyz.openbmc_project.BIOSConfig." +- "Manager.AttributeType.Boolean") +- { +- ret = "Boolean"; +- } + else + { + ret = "UNKNOWN"; +@@ -96,29 +80,7 @@ static std::string mapAttrTypeToRedfish(const std::string_view typeDbus) + + return ret; + } +-static std::string mapRedfishToAttrType(const std::string_view type) +-{ +- std::string ret; +- if (type == "string") +- { +- ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType.String"; +- } +- else if (type == "int") +- { +- ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType.Integer"; +- } +- else if (type == "enum") +- { +- ret = "xyz.openbmc_project.BIOSConfig.Manager.AttributeType." +- "Enumeration"; +- } +- else +- { +- ret = "UNKNOWN"; +- } + +- return ret; +-} + static std::string mapBoundTypeToRedfish(const std::string_view typeDbus) + { + std::string ret; +@@ -201,6 +163,15 @@ inline void + + return; + } ++ ++ if (getObjectType.empty()) ++ { ++ BMCWEB_LOG_ERROR << "getObjectType is empty."; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ + const std::string& service = getObjectType.begin()->first; + + crow::connections::systemBus->async_method_call( +@@ -220,7 +191,7 @@ inline void + asyncResp->res.jsonValue["Attributes"]; + if (baseBiosTable == nullptr) + { +- BMCWEB_LOG_ERROR << "baseBiosTable == nullptr "; ++ BMCWEB_LOG_ERROR << "baseBiosTable is empty"; + messages::internalError(asyncResp->res); + return; + } +@@ -248,7 +219,6 @@ inline void + else + { + BMCWEB_LOG_ERROR << "Unsupported attribute type."; +- messages::internalError(asyncResp->res); + } + } + }, +@@ -275,8 +245,9 @@ inline void requestRoutesBiosService(App& app) + */ + inline void requestRoutesBiosChangePassword(App& app) + { +- BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/") +- .privileges({{"ConfigureComponents"}}) ++ BMCWEB_ROUTE(app, ++ "/redfish/v1/Systems/system/Bios/Actions/Bios.ChangePassword/") ++ .privileges(redfish::privileges::postBios) + .methods(boost::beast::http::verb::post)( + [](const crow::Request& req, + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { +@@ -342,180 +313,298 @@ inline void requestRoutesBiosSettings(App& app) + { + BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/Settings") + .privileges(redfish::privileges::getBios) +- .methods(boost::beast::http::verb::get)( +- [](const crow::Request&, +- const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { +- asyncResp->res.jsonValue["@odata.id"] = +- asyncResp->res.jsonValue["@odata.id"] = +- "/redfish/v1/Systems/system/Bios/Settings"; +- asyncResp->res.jsonValue["@odata.type"] = "#Bios.v1_1_0.Bios"; +- asyncResp->res.jsonValue["Name"] = "Bios Settings Version 1"; +- asyncResp->res.jsonValue["Id"] = "BiosSettingsV1"; +- asyncResp->res.jsonValue["AttributeRegistry"] = +- "BiosAttributeRegistry"; +- asyncResp->res.jsonValue["Attributes"] = {}; ++ .methods( ++ boost::beast::http::verb:: ++ get)([](const crow::Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/Systems/system/Bios/Settings"; ++ asyncResp->res.jsonValue["@odata.type"] = "#Bios.v1_1_0.Bios"; ++ asyncResp->res.jsonValue["Name"] = "Bios Settings Version 1"; ++ asyncResp->res.jsonValue["Id"] = "BiosSettingsV1"; ++ asyncResp->res.jsonValue["AttributeRegistry"] = ++ "BiosAttributeRegistry"; ++ asyncResp->res.jsonValue["Attributes"] = {}; + +- crow::connections::systemBus->async_method_call( +- [asyncResp](const boost::system::error_code ec, +- const GetObjectType& getObjectType) { +- if (ec) +- { +- BMCWEB_LOG_ERROR +- << "ObjectMapper::GetObject call failed: " +- << ec; +- messages::internalError(asyncResp->res); ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "ObjectMapper::GetObject call failed: " << ec; ++ messages::internalError(asyncResp->res); + +- return; +- } +- std::string service = getObjectType.begin()->first; +- +- crow::connections::systemBus->async_method_call( +- [asyncResp]( +- const boost::system::error_code ec, +- const std::variant<PendingAttributesType>& +- retPendingAttributes) { +- if (ec) +- { +- BMCWEB_LOG_ERROR +- << "getBiosSettings DBUS error: " << ec; +- messages::resourceNotFound( +- asyncResp->res, "Systems/system/Bios", +- "Settings"); +- return; +- } +- const PendingAttributesType* pendingAttributes = +- std::get_if<PendingAttributesType>( +- &retPendingAttributes); +- nlohmann::json& attributesJson = +- asyncResp->res.jsonValue["Attributes"]; +- if (pendingAttributes == nullptr) +- { +- BMCWEB_LOG_ERROR +- << "pendingAttributes == nullptr "; +- messages::internalError(asyncResp->res); +- return; +- } +- for (const PendingAttributesItemType& item : +- *pendingAttributes) ++ return; ++ } ++ ++ if (getObjectType.empty()) ++ { ++ BMCWEB_LOG_ERROR << "getObjectType is empty."; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ ++ std::string service = getObjectType.begin()->first; ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp](const boost::system::error_code ec, ++ const std::variant<PendingAttributesType>& ++ retPendingAttributes) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "getBiosSettings DBUS error: " << ec; ++ messages::resourceNotFound( ++ asyncResp->res, "Systems/system/Bios", ++ "Settings"); ++ return; ++ } ++ ++ const PendingAttributesType* pendingAttributes = ++ std::get_if<PendingAttributesType>( ++ &retPendingAttributes); ++ nlohmann::json& attributesJson = ++ asyncResp->res.jsonValue["Attributes"]; ++ if (pendingAttributes == nullptr) ++ { ++ BMCWEB_LOG_ERROR ++ << "pendingAttributes is empty"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ for (const PendingAttributesItemType& ++ pendingAttributesItem : *pendingAttributes) ++ { ++ const std::string& biosAttrType = ++ std::get<pendingAttrType>( ++ pendingAttributesItem.second); ++ ++ std::string itemType = ++ mapAttrTypeToRedfish(biosAttrType); ++ ++ if (itemType == "String") + { +- const std::string& key = item.first; +- const std::string& itemType = +- std::get<pendingAttrType>(item.second); +- std::string attrType = +- mapAttrTypeToRedfish(itemType); +- if (attrType == "String") +- { +- const std::string* currValue = +- std::get_if<std::string>( +- &std::get<pendingAttrValue>( +- item.second)); +- attributesJson.emplace( +- key, currValue != nullptr +- ? *currValue +- : ""); +- } +- else if (attrType == "Integer") ++ const std::string* currValue = ++ std::get_if<std::string>( ++ &std::get<pendingAttrValue>( ++ pendingAttributesItem.second)); ++ ++ if (!currValue) + { +- const int64_t* currValue = +- std::get_if<int64_t>( +- &std::get<pendingAttrValue>( +- item.second)); +- attributesJson.emplace( +- key, currValue != nullptr +- ? *currValue +- : 0); ++ BMCWEB_LOG_ERROR ++ << "No string data in pending " ++ "attributes item data"; ++ messages::internalError(asyncResp->res); ++ return; + } +- else ++ ++ attributesJson.emplace( ++ pendingAttributesItem.first, ++ *currValue); ++ } ++ else if (itemType == "Integer") ++ { ++ const int64_t* currValue = ++ std::get_if<int64_t>( ++ &std::get<pendingAttrValue>( ++ pendingAttributesItem.second)); ++ ++ if (!currValue) + { + BMCWEB_LOG_ERROR +- << "Unsupported attribute type."; ++ << "No int64_t data in pending " ++ "attributes item data"; + messages::internalError(asyncResp->res); ++ return; + } ++ ++ attributesJson.emplace( ++ pendingAttributesItem.first, ++ *currValue); + } +- }, +- service, "/xyz/openbmc_project/bios_config/manager", +- "org.freedesktop.DBus.Properties", "Get", +- "xyz.openbmc_project.BIOSConfig.Manager", +- "PendingAttributes"); +- }, +- "xyz.openbmc_project.ObjectMapper", +- "/xyz/openbmc_project/object_mapper", +- "xyz.openbmc_project.ObjectMapper", "GetObject", +- "/xyz/openbmc_project/bios_config/manager", +- std::array<const char*, 0>()); +- }); ++ else ++ { ++ BMCWEB_LOG_ERROR ++ << "Unsupported attribute type."; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ } ++ }, ++ service, "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.BIOSConfig.Manager", ++ "PendingAttributes"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/bios_config/manager", ++ std::array<const char*, 0>()); ++ }); + + BMCWEB_ROUTE(app, "/redfish/v1/Systems/system/Bios/Settings") +- .privileges({{"ConfigureComponents"}}) +- .methods(boost::beast::http::verb::patch)( +- [](const crow::Request& req, +- const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { +- nlohmann::json inpJson; ++ .privileges(redfish::privileges::patchBios) ++ .methods( ++ boost::beast::http::verb:: ++ patch)([](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ nlohmann::json inpJson; + +- if (!redfish::json_util::readJson(req, asyncResp->res, "data", +- inpJson)) +- { +- return; +- } ++ if (!redfish::json_util::readJson(req, asyncResp->res, "data", ++ inpJson)) ++ { ++ BMCWEB_LOG_ERROR << "No 'data' in req!"; ++ return; ++ } + +- for (auto& attrInfo : inpJson) +- { +- std::optional<std::string> attrName; +- std::optional<std::string> attrType; +- std::optional<std::string> attrValue; +- if (!json_util::getValueFromJsonObject( +- attrInfo, "AttributeName", attrName)) +- { +- messages::propertyMissing(asyncResp->res, +- "AttributeName"); +- return; +- } +- if (!json_util::getValueFromJsonObject( +- attrInfo, "AttributeType", attrType)) +- { +- messages::propertyMissing(asyncResp->res, +- "AttributeType"); +- return; +- } +- if (!json_util::getValueFromJsonObject( +- attrInfo, "AttributeValue", attrValue)) ++ if (inpJson.empty()) ++ { ++ messages::invalidObject(asyncResp->res, "data"); ++ BMCWEB_LOG_ERROR << "No input in req!"; ++ return; ++ } ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, inpJson](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) + { +- messages::propertyMissing(asyncResp->res, +- "AttributeValue"); ++ BMCWEB_LOG_ERROR ++ << "ObjectMapper::GetObject call failed: " << ec; ++ messages::internalError(asyncResp->res); ++ + return; + } +- std::string biosAttrType = mapRedfishToAttrType(*attrType); + +- if (biosAttrType == "UNKNOWN") ++ if (getObjectType.empty()) + { +- BMCWEB_LOG_ERROR << "Invalid attribute type"; +- messages::propertyValueNotInList( +- asyncResp->res, "AttributeType", *attrType); ++ BMCWEB_LOG_ERROR << "getObjectType is empty."; ++ messages::internalError(asyncResp->res); ++ + return; + } + +- PendingAttributesType pendingAttributes; +- pendingAttributes.emplace_back(std::make_pair( +- *attrName, std::make_tuple(biosAttrType, *attrValue))); ++ std::string service = getObjectType.begin()->first; + + crow::connections::systemBus->async_method_call( +- [asyncResp](const boost::system::error_code ec) { ++ [asyncResp, ++ inpJson](const boost::system::error_code ec, ++ const std::variant<BiosBaseTableType>& ++ retBiosTable) { + if (ec) + { + BMCWEB_LOG_ERROR +- << "doPatch resp_handler got error " << ec; ++ << "getBiosAttributes DBUS error: " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ const BiosBaseTableType* baseBiosTable = ++ std::get_if<BiosBaseTableType>(&retBiosTable); ++ ++ if (baseBiosTable == nullptr) ++ { ++ BMCWEB_LOG_ERROR << "baseBiosTable is empty."; + messages::internalError(asyncResp->res); + return; + } ++ ++ PendingAttributesType pendingAttributes{}; ++ ++ for (nlohmann::detail::iteration_proxy_value< ++ nlohmann::detail::iter_impl< ++ const nlohmann::basic_json<>>>& ++ attributes : inpJson.items()) ++ { ++ BiosBaseTableType::const_iterator knobIter = ++ baseBiosTable->find(attributes.key()); ++ if (knobIter == baseBiosTable->end()) ++ { ++ BMCWEB_LOG_ERROR << "Cannot find " ++ << attributes.key() ++ << " in baseBiosTable"; ++ messages::propertyValueNotInList( ++ asyncResp->res, attributes.key(), ++ "data"); ++ return; ++ } ++ ++ const std::string& itemType = ++ std::get<biosBaseAttrType>( ++ knobIter->second); ++ std::string attrType = ++ mapAttrTypeToRedfish(itemType); ++ ++ if (attrType == "String") ++ { ++ std::string val = attributes.value(); ++ ++ pendingAttributes.emplace( ++ attributes.key(), ++ std::make_tuple(itemType, val)); ++ } ++ else if (attrType == "Integer") ++ { ++ pendingAttributes.emplace( ++ attributes.key(), ++ std::make_tuple( ++ itemType, static_cast<int64_t>( ++ attributes.value()))); ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "UNKNOWN attrType == " ++ << itemType; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ } ++ ++ if (pendingAttributes.empty()) ++ { ++ BMCWEB_LOG_ERROR ++ << "pendingAttributes is empty."; ++ messages::invalidObject(asyncResp->res, "data"); ++ } ++ ++ crow::connections::systemBus->async_method_call( ++ [asyncResp]( ++ const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR ++ << "doPatch resp_handler got error " ++ << ec << "\n"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ messages::success(asyncResp->res); ++ }, ++ "xyz.openbmc_project.BIOSConfigManager", ++ "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Set", ++ "xyz.openbmc_project.BIOSConfig.Manager", ++ "PendingAttributes", ++ std::variant<PendingAttributesType>( ++ pendingAttributes)); + }, +- "xyz.openbmc_project.BIOSConfigManager", +- "/xyz/openbmc_project/bios_config/manager", +- "org.freedesktop.DBus.Properties", "Set", ++ service, "/xyz/openbmc_project/bios_config/manager", ++ "org.freedesktop.DBus.Properties", "Get", + "xyz.openbmc_project.BIOSConfig.Manager", +- "PendingAttributes", +- std::variant<PendingAttributesType>(pendingAttributes)); +- } +- }); ++ "BaseBIOSTable"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/bios_config/manager", ++ std::array<const char*, 0>()); ++ }); + } + /** + * BiosAttributeRegistry class supports handle get method for BIOS attribute +@@ -555,6 +644,15 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + + return; + } ++ ++ if (getObjectType.empty()) ++ { ++ BMCWEB_LOG_ERROR << "getObjectType is empty."; ++ messages::internalError(asyncResp->res); ++ ++ return; ++ } ++ + std::string service = getObjectType.begin()->first; + + crow::connections::systemBus->async_method_call( +@@ -575,8 +673,6 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + nlohmann::json& attributeArray = + asyncResp->res + .jsonValue["RegistryEntries"]["Attributes"]; +- nlohmann::json optionsArray = +- nlohmann::json::array(); + if (baseBiosTable == nullptr) + { + BMCWEB_LOG_ERROR << "baseBiosTable == nullptr "; +@@ -592,10 +688,11 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + mapAttrTypeToRedfish(itemType); + if (attrType == "UNKNOWN") + { +- BMCWEB_LOG_ERROR << "attrType == UNKNOWN"; +- messages::internalError(asyncResp->res); +- return; ++ BMCWEB_LOG_ERROR << "UNKNOWN attrType == " ++ << itemType; ++ continue; + } ++ + nlohmann::json attributeItem; + attributeItem["AttributeName"] = item.first; + attributeItem["Type"] = attrType; +@@ -615,10 +712,30 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + std::get_if<std::string>( + &std::get<biosBaseCurrValue>( + item.second)); ++ ++ if (!currValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get currValue, no " ++ "std::string data in BIOS " ++ "attributes item data"; ++ continue; ++ } ++ + const std::string* defValue = + std::get_if<std::string>( + &std::get<biosBaseDefaultValue>( + item.second)); ++ ++ if (!defValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get defValue, no " ++ "std::string data in BIOS " ++ "attributes item data"; ++ continue; ++ } ++ + attributeItem["CurrentValue"] = + currValue != nullptr ? *currValue : ""; + attributeItem["DefaultValue"] = +@@ -630,10 +747,30 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + std::get_if<int64_t>( + &std::get<biosBaseCurrValue>( + item.second)); ++ ++ if (!currValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get currValue, no " ++ "int64_t data in BIOS " ++ "attributes item data"; ++ continue; ++ } ++ + const int64_t* defValue = + std::get_if<int64_t>( + &std::get<biosBaseDefaultValue>( + item.second)); ++ ++ if (!defValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get defValue, no " ++ "int64_t data in BIOS " ++ "attributes item data"; ++ continue; ++ } ++ + attributeItem["CurrentValue"] = + currValue != nullptr ? *currValue : 0; + attributeItem["DefaultValue"] = +@@ -641,12 +778,13 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + } + else + { +- BMCWEB_LOG_ERROR +- << "Unsupported attribute type."; +- messages::internalError(asyncResp->res); +- return; ++ BMCWEB_LOG_ERROR << "UNKNOWN attrType == " ++ << itemType; ++ continue; + } + ++ nlohmann::json optionsArray = ++ nlohmann::json::array(); + const std::vector<OptionsItemType>& + optionsVector = + std::get<biosBaseOptions>(item.second); +@@ -661,9 +799,9 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + if (optItemTypeRedfish == "UNKNOWN") + { + BMCWEB_LOG_ERROR +- << "optItemTypeRedfish == UNKNOWN"; +- messages::internalError(asyncResp->res); +- return; ++ << "UNKNOWN optItemTypeRedfish == " ++ << strOptItemType; ++ continue; + } + if (optItemTypeRedfish == "OneOf") + { +@@ -671,6 +809,17 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + std::get_if<std::string>( + &std::get<optItemValue>( + optItem)); ++ ++ if (!currValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get currValue, " ++ "no " ++ "std::string data in option " ++ "item value"; ++ continue; ++ } ++ + optItemJson[optItemTypeRedfish] = + currValue != nullptr ? *currValue + : ""; +@@ -681,6 +830,17 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + std::get_if<int64_t>( + &std::get<optItemValue>( + optItem)); ++ ++ if (!currValue) ++ { ++ BMCWEB_LOG_ERROR ++ << "Unable to get currValue, " ++ "no " ++ "int64_t data in option " ++ "item value"; ++ continue; ++ } ++ + optItemJson[optItemTypeRedfish] = + currValue != nullptr ? *currValue + : 0; +@@ -689,6 +849,12 @@ inline void requestRoutesBiosAttributeRegistry(App& app) + optionsArray.push_back(optItemJson); + } + ++ if (optionsArray.empty()) ++ { ++ BMCWEB_LOG_ERROR << "optionsArray is empty"; ++ continue; ++ } ++ + attributeItem["Value"] = optionsArray; + attributeArray.push_back(attributeItem); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/bmcweb.socket b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/bmcweb.socket new file mode 100644 index 000000000..8782e4dd3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/bmcweb.socket @@ -0,0 +1,9 @@ +[Unit] +Description=BMC Webserver socket + +[Socket] +ListenStream=443 +ReusePort=true + +[Install] +WantedBy=sockets.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0001-Add-unmerged-changes-for-http-retry-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0001-Add-unmerged-changes-for-http-retry-support.patch new file mode 100644 index 000000000..52135e255 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0001-Add-unmerged-changes-for-http-retry-support.patch @@ -0,0 +1,121 @@ +From 6ff897d2b5513f15445f18aae16d8439ed94f377 Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 11 Oct 2021 18:41:27 +0530 +Subject: [PATCH] Add unmerged changes for http retry support + +The http retry support added upstream as a single patch was slpit into +3 patches, but only 2 of them was merged. +This commit pulls in the differentail changes required to complete the +entire http retry support. and also allow for other subsequent patches +to be appplied easily. + +Change-Id: Id8ccd991b7ffc505196b1a92b23e1cd51e00bc89 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/http_client.hpp | 44 +++++++++++-------- + .../include/event_service_manager.hpp | 2 +- + 2 files changed, 27 insertions(+), 19 deletions(-) + +diff --git a/http/http_client.hpp b/http/http_client.hpp +index ab20eb0..aad1cce 100644 +--- a/http/http_client.hpp ++++ b/http/http_client.hpp +@@ -68,7 +68,6 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + std::optional< + boost::beast::http::response_parser<boost::beast::http::string_body>> + parser; +- std::vector<std::pair<std::string, std::string>> headers; + boost::circular_buffer_space_optimized<std::string> requestDataQueue{}; + + ConnState state; +@@ -137,18 +136,6 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + + BMCWEB_LOG_DEBUG << __FUNCTION__ << "(): " << host << ":" << port; + +- req.version(static_cast<int>(11)); // HTTP 1.1 +- req.target(uri); +- req.method(boost::beast::http::verb::post); +- +- // Set headers +- for (const auto& [key, value] : headers) +- { +- req.set(key, value); +- } +- req.set(boost::beast::http::field::host, host); +- req.keep_alive(true); +- + req.body() = data; + req.prepare_payload(); + +@@ -204,6 +191,17 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + BMCWEB_LOG_DEBUG << "recvMessage() data: " + << self->parser->get(); + ++ // Check if the response and header are received ++ if (!self->parser->is_done()) ++ { ++ // The parser failed to receive the response ++ BMCWEB_LOG_ERROR ++ << "recvMessage() parser failed to receive response"; ++ self->state = ConnState::recvFailed; ++ self->handleConnState(); ++ return; ++ } ++ + unsigned int respCode = self->parser->get().result_int(); + BMCWEB_LOG_DEBUG << "recvMessage() Header Response Code: " + << respCode; +@@ -398,11 +396,17 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + const std::string& destIP, const std::string& destPort, + const std::string& destUri) : + conn(ioc), +- timer(ioc), subId(id), host(destIP), port(destPort), uri(destUri), +- retryCount(0), maxRetryAttempts(5), retryIntervalSecs(0), ++ timer(ioc), req(boost::beast::http::verb::post, destUri, 11), ++ state(ConnState::initialized), subId(id), host(destIP), port(destPort), ++ uri(destUri), retryCount(0), maxRetryAttempts(5), retryIntervalSecs(0), + retryPolicyAction("TerminateAfterRetries"), runningTimer(false) + { +- state = ConnState::initialized; ++ // Set the request header ++ req.set(boost::beast::http::field::host, host); ++ req.set(boost::beast::http::field::content_type, "application/json"); ++ req.keep_alive(true); ++ ++ requestDataQueue.set_capacity(maxRequestQueueSize); + } + + void sendData(const std::string& data) +@@ -425,10 +429,14 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + return; + } + +- void setHeaders( ++ void addHeaders( + const std::vector<std::pair<std::string, std::string>>& httpHeaders) + { +- headers = httpHeaders; ++ // Set custom headers ++ for (const auto& [key, value] : httpHeaders) ++ { ++ req.set(key, value); ++ } + } + + void setRetryConfig(const uint32_t retryAttempts, +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 8042803..0a63b8c 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -412,7 +412,7 @@ class Subscription : public persistent_data::UserSubscription + reqHeaders.emplace_back(std::pair(key, val)); + } + } +- conn->setHeaders(reqHeaders); ++ conn->addHeaders(reqHeaders); + conn->sendData(msg); + this->eventSeqNum++; + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0002-EventService-https-client-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0002-EventService-https-client-support.patch new file mode 100644 index 000000000..aeeafc421 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0002-EventService-https-client-support.patch @@ -0,0 +1,453 @@ +From 3f2ad28e6e124249cde3df50c9e18c283fbcbf3e Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Mon, 22 Feb 2021 17:07:47 +0000 +Subject: [PATCH] EventService: https client support + +Add https client support for push style eventing. Using this BMC can +push the event logs/telemetry data to event listener over secure http +channel. + +Tested: + - Created subscription with https destination url. Using + SubmitTestEvent action set the event and can see event on event + listener. + - Validator passed. + +Change-Id: I44c3918b39baa2eb5fddda9d635f99aa280a422a +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +--- + http/http_client.hpp | 307 ++++++++++++------ + .../include/event_service_manager.hpp | 2 +- + 2 files changed, 202 insertions(+), 107 deletions(-) + +diff --git a/http/http_client.hpp b/http/http_client.hpp +index aad1cce..5e7ff47 100644 +--- a/http/http_client.hpp ++++ b/http/http_client.hpp +@@ -20,6 +20,7 @@ + #include <boost/beast/core/flat_buffer.hpp> + #include <boost/beast/core/tcp_stream.hpp> + #include <boost/beast/http/message.hpp> ++#include <boost/beast/ssl/ssl_stream.hpp> + #include <boost/beast/version.hpp> + #include <include/async_resolve.hpp> + +@@ -43,6 +44,8 @@ enum class ConnState + resolveFailed, + connectInProgress, + connectFailed, ++ handshakeInProgress, ++ handshakeFailed, + connected, + sendInProgress, + sendFailed, +@@ -61,7 +64,9 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + { + private: + crow::async_resolve::Resolver resolver; ++ boost::asio::ssl::context ctx{boost::asio::ssl::context::tlsv12_client}; + boost::beast::tcp_stream conn; ++ std::optional<boost::beast::ssl_stream<boost::beast::tcp_stream&>> sslConn; + boost::asio::steady_timer timer; + boost::beast::flat_static_buffer<httpReadBodyLimit> buffer; + boost::beast::http::request<boost::beast::http::string_body> req; +@@ -108,23 +113,52 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + const std::vector<boost::asio::ip::tcp::endpoint>& endpointList) + { + state = ConnState::connectInProgress; ++ sslConn.emplace(conn, ctx); + + BMCWEB_LOG_DEBUG << "Trying to connect to: " << host << ":" << port; ++ auto respHandler = [self(shared_from_this())]( ++ const boost::beast::error_code ec, ++ const boost::asio::ip::tcp::endpoint& endpoint) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Connect " << endpoint ++ << " failed: " << ec.message(); ++ self->state = ConnState::connectFailed; ++ self->handleConnState(); ++ return; ++ } + ++ BMCWEB_LOG_DEBUG << "Connected to: " << endpoint; ++ if (self->sslConn) ++ { ++ self->performHandshake(); ++ } ++ else ++ { ++ self->handleConnState(); ++ } ++ }; + conn.expires_after(std::chrono::seconds(30)); +- conn.async_connect( +- endpointList, [self(shared_from_this())]( +- const boost::beast::error_code ec, +- const boost::asio::ip::tcp::endpoint& endpoint) { ++ conn.async_connect(endpointList, std::move(respHandler)); ++ } ++ ++ void performHandshake() ++ { ++ state = ConnState::handshakeInProgress; ++ ++ sslConn->async_handshake( ++ boost::asio::ssl::stream_base::client, ++ [self(shared_from_this())](const boost::beast::error_code ec) { + if (ec) + { +- BMCWEB_LOG_ERROR << "Connect " << endpoint +- << " failed: " << ec.message(); +- self->state = ConnState::connectFailed; ++ BMCWEB_LOG_ERROR << "SSL handshake failed: " ++ << ec.message(); ++ self->state = ConnState::handshakeFailed; + self->handleConnState(); + return; + } +- BMCWEB_LOG_DEBUG << "Connected to: " << endpoint; ++ ++ BMCWEB_LOG_DEBUG << "SSL Handshake successfull"; + self->state = ConnState::connected; + self->handleConnState(); + }); +@@ -132,132 +166,187 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + + void sendMessage(const std::string& data) + { +- state = ConnState::sendInProgress; +- + BMCWEB_LOG_DEBUG << __FUNCTION__ << "(): " << host << ":" << port; ++ state = ConnState::sendInProgress; + + req.body() = data; + req.prepare_payload(); + +- // Set a timeout on the operation +- conn.expires_after(std::chrono::seconds(30)); ++ auto respHandler = [self(shared_from_this())]( ++ const boost::beast::error_code ec, ++ const std::size_t& bytesTransferred) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "sendMessage() failed: " << ec.message(); ++ self->state = ConnState::sendFailed; ++ self->handleConnState(); ++ return; ++ } + +- // Send the HTTP request to the remote host +- boost::beast::http::async_write( +- conn, req, +- [self(shared_from_this())](const boost::beast::error_code& ec, +- const std::size_t& bytesTransferred) { +- if (ec) +- { +- BMCWEB_LOG_ERROR << "sendMessage() failed: " +- << ec.message(); +- self->state = ConnState::sendFailed; +- self->handleConnState(); +- return; +- } +- BMCWEB_LOG_DEBUG << "sendMessage() bytes transferred: " +- << bytesTransferred; +- boost::ignore_unused(bytesTransferred); ++ BMCWEB_LOG_DEBUG << "sendMessage() bytes transferred: " ++ << bytesTransferred; ++ boost::ignore_unused(bytesTransferred); ++ self->recvMessage(); ++ }; + +- self->recvMessage(); +- }); ++ // Set a timeout on the operation ++ conn.expires_after(std::chrono::seconds(30)); ++ if (sslConn) ++ { ++ boost::beast::http::async_write(*sslConn, req, ++ std::move(respHandler)); ++ } ++ else ++ { ++ boost::beast::http::async_write(conn, req, std::move(respHandler)); ++ } + } +- + void recvMessage() + { + state = ConnState::recvInProgress; + ++ auto respHandler = [self(shared_from_this())]( ++ const boost::beast::error_code ec, ++ const std::size_t& bytesTransferred) { ++ if (ec && ec != boost::asio::ssl::error::stream_truncated) ++ { ++ BMCWEB_LOG_ERROR << "recvMessage() failed: " << ec.message(); ++ ++ self->state = ConnState::recvFailed; ++ self->handleConnState(); ++ return; ++ } ++ ++ BMCWEB_LOG_DEBUG << "recvMessage() bytes transferred: " ++ << bytesTransferred; ++ boost::ignore_unused(bytesTransferred); ++ ++ // Check if the response and header are received ++ if (!self->parser->is_done()) ++ { ++ // The parser failed to receive the response ++ BMCWEB_LOG_ERROR ++ << "recvMessage() parser failed to receive response"; ++ self->state = ConnState::recvFailed; ++ self->handleConnState(); ++ return; ++ } ++ ++ unsigned int respCode = self->parser->get().result_int(); ++ BMCWEB_LOG_DEBUG << "recvMessage() Header Response Code: " ++ << respCode; ++ ++ // 2XX response is considered to be successful ++ if ((respCode < 200) || (respCode >= 300)) ++ { ++ // The listener failed to receive the Sent-Event ++ BMCWEB_LOG_ERROR << "recvMessage() Listener Failed to " ++ "receive Sent-Event"; ++ self->state = ConnState::recvFailed; ++ self->handleConnState(); ++ return; ++ } ++ ++ // Send is successful, Lets remove data from queue ++ // check for next request data in queue. ++ if (!self->requestDataQueue.empty()) ++ { ++ self->requestDataQueue.pop_front(); ++ } ++ self->state = ConnState::idle; ++ // Keep the connection alive if server supports it ++ // Else close the connection ++ BMCWEB_LOG_DEBUG << "recvMessage() keepalive : " ++ << self->parser->keep_alive(); ++ if (!self->parser->keep_alive()) ++ { ++ // Abort the connection since server is not keep-alive enabled ++ self->state = ConnState::abortConnection; ++ } ++ ++ // Returns ownership of the parsed message ++ self->parser->release(); ++ ++ self->handleConnState(); ++ }; + parser.emplace(std::piecewise_construct, std::make_tuple()); + parser->body_limit(httpReadBodyLimit); + + // Check only for the response header + parser->skip(true); ++ conn.expires_after(std::chrono::seconds(30)); ++ if (sslConn) ++ { ++ boost::beast::http::async_read(*sslConn, buffer, *parser, ++ std::move(respHandler)); ++ } ++ else ++ { ++ boost::beast::http::async_read(conn, buffer, *parser, ++ std::move(respHandler)); ++ } ++ } ++ void doClose() ++ { ++ state = ConnState::closeInProgress; + +- // Receive the HTTP response +- boost::beast::http::async_read( +- conn, buffer, *parser, +- [self(shared_from_this())](const boost::beast::error_code& ec, +- const std::size_t& bytesTransferred) { ++ // Set the timeout on the tcp stream socket for the async operation ++ conn.expires_after(std::chrono::seconds(30)); ++ if (sslConn) ++ { ++ sslConn->async_shutdown([self = shared_from_this()]( ++ const boost::system::error_code ec) { + if (ec) + { +- BMCWEB_LOG_ERROR << "recvMessage() failed: " +- << ec.message(); +- self->state = ConnState::recvFailed; +- self->handleConnState(); +- return; ++ // Many https server closes connection abruptly ++ // i.e witnout close_notify. More details are at ++ // https://github.com/boostorg/beast/issues/824 ++ if (ec == boost::asio::ssl::error::stream_truncated) ++ { ++ BMCWEB_LOG_INFO << "doClose(): Connection " ++ "closed by server. "; ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "doClose() failed: " ++ << ec.message(); ++ } + } +- BMCWEB_LOG_DEBUG << "recvMessage() bytes transferred: " +- << bytesTransferred; +- BMCWEB_LOG_DEBUG << "recvMessage() data: " +- << self->parser->get(); +- +- // Check if the response and header are received +- if (!self->parser->is_done()) ++ else + { +- // The parser failed to receive the response +- BMCWEB_LOG_ERROR +- << "recvMessage() parser failed to receive response"; +- self->state = ConnState::recvFailed; +- self->handleConnState(); +- return; ++ BMCWEB_LOG_DEBUG << "Connection closed gracefully..."; + } ++ self->conn.close(); + +- unsigned int respCode = self->parser->get().result_int(); +- BMCWEB_LOG_DEBUG << "recvMessage() Header Response Code: " +- << respCode; +- +- // 2XX response is considered to be successful +- if ((respCode < 200) || (respCode >= 300)) ++ if ((self->state != ConnState::suspended) && ++ (self->state != ConnState::terminated)) + { +- // The listener failed to receive the Sent-Event +- BMCWEB_LOG_ERROR << "recvMessage() Listener Failed to " +- "receive Sent-Event"; +- self->state = ConnState::recvFailed; ++ self->state = ConnState::closed; + self->handleConnState(); +- return; + } +- +- // Send is successful, Lets remove data from queue +- // check for next request data in queue. +- if (!self->requestDataQueue.empty()) +- { +- self->requestDataQueue.pop_front(); +- } +- self->state = ConnState::idle; +- +- // Keep the connection alive if server supports it +- // Else close the connection +- BMCWEB_LOG_DEBUG << "recvMessage() keepalive : " +- << self->parser->keep_alive(); +- if (!self->parser->keep_alive()) +- { +- // Abort the connection since server is not keep-alive +- // enabled +- self->state = ConnState::abortConnection; +- } +- +- self->handleConnState(); + }); +- } +- +- void doClose() +- { +- state = ConnState::closeInProgress; +- boost::beast::error_code ec; +- conn.socket().shutdown(boost::asio::ip::tcp::socket::shutdown_both, ec); +- conn.close(); +- +- // not_connected happens sometimes so don't bother reporting it. +- if (ec && ec != boost::beast::errc::not_connected) +- { +- BMCWEB_LOG_ERROR << "shutdown failed: " << ec.message(); +- return; + } +- BMCWEB_LOG_DEBUG << "Connection closed gracefully"; +- if ((state != ConnState::suspended) && (state != ConnState::terminated)) ++ else + { +- state = ConnState::closed; +- handleConnState(); ++ boost::beast::error_code ec; ++ conn.socket().shutdown(boost::asio::ip::tcp::socket::shutdown_both, ++ ec); ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "doClose() failed: " << ec.message(); ++ } ++ else ++ { ++ BMCWEB_LOG_DEBUG << "Connection closed gracefully..."; ++ } ++ conn.close(); ++ ++ if ((state != ConnState::suspended) && ++ (state != ConnState::terminated)) ++ { ++ state = ConnState::closed; ++ handleConnState(); ++ } + } + } + +@@ -330,6 +419,7 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + { + case ConnState::resolveInProgress: + case ConnState::connectInProgress: ++ case ConnState::handshakeInProgress: + case ConnState::sendInProgress: + case ConnState::recvInProgress: + case ConnState::closeInProgress: +@@ -356,6 +446,7 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + } + case ConnState::resolveFailed: + case ConnState::connectFailed: ++ case ConnState::handshakeFailed: + case ConnState::sendFailed: + case ConnState::recvFailed: + case ConnState::retry: +@@ -394,7 +485,8 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + public: + explicit HttpClient(boost::asio::io_context& ioc, const std::string& id, + const std::string& destIP, const std::string& destPort, +- const std::string& destUri) : ++ const std::string& destUri, ++ const std::string& uriProto) : + conn(ioc), + timer(ioc), req(boost::beast::http::verb::post, destUri, 11), + state(ConnState::initialized), subId(id), host(destIP), port(destPort), +@@ -407,8 +499,11 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + req.keep_alive(true); + + requestDataQueue.set_capacity(maxRequestQueueSize); ++ if (uriProto == "https") ++ { ++ sslConn.emplace(conn, ctx); ++ } + } +- + void sendData(const std::string& data) + { + if ((state == ConnState::suspended) || (state == ConnState::terminated)) +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 08d0b98..f1ce0c0 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -385,7 +385,7 @@ class Subscription : public persistent_data::UserSubscription + { + conn = std::make_shared<crow::HttpClient>( + crow::connections::systemBus->get_io_context(), id, host, port, +- path); ++ path, uriProto); + } + + Subscription(const std::shared_ptr<boost::beast::tcp_stream>& adaptor) : +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0004-Add-Server-Sent-Events-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0004-Add-Server-Sent-Events-support.patch new file mode 100644 index 000000000..ea521a7e4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0004-Add-Server-Sent-Events-support.patch @@ -0,0 +1,468 @@ +From d7a2660f200c38e74bfcbfe55b8da1b8bed08833 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Fri, 12 Mar 2021 18:53:25 +0000 +Subject: [PATCH] Add Server-Sent-Events support + +Server-Sent Events is a standard describing how servers can +initiate data transmission towards clients once an initial +client connection has been established. Unlike websockets +(which are bidirectional), Server-Sent Events are +unidirectional and commonly used to send message updates or +continuous data streams to a browser client. + +This is base patch for adding Server-Sent events support to +bmcweb. Redfish eventservice SSE style subscription uses +this and will be loaded on top of this commit. + +Tested: + - Tested using follow-up patch on top which adds + support for Redfish EventService SSE style subscription + and observed events are getting sent periodically. + +Change-Id: I36956565cbba30c2007852c9471f477f6d1736e9 +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/http_connection.hpp | 10 +- + http/http_response.hpp | 7 +- + http/routing.hpp | 71 ++++++++++ + http/server_sent_event.hpp | 279 +++++++++++++++++++++++++++++++++++++ + 4 files changed, 362 insertions(+), 5 deletions(-) + create mode 100644 http/server_sent_event.hpp + +diff --git a/http/http_connection.hpp b/http/http_connection.hpp +index 8e53afa..a1bbfce 100644 +--- a/http/http_connection.hpp ++++ b/http/http_connection.hpp +@@ -378,11 +378,13 @@ class Connection : + [self] { self->completeRequest(); }); + }); + +- if (thisReq.isUpgrade() && +- boost::iequals( +- thisReq.getHeaderValue(boost::beast::http::field::upgrade), +- "websocket")) ++ if ((thisReq.isUpgrade() && ++ boost::iequals( ++ thisReq.getHeaderValue(boost::beast::http::field::upgrade), ++ "websocket")) || ++ (req->url == "/sse")) + { ++ BMCWEB_LOG_DEBUG << "Request: " << this << " is getting upgraded"; + handler->handleUpgrade(thisReq, res, std::move(adaptor)); + // delete lambda with self shared_ptr + // to enable connection destruction +diff --git a/http/http_response.hpp b/http/http_response.hpp +index a983d4a..07b0265 100644 +--- a/http/http_response.hpp ++++ b/http/http_response.hpp +@@ -15,10 +15,15 @@ namespace crow + template <typename Adaptor, typename Handler> + class Connection; + ++template <typename Adaptor> ++class SseConnectionImpl; ++ + struct Response + { + template <typename Adaptor, typename Handler> + friend class crow::Connection; ++ template <typename Adaptor> ++ friend class crow::SseConnectionImpl; + using response_type = + boost::beast::http::response<boost::beast::http::string_body>; + +@@ -143,8 +148,8 @@ struct Response + + private: + bool completed{}; +- std::function<void()> completeRequestHandler; + std::function<bool()> isAliveHelper; ++ std::function<void()> completeRequestHandler; + + // In case of a JSON object, set the Content-Type header + void jsonMode() +diff --git a/http/routing.hpp b/http/routing.hpp +index 5d9c8e3..bfff107 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -6,6 +6,7 @@ + #include "http_response.hpp" + #include "logging.hpp" + #include "privileges.hpp" ++#include "server_sent_event.hpp" + #include "sessions.hpp" + #include "utility.hpp" + #include "websocket.hpp" +@@ -398,6 +399,68 @@ class WebSocketRule : public BaseRule + std::function<void(crow::websocket::Connection&)> errorHandler; + }; + ++class SseSocketRule : public BaseRule ++{ ++ using self_t = SseSocketRule; ++ ++ public: ++ SseSocketRule(const std::string& ruleIn) : BaseRule(ruleIn) ++ {} ++ ++ void validate() override ++ {} ++ ++ void handle(const Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const RoutingParams&) override ++ { ++ asyncResp->res.result(boost::beast::http::status::not_found); ++ } ++ ++ void handleUpgrade(const Request& req, Response&, ++ boost::asio::ip::tcp::socket&& adaptor) override ++ { ++ std::shared_ptr<crow::SseConnectionImpl<boost::asio::ip::tcp::socket>> ++ myConnection = std::make_shared< ++ crow::SseConnectionImpl<boost::asio::ip::tcp::socket>>( ++ req, std::move(adaptor), openHandler, closeHandler); ++ myConnection->start(); ++ } ++#ifdef BMCWEB_ENABLE_SSL ++ void handleUpgrade(const Request& req, Response&, ++ boost::beast::ssl_stream<boost::asio::ip::tcp::socket>&& ++ adaptor) override ++ { ++ std::shared_ptr<crow::SseConnectionImpl< ++ boost::beast::ssl_stream<boost::asio::ip::tcp::socket>>> ++ myConnection = std::make_shared<crow::SseConnectionImpl< ++ boost::beast::ssl_stream<boost::asio::ip::tcp::socket>>>( ++ req, std::move(adaptor), openHandler, closeHandler); ++ myConnection->start(); ++ } ++#endif ++ ++ template <typename Func> ++ self_t& onopen(Func f) ++ { ++ openHandler = f; ++ return *this; ++ } ++ ++ template <typename Func> ++ self_t& onclose(Func f) ++ { ++ closeHandler = f; ++ return *this; ++ } ++ ++ private: ++ std::function<void(std::shared_ptr<crow::SseConnection>&, ++ const crow::Request&, crow::Response&)> ++ openHandler; ++ std::function<void(std::shared_ptr<crow::SseConnection>&)> closeHandler; ++}; ++ + template <typename T> + struct RuleParameterTraits + { +@@ -410,6 +473,14 @@ struct RuleParameterTraits + return *p; + } + ++ SseSocketRule& serverSentEvent() ++ { ++ self_t* self = static_cast<self_t*>(this); ++ SseSocketRule* p = new SseSocketRule(self->rule); ++ self->ruleToUpgrade.reset(p); ++ return *p; ++ } ++ + self_t& name(const std::string_view name) noexcept + { + self_t* self = static_cast<self_t*>(this); +diff --git a/http/server_sent_event.hpp b/http/server_sent_event.hpp +new file mode 100644 +index 0000000..41d18ed +--- /dev/null ++++ b/http/server_sent_event.hpp +@@ -0,0 +1,279 @@ ++#pragma once ++#include "http_request.hpp" ++ ++#include <boost/algorithm/string/predicate.hpp> ++#include <boost/asio/buffer.hpp> ++#include <boost/beast/http/buffer_body.hpp> ++#include <boost/beast/websocket.hpp> ++ ++#include <array> ++#include <functional> ++ ++#ifdef BMCWEB_ENABLE_SSL ++#include <boost/beast/websocket/ssl.hpp> ++#endif ++ ++namespace crow ++{ ++ ++struct SseConnection : std::enable_shared_from_this<SseConnection> ++{ ++ public: ++ SseConnection(const crow::Request& reqIn) : req(reqIn) ++ {} ++ virtual ~SseConnection() = default; ++ ++ virtual boost::asio::io_context& getIoContext() = 0; ++ virtual void sendSSEHeader() = 0; ++ virtual void completeRequest() = 0; ++ virtual void close(const std::string_view msg = "quit") = 0; ++ virtual void sendEvent(const std::string_view id, ++ const std::string_view msg) = 0; ++ ++ crow::Request req; ++ crow::Response res; ++}; ++ ++template <typename Adaptor> ++class SseConnectionImpl : public SseConnection ++{ ++ public: ++ SseConnectionImpl( ++ const crow::Request& reqIn, Adaptor adaptorIn, ++ std::function<void(std::shared_ptr<SseConnection>&, ++ const crow::Request&, crow::Response&)> ++ openHandler, ++ std::function<void(std::shared_ptr<SseConnection>&)> closeHandler) : ++ SseConnection(reqIn), ++ adaptor(std::move(adaptorIn)), openHandler(std::move(openHandler)), ++ closeHandler(std::move(closeHandler)) ++ { ++ BMCWEB_LOG_DEBUG << "SseConnectionImpl: SSE constructor " << this; ++ } ++ ++ ~SseConnectionImpl() override ++ { ++ res.completeRequestHandler = nullptr; ++ BMCWEB_LOG_DEBUG << "SseConnectionImpl: SSE destructor " << this; ++ } ++ ++ boost::asio::io_context& getIoContext() override ++ { ++ return static_cast<boost::asio::io_context&>( ++ adaptor.get_executor().context()); ++ } ++ ++ void start() ++ { ++ // Register for completion callback. ++ res.completeRequestHandler = [this, self(shared_from_this())] { ++ boost::asio::post(this->adaptor.get_executor(), ++ [self] { self->completeRequest(); }); ++ }; ++ ++ if (openHandler) ++ { ++ std::shared_ptr<SseConnection> self = this->shared_from_this(); ++ openHandler(self, req, res); ++ } ++ } ++ ++ void close(const std::string_view msg) override ++ { ++ BMCWEB_LOG_DEBUG << "Closing SSE connection " << this << " - " << msg; ++ boost::beast::get_lowest_layer(adaptor).close(); ++ ++ // send notification to handler for cleanup ++ if (closeHandler) ++ { ++ std::shared_ptr<SseConnection> self = this->shared_from_this(); ++ closeHandler(self); ++ } ++ } ++ ++ void sendSSEHeader() override ++ { ++ BMCWEB_LOG_DEBUG << "Starting SSE connection"; ++ using BodyType = boost::beast::http::buffer_body; ++ auto response = ++ std::make_shared<boost::beast::http::response<BodyType>>( ++ boost::beast::http::status::ok, 11); ++ auto serializer = ++ std::make_shared<boost::beast::http::response_serializer<BodyType>>( ++ *response); ++ ++ response->set(boost::beast::http::field::server, "bmcweb"); ++ response->set(boost::beast::http::field::content_type, ++ "text/event-stream"); ++ response->body().data = nullptr; ++ response->body().size = 0; ++ response->body().more = true; ++ ++ boost::beast::http::async_write_header( ++ adaptor, *serializer, ++ [this, self(shared_from_this()), response, serializer]( ++ const boost::beast::error_code& ec, const std::size_t&) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Error sending header" << ec; ++ close("async_write_header failed"); ++ return; ++ } ++ BMCWEB_LOG_DEBUG << "SSE header sent - Connection established"; ++ ++ // SSE stream header sent, So lets setup monitor. ++ // Any read data on this stream will be error in case of SSE. ++ setupRead(); ++ }); ++ } ++ ++ void setupRead() ++ { ++ adaptor.async_read_some( ++ outputBuffer.prepare(outputBuffer.capacity() - outputBuffer.size()), ++ [this](const boost::system::error_code& ec, std::size_t bytesRead) { ++ BMCWEB_LOG_DEBUG << "async_read_some: Read " << bytesRead ++ << " bytes"; ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Read error: " << ec; ++ } ++ outputBuffer.commit(bytesRead); ++ outputBuffer.consume(bytesRead); ++ ++ // After establishing SSE stream, Reading data on this ++ // stream means client is disobeys the SSE protocol. ++ // Read the data to avoid buffer attacks and close connection. ++ close("Close SSE connection"); ++ return; ++ }); ++ } ++ ++ void doWrite() ++ { ++ if (doingWrite) ++ { ++ return; ++ } ++ if (inputBuffer.size() == 0) ++ { ++ BMCWEB_LOG_DEBUG << "inputBuffer is empty... Bailing out"; ++ return; ++ } ++ doingWrite = true; ++ ++ adaptor.async_write_some( ++ inputBuffer.data(), [this, self(shared_from_this())]( ++ boost::beast::error_code ec, ++ const std::size_t& bytesTransferred) { ++ doingWrite = false; ++ inputBuffer.consume(bytesTransferred); ++ ++ if (ec == boost::asio::error::eof) ++ { ++ BMCWEB_LOG_ERROR << "async_write_some() SSE stream closed"; ++ close("SSE stream closed"); ++ return; ++ } ++ ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "async_write_some() failed: " ++ << ec.message(); ++ close("async_write_some failed"); ++ return; ++ } ++ BMCWEB_LOG_DEBUG << "async_write_some() bytes transferred: " ++ << bytesTransferred; ++ ++ doWrite(); ++ }); ++ } ++ ++ void completeRequest() override ++ { ++ BMCWEB_LOG_DEBUG << "SSE completeRequest() handler"; ++ if (res.body().empty() && !res.jsonValue.empty()) ++ { ++ res.addHeader("Content-Type", "application/json"); ++ res.body() = res.jsonValue.dump( ++ 2, ' ', true, nlohmann::json::error_handler_t::replace); ++ } ++ ++ res.preparePayload(); ++ auto serializer = ++ std::make_shared<boost::beast::http::response_serializer< ++ boost::beast::http::string_body>>(*res.stringResponse); ++ ++ boost::beast::http::async_write( ++ adaptor, *serializer, ++ [this, self(shared_from_this()), ++ serializer](const boost::system::error_code& ec, ++ std::size_t bytesTransferred) { ++ BMCWEB_LOG_DEBUG << this << " async_write " << bytesTransferred ++ << " bytes"; ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG << this << " from async_write failed"; ++ return; ++ } ++ res.clear(); ++ ++ BMCWEB_LOG_DEBUG << this ++ << " Closing SSE connection - Request invalid"; ++ close("Request invalid"); ++ }); ++ ++ // delete lambda with self shared_ptr ++ // to enable connection destruction ++ res.completeRequestHandler = nullptr; ++ } ++ ++ void sendEvent(const std::string_view id, ++ const std::string_view msg) override ++ { ++ if (msg.empty()) ++ { ++ BMCWEB_LOG_DEBUG << "Empty data, bailing out."; ++ return; ++ } ++ ++ std::string rawData; ++ if (!id.empty()) ++ { ++ rawData += "id: "; ++ rawData.append(id.begin(), id.end()); ++ rawData += "\n"; ++ } ++ ++ rawData += "data: "; ++ for (char character : msg) ++ { ++ rawData += character; ++ if (character == '\n') ++ { ++ rawData += "data: "; ++ } ++ } ++ rawData += "\n\n"; ++ ++ boost::asio::buffer_copy(inputBuffer.prepare(rawData.size()), ++ boost::asio::buffer(rawData)); ++ inputBuffer.commit(rawData.size()); ++ ++ doWrite(); ++ } ++ ++ private: ++ Adaptor adaptor; ++ ++ boost::beast::flat_static_buffer<1024U * 8U> outputBuffer; ++ boost::beast::flat_static_buffer<1024U * 64U> inputBuffer; ++ bool doingWrite = false; ++ ++ std::function<void(std::shared_ptr<SseConnection>&, const crow::Request&, ++ crow::Response&)> ++ openHandler; ++ std::function<void(std::shared_ptr<SseConnection>&)> closeHandler; ++}; ++} // namespace crow +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0005-Add-SSE-style-subscription-support-to-eventservice.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0005-Add-SSE-style-subscription-support-to-eventservice.patch new file mode 100644 index 000000000..ee69081ef --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0005-Add-SSE-style-subscription-support-to-eventservice.patch @@ -0,0 +1,679 @@ +From 799e47842e179f7c752712004f0e96d3219eee11 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Tue, 16 Mar 2021 15:37:24 +0000 +Subject: [PATCH] Add SSE style subscription support to eventservice + +This commit adds the SSE style eventservice subscription +style event. Using this, end user can subscribe for +Redfish event logs using GET on SSE usri from +browser. +URI: /redfish/v1/EventService/Subscriptions/SSE + +Tested: + - From Browser did GET on above SSE URI and + generated some Redfish event logs(power cycle) + and saw redfish event logs streaming on browser. + - After SSE registration, Check Subscription collections + and GET on individual subscription and saw desired + response. + - Ran RedfishValidation and its passed. + +Change-Id: I7f4b7a34974080739c4ba968ed570489af0474de +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/http_connection.hpp | 2 +- + include/eventservice_sse.hpp | 75 +++++ + .../include/event_service_manager.hpp | 109 +++++-- + redfish-core/include/server_sent_events.hpp | 290 ------------------ + redfish-core/lib/event_service.hpp | 8 +- + src/webserver_main.cpp | 2 + + 6 files changed, 164 insertions(+), 322 deletions(-) + create mode 100644 include/eventservice_sse.hpp + delete mode 100644 redfish-core/include/server_sent_events.hpp + +diff --git a/http/http_connection.hpp b/http/http_connection.hpp +index a1bbfce..2d08501 100644 +--- a/http/http_connection.hpp ++++ b/http/http_connection.hpp +@@ -382,7 +382,7 @@ class Connection : + boost::iequals( + thisReq.getHeaderValue(boost::beast::http::field::upgrade), + "websocket")) || +- (req->url == "/sse")) ++ (req->url == "/redfish/v1/EventService/Subscriptions/SSE")) + { + BMCWEB_LOG_DEBUG << "Request: " << this << " is getting upgraded"; + handler->handleUpgrade(thisReq, res, std::move(adaptor)); +diff --git a/include/eventservice_sse.hpp b/include/eventservice_sse.hpp +new file mode 100644 +index 0000000..14daf00 +--- /dev/null ++++ b/include/eventservice_sse.hpp +@@ -0,0 +1,75 @@ ++#pragma once ++ ++#include <app.hpp> ++#include <event_service_manager.hpp> ++ ++namespace redfish ++{ ++namespace eventservice_sse ++{ ++ ++static bool createSubscription(std::shared_ptr<crow::SseConnection>& conn, ++ const crow::Request& req, crow::Response& res) ++{ ++ if ((EventServiceManager::getInstance().getNumberOfSubscriptions() >= ++ maxNoOfSubscriptions) || ++ EventServiceManager::getInstance().getNumberOfSSESubscriptions() >= ++ maxNoOfSSESubscriptions) ++ { ++ BMCWEB_LOG_ERROR << "Max SSE subscriptions reached"; ++ messages::eventSubscriptionLimitExceeded(res); ++ res.end(); ++ return false; ++ } ++ BMCWEB_LOG_DEBUG << "Request query param size: " << req.urlParams.size(); ++ ++ std::shared_ptr<redfish::Subscription> subValue = ++ std::make_shared<redfish::Subscription>(std::move(conn)); ++ ++ // GET on this URI means, Its SSE subscriptionType. ++ subValue->subscriptionType = redfish::subscriptionTypeSSE; ++ ++ // TODO: parse $filter query params and fill config. ++ subValue->protocol = "Redfish"; ++ subValue->retryPolicy = "TerminateAfterRetries"; ++ subValue->eventFormatType = "Event"; ++ ++ std::string id = ++ redfish::EventServiceManager::getInstance().addSubscription(subValue, ++ false); ++ if (id.empty()) ++ { ++ messages::internalError(res); ++ res.end(); ++ return false; ++ } ++ ++ return true; ++} ++ ++static void deleteSubscription(std::shared_ptr<crow::SseConnection>& conn) ++{ ++ redfish::EventServiceManager::getInstance().deleteSubscription(conn); ++} ++ ++inline void requestRoutes(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/EventService/Subscriptions/SSE") ++ .privileges({{"ConfigureComponents", "ConfigureManager"}}) ++ .serverSentEvent() ++ .onopen([](std::shared_ptr<crow::SseConnection>& conn, ++ const crow::Request& req, crow::Response& res) { ++ BMCWEB_LOG_DEBUG << "Connection " << conn << " opened."; ++ if (createSubscription(conn, req, res)) ++ { ++ // All success, lets send SSE haader ++ conn->sendSSEHeader(); ++ } ++ }) ++ .onclose([](std::shared_ptr<crow::SseConnection>& conn) { ++ BMCWEB_LOG_DEBUG << "Connection " << conn << " closed"; ++ deleteSubscription(conn); ++ }); ++} ++} // namespace eventservice_sse ++} // namespace redfish +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 3f398d7..dd833ce 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -22,15 +22,17 @@ + #include <sys/inotify.h> + + #include <boost/asio/io_context.hpp> ++#include <boost/beast/core/span.hpp> + #include <boost/container/flat_map.hpp> + #include <error_messages.hpp> + #include <event_service_store.hpp> + #include <http_client.hpp> + #include <persistent_data.hpp> + #include <random.hpp> +-#include <server_sent_events.hpp> ++#include <server_sent_event.hpp> + #include <utils/json_utils.hpp> + ++#include <algorithm> + #include <cstdlib> + #include <ctime> + #include <fstream> +@@ -46,9 +48,27 @@ using ReadingsObjType = + static constexpr const char* eventFormatType = "Event"; + static constexpr const char* metricReportFormatType = "MetricReport"; + ++static constexpr const char* subscriptionTypeSSE = "SSE"; + static constexpr const char* eventServiceFile = + "/var/lib/bmcweb/eventservice_config.json"; + ++static constexpr const uint8_t maxNoOfSubscriptions = 20; ++static constexpr const uint8_t maxNoOfSSESubscriptions = 10; ++ ++#ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES ++static std::optional<boost::asio::posix::stream_descriptor> inotifyConn; ++static constexpr const char* redfishEventLogDir = "/var/log"; ++static constexpr const char* redfishEventLogFile = "/var/log/redfish"; ++static constexpr const size_t iEventSize = sizeof(inotify_event); ++static int inotifyFd = -1; ++static int dirWatchDesc = -1; ++static int fileWatchDesc = -1; ++ ++// <ID, timestamp, RedfishLogId, registryPrefix, MessageId, MessageArgs> ++using EventLogObjectsType = ++ std::tuple<std::string, std::string, std::string, std::string, std::string, ++ std::vector<std::string>>; ++ + namespace message_registries + { + inline boost::beast::span<const MessageEntry> +@@ -68,24 +88,6 @@ inline boost::beast::span<const MessageEntry> + } + return boost::beast::span<const MessageEntry>(openbmc::registry); + } +-} // namespace message_registries +- +-#ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES +-static std::optional<boost::asio::posix::stream_descriptor> inotifyConn; +-static constexpr const char* redfishEventLogDir = "/var/log"; +-static constexpr const char* redfishEventLogFile = "/var/log/redfish"; +-static constexpr const size_t iEventSize = sizeof(inotify_event); +-static int inotifyFd = -1; +-static int dirWatchDesc = -1; +-static int fileWatchDesc = -1; +- +-// <ID, timestamp, RedfishLogId, registryPrefix, MessageId, MessageArgs> +-using EventLogObjectsType = +- std::tuple<std::string, std::string, std::string, std::string, std::string, +- std::vector<std::string>>; +- +-namespace message_registries +-{ + static const Message* + getMsgFromRegistry(const std::string& messageKey, + const boost::beast::span<const MessageEntry>& registry) +@@ -388,11 +390,9 @@ class Subscription : public persistent_data::UserSubscription + path, uriProto); + } + +- Subscription(const std::shared_ptr<boost::beast::tcp_stream>& adaptor) : +- eventSeqNum(1) +- { +- sseConn = std::make_shared<crow::ServerSentEvents>(adaptor); +- } ++ Subscription(const std::shared_ptr<crow::SseConnection>& adaptor) : ++ sseConn(adaptor), eventSeqNum(1) ++ {} + + ~Subscription() = default; + +@@ -417,7 +417,7 @@ class Subscription : public persistent_data::UserSubscription + + if (sseConn != nullptr) + { +- sseConn->sendData(eventSeqNum, msg); ++ sseConn->sendEvent(std::to_string(eventSeqNum), msg); + } + } + +@@ -508,6 +508,7 @@ class Subscription : public persistent_data::UserSubscription + + this->sendEvent( + msg.dump(2, ' ', true, nlohmann::json::error_handler_t::replace)); ++ this->eventSeqNum++; + } + #endif + +@@ -578,14 +579,39 @@ class Subscription : public persistent_data::UserSubscription + return eventSeqNum; + } + ++ void setSubscriptionId(const std::string& id) ++ { ++ BMCWEB_LOG_DEBUG << "Subscription ID: " << id; ++ subId = id; ++ } ++ ++ std::string getSubscriptionId() ++ { ++ return subId; ++ } ++ ++ std::optional<std::string> ++ getSubscriptionId(const std::shared_ptr<crow::SseConnection>& connPtr) ++ { ++ if (sseConn != nullptr && connPtr == sseConn) ++ { ++ BMCWEB_LOG_DEBUG << __FUNCTION__ ++ << " conn matched, subId: " << subId; ++ return subId; ++ } ++ ++ return std::nullopt; ++ } ++ + private: ++ std::shared_ptr<crow::SseConnection> sseConn = nullptr; + uint64_t eventSeqNum; + std::string host; + std::string port; + std::string path; + std::string uriProto; + std::shared_ptr<crow::HttpClient> conn = nullptr; +- std::shared_ptr<crow::ServerSentEvents> sseConn = nullptr; ++ std::string subId; + }; + + class EventServiceManager +@@ -942,6 +968,8 @@ class EventServiceManager + subValue->updateRetryConfig(retryAttempts, retryTimeoutInterval); + subValue->updateRetryPolicy(); + ++ // Set Subscription ID for back trace ++ subValue->setSubscriptionId(id); + return id; + } + +@@ -970,11 +998,40 @@ class EventServiceManager + } + } + ++ void deleteSubscription(const std::shared_ptr<crow::SseConnection>& connPtr) ++ { ++ for (const auto& it : this->subscriptionsMap) ++ { ++ std::shared_ptr<Subscription> entry = it.second; ++ if (entry->subscriptionType == subscriptionTypeSSE) ++ { ++ std::optional<std::string> id = ++ entry->getSubscriptionId(connPtr); ++ if (id) ++ { ++ deleteSubscription(*id); ++ return; ++ } ++ } ++ } ++ } ++ + size_t getNumberOfSubscriptions() + { + return subscriptionsMap.size(); + } + ++ size_t getNumberOfSSESubscriptions() const ++ { ++ auto count = std::count_if( ++ subscriptionsMap.begin(), subscriptionsMap.end(), ++ [this](const std::pair<std::string, std::shared_ptr<Subscription>>& ++ entry) { ++ return (entry.second->subscriptionType == subscriptionTypeSSE); ++ }); ++ return static_cast<size_t>(count); ++ } ++ + std::vector<std::string> getAllIDs() + { + std::vector<std::string> idList; +diff --git a/redfish-core/include/server_sent_events.hpp b/redfish-core/include/server_sent_events.hpp +deleted file mode 100644 +index 7613d7b..0000000 +--- a/redfish-core/include/server_sent_events.hpp ++++ /dev/null +@@ -1,290 +0,0 @@ +- +-/* +-// Copyright (c) 2020 Intel Corporation +-// +-// Licensed under the Apache License, Version 2.0 (the "License"); +-// you may not use this file except in compliance with the License. +-// You may obtain a copy of the License at +-// +-// http://www.apache.org/licenses/LICENSE-2.0 +-// +-// Unless required by applicable law or agreed to in writing, software +-// distributed under the License is distributed on an "AS IS" BASIS, +-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +-// See the License for the specific language governing permissions and +-// limitations under the License. +-*/ +-#pragma once +- +-#include <boost/asio/strand.hpp> +-#include <boost/beast/core/span.hpp> +-#include <boost/beast/http/buffer_body.hpp> +-#include <boost/beast/http/message.hpp> +-#include <boost/beast/version.hpp> +- +-#include <cstdlib> +-#include <functional> +-#include <iostream> +-#include <memory> +-#include <queue> +-#include <string> +- +-namespace crow +-{ +- +-static constexpr uint8_t maxReqQueueSize = 50; +- +-enum class SseConnState +-{ +- startInit, +- initInProgress, +- initialized, +- initFailed, +- sendInProgress, +- sendFailed, +- idle, +- suspended, +- closed +-}; +- +-class ServerSentEvents : public std::enable_shared_from_this<ServerSentEvents> +-{ +- private: +- std::shared_ptr<boost::beast::tcp_stream> sseConn; +- std::queue<std::pair<uint64_t, std::string>> requestDataQueue; +- std::string outBuffer; +- SseConnState state; +- int retryCount; +- int maxRetryAttempts; +- +- void sendEvent(const std::string& id, const std::string& msg) +- { +- if (msg.empty()) +- { +- BMCWEB_LOG_DEBUG << "Empty data, bailing out."; +- return; +- } +- +- if (state == SseConnState::sendInProgress) +- { +- return; +- } +- state = SseConnState::sendInProgress; +- +- if (!id.empty()) +- { +- outBuffer += "id: "; +- outBuffer.append(id.begin(), id.end()); +- outBuffer += "\n"; +- } +- +- outBuffer += "data: "; +- for (char character : msg) +- { +- outBuffer += character; +- if (character == '\n') +- { +- outBuffer += "data: "; +- } +- } +- outBuffer += "\n\n"; +- +- doWrite(); +- } +- +- void doWrite() +- { +- if (outBuffer.empty()) +- { +- BMCWEB_LOG_DEBUG << "All data sent successfully."; +- // Send is successful, Lets remove data from queue +- // check for next request data in queue. +- requestDataQueue.pop(); +- state = SseConnState::idle; +- checkQueue(); +- return; +- } +- +- sseConn->async_write_some( +- boost::asio::buffer(outBuffer.data(), outBuffer.size()), +- [self(shared_from_this())]( +- boost::beast::error_code ec, +- [[maybe_unused]] const std::size_t& bytesTransferred) { +- self->outBuffer.erase(0, bytesTransferred); +- +- if (ec == boost::asio::error::eof) +- { +- // Send is successful, Lets remove data from queue +- // check for next request data in queue. +- self->requestDataQueue.pop(); +- self->state = SseConnState::idle; +- self->checkQueue(); +- return; +- } +- +- if (ec) +- { +- BMCWEB_LOG_ERROR << "async_write_some() failed: " +- << ec.message(); +- self->state = SseConnState::sendFailed; +- self->checkQueue(); +- return; +- } +- BMCWEB_LOG_DEBUG << "async_write_some() bytes transferred: " +- << bytesTransferred; +- +- self->doWrite(); +- }); +- } +- +- void startSSE() +- { +- if (state == SseConnState::initInProgress) +- { +- return; +- } +- state = SseConnState::initInProgress; +- +- BMCWEB_LOG_DEBUG << "starting SSE connection "; +- using BodyType = boost::beast::http::buffer_body; +- auto response = +- std::make_shared<boost::beast::http::response<BodyType>>( +- boost::beast::http::status::ok, 11); +- auto serializer = +- std::make_shared<boost::beast::http::response_serializer<BodyType>>( +- *response); +- +- // TODO: Add hostname in http header. +- response->set(boost::beast::http::field::server, "iBMC"); +- response->set(boost::beast::http::field::content_type, +- "text/event-stream"); +- response->body().data = nullptr; +- response->body().size = 0; +- response->body().more = true; +- +- boost::beast::http::async_write_header( +- *sseConn, *serializer, +- [this, response, +- serializer](const boost::beast::error_code& ec, +- [[maybe_unused]] const std::size_t& bytesTransferred) { +- if (ec) +- { +- BMCWEB_LOG_ERROR << "Error sending header" << ec; +- state = SseConnState::initFailed; +- checkQueue(); +- return; +- } +- +- BMCWEB_LOG_DEBUG << "startSSE Header sent."; +- state = SseConnState::initialized; +- checkQueue(); +- }); +- } +- +- void checkQueue(const bool newRecord = false) +- { +- if (requestDataQueue.empty()) +- { +- BMCWEB_LOG_DEBUG << "requestDataQueue is empty\n"; +- return; +- } +- +- if (retryCount >= maxRetryAttempts) +- { +- BMCWEB_LOG_ERROR << "Maximum number of retries is reached."; +- +- // Clear queue. +- while (!requestDataQueue.empty()) +- { +- requestDataQueue.pop(); +- } +- +- // TODO: Take 'DeliveryRetryPolicy' action. +- // For now, doing 'SuspendRetries' action. +- state = SseConnState::suspended; +- return; +- } +- +- if ((state == SseConnState::initFailed) || +- (state == SseConnState::sendFailed)) +- { +- if (newRecord) +- { +- // We are already running async wait and retry. +- // Since record is added to queue, it gets the +- // turn in FIFO. +- return; +- } +- +- retryCount++; +- // TODO: Perform async wait for retryTimeoutInterval before proceed. +- } +- else +- { +- // reset retry count. +- retryCount = 0; +- } +- +- switch (state) +- { +- case SseConnState::initInProgress: +- case SseConnState::sendInProgress: +- case SseConnState::suspended: +- case SseConnState::startInit: +- case SseConnState::closed: +- // do nothing +- break; +- case SseConnState::initFailed: +- { +- startSSE(); +- break; +- } +- case SseConnState::initialized: +- case SseConnState::idle: +- case SseConnState::sendFailed: +- { +- std::pair<uint64_t, std::string> reqData = +- requestDataQueue.front(); +- sendEvent(std::to_string(reqData.first), reqData.second); +- break; +- } +- } +- +- return; +- } +- +- public: +- ServerSentEvents(const ServerSentEvents&) = delete; +- ServerSentEvents& operator=(const ServerSentEvents&) = delete; +- ServerSentEvents(ServerSentEvents&&) = delete; +- ServerSentEvents& operator=(ServerSentEvents&&) = delete; +- +- ServerSentEvents(const std::shared_ptr<boost::beast::tcp_stream>& adaptor) : +- sseConn(adaptor), state(SseConnState::startInit), retryCount(0), +- maxRetryAttempts(5) +- { +- startSSE(); +- } +- +- ~ServerSentEvents() = default; +- +- void sendData(const uint64_t& id, const std::string& data) +- { +- if (state == SseConnState::suspended) +- { +- return; +- } +- +- if (requestDataQueue.size() <= maxReqQueueSize) +- { +- requestDataQueue.push(std::pair(id, data)); +- checkQueue(true); +- } +- else +- { +- BMCWEB_LOG_ERROR << "Request queue is full. So ignoring data."; +- } +- } +-}; +- +-} // namespace crow +diff --git a/redfish-core/lib/event_service.hpp b/redfish-core/lib/event_service.hpp +index 8609862..249e594 100644 +--- a/redfish-core/lib/event_service.hpp ++++ b/redfish-core/lib/event_service.hpp +@@ -37,8 +37,6 @@ static constexpr const std::array<const char*, 1> supportedResourceTypes = { + "Task"}; + #endif + +-static constexpr const uint8_t maxNoOfSubscriptions = 20; +- + inline void requestRoutesEventService(App& app) + { + BMCWEB_ROUTE(app, "/redfish/v1/EventService/") +@@ -50,6 +48,8 @@ inline void requestRoutesEventService(App& app) + {"@odata.type", "#EventService.v1_5_0.EventService"}, + {"Id", "EventService"}, + {"Name", "Event Service"}, ++ {"ServerSentEventUri", ++ "/redfish/v1/EventService/Subscriptions/SSE"}, + {"Subscriptions", + {{"@odata.id", "/redfish/v1/EventService/Subscriptions"}}}, + {"Actions", +@@ -90,9 +90,7 @@ inline void requestRoutesEventService(App& app) + .privileges(redfish::privileges::patchEventService) + .methods(boost::beast::http::verb::patch)( + [](const crow::Request& req, +- const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) +- +- { ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { + std::optional<bool> serviceEnabled; + std::optional<uint32_t> retryAttemps; + std::optional<uint32_t> retryInterval; +diff --git a/src/webserver_main.cpp b/src/webserver_main.cpp +index bf98aae..53745d8 100644 +--- a/src/webserver_main.cpp ++++ b/src/webserver_main.cpp +@@ -6,6 +6,7 @@ + #include <cors_preflight.hpp> + #include <dbus_monitor.hpp> + #include <dbus_singleton.hpp> ++#include <eventservice_sse.hpp> + #include <google/google_service_root.hpp> + #include <hostname_monitor.hpp> + #include <ibm/management_console_rest.hpp> +@@ -83,6 +84,7 @@ int main(int /*argc*/, char** /*argv*/) + #endif + + #ifdef BMCWEB_ENABLE_REDFISH ++ redfish::eventservice_sse::requestRoutes(app); + redfish::requestRoutes(app); + redfish::RedfishService redfish(app); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0006-Add-EventService-SSE-filter-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0006-Add-EventService-SSE-filter-support.patch new file mode 100644 index 000000000..3914cc81a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0006-Add-EventService-SSE-filter-support.patch @@ -0,0 +1,296 @@ +From 769f0e20d0a7e786d7091ffb7ee57d35204dfa28 Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Wed, 17 Mar 2021 01:16:50 +0000 +Subject: [PATCH] Add EventService SSE filter support + +This commit implements the Event Service SSE stream +filters support. As per redfish specification: +The SSE streams have these formats: + - Metric report SSE stream + - Event message SSE stream + +To reduce the amount of data, service supports $filter +query parameter in SSE URI. +Below properties support as filter criteria: + - EventFormatType( Event & MetricReport) + - MessageId + - RegistryPrefix + - MetricReportDefinition + +For more details, refer Redfish specification section 13.5.2 + +Tested: + Created SSE stream with different filters and observed + desired events on SSE stream client(browser), some examples + - To get all Redfish events, + URI: /redfish/v1/EventService/Subscriptions/SSE?$filter=(EventFormatType%20eq%20Event) + - To get Redfish events with RegistryPrefix "OpenBMC" + URI: /redfish/v1/EventService/Subscriptions/SSE?$filter=(RegistryPrefix%20eq%20OpenBMC) + - To get only DC power of Events, + URI: /redfish/v1/EventService/Subscriptions/SSE?$filter=(EventFormatType%20eq%20Event)%20and%20(MessageId%20eq%20DCPowerOff) + +Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com> +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Change-Id: I55c6f53bb5e57aa1f2d1601f1a16525a33b13bd2 +--- + include/eventservice_sse.hpp | 145 +++++++++++++++++- + redfish-core/include/error_messages.hpp | 9 ++ + .../include/event_service_manager.hpp | 5 + + redfish-core/lib/event_service.hpp | 5 - + redfish-core/src/error_messages.cpp | 26 ++++ + 5 files changed, 181 insertions(+), 9 deletions(-) + +diff --git a/include/eventservice_sse.hpp b/include/eventservice_sse.hpp +index 14daf00..fed7fec 100644 +--- a/include/eventservice_sse.hpp ++++ b/include/eventservice_sse.hpp +@@ -23,16 +23,153 @@ static bool createSubscription(std::shared_ptr<crow::SseConnection>& conn, + } + BMCWEB_LOG_DEBUG << "Request query param size: " << req.urlParams.size(); + ++ // EventService SSE supports only "$filter" query param. ++ if (req.urlParams.size() > 1) ++ { ++ messages::invalidQueryFilter(res); ++ res.end(); ++ return false; ++ } ++ std::string eventFormatType; ++ std::string queryFilters; ++ if (req.urlParams.size()) ++ { ++ boost::urls::url_view::params_type::iterator it = ++ req.urlParams.find("$filter"); ++ if (it == req.urlParams.end()) ++ { ++ messages::invalidQueryFilter(res); ++ res.end(); ++ return false; ++ } ++ queryFilters = it->value(); ++ } ++ else ++ { ++ eventFormatType = "Event"; ++ } ++ ++ std::vector<std::string> msgIds; ++ std::vector<std::string> regPrefixes; ++ std::vector<std::string> mrdsArray; ++ if (!queryFilters.empty()) ++ { ++ // Reading from query params. ++ bool status = readSSEQueryParams(queryFilters, eventFormatType, msgIds, ++ regPrefixes, mrdsArray); ++ if (!status) ++ { ++ messages::invalidObject(res, queryFilters); ++ res.end(); ++ return false; ++ } ++ ++ // RegsitryPrefix and messageIds are mutuly exclusive as per redfish ++ // specification. ++ if (regPrefixes.size() && msgIds.size()) ++ { ++ messages::mutualExclusiveProperties(res, "RegistryPrefix", ++ "MessageId"); ++ res.end(); ++ return false; ++ } ++ ++ if (!eventFormatType.empty()) ++ { ++ if (std::find(supportedEvtFormatTypes.begin(), ++ supportedEvtFormatTypes.end(), ++ eventFormatType) == supportedEvtFormatTypes.end()) ++ { ++ messages::propertyValueNotInList(res, eventFormatType, ++ "EventFormatType"); ++ res.end(); ++ return false; ++ } ++ } ++ else ++ { ++ // If nothing specified, using default "Event" ++ eventFormatType = "Event"; ++ } ++ ++ if (!regPrefixes.empty()) ++ { ++ for (const std::string& it : regPrefixes) ++ { ++ if (std::find(supportedRegPrefixes.begin(), ++ supportedRegPrefixes.end(), ++ it) == supportedRegPrefixes.end()) ++ { ++ messages::propertyValueNotInList(res, it, "RegistryPrefix"); ++ res.end(); ++ return false; ++ } ++ } ++ } ++ ++ if (!msgIds.empty()) ++ { ++ std::vector<std::string> registryPrefix; ++ ++ // If no registry prefixes are mentioned, consider all supported ++ // prefixes to validate message ID ++ if (regPrefixes.empty()) ++ { ++ registryPrefix.assign(supportedRegPrefixes.begin(), ++ supportedRegPrefixes.end()); ++ } ++ else ++ { ++ registryPrefix = regPrefixes; ++ } ++ ++ for (const std::string& id : msgIds) ++ { ++ bool validId = false; ++ ++ // Check for Message ID in each of the selected Registry ++ for (const std::string& it : registryPrefix) ++ { ++ const boost::beast::span< ++ const redfish::message_registries::MessageEntry> ++ registry = ++ redfish::message_registries::getRegistryFromPrefix( ++ it); ++ ++ if (std::any_of( ++ registry.cbegin(), registry.cend(), ++ [&id]( ++ const redfish::message_registries::MessageEntry& ++ messageEntry) { ++ return !id.compare(messageEntry.first); ++ })) ++ { ++ validId = true; ++ break; ++ } ++ } ++ ++ if (!validId) ++ { ++ messages::propertyValueNotInList(res, id, "MessageIds"); ++ res.end(); ++ return false; ++ } ++ } ++ } ++ } ++ + std::shared_ptr<redfish::Subscription> subValue = + std::make_shared<redfish::Subscription>(std::move(conn)); + + // GET on this URI means, Its SSE subscriptionType. +- subValue->subscriptionType = redfish::subscriptionTypeSSE; +- +- // TODO: parse $filter query params and fill config. ++ subValue->subscriptionType = subscriptionTypeSSE; + subValue->protocol = "Redfish"; + subValue->retryPolicy = "TerminateAfterRetries"; +- subValue->eventFormatType = "Event"; ++ subValue->eventFormatType = eventFormatType; ++ subValue->registryMsgIds = msgIds; ++ subValue->registryPrefixes = regPrefixes; ++ subValue->metricReportDefinitions = mrdsArray; + + std::string id = + redfish::EventServiceManager::getInstance().addSubscription(subValue, +diff --git a/redfish-core/include/error_messages.hpp b/redfish-core/include/error_messages.hpp +index 3d11cc4..90084e3 100644 +--- a/redfish-core/include/error_messages.hpp ++++ b/redfish-core/include/error_messages.hpp +@@ -971,6 +971,15 @@ nlohmann::json mutualExclusiveProperties(const std::string& arg1, + void mutualExclusiveProperties(crow::Response& res, const std::string& arg1, + const std::string& arg2); + ++/** ++ * @brief Formats InvalidQueryFilter message into JSON ++ * Message body: "The requested URL contains the invalid query filters" ++ * ++ * @returns Message InvalidQueryFilter formatted to JSON */ ++nlohmann::json invalidQueryFilter(); ++ ++void invalidQueryFilter(crow::Response& res); ++ + } // namespace messages + + } // namespace redfish +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index dd833ce..861f4cb 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -55,6 +55,11 @@ static constexpr const char* eventServiceFile = + static constexpr const uint8_t maxNoOfSubscriptions = 20; + static constexpr const uint8_t maxNoOfSSESubscriptions = 10; + ++static constexpr const std::array<const char*, 2> supportedEvtFormatTypes = { ++ eventFormatType, metricReportFormatType}; ++static constexpr const std::array<const char*, 2> supportedRegPrefixes = { ++ "OpenBMC", "TaskEvent"}; ++ + #ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES + static std::optional<boost::asio::posix::stream_descriptor> inotifyConn; + static constexpr const char* redfishEventLogDir = "/var/log"; +diff --git a/redfish-core/lib/event_service.hpp b/redfish-core/lib/event_service.hpp +index 249e594..6f01707 100644 +--- a/redfish-core/lib/event_service.hpp ++++ b/redfish-core/lib/event_service.hpp +@@ -21,11 +21,6 @@ + + namespace redfish + { +- +-static constexpr const std::array<const char*, 2> supportedEvtFormatTypes = { +- eventFormatType, metricReportFormatType}; +-static constexpr const std::array<const char*, 3> supportedRegPrefixes = { +- "Base", "OpenBMC", "TaskEvent"}; + static constexpr const std::array<const char*, 3> supportedRetryPolicies = { + "TerminateAfterRetries", "SuspendRetries", "RetryForever"}; + +diff --git a/redfish-core/src/error_messages.cpp b/redfish-core/src/error_messages.cpp +index 9c28e8f..2394398 100644 +--- a/redfish-core/src/error_messages.cpp ++++ b/redfish-core/src/error_messages.cpp +@@ -2173,6 +2173,32 @@ void mutualExclusiveProperties(crow::Response& res, const std::string& arg1, + addMessageToErrorJson(res.jsonValue, mutualExclusiveProperties(arg1, arg2)); + } + ++/** ++ * @internal ++ * @brief Formats InvalidQueryFilter into JSON ++ * ++ * See header file for more information ++ * @endinternal ++ */ ++nlohmann::json invalidQueryFilter() ++{ ++ return nlohmann::json{ ++ {"@odata.type", "#Message.v1_0_0.Message"}, ++ {"MessageId", "Base.1.5.0.InvalidQueryFilter"}, ++ {"Message", "The requested url contains the invalid query filter."}, ++ {"MessageArgs", nlohmann::json::array()}, ++ {"Severity", "Warning"}, ++ {"Resolution", ++ "Ensure the correct query filter is specified in requested url " ++ "and resubmit the request."}}; ++} ++ ++void invalidQueryFilter(crow::Response& res) ++{ ++ res.result(boost::beast::http::status::bad_request); ++ addMessageToErrorJson(res.jsonValue, invalidQueryFilter()); ++} ++ + } // namespace messages + + } // namespace redfish +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0007-EventService-Log-events-for-subscription-actions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0007-EventService-Log-events-for-subscription-actions.patch new file mode 100644 index 000000000..3be65ee2a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0007-EventService-Log-events-for-subscription-actions.patch @@ -0,0 +1,132 @@ +From b8eb53886106e44e3668857b13f8642d2ad3cfbf Mon Sep 17 00:00:00 2001 +From: AppaRao Puli <apparao.puli@linux.intel.com> +Date: Fri, 27 Aug 2021 16:02:01 +0000 +Subject: [PATCH] EventService: Log events for subscription actions + +Log redfish event for below 3 actions + - Add new subscription + - Update existing subscription properties + - Delete existing subscription +in order to notify the subscribed clients on the subscription related +information. + +Modified method name accordingly to indicate the clear purpose and +added updateSubscription method with subscription id param +to log event for subscription update. + +Tested: + - Performed all the above actions and verified the redfish event + messages are logged. + +Change-Id: I3745fa6357bd215379781a9818d9acc02a853d79 +Signed-off-by: AppaRao Puli <apparao.puli@intel.com> +Signed-off-by: Ayushi Smriti <smriti.ayushi@intel.com> +--- + .../include/event_service_manager.hpp | 35 ++++++++++++++++--- + redfish-core/lib/event_service.hpp | 2 +- + 2 files changed, 32 insertions(+), 5 deletions(-) + +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index c3e7f61..e9bdbfa 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -21,6 +21,7 @@ + #include "registries/task_event_message_registry.hpp" + + #include <sys/inotify.h> ++#include <systemd/sd-journal.h> + + #include <boost/asio/io_context.hpp> + #include <boost/beast/core/span.hpp> +@@ -788,7 +789,7 @@ class EventServiceManager + } + } + +- void updateSubscriptionData() ++ void persistSubscriptionData() + { + persistent_data::EventServiceStore::getInstance() + .eventServiceConfig.enabled = serviceEnabled; +@@ -835,7 +836,7 @@ class EventServiceManager + + if (updateConfig) + { +- updateSubscriptionData(); ++ persistSubscriptionData(); + } + + if (updateRetryCfg) +@@ -947,7 +948,7 @@ class EventServiceManager + + if (updateFile) + { +- updateSubscriptionData(); ++ persistSubscriptionData(); + } + + #ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES +@@ -962,6 +963,13 @@ class EventServiceManager + + // Set Subscription ID for back trace + subValue->setSubscriptionId(id); ++ ++ /* Log event for subscription addition */ ++ sd_journal_send("MESSAGE=Event subscription added(Id: %s)", id.c_str(), ++ "PRIORITY=%i", LOG_INFO, "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.EventSubscriptionAdded", ++ "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL); ++ + return id; + } + +@@ -986,7 +994,14 @@ class EventServiceManager + persistent_data::EventServiceStore::getInstance() + .subscriptionsConfigMap.erase(obj2); + updateNoOfSubscribersCount(); +- updateSubscriptionData(); ++ ++ persistSubscriptionData(); ++ /* Log event for subscription delete. */ ++ sd_journal_send("MESSAGE=Event subscription removed.(Id = %s)", ++ id.c_str(), "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.EventSubscriptionRemoved", ++ "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL); + } + } + +@@ -1008,6 +1023,18 @@ class EventServiceManager + } + } + ++ void updateSubscription(const std::string& id) ++ { ++ persistSubscriptionData(); ++ ++ /* Log event for subscription update. */ ++ sd_journal_send("MESSAGE=Event subscription updated.(Id = %s)", ++ id.c_str(), "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.EventSubscriptionUpdated", ++ "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL); ++ } ++ + size_t getNumberOfSubscriptions() + { + return subscriptionsMap.size(); +diff --git a/redfish-core/lib/event_service.hpp b/redfish-core/lib/event_service.hpp +index 9def549..6a8421f 100644 +--- a/redfish-core/lib/event_service.hpp ++++ b/redfish-core/lib/event_service.hpp +@@ -617,7 +617,7 @@ inline void requestRoutesEventDestination(App& app) + subValue->updateRetryPolicy(); + } + +- EventServiceManager::getInstance().updateSubscriptionData(); ++ EventServiceManager::getInstance().updateSubscription(param); + }); + BMCWEB_ROUTE(app, "/redfish/v1/EventService/Subscriptions/<str>/") + // The below privilege is wrong, it should be ConfigureManager OR +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0008-Add-checks-on-Event-Subscription-input-parameters.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0008-Add-checks-on-Event-Subscription-input-parameters.patch new file mode 100644 index 000000000..84ceb4ba8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0008-Add-checks-on-Event-Subscription-input-parameters.patch @@ -0,0 +1,85 @@ +From 05fdea2bb8e486b058d137a067ce1f5c885d2a96 Mon Sep 17 00:00:00 2001 +From: Nitin Wankhade <nitinx.arunrao.wankhade@intel.com> +Date: Mon, 28 Jun 2021 19:59:57 +0000 +Subject: [PATCH] Add checks on Event Subscription input parameters + +There is no check on the size of input parameters(Context, +Destination and Header) during Event Subscription.This +creates out of memory situation. +This commit checks for the size of input parameters and +rejects if it is exceeding the input size limits. + +Tested + - Validated using POST on Event Subscription. + - When Context, Destination and Headers were too long, + received a error message denoting the same. + +Change-Id: Iec2cd766c0e137b72706fc2da468d4fefd8fbaae +Signed-off-by: Nitin Wankhade <nitinx.arunrao.wankhade@intel.com> +--- + redfish-core/lib/event_service.hpp | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +diff --git a/redfish-core/lib/event_service.hpp b/redfish-core/lib/event_service.hpp +index 52b01e5..f8a1671 100644 +--- a/redfish-core/lib/event_service.hpp ++++ b/redfish-core/lib/event_service.hpp +@@ -19,6 +19,10 @@ + #include <app.hpp> + #include <registries/privilege_registry.hpp> + ++#define MAX_CONTEXT_SIZE 256 ++#define MAX_DESTINATION_SIZE 1024 ++#define MAX_HEADER_SIZE 8096 ++ + namespace redfish + { + static constexpr const std::array<const char*, 3> supportedRetryPolicies = { +@@ -220,6 +224,12 @@ inline void requestRoutesEventDestinationCollection(App& app) + return; + } + ++ if (destUrl.size() > MAX_DESTINATION_SIZE) ++ { ++ messages::propertySizeExceeded(asyncResp->res, "Destination"); ++ return; ++ } ++ + if (regPrefixes && msgIds) + { + if (regPrefixes->size() && msgIds->size()) +@@ -330,11 +340,31 @@ inline void requestRoutesEventDestinationCollection(App& app) + + if (context) + { ++ if (context->size() > MAX_CONTEXT_SIZE) ++ { ++ messages::propertySizeExceeded(asyncResp->res, "Context"); ++ return; ++ } + subValue->customText = *context; + } + + if (headers) + { ++ size_t cumulativeLen = 0; ++ ++ for (nlohmann::json& itr : *headers) ++ { ++ std::string hdr{itr.dump( ++ -1, ' ', true, nlohmann::json::error_handler_t::replace)}; ++ cumulativeLen += hdr.length(); ++ ++ if (cumulativeLen > MAX_HEADER_SIZE) ++ { ++ messages::propertySizeExceeded(asyncResp->res, ++ "HttpHeaders"); ++ return; ++ } ++ } + subValue->httpHeaders = *headers; + } + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0009-Restructure-Redifsh-EventLog-Transmit-code-flow.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0009-Restructure-Redifsh-EventLog-Transmit-code-flow.patch new file mode 100644 index 000000000..d1fe475f5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0009-Restructure-Redifsh-EventLog-Transmit-code-flow.patch @@ -0,0 +1,225 @@ +From 542505dff60e3921b00b51acae882e207d46f1a6 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Wed, 14 Jul 2021 14:13:11 +0000 +Subject: [PATCH] Restructure Redfish EventLog Transmit code flow + +In the current implementation: + 1. When Event service is disabled and enabled back after a while, + all the logs during this time span between disable to enable + are dumped to the Event listener. + 2. When two events occur very close (in terms of microseconds) + and they trigger two different iNotify events, the listener + receives both of these events with the same Event ID. + +This occurs as the last log time stamp read from redfish file +and previous time stamp used to generate Event ID's are not +being updated continuously. + +This commit fixes this issue by tweaking the logic to continuously +update the time stamp values (even during when Event Service is +disabled), and also replaces multiple string operations with file +operations. i.e. Instead of looping through the entire Redfish file +until last time stamp read is reached, this fix makes use of +fseek to get to the last read position. + +Tested: + - Subscribed to an event and successfully received Event Logs. + - No Event Logs were received when Event Service was disabled. + - No Dump of past Events after Event Service was enabled. + - Redfish Validator passed + +Change-Id: I87136bee78076b1b3219930813702b3b9d20c157 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + .../include/event_service_manager.hpp | 108 ++++++++++++------ + 1 file changed, 76 insertions(+), 32 deletions(-) + +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index e9bdbfa..5c4de70 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -134,15 +134,10 @@ static const Message* formatMessage(const std::string_view& messageID) + + namespace event_log + { +-inline bool getUniqueEntryID(const std::string& logEntry, std::string& entryID, +- const bool firstEntry = true) ++inline bool getUniqueEntryID(const std::string& logEntry, std::string& entryID) + { + static time_t prevTs = 0; + static int index = 0; +- if (firstEntry) +- { +- prevTs = 0; +- } + + // Get the entry timestamp + std::time_t curTs = 0; +@@ -621,6 +616,7 @@ class EventServiceManager + } + + std::string lastEventTStr; ++ std::streampos redfishLogFilePosition{0}; + size_t noOfEventLogSubscribers{0}; + size_t noOfMetricReportSubscribers{0}; + std::shared_ptr<sdbusplus::bus::match::match> matchTelemetryMonitor; +@@ -1163,7 +1159,22 @@ class EventServiceManager + #ifndef BMCWEB_ENABLE_REDFISH_DBUS_LOG_ENTRIES + void cacheLastEventTimestamp() + { +- lastEventTStr.clear(); ++ // Control comes here when : ++ // 1. Subscription is added and lastEventTStr is empty ++ // 2. lastEventTStr is empty ++ // 3. When a new Redfish file is created ++ ++ if (!lastEventTStr.empty()) ++ { ++ // Control would be here when Redfish file is created. ++ // Reset File Position as new file is created ++ redfishLogFilePosition = 0; ++ return; ++ } ++ ++ // Open the redfish file and read till the last record to get the ++ // last event's time stamp. ++ + std::ifstream logStream(redfishEventLogFile); + if (!logStream.good()) + { +@@ -1171,27 +1182,44 @@ class EventServiceManager + return; + } + std::string logEntry; ++ std::string prev_logEntry; + while (std::getline(logStream, logEntry)) + { +- size_t space = logEntry.find_first_of(' '); +- if (space == std::string::npos) +- { +- // Shouldn't enter here but lets skip it. +- BMCWEB_LOG_DEBUG << "Invalid log entry found."; +- continue; +- } +- lastEventTStr = logEntry.substr(0, space); ++ prev_logEntry = logEntry; ++ redfishLogFilePosition = logStream.tellg(); ++ } ++ ++ if (prev_logEntry.empty()) ++ { ++ BMCWEB_LOG_ERROR ++ << "Last Event Time Stamp Caching Failed : No Records"; ++ redfishLogFilePosition = 0; ++ return; ++ } ++ ++ size_t space = prev_logEntry.find_first_of(' '); ++ if (space == std::string::npos) ++ { ++ // Shouldn't enter here but lets skip it. ++ BMCWEB_LOG_DEBUG << "Invalid log entry found."; ++ BMCWEB_LOG_ERROR << "Last Event Time Stamp Caching Failed"; ++ return; + } ++ lastEventTStr = prev_logEntry.substr(0, space); + BMCWEB_LOG_DEBUG << "Last Event time stamp set: " << lastEventTStr; ++ BMCWEB_LOG_DEBUG << "Next Log Position : " << redfishLogFilePosition; + } + + void readEventLogsFromFile() + { +- if (!serviceEnabled || !noOfEventLogSubscribers) ++ if (lastEventTStr.empty()) + { +- BMCWEB_LOG_DEBUG << "EventService disabled or no Subscriptions."; +- return; ++ // Shouldn't ideally enter here. ++ // Last event Time stamp would be set by now. ++ // Just incase of any failures before. ++ cacheLastEventTimestamp(); + } ++ + std::ifstream logStream(redfishEventLogFile); + if (!logStream.good()) + { +@@ -1201,27 +1229,21 @@ class EventServiceManager + + std::vector<EventLogObjectsType> eventRecords; + +- bool startLogCollection = false; +- bool firstEntry = true; +- + std::string logEntry; ++ ++ // Get the read pointer to the next log to be read. ++ logStream.seekg(redfishLogFilePosition); ++ + while (std::getline(logStream, logEntry)) + { +- if (!startLogCollection && !lastEventTStr.empty()) +- { +- if (boost::starts_with(logEntry, lastEventTStr)) +- { +- startLogCollection = true; +- } +- continue; +- } ++ // Update Pointer position ++ redfishLogFilePosition = logStream.tellg(); + + std::string idStr; +- if (!event_log::getUniqueEntryID(logEntry, idStr, firstEntry)) ++ if (!event_log::getUniqueEntryID(logEntry, idStr)) + { + continue; + } +- firstEntry = false; + + std::string timestamp; + std::string messageID; +@@ -1233,6 +1255,16 @@ class EventServiceManager + continue; + } + ++ lastEventTStr = timestamp; ++ ++ if (!serviceEnabled || !noOfEventLogSubscribers) ++ { ++ // If Service is not enabled, no need to compute ++ // the remaining items below. ++ // But, Loop must continue to keep track of Timestamp ++ continue; ++ } ++ + std::string registryName; + std::string messageKey; + event_log::getRegistryAndMessageKey(messageID, registryName, +@@ -1242,11 +1274,23 @@ class EventServiceManager + continue; + } + +- lastEventTStr = timestamp; + eventRecords.emplace_back(idStr, timestamp, messageID, registryName, + messageKey, messageArgs); + } + ++ if (!serviceEnabled || !noOfEventLogSubscribers) ++ { ++ BMCWEB_LOG_DEBUG << "EventService disabled or no Subscriptions."; ++ return; ++ } ++ ++ if (eventRecords.empty()) ++ { ++ // No Records to send ++ BMCWEB_LOG_DEBUG << "No log entries available to be transferred."; ++ return; ++ } ++ + for (const auto& it : this->subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0010-Remove-Terminated-Event-Subscriptions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0010-Remove-Terminated-Event-Subscriptions.patch new file mode 100644 index 000000000..9af5a066b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0010-Remove-Terminated-Event-Subscriptions.patch @@ -0,0 +1,258 @@ +From f665ba085bb2310f008b7534f827fb401ad973c2 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Tue, 12 Oct 2021 08:19:51 +0000 +Subject: [PATCH] Delete/Remove Terminated Event Subscription(s) + +Added functionality to delete/remove event subscription(s) which are +configured to Terminate after retries. + +Currently, when an Event is subscribed with Retry Policy as +"TerminateAfterRetries", the state of the connection is set to +"Terminated" after retrying, but the Subscription is not removed. +This commit adds the functionality to detect terminated connection and +remove the respective subscription. + +Tested: + - Created a Subscription with + DeliveryRetryPolicy: "TerminateAfterRetries" + - Received Events successfully on Event listener + - Once the Event listener was stopped, the Subscription was + removed/deleted after retries. + +Change-Id: If447acb2db74fb29a5d1cfe6194b77cda82bc8a1 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/http_client.hpp | 43 +++++++++++++++---- + .../include/event_service_manager.hpp | 36 ++++++++++++++++ + 2 files changed, 70 insertions(+), 9 deletions(-) + +diff --git a/http/http_client.hpp b/http/http_client.hpp +index 5e7ff47..54ae2c3 100644 +--- a/http/http_client.hpp ++++ b/http/http_client.hpp +@@ -55,6 +55,8 @@ enum class ConnState + closeInProgress, + closed, + suspended, ++ terminate, ++ terminateInProgress, + terminated, + abortConnection, + retry +@@ -288,7 +290,14 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + } + void doClose() + { +- state = ConnState::closeInProgress; ++ if (state == ConnState::terminate) ++ { ++ state = ConnState::terminateInProgress; ++ } ++ else if (state != ConnState::suspended) ++ { ++ state = ConnState::closeInProgress; ++ } + + // Set the timeout on the tcp stream socket for the async operation + conn.expires_after(std::chrono::seconds(30)); +@@ -318,8 +327,11 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + } + self->conn.close(); + +- if ((self->state != ConnState::suspended) && +- (self->state != ConnState::terminated)) ++ if (self->state == ConnState::terminateInProgress) ++ { ++ self->state = ConnState::terminated; ++ } ++ else if (self->state == ConnState::closeInProgress) + { + self->state = ConnState::closed; + self->handleConnState(); +@@ -341,8 +353,11 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + } + conn.close(); + +- if ((state != ConnState::suspended) && +- (state != ConnState::terminated)) ++ if (state == ConnState::terminateInProgress) ++ { ++ state = ConnState::terminated; ++ } ++ else if (state == ConnState::closeInProgress) + { + state = ConnState::closed; + handleConnState(); +@@ -365,8 +380,7 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + BMCWEB_LOG_DEBUG << "Retry policy: " << retryPolicyAction; + if (retryPolicyAction == "TerminateAfterRetries") + { +- // TODO: delete subscription +- state = ConnState::terminated; ++ state = ConnState::terminate; + } + if (retryPolicyAction == "SuspendRetries") + { +@@ -423,6 +437,7 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + case ConnState::sendInProgress: + case ConnState::recvInProgress: + case ConnState::closeInProgress: ++ case ConnState::terminateInProgress: + { + BMCWEB_LOG_DEBUG << "Async operation is already in progress"; + break; +@@ -439,7 +454,7 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + break; + } + case ConnState::suspended: +- case ConnState::terminated: ++ case ConnState::terminate: + { + doClose(); + break; +@@ -506,7 +521,8 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + } + void sendData(const std::string& data) + { +- if ((state == ConnState::suspended) || (state == ConnState::terminated)) ++ if ((state == ConnState::terminate) || ++ (state == ConnState::terminated) || (state == ConnState::suspended)) + { + return; + } +@@ -524,6 +540,15 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + return; + } + ++ bool isTerminated() ++ { ++ if (state == ConnState::terminated) ++ { ++ return true; ++ } ++ return false; ++ } ++ + void addHeaders( + const std::vector<std::pair<std::string, std::string>>& httpHeaders) + { +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 6f60a31..363adb0 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -591,6 +591,14 @@ class Subscription : public persistent_data::UserSubscription + return std::nullopt; + } + ++ bool isTerminated() ++ { ++ if (conn != nullptr) ++ return conn->isTerminated(); ++ ++ return false; ++ } ++ + private: + std::shared_ptr<crow::SseConnection> sseConn = nullptr; + uint64_t eventSeqNum; +@@ -847,6 +855,22 @@ class EventServiceManager + } + } + ++ void deleteTerminatedSubcriptions() ++ { ++ boost::container::flat_map<std::string, ++ std::shared_ptr<Subscription>>::iterator it = ++ subscriptionsMap.begin(); ++ while (it != subscriptionsMap.end()) ++ { ++ std::shared_ptr<Subscription> entry = it->second; ++ if (entry->isTerminated()) ++ { ++ subscriptionsMap.erase(it); ++ } ++ it++; ++ } ++ } ++ + void updateNoOfSubscribersCount() + { + size_t eventLogSubCount = 0; +@@ -881,6 +905,7 @@ class EventServiceManager + + std::shared_ptr<Subscription> getSubscription(const std::string& id) + { ++ deleteTerminatedSubcriptions(); + auto obj = subscriptionsMap.find(id); + if (obj == subscriptionsMap.end()) + { +@@ -971,6 +996,7 @@ class EventServiceManager + + bool isSubscriptionExist(const std::string& id) + { ++ deleteTerminatedSubcriptions(); + auto obj = subscriptionsMap.find(id); + if (obj == subscriptionsMap.end()) + { +@@ -1033,6 +1059,7 @@ class EventServiceManager + + size_t getNumberOfSubscriptions() + { ++ deleteTerminatedSubcriptions(); + return subscriptionsMap.size(); + } + +@@ -1049,6 +1076,7 @@ class EventServiceManager + + std::vector<std::string> getAllIDs() + { ++ deleteTerminatedSubcriptions(); + std::vector<std::string> idList; + for (const auto& it : subscriptionsMap) + { +@@ -1059,6 +1087,7 @@ class EventServiceManager + + bool isDestinationExist(const std::string& destUrl) + { ++ deleteTerminatedSubcriptions(); + for (const auto& it : subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +@@ -1073,6 +1102,7 @@ class EventServiceManager + + void sendTestEventLog() + { ++ deleteTerminatedSubcriptions(); + for (const auto& it : this->subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +@@ -1100,6 +1130,8 @@ class EventServiceManager + } + eventRecord.push_back(eventMessage); + ++ deleteTerminatedSubcriptions(); ++ + for (const auto& it : this->subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +@@ -1143,6 +1175,8 @@ class EventServiceManager + } + void sendBroadcastMsg(const std::string& broadcastMsg) + { ++ deleteTerminatedSubcriptions(); ++ + for (const auto& it : this->subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +@@ -1291,6 +1325,8 @@ class EventServiceManager + return; + } + ++ deleteTerminatedSubcriptions(); ++ + for (const auto& it : this->subscriptionsMap) + { + std::shared_ptr<Subscription> entry = it.second; +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0011-Fix-bmcweb-crash-while-deleting-terminated-subscriptions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0011-Fix-bmcweb-crash-while-deleting-terminated-subscriptions.patch new file mode 100644 index 000000000..585f7bf09 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/0011-Fix-bmcweb-crash-while-deleting-terminated-subscriptions.patch @@ -0,0 +1,141 @@ +From 5b87bb61b58e92a8c5af37a7959347747409a65c Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Thu, 14 Oct 2021 02:56:11 +0530 +Subject: [PATCH] Fix bmcweb crash while deleting terminated subscriptions + +This commit fixes bmcweb crash while deleting the terminated +subscriptions. In the earlier implementation, detection of subscription +to be deleted and the deletion(erase) was happening in the same loop. +Due to this, if the Subscription to be deleted is the last one in the +list, the loop will enter into infinite loop. The fix is to keep the +detection and deletion loop separate. +Also, this commit adds code to : + - Delete from persistent storage + - Add journal entry for deleted entry + - update number of subcribers and update persistent storage. + +Apart from this, this commit also moves the retry timer check to the top +to avoid multiple calls to close when the retry count is 3 and timer is +running. + +Tested: + - Checked journal logs to confirm each retry is actually spanned to be + 30 secs + - Verified Journal entry for deleted subscription after retires. + - Verified Event service functionality by making three subscriptions: + retry for ever, terminate after retires and suspend after retries. + +Change-Id: I425a6c749923ce86c457a36394deb0fbbee232db +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/http_client.hpp | 11 ++-- + .../include/event_service_manager.hpp | 59 ++++++++++++++++--- + 2 files changed, 58 insertions(+), 12 deletions(-) + +diff --git a/http/http_client.hpp b/http/http_client.hpp +index 54ae2c3..162cb09 100644 +--- a/http/http_client.hpp ++++ b/http/http_client.hpp +@@ -367,6 +367,12 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + + void waitAndRetry() + { ++ if (runningTimer) ++ { ++ BMCWEB_LOG_DEBUG << "Retry timer is already running."; ++ return; ++ } ++ + if (retryCount >= maxRetryAttempts) + { + BMCWEB_LOG_ERROR << "Maximum number of retries reached."; +@@ -393,11 +399,6 @@ class HttpClient : public std::enable_shared_from_this<HttpClient> + return; + } + +- if (runningTimer) +- { +- BMCWEB_LOG_DEBUG << "Retry timer is already running."; +- return; +- } + runningTimer = true; + + retryCount++; +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 363adb0..7af7a4d 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -857,18 +857,63 @@ class EventServiceManager + + void deleteTerminatedSubcriptions() + { +- boost::container::flat_map<std::string, +- std::shared_ptr<Subscription>>::iterator it = +- subscriptionsMap.begin(); +- while (it != subscriptionsMap.end()) ++ BMCWEB_LOG_ERROR << "Map size Before Delete : " ++ << subscriptionsMap.size(); ++ ++ std::vector<std::string> deleteIds; ++ ++ // Determine Subscription ID's to be deleted. ++ for (const auto& it : subscriptionsMap) + { +- std::shared_ptr<Subscription> entry = it->second; ++ std::shared_ptr<Subscription> entry = it.second; + if (entry->isTerminated()) + { +- subscriptionsMap.erase(it); ++ deleteIds.emplace_back(it.first); ++ } ++ } ++ ++ // Delete the Terminated Subcriptions ++ for (std::string& id : deleteIds) ++ { ++ auto map1 = subscriptionsMap.find(id); ++ if (map1 != subscriptionsMap.end()) ++ { ++ subscriptionsMap.erase(map1); ++ auto map2 = persistent_data::EventServiceStore::getInstance() ++ .subscriptionsConfigMap.find(id); ++ if (map2 != persistent_data::EventServiceStore::getInstance() ++ .subscriptionsConfigMap.end()) ++ { ++ persistent_data::EventServiceStore::getInstance() ++ .subscriptionsConfigMap.erase(map2); ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Couldn't find ID: " << id ++ << " in subscriptionsConfigMap"; ++ } ++ ++ /* Log event for subscription delete. */ ++ sd_journal_send("MESSAGE=Event subscription removed.(Id = %s)", ++ id.c_str(), "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.EventSubscriptionRemoved", ++ "REDFISH_MESSAGE_ARGS=%s", id.c_str(), NULL); ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Couldn't find ID: " << id ++ << " in subscriptionsMap"; + } +- it++; + } ++ if (deleteIds.size()) ++ { ++ updateNoOfSubscribersCount(); ++ persistSubscriptionData(); ++ } ++ ++ BMCWEB_LOG_ERROR << "Map size After Delete : " ++ << subscriptionsMap.size(); + } + + void updateNoOfSubscribersCount() +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/README b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/README new file mode 100644 index 000000000..c09967456 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/eventservice/README @@ -0,0 +1,34 @@ +Eventservice specific patches: Temporary pulling down +the upstream patches. These will be remove as soon as +thee gets merged upstream. + +Upstream revision information: + - EventService : Add unmerged changes for http retry support (Downstream patch) + file://eventservice/0001-Add-unmerged-changes-for-http-retry-support.patch + + - EventService: https client support + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/31735/40 (Rebased on latest bmcweb) + + - Add Server-Sent-Events support + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/41258/9 + + - Add SSE style subscription support to eventservice + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/41319/10 + + - Add EventService SSE filter support + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/41349/7 (Modified boost::urls::query_params_view to boost::urls::url_view::params_type) + + - EventService Log events for subscription actions (Downstream patch) + file://eventservice/0007-EventService-Log-events-for-subscription-actions.patch + + - Add checks on Event-Subscription input parameters (Downstream patch) + file://eventservice//0008-Add-checks-on-Event-Subscription-input-parameters.patch + + - Restructure Redifsh EventLog Transmit code flow + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/44449/3 + + - Remove Terminated Event Subscriptions (Downstream patch) + file://eventservice/0010-Remove-Terminated-Event-Subscriptions.patch + + - Fix bmcweb crash while deleting terminated subscriptions (Downstream patch) + file://eventservice/0011-Fix-bmcweb-crash-while-deleting-terminated-subscriptions.patch diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0001-Add-asyncResp-support-during-handleUpgrade.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0001-Add-asyncResp-support-during-handleUpgrade.patch new file mode 100644 index 000000000..b3aa11774 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0001-Add-asyncResp-support-during-handleUpgrade.patch @@ -0,0 +1,202 @@ +From f2c3271c8eb405a05a3ec383791e1adc3c4a7f86 Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 18 Oct 2021 22:45:37 +0530 +Subject: [PATCH] Add asyncResp support during handleUpgrade + +The current implementation uses the earlier method of using the response +object and calling response.end() to initiate completion handler. +This commit modifies the implementation to use asyncResp, where the +completion handler gets called asynchronously as the response object +goes out of scope. + +Tested : + - websocket_test.py Passed + - KVM was functional in WebUI. + - POST to /redfish/v1/EventService/Subscriptions/SSE returned an error + message as expected and the connection was kept alive. + - GET on /redfish/v1/EventService/Subscriptions/SSE (SSE subscription) + was successful. The existing connection was successfully closed and + upgraded to SSE connection. + +Change-Id: I2d76b34a49a6432c507d939b21b37c1ced761f8e +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/app.hpp | 6 ++++-- + http/http_connection.hpp | 30 +++++++++++++++++++++++++----- + http/routing.hpp | 37 +++++++++++++++++++++---------------- + 3 files changed, 50 insertions(+), 23 deletions(-) + +diff --git a/http/app.hpp b/http/app.hpp +index 4735197..c46dcf7 100644 +--- a/http/app.hpp ++++ b/http/app.hpp +@@ -45,9 +45,11 @@ class App + } + + template <typename Adaptor> +- void handleUpgrade(const Request& req, Response& res, Adaptor&& adaptor) ++ void handleUpgrade(const Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ Adaptor&& adaptor) + { +- router.handleUpgrade(req, res, std::move(adaptor)); ++ router.handleUpgrade(req, asyncResp, std::move(adaptor)); + } + + void handle(Request& req, +diff --git a/http/http_connection.hpp b/http/http_connection.hpp +index 9d53c17..cdd3707 100644 +--- a/http/http_connection.hpp ++++ b/http/http_connection.hpp +@@ -361,6 +361,7 @@ class Connection : + boost::asio::post(self->adaptor.get_executor(), + [self] { self->completeRequest(); }); + }); ++ auto asyncResp = std::make_shared<bmcweb::AsyncResp>(res); + + if ((thisReq.isUpgrade() && + boost::iequals( +@@ -369,13 +370,32 @@ class Connection : + (req->url == "/redfish/v1/EventService/Subscriptions/SSE")) + { + BMCWEB_LOG_DEBUG << "Request: " << this << " is getting upgraded"; +- handler->handleUpgrade(thisReq, res, std::move(adaptor)); +- // delete lambda with self shared_ptr +- // to enable connection destruction +- res.setCompleteRequestHandler(nullptr); ++ res.setCompleteRequestHandler([self(shared_from_this())] { ++ if (self->res.resultInt() != 200) ++ { ++ // When any error occurs during handle upgradation, ++ // the result in response will be set to respective ++ // error. By default the Result will be OK (200), ++ // which implies successful handle upgrade. Response ++ // needs to be sent over this connection only on ++ // failure. ++ boost::asio::post(self->adaptor.get_executor(), ++ [self] { self->completeRequest(); }); ++ } ++ else ++ { ++ // Set Complete request handler to NULL to remove ++ // the shared pointer of connection to enable ++ // connection destruction. As the connection would ++ // get upgraded, we wouldn't need this connection ++ // any longer ++ self->res.setCompleteRequestHandler(nullptr); ++ } ++ }); ++ handler->handleUpgrade(thisReq, asyncResp, std::move(adaptor)); + return; + } +- auto asyncResp = std::make_shared<bmcweb::AsyncResp>(res); ++ + handler->handle(thisReq, asyncResp); + } + +diff --git a/http/routing.hpp b/http/routing.hpp +index 25e4ce8..858f146 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -1202,12 +1202,13 @@ class Router + } + + template <typename Adaptor> +- void handleUpgrade(const Request& req, Response& res, Adaptor&& adaptor) ++ void handleUpgrade(const Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ Adaptor&& adaptor) + { + if (static_cast<size_t>(req.method()) >= perMethods.size()) + { +- res.result(boost::beast::http::status::not_found); +- res.end(); ++ asyncResp->res.result(boost::beast::http::status::not_found); + return; + } + +@@ -1220,8 +1221,7 @@ class Router + if (!ruleIndex) + { + BMCWEB_LOG_DEBUG << "Cannot match rules " << req.url; +- res.result(boost::beast::http::status::not_found); +- res.end(); ++ asyncResp->res.result(boost::beast::http::status::not_found); + return; + } + +@@ -1234,23 +1234,24 @@ class Router + { + BMCWEB_LOG_INFO << "Redirecting to a url with trailing slash: " + << req.url; +- res.result(boost::beast::http::status::moved_permanently); ++ asyncResp->res.result( ++ boost::beast::http::status::moved_permanently); + + // TODO absolute url building + if (req.getHeaderValue("Host").empty()) + { +- res.addHeader("Location", std::string(req.url) + "/"); ++ asyncResp->res.addHeader("Location", ++ std::string(req.url) + "/"); + } + else + { +- res.addHeader( ++ asyncResp->res.addHeader( + "Location", + req.isSecure + ? "https://" + : "http://" + std::string(req.getHeaderValue("Host")) + + std::string(req.url) + "/"); + } +- res.end(); + return; + } + +@@ -1261,8 +1262,7 @@ class Router + << " with " << req.methodString() << "(" + << static_cast<uint32_t>(req.method()) << ") / " + << rules[ruleIndex]->getMethods(); +- res.result(boost::beast::http::status::not_found); +- res.end(); ++ asyncResp->res.result(boost::beast::http::status::not_found); + return; + } + +@@ -1273,13 +1273,18 @@ class Router + // any uncaught exceptions become 500s + try + { +- rules[ruleIndex]->handleUpgrade(req, res, std::move(adaptor)); ++ // Creating temporary response object to call handleUpgrade ++ // We cannot pass the asyncResp as it will be destroyed ++ // The response object is not initialized as handleUpgrade wouldn't ++ // be using this object ++ crow::Response resp; ++ rules[ruleIndex]->handleUpgrade(req, resp, std::move(adaptor)); + } + catch (std::exception& e) + { + BMCWEB_LOG_ERROR << "An uncaught exception occurred: " << e.what(); +- res.result(boost::beast::http::status::internal_server_error); +- res.end(); ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); + return; + } + catch (...) +@@ -1287,8 +1292,8 @@ class Router + BMCWEB_LOG_ERROR + << "An uncaught exception occurred. The type was unknown " + "so no information was available."; +- res.result(boost::beast::http::status::internal_server_error); +- res.end(); ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); + return; + } + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0002-Move-privileges-to-separate-entity.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0002-Move-privileges-to-separate-entity.patch new file mode 100644 index 000000000..1217147b4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0002-Move-privileges-to-separate-entity.patch @@ -0,0 +1,109 @@ +From 6483f0af926391e8d1f256ba0f23f3640260cfd1 Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 18 Oct 2021 22:52:17 +0530 +Subject: [PATCH] Move privileges to separate entity + +The privilege property of a rule is currently part of RuleParameterTraits +structure. Moving this property (member function) out into a separate +entity PrivilegeParameterTraits. +This move is required to enable inheriting this entity into Weksockets +and SseSockets. + +Tested: + - bmcweb is functional and is responding to Redfish URI's + - User Privilege check for URI's is functional. + +Change-Id: I288ab12258c15ae5a626f4409fc3b4a9cc574ea3 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/routing.hpp | 53 +++++++++++++++++++++++++++--------------------- + 1 file changed, 30 insertions(+), 23 deletions(-) + +diff --git a/http/routing.hpp b/http/routing.hpp +index 858f146..acc99dc 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -102,6 +102,8 @@ class BaseRule + friend class Router; + template <typename T> + friend struct RuleParameterTraits; ++ template <typename T> ++ friend struct PrivilegeParameterTraits; + }; + + namespace detail +@@ -316,6 +318,33 @@ struct Wrapped + } // namespace routing_handler_call_helper + } // namespace detail + ++template <typename T> ++struct PrivilegeParameterTraits ++{ ++ using self_t = T; ++ self_t& privileges( ++ const std::initializer_list<std::initializer_list<const char*>>& p) ++ { ++ self_t* self = static_cast<self_t*>(this); ++ for (const std::initializer_list<const char*>& privilege : p) ++ { ++ self->privilegesSet.emplace_back(privilege); ++ } ++ return *self; ++ } ++ ++ template <size_t N, typename... MethodArgs> ++ self_t& privileges(const std::array<redfish::Privileges, N>& p) ++ { ++ self_t* self = static_cast<self_t*>(this); ++ for (const redfish::Privileges& privilege : p) ++ { ++ self->privilegesSet.emplace_back(privilege); ++ } ++ return *self; ++ } ++}; ++ + class WebSocketRule : public BaseRule + { + using self_t = WebSocketRule; +@@ -462,7 +491,7 @@ class SseSocketRule : public BaseRule + }; + + template <typename T> +-struct RuleParameterTraits ++struct RuleParameterTraits : public PrivilegeParameterTraits<T> + { + using self_t = T; + WebSocketRule& websocket() +@@ -503,28 +532,6 @@ struct RuleParameterTraits + self->methodsBitfield |= 1U << static_cast<size_t>(method); + return *self; + } +- +- self_t& privileges( +- const std::initializer_list<std::initializer_list<const char*>>& p) +- { +- self_t* self = static_cast<self_t*>(this); +- for (const std::initializer_list<const char*>& privilege : p) +- { +- self->privilegesSet.emplace_back(privilege); +- } +- return *self; +- } +- +- template <size_t N, typename... MethodArgs> +- self_t& privileges(const std::array<redfish::Privileges, N>& p) +- { +- self_t* self = static_cast<self_t*>(this); +- for (const redfish::Privileges& privilege : p) +- { +- self->privilegesSet.emplace_back(privilege); +- } +- return *self; +- } + }; + + class DynamicRule : public BaseRule, public RuleParameterTraits<DynamicRule> +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0003-Add-Support-for-privilege-check-in-handleUpgrade.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0003-Add-Support-for-privilege-check-in-handleUpgrade.patch new file mode 100644 index 000000000..1ba584616 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0003-Add-Support-for-privilege-check-in-handleUpgrade.patch @@ -0,0 +1,218 @@ +From aabe4718b8e6c1f7b91af29cbaf85d5fa1fa0a99 Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 18 Oct 2021 22:55:38 +0530 +Subject: [PATCH] Add Support for privilege check in handleUpgrade + +This commit enables privilege check for user(s) in case of upgraded +connections. +Currently users with no privileges will also be able to access +Websockets connections (Ex: KVM). + +Tested: + - websocket_test.py Passed + - Admin and Operator users were able to access KVM on WebUI + - Readonly User was unable to access KVM on WebUI + +Change-Id: Id9d33aeca24d8fafb2e9dcc28c46a48930740cd6 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/app.hpp | 2 +- + http/routing.hpp | 162 +++++++++++++++++++++++++++++++++++++++-------- + 2 files changed, 136 insertions(+), 28 deletions(-) + +diff --git a/http/app.hpp b/http/app.hpp +index c46dcf7..dd51eee 100644 +--- a/http/app.hpp ++++ b/http/app.hpp +@@ -45,7 +45,7 @@ class App + } + + template <typename Adaptor> +- void handleUpgrade(const Request& req, ++ void handleUpgrade(Request& req, + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + Adaptor&& adaptor) + { +diff --git a/http/routing.hpp b/http/routing.hpp +index acc99dc..e2a8fbb 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -1209,7 +1209,7 @@ class Router + } + + template <typename Adaptor> +- void handleUpgrade(const Request& req, ++ void handleUpgrade(Request& req, + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + Adaptor&& adaptor) + { +@@ -1277,32 +1277,140 @@ class Router + << "' " << static_cast<uint32_t>(req.method()) << " / " + << rules[ruleIndex]->getMethods(); + +- // any uncaught exceptions become 500s +- try +- { +- // Creating temporary response object to call handleUpgrade +- // We cannot pass the asyncResp as it will be destroyed +- // The response object is not initialized as handleUpgrade wouldn't +- // be using this object +- crow::Response resp; +- rules[ruleIndex]->handleUpgrade(req, resp, std::move(adaptor)); +- } +- catch (std::exception& e) +- { +- BMCWEB_LOG_ERROR << "An uncaught exception occurred: " << e.what(); +- asyncResp->res.result( +- boost::beast::http::status::internal_server_error); +- return; +- } +- catch (...) +- { +- BMCWEB_LOG_ERROR +- << "An uncaught exception occurred. The type was unknown " +- "so no information was available."; +- asyncResp->res.result( +- boost::beast::http::status::internal_server_error); +- return; +- } ++ crow::connections::systemBus->async_method_call( ++ [&req, asyncResp, &rules, ruleIndex, &adaptor]( ++ const boost::system::error_code ec, ++ std::map<std::string, std::variant<bool, std::string, ++ std::vector<std::string>>> ++ userInfo) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "GetUserInfo failed..."; ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); ++ return; ++ } ++ ++ const std::string* userRolePtr = nullptr; ++ auto userInfoIter = userInfo.find("UserPrivilege"); ++ if (userInfoIter != userInfo.end()) ++ { ++ userRolePtr = ++ std::get_if<std::string>(&userInfoIter->second); ++ } ++ ++ std::string userRole{}; ++ if (userRolePtr != nullptr) ++ { ++ userRole = *userRolePtr; ++ BMCWEB_LOG_DEBUG << "userName = " << req.session->username ++ << " userRole = " << *userRolePtr; ++ } ++ ++ bool* remoteUserPtr = nullptr; ++ auto remoteUserIter = userInfo.find("RemoteUser"); ++ if (remoteUserIter != userInfo.end()) ++ { ++ remoteUserPtr = std::get_if<bool>(&remoteUserIter->second); ++ } ++ if (remoteUserPtr == nullptr) ++ { ++ BMCWEB_LOG_ERROR ++ << "RemoteUser property missing or wrong type"; ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); ++ return; ++ } ++ bool remoteUser = *remoteUserPtr; ++ ++ bool passwordExpired = false; // default for remote user ++ if (!remoteUser) ++ { ++ bool* passwordExpiredPtr = nullptr; ++ auto passwordExpiredIter = ++ userInfo.find("UserPasswordExpired"); ++ if (passwordExpiredIter != userInfo.end()) ++ { ++ passwordExpiredPtr = ++ std::get_if<bool>(&passwordExpiredIter->second); ++ } ++ if (passwordExpiredPtr != nullptr) ++ { ++ passwordExpired = *passwordExpiredPtr; ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR ++ << "UserPasswordExpired property is expected for" ++ " local user but is missing or wrong type"; ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); ++ return; ++ } ++ } ++ ++ // Get the userprivileges from the role ++ redfish::Privileges userPrivileges = ++ redfish::getUserPrivileges(userRole); ++ ++ // Set isConfigureSelfOnly based on D-Bus results. This ++ // ignores the results from both pamAuthenticateUser and the ++ // value from any previous use of this session. ++ req.session->isConfigureSelfOnly = passwordExpired; ++ ++ // Modifyprivileges if isConfigureSelfOnly. ++ if (req.session->isConfigureSelfOnly) ++ { ++ // Remove allprivileges except ConfigureSelf ++ userPrivileges = userPrivileges.intersection( ++ redfish::Privileges{"ConfigureSelf"}); ++ BMCWEB_LOG_DEBUG << "Operation limited to ConfigureSelf"; ++ } ++ ++ if (!rules[ruleIndex]->checkPrivileges(userPrivileges)) ++ { ++ asyncResp->res.result( ++ boost::beast::http::status::forbidden); ++ if (req.session->isConfigureSelfOnly) ++ { ++ redfish::messages::passwordChangeRequired( ++ asyncResp->res, ++ "/redfish/v1/AccountService/Accounts/" + ++ req.session->username); ++ } ++ return; ++ } ++ ++ req.userRole = userRole; ++ ++ // any uncaught exceptions become 500s ++ try ++ { ++ crow::Response resp; ++ rules[ruleIndex]->handleUpgrade(req, resp, ++ std::move(adaptor)); ++ } ++ catch (std::exception& e) ++ { ++ BMCWEB_LOG_ERROR << "An uncaught exception occurred: " ++ << e.what(); ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); ++ return; ++ } ++ catch (...) ++ { ++ BMCWEB_LOG_ERROR ++ << "An uncaught exception occurred. The type was " ++ "unknown so no information was available."; ++ asyncResp->res.result( ++ boost::beast::http::status::internal_server_error); ++ return; ++ } ++ }, ++ "xyz.openbmc_project.User.Manager", "/xyz/openbmc_project/user", ++ "xyz.openbmc_project.User.Manager", "GetUserInfo", ++ req.session->username); + } + + void handle(Request& req, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0004-Add-Privileges-to-Websockets.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0004-Add-Privileges-to-Websockets.patch new file mode 100644 index 000000000..64e235ce3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0004-Add-Privileges-to-Websockets.patch @@ -0,0 +1,140 @@ +From 9b27d3e7c1670d53cfb1c0a88cc75155ebfba71a Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 18 Oct 2021 22:58:29 +0530 +Subject: [PATCH] Add Privileges to Websockets + +This commit adds Privileges to Websockets. +In the current implementation, once a rule is upgraded (i.e. from +BaseRule to WebSocket), there is no provosion to add priviliges. +In this commit, WebSocket inherits PrivilegeParameterTraits to enable +privileges. + +Also, in the earlier implementation, .privilege() was called after +BMCWEB_ROUTE(). This results in adding those privileges to the Base rule +that is created. By moving the privileges() below websocket(), the +privileges are applied to the websocket. + +Tested: + - websocket_test.py Passed + - Admin and Operator users were able to access KVM on WebUI + - Readonly User was unable to access KVM on WebUI + +Change-Id: Iff2051dbb7d363c902fd463fa446f280adc6d648 +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/routing.hpp | 4 +++- + include/dbus_monitor.hpp | 3 ++- + include/kvm_websocket.hpp | 4 +++- + include/obmc_console.hpp | 4 +++- + include/vm_websocket.hpp | 4 +++- + 5 files changed, 14 insertions(+), 5 deletions(-) + +diff --git a/http/routing.hpp b/http/routing.hpp +index e2a8fbb..6ea3185 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -345,7 +345,9 @@ struct PrivilegeParameterTraits + } + }; + +-class WebSocketRule : public BaseRule ++class WebSocketRule : ++ public BaseRule, ++ public PrivilegeParameterTraits<WebSocketRule> + { + using self_t = WebSocketRule; + +diff --git a/include/dbus_monitor.hpp b/include/dbus_monitor.hpp +index a6c86c6..163f884 100644 +--- a/include/dbus_monitor.hpp ++++ b/include/dbus_monitor.hpp +@@ -5,6 +5,7 @@ + #include <boost/container/flat_set.hpp> + #include <dbus_singleton.hpp> + #include <openbmc_dbus_rest.hpp> ++#include <registries/privilege_registry.hpp> + #include <sdbusplus/bus/match.hpp> + #include <sdbusplus/message/types.hpp> + #include <websocket.hpp> +@@ -105,8 +106,8 @@ inline int onPropertyUpdate(sd_bus_message* m, void* userdata, + inline void requestRoutes(App& app) + { + BMCWEB_ROUTE(app, "/subscribe") +- .privileges({{"Login"}}) + .websocket() ++ .privileges(redfish::privileges::privilegeSetLogin) + .onopen([&](crow::websocket::Connection& conn, + const std::shared_ptr<bmcweb::AsyncResp>&) { + BMCWEB_LOG_DEBUG << "Connection " << &conn << " opened"; +diff --git a/include/kvm_websocket.hpp b/include/kvm_websocket.hpp +index a9dc8ea..3f124a2 100644 +--- a/include/kvm_websocket.hpp ++++ b/include/kvm_websocket.hpp +@@ -4,6 +4,7 @@ + #include <app.hpp> + #include <async_resp.hpp> + #include <boost/container/flat_map.hpp> ++#include <registries/privilege_registry.hpp> + #include <websocket.hpp> + + namespace crow +@@ -159,8 +160,9 @@ inline void requestRoutes(App& app) + sessions.reserve(maxSessions); + + BMCWEB_ROUTE(app, "/kvm/0") +- .privileges({{"ConfigureComponents", "ConfigureManager"}}) + .websocket() ++ .privileges(redfish::privileges:: ++ privilegeSetConfigureManagerOrConfigureComponents) + .onopen([](crow::websocket::Connection& conn, + const std::shared_ptr<bmcweb::AsyncResp>&) { + BMCWEB_LOG_DEBUG << "Connection " << &conn << " opened"; +diff --git a/include/obmc_console.hpp b/include/obmc_console.hpp +index ff0a51f..22a49a8 100644 +--- a/include/obmc_console.hpp ++++ b/include/obmc_console.hpp +@@ -6,6 +6,7 @@ + #include <boost/asio/local/stream_protocol.hpp> + #include <boost/container/flat_map.hpp> + #include <boost/container/flat_set.hpp> ++#include <registries/privilege_registry.hpp> + #include <websocket.hpp> + + namespace crow +@@ -136,8 +137,9 @@ inline void connectHandler(const boost::system::error_code& ec) + inline void requestRoutes(App& app) + { + BMCWEB_ROUTE(app, "/console0") +- .privileges({{"ConfigureComponents", "ConfigureManager"}}) + .websocket() ++ .privileges(redfish::privileges:: ++ privilegeSetConfigureManagerOrConfigureComponents) + .onopen([](crow::websocket::Connection& conn, + const std::shared_ptr<bmcweb::AsyncResp>&) { + BMCWEB_LOG_DEBUG << "Connection " << &conn << " opened"; +diff --git a/include/vm_websocket.hpp b/include/vm_websocket.hpp +index 02f958a..ebbe68f 100644 +--- a/include/vm_websocket.hpp ++++ b/include/vm_websocket.hpp +@@ -3,6 +3,7 @@ + #include <app.hpp> + #include <boost/beast/core/flat_static_buffer.hpp> + #include <boost/process.hpp> ++#include <registries/privilege_registry.hpp> + #include <websocket.hpp> + + #include <csignal> +@@ -156,8 +157,9 @@ static std::shared_ptr<Handler> handler; + inline void requestRoutes(App& app) + { + BMCWEB_ROUTE(app, "/vm/0/0") +- .privileges({{"ConfigureComponents", "ConfigureManager"}}) + .websocket() ++ .privileges(redfish::privileges:: ++ privilegeSetConfigureManagerOrConfigureComponents) + .onopen([](crow::websocket::Connection& conn, + const std::shared_ptr<bmcweb::AsyncResp>&) { + BMCWEB_LOG_DEBUG << "Connection " << &conn << " opened"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0005-Add-Privileges-to-SseSockets.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0005-Add-Privileges-to-SseSockets.patch new file mode 100644 index 000000000..06ffb3a46 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/http_routing/0005-Add-Privileges-to-SseSockets.patch @@ -0,0 +1,63 @@ +From 0ceb343809ff498cbfa389c54a158d255a2cca88 Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 18 Oct 2021 23:02:00 +0530 +Subject: [PATCH] Add Privileges to SseSockets + +This commit adds Privileges to Ssesockets. +In the current implementation, once a rule is upgraded (i.e. from +BaseRule to SseSocket), there is no provision to add priviliges. +In this commit, SseSocket inherits PrivilegeParameterTraits to +enable privileges. + +Also, in the earlier implementation, .privilege() was called after +BMCWEB_ROUTE(). This results in adding those privileges to the Base +rule that is created. By moving the privileges() below websocket(), +the privileges are applied to the Ssesocket. + +Tested: + - SSE Subscription was successful with Admin and Operator Users + - SSE Subscription was rejected while using Readonly User + - websocket_test.py Passed + - Admin and Operator users were able to access KVM on WebUI + - Readonly User was unable to access KVM on WebUI + +Change-Id: I41739401893b1c2bf718e11ec7676d69f954c98f +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + http/routing.hpp | 4 +++- + include/eventservice_sse.hpp | 3 ++- + 2 files changed, 5 insertions(+), 2 deletions(-) + +diff --git a/http/routing.hpp b/http/routing.hpp +index 6ea3185..13174b2 100644 +--- a/http/routing.hpp ++++ b/http/routing.hpp +@@ -430,7 +430,9 @@ class WebSocketRule : + std::function<void(crow::websocket::Connection&)> errorHandler; + }; + +-class SseSocketRule : public BaseRule ++class SseSocketRule : ++ public BaseRule, ++ public PrivilegeParameterTraits<SseSocketRule> + { + using self_t = SseSocketRule; + +diff --git a/include/eventservice_sse.hpp b/include/eventservice_sse.hpp +index 2f22f98..f880344 100644 +--- a/include/eventservice_sse.hpp ++++ b/include/eventservice_sse.hpp +@@ -192,8 +192,9 @@ static void deleteSubscription(std::shared_ptr<crow::SseConnection>& conn) + inline void requestRoutes(App& app) + { + BMCWEB_ROUTE(app, "/redfish/v1/EventService/Subscriptions/SSE") +- .privileges({{"ConfigureComponents", "ConfigureManager"}}) + .serverSentEvent() ++ .privileges(redfish::privileges:: ++ privilegeSetConfigureManagerOrConfigureComponents) + .onopen([](std::shared_ptr<crow::SseConnection>& conn, + const crow::Request& req, crow::Response& res) { + BMCWEB_LOG_DEBUG << "Connection " << conn << " opened."; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0001-Add-support-for-MetricDefinition-scheme.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0001-Add-support-for-MetricDefinition-scheme.patch new file mode 100644 index 000000000..f5226fe6e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0001-Add-support-for-MetricDefinition-scheme.patch @@ -0,0 +1,619 @@ +From 32e557279450226ed9c06312649d90b802f3d4c5 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Tue, 13 Apr 2021 13:00:18 +0000 +Subject: [PATCH] Add support for MetricDefinition scheme + +Added MetricDefinition node to Redfish code. Now user is able to list +all available metrics in OpenBMC that are supported by Telemetry +service. Metrics are grouped by reading type. + +MetricDefinitions contains all physical sensors supported by redfish, +algorithm iterates through all chassis and collects results for each +node available in that chassis (Power, Thermal, Sensors). + +When BMCWEB_NEW_POWERSUBSYSTEM_THERMALSUBSYSTEM will be enabled by +default (meson option redfish-new-powersubsystem-thermalsubsystem) it +will be possible to optimize this algorithm to only get sensors from +Sensors node. Currently Sensors node doesn't contain all available +sensors. + +Tested: + - MetricDefinitions response is filled with existing sensors, it works + with and without Telemetry service + - Validated a presence of MetricDefinition members and its attributes + - Successfully passed RedfishServiceValidator.py using witherspoon + image on QEMU + - Tested using following GET,POST requests + +GET /redfish/v1/TelemetryService/MetricDefinitions +{ + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions", + "@odata.type": "#MetricDefinitionCollection.MetricDefinitionCollection", + "Members": [ + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/Fan_Pwm" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/Fan_Tach" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/HostCpuUtilization" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/HostMemoryBandwidthUtilization" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/HostPciBandwidthUtilization" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/Inlet_BRD_Temp" + }, + { + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/Left_Rear_Board_Temp" + } + ], + "Members@odata.count": 7, + "Name": "Metric Definition Collection" +} + +GET /redfish/v1/TelemetryService/MetricDefinitions/Fan_Tach +{ + "@odata.id": "/redfish/v1/TelemetryService/MetricDefinitions/Fan_Tach", + "@odata.type": "#MetricDefinition.v1_0_3.MetricDefinition", + "Id": "Fan_Tach", + "IsLinear": true, + "MaxReadingRange": 25000.0, + "MetricDataType": "Decimal", + "MetricProperties": [ + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/0/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/1/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/2/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/3/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/4/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/5/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/6/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/7/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/8/Reading", + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/9/Reading" + ], + "MetricType": "Gauge", + "MinReadingRange": 0.0, + "Name": "Fan_Tach", + "Units": "RPM" +} + +POST redfish/v1/TelemetryService/MetricReportDefinitions, body: +{ + "Id": "TestReport", + "Metrics": [ + { + "MetricId": "TestMetric", + "MetricProperties": [ + "/redfish/v1/Chassis/Chassis0/Thermal#/Fans/3/Reading", + ] + } + ], + "MetricReportDefinitionType": "OnRequest", + "ReportActions": [ + "RedfishEvent", + "LogToMetricReportsCollection" + ] +} +{ + "@Message.ExtendedInfo": [ + { + "@odata.type": "#Message.v1_1_1.Message", + "Message": "The resource has been created successfully", + "MessageArgs": [], + "MessageId": "Base.1.8.1.Created", + "MessageSeverity": "OK", + "Resolution": "None" + } + ] +} + +Signed-off-by: Wludzik, Jozef <jozef.wludzik@intel.com> +Signed-off-by: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Change-Id: I3086e1302e1ba2e5442d1367939fd5507a0cbc00 +--- + redfish-core/include/redfish.hpp | 3 + + .../include/utils/get_chassis_names.hpp | 58 +++ + .../include/utils/telemetry_utils.hpp | 2 + + redfish-core/lib/metric_definition.hpp | 368 ++++++++++++++++++ + redfish-core/lib/telemetry_service.hpp | 3 +- + 5 files changed, 433 insertions(+), 1 deletion(-) + create mode 100644 redfish-core/include/utils/get_chassis_names.hpp + create mode 100644 redfish-core/lib/metric_definition.hpp + +diff --git a/redfish-core/include/redfish.hpp b/redfish-core/include/redfish.hpp +index 0a97150..67c5af2 100644 +--- a/redfish-core/include/redfish.hpp ++++ b/redfish-core/include/redfish.hpp +@@ -26,6 +26,7 @@ + #include "../lib/managers.hpp" + #include "../lib/memory.hpp" + #include "../lib/message_registries.hpp" ++#include "../lib/metric_definition.hpp" + #include "../lib/metric_report.hpp" + #include "../lib/metric_report_definition.hpp" + #include "../lib/network_protocol.hpp" +@@ -200,6 +201,8 @@ class RedfishService + requestRoutesMetricReportDefinition(app); + requestRoutesMetricReportCollection(app); + requestRoutesMetricReport(app); ++ requestRoutesMetricDefinitionCollection(app); ++ requestRoutesMetricDefinition(app); + } + }; + +diff --git a/redfish-core/include/utils/get_chassis_names.hpp b/redfish-core/include/utils/get_chassis_names.hpp +new file mode 100644 +index 0000000..0276b6f +--- /dev/null ++++ b/redfish-core/include/utils/get_chassis_names.hpp +@@ -0,0 +1,58 @@ ++#pragma once ++ ++#include <include/dbus_singleton.hpp> ++ ++#include <array> ++#include <string> ++#include <vector> ++ ++namespace redfish ++{ ++ ++namespace utils ++{ ++ ++template <typename F> ++inline void getChassisNames(F&& cb) ++{ ++ const std::array<const char*, 2> interfaces = { ++ "xyz.openbmc_project.Inventory.Item.Board", ++ "xyz.openbmc_project.Inventory.Item.Chassis"}; ++ ++ crow::connections::systemBus->async_method_call( ++ [callback = std::move(cb)](const boost::system::error_code ec, ++ const std::vector<std::string>& chassis) { ++ std::vector<std::string> chassisNames; ++ ++ if (ec) ++ { ++ callback(ec, chassisNames); ++ return; ++ } ++ ++ chassisNames.reserve(chassis.size()); ++ for (const std::string& path : chassis) ++ { ++ sdbusplus::message::object_path dbusPath = path; ++ std::string name = dbusPath.filename(); ++ if (name.empty()) ++ { ++ callback(boost::system::errc::make_error_code( ++ boost::system::errc::invalid_argument), ++ chassisNames); ++ return; ++ } ++ chassisNames.emplace_back(std::move(name)); ++ } ++ ++ callback(ec, chassisNames); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTreePaths", ++ "/xyz/openbmc_project/inventory", 0, interfaces); ++} ++ ++} // namespace utils ++ ++} // namespace redfish +diff --git a/redfish-core/include/utils/telemetry_utils.hpp b/redfish-core/include/utils/telemetry_utils.hpp +index 5872350..1b4f75d 100644 +--- a/redfish-core/include/utils/telemetry_utils.hpp ++++ b/redfish-core/include/utils/telemetry_utils.hpp +@@ -10,6 +10,8 @@ namespace telemetry + + constexpr const char* service = "xyz.openbmc_project.Telemetry"; + constexpr const char* reportInterface = "xyz.openbmc_project.Telemetry.Report"; ++constexpr const char* metricDefinitionUri = ++ "/redfish/v1/TelemetryService/MetricDefinitions/"; + constexpr const char* metricReportDefinitionUri = + "/redfish/v1/TelemetryService/MetricReportDefinitions/"; + constexpr const char* metricReportUri = +diff --git a/redfish-core/lib/metric_definition.hpp b/redfish-core/lib/metric_definition.hpp +new file mode 100644 +index 0000000..347c297 +--- /dev/null ++++ b/redfish-core/lib/metric_definition.hpp +@@ -0,0 +1,368 @@ ++#pragma once ++ ++#include "async_resp.hpp" ++#include "sensors.hpp" ++#include "utils/get_chassis_names.hpp" ++#include "utils/telemetry_utils.hpp" ++ ++#include <registries/privilege_registry.hpp> ++ ++namespace redfish ++{ ++ ++namespace telemetry ++{ ++ ++struct ValueVisitor ++{ ++ ValueVisitor(boost::system::error_code& ec) : ec(ec) ++ {} ++ ++ template <class T> ++ double operator()(T value) const ++ { ++ return static_cast<double>(value); ++ } ++ ++ double operator()(std::monostate) const ++ { ++ ec = boost::system::errc::make_error_code( ++ boost::system::errc::invalid_argument); ++ return double{}; ++ } ++ ++ boost::system::error_code& ec; ++}; ++ ++inline void getReadingRange( ++ const std::string& service, const std::string& path, ++ const std::string& property, ++ std::function<void(boost::system::error_code, double)> callback) ++{ ++ crow::connections::systemBus->async_method_call( ++ [callback = std::move(callback)]( ++ boost::system::error_code ec, ++ const std::variant<std::monostate, double, uint64_t, int64_t, ++ uint32_t, int32_t, uint16_t, int16_t>& ++ valueVariant) { ++ if (ec) ++ { ++ callback(ec, double{}); ++ return; ++ } ++ ++ const double value = std::visit(ValueVisitor(ec), valueVariant); ++ ++ callback(ec, value); ++ }, ++ service, path, "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.Sensor.Value", property); ++} ++ ++inline void ++ fillMinMaxReadingRange(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const std::string& serviceName, ++ const std::string& sensorPath) ++{ ++ asyncResp->res.jsonValue["MetricType"] = "Numeric"; ++ ++ telemetry::getReadingRange( ++ serviceName, sensorPath, "MinValue", ++ [asyncResp](boost::system::error_code ec, double readingRange) { ++ if (ec) ++ { ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ if (std::isfinite(readingRange)) ++ { ++ asyncResp->res.jsonValue["MetricType"] = "Gauge"; ++ ++ asyncResp->res.jsonValue["MinReadingRange"] = readingRange; ++ } ++ }); ++ ++ telemetry::getReadingRange( ++ serviceName, sensorPath, "MaxValue", ++ [asyncResp](boost::system::error_code ec, double readingRange) { ++ if (ec) ++ { ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ if (std::isfinite(readingRange)) ++ { ++ asyncResp->res.jsonValue["MetricType"] = "Gauge"; ++ ++ asyncResp->res.jsonValue["MaxReadingRange"] = readingRange; ++ } ++ }); ++} ++ ++inline void getSensorService( ++ const std::string& sensorPath, ++ std::function<void(boost::system::error_code, const std::string&)> callback) ++{ ++ using ResultType = std::pair< ++ std::string, ++ std::vector<std::pair<std::string, std::vector<std::string>>>>; ++ ++ crow::connections::systemBus->async_method_call( ++ [sensorPath, callback = std::move(callback)]( ++ boost::system::error_code ec, ++ const std::vector<ResultType>& result) { ++ if (ec) ++ { ++ callback(ec, std::string{}); ++ return; ++ } ++ ++ for (const auto& [path, serviceToInterfaces] : result) ++ { ++ if (path == sensorPath) ++ { ++ for (const auto& [service, interfaces] : ++ serviceToInterfaces) ++ { ++ callback(boost::system::errc::make_error_code( ++ boost::system::errc::success), ++ service); ++ return; ++ } ++ } ++ } ++ ++ callback(boost::system::errc::make_error_code( ++ boost::system::errc::no_such_file_or_directory), ++ std::string{}); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetSubTree", ++ "/xyz/openbmc_project/sensors", 2, ++ std::array{"xyz.openbmc_project.Sensor.Value"}); ++} ++ ++constexpr auto metricDefinitionMapping = std::array{ ++ std::pair{"fan_pwm", "Fan_Pwm"}, std::pair{"fan_tach", "Fan_Tach"}}; ++ ++std::string mapSensorToMetricDefinition(const std::string& sensorPath) ++{ ++ sdbusplus::message::object_path sensorObjectPath{sensorPath}; ++ ++ const auto it = std::find_if( ++ metricDefinitionMapping.begin(), metricDefinitionMapping.end(), ++ [&sensorObjectPath](const auto& item) { ++ return item.first == sensorObjectPath.parent_path().filename(); ++ }); ++ ++ const char* metricDefinitionPath = ++ "/redfish/v1/TelemetryService/MetricDefinitions/"; ++ ++ if (it != metricDefinitionMapping.end()) ++ { ++ return std::string{metricDefinitionPath} + it->second; ++ } ++ ++ return metricDefinitionPath + sensorObjectPath.filename(); ++} ++ ++template <class Callback> ++inline void mapRedfishUriToDbusPath(Callback&& callback) ++{ ++ utils::getChassisNames([callback = std::move(callback)]( ++ boost::system::error_code ec, ++ const std::vector<std::string>& chassisNames) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "getChassisNames error: " << ec.value(); ++ callback(ec, {}); ++ return; ++ } ++ ++ auto counter = std::make_shared<std::pair< ++ boost::container::flat_map<std::string, std::string>, size_t>>(); ++ ++ auto handleRetrieveUriToDbusMap = ++ [counter, callback = std::move(callback)]( ++ const boost::beast::http::status status, ++ const boost::container::flat_map<std::string, std::string>& ++ uriToDbus) { ++ if (status != boost::beast::http::status::ok) ++ { ++ BMCWEB_LOG_ERROR << "Failed to retrieve URI to dbus " ++ "sensors map with err " ++ << static_cast<unsigned>(status); ++ counter->second = 0u; ++ callback(boost::system::errc::make_error_code( ++ boost::system::errc::io_error), ++ {}); ++ return; ++ } ++ ++ for (const auto& [key, value] : uriToDbus) ++ { ++ counter->first[key] = value; ++ } ++ ++ if (--counter->second == 0u) ++ { ++ callback(boost::system::errc::make_error_code( ++ boost::system::errc::success), ++ counter->first); ++ } ++ }; ++ ++ for (const std::string& chassisName : chassisNames) ++ { ++ for (const auto& [sensorNode, dbusPaths] : sensors::dbus::paths) ++ { ++ ++counter->second; ++ retrieveUriToDbusMap(chassisName, sensorNode.data(), ++ handleRetrieveUriToDbusMap); ++ } ++ } ++ }); ++} ++ ++} // namespace telemetry ++ ++inline void requestRoutesMetricDefinitionCollection(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/TelemetryService/MetricDefinitions/") ++ .privileges(privileges::getTelemetryService) ++ .methods(boost::beast::http::verb::get)( ++ [](const crow::Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ telemetry::mapRedfishUriToDbusPath( ++ [asyncResp](boost::system::error_code ec, ++ const boost::container::flat_map< ++ std::string, std::string>& uriToDbus) { ++ if (ec) ++ { ++ messages::internalError(asyncResp->res); ++ BMCWEB_LOG_ERROR ++ << "mapRedfishUriToDbusPath error: " ++ << ec.value(); ++ return; ++ } ++ ++ std::set<std::string> members; ++ ++ for (const auto& [uri, dbusPath] : uriToDbus) ++ { ++ members.insert( ++ telemetry::mapSensorToMetricDefinition( ++ dbusPath)); ++ } ++ ++ for (const std::string& odataId : members) ++ { ++ asyncResp->res.jsonValue["Members"].push_back( ++ {{"@odata.id", odataId}}); ++ } ++ ++ asyncResp->res.jsonValue["Members@odata.count"] = ++ asyncResp->res.jsonValue["Members"].size(); ++ }); ++ ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#MetricDefinitionCollection." ++ "MetricDefinitionCollection"; ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/TelemetryService/MetricDefinitions"; ++ asyncResp->res.jsonValue["Name"] = ++ "Metric Definition Collection"; ++ asyncResp->res.jsonValue["Members"] = nlohmann::json::array(); ++ asyncResp->res.jsonValue["Members@odata.count"] = 0; ++ }); ++} ++ ++inline void requestRoutesMetricDefinition(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/TelemetryService/MetricDefinitions/<str>/") ++ .privileges(privileges::getTelemetryService) ++ .methods( ++ boost::beast::http::verb::get)([](const crow::Request&, ++ const std::shared_ptr< ++ bmcweb::AsyncResp>& asyncResp, ++ const std::string& name) { ++ telemetry::mapRedfishUriToDbusPath( ++ [asyncResp, name]( ++ boost::system::error_code ec, ++ const boost::container::flat_map<std::string, std::string>& ++ uriToDbus) { ++ if (ec) ++ { ++ messages::internalError(asyncResp->res); ++ BMCWEB_LOG_ERROR << "mapRedfishUriToDbusPath error: " ++ << ec.value(); ++ return; ++ } ++ ++ std::string odataId = telemetry::metricDefinitionUri + name; ++ boost::container::flat_map<std::string, std::string> ++ matchingUris; ++ ++ for (const auto& [uri, dbusPath] : uriToDbus) ++ { ++ if (telemetry::mapSensorToMetricDefinition(dbusPath) == ++ odataId) ++ { ++ matchingUris.emplace(uri, dbusPath); ++ } ++ } ++ ++ if (matchingUris.empty()) ++ { ++ messages::resourceNotFound(asyncResp->res, ++ "MetricDefinition", name); ++ return; ++ } ++ ++ std::string sensorPath = matchingUris.begin()->second; ++ ++ telemetry::getSensorService( ++ sensorPath, ++ [asyncResp, name, odataId = std::move(odataId), ++ sensorPath, matchingUris = std::move(matchingUris)]( ++ boost::system::error_code ec, ++ const std::string& serviceName) { ++ if (ec) ++ { ++ messages::internalError(asyncResp->res); ++ BMCWEB_LOG_ERROR << "getServiceSensorFailed: " ++ << ec.value(); ++ return; ++ } ++ ++ asyncResp->res.jsonValue["Id"] = name; ++ asyncResp->res.jsonValue["Name"] = name; ++ asyncResp->res.jsonValue["@odata.id"] = odataId; ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#MetricDefinition.v1_0_3.MetricDefinition"; ++ asyncResp->res.jsonValue["MetricDataType"] = ++ "Decimal"; ++ asyncResp->res.jsonValue["IsLinear"] = true; ++ asyncResp->res.jsonValue["Units"] = ++ sensors::toReadingUnits( ++ sdbusplus::message::object_path{sensorPath} ++ .parent_path() ++ .filename()); ++ ++ for (const auto& [uri, dbusPath] : matchingUris) ++ { ++ asyncResp->res.jsonValue["MetricProperties"] ++ .push_back(uri); ++ } ++ ++ telemetry::fillMinMaxReadingRange( ++ asyncResp, serviceName, sensorPath); ++ }); ++ }); ++ }); ++} ++ ++} // namespace redfish +diff --git a/redfish-core/lib/telemetry_service.hpp b/redfish-core/lib/telemetry_service.hpp +index 8ecc591..027b51b 100644 +--- a/redfish-core/lib/telemetry_service.hpp ++++ b/redfish-core/lib/telemetry_service.hpp +@@ -18,11 +18,12 @@ inline void handleTelemetryServiceGet( + asyncResp->res.jsonValue["@odata.id"] = "/redfish/v1/TelemetryService"; + asyncResp->res.jsonValue["Id"] = "TelemetryService"; + asyncResp->res.jsonValue["Name"] = "Telemetry Service"; +- + asyncResp->res.jsonValue["MetricReportDefinitions"]["@odata.id"] = + "/redfish/v1/TelemetryService/MetricReportDefinitions"; + asyncResp->res.jsonValue["MetricReports"]["@odata.id"] = + "/redfish/v1/TelemetryService/MetricReports"; ++ asyncResp->res.jsonValue["MetricDefinitions"]["@odata.id"] = ++ "/redfish/v1/TelemetryService/MetricDefinitions"; + + crow::connections::systemBus->async_method_call( + [asyncResp](const boost::system::error_code ec, +-- +2.25.1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0002-Sync-Telmetry-service-with-EventService.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0002-Sync-Telmetry-service-with-EventService.patch new file mode 100644 index 000000000..3088a7f9d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0002-Sync-Telmetry-service-with-EventService.patch @@ -0,0 +1,295 @@ +From 541353a4e4b06de42b6a9a400629f5a5fba04e86 Mon Sep 17 00:00:00 2001 +From: "Wludzik, Jozef" <jozef.wludzik@intel.com> +Date: Tue, 15 Dec 2020 12:30:31 +0100 +Subject: [PATCH] Sync Telmetry service with EventService + +Synced the latest changes in Telemetry service with Event Service +code. Now assembling MetricReport is covered in single place in +code. Updated method of fetching Readings from Telemetry by +Event Service. Using ReportUpdate signal is no longer +supported. Now Event Service monitors for PropertiesChanged signal +from /xyz/openbmc_project/Telemetry/Reports path. + +Tested: + - Verified that EventListener received MetricReport response from + Event Service in insecure http push style eventing mode + +Change-Id: I2fc1841a6c9259a8bff30b34bddc0d4aabd41912 +Signed-off-by: Wludzik, Jozef <jozef.wludzik@intel.com> +Signed-off-by: Lukasz Kazmierczak <lukasz.kazmierczak@intel.com> +--- + .../include/event_service_manager.hpp | 156 ++++++------------ + redfish-core/lib/metric_report.hpp | 28 ++-- + 2 files changed, 69 insertions(+), 115 deletions(-) + +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 3f398d7..cf9f658 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -14,6 +14,7 @@ + // limitations under the License. + */ + #pragma once ++#include "metric_report.hpp" + #include "registries.hpp" + #include "registries/base_message_registry.hpp" + #include "registries/openbmc_message_registry.hpp" +@@ -511,47 +512,32 @@ class Subscription : public persistent_data::UserSubscription + } + #endif + +- void filterAndSendReports(const std::string& id2, +- const std::string& readingsTs, +- const ReadingsObjType& readings) ++ void filterAndSendReports( ++ const std::string& id, ++ const std::variant<telemetry::TimestampReadings>& var) + { +- std::string metricReportDef = +- "/redfish/v1/TelemetryService/MetricReportDefinitions/" + id2; ++ std::string mrdUri = telemetry::metricReportDefinitionUri + id; + + // Empty list means no filter. Send everything. + if (metricReportDefinitions.size()) + { + if (std::find(metricReportDefinitions.begin(), + metricReportDefinitions.end(), +- metricReportDef) == metricReportDefinitions.end()) ++ mrdUri) == metricReportDefinitions.end()) + { + return; + } + } + +- nlohmann::json metricValuesArray = nlohmann::json::array(); +- for (const auto& it : readings) ++ nlohmann::json msg; ++ if (!telemetry::fillReport(msg, id, var)) + { +- metricValuesArray.push_back({}); +- nlohmann::json& entry = metricValuesArray.back(); +- +- auto& [id, property, value, timestamp] = it; +- +- entry = {{"MetricId", id}, +- {"MetricProperty", property}, +- {"MetricValue", std::to_string(value)}, +- {"Timestamp", crow::utility::getDateTime(timestamp)}}; ++ BMCWEB_LOG_ERROR << "Failed to fill the MetricReport for DBus " ++ "Report with id " ++ << id; ++ return; + } + +- nlohmann::json msg = { +- {"@odata.id", "/redfish/v1/TelemetryService/MetricReports/" + id}, +- {"@odata.type", "#MetricReport.v1_3_0.MetricReport"}, +- {"Id", id2}, +- {"Name", id2}, +- {"Timestamp", readingsTs}, +- {"MetricReportDefinition", {{"@odata.id", metricReportDef}}}, +- {"MetricValues", metricValuesArray}}; +- + this->sendEvent( + msg.dump(2, ' ', true, nlohmann::json::error_handler_t::replace)); + } +@@ -1317,75 +1303,6 @@ class EventServiceManager + } + + #endif +- +- void getMetricReading(const std::string& service, +- const std::string& objPath, const std::string& intf) +- { +- std::size_t found = objPath.find_last_of('/'); +- if (found == std::string::npos) +- { +- BMCWEB_LOG_DEBUG << "Invalid objPath received"; +- return; +- } +- +- std::string idStr = objPath.substr(found + 1); +- if (idStr.empty()) +- { +- BMCWEB_LOG_DEBUG << "Invalid ID in objPath"; +- return; +- } +- +- crow::connections::systemBus->async_method_call( +- [idStr{std::move(idStr)}]( +- const boost::system::error_code ec, +- boost::container::flat_map< +- std::string, std::variant<int32_t, ReadingsObjType>>& +- resp) { +- if (ec) +- { +- BMCWEB_LOG_DEBUG +- << "D-Bus call failed to GetAll metric readings."; +- return; +- } +- +- const int32_t* timestampPtr = +- std::get_if<int32_t>(&resp["Timestamp"]); +- if (!timestampPtr) +- { +- BMCWEB_LOG_DEBUG << "Failed to Get timestamp."; +- return; +- } +- +- ReadingsObjType* readingsPtr = +- std::get_if<ReadingsObjType>(&resp["Readings"]); +- if (!readingsPtr) +- { +- BMCWEB_LOG_DEBUG << "Failed to Get Readings property."; +- return; +- } +- +- if (!readingsPtr->size()) +- { +- BMCWEB_LOG_DEBUG << "No metrics report to be transferred"; +- return; +- } +- +- for (const auto& it : +- EventServiceManager::getInstance().subscriptionsMap) +- { +- std::shared_ptr<Subscription> entry = it.second; +- if (entry->eventFormatType == metricReportFormatType) +- { +- entry->filterAndSendReports( +- idStr, crow::utility::getDateTime(*timestampPtr), +- *readingsPtr); +- } +- } +- }, +- service, objPath, "org.freedesktop.DBus.Properties", "GetAll", +- intf); +- } +- + void unregisterMetricReportSignal() + { + if (matchTelemetryMonitor) +@@ -1405,9 +1322,11 @@ class EventServiceManager + } + + BMCWEB_LOG_DEBUG << "Metrics report signal - Register"; +- std::string matchStr( +- "type='signal',member='ReportUpdate', " +- "interface='xyz.openbmc_project.MonitoringService.Report'"); ++ std::string matchStr = "type='signal',member='PropertiesChanged'," ++ "interface='org.freedesktop.DBus.Properties'," ++ "path_namespace=/xyz/openbmc_project/Telemetry/" ++ "Reports/TelemetryService," ++ "arg0=xyz.openbmc_project.Telemetry.Report"; + + matchTelemetryMonitor = std::make_shared<sdbusplus::bus::match::match>( + *crow::connections::systemBus, matchStr, +@@ -1418,10 +1337,43 @@ class EventServiceManager + return; + } + +- std::string service = msg.get_sender(); +- std::string objPath = msg.get_path(); +- std::string intf = msg.get_interface(); +- getMetricReading(service, objPath, intf); ++ sdbusplus::message::object_path path(msg.get_path()); ++ std::string id = path.filename(); ++ if (id.empty()) ++ { ++ BMCWEB_LOG_ERROR << "Failed to get Id from path"; ++ return; ++ } ++ ++ std::string intf; ++ std::vector<std::pair< ++ std::string, std::variant<telemetry::TimestampReadings>>> ++ props; ++ std::vector<std::string> invalidProps; ++ msg.read(intf, props, invalidProps); ++ ++ auto found = ++ std::find_if(props.begin(), props.end(), [](const auto& x) { ++ return x.first == "Readings"; ++ }); ++ if (found == props.end()) ++ { ++ BMCWEB_LOG_INFO ++ << "Failed to get Readings from Report properties"; ++ return; ++ } ++ ++ const std::variant<telemetry::TimestampReadings>& readings = ++ found->second; ++ for (const auto& it : ++ EventServiceManager::getInstance().subscriptionsMap) ++ { ++ Subscription& entry = *it.second.get(); ++ if (entry.eventFormatType == metricReportFormatType) ++ { ++ entry.filterAndSendReports(id, readings); ++ } ++ } + }); + } + +diff --git a/redfish-core/lib/metric_report.hpp b/redfish-core/lib/metric_report.hpp +index 63c8c19..7fe281d 100644 +--- a/redfish-core/lib/metric_report.hpp ++++ b/redfish-core/lib/metric_report.hpp +@@ -33,16 +33,14 @@ inline nlohmann::json toMetricValues(const Readings& readings) + return metricValues; + } + +-inline void fillReport(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, +- const std::string& id, ++inline bool fillReport(nlohmann::json& json, const std::string& id, + const std::variant<TimestampReadings>& var) + { +- asyncResp->res.jsonValue["@odata.type"] = +- "#MetricReport.v1_3_0.MetricReport"; +- asyncResp->res.jsonValue["@odata.id"] = telemetry::metricReportUri + id; +- asyncResp->res.jsonValue["Id"] = id; +- asyncResp->res.jsonValue["Name"] = id; +- asyncResp->res.jsonValue["MetricReportDefinition"]["@odata.id"] = ++ json["@odata.type"] = "#MetricReport.v1_3_0.MetricReport"; ++ json["@odata.id"] = telemetry::metricReportUri + id; ++ json["Id"] = id; ++ json["Name"] = id; ++ json["MetricReportDefinition"]["@odata.id"] = + telemetry::metricReportDefinitionUri + id; + + const TimestampReadings* timestampReadings = +@@ -50,14 +48,14 @@ inline void fillReport(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + if (!timestampReadings) + { + BMCWEB_LOG_ERROR << "Property type mismatch or property is missing"; +- messages::internalError(asyncResp->res); +- return; ++ return false; + } + + const auto& [timestamp, readings] = *timestampReadings; +- asyncResp->res.jsonValue["Timestamp"] = ++ json["Timestamp"] = + crow::utility::getDateTime(static_cast<time_t>(timestamp)); +- asyncResp->res.jsonValue["MetricValues"] = toMetricValues(readings); ++ json["MetricValues"] = toMetricValues(readings); ++ return true; + } + } // namespace telemetry + +@@ -118,7 +116,11 @@ inline void requestRoutesMetricReport(App& app) + return; + } + +- telemetry::fillReport(asyncResp, id, ret); ++ if (!telemetry::fillReport( ++ asyncResp->res.jsonValue, id, ret)) ++ { ++ messages::internalError(asyncResp->res); ++ } + }, + telemetry::service, reportPath, + "org.freedesktop.DBus.Properties", "Get", +-- +2.25.1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0003-Switched-bmcweb-to-use-new-telemetry-service-API.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0003-Switched-bmcweb-to-use-new-telemetry-service-API.patch new file mode 100644 index 000000000..5dd2f51bc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0003-Switched-bmcweb-to-use-new-telemetry-service-API.patch @@ -0,0 +1,301 @@ +From 8ba1bcc3503cafb33b1a06356d4f8f92ae23e39a Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Thu, 17 Jun 2021 13:37:57 +0000 +Subject: [PATCH] Switched bmcweb to use new telemetry service API + +Added support for multiple MetricProperties. Added support for new +parameters: CollectionTimeScope, CollectionDuration. + +Tested: + - It is possible to create MetricReportDefinitions with multiple + MetricProperties. + - Stub values for new parameters are correctly passed to telemetry + service. + - All existing telemetry service functionalities remain unchanged. + +Change-Id: I2cd17069e3ea015c8f5571c29278f1d50536272a +Signed-off-by: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +--- + redfish-core/lib/metric_report_definition.hpp | 212 ++++++++++-------- + 1 file changed, 114 insertions(+), 98 deletions(-) + +diff --git a/redfish-core/lib/metric_report_definition.hpp b/redfish-core/lib/metric_report_definition.hpp +index a0c4f1d..7c26787 100644 +--- a/redfish-core/lib/metric_report_definition.hpp ++++ b/redfish-core/lib/metric_report_definition.hpp +@@ -7,6 +7,8 @@ + #include <app.hpp> + #include <boost/container/flat_map.hpp> + #include <registries/privilege_registry.hpp> ++#include <sdbusplus/asio/property.hpp> ++#include <sdbusplus/unpack_properties.hpp> + + #include <tuple> + #include <variant> +@@ -17,87 +19,90 @@ namespace redfish + namespace telemetry + { + +-using ReadingParameters = +- std::vector<std::tuple<sdbusplus::message::object_path, std::string, +- std::string, std::string>>; ++using ReadingParameters = std::vector< ++ std::tuple<std::vector<sdbusplus::message::object_path>, std::string, ++ std::string, std::string, std::string, uint64_t>>; + + inline void fillReportDefinition( + const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, const std::string& id, + const std::vector< +- std::pair<std::string, std::variant<std::string, bool, uint64_t, +- ReadingParameters>>>& ret) ++ std::pair<std::string, std::variant<std::monostate, std::string, bool, ++ uint64_t, ReadingParameters>>>& ++ properties) + { +- asyncResp->res.jsonValue["@odata.type"] = +- "#MetricReportDefinition.v1_3_0.MetricReportDefinition"; +- asyncResp->res.jsonValue["@odata.id"] = +- telemetry::metricReportDefinitionUri + id; +- asyncResp->res.jsonValue["Id"] = id; +- asyncResp->res.jsonValue["Name"] = id; +- asyncResp->res.jsonValue["MetricReport"]["@odata.id"] = +- telemetry::metricReportUri + id; +- asyncResp->res.jsonValue["Status"]["State"] = "Enabled"; +- asyncResp->res.jsonValue["ReportUpdates"] = "Overwrite"; +- +- const bool* emitsReadingsUpdate = nullptr; +- const bool* logToMetricReportsCollection = nullptr; +- const ReadingParameters* readingParams = nullptr; +- const std::string* reportingType = nullptr; +- const uint64_t* interval = nullptr; +- for (const auto& [key, var] : ret) ++ try + { +- if (key == "EmitsReadingsUpdate") ++ bool emitsReadingsUpdate = false; ++ bool logToMetricReportsCollection = false; ++ ReadingParameters readingParams; ++ std::string reportingType; ++ uint64_t interval = 0u; ++ ++ sdbusplus::unpackProperties( ++ properties, "EmitsReadingsUpdate", emitsReadingsUpdate, ++ "LogToMetricReportsCollection", logToMetricReportsCollection, ++ "ReadingParametersFutureVersion", readingParams, "ReportingType", ++ reportingType, "Interval", interval); ++ ++ std::vector<std::string> redfishReportActions; ++ redfishReportActions.reserve(2); ++ if (emitsReadingsUpdate) + { +- emitsReadingsUpdate = std::get_if<bool>(&var); ++ redfishReportActions.emplace_back("RedfishEvent"); + } +- else if (key == "LogToMetricReportsCollection") ++ if (logToMetricReportsCollection) + { +- logToMetricReportsCollection = std::get_if<bool>(&var); ++ redfishReportActions.emplace_back("LogToMetricReportsCollection"); + } +- else if (key == "ReadingParameters") +- { +- readingParams = std::get_if<ReadingParameters>(&var); +- } +- else if (key == "ReportingType") +- { +- reportingType = std::get_if<std::string>(&var); +- } +- else if (key == "Interval") ++ ++ nlohmann::json metrics = nlohmann::json::array(); ++ for (auto& [sensorPath, operationType, id, metadata, ++ collectionTimeScope, collectionDuration] : readingParams) + { +- interval = std::get_if<uint64_t>(&var); ++ std::vector<std::string> metricProperties; ++ ++ nlohmann::json parsedMetadata = nlohmann::json::parse(metadata); ++ if (!json_util::readJson(parsedMetadata, asyncResp->res, ++ "MetricProperties", metricProperties)) ++ { ++ BMCWEB_LOG_ERROR << "Failed to read metadata"; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ metrics.push_back({ ++ {"MetricId", id}, ++ {"MetricProperties", std::move(metricProperties)}, ++ }); + } +- } +- if (!emitsReadingsUpdate || !logToMetricReportsCollection || +- !readingParams || !reportingType || !interval) +- { +- BMCWEB_LOG_ERROR << "Property type mismatch or property is missing"; +- messages::internalError(asyncResp->res); +- return; +- } + +- std::vector<std::string> redfishReportActions; +- redfishReportActions.reserve(2); +- if (*emitsReadingsUpdate) +- { +- redfishReportActions.emplace_back("RedfishEvent"); ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#MetricReportDefinition.v1_3_0.MetricReportDefinition"; ++ asyncResp->res.jsonValue["@odata.id"] = ++ telemetry::metricReportDefinitionUri + id; ++ asyncResp->res.jsonValue["Id"] = id; ++ asyncResp->res.jsonValue["Name"] = id; ++ asyncResp->res.jsonValue["MetricReport"]["@odata.id"] = ++ telemetry::metricReportUri + id; ++ asyncResp->res.jsonValue["Status"]["State"] = "Enabled"; ++ asyncResp->res.jsonValue["ReportUpdates"] = "Overwrite"; ++ asyncResp->res.jsonValue["Metrics"] = metrics; ++ asyncResp->res.jsonValue["MetricReportDefinitionType"] = reportingType; ++ asyncResp->res.jsonValue["ReportActions"] = redfishReportActions; ++ asyncResp->res.jsonValue["Schedule"]["RecurrenceInterval"] = ++ time_utils::toDurationString(std::chrono::milliseconds(interval)); + } +- if (*logToMetricReportsCollection) ++ catch (const sdbusplus::exception::UnpackPropertyError& error) + { +- redfishReportActions.emplace_back("LogToMetricReportsCollection"); ++ BMCWEB_LOG_ERROR << error.what() << ", property: " ++ << error.propertyName + ", reason: " << error.reason; ++ messages::internalError(asyncResp->res); + } +- +- nlohmann::json metrics = nlohmann::json::array(); +- for (auto& [sensorPath, operationType, id, metadata] : *readingParams) ++ catch (const nlohmann::json::parse_error& e) + { +- metrics.push_back({ +- {"MetricId", id}, +- {"MetricProperties", {metadata}}, +- }); ++ BMCWEB_LOG_ERROR << "Failed to parse metadata: " << e.what(); ++ messages::internalError(asyncResp->res); + } +- asyncResp->res.jsonValue["Metrics"] = metrics; +- asyncResp->res.jsonValue["MetricReportDefinitionType"] = *reportingType; +- asyncResp->res.jsonValue["ReportActions"] = redfishReportActions; +- asyncResp->res.jsonValue["Schedule"]["RecurrenceInterval"] = +- time_utils::toDurationString(std::chrono::milliseconds(*interval)); + } + + struct AddReportArgs +@@ -275,6 +280,11 @@ class AddReport + + for (const auto& [id, uris] : args.metrics) + { ++ std::vector<sdbusplus::message::object_path> dbusPaths; ++ dbusPaths.reserve(uris.size()); ++ nlohmann::json metadata; ++ metadata["MetricProperties"] = nlohmann::json::array(); ++ + for (size_t i = 0; i < uris.size(); i++) + { + const std::string& uri = uris[i]; +@@ -291,8 +301,12 @@ class AddReport + } + + const std::string& dbusPath = el->second; +- readingParams.emplace_back(dbusPath, "SINGLE", id, uri); ++ dbusPaths.emplace_back(dbusPath); ++ metadata["MetricProperties"].emplace_back(uri); + } ++ ++ readingParams.emplace_back(dbusPaths, "SINGLE", id, metadata.dump(), ++ "Point", 0u); + } + const std::shared_ptr<bmcweb::AsyncResp> aResp = asyncResp; + crow::connections::systemBus->async_method_call( +@@ -330,10 +344,10 @@ class AddReport + messages::created(aResp->res); + }, + telemetry::service, "/xyz/openbmc_project/Telemetry/Reports", +- "xyz.openbmc_project.Telemetry.ReportManager", "AddReport", +- "TelemetryService/" + args.name, args.reportingType, +- args.emitsReadingsUpdate, args.logToMetricReportsCollection, +- args.interval, readingParams); ++ "xyz.openbmc_project.Telemetry.ReportManager", ++ "AddReportFutureVersion", "TelemetryService/" + args.name, ++ args.reportingType, args.emitsReadingsUpdate, ++ args.logToMetricReportsCollection, args.interval, readingParams); + } + + void insert(const boost::container::flat_map<std::string, std::string>& el) +@@ -415,37 +429,39 @@ inline void requestRoutesMetricReportDefinition(App& app) + BMCWEB_ROUTE(app, + "/redfish/v1/TelemetryService/MetricReportDefinitions/<str>/") + .privileges(redfish::privileges::getMetricReportDefinition) +- .methods(boost::beast::http::verb::get)( +- [](const crow::Request&, +- const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, +- const std::string& id) { +- crow::connections::systemBus->async_method_call( +- [asyncResp, id]( +- const boost::system::error_code ec, +- const std::vector<std::pair< +- std::string, +- std::variant<std::string, bool, uint64_t, +- telemetry::ReadingParameters>>>& ret) { +- if (ec.value() == EBADR || +- ec == boost::system::errc::host_unreachable) +- { +- messages::resourceNotFound( +- asyncResp->res, "MetricReportDefinition", id); +- return; +- } +- if (ec) +- { +- BMCWEB_LOG_ERROR << "respHandler DBus error " << ec; +- messages::internalError(asyncResp->res); +- return; +- } ++ .methods( ++ boost::beast::http::verb::get)([](const crow::Request&, ++ const std::shared_ptr< ++ bmcweb::AsyncResp>& asyncResp, ++ const std::string& id) { ++ sdbusplus::asio::getAllProperties( ++ *crow::connections::systemBus, telemetry::service, ++ telemetry::getDbusReportPath(id), telemetry::reportInterface, ++ [asyncResp, ++ id](boost::system::error_code ec, ++ const std::vector<std::pair< ++ std::string, ++ std::variant<std::monostate, std::string, bool, ++ uint64_t, telemetry::ReadingParameters>>>& ++ properties) { ++ if (ec.value() == EBADR || ++ ec == boost::system::errc::host_unreachable) ++ { ++ messages::resourceNotFound( ++ asyncResp->res, "MetricReportDefinition", id); ++ return; ++ } ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "respHandler DBus error " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ ++ telemetry::fillReportDefinition(asyncResp, id, properties); ++ }); ++ }); + +- telemetry::fillReportDefinition(asyncResp, id, ret); +- }, +- telemetry::service, telemetry::getDbusReportPath(id), +- "org.freedesktop.DBus.Properties", "GetAll", +- telemetry::reportInterface); +- }); + BMCWEB_ROUTE(app, + "/redfish/v1/TelemetryService/MetricReportDefinitions/<str>/") + .privileges(redfish::privileges::deleteMetricReportDefinitionCollection) +-- +2.25.1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0004-Add-support-for-MetricDefinition-property-in-MetricReport.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0004-Add-support-for-MetricDefinition-property-in-MetricReport.patch new file mode 100644 index 000000000..bf5a09d9d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0004-Add-support-for-MetricDefinition-property-in-MetricReport.patch @@ -0,0 +1,268 @@ +From dab3c96f9e39a89d7c359e22655650c7c16952ec Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Tue, 12 Oct 2021 08:06:13 +0000 +Subject: [PATCH] Add support for MetricDefinition property in MetricReport + +Added MetricDefinition as part of MetricValues array returned by +MetricReport. It contains single @odata.id with URI to proper +MetricDefinition resource - depending on MetricProperty. + +Testing done: +- GET request on redfish/v1/TelemetryService/MetricReports + got response with MetricDefinition and proper id inside + MetricValues array. + +Testing steps: +1. POST on redfish/v1/TelemetryService/MetricReportDefinitions + with body: +{ + "Id": "PeriodicReport_1", + "MetricReportDefinitionType": "Periodic", + "ReportActions": [ + "LogToMetricReportsCollection", + "RedfishEvent" + ], + "Metrics": [ + { + "MetricId": "sensor_1", + "MetricProperties": [ + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/1/Reading" + ] + } + ], + "Schedule": { + "RecurrenceInterval": "PT10S" + } +} + +2. GET on redfish/v1/TelemetryService/MetricReports/PeriodicReport_1 + should return: +{ + "@odata.id": + "/redfish/v1/TelemetryService/MetricReports/PeriodicReport_1", + "@odata.type": "#MetricReport.v1_3_0.MetricReport", + "Id": "PeriodicReport_1", + "MetricReportDefinition": { + "@odata.id": + "/redfish/v1/TelemetryService/MetricReportDefinitions/PeriodicReport_1" + }, + "MetricValues": [ + { + "MetricDefinition": { + "@odata.id": + "/redfish/v1/TelemetryService/MetricDefinitions/Rotational" + }, + "MetricId": "sensor_1", + "MetricProperty": + "/redfish/v1/Chassis/AC_Baseboard/Thermal#/Fans/1/Reading", + "MetricValue": "nan", + "Timestamp": "1970-01-01T00:03:21+00:00" + } + ], + "Name": "PeriodicReport_1", + "Timestamp": "1970-01-01T00:03:21+00:00" +} + +Change-Id: I7181c612f9b443015d551259bae25303aa436822 +Signed-off-by: Szymon Dompke <szymon.dompke@intel.com> +--- + meson.build | 4 +- + .../include/utils/telemetry_utils.hpp | 40 ++++++++++++ + redfish-core/lib/metric_report.hpp | 64 +++++++++++++++---- + redfish-core/lib/sensors.hpp | 2 + + 4 files changed, 95 insertions(+), 15 deletions(-) + +diff --git a/meson.build b/meson.build +index 6b6a8ab..218ea49 100644 +--- a/meson.build ++++ b/meson.build +@@ -377,6 +377,8 @@ srcfiles_unittest = [ + 'http/ut/utility_test.cpp' + ] + ++srcfiles_unittest_dependencies = ['redfish-core/src/error_messages.cpp', 'src/boost_url.cpp'] ++ + # Gather the Configuration data + + conf_data = configuration_data() +@@ -434,7 +436,7 @@ executable('bmcweb',srcfiles_bmcweb, + if(get_option('tests').enabled()) + foreach src_test : srcfiles_unittest + testname = src_test.split('/')[-1].split('.')[0] +- test(testname,executable(testname,src_test, ++ test(testname,executable(testname,[src_test] + srcfiles_unittest_dependencies, + include_directories : incdir, + install_dir: bindir, + dependencies: [ +diff --git a/redfish-core/include/utils/telemetry_utils.hpp b/redfish-core/include/utils/telemetry_utils.hpp +index 1b4f75d..c0c5ba3 100644 +--- a/redfish-core/include/utils/telemetry_utils.hpp ++++ b/redfish-core/include/utils/telemetry_utils.hpp +@@ -17,6 +17,46 @@ constexpr const char* metricReportDefinitionUri = + constexpr const char* metricReportUri = + "/redfish/v1/TelemetryService/MetricReports/"; + ++inline std::optional<nlohmann::json> ++ getMetadataJson(const std::string& metadataStr) ++{ ++ std::optional<nlohmann::json> res = ++ nlohmann::json::parse(metadataStr, nullptr, false); ++ if (res->is_discarded()) ++ { ++ BMCWEB_LOG_ERROR << "Malformed reading metatadata JSON provided by " ++ "telemetry service."; ++ return std::nullopt; ++ } ++ return res; ++} ++ ++inline std::optional<std::string> ++ readStringFromMetadata(const nlohmann::json& metadataJson, const char* key) ++{ ++ std::optional<std::string> res; ++ if (auto it = metadataJson.find(key); it != metadataJson.end()) ++ { ++ if (const std::string* value = it->get_ptr<const std::string*>()) ++ { ++ res = *value; ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Incorrect reading metatadata JSON provided by " ++ "telemetry service. Missing key '" ++ << key << "'."; ++ } ++ } ++ else ++ { ++ BMCWEB_LOG_ERROR << "Incorrect reading metatadata JSON provided by " ++ "telemetry service. Key '" ++ << key << "' has a wrong type."; ++ } ++ return res; ++} ++ + inline void + getReportCollection(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + const std::string& uri) +diff --git a/redfish-core/lib/metric_report.hpp b/redfish-core/lib/metric_report.hpp +index 7fe281d..13bf792 100644 +--- a/redfish-core/lib/metric_report.hpp ++++ b/redfish-core/lib/metric_report.hpp +@@ -1,5 +1,6 @@ + #pragma once + ++#include "sensors.hpp" + #include "utils/telemetry_utils.hpp" + + #include <app.hpp> +@@ -15,34 +16,56 @@ using Readings = + std::vector<std::tuple<std::string, std::string, double, uint64_t>>; + using TimestampReadings = std::tuple<uint64_t, Readings>; + +-inline nlohmann::json toMetricValues(const Readings& readings) ++inline bool fillMetricValues(nlohmann::json& metricValues, ++ const Readings& readings) + { +- nlohmann::json metricValues = nlohmann::json::array_t(); +- +- for (auto& [id, metadata, sensorValue, timestamp] : readings) ++ for (auto& [id, metadataStr, sensorValue, timestamp] : readings) + { ++ std::optional<nlohmann::json> readingMetadataJson = ++ getMetadataJson(metadataStr); ++ if (!readingMetadataJson) ++ { ++ return false; ++ } ++ ++ std::optional<std::string> sensorDbusPath = ++ readStringFromMetadata(*readingMetadataJson, "SensorDbusPath"); ++ if (!sensorDbusPath) ++ { ++ return false; ++ } ++ ++ std::optional<std::string> sensorRedfishUri = ++ readStringFromMetadata(*readingMetadataJson, "SensorRedfishUri"); ++ if (!sensorRedfishUri) ++ { ++ return false; ++ } ++ ++ std::string metricDefinition = ++ std::string(metricDefinitionUri) + ++ sensors::toReadingType( ++ sdbusplus::message::object_path(*sensorDbusPath) ++ .parent_path() ++ .filename()); ++ + metricValues.push_back({ ++ {"MetricDefinition", ++ nlohmann::json{{"@odata.id", metricDefinition}}}, + {"MetricId", id}, +- {"MetricProperty", metadata}, ++ {"MetricProperty", *sensorRedfishUri}, + {"MetricValue", std::to_string(sensorValue)}, + {"Timestamp", + crow::utility::getDateTime(static_cast<time_t>(timestamp))}, + }); + } + +- return metricValues; ++ return true; + } + + inline bool fillReport(nlohmann::json& json, const std::string& id, + const std::variant<TimestampReadings>& var) + { +- json["@odata.type"] = "#MetricReport.v1_3_0.MetricReport"; +- json["@odata.id"] = telemetry::metricReportUri + id; +- json["Id"] = id; +- json["Name"] = id; +- json["MetricReportDefinition"]["@odata.id"] = +- telemetry::metricReportDefinitionUri + id; +- + const TimestampReadings* timestampReadings = + std::get_if<TimestampReadings>(&var); + if (!timestampReadings) +@@ -52,9 +75,22 @@ inline bool fillReport(nlohmann::json& json, const std::string& id, + } + + const auto& [timestamp, readings] = *timestampReadings; ++ nlohmann::json metricValues = nlohmann::json::array(); ++ if (!fillMetricValues(metricValues, readings)) ++ { ++ return false; ++ } ++ ++ json["@odata.type"] = "#MetricReport.v1_3_0.MetricReport"; ++ json["@odata.id"] = telemetry::metricReportUri + id; ++ json["Id"] = id; ++ json["Name"] = id; ++ json["MetricReportDefinition"]["@odata.id"] = ++ telemetry::metricReportDefinitionUri + id; + json["Timestamp"] = + crow::utility::getDateTime(static_cast<time_t>(timestamp)); +- json["MetricValues"] = toMetricValues(readings); ++ json["MetricValues"] = metricValues; ++ + return true; + } + } // namespace telemetry +diff --git a/redfish-core/lib/sensors.hpp b/redfish-core/lib/sensors.hpp +index 7405e5a..9850b24 100644 +--- a/redfish-core/lib/sensors.hpp ++++ b/redfish-core/lib/sensors.hpp +@@ -21,6 +21,8 @@ + #include <boost/container/flat_map.hpp> + #include <boost/range/algorithm/replace_copy_if.hpp> + #include <dbus_singleton.hpp> ++#include <dbus_utility.hpp> ++#include <error_messages.hpp> + #include <registries/privilege_registry.hpp> + #include <utils/json_utils.hpp> + +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0005-Add-GET-method-for-TriggerCollection.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0005-Add-GET-method-for-TriggerCollection.patch new file mode 100644 index 000000000..0646aba5c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0005-Add-GET-method-for-TriggerCollection.patch @@ -0,0 +1,313 @@ +From a1e89d356ba5ed594a1494efe8257946e1062396 Mon Sep 17 00:00:00 2001 +From: Lukasz Kazmierczak <lukasz.kazmierczak@intel.com> +Date: Tue, 31 Aug 2021 14:35:31 +0200 +Subject: [PATCH] Add GET method for TriggerCollection + +Added GET method for retrieving list of Triggers from Telemetry service + +Tested: +- Added single Trigger and requested result from bmcweb via + /redfish/v1/TelemetryService/Triggers +- Added multiple Triggers numeric and discrete, and requested results + from bmcweb via /redfish/v1/TelemetryService/Triggers +- Verified uri /redfish/v1/TelemetryService/Triggers by using + Redfish-Service-Validator (all passed) + +Signed-off-by: Lukasz Kazmierczak <lukasz.kazmierczak@intel.com> +Change-Id: Ide00eb44901ea1b97b80fc5c5ddfd97e393d4a04 +--- + redfish-core/include/redfish.hpp | 2 + + .../include/utils/telemetry_utils.hpp | 40 ++++++++--- + redfish-core/lib/metric_report.hpp | 6 +- + redfish-core/lib/metric_report_definition.hpp | 6 +- + redfish-core/lib/trigger.hpp | 31 ++++++++ + scripts/update_schemas.py | 1 + + static/redfish/v1/$metadata/index.xml | 3 + + .../v1/schema/TriggersCollection_v1.xml | 70 +++++++++++++++++++ + 8 files changed, 144 insertions(+), 15 deletions(-) + create mode 100644 redfish-core/lib/trigger.hpp + create mode 100644 static/redfish/v1/schema/TriggersCollection_v1.xml + +diff --git a/redfish-core/include/redfish.hpp b/redfish-core/include/redfish.hpp +index 9fb0ffe..99b3fe6 100644 +--- a/redfish-core/include/redfish.hpp ++++ b/redfish-core/include/redfish.hpp +@@ -42,6 +42,7 @@ + #include "../lib/task.hpp" + #include "../lib/telemetry_service.hpp" + #include "../lib/thermal.hpp" ++#include "../lib/trigger.hpp" + #include "../lib/update_service.hpp" + #include "../lib/virtual_media.hpp" + +@@ -197,6 +198,7 @@ class RedfishService + + hypervisor::requestRoutesHypervisorSystems(app); + ++ requestRoutesTriggerCollection(app); + requestRoutesTelemetryService(app); + requestRoutesMetricReportDefinitionCollection(app); + requestRoutesMetricReportDefinition(app); +diff --git a/redfish-core/include/utils/telemetry_utils.hpp b/redfish-core/include/utils/telemetry_utils.hpp +index c0c5ba3..df1aa68 100644 +--- a/redfish-core/include/utils/telemetry_utils.hpp ++++ b/redfish-core/include/utils/telemetry_utils.hpp +@@ -9,6 +9,8 @@ namespace telemetry + { + + constexpr const char* service = "xyz.openbmc_project.Telemetry"; ++constexpr const char* reportSubtree = ++ "/xyz/openbmc_project/Telemetry/Reports/TelemetryService"; + constexpr const char* reportInterface = "xyz.openbmc_project.Telemetry.Report"; + constexpr const char* metricDefinitionUri = + "/redfish/v1/TelemetryService/MetricDefinitions/"; +@@ -16,6 +18,11 @@ constexpr const char* metricReportDefinitionUri = + "/redfish/v1/TelemetryService/MetricReportDefinitions/"; + constexpr const char* metricReportUri = + "/redfish/v1/TelemetryService/MetricReports/"; ++constexpr const char* triggerSubtree = ++ "/xyz/openbmc_project/Telemetry/Triggers/TelemetryService"; ++constexpr const char* triggerInterface = ++ "xyz.openbmc_project.Telemetry.Trigger"; ++constexpr const char* triggerUri = "/redfish/v1/TelemetryService/Triggers/"; + + inline std::optional<nlohmann::json> + getMetadataJson(const std::string& metadataStr) +@@ -57,15 +64,27 @@ inline std::optional<std::string> + return res; + } + +-inline void +- getReportCollection(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, +- const std::string& uri) ++struct CollectionParams + { +- const std::array<const char*, 1> interfaces = {reportInterface}; ++ const char* subtree; ++ int depth; ++ std::array<const char*, 1> interfaces; + ++ CollectionParams() = delete; ++ CollectionParams(const char* st, int dp, ++ const std::array<const char*, 1>& ifaces) : ++ subtree{st}, ++ depth{dp}, interfaces{ifaces} ++ {} ++}; ++ ++inline void getCollection(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const std::string& uri, ++ const CollectionParams& params) ++{ + crow::connections::systemBus->async_method_call( + [asyncResp, uri](const boost::system::error_code ec, +- const std::vector<std::string>& reports) { ++ const std::vector<std::string>& items) { + if (ec == boost::system::errc::io_error) + { + asyncResp->res.jsonValue["Members"] = nlohmann::json::array(); +@@ -82,13 +101,13 @@ inline void + nlohmann::json& members = asyncResp->res.jsonValue["Members"]; + members = nlohmann::json::array(); + +- for (const std::string& report : reports) ++ for (const std::string& item : items) + { +- sdbusplus::message::object_path path(report); ++ sdbusplus::message::object_path path(item); + std::string name = path.filename(); + if (name.empty()) + { +- BMCWEB_LOG_ERROR << "Received invalid path: " << report; ++ BMCWEB_LOG_ERROR << "Received invalid path: " << item; + messages::internalError(asyncResp->res); + return; + } +@@ -99,9 +118,8 @@ inline void + }, + "xyz.openbmc_project.ObjectMapper", + "/xyz/openbmc_project/object_mapper", +- "xyz.openbmc_project.ObjectMapper", "GetSubTreePaths", +- "/xyz/openbmc_project/Telemetry/Reports/TelemetryService", 1, +- interfaces); ++ "xyz.openbmc_project.ObjectMapper", "GetSubTreePaths", params.subtree, ++ params.depth, params.interfaces); + } + + inline std::string getDbusReportPath(const std::string& id) +diff --git a/redfish-core/lib/metric_report.hpp b/redfish-core/lib/metric_report.hpp +index 13bf792..ea4cd62 100644 +--- a/redfish-core/lib/metric_report.hpp ++++ b/redfish-core/lib/metric_report.hpp +@@ -108,8 +108,10 @@ inline void requestRoutesMetricReportCollection(App& app) + "/redfish/v1/TelemetryService/MetricReports"; + asyncResp->res.jsonValue["Name"] = "Metric Report Collection"; + +- telemetry::getReportCollection(asyncResp, +- telemetry::metricReportUri); ++ telemetry::getCollection( ++ asyncResp, telemetry::metricReportUri, ++ telemetry::CollectionParams(telemetry::reportSubtree, 1, ++ {telemetry::reportInterface})); + }); + } + +diff --git a/redfish-core/lib/metric_report_definition.hpp b/redfish-core/lib/metric_report_definition.hpp +index 7c26787..c97a1df 100644 +--- a/redfish-core/lib/metric_report_definition.hpp ++++ b/redfish-core/lib/metric_report_definition.hpp +@@ -377,8 +377,10 @@ inline void requestRoutesMetricReportDefinitionCollection(App& app) + asyncResp->res.jsonValue["Name"] = + "Metric Definition Collection"; + +- telemetry::getReportCollection( +- asyncResp, telemetry::metricReportDefinitionUri); ++ telemetry::getCollection( ++ asyncResp, telemetry::metricReportDefinitionUri, ++ telemetry::CollectionParams(telemetry::reportSubtree, 1, ++ {telemetry::reportInterface})); + }); + + BMCWEB_ROUTE(app, "/redfish/v1/TelemetryService/MetricReportDefinitions/") +diff --git a/redfish-core/lib/trigger.hpp b/redfish-core/lib/trigger.hpp +new file mode 100644 +index 0000000..681b3b4 +--- /dev/null ++++ b/redfish-core/lib/trigger.hpp +@@ -0,0 +1,31 @@ ++#pragma once ++ ++#include "utils/telemetry_utils.hpp" ++ ++#include <app.hpp> ++#include <registries/privilege_registry.hpp> ++ ++namespace redfish ++{ ++ ++inline void requestRoutesTriggerCollection(App& app) ++{ ++ BMCWEB_ROUTE(app, "/redfish/v1/TelemetryService/Triggers/") ++ .privileges(redfish::privileges::getTriggersCollection) ++ .methods(boost::beast::http::verb::get)( ++ [](const crow::Request&, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp) { ++ asyncResp->res.jsonValue["@odata.type"] = ++ "#TriggersCollection.TriggersCollection"; ++ asyncResp->res.jsonValue["@odata.id"] = ++ "/redfish/v1/TelemetryService/Triggers"; ++ asyncResp->res.jsonValue["Name"] = "Triggers Collection"; ++ ++ telemetry::getCollection( ++ asyncResp, telemetry::triggerUri, ++ telemetry::CollectionParams(telemetry::triggerSubtree, 1, ++ {telemetry::triggerInterface})); ++ }); ++} ++ ++} // namespace redfish +diff --git a/scripts/update_schemas.py b/scripts/update_schemas.py +index dd39278..d66a59a 100755 +--- a/scripts/update_schemas.py ++++ b/scripts/update_schemas.py +@@ -93,6 +93,7 @@ include_list = [ + 'TaskService', + 'TelemetryService', + 'Thermal', ++ 'TriggersCollection', + 'UpdateService', + 'VLanNetworkInterfaceCollection', + 'VLanNetworkInterface', +diff --git a/static/redfish/v1/$metadata/index.xml b/static/redfish/v1/$metadata/index.xml +index 876ebfb..75e3dd4 100644 +--- a/static/redfish/v1/$metadata/index.xml ++++ b/static/redfish/v1/$metadata/index.xml +@@ -2215,6 +2215,9 @@ + <edmx:Include Namespace="Thermal.v1_7_0"/> + <edmx:Include Namespace="Thermal.v1_7_1"/> + </edmx:Reference> ++ <edmx:Reference Uri="/redfish/v1/schema/TriggersCollection_v1.xml"> ++ <edmx:Include Namespace="TriggersCollection"/> ++ </edmx:Reference> + <edmx:Reference Uri="/redfish/v1/schema/UpdateService_v1.xml"> + <edmx:Include Namespace="UpdateService"/> + <edmx:Include Namespace="UpdateService.v1_0_0"/> +diff --git a/static/redfish/v1/schema/TriggersCollection_v1.xml b/static/redfish/v1/schema/TriggersCollection_v1.xml +new file mode 100644 +index 0000000..399bebd +--- /dev/null ++++ b/static/redfish/v1/schema/TriggersCollection_v1.xml +@@ -0,0 +1,70 @@ ++<?xml version="1.0" encoding="UTF-8"?> ++<!----> ++<!--################################################################################ --> ++<!--# Redfish Schema: TriggerSetCollection --> ++<!--# --> ++<!--# For a detailed change log, see the README file contained in the DSP8010 bundle, --> ++<!--# available at http://www.dmtf.org/standards/redfish --> ++<!--# Copyright 2014-2021 DMTF. --> ++<!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright --> ++<!--################################################################################ --> ++<!----> ++<edmx:Edmx xmlns:edmx="http://docs.oasis-open.org/odata/ns/edmx" Version="4.0"> ++ ++ <edmx:Reference Uri="http://docs.oasis-open.org/odata/odata/v4.0/errata03/csd01/complete/vocabularies/Org.OData.Core.V1.xml"> ++ <edmx:Include Namespace="Org.OData.Core.V1" Alias="OData"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://docs.oasis-open.org/odata/odata/v4.0/errata03/csd01/complete/vocabularies/Org.OData.Capabilities.V1.xml"> ++ <edmx:Include Namespace="Org.OData.Capabilities.V1" Alias="Capabilities"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/Resource_v1.xml"> ++ <edmx:Include Namespace="Resource.v1_0_0"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/RedfishExtensions_v1.xml"> ++ <edmx:Include Namespace="RedfishExtensions.v1_0_0" Alias="Redfish"/> ++ </edmx:Reference> ++ <edmx:Reference Uri="http://redfish.dmtf.org/schemas/v1/Triggers_v1.xml"> ++ <edmx:Include Namespace="Triggers"/> ++ </edmx:Reference> ++ ++ <edmx:DataServices> ++ ++ <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="TriggersCollection"> ++ <Annotation Term="Redfish.OwningEntity" String="DMTF"/> ++ ++ <EntityType Name="TriggersCollection" BaseType="Resource.v1_0_0.ResourceCollection"> ++ <Annotation Term="OData.Description" String="The collection of Triggers resource instances."/> ++ <Annotation Term="OData.LongDescription" String="This resource shall represent a resource collection of Triggers instances for a Redfish implementation."/> ++ <Annotation Term="Capabilities.InsertRestrictions"> ++ <Record> ++ <PropertyValue Property="Insertable" Bool="true"/> ++ <Annotation Term="OData.Description" String="Create triggers through a POST to the trigger collection."/> ++ </Record> ++ </Annotation> ++ <Annotation Term="Capabilities.UpdateRestrictions"> ++ <Record> ++ <PropertyValue Property="Updatable" Bool="false"/> ++ </Record> ++ </Annotation> ++ <Annotation Term="Capabilities.DeleteRestrictions"> ++ <Record> ++ <PropertyValue Property="Deletable" Bool="false"/> ++ </Record> ++ </Annotation> ++ <Annotation Term="Redfish.Uris"> ++ <Collection> ++ <String>/redfish/v1/TelemetryService/Triggers</String> ++ </Collection> ++ </Annotation> ++ <NavigationProperty Name="Members" Type="Collection(Triggers.Triggers)"> ++ <Annotation Term="OData.Permissions" EnumMember="OData.Permission/Read"/> ++ <Annotation Term="OData.Description" String="The members of this collection."/> ++ <Annotation Term="OData.LongDescription" String="This property shall contain an array of links to the members of this collection."/> ++ <Annotation Term="OData.AutoExpandReferences"/> ++ <Annotation Term="Redfish.Required"/> ++ </NavigationProperty> ++ </EntityType> ++ ++ </Schema> ++ </edmx:DataServices> ++</edmx:Edmx> +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0006-Revert-Remove-LogService-from-TelemetryService.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0006-Revert-Remove-LogService-from-TelemetryService.patch new file mode 100644 index 000000000..a80ac61c7 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0006-Revert-Remove-LogService-from-TelemetryService.patch @@ -0,0 +1,26 @@ +From da575aaf0bdcb15be261d58314cf7bbbcd92dd74 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Tue, 12 Oct 2021 08:08:06 +0000 +Subject: [PATCH] Revert "Remove LogService from TelemetryService" + +This reverts commit 2b3da45876aac57a36d3093379a992d699e7e396. +--- + redfish-core/lib/telemetry_service.hpp | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/redfish-core/lib/telemetry_service.hpp b/redfish-core/lib/telemetry_service.hpp +index 027b51b..49471fe 100644 +--- a/redfish-core/lib/telemetry_service.hpp ++++ b/redfish-core/lib/telemetry_service.hpp +@@ -24,6 +24,8 @@ inline void handleTelemetryServiceGet( + "/redfish/v1/TelemetryService/MetricReports"; + asyncResp->res.jsonValue["MetricDefinitions"]["@odata.id"] = + "/redfish/v1/TelemetryService/MetricDefinitions"; ++ asyncResp->res.jsonValue["LogService"]["@odata.id"] = ++ "/redfish/v1/Managers/bmc/LogServices/Journal"; + + crow::connections::systemBus->async_method_call( + [asyncResp](const boost::system::error_code ec, +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0007-event-service-fix-added-Context-field-to-response.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0007-event-service-fix-added-Context-field-to-response.patch new file mode 100644 index 000000000..ffab743f6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0007-event-service-fix-added-Context-field-to-response.patch @@ -0,0 +1,29 @@ +From 0ca8c383db8c9afbce63380955a20ada0acc20b7 Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Wed, 2 Jun 2021 12:44:43 +0000 +Subject: [PATCH] event service fix, added Context field to response + +Tested: + - Context field is present + - No regression detected + +Signed-off-by: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +--- + redfish-core/include/event_service_manager.hpp | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index 2b957ea..289886b 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -556,6 +556,7 @@ class Subscription + << id; + return; + } ++ msg["Context"] = customText; + + this->sendEvent( + msg.dump(2, ' ', true, nlohmann::json::error_handler_t::replace)); +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0009-Add-support-for-deleting-terminated-subscriptions.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0009-Add-support-for-deleting-terminated-subscriptions.patch new file mode 100644 index 000000000..548e3d9c6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/0009-Add-support-for-deleting-terminated-subscriptions.patch @@ -0,0 +1,46 @@ +From ef83a4fb14648edc6c8370363ff88fb6f060a43b Mon Sep 17 00:00:00 2001 +From: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +Date: Mon, 20 Sep 2021 21:55:57 +0530 +Subject: [PATCH] Add support for deleting terminated subscriptions + +Added functionality to delete/remove event subscription(s) which are +configured to Terminate after retries. + +Currently, when an Event is subscribed with Retry Policy as +"TerminateAfterRetries", the state of the connection is set to +"Terminated" after retrying, but the Subscription is not removed. +This commit adds the functionality to detect terminated connection and +remove the respective subscription. + +This commit adds this check for metric reports. + +Tested: + - Created a Subscription with + DeliveryRetryPolicy: "TerminateAfterRetries" + - Received Events successfully on Event listener + - Once the Event listener was stopped, the Subscription was + removed/deleted after retries. + +Change-Id: I3cb0af5bc24411cddcdb3d1d9de25e8e9144106c +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + redfish-core/include/event_service_manager.hpp | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/redfish-core/include/event_service_manager.hpp b/redfish-core/include/event_service_manager.hpp +index c9e2812..c2fefb3 100644 +--- a/redfish-core/include/event_service_manager.hpp ++++ b/redfish-core/include/event_service_manager.hpp +@@ -1535,6 +1535,9 @@ class EventServiceManager + + std::variant<telemetry::TimestampReadings>& readings = + found->second; ++ ++ this->deleteTerminatedSubcriptions(); ++ + for (const auto& it : + EventServiceManager::getInstance().subscriptionsMap) + { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/README b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/README new file mode 100644 index 000000000..90916ecec --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/telemetry/README @@ -0,0 +1,30 @@ +These patches are mirror of upstream TelemetryService implementation. +Until change is integrated they will be manually merged here to enable feature in Intel builds. + +Current revisions: +- Add support for MetricDefinition scheme + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/33363/102 + +- Sync Telmetry service with EventService + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/38798/53 + +- Switched bmcweb to use new telemetry service API + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/44270/19 + +- Add support for MetricDefinition property in MetricReport + https://gerrit.openbmc-project.xyz/c/openbmc/bmcweb/+/44512/24 + +- Add GET method for TriggerCollection + file://telemetry/0005-Add-GET-method-for-TriggerCollection.patch + +- LogService field, actual implementation will be upstreamed with triggers feature + file://telemetry/0006-Revert-Remove-LogService-from-TelemetryService.patch + +- Event service fix for Context field + file://telemetry/0007-event-service-fix-added-Context-field-to-response.patch + +- Generalize ReadingType in MetricDefinition + file://telemetry/0008-Generalize-ReadingType-in-MetricDefinition.patch + +- Add support for deleting terminated subscriptions + file://telemetry/0009-Add-support-for-deleting-terminated-subscriptions.patch diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0001-Revert-Disable-nbd-proxy-from-the-build.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0001-Revert-Disable-nbd-proxy-from-the-build.patch new file mode 100644 index 000000000..de316c4fa --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0001-Revert-Disable-nbd-proxy-from-the-build.patch @@ -0,0 +1,61 @@ +From b6863f9a0c1c36705eba0c3181541f67cd1a202a Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Wed, 14 Jul 2021 09:04:42 +0000 +Subject: [PATCH] Revert "Disable nbd proxy from the build" + +NBD Proxy has been disabled upstream. Reenable as we use it for Virtual +Media + +This reverts commit efb8062c306474942bc94f15d748b2eb0b58fbb6. + +Change-Id: I19a88b30c1074dd376f2df8f5668245b638b881f +--- + meson.build | 3 ++- + meson_options.txt | 10 ++-------- + 2 files changed, 4 insertions(+), 9 deletions(-) + +diff --git a/meson.build b/meson.build +index 650a5ec..5738b10 100644 +--- a/meson.build ++++ b/meson.build +@@ -83,7 +83,8 @@ feature_map = { + 'rest' : '-DBMCWEB_ENABLE_DBUS_REST', + 'static-hosting' : '-DBMCWEB_ENABLE_STATIC_HOSTING', + 'insecure-tftp-update' : '-DBMCWEB_INSECURE_ENABLE_REDFISH_FW_TFTP_UPDATE', +- #'vm-nbdproxy' : '-DBMCWEB_ENABLE_VM_NBDPROXY', ++ 'validate-unsecure-feature' : '-DBMCWEB_ENABLE_VALIDATION_UNSECURE_FEATURE', ++ 'vm-nbdproxy' : '-DBMCWEB_ENABLE_VM_NBDPROXY', + 'vm-websocket' : '-DBMCWEB_ENABLE_VM_WEBSOCKET', + } + +diff --git a/meson_options.txt b/meson_options.txt +index ff5b887..645f224 100644 +--- a/meson_options.txt ++++ b/meson_options.txt +@@ -3,14 +3,7 @@ option('yocto-deps', type: 'feature', value: 'disabled', description : 'Use YOCT + option('kvm', type : 'feature',value : 'enabled', description : 'Enable the KVM host video WebSocket. Path is \'/kvm/0\'. Video is from the BMC\'s \'/dev/video\' device.') + option ('tests', type : 'feature', value : 'enabled', description : 'Enable Unit tests for bmcweb') + option('vm-websocket', type : 'feature', value : 'enabled', description : '''Enable the Virtual Media WebSocket. Path is \'/vm/0/0\'to open the websocket. See https://github.com/openbmc/jsnbd/blob/master/README.''') +- +-# if you use this option and are seeing this comment, please comment here: +-# https://github.com/openbmc/bmcweb/issues/188 and put forward your intentions +-# for this code. At this point, no daemon has been upstreamed that implements +-# this interface, so for the moment this appears to be dead code; In leiu of +-# removing it, it has been disabled to try to give those that use it the +-# opportunity to upstream their backend implementation +-#option('vm-nbdproxy', type: 'feature', value : 'disabled', description : 'Enable the Virtual Media WebSocket.') ++option('vm-nbdproxy', type: 'feature', value : 'disabled', description : 'Enable the Virtual Media WebSocket.') + option('rest', type : 'feature', value : 'enabled', description : '''Enable Phosphor REST (D-Bus) APIs. Paths directly map Phosphor D-Bus object paths, for example, \'/xyz/openbmc_project/logging/entry/enumerate\'. See https://github.com/openbmc/docs/blob/master/rest-api.md.''') + option('redfish', type : 'feature',value : 'enabled', description: 'Enable Redfish APIs. Paths are under \'/redfish/v1/\'. See https://github.com/openbmc/bmcweb/blob/master/DEVELOPING.md#redfish.') + option('host-serial-socket', type : 'feature', value : 'enabled', description : 'Enable host serial console WebSocket. Path is \'/console0\'. See https://github.com/openbmc/docs/blob/master/console.md.') +@@ -39,6 +32,7 @@ option ('https_port', type : 'integer', min : 1, max : 65535, value : 443, descr + # the implications of doing so.In general, enabling these options will cause security + # problems of varying degrees + ++option ('validate-unsecure-feature', type : 'feature', value : 'disabled', description : '''Enables unsecure features required by validation. Note: mustbe turned off for production images.''') + option ('insecure-disable-csrf', type : 'feature', value : 'disabled', description : 'Disable CSRF prevention checks.Should be set to false for production systems.') + option ('insecure-disable-ssl', type : 'feature', value : 'disabled', description : 'Disable SSL ports. Should be set to false for production systems.') + option ('insecure-disable-auth', type : 'feature', value : 'disabled', description : 'Disable authentication on all ports. Should be set to false for production systems') +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0002-bmcweb-handle-device-or-resource-busy-exception.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0002-bmcweb-handle-device-or-resource-busy-exception.patch new file mode 100644 index 000000000..e267dc60f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0002-bmcweb-handle-device-or-resource-busy-exception.patch @@ -0,0 +1,214 @@ +From bbb69d73ca8b74d34fa250813123de4274d5327b Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Fri, 23 Jul 2021 12:07:02 +0000 +Subject: [PATCH] bmcweb handle device or resource busy exception + +Use async_method_call_timed() for mount/unmount dbus oprations. +Long mount/unmount times are supported by VirtualMedia service, +this works because of settable timeout property, available for each block +device. +Default dbus calls will timeout when mount/unmount timeout is long enough. + +Get mount/unmount timeout property and use it for mount/unmount calls. +Add handling of device or resource busy exception (EBUSY) that +can be thrown by VirtualMedia service during Mount/Unmount dbus operations. + +Tested: Verified that after mounting non-existing HTTPS resource + in proxy mode, VirtualMedia recovers restoring ready state + and returns EBUSY during that transition. + Verfied that resources can be mounted/unmounted in both legacy + and proxy mode. +Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> +Change-Id: Ica62c34db0cce24c4c6169fc661edfde49e948d0 +--- + redfish-core/lib/virtual_media.hpp | 142 +++++++++++++++++++++-------- + 1 file changed, 105 insertions(+), 37 deletions(-) + +diff --git a/redfish-core/lib/virtual_media.hpp b/redfish-core/lib/virtual_media.hpp +index 6e69f20..7fcbf73 100644 +--- a/redfish-core/lib/virtual_media.hpp ++++ b/redfish-core/lib/virtual_media.hpp +@@ -26,6 +26,8 @@ + #include <boost/url/url_view.hpp> + #include <registries/privilege_registry.hpp> + ++#include <chrono> ++ + namespace redfish + { + /** +@@ -162,6 +164,26 @@ inline void + } + } + ++/** ++ * @brief parses Timeout property and converts to microseconds ++ */ ++static std::optional<uint64_t> ++ vmParseTimeoutProperty(const std::variant<int>& timeoutProperty) ++{ ++ const int* timeoutValue = std::get_if<int>(&timeoutProperty); ++ if (timeoutValue) ++ { ++ constexpr int timeoutMarginSeconds = 10; ++ return std::chrono::duration_cast<std::chrono::microseconds>( ++ std::chrono::seconds(*timeoutValue + timeoutMarginSeconds)) ++ .count(); ++ } ++ else ++ { ++ return std::nullopt; ++ } ++} ++ + /** + * @brief Fill template for Virtual Media Item. + */ +@@ -712,22 +734,57 @@ inline void doMountVmLegacy(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + } + + crow::connections::systemBus->async_method_call( +- [asyncResp, secretPipe](const boost::system::error_code ec, +- bool success) { ++ [asyncResp, service, name, imageUrl, rw, unixFd, ++ secretPipe](const boost::system::error_code ec, ++ const std::variant<int> timeoutProperty) { + if (ec) + { + BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; + messages::internalError(asyncResp->res); ++ return; + } +- else if (!success) ++ ++ auto timeout = vmParseTimeoutProperty(timeoutProperty); ++ if (timeout == std::nullopt) + { +- BMCWEB_LOG_ERROR << "Service responded with error"; +- messages::generalError(asyncResp->res); ++ BMCWEB_LOG_ERROR << "Timeout property is empty."; ++ messages::internalError(asyncResp->res); ++ return; + } ++ ++ crow::connections::systemBus->async_method_call_timed( ++ [asyncResp, secretPipe](const boost::system::error_code ec, ++ bool success) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; ++ if (ec == boost::system::errc::device_or_resource_busy) ++ { ++ messages::resourceInUse(asyncResp->res); ++ } ++ else if (ec == boost::system::errc::permission_denied) ++ { ++ messages::accessDenied(asyncResp->res, ++ "VirtualMedia.Insert"); ++ } ++ else ++ { ++ messages::internalError(asyncResp->res); ++ } ++ } ++ else if (!success) ++ { ++ BMCWEB_LOG_ERROR << "Service responded with error "; ++ messages::generalError(asyncResp->res); ++ } ++ }, ++ service, "/xyz/openbmc_project/VirtualMedia/Legacy/" + name, ++ "xyz.openbmc_project.VirtualMedia.Legacy", "Mount", *timeout, ++ imageUrl, rw, unixFd); + }, + service, "/xyz/openbmc_project/VirtualMedia/Legacy/" + name, +- "xyz.openbmc_project.VirtualMedia.Legacy", "Mount", imageUrl, rw, +- unixFd); ++ "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.VirtualMedia.MountPoint", "Timeout"); + } + + /** +@@ -739,38 +796,49 @@ inline void doVmAction(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + const std::string& service, const std::string& name, + bool legacy) + { ++ const std::string vmMode = legacy ? "Legacy" : "Proxy"; ++ const std::string objectPath = ++ "/xyz/openbmc_project/VirtualMedia/" + vmMode + "/" + name; ++ const std::string ifaceName = "xyz.openbmc_project.VirtualMedia." + vmMode; + +- // Legacy mount requires parameter with image +- if (legacy) +- { +- crow::connections::systemBus->async_method_call( +- [asyncResp](const boost::system::error_code ec) { +- if (ec) +- { +- BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; +- +- messages::internalError(asyncResp->res); +- return; +- } +- }, +- service, "/xyz/openbmc_project/VirtualMedia/Legacy/" + name, +- "xyz.openbmc_project.VirtualMedia.Legacy", "Unmount"); +- } +- else // proxy +- { +- crow::connections::systemBus->async_method_call( +- [asyncResp](const boost::system::error_code ec) { +- if (ec) +- { +- BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; ++ crow::connections::systemBus->async_method_call( ++ [asyncResp, service, name, objectPath, ++ ifaceName](const boost::system::error_code ec, ++ const std::variant<int> timeoutProperty) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; ++ messages::internalError(asyncResp->res); ++ return; ++ } + +- messages::internalError(asyncResp->res); +- return; +- } +- }, +- service, "/xyz/openbmc_project/VirtualMedia/Proxy/" + name, +- "xyz.openbmc_project.VirtualMedia.Proxy", "Unmount"); +- } ++ auto timeout = vmParseTimeoutProperty(timeoutProperty); ++ if (timeout == std::nullopt) ++ { ++ BMCWEB_LOG_ERROR << "Timeout property is empty."; ++ messages::internalError(asyncResp->res); ++ return; ++ } ++ crow::connections::systemBus->async_method_call_timed( ++ [asyncResp](const boost::system::error_code ec) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "Bad D-Bus request error: " << ec; ++ if (ec == boost::system::errc::device_or_resource_busy) ++ { ++ messages::resourceInUse(asyncResp->res); ++ } ++ else ++ { ++ messages::internalError(asyncResp->res); ++ } ++ return; ++ } ++ }, ++ service, objectPath, ifaceName, "Unmount", *timeout); ++ }, ++ service, objectPath, "org.freedesktop.DBus.Properties", "Get", ++ "xyz.openbmc_project.VirtualMedia.MountPoint", "Timeout"); + } + + inline void requestNBDVirtualMediaRoutes(App& app) +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0003-Add-ConnectedVia-property-to-virtual-media-item-temp.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0003-Add-ConnectedVia-property-to-virtual-media-item-temp.patch new file mode 100644 index 000000000..c8af3a659 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0003-Add-ConnectedVia-property-to-virtual-media-item-temp.patch @@ -0,0 +1,28 @@ +From 1abf9a1d336eed835472fe933210d3be7ad5ba7a Mon Sep 17 00:00:00 2001 +From: Karol Wachowski <karol.wachowski@intel.com> +Date: Thu, 11 Feb 2021 08:35:41 +0000 +Subject: [PATCH] Add ConnectedVia property to virtual media item template + +Tested: Verified that ConnectedVia property is returned and set to + "NotConnected" for disconnected media. + +Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> +--- + redfish-core/lib/virtual_media.hpp | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/redfish-core/lib/virtual_media.hpp b/redfish-core/lib/virtual_media.hpp +index 57c2bd2..de1cc94 100644 +--- a/redfish-core/lib/virtual_media.hpp ++++ b/redfish-core/lib/virtual_media.hpp +@@ -200,6 +200,7 @@ inline nlohmann::json vmItemTemplate(const std::string& name, + item["@odata.id"] = std::move(id); + + item["@odata.type"] = "#VirtualMedia.v1_3_0.VirtualMedia"; ++ item["ConnectedVia"] = "NotConnected"; + item["Name"] = "Virtual Removable Media"; + item["Id"] = resName; + item["WriteProtected"] = true; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0004-Invalid-status-code-from-InsertMedia-REST-methods.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0004-Invalid-status-code-from-InsertMedia-REST-methods.patch new file mode 100644 index 000000000..439b05b3c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0004-Invalid-status-code-from-InsertMedia-REST-methods.patch @@ -0,0 +1,175 @@ +From 437a2a854303ed4e05344684b1990806464268cd Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Thu, 1 Jul 2021 10:08:27 +0000 +Subject: [PATCH] Invalid status code from InsertMedia REST methods GET, PUT, + DELETE, PATCH in proxy mode + +Add handlers for GET, PUT, DELETE, PATCH method and function that +checks which mode is used and set suitable status code: +Not allowed for Legacy and Not found for Proxy. + +Change-Id: Ib4c0a3e9a2a8853caa74c59239d9fcfed99c5e8b +Signed-off-by: Alicja Rybak <alicja.rybak@intel.com> +Signed-off-by: P Dheeraj Srujan Kumar <p.dheeraj.srujan.kumar@intel.com> +--- + redfish-core/lib/virtual_media.hpp | 137 +++++++++++++++++++++++++++++ + 1 file changed, 137 insertions(+) + +diff --git a/redfish-core/lib/virtual_media.hpp b/redfish-core/lib/virtual_media.hpp +index 3b9f7ef..7d77b9f 100644 +--- a/redfish-core/lib/virtual_media.hpp ++++ b/redfish-core/lib/virtual_media.hpp +@@ -30,6 +30,117 @@ + + namespace redfish + { ++ ++/** ++ * @brief Function checks if insert media request is Legacy or Proxy type ++ * and sets suitable response code for unsupported REST method. ++ * ++ */ ++void CheckProxyMode(const std::shared_ptr<bmcweb::AsyncResp>& aResp, ++ const crow::Request& req, const std::string& name, ++ const std::string& resName) ++{ ++ if (name != "bmc") ++ { ++ messages::resourceNotFound(aResp->res, "VirtualMedia.Insert", resName); ++ ++ return; ++ } ++ ++ crow::connections::systemBus->async_method_call( ++ [aResp, req, resName](const boost::system::error_code ec, ++ const GetObjectType& getObjectType) { ++ if (ec) ++ { ++ BMCWEB_LOG_ERROR << "ObjectMapper::GetObject call failed: " ++ << ec; ++ aResp->res.result(boost::beast::http::status::not_found); ++ ++ return; ++ } ++ ++ if (getObjectType.size() == 0) ++ { ++ BMCWEB_LOG_ERROR << "ObjectMapper : No Service found"; ++ aResp->res.result(boost::beast::http::status::not_found); ++ return; ++ } ++ ++ std::string service = getObjectType.begin()->first; ++ BMCWEB_LOG_DEBUG << "GetObjectType: " << service; ++ ++ crow::connections::systemBus->async_method_call( ++ [service, resName, req, ++ aResp](const boost::system::error_code ec, ++ ManagedObjectType& subtree) { ++ if (ec) ++ { ++ BMCWEB_LOG_DEBUG << "DBUS response error"; ++ ++ return; ++ } ++ ++ for (auto& item : subtree) ++ { ++ std::string thispath = item.first.filename(); ++ if (thispath.empty()) ++ { ++ continue; ++ } ++ ++ if (thispath != resName) ++ { ++ continue; ++ } ++ ++ auto mode = item.first.parent_path(); ++ auto type = mode.parent_path(); ++ if (mode.filename().empty() || type.filename().empty()) ++ { ++ continue; ++ } ++ ++ if (type.filename() != "VirtualMedia") ++ { ++ continue; ++ } ++ ++ // Check if dbus path is Legacy type ++ if (mode.filename() == "Legacy") ++ { ++ BMCWEB_LOG_DEBUG << "InsertMedia only allowed " ++ "with POST method " ++ "in legacy mode"; ++ aResp->res.result( ++ boost::beast::http::status::method_not_allowed); ++ ++ return; ++ } ++ // Check if dbus path is Proxy type ++ if (mode.filename() == "Proxy") ++ { ++ // Not possible in proxy mode ++ BMCWEB_LOG_DEBUG << "InsertMedia not " ++ "allowed in proxy mode"; ++ aResp->res.result( ++ boost::beast::http::status::not_found); ++ ++ return; ++ } ++ } ++ ++ BMCWEB_LOG_DEBUG << "Parent item not found"; ++ aResp->res.result(boost::beast::http::status::not_found); ++ }, ++ service, "/xyz/openbmc_project/VirtualMedia", ++ "org.freedesktop.DBus.ObjectManager", "GetManagedObjects"); ++ }, ++ "xyz.openbmc_project.ObjectMapper", ++ "/xyz/openbmc_project/object_mapper", ++ "xyz.openbmc_project.ObjectMapper", "GetObject", ++ "/xyz/openbmc_project/VirtualMedia", std::array<const char*, 0>()); ++} ++ + /** + * @brief Function extracts transfer protocol name from URI. + */ +@@ -844,6 +955,32 @@ inline void doVmAction(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + + inline void requestNBDVirtualMediaRoutes(App& app) + { ++ BMCWEB_ROUTE(app, "/redfish/v1/Managers/<str>/VirtualMedia/<str>/Actions/" ++ "VirtualMedia.InsertMedia") ++ .privileges({{"Login"}}) ++ .methods(boost::beast::http::verb::get)( ++ [](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const std::string& name, const std::string& resName) { ++ CheckProxyMode(asyncResp, req, name, resName); ++ }); ++ ++ for (auto method : ++ {boost::beast::http::verb::patch, boost::beast::http::verb::put, ++ boost::beast::http::verb::delete_}) ++ { ++ BMCWEB_ROUTE(app, ++ "/redfish/v1/Managers/<str>/VirtualMedia/<str>/Actions/" ++ "VirtualMedia.InsertMedia") ++ .privileges({{"ConfigureManager"}}) ++ .methods(method)( ++ [](const crow::Request& req, ++ const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, ++ const std::string& name, const std::string& resName) { ++ CheckProxyMode(asyncResp, req, name, resName); ++ }); ++ } ++ + BMCWEB_ROUTE(app, "/redfish/v1/Managers/<str>/VirtualMedia/<str>/Actions/" + "VirtualMedia.InsertMedia") + .privileges(redfish::privileges::postVirtualMedia) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0005-Set-Inserted-redfish-property-for-not-inserted-resou.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0005-Set-Inserted-redfish-property-for-not-inserted-resou.patch new file mode 100644 index 000000000..3d80aeb20 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0005-Set-Inserted-redfish-property-for-not-inserted-resou.patch @@ -0,0 +1,43 @@ +From 89ca38dbc3433b3b734a20068e599809f3bd7b90 Mon Sep 17 00:00:00 2001 +From: Karol Wachowski <karol.wachowski@intel.com> +Date: Tue, 23 Feb 2021 15:53:16 +0000 +Subject: [PATCH] Set Inserted redfish property for not inserted resources + +Tested: Verified that Inserted property is returned and set to + "false" for not inserted media. +Signed-off-by: Karol Wachowski <karol.wachowski@intel.com> +--- + redfish-core/lib/virtual_media.hpp | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/redfish-core/lib/virtual_media.hpp b/redfish-core/lib/virtual_media.hpp +index 3e28164..4c475b7 100644 +--- a/redfish-core/lib/virtual_media.hpp ++++ b/redfish-core/lib/virtual_media.hpp +@@ -96,6 +96,7 @@ static void + BMCWEB_LOG_DEBUG << "Value Active not found"; + return; + } ++ aResp->res.jsonValue["Inserted"] = *activeValue; + + const std::string* endpointIdValue = + std::get_if<std::string>(&endpointIdProperty->second); +@@ -107,7 +108,6 @@ static void + aResp->res.jsonValue["Oem"]["OpenBMC"]["WebSocketEndpoint"] = + *endpointIdValue; + aResp->res.jsonValue["TransferProtocolType"] = "OEM"; +- aResp->res.jsonValue["Inserted"] = *activeValue; + if (*activeValue == true) + { + aResp->res.jsonValue["ConnectedVia"] = "Applet"; +@@ -138,7 +138,6 @@ static void + } + + aResp->res.jsonValue["Image"] = *imageUrlValue; +- aResp->res.jsonValue["Inserted"] = *activeValue; + aResp->res.jsonValue["TransferProtocolType"] = + getTransferProtocolTypeFromUri(*imageUrlValue); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0006-Bmcweb-handle-permission-denied-exception.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0006-Bmcweb-handle-permission-denied-exception.patch new file mode 100644 index 000000000..6ad7cf174 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0006-Bmcweb-handle-permission-denied-exception.patch @@ -0,0 +1,37 @@ +From 1d69a22d0ec1eddbe6d703d6824f413f6b68399e Mon Sep 17 00:00:00 2001 +From: Krzysztof Grobelny <krzysztof.grobelny@intel.com> +Date: Thu, 1 Jul 2021 10:41:47 +0000 +Subject: [PATCH] Bmcweb handle permission denied exception + +Add handling of permission denied exception (EPERM) that +can be thrown by VirtualMedia service during Mount/Unmount dbus operations. + +Tested: +Verified that after mounting/unmounting HTTPS resource twice in a row in legacy mode, +VirtualMedia returns EPERM, which bmcweb handles as 403 status code. + +Change-Id: Ibc18d5ec822c5072605b1fc4651389982002798b +Signed-off-by: Alicja Rybak <alicja.rybak@intel.com> +--- + redfish-core/lib/virtual_media.hpp | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/redfish-core/lib/virtual_media.hpp b/redfish-core/lib/virtual_media.hpp +index 186c04b..8e7c2e4 100644 +--- a/redfish-core/lib/virtual_media.hpp ++++ b/redfish-core/lib/virtual_media.hpp +@@ -917,6 +917,11 @@ inline void doVmAction(const std::shared_ptr<bmcweb::AsyncResp>& asyncResp, + { + messages::resourceInUse(asyncResp->res); + } ++ else if (ec == boost::system::errc::permission_denied) ++ { ++ messages::accessDenied(asyncResp->res, ++ "VirtualMedia.Insert"); ++ } + else + { + messages::internalError(asyncResp->res); +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0007-Fix-unmounting-image-in-proxy-mode.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0007-Fix-unmounting-image-in-proxy-mode.patch new file mode 100644 index 000000000..88fa89465 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb/vm/0007-Fix-unmounting-image-in-proxy-mode.patch @@ -0,0 +1,35 @@ +From 6f4b5fc1879f39b0f5fee0838f0ecbc481275d5e Mon Sep 17 00:00:00 2001 +From: Alicja Rybak <alicja.rybak@intel.com> +Date: Fri, 23 Apr 2021 17:35:52 +0200 +Subject: [PATCH] Fix unmounting image in proxy mode. + +Sometimes Slot0 got higher key than Slot1 and erase function for Slot1 +invalidates elements with keys not less than the erased element. +In that case invalid slot0 will be unmounted. +Change order of calling close() and erase() functions to +unmount correct device. + +Change-Id: I7a40a4518982f697d3eed635cde6d06978149cf0 +Signed-off-by: Alicja Rybak <alicja.rybak@intel.com> +--- + include/nbd_proxy.hpp | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/nbd_proxy.hpp b/include/nbd_proxy.hpp +index 3b28823..897bcf2 100644 +--- a/include/nbd_proxy.hpp ++++ b/include/nbd_proxy.hpp +@@ -439,9 +439,9 @@ inline void requestRoutes(App& app) + BMCWEB_LOG_DEBUG << "No session to close"; + return; + } ++ session->second->close(); + // Remove reference to session in global map + sessions.erase(session); +- session->second->close(); + }) + .onmessage([](crow::websocket::Connection& conn, + const std::string& data, bool) { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend new file mode 100644 index 000000000..a716e612d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend @@ -0,0 +1,99 @@ +SRC_URI = "git://github.com/openbmc/bmcweb.git" +SRCREV = "b7ff344535c42af074c60bfb272ef66a2ba157b4" + +DEPENDS += "boost-url" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +# add a user called bmcweb for the server to assume +# bmcweb is part of group shadow for non-root pam authentication +USERADD_PARAM:${PN} = "-r -s /usr/sbin/nologin -d /home/bmcweb -m -G shadow bmcweb" + +GROUPADD_PARAM:${PN} = "web; redfish " + +SRC_URI += "file://0001-Firmware-update-configuration-changes.patch \ + file://0002-Use-chip-id-based-UUID-for-Service-Root.patch \ + file://0010-managers-add-attributes-for-Manager.CommandShell.patch \ + file://0011-bmcweb-Add-PhysicalContext-to-Thermal-resources.patch \ + file://0012-Log-RedFish-event-for-Invalid-login-attempt.patch \ + file://0013-Add-UART-routing-logic-into-host-console-connection-.patch \ + file://0014-recommended-fixes-by-crypto-review-team.patch \ + file://0015-Add-state-sensor-messages-to-the-registry.patch \ + file://0016-Fix-bmcweb-crashes-if-socket-directory-not-present.patch \ + file://0017-Add-msg-registry-for-subscription-related-actions.patch \ + file://0018-bmcweb-Add-BMC-Time-update-log-to-the-registry.patch \ + file://0019-Add-generic-message-PropertySizeExceeded.patch \ + file://0020-Redfish-Deny-set-AccountLockDuration-to-zero.patch \ + file://0023-Add-get-IPMI-session-id-s-to-Redfish.patch \ + file://0024-Add-count-sensor-type.patch \ + file://0025-Add-Model-CoreCount-to-ProcessorSummary.patch \ +" + +# OOB Bios Config: +SRC_URI += "file://biosconfig/0001-Define-Redfish-interface-Registries-Bios.patch \ + file://biosconfig/0002-BaseBiosTable-Add-support-for-PATCH-operation.patch \ + file://biosconfig/0003-Add-support-to-ResetBios-action.patch \ + file://biosconfig/0004-Add-support-to-ChangePassword-action.patch \ + file://biosconfig/0005-Fix-remove-bios-user-pwd-change-option-via-Redfish.patch \ + file://biosconfig/0006-Add-fix-for-broken-feature-Pending-Attributes.patch \ +" + +# Virtual Media: Backend code is not upstreamed so downstream only patches. +SRC_URI += "file://vm/0001-Revert-Disable-nbd-proxy-from-the-build.patch \ + file://vm/0002-bmcweb-handle-device-or-resource-busy-exception.patch \ + file://vm/0003-Add-ConnectedVia-property-to-virtual-media-item-temp.patch \ + file://vm/0004-Invalid-status-code-from-InsertMedia-REST-methods.patch \ + file://vm/0005-Set-Inserted-redfish-property-for-not-inserted-resou.patch \ + file://vm/0006-Bmcweb-handle-permission-denied-exception.patch \ + file://vm/0007-Fix-unmounting-image-in-proxy-mode.patch \ +" + +# EventService: Temporary pulled to downstream. See eventservice\README for details +SRC_URI += "file://eventservice/0001-Add-unmerged-changes-for-http-retry-support.patch \ + file://eventservice/0002-EventService-https-client-support.patch \ + file://eventservice/0004-Add-Server-Sent-Events-support.patch \ + file://eventservice/0005-Add-SSE-style-subscription-support-to-eventservice.patch \ + file://eventservice/0006-Add-EventService-SSE-filter-support.patch \ + file://eventservice/0007-EventService-Log-events-for-subscription-actions.patch \ + file://eventservice/0008-Add-checks-on-Event-Subscription-input-parameters.patch \ + file://eventservice/0009-Restructure-Redifsh-EventLog-Transmit-code-flow.patch \ + file://eventservice/0010-Remove-Terminated-Event-Subscriptions.patch \ + file://eventservice/0011-Fix-bmcweb-crash-while-deleting-terminated-subscriptions.patch \ +" + +# Temporary downstream mirror of upstream patches, see telemetry\README for details +SRC_URI += " file://telemetry/0001-Add-support-for-MetricDefinition-scheme.patch \ + file://telemetry/0002-Sync-Telmetry-service-with-EventService.patch \ + file://telemetry/0003-Switched-bmcweb-to-use-new-telemetry-service-API.patch \ + file://telemetry/0004-Add-support-for-MetricDefinition-property-in-MetricReport.patch \ + file://telemetry/0005-Add-GET-method-for-TriggerCollection.patch \ + file://telemetry/0006-Revert-Remove-LogService-from-TelemetryService.patch \ + file://telemetry/0007-event-service-fix-added-Context-field-to-response.patch \ + file://telemetry/0009-Add-support-for-deleting-terminated-subscriptions.patch \ +" + +# Temporary downstream patch for routing and privilege changes +SRC_URI += " file://http_routing/0001-Add-asyncResp-support-during-handleUpgrade.patch \ + file://http_routing/0002-Move-privileges-to-separate-entity.patch \ + file://http_routing/0003-Add-Support-for-privilege-check-in-handleUpgrade.patch \ + file://http_routing/0004-Add-Privileges-to-Websockets.patch \ + file://http_routing/0005-Add-Privileges-to-SseSockets.patch \ +" + +# Temporary fix: Move it to service file +do_install:append() { + install -d ${D}/var/lib/bmcweb + install -d ${D}/etc/ssl/certs/authority +} + +# Enable PFR support +EXTRA_OEMESON += "${@bb.utils.contains('IMAGE_FSTYPES', 'intel-pfr', '-Dredfish-provisioning-feature=enabled', '', d)}" + +# Enable NBD proxy embedded in bmcweb +EXTRA_OEMESON += " -Dvm-nbdproxy=enabled" + +# Disable dependency on external nbd-proxy application +EXTRA_OEMESON += " -Dvm-websocket=disabled" +RDEPENDS:${PN}:remove += "jsnbd" + + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config.bbappend new file mode 100644 index 000000000..73c3f2190 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config.bbappend @@ -0,0 +1,21 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI += " file://dev_id.json \ + file://channel_access.json \ + file://channel_config.json \ + file://master_write_read_white_list.json \ + " + +FILES:${PN} += " \ + ${datadir}/ipmi-providers/channel_access.json \ + ${datadir}/ipmi-providers/channel_config.json \ + ${datadir}/ipmi-providers/master_write_read_white_list.json \ + " + +do_install:append() { + install -m 0644 -D ${WORKDIR}/channel_access.json \ + ${D}${datadir}/ipmi-providers/channel_access.json + install -m 0644 -D ${WORKDIR}/channel_config.json \ + ${D}${datadir}/ipmi-providers/channel_config.json + install -m 0644 -D ${WORKDIR}/master_write_read_white_list.json \ + ${D}${datadir}/ipmi-providers/master_write_read_white_list.json +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_access.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_access.json new file mode 100644 index 000000000..299483121 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_access.json @@ -0,0 +1,23 @@ +{ + "1" : { + "access_mode" : "always_available", + "user_auth_disabled" : false, + "per_msg_auth_disabled" : false, + "alerting_disabled" : false, + "priv_limit" : "priv-admin" + }, + "2" : { + "access_mode" : "always_available", + "user_auth_disabled" : false, + "per_msg_auth_disabled" : false, + "alerting_disabled" : false, + "priv_limit" : "priv-admin" + }, + "3" : { + "access_mode" : "always_available", + "user_auth_disabled" : false, + "per_msg_auth_disabled" : false, + "alerting_disabled" : false, + "priv_limit" : "priv-admin" + } +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json new file mode 100644 index 000000000..73fb214a2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/channel_config.json @@ -0,0 +1,179 @@ +{ + "0" : { + "name" : "Ipmb", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "ipmb", + "protocol_type" : "ipmb-1.0", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "1" : { + "name" : "eth1", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "lan-802.3", + "protocol_type" : "ipmb-1.0", + "session_supported" : "multi-session", + "is_ipmi" : true + } + }, + "2" : { + "name" : "RESERVED", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "reserved", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "3" : { + "name" : "eth0", + "is_valid" : true, + "active_sessions" : 0, + "is_management_nic" : true, + "channel_info" : { + "medium_type" : "lan-802.3", + "protocol_type" : "ipmb-1.0", + "session_supported" : "multi-session", + "is_ipmi" : true + } + }, + "4" : { + "name" : "RESERVED", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "reserved", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "5" : { + "name" : "RESERVED", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "reserved", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "6" : { + "name" : "SMLINK", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "ipmb", + "protocol_type" : "ipmb-1.0", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "7" : { + "name" : "ipmi_kcs4", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "system-interface", + "protocol_type" : "kcs", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "8" : { + "name" : "INTRABMC", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "oem", + "protocol_type" : "oem", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "9" : { + "name" : "SIPMB", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "ipmb", + "protocol_type" : "ipmb-1.0", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "10" : { + "name" : "PCIE", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "ipmb", + "protocol_type" : "ipmb-1.0", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "11" : { + "name" : "RESERVED", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "reserved", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "12" : { + "name" : "INTERNAL", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "ipmb", + "protocol_type" : "ipmb-1.0", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "13" : { + "name" : "RESERVED", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "reserved", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "14" : { + "name" : "SELF", + "is_valid" : false, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "unknown", + "protocol_type" : "na", + "session_supported" : "session-less", + "is_ipmi" : true + } + }, + "15" : { + "name" : "ipmi_kcs3", + "is_valid" : true, + "active_sessions" : 0, + "channel_info" : { + "medium_type" : "system-interface", + "protocol_type" : "kcs", + "session_supported" : "session-less", + "is_ipmi" : true + } + } +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/dev_id.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/dev_id.json new file mode 100644 index 000000000..e561569d9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/dev_id.json @@ -0,0 +1,2 @@ +{"id": 35, "revision": 0, "addn_dev_support": 191, + "manuf_id": 343, "prod_id": 123, "aux": 0} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json new file mode 100644 index 000000000..6fc46f452 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-config/master_write_read_white_list.json @@ -0,0 +1,76 @@ +{ + "filters": [ + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x01", + "slaveAddr": "0x4d", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x01", + "slaveAddr": "0x57", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x02", + "slaveAddr": "0x40", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x02", + "slaveAddr": "0x49", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x02", + "slaveAddr": "0x51", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x03", + "slaveAddr": "0x44", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x03", + "slaveAddr": "0x68", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x06", + "slaveAddr": "0x40", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + }, + { + "Description": "Allow full read - ignore first byte write value", + "busId": "0x07", + "slaveAddr": "0x51", + "slaveAddrMask": "0x00", + "command": "0x00", + "commandMask": "0xFF" + } + ] +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native.bbappend new file mode 100644 index 000000000..3a2cf0e01 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI += " file://config.yaml" + +#override source file before it is used for final FRU file (merged from multiple sources) +do_install() { + cp ${WORKDIR}/config.yaml ${config_datadir}/ +} + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native/config.yaml b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native/config.yaml new file mode 100644 index 000000000..e9b7a621e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-fru-merge-config-native/config.yaml @@ -0,0 +1,31 @@ +# A YAML similar to this example would have to be generated, for eg with MRW +# inputs and system configuration, to depict IPMI Fru information. +# +# This file maps IPMI properties to phosphor dbus inventory properties +# +# This YAML could help generate C++ code. +# Format of the YAML: +# Fruid: +# Associated Fru paths +# d-bus Interfaces +# d-bus Properties +# IPMI Fru mapping +0: + /system/board/WFP_Baseboard: + entityID: 23 + entityInstance: 1 + interfaces: + xyz.openbmc_project.Inventory.Item: + name: + IPMIFruProperty: Product Name + IPMIFruSection: Product + xyz.openbmc_project.Inventory.Decorator.Asset: + Manufacturer: + IPMIFruProperty: Manufacturer + IPMIFruSection: Product + PartNumber: + IPMIFruProperty: Part Number + IPMIFruSection: Product + SerialNumber: + IPMIFruProperty: Serial Number + IPMIFruSection: Product diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/.clang-format b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/.clang-format new file mode 100644 index 000000000..ea71ad6e1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/.clang-format @@ -0,0 +1,99 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: false +AlignOperands: true +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: true +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: false +PointerAlignment: Left +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 5 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.hpp"' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 2 + - Regex: '^<.*' + Priority: 3 + - Regex: '.*' + Priority: 4 +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +KeepEmptyLinesAtTheStartOfBlocks: true +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +ReflowComments: true +SortIncludes: true +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp11 +TabWidth: 4 +UseTab: Never +... + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0010-fix-get-system-GUID-ipmi-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0010-fix-get-system-GUID-ipmi-command.patch new file mode 100644 index 000000000..a7d09f61e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0010-fix-get-system-GUID-ipmi-command.patch @@ -0,0 +1,41 @@ +From f18efe239cb4bbfd6996f753ae694f81041d8d43 Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@linux.intel.com> +Date: Fri, 14 Feb 2020 13:13:06 -0800 +Subject: [PATCH] Fix 'Get System GUID' to use settings UUID + +The upstream Get System GUID command looks first for a BMC interface +and then assumes that the UUID interface is next to that. But that is +not the case on Intel systems where the system GUID is found in the +settings daemon. + +Change-Id: I924bd05e0a546f2b30288c1faf72157296ab6579 +Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +--- + apphandler.cpp | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/apphandler.cpp b/apphandler.cpp +index 90818a9..dcf2c86 100644 +--- a/apphandler.cpp ++++ b/apphandler.cpp +@@ -788,8 +788,6 @@ auto ipmiAppGetBtCapabilities() + + auto ipmiAppGetSystemGuid() -> ipmi::RspType<std::array<uint8_t, 16>> + { +- static constexpr auto bmcInterface = +- "xyz.openbmc_project.Inventory.Item.Bmc"; + static constexpr auto uuidInterface = "xyz.openbmc_project.Common.UUID"; + static constexpr auto uuidProperty = "UUID"; + +@@ -798,7 +796,7 @@ auto ipmiAppGetSystemGuid() -> ipmi::RspType<std::array<uint8_t, 16>> + { + // Get the Inventory object implementing BMC interface + auto busPtr = getSdBus(); +- auto objectInfo = ipmi::getDbusObject(*busPtr, bmcInterface); ++ auto objectInfo = ipmi::getDbusObject(*busPtr, uuidInterface); + + // Read UUID property value from bmcObject + // UUID is in RFC4122 format Ex: 61a39523-78f2-11e5-9862-e6402cfc3223 +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0053-Fix-keep-looping-issue-when-entering-OS.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0053-Fix-keep-looping-issue-when-entering-OS.patch new file mode 100644 index 000000000..0d86a4223 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0053-Fix-keep-looping-issue-when-entering-OS.patch @@ -0,0 +1,89 @@ +From 58771a22dfcaa1e67bcf4fc0bd2ce0aa28c67e3f Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@linux.intel.com> +Date: Wed, 23 Jan 2019 17:02:40 +0800 +Subject: [PATCH] Fix keep looping issue when entering OS + +Sometimes when entering OS, OS will keep continuously sending ipmi command +"READ EVENT MESSAGE BUFFER" to BMC. This issue is caused by incorrect KCS +status. If restart the host immediately while OS is still running, SMS_ATN +will be set, after that KCS come into an incorrect status, and then KCS +communction between BMC and OS crash. To make KCS go back to correct status +and fix the issue, clear SMS_ATN after every time power cycle happen. + +Unit Test: + After entered OS, force reset system, after enter OS again, OS can start +normally without keep sending READ EVENT MESSAGE BUFFER command. + After power on system, enter EFI SHELL, check IPMI can work +correctly through KCS channel. +--- + host-cmd-manager.cpp | 33 ++++++++++++++++++++++++--------- + 1 file changed, 24 insertions(+), 9 deletions(-) + +diff --git a/host-cmd-manager.cpp b/host-cmd-manager.cpp +index e52c9bb..b3a5d71 100644 +--- a/host-cmd-manager.cpp ++++ b/host-cmd-manager.cpp +@@ -23,6 +23,8 @@ namespace command + constexpr auto HOST_STATE_PATH = "/xyz/openbmc_project/state/host0"; + constexpr auto HOST_STATE_INTERFACE = "xyz.openbmc_project.State.Host"; + constexpr auto HOST_TRANS_PROP = "RequestedHostTransition"; ++constexpr const char* IPMI_PATH = "/xyz/openbmc_project/Ipmi/Channel/ipmi_kcs3"; ++constexpr const char* IPMI_INTERFACE = "xyz.openbmc_project.Ipmi.Channel.SMS"; + + // For throwing exceptions + using namespace phosphor::logging; +@@ -103,6 +105,20 @@ void Manager::clearQueue() + // `false` indicating Failure + std::get<CallBack>(command)(ipmiCmdData, false); + } ++ ++ auto host = ::ipmi::getService(this->bus, IPMI_INTERFACE, IPMI_PATH); ++ auto method = this->bus.new_method_call(host.c_str(), IPMI_PATH, ++ IPMI_INTERFACE, "clearAttention"); ++ ++ try ++ { ++ auto reply = this->bus.call(method); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ log<level::ERR>("Error in clearing SMS attention"); ++ elog<InternalFailure>(); ++ } + } + + // Called for alerting the host +@@ -112,9 +128,7 @@ void Manager::checkQueueAndAlertHost() + { + log<level::DEBUG>("Asserting SMS Attention"); + +- std::string HOST_IPMI_SVC("org.openbmc.HostIpmi"); +- std::string IPMI_PATH("/org/openbmc/HostIpmi/1"); +- std::string IPMI_INTERFACE("org.openbmc.HostIpmi"); ++ auto host = ::ipmi::getService(this->bus, IPMI_INTERFACE, IPMI_PATH); + + // Start the timer for this transaction + auto time = std::chrono::duration_cast<std::chrono::microseconds>( +@@ -127,12 +141,13 @@ void Manager::checkQueueAndAlertHost() + return; + } + +- auto method = +- this->bus.new_method_call(HOST_IPMI_SVC.c_str(), IPMI_PATH.c_str(), +- IPMI_INTERFACE.c_str(), "setAttention"); +- auto reply = this->bus.call(method); +- +- if (reply.is_method_error()) ++ auto method = this->bus.new_method_call(host.c_str(), IPMI_PATH, ++ IPMI_INTERFACE, "setAttention"); ++ try ++ { ++ auto reply = this->bus.call(method); ++ } ++ catch (const std::exception&) + { + log<level::ERR>("Error in setting SMS attention"); + elog<InternalFailure>(); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch new file mode 100644 index 000000000..ba8896195 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch @@ -0,0 +1,356 @@ +From 9f4fb8a6aa076261b19c187aeef840d818158ec7 Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@intel.com> +Date: Wed, 16 Oct 2019 14:24:20 +0800 +Subject: [PATCH] Move Set SOL config parameter to host-ipmid + +Move Set SOL config parameter command from net-ipmid to host-ipmid, +so that BIOS in Intel platform can enable or disable SOL through KCS. +Get SOL config parameter command will be moved later. + +Tested by: +With the related change in phospher-ipmi-net and phospher-dbus-interface, +Run commands: +ipmitool raw 0x0c 0x21 0x0e 0x00 0x01 +ipmitool raw 0x0c 0x21 0x0e 0x01 0x00 +ipmitool raw 0x0c 0x21 0x0e 0x02 0x03 +ipmitool raw 0x0c 0x21 0x0e 0x03 0x5 0x03 +ipmitool raw 0x0c 0x21 0x0e 0x04 0x5 0x03 +All these commands have correct response and all dbus interface for +sol command change to same value in above commands. +After reboot BMC, "Progress" property in dbus interface change back +to 0 and other properties will not reset to default value. + +Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + host-ipmid-whitelist.conf | 1 + + transporthandler.cpp | 294 ++++++++++++++++++++++++++++++++++++++ + 2 files changed, 295 insertions(+) + +diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf +index 5397115..c93f3b1 100644 +--- a/host-ipmid-whitelist.conf ++++ b/host-ipmid-whitelist.conf +@@ -41,6 +41,7 @@ + 0x0A:0x48 //<Storage>:<Get SEL Time> + 0x0A:0x49 //<Storage>:<Set SEL Time> + 0x0C:0x02 //<Transport>:<Get LAN Configuration Parameters> ++0x0C:0x21 //<Transport>:<Set SOL Configuration Parameters> + 0x2C:0x00 //<Group Extension>:<Group Extension Command> + 0x2C:0x01 //<Group Extension>:<Get DCMI Capabilities> + 0x2C:0x02 //<Group Extension>:<Get Power Reading> +diff --git a/transporthandler.cpp b/transporthandler.cpp +index 0012746..0de76c4 100644 +--- a/transporthandler.cpp ++++ b/transporthandler.cpp +@@ -2030,8 +2030,298 @@ RspType<message::Payload> getLan(Context::ptr ctx, uint4_t channelBits, + } // namespace transport + } // namespace ipmi + ++constexpr const char* solInterface = "xyz.openbmc_project.Ipmi.SOL"; ++constexpr const char* solPath = "/xyz/openbmc_project/ipmi/sol/"; ++ + void register_netfn_transport_functions() __attribute__((constructor)); + ++static std::string ++ getSOLService(std::shared_ptr<sdbusplus::asio::connection> dbus, ++ const std::string& solPathWitheEthName) ++{ ++ static std::string solService{}; ++ if (solService.empty()) ++ { ++ try ++ { ++ solService = ++ ipmi::getService(*dbus, solInterface, solPathWitheEthName); ++ } ++ catch (const sdbusplus::exception::SdBusError& e) ++ { ++ solService.clear(); ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error: get SOL service failed"); ++ return solService; ++ } ++ } ++ return solService; ++} ++ ++static int setSOLParameter(const std::string& property, ++ const ipmi::Value& value, const uint8_t& channelNum) ++{ ++ auto dbus = getSdBus(); ++ ++ std::string ethdevice = ipmi::getChannelName(channelNum); ++ ++ std::string solPathWitheEthName = std::string(solPath) + ethdevice; ++ ++ std::string service = getSOLService(dbus, solPathWitheEthName); ++ if (service.empty()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get SOL service failed"); ++ return -1; ++ } ++ try ++ { ++ ipmi::setDbusProperty(*dbus, service, solPathWitheEthName, solInterface, ++ property, value); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error setting sol parameter"); ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int getSOLParameter(const std::string& property, ipmi::Value& value, ++ const uint8_t& channelNum) ++{ ++ auto dbus = getSdBus(); ++ ++ std::string ethdevice = ipmi::getChannelName(channelNum); ++ ++ std::string solPathWitheEthName = std::string(solPath) + ethdevice; ++ ++ std::string service = getSOLService(dbus, solPathWitheEthName); ++ if (service.empty()) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get SOL service failed"); ++ return -1; ++ } ++ try ++ { ++ value = ipmi::getDbusProperty(*dbus, service, solPathWitheEthName, ++ solInterface, property); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error getting sol parameter"); ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static const constexpr uint8_t encryptMask = 0x80; ++static const constexpr uint8_t encryptShift = 7; ++static const constexpr uint8_t authMask = 0x40; ++static const constexpr uint8_t authShift = 6; ++static const constexpr uint8_t privilegeMask = 0xf; ++ ++namespace ipmi ++{ ++constexpr Cc ccParmNotSupported = 0x80; ++constexpr Cc ccSetInProgressActive = 0x81; ++constexpr Cc ccSystemInfoParameterSetReadOnly = 0x82; ++ ++static inline auto responseParmNotSupported() ++{ ++ return response(ccParmNotSupported); ++} ++static inline auto responseSetInProgressActive() ++{ ++ return response(ccSetInProgressActive); ++} ++static inline auto responseSystemInfoParameterSetReadOnly() ++{ ++ return response(ccSystemInfoParameterSetReadOnly); ++} ++ ++} // namespace ipmi ++ ++namespace sol ++{ ++enum class Parameter ++{ ++ progress, //!< Set In Progress. ++ enable, //!< SOL Enable. ++ authentication, //!< SOL Authentication. ++ accumulate, //!< Character Accumulate Interval & Send Threshold. ++ retry, //!< SOL Retry. ++ nvbitrate, //!< SOL non-volatile bit rate. ++ vbitrate, //!< SOL volatile bit rate. ++ channel, //!< SOL payload channel. ++ port, //!< SOL payload port. ++}; ++ ++enum class Privilege : uint8_t ++{ ++ highestPriv, ++ callbackPriv, ++ userPriv, ++ operatorPriv, ++ adminPriv, ++ oemPriv, ++}; ++ ++} // namespace sol ++ ++constexpr uint8_t progressMask = 0x03; ++constexpr uint8_t enableMask = 0x01; ++constexpr uint8_t retryMask = 0x07; ++ ++ipmi::RspType<> setSOLConfParams(ipmi::Context::ptr ctx, uint4_t chNum, ++ uint4_t reserved, uint8_t paramSelector, ++ uint8_t configParamData1, ++ std::optional<uint8_t> configParamData2) ++{ ++ ipmi::ChannelInfo chInfo; ++ uint8_t channelNum = ipmi::convertCurrentChannelNum( ++ static_cast<uint8_t>(chNum), ctx->channel); ++ if (reserved != 0 || ++ (!ipmi::isValidChannel(static_cast<uint8_t>(channelNum)))) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ ++ ipmi_ret_t compCode = ++ ipmi::getChannelInfo(static_cast<uint8_t>(channelNum), chInfo); ++ if (compCode != IPMI_CC_OK || ++ chInfo.mediumType != ++ static_cast<uint8_t>(ipmi::EChannelMediumType::lan8032)) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ ++ switch (static_cast<sol::Parameter>(paramSelector)) ++ { ++ case sol::Parameter::progress: ++ { ++ if (configParamData2) ++ { ++ return ipmi::responseReqDataLenInvalid(); ++ } ++ uint8_t progress = configParamData1 & progressMask; ++ ipmi::Value currentProgress = 0; ++ if (getSOLParameter("Progress", currentProgress, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ ++ if ((std::get<uint8_t>(currentProgress) == 1) && (progress == 1)) ++ { ++ return ipmi::responseSetInProgressActive(); ++ } ++ ++ if (setSOLParameter("Progress", progress, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ break; ++ } ++ case sol::Parameter::enable: ++ { ++ if (configParamData2) ++ { ++ return ipmi::responseReqDataLenInvalid(); ++ } ++ bool enable = configParamData1 & enableMask; ++ if (setSOLParameter("Enable", enable, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ break; ++ } ++ case sol::Parameter::authentication: ++ { ++ if (configParamData2) ++ { ++ return ipmi::responseReqDataLenInvalid(); ++ } ++ uint8_t encrypt = (configParamData1 & encryptMask) >> encryptShift; ++ uint8_t auth = (configParamData1 & authMask) >> authShift; ++ uint8_t privilege = configParamData1 & privilegeMask; ++ // For security considering encryption and authentication must be ++ // true. ++ if (!encrypt || !auth) ++ { ++ return ipmi::responseSystemInfoParameterSetReadOnly(); ++ } ++ else if (privilege < ++ static_cast<uint8_t>(sol::Privilege::userPriv) || ++ privilege > static_cast<uint8_t>(sol::Privilege::oemPriv)) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ ++ if (setSOLParameter("Privilege", privilege, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ ++ break; ++ } ++ case sol::Parameter::accumulate: ++ { ++ if (!configParamData2) ++ { ++ return ipmi::responseReqDataLenInvalid(); ++ } ++ if (*configParamData2 == 0) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ if (setSOLParameter("AccumulateIntervalMS", configParamData1, ++ channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ if (setSOLParameter("Threshold", *configParamData2, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ break; ++ } ++ case sol::Parameter::retry: ++ { ++ if (!configParamData2) ++ { ++ return ipmi::responseReqDataLenInvalid(); ++ } ++ if ((setSOLParameter( ++ "RetryCount", ++ static_cast<uint8_t>(configParamData1 & retryMask), ++ channelNum) < 0) || ++ (setSOLParameter("RetryIntervalMS", *configParamData2, ++ channelNum) < 0)) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ ++ break; ++ } ++ case sol::Parameter::port: ++ { ++ return ipmi::responseSystemInfoParameterSetReadOnly(); ++ } ++ case sol::Parameter::nvbitrate: ++ case sol::Parameter::vbitrate: ++ case sol::Parameter::channel: ++ default: ++ return ipmi::responseParmNotSupported(); ++ } ++ ++ return ipmi::responseSuccess(); ++} ++ + void register_netfn_transport_functions() + { + ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, +@@ -2040,4 +2330,8 @@ void register_netfn_transport_functions() + ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, + ipmi::transport::cmdGetLanConfigParameters, + ipmi::Privilege::Operator, ipmi::transport::getLan); ++ ++ ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, ++ ipmi::transport::cmdSetSolConfigParameters, ++ ipmi::Privilege::Admin, setSOLConfParams); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch new file mode 100644 index 000000000..d6ba70562 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch @@ -0,0 +1,259 @@ +From ff1d4198e8ad8f824f34fb9d261ea0e25179f070 Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@intel.com> +Date: Thu, 11 Jul 2019 00:32:58 +0800 +Subject: [PATCH] Move Get SOL config parameter to host-ipmid + +Move Get SOL config parameter command from net-ipmid to host-ipmid. + +Tested: +Run command ipmitool sol info 1 +Set in progress : set-complete +Enabled : true +Force Encryption : false +Force Authentication : false +Privilege Level : ADMINISTRATOR +Character Accumulate Level (ms) : 60 +Character Send Threshold : 96 +Retry Count : 6 +Retry Interval (ms) : 200 +Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Non-Volatile Bit Rate (kbps) : 115.2 +Payload Channel : 1 (0x01) +Payload Port : 623 + +Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> +Signed-off-by: James Feist <james.feist@linux.intel.com> +--- + host-ipmid-whitelist.conf | 1 + + transporthandler.cpp | 191 ++++++++++++++++++++++++++++++++++++++ + 2 files changed, 192 insertions(+) + +diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf +index c93f3b1..730437d 100644 +--- a/host-ipmid-whitelist.conf ++++ b/host-ipmid-whitelist.conf +@@ -42,6 +42,7 @@ + 0x0A:0x49 //<Storage>:<Set SEL Time> + 0x0C:0x02 //<Transport>:<Get LAN Configuration Parameters> + 0x0C:0x21 //<Transport>:<Set SOL Configuration Parameters> ++0x0C:0x22 //<Transport>:<Get SOL Configuration Parameters> + 0x2C:0x00 //<Group Extension>:<Group Extension Command> + 0x2C:0x01 //<Group Extension>:<Get DCMI Capabilities> + 0x2C:0x02 //<Group Extension>:<Get Power Reading> +diff --git a/transporthandler.cpp b/transporthandler.cpp +index 0de76c4..b81e0d5 100644 +--- a/transporthandler.cpp ++++ b/transporthandler.cpp +@@ -2120,6 +2120,28 @@ static int getSOLParameter(const std::string& property, ipmi::Value& value, + return 0; + } + ++constexpr const char* consoleInterface = "xyz.openbmc_project.console"; ++constexpr const char* consolePath = "/xyz/openbmc_project/console"; ++static int getSOLBaudRate(ipmi::Value& value) ++{ ++ auto dbus = getSdBus(); ++ ++ try ++ { ++ value = ++ ipmi::getDbusProperty(*dbus, "xyz.openbmc_project.console", ++ consolePath, consoleInterface, "baudrate"); ++ } ++ catch (sdbusplus::exception_t&) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error getting sol baud rate"); ++ return -1; ++ } ++ ++ return 0; ++} ++ + static const constexpr uint8_t encryptMask = 0x80; + static const constexpr uint8_t encryptShift = 7; + static const constexpr uint8_t authMask = 0x40; +@@ -2322,6 +2344,171 @@ ipmi::RspType<> setSOLConfParams(ipmi::Context::ptr ctx, uint4_t chNum, + return ipmi::responseSuccess(); + } + ++static const constexpr uint8_t retryCountMask = 0x07; ++static constexpr uint16_t ipmiStdPort = 623; ++static constexpr uint8_t solParameterRevision = 0x11; ++ipmi::RspType<uint8_t, std::optional<uint8_t>, std::optional<uint8_t>> ++ getSOLConfParams(ipmi::Context::ptr ctx, uint4_t chNum, uint3_t reserved, ++ bool getParamRev, uint8_t paramSelector, ++ uint8_t setSelector, uint8_t blockSelector) ++{ ++ ipmi::ChannelInfo chInfo; ++ uint8_t channelNum = ipmi::convertCurrentChannelNum( ++ static_cast<uint8_t>(chNum), ctx->channel); ++ if (reserved != 0 || ++ (!ipmi::isValidChannel(static_cast<uint8_t>(channelNum))) || ++ (ipmi::EChannelSessSupported::none == ++ ipmi::getChannelSessionSupport(static_cast<uint8_t>(channelNum)))) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ ipmi_ret_t compCode = ++ ipmi::getChannelInfo(static_cast<uint8_t>(channelNum), chInfo); ++ if (compCode != IPMI_CC_OK || ++ chInfo.mediumType != ++ static_cast<uint8_t>(ipmi::EChannelMediumType::lan8032)) ++ { ++ return ipmi::responseInvalidFieldRequest(); ++ } ++ ++ if (getParamRev) ++ { ++ return ipmi::responseSuccess(solParameterRevision, std::nullopt, ++ std::nullopt); ++ } ++ ++ ipmi::Value value; ++ switch (static_cast<sol::Parameter>(paramSelector)) ++ { ++ case sol::Parameter::progress: ++ { ++ if (getSOLParameter("Progress", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ return ipmi::responseSuccess( ++ solParameterRevision, std::get<uint8_t>(value), std::nullopt); ++ } ++ case sol::Parameter::enable: ++ { ++ if (getSOLParameter("Enable", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ return ipmi::responseSuccess( ++ solParameterRevision, ++ static_cast<uint8_t>(std::get<bool>(value)), std::nullopt); ++ } ++ case sol::Parameter::authentication: ++ { ++ uint8_t authentication = 0; ++ if (getSOLParameter("Privilege", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ authentication = (std::get<uint8_t>(value) & 0x0f); ++ ++ if (getSOLParameter("ForceAuthentication", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ authentication |= ++ (static_cast<uint8_t>(std::get<bool>(value)) << 6); ++ ++ if (getSOLParameter("ForceEncryption", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ authentication |= ++ (static_cast<uint8_t>(std::get<bool>(value)) << 7); ++ return ipmi::responseSuccess(solParameterRevision, authentication, ++ std::nullopt); ++ } ++ case sol::Parameter::accumulate: ++ { ++ if (getSOLParameter("AccumulateIntervalMS", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ ++ ipmi::Value value1; ++ if (getSOLParameter("Threshold", value1, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ return ipmi::responseSuccess(solParameterRevision, ++ std::get<uint8_t>(value), ++ std::get<uint8_t>(value1)); ++ } ++ case sol::Parameter::retry: ++ { ++ if (getSOLParameter("RetryCount", value, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ ++ ipmi::Value value1; ++ if (getSOLParameter("RetryIntervalMS", value1, channelNum) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ return ipmi::responseSuccess( ++ solParameterRevision, std::get<uint8_t>(value) & retryCountMask, ++ std::get<uint8_t>(value1)); ++ } ++ case sol::Parameter::channel: ++ { ++ return ipmi::responseSuccess(solParameterRevision, channelNum, ++ std::nullopt); ++ } ++ case sol::Parameter::port: ++ { ++ uint16_t port = htole16(ipmiStdPort); ++ auto buffer = reinterpret_cast<const uint8_t*>(&port); ++ return ipmi::responseSuccess(solParameterRevision, buffer[0], ++ buffer[1]); ++ } ++ case sol::Parameter::nvbitrate: ++ { ++ if (getSOLBaudRate(value) < 0) ++ { ++ return ipmi::responseUnspecifiedError(); ++ } ++ uint8_t bitRate = 0; ++ uint32_t* pBaudRate = std::get_if<uint32_t>(&value); ++ if (!pBaudRate) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Failed to get valid baud rate from D-Bus interface"); ++ } ++ switch (*pBaudRate) ++ { ++ case 9600: ++ bitRate = 0x06; ++ break; ++ case 19200: ++ bitRate = 0x07; ++ break; ++ case 38400: ++ bitRate = 0x08; ++ break; ++ case 57600: ++ bitRate = 0x09; ++ break; ++ case 115200: ++ bitRate = 0x0a; ++ break; ++ default: ++ break; ++ } ++ return ipmi::responseSuccess(solParameterRevision, bitRate, ++ std::nullopt); ++ } ++ default: ++ return ipmi::responseParmNotSupported(); ++ } ++} ++ + void register_netfn_transport_functions() + { + ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, +@@ -2334,4 +2521,8 @@ void register_netfn_transport_functions() + ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, + ipmi::transport::cmdSetSolConfigParameters, + ipmi::Privilege::Admin, setSOLConfParams); ++ ++ ipmi::registerHandler(ipmi::prioOpenBmcBase, ipmi::netFnTransport, ++ ipmi::transport::cmdGetSolConfigParameters, ++ ipmi::Privilege::User, getSOLConfParams); + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0062-Update-IPMI-Chassis-Control-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0062-Update-IPMI-Chassis-Control-command.patch new file mode 100644 index 000000000..112c1ffab --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0062-Update-IPMI-Chassis-Control-command.patch @@ -0,0 +1,292 @@ +From 99f63d2af9f45badaa8aff4ef958443bea62ede8 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Mon, 3 Jun 2019 17:01:47 -0700 +Subject: [PATCH] Update IPMI Chassis Control command + +This change updates the IPMI Chassis Control command to use the new +host state transitions. This allows each chassis control action +to more closely follow the behavior defined in the IPMI spec. + +ref: https://gerrit.openbmc-project.xyz/c/openbmc/docs/+/22358 + +Tested: +Ran each IPMI chassis control command to confirm the expected +behavior: +ipmitool power on: system is powered-on +ipmitool power off: system is forced off +ipmitool power cycle: system is forced off then powered-on +ipmitool power reset: system is hard reset +ipmitool power soft: soft power-off requested from system software + +Change-Id: Ic9fba3ca4abd9a758eb88f1e6ee09f7ca64ff80a +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + chassishandler.cpp | 204 +++++++++++---------------------------------- + 1 file changed, 48 insertions(+), 156 deletions(-) + +diff --git a/chassishandler.cpp b/chassishandler.cpp +index dfbe004be490..cd0ba3402f84 100644 +--- a/chassishandler.cpp ++++ b/chassishandler.cpp +@@ -32,6 +32,7 @@ + #include <xyz/openbmc_project/Control/Boot/Source/server.hpp> + #include <xyz/openbmc_project/Control/Boot/Type/server.hpp> + #include <xyz/openbmc_project/Control/Power/RestorePolicy/server.hpp> ++#include <xyz/openbmc_project/State/Chassis/server.hpp> + #include <xyz/openbmc_project/State/Host/server.hpp> + #include <xyz/openbmc_project/State/PowerOnHours/server.hpp> + +@@ -815,59 +816,63 @@ ipmi::RspType<> ipmiSetChassisCap(bool intrusion, bool fpLockout, + //------------------------------------------ + // Calls into Host State Manager Dbus object + //------------------------------------------ +-int initiate_state_transition(State::Host::Transition transition) ++int initiateHostStateTransition(State::Host::Transition transition) + { + // OpenBMC Host State Manager dbus framework +- constexpr auto HOST_STATE_MANAGER_ROOT = "/xyz/openbmc_project/state/host0"; +- constexpr auto HOST_STATE_MANAGER_IFACE = "xyz.openbmc_project.State.Host"; +- constexpr auto DBUS_PROPERTY_IFACE = "org.freedesktop.DBus.Properties"; +- constexpr auto PROPERTY = "RequestedHostTransition"; ++ constexpr auto hostStatePath = "/xyz/openbmc_project/state/host0"; ++ constexpr auto hostStateIntf = "xyz.openbmc_project.State.Host"; + +- // sd_bus error +- int rc = 0; +- char* busname = NULL; ++ auto service = ipmi::getService(*getSdBus(), hostStateIntf, hostStatePath); + +- // SD Bus error report mechanism. +- sd_bus_error bus_error = SD_BUS_ERROR_NULL; ++ // Convert to string equivalent of the passed in transition enum. ++ auto request = State::convertForMessage(transition); + +- // Gets a hook onto either a SYSTEM or SESSION bus +- sd_bus* bus_type = ipmid_get_sd_bus_connection(); +- rc = mapper_get_service(bus_type, HOST_STATE_MANAGER_ROOT, &busname); +- if (rc < 0) ++ try ++ { ++ ipmi::setDbusProperty(*getSdBus(), service, hostStatePath, ++ hostStateIntf, "RequestedHostTransition", ++ request); ++ } ++ catch (std::exception& e) + { + log<level::ERR>( +- "Failed to get bus name", +- entry("ERRNO=0x%X, OBJPATH=%s", -rc, HOST_STATE_MANAGER_ROOT)); +- return rc; ++ "Failed to initiate transition", ++ entry("EXCEPTION=%s, REQUEST=%s", e.what(), request.c_str())); ++ return -1; + } ++ return 0; ++} ++ ++//------------------------------------------ ++// Calls into Chassis State Manager Dbus object ++//------------------------------------------ ++int initiateChassisStateTransition(State::Chassis::Transition transition) ++{ ++ // OpenBMC Chassis State Manager dbus framework ++ constexpr auto chassisStatePath = "/xyz/openbmc_project/state/chassis0"; ++ constexpr auto chassisStateIntf = "xyz.openbmc_project.State.Chassis"; ++ ++ auto service = ++ ipmi::getService(*getSdBus(), chassisStateIntf, chassisStatePath); + + // Convert to string equivalent of the passed in transition enum. + auto request = State::convertForMessage(transition); + +- rc = sd_bus_call_method(bus_type, // On the system bus +- busname, // Service to contact +- HOST_STATE_MANAGER_ROOT, // Object path +- DBUS_PROPERTY_IFACE, // Interface name +- "Set", // Method to be called +- &bus_error, // object to return error +- nullptr, // Response buffer if any +- "ssv", // Takes 3 arguments +- HOST_STATE_MANAGER_IFACE, PROPERTY, "s", +- request.c_str()); +- if (rc < 0) +- { +- log<level::ERR>("Failed to initiate transition", +- entry("ERRNO=0x%X, REQUEST=%s", -rc, request.c_str())); ++ try ++ { ++ ipmi::setDbusProperty(*getSdBus(), service, chassisStatePath, ++ chassisStateIntf, "RequestedPowerTransition", ++ request); + } +- else ++ catch (std::exception& e) + { +- log<level::INFO>("Transition request initiated successfully"); ++ log<level::ERR>( ++ "Failed to initiate transition", ++ entry("EXCEPTION=%s, REQUEST=%s", e.what(), request.c_str())); ++ return -1; + } + +- sd_bus_error_free(&bus_error); +- free(busname); +- +- return rc; ++ return 0; + } + + //------------------------------------------ +@@ -1302,76 +1307,6 @@ ipmi::RspType<uint4_t, // Restart Cause + return ipmi::responseSuccess(cause.value(), reserved, channel); + } + +-//------------------------------------------------------------- +-// Send a command to SoftPowerOff application to stop any timer +-//------------------------------------------------------------- +-int stop_soft_off_timer() +-{ +- constexpr auto iface = "org.freedesktop.DBus.Properties"; +- constexpr auto soft_off_iface = "xyz.openbmc_project.Ipmi.Internal." +- "SoftPowerOff"; +- +- constexpr auto property = "ResponseReceived"; +- constexpr auto value = "xyz.openbmc_project.Ipmi.Internal." +- "SoftPowerOff.HostResponse.HostShutdown"; +- +- // Get the system bus where most system services are provided. +- auto bus = ipmid_get_sd_bus_connection(); +- +- // Get the service name +- // TODO openbmc/openbmc#1661 - Mapper refactor +- // +- // See openbmc/openbmc#1743 for some details but high level summary is that +- // for now the code will directly call the soft off interface due to a +- // race condition with mapper usage +- // +- // char *busname = nullptr; +- // auto r = mapper_get_service(bus, SOFTOFF_OBJPATH, &busname); +- // if (r < 0) +- //{ +- // fprintf(stderr, "Failed to get %s bus name: %s\n", +- // SOFTOFF_OBJPATH, -r); +- // return r; +- //} +- +- // No error object or reply expected. +- int rc = sd_bus_call_method(bus, SOFTOFF_BUSNAME, SOFTOFF_OBJPATH, iface, +- "Set", nullptr, nullptr, "ssv", soft_off_iface, +- property, "s", value); +- if (rc < 0) +- { +- log<level::ERR>("Failed to set property in SoftPowerOff object", +- entry("ERRNO=0x%X", -rc)); +- } +- +- // TODO openbmc/openbmc#1661 - Mapper refactor +- // free(busname); +- return rc; +-} +- +-//---------------------------------------------------------------------- +-// Create file to indicate there is no need for softoff notification to host +-//---------------------------------------------------------------------- +-void indicate_no_softoff_needed() +-{ +- fs::path path{HOST_INBAND_REQUEST_DIR}; +- if (!fs::is_directory(path)) +- { +- fs::create_directory(path); +- } +- +- // Add the host instance (default 0 for now) to the file name +- std::string file{HOST_INBAND_REQUEST_FILE}; +- auto size = std::snprintf(nullptr, 0, file.c_str(), 0); +- size++; // null +- std::unique_ptr<char[]> buf(new char[size]); +- std::snprintf(buf.get(), size, file.c_str(), 0); +- +- // Append file name to directory and create it +- path /= buf.get(); +- std::ofstream(path.c_str()); +-} +- + /** @brief Implementation of chassis control command + * + * @param - chassisControl command byte +@@ -1384,66 +1319,22 @@ ipmi::RspType<> ipmiChassisControl(uint8_t chassisControl) + switch (chassisControl) + { + case CMD_POWER_ON: +- rc = initiate_state_transition(State::Host::Transition::On); ++ rc = initiateHostStateTransition(State::Host::Transition::On); + break; + case CMD_POWER_OFF: +- // This path would be hit in 2 conditions. +- // 1: When user asks for power off using ipmi chassis command 0x04 +- // 2: Host asking for power off post shutting down. +- +- // If it's a host requested power off, then need to nudge Softoff +- // application that it needs to stop the watchdog timer if running. +- // If it is a user requested power off, then this is not really +- // needed. But then we need to differentiate between user and host +- // calling this same command +- +- // For now, we are going ahead with trying to nudge the soft off and +- // interpret the failure to do so as a non softoff case +- rc = stop_soft_off_timer(); +- +- // Only request the Off transition if the soft power off +- // application is not running +- if (rc < 0) +- { +- // First create a file to indicate to the soft off application +- // that it should not run. Not doing this will result in State +- // manager doing a default soft power off when asked for power +- // off. +- indicate_no_softoff_needed(); +- +- // Now request the shutdown +- rc = initiate_state_transition(State::Host::Transition::Off); +- } +- else +- { +- log<level::INFO>("Soft off is running, so let shutdown target " +- "stop the host"); +- } ++ rc = ++ initiateChassisStateTransition(State::Chassis::Transition::Off); + break; +- + case CMD_HARD_RESET: +- rc = initiate_state_transition( ++ rc = initiateHostStateTransition( + State::Host::Transition::ForceWarmReboot); + break; + case CMD_POWER_CYCLE: +- // SPEC has a section that says certain implementations can trigger +- // PowerOn if power is Off when a command to power cycle is +- // requested +- +- // First create a file to indicate to the soft off application +- // that it should not run since this is a direct user initiated +- // power reboot request (i.e. a reboot request that is not +- // originating via a soft power off SMS request) +- indicate_no_softoff_needed(); +- +- rc = initiate_state_transition(State::Host::Transition::Reboot); ++ rc = initiateHostStateTransition(State::Host::Transition::Reboot); + break; +- + case CMD_SOFT_OFF_VIA_OVER_TEMP: +- // Request Host State Manager to do a soft power off +- rc = initiate_state_transition(State::Host::Transition::Off); ++ rc = initiateHostStateTransition(State::Host::Transition::Off); + break; +- + case CMD_PULSE_DIAGNOSTIC_INTR: + rc = setNmiProperty(true); + break; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0063-Save-the-pre-timeout-interrupt-in-dbus-property.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0063-Save-the-pre-timeout-interrupt-in-dbus-property.patch new file mode 100644 index 000000000..d0f9331d2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0063-Save-the-pre-timeout-interrupt-in-dbus-property.patch @@ -0,0 +1,140 @@ +From cfb5e13388531e1317eeb3ccf0f8eef0c6eeca60 Mon Sep 17 00:00:00 2001 +From: Ren Yu <yux.ren@intel.com> +Date: Tue, 28 May 2019 17:11:17 +0800 +Subject: [PATCH] Save the pre-timeout interrupt in dbus property + +Get the watchdog pre-timeout interrupt value from ipmi watchdog set command, +and store it into dbus property. + +Tested: +Config IPMI watchdog: BIOS FRB2 Power Cycle after 1 seconds: +ipmitool raw 0x06 0x24 0x01 0x13 0x0 0x2 0xa 0x00 +Start watchdog: +Ipmitool mc watchdog reset +Check the watchdog pre-timeout interrupt in below: +https://BMCIP/redfish/v1/Systems/system/LogServices/EventLog/Entries + +Signed-off-by: Ren Yu <yux.ren@intel.com> +--- + app/watchdog.cpp | 47 ++++++++++++++++++++++++++++++++++++++++ + app/watchdog_service.cpp | 6 +++++ + app/watchdog_service.hpp | 9 ++++++++ + 3 files changed, 62 insertions(+) + +diff --git a/app/watchdog.cpp b/app/watchdog.cpp +index 03c373e..cb0b1fd 100644 +--- a/app/watchdog.cpp ++++ b/app/watchdog.cpp +@@ -80,6 +80,7 @@ ipmi::RspType<> ipmiAppResetWatchdogTimer() + + static constexpr uint8_t wd_dont_stop = 0x1 << 6; + static constexpr uint8_t wd_timeout_action_mask = 0x3; ++static constexpr uint8_t wdPreTimeoutInterruptMask = 0x3; + + static constexpr uint8_t wdTimerUseResTimer1 = 0x0; + static constexpr uint8_t wdTimerUseResTimer2 = 0x6; +@@ -127,6 +128,45 @@ WatchdogService::Action ipmiActionToWdAction(IpmiAction ipmi_action) + } + } + ++enum class IpmiPreTimeoutInterrupt : uint8_t ++{ ++ None = 0x0, ++ SMI = 0x1, ++ NMI = 0x2, ++ MI = 0x3, ++}; ++/** @brief Converts an IPMI Watchdog PreTimeoutInterrupt to DBUS defined action ++ * @param[in] ipmi_action The IPMI Watchdog PreTimeoutInterrupt ++ * @return The Watchdog PreTimeoutInterrupt that the ipmi_action maps to ++ */ ++WatchdogService::PreTimeoutInterruptAction ipmiPreTimeoutInterruptToWdAction( ++ IpmiPreTimeoutInterrupt ipmiPreTimeOutInterrupt) ++{ ++ switch (ipmiPreTimeOutInterrupt) ++ { ++ case IpmiPreTimeoutInterrupt::None: ++ { ++ return WatchdogService::PreTimeoutInterruptAction::None; ++ } ++ case IpmiPreTimeoutInterrupt::SMI: ++ { ++ return WatchdogService::PreTimeoutInterruptAction::SMI; ++ } ++ case IpmiPreTimeoutInterrupt::NMI: ++ { ++ return WatchdogService::PreTimeoutInterruptAction::NMI; ++ } ++ case IpmiPreTimeoutInterrupt::MI: ++ { ++ return WatchdogService::PreTimeoutInterruptAction::MI; ++ } ++ default: ++ { ++ throw std::domain_error("IPMI PreTimeoutInterrupt is invalid"); ++ } ++ } ++} ++ + enum class IpmiTimerUse : uint8_t + { + Reserved = 0x0, +@@ -250,6 +290,13 @@ ipmi::RspType<> + // Mark as initialized so that future resets behave correctly + wd_service.setInitialized(true); + ++ // pretimeOutAction ++ const auto ipmiPreTimeoutInterrupt = ++ static_cast<IpmiPreTimeoutInterrupt>(wdPreTimeoutInterruptMask & ++ (static_cast<uint8_t>(preTimeoutInterrupt))); ++ wd_service.setPreTimeoutInterrupt( ++ ipmiPreTimeoutInterruptToWdAction(ipmiPreTimeoutInterrupt)); ++ + lastCallSuccessful = true; + return ipmi::responseSuccess(); + } +diff --git a/app/watchdog_service.cpp b/app/watchdog_service.cpp +index 3534e89..4df1ab6 100644 +--- a/app/watchdog_service.cpp ++++ b/app/watchdog_service.cpp +@@ -198,3 +198,9 @@ void WatchdogService::setInterval(uint64_t interval) + { + setProperty("Interval", interval); + } ++ ++void WatchdogService::setPreTimeoutInterrupt( ++ PreTimeoutInterruptAction preTimeoutInterrupt) ++{ ++ setProperty("PreTimeoutInterrupt", convertForMessage(preTimeoutInterrupt)); ++} +\ No newline at end of file +diff --git a/app/watchdog_service.hpp b/app/watchdog_service.hpp +index 141bdb7..32b7461 100644 +--- a/app/watchdog_service.hpp ++++ b/app/watchdog_service.hpp +@@ -15,6 +15,8 @@ class WatchdogService + + using Action = + sdbusplus::xyz::openbmc_project::State::server::Watchdog::Action; ++ using PreTimeoutInterruptAction = sdbusplus::xyz::openbmc_project::State:: ++ server::Watchdog::PreTimeoutInterruptAction; + using TimerUse = + sdbusplus::xyz::openbmc_project::State::server::Watchdog::TimerUse; + +@@ -92,6 +94,13 @@ class WatchdogService + */ + void setInterval(uint64_t interval); + ++ /** @brief Sets the value of the PreTimeoutInterrupt property on the host ++ * watchdog ++ * ++ * @param[in] PreTimeoutInterrupt - The new PreTimeoutInterrupt value ++ */ ++ void setPreTimeoutInterrupt(PreTimeoutInterruptAction preTimeoutInterrupt); ++ + private: + /** @brief sdbusplus handle */ + sdbusplus::bus::bus bus; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/phosphor-ipmi-host.service b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/phosphor-ipmi-host.service new file mode 100644 index 000000000..1e45ee6c9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/phosphor-ipmi-host.service @@ -0,0 +1,15 @@ +[Unit] +Description=Phosphor Inband IPMI + +[Service] +Restart=always +RestartSec=5 +StartLimitBurst=10 +ExecStart=/usr/bin/env ipmid +SyslogIdentifier=ipmid +RuntimeDirectory = ipmi +RuntimeDirectoryPreserve = yes +StateDirectory = ipmi + +[Install] +WantedBy=basic.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/transporthandler_oem.cpp b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/transporthandler_oem.cpp new file mode 100644 index 000000000..856a80fbc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/transporthandler_oem.cpp @@ -0,0 +1,147 @@ +/* Copyright 2019 Intel + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "dcmihandler.hpp" + +#include <cstdint> +#include <ipmid/api-types.hpp> +#include <ipmid/api.hpp> +#include <ipmid/message.hpp> +#include <ipmid/message/types.hpp> +#include <ipmid/utils.hpp> +#include <vector> + +enum class oemLanParam : uint8_t +{ + intelHostnameConfig = 0xc7, +}; + +constexpr size_t IpmiHostnameLen = 16; +constexpr uint8_t CurrentRevision = 0x11; // Current rev per IPMI Spec 2.0 + +constexpr ipmi::Cc ccParamNotSupported = 0x80; +constexpr ipmi::Cc ccUnprintable = 0x90; + +namespace ipmi::transport +{ + +constexpr auto validHostnameChars = + "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWX" + "YZ0123456789-"; +constexpr int lanOemHostnameLength = 64; + +RspType<> setLanOem(uint8_t channel, uint8_t parameter, message::Payload& req) +{ + std::vector<uint8_t> dataBytes; + switch (static_cast<oemLanParam>(parameter)) + { + case oemLanParam::intelHostnameConfig: + { + static std::array<uint8_t, lanOemHostnameLength> blockData; + uint8_t block = 0; + uint8_t complete = 0; + if ((req.unpack(block, complete, dataBytes) != 0) || + (!req.fullyUnpacked())) + { + return responseReqDataLenInvalid(); + } + + size_t numDataBytes = req.size() - 4; + if ((numDataBytes > IpmiHostnameLen) || + (!complete && (numDataBytes < IpmiHostnameLen))) + { + return responseReqDataLenInvalid(); + } + + if (!((block > 0) && (block < 5)) || + ((complete != 0) && (complete != 1))) + { + return responseInvalidFieldRequest(); + } + + if (block == 1) + { + blockData.fill(0); + } + + std::copy(dataBytes.begin(), dataBytes.end(), + blockData.data() + ((block - 1) * IpmiHostnameLen)); + if (complete) + { + blockData[lanOemHostnameLength - 1] = 0; + // check hostname, and write it + std::string newHostname( + reinterpret_cast<char*>(blockData.data()), + lanOemHostnameLength); + size_t firstNull = newHostname.find_first_of('\0'); + if (newHostname.find_first_not_of(validHostnameChars) != + firstNull) + { + return response(ccUnprintable); + } + std::shared_ptr<sdbusplus::asio::connection> busp = getSdBus(); + ipmi::setDbusProperty(*busp, ::dcmi::networkServiceName, + ::dcmi::networkConfigObj, + ::dcmi::networkConfigIntf, + ::dcmi::hostNameProp, newHostname); + } + return responseSuccess(); + } + default: + return response(ccParamNotSupported); + } + return response(ccParamNotSupported); +} + +RspType<message::Payload> getLanOem(uint8_t channel, uint8_t parameter, + uint8_t set, uint8_t block) +{ + message::Payload message; + message.pack(CurrentRevision); + oemLanParam param = static_cast<oemLanParam>(parameter); + switch (param) + { + case oemLanParam::intelHostnameConfig: + { + if (set != 0) + { + return responseInvalidFieldRequest(); + } + if ((block < 1) || (block > 4)) + { + return responseInvalidFieldRequest(); + } + std::shared_ptr<sdbusplus::asio::connection> busp = getSdBus(); + auto service = ipmi::getService(*busp, ::dcmi::networkConfigIntf, + ::dcmi::networkConfigObj); + auto value = ipmi::getDbusProperty( + *busp, service, ::dcmi::networkConfigObj, + ::dcmi::networkConfigIntf, ::dcmi::hostNameProp); + std::string hostname = std::get<std::string>(value); + std::array<char, IpmiHostnameLen> buf = {0}; + size_t head = (block - 1) * IpmiHostnameLen; + if (head < hostname.size()) + { + size_t numToCopy = hostname.size() - head; + numToCopy = std::min(IpmiHostnameLen, numToCopy); + hostname.copy(buf.data(), numToCopy, head); + } + message.pack(buf); + return responseSuccess(std::move(message)); + } + } + return response(ccParamNotSupported); +} +} // namespace ipmi::transport diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend new file mode 100644 index 000000000..87aab6f79 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend @@ -0,0 +1,38 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +PROJECT_SRC_DIR := "${THISDIR}/${PN}" + +#SRC_URI += "git://github.com/openbmc/phosphor-host-ipmid" +SRCREV = "78fe1b14f60d55ae335369fb2c6e81ed9ac6d865" + +SRC_URI += "file://phosphor-ipmi-host.service \ + file://0010-fix-get-system-GUID-ipmi-command.patch \ + file://0053-Fix-keep-looping-issue-when-entering-OS.patch \ + file://0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch \ + file://0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch \ + file://0062-Update-IPMI-Chassis-Control-command.patch \ + file://0063-Save-the-pre-timeout-interrupt-in-dbus-property.patch \ + " + +EXTRA_OECONF:append = " --disable-i2c-whitelist-check" +EXTRA_OECONF:append = " --enable-transport-oem=yes" +EXTRA_OECONF:append = " --disable-boot-flag-safe-mode-support" +EXTRA_OECONF:append = " --disable-ipmi-whitelist" + +RDEPENDS:${PN}:remove = "clear-once" + +# remove the softpoweroff service since we do not need it +SYSTEMD_SERVICE:${PN}:remove = " \ + xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service" + +SYSTEMD_LINK:${PN}:remove = " \ + ../xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service:obmc-host-shutdown@0.target.requires/xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service \ + " + +do_compile:prepend(){ + cp -f ${PROJECT_SRC_DIR}/transporthandler_oem.cpp ${S} +} + +do_install:append(){ + rm -f ${D}/${bindir}/phosphor-softpoweroff + rm -f ${S}/transporthandler_oem.cpp +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0001-Add-dbus-method-SlotIpmbRequest.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0001-Add-dbus-method-SlotIpmbRequest.patch new file mode 100644 index 000000000..d071ebd67 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0001-Add-dbus-method-SlotIpmbRequest.patch @@ -0,0 +1,535 @@ +From 42231615d6a1effbfaa581ca41c0d406174feee8 Mon Sep 17 00:00:00 2001 +From: Rajashekar Gade Reddy <raja.sekhar.reddy.gade@linux.intel.com> +Date: Mon, 23 Mar 2020 22:19:07 +0530 +Subject: [PATCH] Add dbus method SlotIpmbRequest + +Added dbus method SlotIpmbRequest which enables the applications to +communicate with add-in cards. + +This is submitted in down stream because SlotIpmbRequest uses hold and +unhold mux kernel patches which are downstream only patches. + +Tested: + +busctl call xyz.openbmc_project.Ipmi.Channel.Ipmb +/xyz/openbmc_project/Ipmi/Channel/Ipmb org.openbmc.Ipmb SlotIpmbRequest +"yyyyyay" <valid_addressType> <valid_slot> <valid_slaveAddr> <valid_netFun> <valid_cmd> <data> // method call +(iyyyyay) 0 7 0 1 0 15 0 0 0 0 2 12 87 1 0 0 0 0 0 0 0 // success + +busctl call xyz.openbmc_project.Ipmi.Channel.Ipmb +/xyz/openbmc_project/Ipmi/Channel/Ipmb org.openbmc.Ipmb SlotIpmbRequest +"yyyyyay" <valid_addressType> <invalid_slot> <valid_slaveAddr> <valid_netFun> <valid_cmd> <data> // method call +(iyyyyay) 4 0 0 0 0 0 // failure + +busctl call xyz.openbmc_project.Ipmi.Channel.Ipmb +/xyz/openbmc_project/Ipmi/Channel/Ipmb org.openbmc.Ipmb SlotIpmbRequest +"yyyyyay" <valid_addressType> <valid_slot> <invalid_slaveAddr> <valid_netFun> <valid_cmd> <data> // method call +(iyyyyay) 4 0 0 0 0 0 // failure + +//This ipmi command internally calls the dbus method SlotIpmbRequest. +ipmitool raw 0x3e 0x51 0 0x01 0xb0 0x6 1 +00 00 00 00 00 02 0c 57 01 00 00 00 00 00 00 00 //success + +Note: Tested for all possible negative test cases and it works fine. + +Signed-off-by: Rajashekar Gade Reddy <raja.sekhar.reddy.gade@intel.com> +--- + CMakeLists.txt | 2 +- + include/linux/i2c.h | 159 +++++++++++++++++++++++++++++++ + ipmb-channels.json | 6 ++ + ipmbbridged.cpp | 221 +++++++++++++++++++++++++++++++++++++++++++- + ipmbbridged.hpp | 8 +- + 5 files changed, 392 insertions(+), 4 deletions(-) + create mode 100644 include/linux/i2c.h + +diff --git a/CMakeLists.txt b/CMakeLists.txt +index 4acdccf..3484a58 100644 +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -8,7 +8,7 @@ set (CMAKE_CXX_STANDARD_REQUIRED ON) + #set (CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fno-rtti") + #set (CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fno-rtti") + +-include_directories (${CMAKE_CURRENT_SOURCE_DIR}) ++include_directories (${CMAKE_CURRENT_SOURCE_DIR} ${CMAKE_CURRENT_SOURCE_DIR}/include) + find_package (Boost REQUIRED) + include_directories (${Boost_INCLUDE_DIRS}) + add_definitions (-DBOOST_ERROR_CODE_HEADER_ONLY) +diff --git a/include/linux/i2c.h b/include/linux/i2c.h +new file mode 100644 +index 0000000..a1db9b1 +--- /dev/null ++++ b/include/linux/i2c.h +@@ -0,0 +1,159 @@ ++/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ ++/* ------------------------------------------------------------------------- */ ++/* */ ++/* i2c.h - definitions for the i2c-bus interface */ ++/* */ ++/* ------------------------------------------------------------------------- */ ++/* Copyright (C) 1995-2000 Simon G. Vogl ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, ++ MA 02110-1301 USA. */ ++/* ------------------------------------------------------------------------- */ ++ ++/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and ++ Frodo Looijaard <frodol@dds.nl> */ ++ ++#ifndef _UAPI_LINUX_I2C_H ++#define _UAPI_LINUX_I2C_H ++ ++#include <linux/types.h> ++ ++/** ++ * struct i2c_msg - an I2C transaction segment beginning with START ++ * @addr: Slave address, either seven or ten bits. When this is a ten ++ * bit address, I2C_M_TEN must be set in @flags and the adapter ++ * must support I2C_FUNC_10BIT_ADDR. ++ * @flags: I2C_M_RD is handled by all adapters. No other flags may be ++ * provided unless the adapter exported the relevant I2C_FUNC_* ++ * flags through i2c_check_functionality(). ++ * @len: Number of data bytes in @buf being read from or written to the ++ * I2C slave address. For read transactions where I2C_M_RECV_LEN ++ * is set, the caller guarantees that this buffer can hold up to ++ * 32 bytes in addition to the initial length byte sent by the ++ * slave (plus, if used, the SMBus PEC); and this value will be ++ * incremented by the number of block data bytes received. ++ * @buf: The buffer into which data is read, or from which it's written. ++ * ++ * An i2c_msg is the low level representation of one segment of an I2C ++ * transaction. It is visible to drivers in the @i2c_transfer() procedure, ++ * to userspace from i2c-dev, and to I2C adapter drivers through the ++ * @i2c_adapter.@master_xfer() method. ++ * ++ * Except when I2C "protocol mangling" is used, all I2C adapters implement ++ * the standard rules for I2C transactions. Each transaction begins with a ++ * START. That is followed by the slave address, and a bit encoding read ++ * versus write. Then follow all the data bytes, possibly including a byte ++ * with SMBus PEC. The transfer terminates with a NAK, or when all those ++ * bytes have been transferred and ACKed. If this is the last message in a ++ * group, it is followed by a STOP. Otherwise it is followed by the next ++ * @i2c_msg transaction segment, beginning with a (repeated) START. ++ * ++ * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then ++ * passing certain @flags may have changed those standard protocol behaviors. ++ * Those flags are only for use with broken/nonconforming slaves, and with ++ * adapters which are known to support the specific mangling options they ++ * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR). ++ */ ++struct i2c_msg { ++ __u16 addr; /* slave address */ ++ __u16 flags; ++#define I2C_M_RD 0x0001 /* read data, from slave to master */ ++ /* I2C_M_RD is guaranteed to be 0x0001! */ ++#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */ ++#define I2C_M_HOLD 0x0100 /* for holding a mux path */ ++#define I2C_M_DMA_SAFE 0x0200 /* the buffer of this message is DMA safe */ ++ /* makes only sense in kernelspace */ ++ /* userspace buffers are copied anyway */ ++#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */ ++#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */ ++#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */ ++#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */ ++#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_NOSTART */ ++#define I2C_M_STOP 0x8000 /* if I2C_FUNC_PROTOCOL_MANGLING */ ++ __u16 len; /* msg length */ ++ __u8 *buf; /* pointer to msg data */ ++}; ++ ++/* To determine what functionality is present */ ++ ++#define I2C_FUNC_I2C 0x00000001 ++#define I2C_FUNC_10BIT_ADDR 0x00000002 ++#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_IGNORE_NAK etc. */ ++#define I2C_FUNC_SMBUS_PEC 0x00000008 ++#define I2C_FUNC_NOSTART 0x00000010 /* I2C_M_NOSTART */ ++#define I2C_FUNC_SLAVE 0x00000020 ++#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ ++#define I2C_FUNC_SMBUS_QUICK 0x00010000 ++#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 ++#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 ++#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 ++#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 ++#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 ++#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 ++#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 ++#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 ++#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 ++#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ ++#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ ++#define I2C_FUNC_SMBUS_HOST_NOTIFY 0x10000000 ++ ++#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ ++ I2C_FUNC_SMBUS_WRITE_BYTE) ++#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ ++ I2C_FUNC_SMBUS_WRITE_BYTE_DATA) ++#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ ++ I2C_FUNC_SMBUS_WRITE_WORD_DATA) ++#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ ++ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) ++#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ ++ I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) ++ ++#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ ++ I2C_FUNC_SMBUS_BYTE | \ ++ I2C_FUNC_SMBUS_BYTE_DATA | \ ++ I2C_FUNC_SMBUS_WORD_DATA | \ ++ I2C_FUNC_SMBUS_PROC_CALL | \ ++ I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ ++ I2C_FUNC_SMBUS_I2C_BLOCK | \ ++ I2C_FUNC_SMBUS_PEC) ++ ++/* ++ * Data for SMBus Messages ++ */ ++#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ ++union i2c_smbus_data { ++ __u8 byte; ++ __u16 word; ++ __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ ++ /* and one more for user-space compatibility */ ++}; ++ ++/* i2c_smbus_xfer read or write markers */ ++#define I2C_SMBUS_READ 1 ++#define I2C_SMBUS_WRITE 0 ++ ++/* SMBus transaction types (size parameter in the above functions) ++ Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ ++#define I2C_SMBUS_QUICK 0 ++#define I2C_SMBUS_BYTE 1 ++#define I2C_SMBUS_BYTE_DATA 2 ++#define I2C_SMBUS_WORD_DATA 3 ++#define I2C_SMBUS_PROC_CALL 4 ++#define I2C_SMBUS_BLOCK_DATA 5 ++#define I2C_SMBUS_I2C_BLOCK_BROKEN 6 ++#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ ++#define I2C_SMBUS_I2C_BLOCK_DATA 8 ++ ++#endif /* _UAPI_LINUX_I2C_H */ +diff --git a/ipmb-channels.json b/ipmb-channels.json +index 0876db7..ff570c6 100644 +--- a/ipmb-channels.json ++++ b/ipmb-channels.json +@@ -11,6 +11,12 @@ + "slave-path": "/dev/ipmb-0", + "bmc-addr": 32, + "remote-addr": 88 ++ }, ++ { ++ "type": "slot-ipmb", ++ "slave-path": "/dev/ipmb-6", ++ "bmc-addr": 18, ++ "remote-addr": 176 + } + ] + } +diff --git a/ipmbbridged.cpp b/ipmbbridged.cpp +index 3bf8469..6d1be04 100644 +--- a/ipmbbridged.cpp ++++ b/ipmbbridged.cpp +@@ -18,6 +18,11 @@ + #include "ipmbdefines.hpp" + #include "ipmbutils.hpp" + ++#include <i2c/smbus.h> ++#include <linux/i2c-dev.h> ++#include <linux/i2c.h> ++#include <sys/ioctl.h> ++ + #include <boost/algorithm/string/replace.hpp> + #include <boost/asio/write.hpp> + #include <filesystem> +@@ -40,7 +45,8 @@ auto conn = std::make_shared<sdbusplus::asio::connection>(io); + static std::list<IpmbChannel> ipmbChannels; + static const std::unordered_map<std::string, ipmbChannelType> + ipmbChannelTypeMap = {{"me", ipmbChannelType::me}, +- {"ipmb", ipmbChannelType::ipmb}}; ++ {"ipmb", ipmbChannelType::ipmb}, ++ {"slot-ipmb", ipmbChannelType::slot_ipmb}}; + + /** + * @brief Ipmb request class methods +@@ -555,7 +561,10 @@ int IpmbChannel::ipmbChannelInit(const char *ipmbI2cSlave) + { + std::string deviceFileName = + "/sys/bus/i2c/devices/i2c-" + busStr + "/new_device"; +- std::string para = "ipmb-dev 0x1010"; // init with BMC addr 0x20 ++ std::ostringstream param; ++ param << "ipmb-dev 0x" << std::hex ++ << static_cast<uint16_t>(0x1000 | (ipmbBmcSlaveAddress >> 1)); ++ std::string para(param.str()); + std::fstream deviceFile; + deviceFile.open(deviceFileName, std::ios::out); + if (!deviceFile.good()) +@@ -711,6 +720,171 @@ void IpmbChannel::addFilter(const uint8_t respNetFn, const uint8_t cmd) + } + } + ++class Mux ++{ ++ public: ++ Mux(const std::string &path) : heldMux(false) ++ { ++ fd = open(path.c_str(), O_RDWR | O_NONBLOCK); ++ } ++ ~Mux() ++ { ++ if (heldMux) ++ { ++ if (unholdMux() < 0) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error while unholding the bus"); ++ } ++ } ++ if (!(fd < 0)) ++ { ++ close(fd); ++ } ++ } ++ ++ int transferAndHoldMux(const uint8_t slaveAddr, uint8_t *buffer, ++ const uint8_t len, uint16_t timeout) ++ { ++ if (!isMuxFdOpen()) ++ { ++ return -1; ++ } ++ struct i2c_msg holdmsg[2] = { ++ {slaveAddr, 0, len, buffer}, ++ {0, I2C_M_HOLD, sizeof(timeout), (uint8_t *)&timeout}}; ++ ++ struct i2c_rdwr_ioctl_data msgrdwr = {&holdmsg[0], 2}; ++ ++ int retVal = ioctl(fd, I2C_RDWR, &msgrdwr); ++ if (retVal >= 0) ++ { ++ heldMux = true; ++ } ++ return retVal; ++ } ++ ++ bool isMuxFdOpen() ++ { ++ if (fd < 0) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error while opening the mux device file"); ++ return false; ++ } ++ return true; ++ } ++ ++ private: ++ int unholdMux() ++ { ++ if (!isMuxFdOpen()) ++ { ++ return -1; ++ } ++ uint16_t holdtimeout = 0; // unhold the bus ++ ++ struct i2c_msg holdmsg = {0, I2C_M_HOLD, sizeof(holdtimeout), ++ (uint8_t *)&holdtimeout}; ++ ++ struct i2c_rdwr_ioctl_data msgrdwr = {&holdmsg, 1}; ++ ++ return ioctl(fd, I2C_RDWR, &msgrdwr); ++ } ++ ++ int fd; ++ bool heldMux; ++}; ++ ++std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> ++ IpmbChannel::slotRequestAdd(boost::asio::yield_context &yield, ++ std::shared_ptr<IpmbRequest> request, ++ const uint8_t pcieSlot) ++{ ++ makeRequestValid(request); ++ std::filesystem::path p = ++ "/dev/i2c-mux/PCIE_Mux/Pcie_Slot_" + std::to_string(pcieSlot); ++ ++ if (!std::filesystem::exists(p) || !std::filesystem::is_symlink(p)) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "does not exist or not a symlink ", ++ phosphor::logging::entry("File:%s", p.c_str())); ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ Mux mux(p); ++ if (!mux.isMuxFdOpen()) ++ { ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ std::vector<uint8_t> buffer(0); ++ if (request->ipmbToi2cConstruct(buffer) != 0) ++ { ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ uint8_t size = buffer.size(); ++ ++ const uint8_t slaveAddrIndex = 1; ++ const uint8_t slotIpmbHeader = 2; ++ ++ for (int i = 0; i < ipmbNumberOfTries; i++) ++ { ++ boost::system::error_code ec; ++ int i2cRetryCnt = 0; ++ do ++ { ++ if (mux.transferAndHoldMux( ++ buffer[slaveAddrIndex] >> 1, buffer.data() + slotIpmbHeader, ++ size - slotIpmbHeader, ipmbRequestRetryTimeout) >= 0) ++ { ++ break; ++ } ++ ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error sending slot IPMB command"); ++ i2cRetryCnt++; ++ } while (i2cRetryCnt < ipmbI2cNumberOfRetries); ++ ++ if (i2cRetryCnt == ipmbI2cNumberOfRetries) ++ { ++ std::string msgToLog = ++ "slotRequestAdd: Sent to I2C failed after retries." ++ " busId=" + ++ std::to_string(ipmbBusId) + ", error=" + ec.message(); ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ msgToLog.c_str()); ++ makeRequestInvalid(*request); ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ request->timer->expires_after( ++ std::chrono::milliseconds(ipmbRequestRetryTimeout)); ++ request->timer->async_wait(yield[ec]); ++ ++ if (ec && ec != boost::asio::error::operation_aborted) ++ { ++ // unexpected error - invalidate request and return generic error ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "requestAdd: async_wait error"); ++ makeRequestInvalid(*request); ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ if (request->state == ipmbRequestState::matched) ++ { ++ // matched response, send it to client application ++ makeRequestInvalid(*request); ++ return request->returnMatchedResponse(); ++ } ++ } ++ ++ makeRequestInvalid(*request); ++ return returnStatus(ipmbResponseStatus::timeout); ++} ++ + std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + IpmbChannel::requestAdd(boost::asio::yield_context &yield, + std::shared_ptr<IpmbRequest> request) +@@ -848,6 +1022,47 @@ static int initializeChannels() + return 0; + } + ++auto slotIpmbHandleRequest = ++ [](boost::asio::yield_context yield, uint8_t addressType, ++ uint8_t slotNumber, uint8_t targetSlaveAddr, uint8_t netfn, uint8_t cmd, ++ std::vector<uint8_t> dataReceived) { ++ uint8_t lun = 0; // No support for lun in slot IPMB ++ IpmbChannel *channel = ++ getChannel(static_cast<uint8_t>(ipmbChannelType::slot_ipmb)); ++ if (channel == nullptr) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "slotIpmbHandleRequest: Slot IPMB channel does not exist"); ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ ++ // check outstanding request list for valid sequence number ++ uint8_t seqNum = 0; ++ bool seqValid = channel->seqNumGet(seqNum); ++ if (!seqValid) ++ { ++ phosphor::logging::log<phosphor::logging::level::WARNING>( ++ "slotIpmbHandleRequest: cannot add more requests to the list"); ++ return returnStatus(ipmbResponseStatus::busy); ++ } ++ ++ uint8_t bmcSlaveAddress = channel->getBmcSlaveAddress(); ++ uint8_t rqSlaveAddress = targetSlaveAddr; ++ ++ // construct the request to add it to outstanding request list ++ std::shared_ptr<IpmbRequest> request = std::make_shared<IpmbRequest>( ++ rqSlaveAddress, netfn, ipmbRsLun, bmcSlaveAddress, seqNum, lun, cmd, ++ dataReceived); ++ ++ if (!request->timer) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "slotIpmbHandleRequest: timer object does not exist"); ++ return returnStatus(ipmbResponseStatus::error); ++ } ++ return channel->slotRequestAdd(yield, request, slotNumber); ++ }; ++ + auto ipmbHandleRequest = [](boost::asio::yield_context yield, + uint8_t reqChannel, uint8_t netfn, uint8_t lun, + uint8_t cmd, std::vector<uint8_t> dataReceived) { +@@ -994,6 +1209,8 @@ int main(int argc, char *argv[]) + server.add_interface(ipmbObj, ipmbDbusIntf); + + ipmbIface->register_method("sendRequest", std::move(ipmbHandleRequest)); ++ ipmbIface->register_method("SlotIpmbRequest", ++ std::move(slotIpmbHandleRequest)); + ipmbIface->initialize(); + + if (initializeChannels() < 0) +diff --git a/ipmbbridged.hpp b/ipmbbridged.hpp +index 052c193..c79ac63 100644 +--- a/ipmbbridged.hpp ++++ b/ipmbbridged.hpp +@@ -155,7 +155,8 @@ enum class ipmbRequestState + enum class ipmbChannelType + { + ipmb = 0, +- me = 1 ++ me = 1, ++ slot_ipmb = 2 + }; + + /** +@@ -293,6 +294,11 @@ class IpmbChannel + void ipmbSendI2cFrame(std::shared_ptr<std::vector<uint8_t>> buffer, + size_t retriesAttempted); + ++ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> ++ slotRequestAdd(boost::asio::yield_context &yield, ++ std::shared_ptr<IpmbRequest> requestToSend, ++ const uint8_t pcieSlot); ++ + std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + requestAdd(boost::asio::yield_context &yield, + std::shared_ptr<IpmbRequest> requestToSend); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0002-Add-log-count-limitation-to-requestAdd.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0002-Add-log-count-limitation-to-requestAdd.patch new file mode 100644 index 000000000..f24d585a9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0002-Add-log-count-limitation-to-requestAdd.patch @@ -0,0 +1,94 @@ +From 1b01638d44ebb5d6163899775dea2fcc7e0715d6 Mon Sep 17 00:00:00 2001 +From: Helen Huang <he.huang@intel.com> +Date: Mon, 31 May 2021 09:19:55 +0800 +Subject: [PATCH] Add log count limitation to requestAdd() + +To avoid log storm, add the log count limitation to +requestAdd(). + +Change-Id: I91894ff07fa252ed7746816535611a33b6f640ea +Signed-off-by: Helen Huang <he.huang@intel.com> +--- + ipmbbridged.cpp | 44 ++++++++++++++++++++++++++++++++++++++------ + ipmbbridged.hpp | 3 +++ + 2 files changed, 41 insertions(+), 6 deletions(-) + +diff --git a/ipmbbridged.cpp b/ipmbbridged.cpp +index 6d1be04..93f5b2f 100644 +--- a/ipmbbridged.cpp ++++ b/ipmbbridged.cpp +@@ -916,12 +916,44 @@ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + + if (i2cRetryCnt == ipmbI2cNumberOfRetries) + { +- std::string msgToLog = +- "requestAdd: Sent to I2C failed after retries." +- " busId=" + +- std::to_string(ipmbBusId) + ", error=" + ec.message(); +- phosphor::logging::log<phosphor::logging::level::INFO>( +- msgToLog.c_str()); ++ if ((requestAddLogCount <= ipmbRequestAddLogLimit) || ++ (!(requestAddLogCount % ipmbRequestAddLogInterval)) || ++ (UINT_MAX == requestAddLogCount)) ++ { ++ std::string msgToLog; ++ if (requestAddLogCount == ipmbRequestAddLogLimit) ++ { ++ msgToLog = "requestAdd: There are " + ++ std::to_string(ipmbRequestAddLogLimit - 1) + ++ " similiar logs." ++ " To avoid log storm, not all the logs for the " ++ "issue will be shown: "; ++ } ++ if (!(requestAddLogCount % ipmbRequestAddLogInterval) && (requestAddLogCount != 0)) ++ { ++ msgToLog = "requestAdd: There are " + ++ std::to_string(requestAddLogCount) + ++ " similiar logs so far: "; ++ } ++ if (UINT_MAX == requestAddLogCount) ++ { ++ msgToLog = "requestAdd: There are " + ++ std::to_string(requestAddLogCount) + ++ " similiar logs," ++ " The log count will be rolled back to zero: "; ++ } ++ msgToLog += "requestAdd: Sent to I2C failed after retries." ++ " busId=" + ++ std::to_string(ipmbBusId) + ++ ", error=" + ec.message(); ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ msgToLog.c_str()); ++ } ++ requestAddLogCount++; ++ } ++ else ++ { ++ requestAddLogCount = 0; + } + + request->timer->expires_after( +diff --git a/ipmbbridged.hpp b/ipmbbridged.hpp +index c79ac63..eaba7ae 100644 +--- a/ipmbbridged.hpp ++++ b/ipmbbridged.hpp +@@ -50,6 +50,8 @@ constexpr int ipmbMaxOutstandingRequestsCount = 64; + constexpr int ipmbNumberOfTries = 6; + constexpr uint64_t ipmbRequestRetryTimeout = 250; // ms + ++constexpr int ipmbRequestAddLogLimit = 10; ++constexpr int ipmbRequestAddLogInterval = 100; + /** + * @brief Ipmb I2C communication + */ +@@ -313,6 +315,7 @@ class IpmbChannel + uint8_t ipmbBusId; + uint8_t channelIdx; + ++ unsigned int requestAddLogCount = 0; + std::shared_ptr<IpmbCommandFilter> commandFilter; + + // array storing outstanding requests +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0003-Fix-for-clearing-outstanding-requests.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0003-Fix-for-clearing-outstanding-requests.patch new file mode 100644 index 000000000..ffa3ab1b0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/0003-Fix-for-clearing-outstanding-requests.patch @@ -0,0 +1,62 @@ +From e107bdc375aa23a4c0a3d23978cfe8b378bce09a Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Mon, 20 Sep 2021 14:06:05 +0000 +Subject: [PATCH] Fix for clearing outstanding requests + +IPMB requests were made valid even if there was an error in opening the +mux bus. This fix makes the IPMB requests valid only we were able to +successfully open the Mux fd. + +Tested: +Verified using busctl command. +Command: busctl call xyz.openbmc_project.Ipmi.Channel.Ipmb + /xyz/openbmc_project/Ipmi/Channel/Ipmb org.openbmc.Ipmb + sendRequest yyyyay 0 0x30 0 0x70 2 0 32 +Response: (iyyyyay) 0 49 0 112 193 0 + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + ipmbbridged.cpp | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/ipmbbridged.cpp b/ipmbbridged.cpp +index 3ffc1f7..0508fcc 100644 +--- a/ipmbbridged.cpp ++++ b/ipmbbridged.cpp +@@ -801,7 +801,6 @@ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + std::shared_ptr<IpmbRequest> request, + const uint8_t pcieSlot) + { +- makeRequestValid(request); + std::filesystem::path p = + "/dev/i2c-mux/PCIE_Mux/Pcie_Slot_" + std::to_string(pcieSlot); + +@@ -825,6 +824,7 @@ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + return returnStatus(ipmbResponseStatus::error); + } + ++ makeRequestValid(request); + uint8_t size = buffer.size(); + + const uint8_t slaveAddrIndex = 1; +@@ -894,6 +894,7 @@ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + std::vector<uint8_t> buffer(0); + if (request->ipmbToi2cConstruct(buffer) != 0) + { ++ makeRequestInvalid(*request); + return returnStatus(ipmbResponseStatus::error); + } + +@@ -929,7 +930,8 @@ std::tuple<int, uint8_t, uint8_t, uint8_t, uint8_t, std::vector<uint8_t>> + " To avoid log storm, not all the logs for the " + "issue will be shown: "; + } +- if (!(requestAddLogCount % ipmbRequestAddLogInterval) && (requestAddLogCount != 0)) ++ if (!(requestAddLogCount % ipmbRequestAddLogInterval) && ++ (requestAddLogCount != 0)) + { + msgToLog = "requestAdd: There are " + + std::to_string(requestAddLogCount) + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json new file mode 100644 index 000000000..2d77aa6e7 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json @@ -0,0 +1,22 @@ +{ + "channels": [ + { + "type": "me", + "slave-path": "/dev/ipmb-5", + "bmc-addr": 32, + "remote-addr": 44 + }, + { + "type": "ipmb", + "slave-path": "/dev/ipmb-13", + "bmc-addr": 32, + "remote-addr": 32 + }, + { + "type": "slot-ipmb", + "slave-path": "/dev/ipmb-6", + "bmc-addr": 18, + "remote-addr": 176 + } + ] +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend new file mode 100644 index 000000000..caf25fdd6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend @@ -0,0 +1,13 @@ +SRC_URI = "git://github.com/openbmc/ipmbbridge.git" +SRCREV = "8227626764edf13350c5f5a5857298a905fb43f7" +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +SRC_URI += "file://0001-Add-dbus-method-SlotIpmbRequest.patch \ + file://0002-Add-log-count-limitation-to-requestAdd.patch \ + file://0003-Fix-for-clearing-outstanding-requests.patch \ + file://ipmb-channels.json \ + " + +do_install:append() { + install -D ${WORKDIR}/ipmb-channels.json \ + ${D}/usr/share/ipmbbridge +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/99-ipmi-kcs.rules b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/99-ipmi-kcs.rules new file mode 100644 index 000000000..0a64b58db --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs/99-ipmi-kcs.rules @@ -0,0 +1,2 @@ +KERNEL=="ipmi-kcs3", SYMLINK+="ipmi_kcs3" +KERNEL=="ipmi-kcs4", SYMLINK+="ipmi_kcs4" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend new file mode 100644 index 000000000..fd1677543 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-kcs_%.bbappend @@ -0,0 +1,21 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +#SYSTEMD_SUBSTITUTIONS_remove = "KCS_DEVICE:${KCS_DEVICE}:${DBUS_SERVICE_${PN}}" + +# Default kcs device is ipmi-kcs3; this is SMS. +# Add SMM kcs device instance + +# Replace the '-' to '_', since Dbus object/interface names do not allow '-'. +KCS_DEVICE = "ipmi_kcs3" +SMM_DEVICE = "ipmi_kcs4" +SYSTEMD_SERVICE:${PN}:append = " ${PN}@${SMM_DEVICE}.service " + +SRC_URI = "git://github.com/openbmc/kcsbridge.git" +SRCREV = "7580a8e60d868b5bcb1a8f8d276374afe7c0983a" + +SRC_URI += "file://99-ipmi-kcs.rules" + +do_install:append() { + install -d ${D}${base_libdir}/udev/rules.d + install -m 0644 ${WORKDIR}/99-ipmi-kcs.rules ${D}${base_libdir}/udev/rules.d/ +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch new file mode 100644 index 000000000..867b3aba6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch @@ -0,0 +1,40 @@ +From 0fd38eb0a155cb11ff5a5452087f68c46d12111b Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@intel.com> +Date: Thu, 28 Mar 2019 18:10:40 +0800 +Subject: [PATCH] Change Authentication Parameter + +Seprate D-bus interface Authentication to forceAuthentication, +forceEncryption, Privilege according to the related change in +sol-dbus-interface. + +Tested By: +ipmitool -I lanplus -H x -U x -P x raw 0x0c 0x21 0x0e 0x02 0x03 +ipmitool -I lanplus -H x -U x -P x raw 0x0c 0x21 0x0e 0x02 0xc2 +The parameters has been changed to the request data in above command. + +Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> +--- + sol/sol_manager.cpp | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/sol/sol_manager.cpp b/sol/sol_manager.cpp +index de36723..0bd837e 100644 +--- a/sol/sol_manager.cpp ++++ b/sol/sol_manager.cpp +@@ -195,8 +195,12 @@ void Manager::updateSOLParameter() + + enable = std::get<bool>(properties["Enable"]); + ++ forceEncrypt = std::get<bool>(properties["ForceEncryption"]); ++ ++ forceAuth = std::get<bool>(properties["ForceAuthentication"]); ++ + solMinPrivilege = static_cast<session::Privilege>( +- std::get<uint8_t>(properties["Authentication"])); ++ std::get<uint8_t>(properties["Privilege"])); + + accumulateInterval = + std::get<uint8_t>((properties["AccumulateIntervalMS"])) * +-- +2.16.2 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch new file mode 100644 index 000000000..0ad625a1f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch @@ -0,0 +1,39 @@ +From 6fc55bb689272d34ff6616cdd4b24367ea39c749 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Mon, 2 Jul 2018 15:51:52 +0800 +Subject: [PATCH] Modify dbus namespace of chassis control for guid.cpp +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Switch chassis control service namespace for guid.cpp from “org” to “xyz”, +to compatible with new intel-chassis services + +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + command/guid.cpp | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +Index: phosphor-net-ipmid.clean/command/guid.cpp +=================================================================== +--- phosphor-net-ipmid.clean.orig/command/guid.cpp ++++ phosphor-net-ipmid.clean/command/guid.cpp +@@ -21,7 +21,8 @@ namespace command + + std::unique_ptr<sdbusplus::bus::match_t> matchPtr(nullptr); + +-static constexpr auto guidObjPath = "/org/openbmc/control/chassis0"; ++static constexpr auto guidObjPath = ++ "/xyz/openbmc_project/Chassis/Control/Chassis0"; + static constexpr auto propInterface = "org.freedesktop.DBus.Properties"; + + Guid getSystemGUID() +@@ -31,7 +32,7 @@ Guid getSystemGUID() + Guid guid = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10}; + +- constexpr auto chassisIntf = "org.openbmc.control.Chassis"; ++ constexpr auto chassisIntf = "xyz.openbmc_project.Chassis.Control.Chassis"; + + sd_bus_message* reply = nullptr; + sd_bus_error error = SD_BUS_ERROR_NULL; diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch new file mode 100644 index 000000000..7b690998f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch @@ -0,0 +1,331 @@ +From adabdfa46aa0db56f40030c7077f991ba1987b04 Mon Sep 17 00:00:00 2001 +From: Cheng C Yang <cheng.c.yang@intel.com> +Date: Tue, 30 Apr 2019 05:35:31 +0800 +Subject: [PATCH] Remove Get SOL Config Command from Netipmid + +Since Get SOL Config Parameter command already exists in host-ipmid, and +can be shared to net channel, remove this command from net-ipmid. + +Tested: +Run ipmitool -I lanplus -H xxx -U root -P 0penBmc sol info, the command +returns the same result as ipmitool sol info as below. +Info: SOL parameter 'Nonvolatile Bitrate (5)' not supported +Info: SOL parameter 'Volatile Bitrate (6)' not supported +Info: SOL parameter 'Payload Channel (7)' not supported - defaulting to 0x0e +Set in progress : set-complete +Enabled : true +Force Encryption : true +Force Authentication : true +Privilege Level : USER +Character Accumulate Level (ms) : 100 +Character Send Threshold : 1 +Retry Count : 3 +Retry Interval (ms) : 100 +Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Non-Volatile Bit Rate (kbps) : IPMI-Over-Serial-Setting +Payload Channel : 14 (0x0e) +Payload Port : 623 + +Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com> +--- + command/sol_cmds.cpp | 86 ---------------------- + command/sol_cmds.hpp | 168 ------------------------------------------- + sol_module.cpp | 6 -- + 3 files changed, 260 deletions(-) + +diff --git a/command/sol_cmds.cpp b/command/sol_cmds.cpp +index 81dfc993236c..be2cc81fc9cc 100644 +--- a/command/sol_cmds.cpp ++++ b/command/sol_cmds.cpp +@@ -69,92 +69,6 @@ void activating(uint8_t payloadInstance, uint32_t sessionID) + outPayload); + } + +-std::vector<uint8_t> getConfParams(const std::vector<uint8_t>& inPayload, +- std::shared_ptr<message::Handler>& handler) +-{ +- std::vector<uint8_t> outPayload(sizeof(GetConfParamsResponse)); +- auto request = +- reinterpret_cast<const GetConfParamsRequest*>(inPayload.data()); +- auto response = reinterpret_cast<GetConfParamsResponse*>(outPayload.data()); +- response->completionCode = IPMI_CC_OK; +- response->paramRev = parameterRevision; +- +- if (request->getParamRev) +- { +- return outPayload; +- } +- +- switch (static_cast<Parameter>(request->paramSelector)) +- { +- case Parameter::PROGRESS: +- { +- outPayload.push_back(sol::Manager::get().progress); +- break; +- } +- case Parameter::ENABLE: +- { +- outPayload.push_back(sol::Manager::get().enable); +- break; +- } +- case Parameter::AUTHENTICATION: +- { +- Auth value{0}; +- +- value.encrypt = sol::Manager::get().forceEncrypt; +- value.auth = sol::Manager::get().forceAuth; +- value.privilege = +- static_cast<uint8_t>(sol::Manager::get().solMinPrivilege); +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::ACCUMULATE: +- { +- Accumulate value{0}; +- +- value.interval = sol::Manager::get().accumulateInterval.count() / +- sol::accIntervalFactor; +- value.threshold = sol::Manager::get().sendThreshold; +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::RETRY: +- { +- Retry value{0}; +- +- value.count = sol::Manager::get().retryCount; +- value.interval = sol::Manager::get().retryInterval.count() / +- sol::retryIntervalFactor; +- auto buffer = reinterpret_cast<const uint8_t*>(&value); +- +- std::copy_n(buffer, sizeof(value), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::PORT: +- { +- auto port = endian::to_ipmi<uint16_t>(IPMI_STD_PORT); +- auto buffer = reinterpret_cast<const uint8_t*>(&port); +- +- std::copy_n(buffer, sizeof(port), std::back_inserter(outPayload)); +- break; +- } +- case Parameter::CHANNEL: +- { +- outPayload.push_back(sol::Manager::get().channel); +- break; +- } +- case Parameter::NVBITRATE: +- case Parameter::VBITRATE: +- default: +- response->completionCode = ipmiCCParamNotSupported; +- } +- +- return outPayload; +-} +- + } // namespace command + + } // namespace sol +diff --git a/command/sol_cmds.hpp b/command/sol_cmds.hpp +index 3e05e0fc035f..9aedfddf0d39 100644 +--- a/command/sol_cmds.hpp ++++ b/command/sol_cmds.hpp +@@ -62,174 +62,6 @@ struct ActivatingRequest + */ + void activating(uint8_t payloadInstance, uint32_t sessionID); + +-/** @enum Parameter +- * +- * SOL parameters are volatile, they are initialized by the SOL manager. +- * They can be read using Get SOL configuration parameters command and updated +- * using Set SOL configuration parameters command. +- */ +-enum class Parameter +-{ +- PROGRESS, //!< Set In Progress. +- ENABLE, //!< SOL Enable. +- AUTHENTICATION, //!< SOL Authentication. +- ACCUMULATE, //!< Character Accumulate Interval & Send Threshold. +- RETRY, //!< SOL Retry. +- NVBITRATE, //!< SOL non-volatile bit rate. +- VBITRATE, //!< SOL volatile bit rate. +- CHANNEL, //!< SOL payload channel. +- PORT, //!< SOL payload port. +-}; +- +-constexpr uint8_t progressMask = 0x03; +-constexpr uint8_t enableMask = 0x01; +- +-/** @struct Auth +- * +- * SOL authentication parameter. +- */ +-struct Auth +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t privilege : 4; //!< SOL privilege level. +- uint8_t reserved : 2; //!< Reserved. +- uint8_t auth : 1; //!< Force SOL payload Authentication. +- uint8_t encrypt : 1; //!< Force SOL payload encryption. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t encrypt : 1; //!< Force SOL payload encryption. +- uint8_t auth : 1; //!< Force SOL payload Authentication. +- uint8_t reserved : 2; //!< Reserved. +- uint8_t privilege : 4; //!< SOL privilege level. +-#endif +-} __attribute__((packed)); +- +-/** @struct Accumulate +- * +- * Character accumulate interval & Character send threshold. +- */ +-struct Accumulate +-{ +- uint8_t interval; //!< Character accumulate interval. +- uint8_t threshold; //!< Character send threshold. +-} __attribute__((packed)); +- +-constexpr uint8_t retryCountMask = 0x07; +- +-/** @struct Retry +- * +- * SOL retry count and interval. +- */ +-struct Retry +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t count : 3; //!< SOL retry count. +- uint8_t reserved : 5; //!< Reserved. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t reserved : 5; //!< Reserved. +- uint8_t count : 3; //!< SOL retry count. +-#endif +- +- uint8_t interval; //!< SOL retry interval. +-} __attribute__((packed)); +- +-constexpr uint8_t ipmiCCParamNotSupported = 0x80; +-constexpr uint8_t ipmiCCInvalidSetInProgress = 0x81; +-constexpr uint8_t ipmiCCWriteReadParameter = 0x82; +-constexpr uint8_t ipmiCCReadWriteParameter = 0x83; +-constexpr uint8_t parameterRevision = 0x11; +- +-/** @struct SetConfParamsRequest +- * +- * IPMI payload for Set SOL configuration parameters command request. +- */ +-struct SetConfParamsRequest +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t channelNumber : 4; //!< Channel number. +- uint8_t reserved : 4; //!< Reserved. +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t reserved : 4; //!< Reserved. +- uint8_t channelNumber : 4; //!< Channel number. +-#endif +- +- uint8_t paramSelector; //!< Parameter selector. +- union +- { +- uint8_t value; //!< Represents one byte SOL parameters. +- struct Accumulate acc; //!< Character accumulate values. +- struct Retry retry; //!< Retry values. +- struct Auth auth; //!< Authentication parameters. +- }; +-} __attribute__((packed)); +- +-/** @struct SetConfParamsResponse +- * +- * IPMI payload for Set SOL configuration parameters command response. +- */ +-struct SetConfParamsResponse +-{ +- uint8_t completionCode; //!< Completion code. +-} __attribute__((packed)); +- +-/** @brief Set SOL configuration parameters command. +- * +- * @param[in] inPayload - Request data for the command. +- * @param[in] handler - Reference to the message handler. +- * +- * @return Response data for the command. +- */ +-std::vector<uint8_t> setConfParams(const std::vector<uint8_t>& inPayload, +- std::shared_ptr<message::Handler>& handler); +- +-/** @struct GetConfParamsRequest +- * +- * IPMI payload for Get SOL configuration parameters command request. +- */ +-struct GetConfParamsRequest +-{ +-#if BYTE_ORDER == LITTLE_ENDIAN +- uint8_t channelNum : 4; //!< Channel number. +- uint8_t reserved : 3; //!< Reserved. +- uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision +-#endif +- +-#if BYTE_ORDER == BIG_ENDIAN +- uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision +- uint8_t reserved : 3; //!< Reserved. +- uint8_t channelNum : 4; //!< Channel number. +-#endif +- +- uint8_t paramSelector; //!< Parameter selector. +- uint8_t setSelector; //!< Set selector. +- uint8_t blockSelector; //!< Block selector. +-} __attribute__((packed)); +- +-/** @struct GetConfParamsResponse +- * +- * IPMI payload for Get SOL configuration parameters command response. +- */ +-struct GetConfParamsResponse +-{ +- uint8_t completionCode; //!< Completion code. +- uint8_t paramRev; //!< Parameter revision. +-} __attribute__((packed)); +- +-/** @brief Get SOL configuration parameters command. +- * +- * @param[in] inPayload - Request data for the command. +- * @param[in] handler - Reference to the message handler. +- * +- * @return Response data for the command. +- */ +-std::vector<uint8_t> getConfParams(const std::vector<uint8_t>& inPayload, +- std::shared_ptr<message::Handler>& handler); +- + } // namespace command + + } // namespace sol +diff --git a/sol_module.cpp b/sol_module.cpp +index d9a9a7c9551f..21196d8a2cbf 100644 +--- a/sol_module.cpp ++++ b/sol_module.cpp +@@ -41,12 +41,6 @@ void registerCommands() + &getPayloadInfo, + session::Privilege::USER, + false}, +- // Get SOL Configuration Parameters +- {{(static_cast<uint32_t>(message::PayloadType::IPMI) << 16) | +- static_cast<uint16_t>(::command::NetFns::TRANSPORT) | 0x22}, +- &getConfParams, +- session::Privilege::USER, +- false}, + }; + + for (const auto& iter : commands) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0012-rakp12-Add-username-to-SessionInfo-interface.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0012-rakp12-Add-username-to-SessionInfo-interface.patch new file mode 100644 index 000000000..89a111d06 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0012-rakp12-Add-username-to-SessionInfo-interface.patch @@ -0,0 +1,49 @@ +From 20bf13de482b02a4a467f44070f7ff184c340dd2 Mon Sep 17 00:00:00 2001 +From: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +Date: Tue, 1 Jun 2021 12:22:19 +0000 +Subject: [PATCH] rakp12: Add username to SessionInfo interface + +Add username to SessionInfo interface to get username info on individual +IPMI session Id's on Redfish + +Tested: +1. Activate SOL session +Command: ipmitool -I lanplus -U root -P 0penBmc -H <BMC_IP> -C 17 + sol activate +Response: // Success +2. Verified on SessionInfo D-bus interface. +busctl introspect xyz.openbmc_project.Ipmi.Channel.eth0 + /xyz/openbmc_project/ipmi/session/eth0/<session_id> +NAME TYPE SIGNATURE RESULT/VALUE FLAGS +...... +xyz.openbmc_project.Ipmi.SessionInfo interface - - - +.ChannelNum property y 3 emits-change writable +.CurrentPrivilege property y 4 emits-change writable +.RemoteIPAddr property u 22253066 emits-change writable +.RemoteMACAddress property ay 0 emits-change writable +.RemotePort property q 41096 emits-change writable +.SessionHandle property y 129 emits-change writable +.State property y 2 emits-change writable +.UserID property y 1 emits-change writable +.Username property s "root" emits-change writable + +Signed-off-by: Jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + command/rakp12.cpp | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/command/rakp12.cpp b/command/rakp12.cpp +index 099c5dc..98b6891 100644 +--- a/command/rakp12.cpp ++++ b/command/rakp12.cpp +@@ -227,6 +227,7 @@ std::vector<uint8_t> RAKP12(const std::vector<uint8_t>& inPayload, + } + session->channelNum(chNum); + session->userID(userId); ++ session->username(userName); + // minimum privilege of Channel / User / session::privilege::USER + // has to be used as session current privilege level + uint8_t minPriv = 0; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/10-nice-rules.conf b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/10-nice-rules.conf new file mode 100644 index 000000000..d2fb5ba04 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/10-nice-rules.conf @@ -0,0 +1,2 @@ +[Service] +Nice=-18 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend new file mode 100644 index 000000000..a0b507cb8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend @@ -0,0 +1,31 @@ +inherit useradd + +# TODO: This should be removed, once up-stream bump up +# issue is resolved +SRC_URI += "git://github.com/openbmc/phosphor-net-ipmid" +SRCREV = "5819666c23ee1d01a54fc5fb2c068bb1da1f29c7" + +USERADD_PACKAGES = "${PN}" +# add a group called ipmi +GROUPADD_PARAM:${PN} = "ipmi " + +# Default rmcpp iface is eth0; channel 1 +# Add channel 2 instance (eth1) +RMCPP_EXTRA = "eth1" +SYSTEMD_SERVICE:${PN} += " \ + ${PN}@${RMCPP_EXTRA}.service \ + ${PN}@${RMCPP_EXTRA}.socket \ + " + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " file://10-nice-rules.conf \ + file://0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch \ + file://0011-Remove-Get-SOL-Config-Command-from-Netipmid.patch \ + file://0012-rakp12-Add-username-to-SessionInfo-interface.patch \ + " + +do_install:append() { + mkdir -p ${D}${sysconfdir}/systemd/system/phosphor-ipmi-net@.service.d/ + install -m 0644 ${WORKDIR}/10-nice-rules.conf ${D}${sysconfdir}/systemd/system/phosphor-ipmi-net@.service.d/ +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%.bbappend new file mode 100644 index 000000000..4fc41d058 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%.bbappend @@ -0,0 +1 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%/config.yaml b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%/config.yaml new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-sensor-inventory%/config.yaml diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb new file mode 100644 index 000000000..14093cf3e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb @@ -0,0 +1,19 @@ +SUMMARY = "Node Manager Proxy" +DESCRIPTION = "The Node Manager Proxy provides a simple interface for communicating \ +with Management Engine via IPMB" + +SRC_URI = "git://github.com/Intel-BMC/node-manager;protocol=ssh" +SRCREV = "9aca80fa2a405938de99aae777e6cfcf08525563" +PV = "0.1+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SYSTEMD_SERVICE:${PN} = "node-manager-proxy.service" + +DEPENDS = "sdbusplus \ + phosphor-logging \ + boost" + +S = "${WORKDIR}/git" +inherit cmake systemd diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.service b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.service new file mode 100644 index 000000000..51e59c614 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.service @@ -0,0 +1,11 @@ +[Unit] +Description=turn off the ID LED when BMC is ready +Wants=multi-user.target +After=multi-user.target + +[Service] +Type=oneshot +ExecStart=/usr/bin/id-led-off.sh + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.sh b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.sh new file mode 100755 index 000000000..b609fc0ea --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off/id-led-off.sh @@ -0,0 +1,12 @@ +#!/bin/sh +busctl set-property "xyz.openbmc_project.LED.GroupManager" \ +"/xyz/openbmc_project/led/groups/enclosure_identify" \ +"xyz.openbmc_project.Led.Group" "Asserted" b false + +busctl set-property "xyz.openbmc_project.LED.GroupManager" \ +"/xyz/openbmc_project/led/groups/enclosure_identify_blink" \ +"xyz.openbmc_project.Led.Group" "Asserted" b false + +busctl set-property "xyz.openbmc_project.LED.Controller.identify" \ +"/xyz/openbmc_project/led/physical/identify" \ +"xyz.openbmc_project.Led.Physical" "State" s "xyz.openbmc_project.Led.Physical.Action.Off" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off_git.bb new file mode 100644 index 000000000..21557d96b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/id-led-off_git.bb @@ -0,0 +1,24 @@ +SUMMARY = "Turn off the ID LED" +DESCRIPTION = "Script to turn off the ID LED after BMC is ready" + +S = "${WORKDIR}" +SRC_URI = "file://id-led-off.sh \ + file://id-led-off.service \ + " + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +RDEPENDS:${PN} += "bash" + +inherit systemd + +FILES:${PN} += "${systemd_system_unitdir}/id-led-off.service" + +do_install() { + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/id-led-off.service ${D}${systemd_system_unitdir} + install -d ${D}${bindir} + install -m 0755 ${S}/id-led-off.sh ${D}/${bindir}/id-led-off.sh +} + +SYSTEMD_SERVICE:${PN} += " id-led-off.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config-native.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config-native.bb new file mode 100644 index 000000000..47c66ccb8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config-native.bb @@ -0,0 +1,21 @@ +SUMMARY = "Phosphor LED Group Management for Intel" +PR = "r1" + +inherit obmc-phosphor-utils +inherit native + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +PROVIDES += "virtual/phosphor-led-manager-config-native" + +SRC_URI += "file://led.yaml" +S = "${WORKDIR}" + +# Overwrite the example led layout yaml file prior +# to building the phosphor-led-manager package +do_install() { + SRC=${S} + DEST=${D}${datadir}/phosphor-led-manager + install -D ${SRC}/led.yaml ${DEST}/led.yaml +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config/led.yaml b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config/led.yaml new file mode 100644 index 000000000..1605b8e6b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/intel-led-manager-config/led.yaml @@ -0,0 +1,80 @@ +bmc_booted: + +power_on: + +status_ok: + status_green: + Action: 'On' + status_amber: + Action: 'Off' + +status_degraded: + status_green: + Action: 'Blink' + DutyOn: 50 + Period: 1000 + status_amber: + Action: 'Off' + +status_non_critical: + status_green: + Action: 'Off' + status_amber: + Action: 'Blink' + DutyOn: 50 + Period: 1000 + +status_critical: + status_green: + Action: 'Off' + status_amber: + Action: 'On' + +enclosure_identify: + identify: + Action: 'On' + +enclosure_identify_blink: + identify: + Action: 'Blink' + +cpu0_fault: + cpu0fault: + Action: 'On' + +cpu1_fault: + cpu1fault: + Action: 'On' + +fan1_fault: + fan1_fault: + Action: 'On' + +fan2_fault: + fan2_fault: + Action: 'On' + +fan3_fault: + fan3_fault: + Action: 'On' + +fan4_fault: + fan4_fault: + Action: 'On' + +fan5_fault: + fan5_fault: + Action: 'On' + +fan6_fault: + fan6_fault: + Action: 'On' + +fan7_fault: + fan7_fault: + Action: 'On' + +fan8_fault: + fan8_fault: + Action: 'On' + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/leds/phosphor-led-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/phosphor-led-manager_%.bbappend new file mode 100644 index 000000000..132fe2337 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/leds/phosphor-led-manager_%.bbappend @@ -0,0 +1,13 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +RDEPENDS:${PN}:remove = "clear-once" + +do_compile:prepend(){ + install -m 0644 ${STAGING_DATADIR_NATIVE}/${PN}/led.yaml ${S} +} + +do_install:append(){ + rm -f ${S}/led.yaml +} + + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl.bb new file mode 100644 index 000000000..2468a487d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl.bb @@ -0,0 +1,27 @@ +SUMMARY = "Multi-node Non-legacy" +DESCRIPTION = "New systemd target for non-legacy nodes on multi-node platform" + +inherit systemd + +SYSTEMD_SERVICE:${PN} = "multi-node-nl.target" +SYSTEMD_SERVICE:${PN} += "nonLegacyNode.service" + +S = "${WORKDIR}" +SRC_URI = "file://multi-node-nl.target \ + file://nonLegacyNode.service \ + file://nonLegacyNode.sh \ + " + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +RDEPENDS:${PN} = "bash" + +do_install:append() { + install -d ${D}${bindir} + install -m 0755 ${S}/nonLegacyNode.sh ${D}/${bindir}/nonLegacyNode.sh + + install -d ${D}${base_libdir}/systemd/system + install -m 0644 ${S}/multi-node-nl.target ${D}${base_libdir}/systemd/system + install -m 0644 ${S}/nonLegacyNode.service ${D}${base_libdir}/systemd/system +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/multi-node-nl.target b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/multi-node-nl.target new file mode 100644 index 000000000..32b50532f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/multi-node-nl.target @@ -0,0 +1,4 @@ +[Unit] +Description=Target for non-legacy node in multi-node system +Documentation=man:systemd.special(7) + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.service b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.service new file mode 100644 index 000000000..8e3d07ba4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.service @@ -0,0 +1,9 @@ +[Unit] +Description=Non Legacy node + +[Service] +ExecStart=/usr/bin/nonLegacyNode.sh +Type=exec + +[Install] +WantedBy=multi-node-nl.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.sh b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.sh new file mode 100755 index 000000000..28a6bbe2a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-nl/multi-node-nl/nonLegacyNode.sh @@ -0,0 +1,23 @@ +#!/bin/bash + +PWM_FILE="/sys/class/hwmon/hwmon0/pwm" +FAN_SPEED=$((255 * 80 / 100)) + +set_fan_speed() { + local idx=0 + for ((idx=1; idx<=8; idx++)) + do + if [ -f $PWM_FILE$idx ]; then + echo $FAN_SPEED > $PWM_FILE$idx + fi + done +} + +$(set_fan_speed) + +#Stop power control service in NL mode +systemctl stop xyz.openbmc_project.Chassis.Control.Power.service + +export TERM=xterm +# Autologin root user to serial console (ttyS4) on boot +exec /sbin/agetty -a root -J -8 -L ttyS4 115200 $TERM diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/network/phosphor-snmp_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/network/phosphor-snmp_%.bbappend new file mode 100644 index 000000000..6d9294635 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/network/phosphor-snmp_%.bbappend @@ -0,0 +1,4 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +# SRC_URI = "git://github.com/openbmc/phosphor-snmp" +SRCREV = "d560529eb7e22c0b78fb0def20f57c6f35be9dfe" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/peci/peci-pcie_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/peci/peci-pcie_%.bbappend new file mode 100644 index 000000000..e7c5d1af3 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/peci/peci-pcie_%.bbappend @@ -0,0 +1,5 @@ +SRC_URI = "git://github.com/openbmc/peci-pcie" + +SRCREV = "de624395a587be555463a14a3db90500b4e0521c" + +EXTRA_OECMAKE += "-DWAIT_FOR_OS_STANDBY=1 -DUSE_RDENDPOINTCFG=1" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/phosphor-u-boot-mgr/phosphor-u-boot-mgr_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/phosphor-u-boot-mgr/phosphor-u-boot-mgr_git.bb new file mode 100644 index 000000000..5a6191fcd --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/phosphor-u-boot-mgr/phosphor-u-boot-mgr_git.bb @@ -0,0 +1,18 @@ +SUMMARY = "Phosphor U-Boot environment manager" +DESCRIPTION = "Daemon to read or write U-Boot environment variables" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=86d3f3a95c324c9479bd8986968f4327" + +SRC_URI = "git://github.com/openbmc/phosphor-u-boot-env-mgr.git;protocol=ssh" + +SRCREV = "1979d3b31a96e9359402ac4d7867ec5dddbece7e" + +inherit cmake systemd +SYSTEMD_SERVICE:${PN} = "xyz.openbmc_project.U_Boot.Environment.Manager.service" + +DEPENDS = "boost sdbusplus phosphor-logging" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libmctp-intel_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libmctp-intel_git.bb new file mode 100644 index 000000000..592d6ae0c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libmctp-intel_git.bb @@ -0,0 +1,16 @@ +SUMMARY = "libmctp:intel" +DESCRIPTION = "Implementation of MCTP(DMTF DSP0236)" + +SRC_URI = "git://github.com/Intel-BMC/libmctp.git;protocol=ssh" +SRCREV = "d530c2271e1f9ff5d76a170c0abd64bd03ef40fd" + +S = "${WORKDIR}/git" + +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0 | GPLv2" +LIC_FILES_CHKSUM = "file://LICENSE;md5=0d30807bb7a4f16d36e96b78f9ed8fae" + +inherit cmake + +DEPENDS += "i2c-tools" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libpldm-intel_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libpldm-intel_git.bb new file mode 100644 index 000000000..162b4ed74 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/libpldm-intel_git.bb @@ -0,0 +1,18 @@ +SUMMARY = "libpldm_intel" +DESCRIPTION = "Provides encode/decode APIs for PLDM specifications" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/libpldm_intel" + +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=86d3f3a95c324c9479bd8986968f4327" + +inherit cmake + +DEPENDS += " \ + gtest \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-emulator.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-emulator.bb new file mode 100644 index 000000000..fda4d6b79 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-emulator.bb @@ -0,0 +1,30 @@ +SUMMARY = "MCTP Daemon" +DESCRIPTION = "Implementation of MCTP (DTMF DSP0236)" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=bcd9ada3a943f58551867d72893cc9ab" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/mctp_emulator" + +PV = "1.0+git${SRCPV}" + +inherit cmake systemd + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += " \ + libmctp-intel \ + systemd \ + sdbusplus \ + phosphor-logging \ + boost \ + i2c-tools \ + cli11 \ + nlohmann-json \ + gtest \ + " + +SYSTEMD_SERVICE:${PN} = "xyz.openbmc_project.mctp-emulator.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-wrapper.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-wrapper.bb new file mode 100644 index 000000000..05e64ed46 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctp-wrapper.bb @@ -0,0 +1,28 @@ +SUMMARY = "MCTP Wrapper Library" +DESCRIPTION = "Implementation of MCTP Wrapper Library" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=bcd9ada3a943f58551867d72893cc9ab" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/mctp_wrapper" + +PV = "1.0+git${SRCPV}" + +inherit cmake systemd + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += " \ + libmctp-intel \ + systemd \ + sdbusplus \ + phosphor-logging \ + gtest \ + boost \ + phosphor-dbus-interfaces \ + " + +EXTRA_OECMAKE += "-DYOCTO_DEPENDENCIES=ON" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpd.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpd.bb new file mode 100644 index 000000000..8b088be23 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpd.bb @@ -0,0 +1,34 @@ +SUMMARY = "MCTP Daemon" +DESCRIPTION = "Implementation of MCTP (DTMF DSP0236)" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${PN}/LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git" + +PV = "1.0+git${SRCPV}" + +OECMAKE_SOURCEPATH = "${S}/${PN}" + +inherit cmake systemd + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += " \ + libmctp-intel \ + systemd \ + sdbusplus \ + phosphor-logging \ + boost \ + i2c-tools \ + cli11 \ + nlohmann-json \ + gtest \ + phosphor-dbus-interfaces \ + udev \ + " +FILES:${PN} += "${systemd_system_unitdir}/xyz.openbmc_project.mctpd@.service" +FILES:${PN} += "/usr/share/mctp/mctp_config.json" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpwplus.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpwplus.bb new file mode 100644 index 000000000..b1c40ab61 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/mctpwplus.bb @@ -0,0 +1,24 @@ +SUMMARY = "MCTP Wrapper Library Plus" +DESCRIPTION = "Implementation of MCTP Wrapper Library Plus" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=615045c30a05cde5c0e924854d43c327" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/mctpwplus" + +PV = "1.0+git${SRCPV}" + +inherit cmake + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += " \ + systemd \ + sdbusplus \ + phosphor-logging \ + cli11 \ + " +EXTRA_OECMAKE += "-DYOCTO_DEPENDENCIES=ON" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/nvmemi-daemon.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/nvmemi-daemon.bb new file mode 100644 index 000000000..84c2c8066 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/nvmemi-daemon.bb @@ -0,0 +1,17 @@ +SUMMARY = "NVMe MI Daemon" +DESCRIPTION = "Implementation of NVMe MI daemon" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=86d3f3a95c324c9479bd8986968f4327" + +SRC_URI = "git://github.com/Intel-BMC/nvme-mi.git;protocol=ssh" +SRCREV = "c3d5021fb60cd46d5c948c69f3d57ac9648b5be5" +S = "${WORKDIR}/git" +PV = "1.0+git${SRCPV}" + +inherit meson systemd + +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.nvme-mi.service" +DEPENDS = "boost sdbusplus systemd phosphor-logging mctpwplus googletest nlohmann-json" + +EXTRA_OEMESON = "-Dyocto_dep='enabled'" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pldmd.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pldmd.bb new file mode 100644 index 000000000..16253b5d0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pldmd.bb @@ -0,0 +1,31 @@ +SUMMARY = "PLDM Requester Stack" +DESCRIPTION = "Implementation of PLDM specifications" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=86d3f3a95c324c9479bd8986968f4327" + +SRC_URI += "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/pldmd" + +PV = "1.0+git${SRCPV}" + +inherit cmake systemd + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += " \ + libpldm-intel \ + mctp-wrapper \ + systemd \ + sdbusplus \ + phosphor-logging \ + gtest \ + boost \ + phosphor-dbus-interfaces \ + mctpwplus \ + " + +FILES:${PN} += "${systemd_system_unitdir}/xyz.openbmc_project.pldmd.service" +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.pldmd.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pmci-launcher.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pmci-launcher.bb new file mode 100644 index 000000000..c640c5664 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/pmci/pmci-launcher.bb @@ -0,0 +1,23 @@ +SUMMARY = "PMCI Launcher" +DESCRIPTION = "Support to launch pmci services on-demand" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/pmci.git;protocol=ssh" +SRCREV = "94437a678a1d23b22dc179b5cb7b165e52a429c0" + +S = "${WORKDIR}/git/pmci_launcher" + +PV = "1.0+git${SRCPV}" + +inherit cmake systemd + +DEPENDS += " \ + systemd \ + sdbusplus \ + phosphor-logging \ + boost \ + " +FILES:${PN} += "${systemd_system_unitdir}/xyz.openbmc_project.pmci-launcher.service" +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.pmci-launcher.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts.bbappend new file mode 100644 index 000000000..76b60aa8e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI = "file://init" + +RDEPENDS:${PN} += "bash" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init new file mode 100755 index 000000000..2065f94ee --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/preinit-mounts/preinit-mounts/init @@ -0,0 +1,268 @@ +#!/bin/bash + +# Copyright 2017-2019 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# +# provide a couple of places in the RO root filesystem +# that can be made RW with an overlayfs + +log() { + [ -c /dev/kmsg ] && echo "init: $*" > /dev/kmsg + echo "init: $*" +} + +# start with /proc and /tmp mounted +[ -e /proc/mounts ] || mount -t proc proc /proc +# FIXME: add size limits to /tmp +grep -q /tmp /proc/mounts || mount -t tmpfs -o rw,nosuid,nodev tmp /tmp +grep -q /sys /proc/mounts || mount -t sysfs -o rw,nosuid,nodev,noexec sys /sys + +# fix up /srv to be RW +mkdir -p /tmp/srv +mount --bind /tmp/srv /srv + +if grep -q debug-init /proc/cmdline; then + exec > /tmp/init.log 2>&1 + set -x + env +else + # Suppress any stray output but we want to see any errors + exec >/dev/null 2>/dev/kmsg +fi + +# list of things that need to be rw at boot +NV_OVERLAYS="/etc /var /home" + +# place to mount the overlay backing store +OVERLAY_MNT=/tmp/.overlay +# OVERLAY_SIZE=16384 +# place to mount NV +RWFS_MNT=/tmp/.rwfs +# NV overlay storage +OVERLAY_SYNC=${RWFS_MNT}/.overlay + +if grep -q "$RWFS_MNT" /proc/mounts; then + # quit - we have already run + exit 0 +fi +mkdir -p "$OVERLAY_MNT" +# TODO: remount the overlay with a size limit? +# mount -t tmpfs -o rw,size=${OVERLAY_SIZE} oltmp ${OVERLAY_MNT} + +mtd_by_name() { + local name="$1" + echo "/dev/$(grep "$name" /proc/mtd | cut -d : -f 1)" +} + +mtdnum_by_name() { + local name="$1" + grep "$name" /proc/mtd | cut -c 4 +} + +NV_MTD=rwfs + +nvrw() { + local p="$1" + # Clear the work dir doing overlay mount + rm -rf "${OVERLAY_MNT}${p}.work" + mkdir -p "${OVERLAY_MNT}${p}" "${OVERLAY_MNT}${p}.work" + local mname + mname=$(echo "ol${p}" | sed 's,/,,g') + local opts="lowerdir=${p},upperdir=${OVERLAY_MNT}${p},workdir=${OVERLAY_MNT}${p}.work,sync" + mount -t overlay -o "$opts" "$mname" "$p" +} + +targeted_clean() { + log "restore-defaults: targeted_clean" + # Do not delete FRU info, ssh/ssl certs, or machine-id + ( + cd "${OVERLAY_SYNC}/etc" || exit + find . ! -regex '.*/\(ssl\|dropbear\|machine-id\|fru\).*' -a ! -path '.' \ + -exec rm -rf {} + + ) + # nothing should be in the workdir, but clear it just in case + rm -rf "${OVERLAY_SYNC}/etc.work" + + # clean everything out of /home + rm -rf "${OVERLAY_SYNC}/home" "${OVERLAY_SYNC}/home.work" + + # clean everything out of /var + rm -rf "${OVERLAY_SYNC}/var" "${OVERLAY_SYNC}/var.work" + + echo "Files remaining: $(find $OVERLAY_SYNC/)" + sync +} + +full_clean() { + log "restore-defaults: full_clean" + local OVL='' + for OVL in $NV_OVERLAYS; do + rm -rf "${OVERLAY_SYNC}${OVL}" "${OVERLAY_SYNC}${OVL}.work" + done + sync +} + +jffs2_mount() { + mtd_name=$1 + mnt=$2 + mount -t jffs2 -o sync,ro mtd:"$mtd_name" "$mnt" +} + +reformat_jffs2_partition() { + local mtd_name="$1" + local mnt="$2" + # unmount the partition to reformat it + umount -f "$mnt" + flash_erase "$(mtd_by_name "$mtd_name")" 0 0 + # remount the JFFS2 + if ! jffs2_mount "$mtd_name" "$mnt"; then + log "Failed to mount reformatted NV volume; system unstable" + fi +} + +clear_ubenv() { + log "Clearing U-Boot environment" + flash_erase "$(mtd_by_name u-boot-env)" 0 0 +} + +# mount NV filesystem +mkdir -p "$RWFS_MNT" +if ! jffs2_mount "$NV_MTD" "$RWFS_MNT"; then + log "Failed to mount NV volume; attempting recovery" + reformat_jffs2_partition $NV_MTD $RWFS_MNT +fi + +# check for full factory reset: if so, format $NV_MTD_DEV +RESTORE_FLAG=$RWFS_MNT/.restore_op +if [ -f "$RESTORE_FLAG" ]; then + mount -o remount,rw "$RWFS_MNT" + restore_op=$(cat $RESTORE_FLAG) # read from NV + modified_on=$(stat -c %y $RESTORE_FLAG) # get last modified time + log "restore_op: $restore_op modified on: $modified_on" + # To rule out stale file mounted, Write unique, unused value 0x10 + # (last 2-bits are b00) before removing the file. + echo 16 > $RESTORE_FLAG + # set default value 0 if RESTORE_FLAG file was empty + restore_op=${restore_op:-0} + restore_op=$((restore_op & 3)) # mask off 2 bits + if [ $restore_op -eq 1 ]; then + targeted_clean + elif [ $restore_op -eq 2 ]; then + full_clean + clear_ubenv + elif [ $restore_op -eq 3 ]; then + log "restore-defaults: reformat" + reformat_jffs2_partition $NV_MTD $RWFS_MNT + clear_ubenv + fi + rm -f $RESTORE_FLAG + mount -o remount,ro "$RWFS_MNT" +fi + +# Restore the overlay saved in the sync +rsync -a --delete "${OVERLAY_SYNC}/" "${OVERLAY_MNT}" +log "Restored overlay from sync location" + +for FS in $NV_OVERLAYS; do + nvrw "$FS" +done + +# work around bug where /etc/machine-id will be mounted with a temporary file +# if rootfs is read-only and the file is empty +MACHINE_ID=/etc/machine-id +generate_machine_id() { + systemd-machine-id-setup + cp -pf "$MACHINE_ID" "${MACHINE_ID}_bkup" +} + +if [ ! -s "$MACHINE_ID" ]; then + # work around - Bug: Overlay fs fails for machine-id due to + # origin mismatch. Clean it up, from overlay fs before re-creating + # the same. + if [ -e "$OVERLAY_MNT$MACHINE_ID" ]; then + umount "/etc" + rm -f "$OVERLAY_MNT$MACHINE_ID" + nvrw "/etc" + # Restore the machine-id from backup, else generate it. + if [ -s "${MACHINE_ID}_bkup" ]; then + cp -pf "${MACHINE_ID}_bkup" "${MACHINE_ID}" + else + generate_machine_id + fi + log "Remounted /etc for machine-id origin mismatch" + else + generate_machine_id + fi +fi + +# mount persistent NV filesystem, where immortal settings live +SOFS_MNT=/var/sofs +if ! grep -q sofs /proc/mounts; then + mkdir -p $SOFS_MNT + SOFS_MTD=sofs + + # mount a JFFS2 on the partition + if ! jffs2_mount "$SOFS_MTD" "$SOFS_MNT"; then + log "Failed to mount SOFS volume; attempting recovery" + reformat_jffs2_partition $SOFS_MTD $SOFS_MNT + fi +fi + +log "Finished mounting nv and overlays" + + +# Detect the non-legacy node in cooper city and boot in to special mode. + +readonly COOPER_CITY=40 # Board id of cooper city + +is_nl_node() { + typeset -i nid1=$(gpioget $(gpiofind "FM_NODE_ID_1")) + typeset -i nid2=$(gpioget $(gpiofind "FM_NODE_ID_2")) + echo $((nid1|nid2)) +} + +read_board_id() { + local idx=0 + local result=0 + local value=0 + for ((idx=0; idx<6; idx++)) + do + typeset -i value=$(gpioget $(gpiofind "FM_BMC_BOARD_SKU_ID${idx}_N")) + value=$((value << idx)) + result=$((result | value)) + done + echo $result +} + +pfr_write() { + [ $# -ne 2 ] && return 1 + local PFR_BUS=4 + local PFR_ADDR=0x38 + local reg=$1 + local val=$2 + i2cset -y $PFR_BUS $PFR_ADDR "$reg" "$val" >&/dev/null +} + +board_id=$(read_board_id) +if [ "$board_id" -eq $COOPER_CITY ]; then + if [ "$(is_nl_node)" -ne 0 ]; then + systemctl set-default multi-node-nl.target + PFR_BMC_CHECKPOINT_REG=0xf + PFR_BMC_CHECKPOINT_COMPLETE=0x9 + pfr_write $PFR_BMC_CHECKPOINT_REG $PFR_BMC_CHECKPOINT_COMPLETE + fi +fi + +exec /lib/systemd/systemd diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/prov-mode-mgr/prov-mode-mgr_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/prov-mode-mgr/prov-mode-mgr_git.bb new file mode 100644 index 000000000..79971942a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/prov-mode-mgr/prov-mode-mgr_git.bb @@ -0,0 +1,18 @@ +SUMMARY = "Provision mode daemon - RestrictionMode" +DESCRIPTION = "Daemon allows to configure RestrictionMode property" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/provisioning-mode-manager.git;protocol=ssh" + +SRCREV = "0aca01b4ce9b303e12ba0f757f56390da139c8bb" + +inherit cmake systemd +SYSTEMD_SERVICE:${PN} = "xyz.openbmc_project.RestrictionMode.Manager.service" + +DEPENDS = "boost sdbusplus phosphor-logging" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/security-manager/security-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/security-manager/security-manager_git.bb new file mode 100644 index 000000000..783dea029 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/security-manager/security-manager_git.bb @@ -0,0 +1,23 @@ +SUMMARY = "Security Manager daemon to detect the security violation- ASD/ user management" +DESCRIPTION = "Daemon check for Remote debug enable and user account violation" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git/security-manager" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" +inherit cmake systemd + +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" +SRCREV = "bee56d62b209088454d166d1efae4825a2b175df" + +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.SecurityManager.service" + +DEPENDS += " \ + systemd \ + sdbusplus \ + libgpiod \ + phosphor-logging \ + boost \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend new file mode 100644 index 000000000..8c2eeb83f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend @@ -0,0 +1,4 @@ +# Enable downstream autobump +SRC_URI = "git://github.com/openbmc/phosphor-sel-logger.git" +SRCREV = "87e3fcf439f2b943272365e1d294984f39bb52b8" + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test/xyz.openbmc_project.selftest.service b/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test/xyz.openbmc_project.selftest.service new file mode 100644 index 000000000..b8c3554ae --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/selftest/intel-self-test/xyz.openbmc_project.selftest.service @@ -0,0 +1,10 @@ +[Unit] +Description= BMC Self-Test + +[Service] +Restart=always +ExecStart=/usr/bin/env selftest +SyslogIdentifier=selftest + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0001-Add-check-for-min-max-received-from-hwmon-files.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0001-Add-check-for-min-max-received-from-hwmon-files.patch new file mode 100644 index 000000000..33d35ec5e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0001-Add-check-for-min-max-received-from-hwmon-files.patch @@ -0,0 +1,108 @@ +From 2516d67f8bb5ecd241b8dcdec3f8c58d0e3c4744 Mon Sep 17 00:00:00 2001 +From: Wojciech Dembinski <wojciech.dembinski@intel.com> +Date: Mon, 7 Dec 2020 19:23:10 +0100 +Subject: [PATCH] Add check for min/max received from hwmon files + +When hwmon reports incorrect min/max values or CPU Sensor cannot access +readings, it shall keep the last known good readings and not update +DBus with incorrect values. +This patch adds min < max verification check for the values received +from hwmon and removes check for power on/off in the case of a read +failure. + +Tested manually on a physical platform, test cases cover incorrect +max/min values and failing access to hwmon files. +SDR over IPMI can be fully received in the case of error. + +Signed-off-by: Wojciech Dembinski <wojciech.dembinski@intel.com> +Change-Id: Ia061f849b0f434812f822ed1902c8964d4c64b45 +--- + src/CPUSensor.cpp | 50 ++++++++++++++++++++++++----------------------- + 1 file changed, 26 insertions(+), 24 deletions(-) + +diff --git a/src/CPUSensor.cpp b/src/CPUSensor.cpp +index 2356821..01f5eb6 100644 +--- a/src/CPUSensor.cpp ++++ b/src/CPUSensor.cpp +@@ -1,5 +1,5 @@ + /* +-// Copyright (c) 2018 Intel Corporation ++// Copyright (c) 2018-2021 Intel Corporation + // + // Licensed under the Apache License, Version 2.0 (the "License"); + // you may not use this file except in compliance with the License. +@@ -146,19 +146,22 @@ void CPUSensor::setupRead(void) + + void CPUSensor::updateMinMaxValues(void) + { ++ double newMin = std::numeric_limits<double>::quiet_NaN(); ++ double newMax = std::numeric_limits<double>::quiet_NaN(); ++ + const boost::container::flat_map< + std::string, + std::vector<std::tuple<const char*, std::reference_wrapper<double>, +- const char*>>> +- map = { ++ const char*, std::reference_wrapper<double>>>> ++ map = { ++ { ++ "cap", + { +- "cap", +- { +- std::make_tuple("cap_max", std::ref(maxValue), "MaxValue"), +- std::make_tuple("cap_min", std::ref(minValue), "MinValue"), +- }, ++ std::make_tuple("cap_max", std::ref(maxValue), "MaxValue", std::ref(newMax)), ++ std::make_tuple("cap_min", std::ref(minValue), "MinValue", std::ref(newMin)), + }, +- }; ++ }, ++ }; + + if (auto fileParts = splitFileName(path)) + { +@@ -168,26 +171,25 @@ void CPUSensor::updateMinMaxValues(void) + { + for (const auto& vectorItem : mapIt->second) + { +- auto& [suffix, oldValue, dbusName] = vectorItem; ++ auto& [suffix, oldValue, dbusName, newValue] = vectorItem; + auto attrPath = boost::replace_all_copy(path, fileItem, suffix); +- if (auto newVal = +- readFile(attrPath, CPUSensor::sensorScaleFactor)) ++ ++ if(auto tmp = readFile(attrPath, CPUSensor::sensorScaleFactor)) + { +- updateProperty(sensorInterface, oldValue, *newVal, +- dbusName); ++ newValue.get() = *tmp; + } + else + { +- if (isPowerOn()) +- { +- updateProperty(sensorInterface, oldValue, 0, dbusName); +- } +- else +- { +- updateProperty(sensorInterface, oldValue, +- std::numeric_limits<double>::quiet_NaN(), +- dbusName); +- } ++ newValue.get() = std::numeric_limits<double>::quiet_NaN(); ++ } ++ } ++ ++ if(std::isfinite(newMin) && std::isfinite(newMax) && (newMin < newMax)) ++ { ++ for (const auto& vectorItem : mapIt->second) ++ { ++ auto& [suffix, oldValue, dbusName, newValue] = vectorItem; ++ updateProperty(sensorInterface, oldValue, newValue, dbusName); + } + } + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0002-Fix-PECI-client-creation-flow.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0002-Fix-PECI-client-creation-flow.patch new file mode 100644 index 000000000..cfdc99d66 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0002-Fix-PECI-client-creation-flow.patch @@ -0,0 +1,159 @@ +From 0a1b2a13f6dbc64b5851ac2b1ca99d57afa78d60 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 27 Jan 2021 15:52:16 -0800 +Subject: [PATCH] Fix PECI client creation flow + +This commit fixes the PECI client creation flow to make it retry +the creation when the client is not exposed correctly. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + src/CPUSensorMain.cpp | 66 +++++++++++++++++++++++++++++++++++-------- + 1 file changed, 54 insertions(+), 12 deletions(-) + +diff --git a/src/CPUSensorMain.cpp b/src/CPUSensorMain.cpp +index f304e3f..92c1716 100644 +--- a/src/CPUSensorMain.cpp ++++ b/src/CPUSensorMain.cpp +@@ -82,6 +82,7 @@ struct CPUConfig + }; + + static constexpr const char* peciDev = "/dev/peci-"; ++static constexpr const char* peciDevPath = "/sys/bus/peci/devices/"; + static constexpr const unsigned int rankNumMax = 8; + + namespace fs = std::filesystem; +@@ -167,7 +168,7 @@ bool createSensors(boost::asio::io_service& io, + } + + std::vector<fs::path> hwmonNamePaths; +- if (!findFiles(fs::path(R"(/sys/bus/peci/devices)"), ++ if (!findFiles(fs::path(peciDevPath), + R"(peci-\d+/\d+-.+/peci-.+/hwmon/hwmon\d+/name$)", + hwmonNamePaths, 6)) + { +@@ -403,7 +404,7 @@ bool createSensors(boost::asio::io_service& io, + return true; + } + +-void exportDevice(const CPUConfig& config) ++int exportDevice(const CPUConfig& config) + { + std::ostringstream hex; + hex << std::hex << config.addr; +@@ -411,9 +412,12 @@ void exportDevice(const CPUConfig& config) + std::string busStr = std::to_string(config.bus); + + std::string parameters = "peci-client 0x" + addrHexStr; +- std::string device = "/sys/bus/peci/devices/peci-" + busStr + "/new_device"; ++ std::string devPath = peciDevPath; ++ std::string delDevice = devPath + "peci-" + busStr + "/delete_device"; ++ std::string newDevice = devPath + "peci-" + busStr + "/new_device"; ++ std::string newClient = devPath + busStr + "-" + addrHexStr + "/driver"; + +- std::filesystem::path devicePath(device); ++ std::filesystem::path devicePath(newDevice); + const std::string& dir = devicePath.parent_path().string(); + for (const auto& path : std::filesystem::directory_iterator(dir)) + { +@@ -431,20 +435,38 @@ void exportDevice(const CPUConfig& config) + std::cout << parameters << " on bus " << busStr + << " is already exported\n"; + } +- return; ++ ++ std::ofstream delDeviceFile(delDevice); ++ if (!delDeviceFile.good()) ++ { ++ std::cerr << "Error opening " << delDevice << "\n"; ++ return -1; ++ } ++ delDeviceFile << parameters; ++ delDeviceFile.close(); ++ ++ break; + } + } + +- std::ofstream deviceFile(device); ++ std::ofstream deviceFile(newDevice); + if (!deviceFile.good()) + { +- std::cerr << "Error writing " << device << "\n"; +- return; ++ std::cerr << "Error opening " << newDevice << "\n"; ++ return -1; + } + deviceFile << parameters; + deviceFile.close(); + ++ if (!std::filesystem::exists(newClient)) ++ { ++ std::cerr << "Error creating " << newClient << "\n"; ++ return -1; ++ } ++ + std::cout << parameters << " on bus " << busStr << " is exported\n"; ++ ++ return 0; + } + + void detectCpu(boost::asio::deadline_timer& pingTimer, +@@ -460,6 +482,11 @@ void detectCpu(boost::asio::deadline_timer& pingTimer, + + for (CPUConfig& config : cpuConfigs) + { ++ if (config.state == State::READY) ++ { ++ continue; ++ } ++ + std::string peciDevPath = peciDev + std::to_string(config.bus); + auto file = open(peciDevPath.c_str(), O_RDWR | O_CLOEXEC); + if (file < 0) +@@ -510,16 +537,29 @@ void detectCpu(boost::asio::deadline_timer& pingTimer, + newState = State::OFF; + } + +- close(file); +- + if (config.state != newState) + { + if (newState != State::OFF) + { + if (config.state == State::OFF) + { +- std::cout << config.name << " is detected\n"; +- exportDevice(config); ++ struct peci_rd_pkg_cfg_msg msg; ++ msg.addr = config.addr; ++ msg.index = PECI_MBX_INDEX_CPU_ID; ++ msg.param = 0; ++ msg.rx_len = 4; ++ if (!ioctl(file, PECI_IOC_RD_PKG_CFG, &msg)) ++ { ++ std::cout << config.name << " is detected\n"; ++ if (exportDevice(config)) ++ { ++ newState = State::OFF; ++ } ++ } ++ else ++ { ++ newState = State::OFF; ++ } + } + + if (newState == State::ON) +@@ -542,6 +582,8 @@ void detectCpu(boost::asio::deadline_timer& pingTimer, + keepPinging = true; + } + ++ close(file); ++ + if (debug) + { + std::cout << config.name << ", state: " << config.state << "\n"; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0003-Fix-missing-threshold-de-assert-event-when-threshold.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0003-Fix-missing-threshold-de-assert-event-when-threshold.patch new file mode 100644 index 000000000..1cba1095d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0003-Fix-missing-threshold-de-assert-event-when-threshold.patch @@ -0,0 +1,143 @@ +From db4353de222b51726c8e3c765cc8f1df4ad67687 Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 22 Jun 2021 11:35:12 -0700 +Subject: [PATCH] Fix missing de-assert event when threshold changes + +Issue: +Sensor can be re-constructed when sensor configuration changes +like a new threshold value. Threshold deassert can be missed +if the new threshold value fixes the alarm because the +default state for new threshold interface is de-asserted. + +Resolution: +Add a member variable hadValidSensor that is initialized to false +for new sensor. When hadValidSensor is false, threshold property changed +message will be emitted even if threshold property did not change, +If the previous sensor instance had the threshold raised, +Phosphor-sel-logger would notice the change and log a de-assert event. +If the previous sensor instance did not have the threshold raised, +Phosphor-sel-logger would notice this is not a change and not create +new SEL log. +Set hadValidSensor to true when sensor value is updated with a value +that is not NaN. This is done after threshold property changed message +is emitted. + +Tested: +1. Change threshold value for a voltage sensor to force a SEL. + ipmitool raw 0x04 0x26 0x60 0x1b 0x95 0x6b 0x00 0x99 0xa6 0x00 + +2. Verify SEL logged threshold assert event as expected + ipmitool sel list + 1 | Pre-Init |0000007277| Voltage #0x60 | Upper Non-critical going high | Asserted + +3. Use ipmitool to change threshold value back to normal + ipmitool raw 0x04 0x26 0x60 0x1b 0x95 0x6b 0x00 0xa4 0xa6 0x00 + +4. Verify SEL logged threshold de-assert event as expected + ipmitool sel list + 1 | Pre-Init |0000007277| Voltage #0x60 | Upper Non-critical going high | Asserted + 2 | Pre-Init |0000007304| Voltage #0x60 | Upper Non-critical going high | Deasserted + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + include/Thresholds.hpp | 2 +- + include/sensor.hpp | 2 ++ + src/Thresholds.cpp | 20 ++++++++++++++++---- + 3 files changed, 19 insertions(+), 5 deletions(-) + +diff --git a/include/Thresholds.hpp b/include/Thresholds.hpp +index af63f72..fd507d0 100644 +--- a/include/Thresholds.hpp ++++ b/include/Thresholds.hpp +@@ -44,7 +44,7 @@ struct Threshold + + void assertThresholds(Sensor* sensor, double assertValue, + thresholds::Level level, thresholds::Direction direction, +- bool assert); ++ bool assert, bool force = false); + + struct TimerUsed + { +diff --git a/include/sensor.hpp b/include/sensor.hpp +index b98241b..6235674 100644 +--- a/include/sensor.hpp ++++ b/include/sensor.hpp +@@ -71,6 +71,7 @@ struct Sensor + std::shared_ptr<sdbusplus::asio::dbus_interface> operationalInterface; + double value = std::numeric_limits<double>::quiet_NaN(); + double rawValue = std::numeric_limits<double>::quiet_NaN(); ++ bool hadValidValue = false; + bool overriddenState = false; + bool internalSet = false; + double hysteresisTrigger; +@@ -432,6 +433,7 @@ struct Sensor + { + markFunctional(true); + markAvailable(true); ++ hadValidValue = true; + } + } + +diff --git a/src/Thresholds.cpp b/src/Thresholds.cpp +index 821083a..da0d650 100644 +--- a/src/Thresholds.cpp ++++ b/src/Thresholds.cpp +@@ -418,10 +418,19 @@ bool checkThresholds(Sensor* sensor) + { + bool status = true; + std::vector<ChangeParam> changes = checkThresholds(sensor, sensor->value); ++ ++ // Sensor can be reconstructed when sensor configuration changes ++ // like a new threshold value. Threshold deassert can be missed ++ // if the new threshold value fixes the alarm because ++ // default state for new threshold interface is de-asserted. ++ // force sending assert/de-assert message when a not NaN value is updated ++ // for the first time even when threshold property did not change. ++ bool forceAssert = !sensor->hadValidValue; + for (const auto& change : changes) + { + assertThresholds(sensor, change.assertValue, change.threshold.level, +- change.threshold.direction, change.asserted); ++ change.threshold.direction, change.asserted, ++ forceAssert); + if (change.threshold.level == thresholds::Level::CRITICAL && + change.asserted) + { +@@ -443,6 +452,7 @@ void checkThresholdsPowerDelay(const std::weak_ptr<Sensor>& weakSensor, + + Sensor* sensor = sensorPtr.get(); + std::vector<ChangeParam> changes = checkThresholds(sensor, sensor->value); ++ bool forceAssert = !sensor->hadValidValue; + for (const auto& change : changes) + { + // When CPU is powered off, some volatges are expected to +@@ -467,13 +477,13 @@ void checkThresholdsPowerDelay(const std::weak_ptr<Sensor>& weakSensor, + } + } + assertThresholds(sensor, change.assertValue, change.threshold.level, +- change.threshold.direction, change.asserted); ++ change.threshold.direction, change.asserted, forceAssert); + } + } + + void assertThresholds(Sensor* sensor, double assertValue, + thresholds::Level level, thresholds::Direction direction, +- bool assert) ++ bool assert, bool force) + { + std::string property; + std::shared_ptr<sdbusplus::asio::dbus_interface> interface; +@@ -513,7 +523,9 @@ void assertThresholds(Sensor* sensor, double assertValue, + return; + } + +- if (interface->set_property<bool, true>(property, assert)) ++ bool propertyChanged = ++ interface->set_property<bool, true>(property, assert); ++ if (force || propertyChanged) + { + try + { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0004-Fan-Tach-Sensor-Threshold-Ignore-Zero.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0004-Fan-Tach-Sensor-Threshold-Ignore-Zero.patch new file mode 100644 index 000000000..214fbe888 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0004-Fan-Tach-Sensor-Threshold-Ignore-Zero.patch @@ -0,0 +1,54 @@ +From 221aaf1431a01fefb5e7df2461a1c691738a50a7 Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Fri, 19 Feb 2021 12:14:05 -0800 +Subject: [PATCH] Fan Tach Sensor Threshold Ignore Zero + +Currently there are systems that have system fans plugged +into different fan connectors. Fan present detection is +not supported in most of these systems. Critical low +threshold is asserted for the non-utilized fans +resulting in FSC boost all fans. + +Skip threshold checking for fan tach reading less or equal +to zero. This is a temporary WA until a more robust solution +is available. + +Note: with this workaround a completely non-working fan +will not be detected. FSC will still boost fans due to other +constraints if the system can't be cooled with the working fans. + +Tested: +No cr event for the missing fans. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + src/TachSensor.cpp | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/src/TachSensor.cpp b/src/TachSensor.cpp +index c375dbf..e85a2a2 100644 +--- a/src/TachSensor.cpp ++++ b/src/TachSensor.cpp +@@ -186,10 +186,16 @@ void TachSensor::checkThresholds(void) + // WA - treat value <= 0 as not present + bool status = false; + +- if (redundancy && *redundancy) ++ if (value > 0) + { +- (*redundancy) +- ->update("/xyz/openbmc_project/sensors/fan_tach/" + name, !status); ++ status = thresholds::checkThresholds(this); ++ ++ if (redundancy && *redundancy) ++ { ++ (*redundancy) ++ ->update("/xyz/openbmc_project/sensors/fan_tach/" + name, ++ !status); ++ } + } + + bool curLed = !status; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0005-Fix-PECI-ioctl-number.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0005-Fix-PECI-ioctl-number.patch new file mode 100644 index 000000000..8119f7542 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0005-Fix-PECI-ioctl-number.patch @@ -0,0 +1,29 @@ +From f85dd776301371892ff5197c1995bf2224dd87ab Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 22 Feb 2021 15:57:20 -0800 +Subject: [PATCH] Fix PECI ioctl number + +This commit fixes PECI ioctl number to 0xb8 to avoid conflicts in +kernel v5.10. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + include/linux/peci-ioctl.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/linux/peci-ioctl.h b/include/linux/peci-ioctl.h +index e5b4b8bd3275..1f44edf4fc04 100644 +--- a/include/linux/peci-ioctl.h ++++ b/include/linux/peci-ioctl.h +@@ -601,7 +601,7 @@ struct peci_crashdump_get_frame_msg { + __u8 data[16]; + } __attribute__((__packed__)); + +-#define PECI_IOC_BASE 0xb7 ++#define PECI_IOC_BASE 0xb8 + + #define PECI_IOC_XFER \ + _IOWR(PECI_IOC_BASE, PECI_CMD_XFER, struct peci_xfer_msg) +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0006-CPUSensor-create-RequirediTempSensor-if-defined.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0006-CPUSensor-create-RequirediTempSensor-if-defined.patch new file mode 100644 index 000000000..2083adfef --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0006-CPUSensor-create-RequirediTempSensor-if-defined.patch @@ -0,0 +1,233 @@ +From 6ace96be5a7b6763545c1dfc572f8e2790d99d4b Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 11 May 2021 11:14:55 -0700 +Subject: [PATCH] CPUSensor: create RequiredTempSensor if defined + +When BMC fails to talk to CPU through PECI, no +CPU sensors are created. Fan speed control only boost +fan when input sensor is not available. It does not +have the knowledge of which sensors are expected to +be present and can't treat "missing" sensor as failed one. +The failure on PECI goes unnoticed and we can have a thermal +run away. + +Query sensor config for RequiredTempSensor for any present +CPUs. Create a CPU sensor that is not available. +This sensor will be replaced by a normal CPU sensor when +peci detect the CPU and associated hwmon file is discovered. + +This is an initial patch that target to address the particular +failure case. More work will follow to support a more generic +"Required" sensor config. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + include/CPUSensor.hpp | 9 ++++++ + src/CPUSensor.cpp | 68 +++++++++++++++++++++++++++++++++++++++++++ + src/CPUSensorMain.cpp | 54 +++++++++++++++++++++++++++++----- + 3 files changed, 123 insertions(+), 8 deletions(-) + +diff --git a/include/CPUSensor.hpp b/include/CPUSensor.hpp +index 8b51b76..93b7fcc 100644 +--- a/include/CPUSensor.hpp ++++ b/include/CPUSensor.hpp +@@ -26,6 +26,15 @@ class CPUSensor : public Sensor + std::vector<thresholds::Threshold>&& thresholds, + const std::string& configuration, int cpuId, bool show, + double dtsOffset); ++ ++ // Create a CPUSensor without a path to sensor value ++ CPUSensor(const std::string& objectType, ++ sdbusplus::asio::object_server& objectServer, ++ std::shared_ptr<sdbusplus::asio::connection>& conn, ++ boost::asio::io_service& io, const std::string& sensorName, ++ std::vector<thresholds::Threshold>&& thresholdsIn, ++ const std::string& sensorConfiguration); ++ + ~CPUSensor() override; + static constexpr unsigned int sensorScaleFactor = 1000; + static constexpr unsigned int sensorPollMs = 1000; +diff --git a/src/CPUSensor.cpp b/src/CPUSensor.cpp +index c330088..3861ade 100644 +--- a/src/CPUSensor.cpp ++++ b/src/CPUSensor.cpp +@@ -98,6 +98,74 @@ CPUSensor::CPUSensor(const std::string& path, const std::string& objectType, + setupRead(); + } + ++// Create a dummy "not available" CPUSensor ++// This is used to indicate a missing required sensor for ++// other services like fan control ++CPUSensor::CPUSensor(const std::string& objectType, ++ sdbusplus::asio::object_server& objectServer, ++ std::shared_ptr<sdbusplus::asio::connection>& conn, ++ boost::asio::io_service& io, const std::string& sensorName, ++ std::vector<thresholds::Threshold>&& thresholdsIn, ++ const std::string& sensorConfiguration) : ++ Sensor(escapeName(sensorName), std::move(thresholdsIn), sensorConfiguration, ++ objectType, false, false, 0, 0, conn, PowerState::on), ++ objServer(objectServer), inputDev(io), waitTimer(io), ++ privTcontrol(std::numeric_limits<double>::quiet_NaN()), dtsOffset(0), ++ show(true), pollTime(CPUSensor::sensorPollMs), minMaxReadCounter(0) ++{ ++ // assume it is a temperature sensor for now ++ // support for other type can be added later ++ std::string interfacePath = ++ "/xyz/openbmc_project/sensors/temperature/" + name; ++ const char* units = sensor_paths::unitDegreesC; ++ minValue = -128; ++ maxValue = 127; ++ ++ sensorInterface = objectServer.add_interface( ++ interfacePath, "xyz.openbmc_project.Sensor.Value"); ++ ++ sensorInterface->register_property("Unit", units); ++ sensorInterface->register_property("MaxValue", maxValue); ++ sensorInterface->register_property("MinValue", minValue); ++ sensorInterface->register_property( ++ "Value", value, [&](const double& newValue, double& oldValue) { ++ return setSensorValue(newValue, oldValue); ++ }); ++ if (!sensorInterface->initialize()) ++ { ++ std::cerr << "error initializing value interface\n"; ++ } ++ ++ if (!availableInterface) ++ { ++ availableInterface = std::make_shared<sdbusplus::asio::dbus_interface>( ++ conn, sensorInterface->get_object_path(), availableInterfaceName); ++ availableInterface->register_property( ++ "Available", false, [this](const bool propIn, bool& old) { ++ if (propIn == old) ++ { ++ return 1; ++ } ++ old = propIn; ++ if (!propIn) ++ { ++ updateValue(std::numeric_limits<double>::quiet_NaN()); ++ } ++ return 1; ++ }); ++ availableInterface->initialize(); ++ } ++ if (!operationalInterface) ++ { ++ operationalInterface = ++ std::make_shared<sdbusplus::asio::dbus_interface>( ++ conn, sensorInterface->get_object_path(), ++ operationalInterfaceName); ++ operationalInterface->register_property("Functional", true); ++ operationalInterface->initialize(); ++ } ++} ++ + CPUSensor::~CPUSensor() + { + // close the input dev to cancel async operations +diff --git a/src/CPUSensorMain.cpp b/src/CPUSensorMain.cpp +index 0d94e4b..1d12fa6 100644 +--- a/src/CPUSensorMain.cpp ++++ b/src/CPUSensorMain.cpp +@@ -332,10 +332,9 @@ bool createSensors(boost::asio::io_service& io, + { + if (debug) + { +- std::cout << "Skipped: " << inputPath << ": " << sensorName +- << " is already created\n"; ++ std::cout << "Will be replaced: " << inputPath << ": " ++ << sensorName << " is already created\n"; + } +- continue; + } + + // check hidden properties +@@ -636,9 +635,9 @@ void detectCpuAsync( + }); + } + +-bool getCpuConfig(const std::shared_ptr<sdbusplus::asio::connection>& systemBus, ++bool getCpuConfig(std::shared_ptr<sdbusplus::asio::connection>& systemBus, + boost::container::flat_set<CPUConfig>& cpuConfigs, +- ManagedObjectType& sensorConfigs, ++ ManagedObjectType& sensorConfigs, boost::asio::io_service& io, + sdbusplus::asio::object_server& objectServer) + { + bool useCache = false; +@@ -700,6 +699,45 @@ bool getCpuConfig(const std::shared_ptr<sdbusplus::asio::connection>& systemBus, + iface->register_property("Present", *present); + iface->initialize(); + inventoryIfaces[name] = std::move(iface); ++ if (*present) ++ { ++ // create required CPU sensors here in unavailable state ++ auto findRequiredTempSensor = ++ config.second.find("RequiredTempSensor"); ++ auto findCpuId = config.second.find("CpuID"); ++ if (findRequiredTempSensor != config.second.end() && ++ findCpuId != config.second.end()) ++ { ++ std::string label = ++ std::visit(VariantToStringVisitor(), ++ findRequiredTempSensor->second); ++ // for temp sensor hwmon sysfs use input ++ std::string item{"input"}; ++ int cpuId = ++ std::visit(VariantToUnsignedIntVisitor(), ++ findCpuId->second); ++ std::string requiredSensorName = ++ createSensorName(label, item, cpuId); ++ ++ auto& sensorPtr = gCpuSensors[requiredSensorName]; ++ if (sensorPtr == nullptr) ++ { ++ // created a dummy sensor for required sensor, ++ // will be replaced with a real one if it is ++ // detected ++ std::string objectType{}; ++ std::vector<thresholds::Threshold> ++ emptyThreshold{}; ++ std::string emptyConfig{}; ++ sensorPtr = std::make_unique<CPUSensor>( ++ objectType, objectServer, systemBus, io, ++ requiredSensorName, ++ std::move(emptyThreshold), emptyConfig); ++ std::cout << "created required CPU sensor " ++ << requiredSensorName << "\n"; ++ } ++ } ++ } + } + + auto findBus = config.second.find("Bus"); +@@ -728,7 +766,6 @@ bool getCpuConfig(const std::shared_ptr<sdbusplus::asio::connection>& systemBus, + std::cout << "name: " << name << "\n"; + std::cout << "type: " << type << "\n"; + } +- + cpuConfigs.emplace(bus, addr, name, State::OFF); + } + } +@@ -764,7 +801,8 @@ int main() + return; // we're being canceled + } + +- if (getCpuConfig(systemBus, cpuConfigs, sensorConfigs, objectServer)) ++ if (getCpuConfig(systemBus, cpuConfigs, sensorConfigs, io, ++ objectServer)) + { + detectCpuAsync(pingTimer, creationTimer, io, objectServer, + systemBus, cpuConfigs, sensorConfigs); +@@ -792,7 +830,7 @@ int main() + return; // we're being canceled + } + +- if (getCpuConfig(systemBus, cpuConfigs, sensorConfigs, ++ if (getCpuConfig(systemBus, cpuConfigs, sensorConfigs, io, + objectServer)) + { + detectCpuAsync(pingTimer, creationTimer, io, objectServer, +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0007-Add-support-for-the-energy-hwmon-type.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0007-Add-support-for-the-energy-hwmon-type.patch new file mode 100644 index 000000000..daaca7fae --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0007-Add-support-for-the-energy-hwmon-type.patch @@ -0,0 +1,266 @@ +From 9f5ef2e8d9c34d9d9ddce34d450aaedd5c122b22 Mon Sep 17 00:00:00 2001 +From: Szymon Dompke <szymon.dompke@intel.com> +Date: Tue, 18 May 2021 05:22:33 +0200 +Subject: [PATCH] Add support for the energy hwmon type +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +With this commit CPUSensors should be able detect hwmon files of type +‘energy’ described here: + + https://www.kernel.org/doc/Documentation/hwmon/sysfs-interface + +These files hold a cumulative energy [micro Joule]. +Values read from these type of files will be exposed on dbus as a new +sensor. An example: + +└─/xyz + └─/xyz/openbmc_project + └─/xyz/openbmc_project/sensors + ├─/xyz/openbmc_project/sensors/energy + │ └─/xyz/openbmc_project/sensors/energy/Cumulative_Energy_CPU1 + +The energy counter will have different scale factor and different +default min/max values than other types of CPU sensors (power/temp). + +Tested: + Tested on physical machine where the `energy_input` files were present, + works as desired no regression detected. + +Authored-by: Zbigniew Kurzynski <zbigniew.kurzynski@intel.com> +Signed-off-by: Szymon Dompke <szymon.dompke@intel.com> +--- + include/CPUSensor.hpp | 13 +++++++-- + src/CPUSensor.cpp | 68 +++++++++++++++---------------------------- + src/CPUSensorMain.cpp | 30 ++++++++++++++++--- + 3 files changed, 60 insertions(+), 51 deletions(-) + +diff --git a/include/CPUSensor.hpp b/include/CPUSensor.hpp +index 93b7fcc..76e43dc 100644 +--- a/include/CPUSensor.hpp ++++ b/include/CPUSensor.hpp +@@ -16,6 +16,15 @@ + #include <variant> + #include <vector> + ++struct SensorProperties ++{ ++ std::string path; ++ std::string units; ++ double max; ++ double min; ++ unsigned int scaleFactor; ++}; ++ + class CPUSensor : public Sensor + { + public: +@@ -25,7 +34,7 @@ class CPUSensor : public Sensor + boost::asio::io_service& io, const std::string& sensorName, + std::vector<thresholds::Threshold>&& thresholds, + const std::string& configuration, int cpuId, bool show, +- double dtsOffset); ++ double dtsOffset, const SensorProperties& sensorProperties); + + // Create a CPUSensor without a path to sensor value + CPUSensor(const std::string& objectType, +@@ -36,7 +45,6 @@ class CPUSensor : public Sensor + const std::string& sensorConfiguration); + + ~CPUSensor() override; +- static constexpr unsigned int sensorScaleFactor = 1000; + static constexpr unsigned int sensorPollMs = 1000; + static constexpr size_t warnAfterErrorCount = 10; + static constexpr const char* labelTcontrol = "Tcontrol"; +@@ -54,6 +62,7 @@ class CPUSensor : public Sensor + size_t pollTime; + bool loggedInterfaceDown = false; + uint8_t minMaxReadCounter; ++ unsigned int scaleFactor; + void setupRead(void); + void handleResponse(const boost::system::error_code& err); + void checkThresholds(void) override; +diff --git a/src/CPUSensor.cpp b/src/CPUSensor.cpp +index 3861ade..6737151 100644 +--- a/src/CPUSensor.cpp ++++ b/src/CPUSensor.cpp +@@ -39,58 +39,37 @@ CPUSensor::CPUSensor(const std::string& path, const std::string& objectType, + boost::asio::io_service& io, const std::string& sensorName, + std::vector<thresholds::Threshold>&& thresholdsIn, + const std::string& sensorConfiguration, int cpuId, +- bool show, double dtsOffset) : ++ bool show, double dtsOffset, ++ const SensorProperties& sensorProperties) : + Sensor(escapeName(sensorName), std::move(thresholdsIn), sensorConfiguration, +- objectType, false, false, 0, 0, conn, PowerState::on), ++ objectType, false, false, sensorProperties.max, sensorProperties.min, ++ conn, PowerState::on), + objServer(objectServer), inputDev(io), waitTimer(io), path(path), + privTcontrol(std::numeric_limits<double>::quiet_NaN()), + dtsOffset(dtsOffset), show(show), pollTime(CPUSensor::sensorPollMs), +- minMaxReadCounter(0) ++ minMaxReadCounter(0), scaleFactor(sensorProperties.scaleFactor) + { + nameTcontrol = labelTcontrol; + nameTcontrol += " CPU" + std::to_string(cpuId); + if (show) + { +- if (auto fileParts = splitFileName(path)) ++ std::string interfacePath = sensorProperties.path + name; ++ sensorInterface = objectServer.add_interface( ++ interfacePath, "xyz.openbmc_project.Sensor.Value"); ++ if (thresholds::hasWarningInterface(thresholds)) + { +- auto& [type, nr, item] = *fileParts; +- std::string interfacePath; +- const char* units; +- if (type.compare("power") == 0) +- { +- interfacePath = "/xyz/openbmc_project/sensors/power/" + name; +- units = sensor_paths::unitWatts; +- minValue = 0; +- maxValue = 511; +- } +- else +- { +- interfacePath = +- "/xyz/openbmc_project/sensors/temperature/" + name; +- units = sensor_paths::unitDegreesC; +- minValue = -128; +- maxValue = 127; +- } +- +- sensorInterface = objectServer.add_interface( +- interfacePath, "xyz.openbmc_project.Sensor.Value"); +- if (thresholds::hasWarningInterface(thresholds)) +- { +- thresholdInterfaceWarning = objectServer.add_interface( +- interfacePath, +- "xyz.openbmc_project.Sensor.Threshold.Warning"); +- } +- if (thresholds::hasCriticalInterface(thresholds)) +- { +- thresholdInterfaceCritical = objectServer.add_interface( +- interfacePath, +- "xyz.openbmc_project.Sensor.Threshold.Critical"); +- } +- association = objectServer.add_interface(interfacePath, +- association::interface); +- +- setInitialProperties(conn, units); ++ thresholdInterfaceWarning = objectServer.add_interface( ++ interfacePath, "xyz.openbmc_project.Sensor.Threshold.Warning"); + } ++ if (thresholds::hasCriticalInterface(thresholds)) ++ { ++ thresholdInterfaceCritical = objectServer.add_interface( ++ interfacePath, "xyz.openbmc_project.Sensor.Threshold.Critical"); ++ } ++ association = ++ objectServer.add_interface(interfacePath, association::interface); ++ ++ setInitialProperties(conn, sensorProperties.units); + } + + // call setup always as not all sensors call setInitialProperties +@@ -248,7 +227,7 @@ void CPUSensor::updateMinMaxValues(void) + auto& [suffix, oldValue, dbusName, newValue] = vectorItem; + auto attrPath = boost::replace_all_copy(path, fileItem, suffix); + +- if(auto tmp = readFile(attrPath, CPUSensor::sensorScaleFactor)) ++ if (auto tmp = readFile(attrPath, scaleFactor)) + { + newValue.get() = *tmp; + } +@@ -302,7 +281,7 @@ void CPUSensor::handleResponse(const boost::system::error_code& err) + std::getline(responseStream, response); + rawValue = std::stod(response); + responseStream.clear(); +- double nvalue = rawValue / CPUSensor::sensorScaleFactor; ++ double nvalue = rawValue / scaleFactor; + + if (show) + { +@@ -328,8 +307,7 @@ void CPUSensor::handleResponse(const boost::system::error_code& err) + { + std::vector<thresholds::Threshold> newThresholds; + if (parseThresholdsFromAttr(newThresholds, path, +- CPUSensor::sensorScaleFactor, +- dtsOffset)) ++ scaleFactor, dtsOffset)) + { + if (!std::equal(thresholds.begin(), thresholds.end(), + newThresholds.begin(), +diff --git a/src/CPUSensorMain.cpp b/src/CPUSensorMain.cpp +index 1d12fa6..e348aa7 100644 +--- a/src/CPUSensorMain.cpp ++++ b/src/CPUSensorMain.cpp +@@ -94,6 +94,18 @@ static constexpr auto sensorTypes{std::to_array<const char*>({"XeonCPU"})}; + static constexpr auto hiddenProps{std::to_array<const char*>( + {CPUSensor::labelTcontrol, "Tthrottle", "Tjmax"})}; + ++static const boost::container::flat_map<std::string, SensorProperties> ++ sensorPropertiesMap = { ++ {"power", ++ {"/xyz/openbmc_project/sensors/power/", sensor_paths::unitWatts, 511, ++ 0, 1000}}, ++ {"energy", ++ {"/xyz/openbmc_project/sensors/energy/", sensor_paths::unitJoules, ++ std::numeric_limits<uint32_t>::max() / 1000000, 0.0, 1000000}}, ++ {"temp", ++ {"/xyz/openbmc_project/sensors/temperature/", ++ sensor_paths::unitDegreesC, 127.0, -128.0, 1000}}}; ++ + void detectCpuAsync( + boost::asio::deadline_timer& pingTimer, + boost::asio::deadline_timer& creationTimer, boost::asio::io_service& io, +@@ -296,7 +308,8 @@ bool createSensors(boost::asio::io_service& io, + + auto directory = hwmonNamePath.parent_path(); + std::vector<fs::path> inputPaths; +- if (!findFiles(directory, R"((temp|power)\d+_(input|average|cap)$)", ++ if (!findFiles(directory, ++ R"((temp|power|energy)\d+_(input|average|cap)$)", + inputPaths, 0)) + { + std::cerr << "No temperature sensors in system\n"; +@@ -364,6 +377,16 @@ bool createSensors(boost::asio::io_service& io, + } + } + ++ const auto& it = sensorPropertiesMap.find(type); ++ if (it == sensorPropertiesMap.end()) ++ { ++ std::cerr ++ << "Failure getting sensor properties for sensor type: " ++ << type << "\n"; ++ continue; ++ } ++ const SensorProperties& prop = it->second; ++ + std::vector<thresholds::Threshold> sensorThresholds; + std::string labelHead = label.substr(0, label.find(' ')); + parseThresholdsFromConfig(*sensorData, sensorThresholds, +@@ -371,8 +394,7 @@ bool createSensors(boost::asio::io_service& io, + if (sensorThresholds.empty()) + { + if (!parseThresholdsFromAttr(sensorThresholds, inputPathStr, +- CPUSensor::sensorScaleFactor, +- dtsOffset)) ++ prop.scaleFactor, dtsOffset)) + { + std::cerr << "error populating thresholds for " + << sensorName << "\n"; +@@ -384,7 +406,7 @@ bool createSensors(boost::asio::io_service& io, + sensorPtr = std::make_unique<CPUSensor>( + inputPathStr, sensorType, objectServer, dbusConnection, io, + sensorName, std::move(sensorThresholds), *interfacePath, cpuId, +- show, dtsOffset); ++ show, dtsOffset, prop); + createdSensors.insert(sensorName); + if (debug) + { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0008-CPUSensor-additional-debug-message.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0008-CPUSensor-additional-debug-message.patch new file mode 100644 index 000000000..40c8d46bd --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0008-CPUSensor-additional-debug-message.patch @@ -0,0 +1,69 @@ +From c045d0ace218a8f0c9e9af0b04aed24ec733fc79 Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 22 Jun 2021 14:49:44 -0700 +Subject: [PATCH] CPUSensor: additional debug message + +Add debug message to capture more information on threshold changes. + +Example output - DTS threshold changes when Tcontrol was first read + Jan 01 00:06:06 intel-obmc cpusensor[461]: Core_16_CPU1: Tcontrol changed from nan to 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: Core_22_CPU1: Tcontrol changed from nan to 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: Core_24_CPU1: Tcontrol changed from nan to 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: DTS_CPU1: Tcontrol changed from nan to 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: Threshold: /sys/bus/peci/devices/peci-0/0-30/peci-cputemp.0/hwmon/hwmon12/temp2_max: 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: Threshold: /sys/bus/peci/devices/peci-0/0-30/peci-cputemp.0/hwmon/hwmon12/temp2_crit: 100 + Jan 01 00:06:06 intel-obmc cpusensor[461]: DTS_CPU1: new threshold value 92 + Jan 01 00:06:06 intel-obmc cpusensor[461]: DTS_CPU1: new threshold value 100 + +The above message will be logged when BMC reset or host resets. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + src/CPUSensor.cpp | 5 +++++ + src/Thresholds.cpp | 7 ++----- + 2 files changed, 7 insertions(+), 5 deletions(-) + +diff --git a/src/CPUSensor.cpp b/src/CPUSensor.cpp +index 0621e04..65acdac 100644 +--- a/src/CPUSensor.cpp ++++ b/src/CPUSensor.cpp +@@ -300,6 +300,7 @@ void CPUSensor::handleResponse(const boost::system::error_code& err) + : std::numeric_limits<double>::quiet_NaN(); + if (gTcontrol != privTcontrol) + { ++ std::cout << name << ": Tcontrol changed from " << privTcontrol << " to " << gTcontrol << "\n"; + privTcontrol = gTcontrol; + + if (!thresholds.empty()) +@@ -318,6 +319,10 @@ void CPUSensor::handleResponse(const boost::system::error_code& err) + thresholds::updateThresholds(this); + } + } ++ for (auto& threshold : thresholds) ++ { ++ std::cout << name << ": new threshold value " << threshold.value << "\n"; ++ } + } + else + { +diff --git a/src/Thresholds.cpp b/src/Thresholds.cpp +index 78ded55..283dacf 100644 +--- a/src/Thresholds.cpp ++++ b/src/Thresholds.cpp +@@ -583,11 +583,8 @@ bool parseThresholdsFromAttr( + if (auto val = readFile(attrPath, scaleFactor)) + { + *val += offset; +- if (debug) +- { +- std::cout << "Threshold: " << attrPath << ": " << *val +- << "\n"; +- } ++ std::cout << "Threshold: " << attrPath << ": " << *val ++ << "\n"; + thresholdVector.emplace_back(level, direction, *val); + } + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0009-CPUSensor-Create-CPUConfig-for-each-PECI-adapter.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0009-CPUSensor-Create-CPUConfig-for-each-PECI-adapter.patch new file mode 100644 index 000000000..737ba9128 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/0009-CPUSensor-Create-CPUConfig-for-each-PECI-adapter.patch @@ -0,0 +1,147 @@ +From 262682632ee493d0b6593540cfc902d11286b7c3 Mon Sep 17 00:00:00 2001 +From: Iwona Winiarska <iwona.winiarska@intel.com> +Date: Tue, 13 Jul 2021 15:16:16 +0200 +Subject: [PATCH] CPUSensor: Create CPUConfig for each PECI adapter + +Currently CPUSensor is based on configuration that defines CPUs for the +specific PECI adapter (usually peci-wire). As a consequence, MFD devices +are created only for the defined adapter. + +Since duplicating static CPU records in configuration file for other +PECI adapters may be confusing to users, let's add CPUConfig for other +PECI adapters dynamically by detecting if there is more than one PECI +adapter driver bound in the system. + +Please note, that this change is limited to enabling HWMON driver, +sensors for all adapters will not be exposed on D-Bus. + +Tested: +No changes if only one PECI interface is available, HWMON drivers +creation will be based on provided configuration. +When both peci-aspeed (peci-wire) and peci-mctp are bound in the system, +HWMON drivers are created for each PECI interface. + +Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> +--- + src/CPUSensorMain.cpp | 90 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 90 insertions(+) + +diff --git a/src/CPUSensorMain.cpp b/src/CPUSensorMain.cpp +index 744ca50..6850df7 100644 +--- a/src/CPUSensorMain.cpp ++++ b/src/CPUSensorMain.cpp +@@ -33,6 +33,7 @@ + #include <fstream> + #include <functional> + #include <memory> ++#include <optional> + #include <regex> + #include <sstream> + #include <stdexcept> +@@ -658,6 +659,91 @@ void detectCpuAsync( + }); + } + ++std::optional<uint64_t> getPeciDeviceNum(const fs::path& peciAdapterNamePath) ++{ ++ fs::path::iterator it = peciAdapterNamePath.begin(); ++ std::advance(it, 5); // /sys/bus/peci/devices/peci-xxxx ++ std::string peciDeviceName = *it; ++ auto pos = peciDeviceName.find('-'); ++ if (pos == std::string::npos) ++ { ++ std::cerr << "Incorrect PECI device name: " << peciDeviceName << "\n"; ++ return std::nullopt; ++ } ++ ++ try ++ { ++ return std::stoull(peciDeviceName.substr(pos + 1, 1)); ++ } ++ catch (std::logic_error&) ++ { ++ return std::nullopt; ++ } ++} ++ ++std::optional<std::string> ++ readPeciAdapterNameFromFile(const fs::path& peciAdapterNamePath) ++{ ++ std::ifstream nameFile(peciAdapterNamePath); ++ if (!nameFile.good()) ++ { ++ std::cerr << "Cannot read: " << peciAdapterNamePath << "\n"; ++ return std::nullopt; ++ } ++ ++ std::string peciAdapterName; ++ std::getline(nameFile, peciAdapterName); ++ nameFile.close(); ++ if (peciAdapterName.empty()) ++ { ++ return std::nullopt; ++ } ++ ++ auto pos = peciAdapterName.find('-'); ++ peciAdapterName = peciAdapterName.substr(pos + 1); ++ ++ return peciAdapterName; ++} ++ ++void addConfigsForOtherPeciAdapters( ++ boost::container::flat_set<CPUConfig>& cpuConfigs, uint64_t& bus, ++ uint64_t& addr, std::string& name, const State& state) ++{ ++ std::vector<fs::path> peciAdapterNamePaths; ++ if (!findFiles(fs::path(peciDevPath), R"(peci-\d+/name$)", ++ peciAdapterNamePaths, 1)) ++ { ++ std::cerr << "No PECI adapters in system\n"; ++ return; ++ } ++ ++ for (const fs::path& peciAdapterNamePath : peciAdapterNamePaths) ++ { ++ std::optional<uint64_t> peciDeviceNum = ++ getPeciDeviceNum(peciAdapterNamePath); ++ if (!peciDeviceNum || peciDeviceNum == bus) ++ { ++ continue; ++ } ++ ++ std::optional<std::string> peciAdapterName = ++ readPeciAdapterNameFromFile(peciAdapterNamePath); ++ if (!peciAdapterName) ++ { ++ continue; ++ } ++ ++ // Change result for peci-aspeed ++ if (peciAdapterName->compare("bus") == 0) ++ { ++ peciAdapterName = "wire"; ++ } ++ ++ cpuConfigs.emplace(*peciDeviceNum, addr, name + "_" + *peciAdapterName, ++ state); ++ } ++} ++ + bool getCpuConfig(std::shared_ptr<sdbusplus::asio::connection>& systemBus, + boost::container::flat_set<CPUConfig>& cpuConfigs, + ManagedObjectType& sensorConfigs, boost::asio::io_service& io, +@@ -789,7 +875,11 @@ bool getCpuConfig(std::shared_ptr<sdbusplus::asio::connection>& systemBus, + std::cout << "name: " << name << "\n"; + std::cout << "type: " << type << "\n"; + } ++ + cpuConfigs.emplace(bus, addr, name, State::OFF); ++ ++ addConfigsForOtherPeciAdapters(cpuConfigs, bus, addr, name, ++ State::OFF); + } + } + } +-- +2.31.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/intrusionsensor-depend-on-networkd.conf b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/intrusionsensor-depend-on-networkd.conf new file mode 100644 index 000000000..6f0fd3ffc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors/intrusionsensor-depend-on-networkd.conf @@ -0,0 +1,3 @@ +[Unit] +After=systemd-networkd.service +Requires=systemd-networkd.service diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend new file mode 100644 index 000000000..765ad3739 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend @@ -0,0 +1,49 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" +PROJECT_SRC_DIR := "${THISDIR}/${PN}" + +SRCREV = "77518b28db824e01af18351094680a99b1ba3cae" +#SRC_URI = "git://github.com/openbmc/dbus-sensors.git" + +SRC_URI += "\ + file://intrusionsensor-depend-on-networkd.conf \ + file://0001-Add-check-for-min-max-received-from-hwmon-files.patch \ + file://0002-Fix-PECI-client-creation-flow.patch \ + file://0003-Fix-missing-threshold-de-assert-event-when-threshold.patch \ + file://0004-Fan-Tach-Sensor-Threshold-Ignore-Zero.patch \ + file://0005-Fix-PECI-ioctl-number.patch \ + file://0006-CPUSensor-create-RequirediTempSensor-if-defined.patch \ + file://0007-Add-support-for-the-energy-hwmon-type.patch \ + file://0008-CPUSensor-additional-debug-message.patch \ + file://0009-CPUSensor-Create-CPUConfig-for-each-PECI-adapter.patch \ + " + +DEPENDS:append = " libgpiod libmctp" + +PACKAGECONFIG += " \ + adcsensor \ + cpusensor \ + exitairtempsensor \ + fansensor \ + hwmontempsensor \ + intrusionsensor \ + ipmbsensor \ + mcutempsensor \ + psusensor \ +" + +PACKAGECONFIG[nvmesensor] = "-Dnvme=enabled, -Dnvme=disabled" + +# Enable Validation unsecure based on IMAGE_FEATURES +EXTRA_OEMESON += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'validation-unsecure', '-Dvalidate-unsecure-feature=enabled', '', d)}" + +SYSTEMD_SERVICE:${PN} += "${@bb.utils.contains('PACKAGECONFIG', 'nvmesensor', \ + 'xyz.openbmc_project.nvmesensor.service', \ + '', d)}" + +do_install:append() { + svc="xyz.openbmc_project.intrusionsensor.service" + srcf="${WORKDIR}/intrusionsensor-depend-on-networkd.conf" + dstf="${D}/etc/systemd/system/${svc}.d/10-depend-on-networkd.conf" + mkdir -p "${D}/etc/systemd/system/${svc}.d" + install "${srcf}" "${dstf}" +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/settings_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/settings_git.bb new file mode 100644 index 000000000..703cbb803 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/settings_git.bb @@ -0,0 +1,20 @@ +SUMMARY = "Settings" + +SRC_URI = "git://github.com/Intel-BMC/settings.git;protocol=ssh" +SRCREV = "85a8be9a3fb8ef4726899b28f10fb9afa6fa9e89" +PV = "0.1+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SYSTEMD_SERVICE:${PN} = "xyz.openbmc_project.Settings.service" + +DEPENDS = "boost \ + nlohmann-json \ + sdbusplus" + +S = "${WORKDIR}/git" +inherit cmake systemd + +EXTRA_OECMAKE = "-DYOCTO=1" + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb new file mode 100644 index 000000000..d17aebf00 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/special-mode-mgr/special-mode-mgr_git.bb @@ -0,0 +1,31 @@ +SUMMARY = "Special mode manager daemon to handle manufacturing modes" +DESCRIPTION = "Daemon exposes the manufacturing mode property" + +PV = "1.0+git${SRCPV}" + +S = "${WORKDIR}/git" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SRC_URI = "git://github.com/Intel-BMC/special-mode-manager.git;protocol=ssh" +SRCREV = "42a0ba3c61ae38cc84b06705159065860492fc2e" + +EXTRA_OECMAKE += "${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'validation-unsecure', '-DBMC_VALIDATION_UNSECURE_FEATURE=ON', '', d)}" + +inherit cmake systemd +SYSTEMD_SERVICE:${PN} = "specialmodemgr.service" + +DEPENDS += " \ + systemd \ + sdbusplus \ + phosphor-logging \ + boost \ + libpam \ + libgpiod \ + " +RDEPENDS:${PN} += " \ + libsystemd \ + sdbusplus \ + phosphor-logging \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-post-code-manager_git.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-post-code-manager_git.bbappend new file mode 100644 index 000000000..a4e894cbc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-post-code-manager_git.bbappend @@ -0,0 +1,2 @@ +#SRC_URI = "git://github.com/openbmc/phosphor-post-code-manager.git" +SRCREV = "9ce5a645f50c0ab94e582abbf95474f636aba678" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend new file mode 100644 index 000000000..b7e8c0b22 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/state/phosphor-state-manager_%.bbappend @@ -0,0 +1,3 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +DEPENDS += "gtest" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb new file mode 100644 index 000000000..b123ddb35 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb @@ -0,0 +1,19 @@ +SUMMARY = "Callback Manager" +DESCRIPTION = "D-Bus daemon that registers matches that trigger method calls" + +SRC_URI = "git://github.com/openbmc/s2600wf-misc.git;protocol=ssh" + +inherit cmake systemd +DEPENDS = "boost sdbusplus" + +PV = "0.1+git${SRCPV}" +SRCREV = "0c5059f685f6df0704a4b773f2e617cf10d03210" + +S = "${WORKDIR}/git/callback-manager" + +SYSTEMD_SERVICE:${PN} += "callback-manager.service" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENCE;md5=7becf906c8f8d03c237bad13bc3dac53" + +EXTRA_OECMAKE = "-DYOCTO=1" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/telemetry/telemetry_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/telemetry/telemetry_%.bbappend new file mode 100644 index 000000000..ebd808168 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/telemetry/telemetry_%.bbappend @@ -0,0 +1,6 @@ +SRC_URI = "git://github.com/openbmc/telemetry.git" +SRCREV = "e28aa53dc1492f09a64dc9f1dbfd5b6dba06e31f" + +EXTRA_OEMESON += " -Dmax-reports=10" +EXTRA_OEMESON += " -Dmax-reading-parameters=200" +EXTRA_OEMESON += " -Dmin-interval=1000" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0005-Added-suport-for-multiple-user-manager-services.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0005-Added-suport-for-multiple-user-manager-services.patch new file mode 100644 index 000000000..a7f431049 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0005-Added-suport-for-multiple-user-manager-services.patch @@ -0,0 +1,1666 @@ +From 75971b8faf7ef7af7285ba7d5207be71c66e5d11 Mon Sep 17 00:00:00 2001 +From: Radivoje Jovanovic <radivoje.jovanovic@intel.com> +Date: Mon, 2 Jul 2018 19:23:25 -0700 +Subject: [PATCH] Added suport for multiple user manager services + +Support added for SSSD service implementation + +Signed-off-by: Alberto Salazar Perez <alberto.salazar.perez@intel.com> +Signed-off-by: Radivoje Jovanovic <radivoje.jovanovic@intel.com> +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Signed-off-by: Arun P. Mohanan <arun.p.m@linux.intel.com> +--- + Makefile.am | 5 +- + mainapp.cpp | 90 +++++- + user_mgr.cpp | 297 ++---------------- + user_mgr.hpp | 9 +- + user_service.cpp | 789 +++++++++++++++++++++++++++++++++++++++++++++++ + user_service.hpp | 233 ++++++++++++++ + 6 files changed, 1149 insertions(+), 274 deletions(-) + create mode 100644 user_service.cpp + create mode 100644 user_service.hpp + +diff --git a/Makefile.am b/Makefile.am +index 1dbd594..fe47aaf 100644 +--- a/Makefile.am ++++ b/Makefile.am +@@ -1,11 +1,12 @@ + bin_PROGRAMS = phosphor-user-manager + +-noinst_HEADERS = user_mgr.hpp users.hpp ++noinst_HEADERS = user_mgr.hpp users.hpp user_service.hpp + + phosphor_user_manager_SOURCES = \ + mainapp.cpp \ + user_mgr.cpp \ +- users.cpp ++ users.cpp \ ++ user_service.cpp + + phosphor_user_manager_LDFLAGS = $(SDBUSPLUS_LIBS) \ + $(PHOSPHOR_DBUS_INTERFACES_LIBS) \ +diff --git a/mainapp.cpp b/mainapp.cpp +index e08da61..f4b7f8c 100644 +--- a/mainapp.cpp ++++ b/mainapp.cpp +@@ -16,18 +16,106 @@ + #include "config.h" + + #include "user_mgr.hpp" ++#include "user_service.hpp" + ++#include <getopt.h> ++ ++#include <iostream> + #include <string> + + // D-Bus root for user manager + constexpr auto USER_MANAGER_ROOT = "/xyz/openbmc_project/user"; + ++void printUsage() ++{ ++ std::string usage = ++ R"(Usage: ++ phosphor-user-manager [OPTIONS] ++ ++Backend DBUS service for OpenBMC User Management. ++If no OPTIONS are specified, shadow file will be used. ++ ++Options: ++ -s, --service={shadow|sssd} ++ Specify the authentication service to use: ++ 'shadow' will use the /etc/shadow file. ++ 'sssd' will use the sssd service domains. ++ -h, --help Displays this help message. ++)"; ++ std::cerr << usage; ++} ++ ++void parseArgs(int argc, char** argv, ++ phosphor::user::UserService::ServiceType& srvc) ++{ ++ const std::string shortOpts{"s:h"}; ++ const struct option longOpts[] = {{"service", 1, nullptr, 's'}, ++ {"help", 0, nullptr, 'h'}, ++ {nullptr, 0, nullptr, 0}}; ++ ++ while (true) ++ { ++ const auto opt = ++ getopt_long(argc, argv, shortOpts.c_str(), longOpts, nullptr); ++ ++ if (opt == -1) ++ { ++ if (srvc == phosphor::user::UserService::ServiceType::none) ++ { ++ srvc = phosphor::user::UserService::ServiceType::shadow; ++ } ++ break; ++ } ++ ++ switch (opt) ++ { ++ case 's': ++ { ++ std::string srvcStr{optarg}; ++ if (!srvcStr.compare("shadow")) ++ { ++ srvc = phosphor::user::UserService::ServiceType::shadow; ++ } ++ else if (!srvcStr.compare("sssd")) ++ { ++ srvc = phosphor::user::UserService::ServiceType::sssd; ++ } ++ else ++ { ++ std::cerr << "Error. '" << srvcStr << "' is not a valid" ++ << " authentication service." << std::endl; ++ printUsage(); ++ exit(1); ++ } ++ } ++ break; ++ ++ case 'h': ++ { ++ printUsage(); ++ exit(0); ++ } ++ ++ default: ++ { ++ printUsage(); ++ exit(1); ++ } ++ } ++ } ++} ++ + int main(int argc, char** argv) + { ++ // Check command line options. Exit if error. ++ phosphor::user::UserService::ServiceType srvc = ++ phosphor::user::UserService::ServiceType::none; ++ parseArgs(argc, argv, srvc); ++ + auto bus = sdbusplus::bus::new_default(); + sdbusplus::server::manager::manager objManager(bus, USER_MANAGER_ROOT); + +- phosphor::user::UserMgr userMgr(bus, USER_MANAGER_ROOT); ++ phosphor::user::UserMgr userMgr(bus, USER_MANAGER_ROOT, srvc); + + // Claim the bus now + bus.request_name(USER_MANAGER_BUSNAME); +diff --git a/user_mgr.cpp b/user_mgr.cpp +index 1b14e8e..f6f2fdb 100644 +--- a/user_mgr.cpp ++++ b/user_mgr.cpp +@@ -18,43 +18,34 @@ + + #include "user_mgr.hpp" + +-#include "file.hpp" + #include "shadowlock.hpp" + #include "users.hpp" + + #include <grp.h> + #include <pwd.h> +-#include <shadow.h> +-#include <sys/types.h> +-#include <sys/wait.h> + #include <time.h> +-#include <unistd.h> + + #include <boost/algorithm/string/split.hpp> +-#include <boost/process/child.hpp> +-#include <boost/process/io.hpp> + #include <phosphor-logging/elog-errors.hpp> + #include <phosphor-logging/elog.hpp> + #include <phosphor-logging/log.hpp> + #include <xyz/openbmc_project/Common/error.hpp> + #include <xyz/openbmc_project/User/Common/error.hpp> + +-#include <algorithm> ++#include <cstdio> + #include <fstream> +-#include <numeric> + #include <regex> ++#include <stdexcept> + + namespace phosphor + { + namespace user + { + +-static constexpr const char* passwdFileName = "/etc/passwd"; + static constexpr size_t ipmiMaxUsers = 15; + static constexpr size_t ipmiMaxUserNameLen = 16; + static constexpr size_t systemMaxUserNameLen = 30; + static constexpr size_t maxSystemUsers = 30; +-static constexpr const char* grpSsh = "ssh"; + static constexpr uint8_t minPasswdLength = 8; + static constexpr int success = 0; + static constexpr int failure = -1; +@@ -100,79 +91,6 @@ using NoResource = + + using Argument = xyz::openbmc_project::Common::InvalidArgument; + +-template <typename... ArgTypes> +-static std::vector<std::string> executeCmd(const char* path, +- ArgTypes&&... tArgs) +-{ +- std::vector<std::string> stdOutput; +- boost::process::ipstream stdOutStream; +- boost::process::child execProg(path, const_cast<char*>(tArgs)..., +- boost::process::std_out > stdOutStream); +- std::string stdOutLine; +- +- while (stdOutStream && std::getline(stdOutStream, stdOutLine) && +- !stdOutLine.empty()) +- { +- stdOutput.emplace_back(stdOutLine); +- } +- +- execProg.wait(); +- +- int retCode = execProg.exit_code(); +- if (retCode) +- { +- log<level::ERR>("Command execution failed", entry("PATH=%d", path), +- entry("RETURN_CODE:%d", retCode)); +- elog<InternalFailure>(); +- } +- +- return stdOutput; +-} +- +-static std::string getCSVFromVector(std::vector<std::string> vec) +-{ +- switch (vec.size()) +- { +- case 0: +- { +- return ""; +- } +- break; +- +- case 1: +- { +- return std::string{vec[0]}; +- } +- break; +- +- default: +- { +- return std::accumulate( +- std::next(vec.begin()), vec.end(), vec[0], +- [](std::string a, std::string b) { return a + ',' + b; }); +- } +- } +-} +- +-static bool removeStringFromCSV(std::string& csvStr, const std::string& delStr) +-{ +- std::string::size_type delStrPos = csvStr.find(delStr); +- if (delStrPos != std::string::npos) +- { +- // need to also delete the comma char +- if (delStrPos == 0) +- { +- csvStr.erase(delStrPos, delStr.size() + 1); +- } +- else +- { +- csvStr.erase(delStrPos - 1, delStr.size() + 1); +- } +- return true; +- } +- return false; +-} +- + bool UserMgr::isUserExist(const std::string& userName) + { + if (userName.empty()) +@@ -299,39 +217,14 @@ void UserMgr::createUser(std::string userName, + { + throwForInvalidPrivilege(priv); + throwForInvalidGroups(groupNames); +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; + throwForUserExists(userName); + throwForUserNameConstraints(userName, groupNames); + throwForMaxGrpUserCount(groupNames); + +- std::string groups = getCSVFromVector(groupNames); +- bool sshRequested = removeStringFromCSV(groups, grpSsh); +- +- // treat privilege as a group - This is to avoid using different file to +- // store the same. +- if (!priv.empty()) +- { +- if (groups.size() != 0) +- { +- groups += ","; +- } +- groups += priv; +- } +- try +- { +- executeCmd("/usr/sbin/useradd", userName.c_str(), "-G", groups.c_str(), +- "-m", "-N", "-s", +- (sshRequested ? "/bin/sh" : "/bin/nologin"), "-e", +- (enabled ? "" : "1970-01-02")); +- } +- catch (const InternalFailure& e) +- { +- log<level::ERR>("Unable to create new user"); +- elog<InternalFailure>(); +- } ++ // Tell the User Service to create a new user with the info provided. ++ userSrvc->createUser(userName, groupNames, priv, enabled); + +- // Add the users object before sending out the signal ++ // Add the users to the local list before sending out the signal + std::string userObj = std::string(usersObjPath) + "/" + userName; + std::sort(groupNames.begin(), groupNames.end()); + usersList.emplace( +@@ -345,19 +238,11 @@ void UserMgr::createUser(std::string userName, + + void UserMgr::deleteUser(std::string userName) + { +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; + throwForUserDoesNotExist(userName); +- try +- { +- executeCmd("/usr/sbin/userdel", userName.c_str(), "-r"); +- } +- catch (const InternalFailure& e) +- { +- log<level::ERR>("User delete failed", +- entry("USER_NAME=%s", userName.c_str())); +- elog<InternalFailure>(); +- } ++ ++ // Tell the User Service to delete user ++ userSrvc->deleteUser(userName); ++ // Then delete user from local list + + usersList.erase(userName); + +@@ -368,24 +253,13 @@ void UserMgr::deleteUser(std::string userName) + + void UserMgr::renameUser(std::string userName, std::string newUserName) + { +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; + throwForUserDoesNotExist(userName); + throwForUserExists(newUserName); + throwForUserNameConstraints(newUserName, + usersList[userName].get()->userGroups()); +- try +- { +- std::string newHomeDir = "/home/" + newUserName; +- executeCmd("/usr/sbin/usermod", "-l", newUserName.c_str(), +- userName.c_str(), "-d", newHomeDir.c_str(), "-m"); +- } +- catch (const InternalFailure& e) +- { +- log<level::ERR>("User rename failed", +- entry("USER_NAME=%s", userName.c_str())); +- elog<InternalFailure>(); +- } ++ // Call The User Service to rename user on the system ++ userSrvc->renameUser(userName, newUserName); ++ // Update local list to reflect the name change + const auto& user = usersList[userName]; + std::string priv = user.get()->userPrivilege(); + std::vector<std::string> groupNames = user.get()->userGroups(); +@@ -409,8 +283,6 @@ void UserMgr::updateGroupsAndPriv(const std::string& userName, + { + throwForInvalidPrivilege(priv); + throwForInvalidGroups(groupNames); +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; + throwForUserDoesNotExist(userName); + const std::vector<std::string>& oldGroupNames = + usersList[userName].get()->userGroups(); +@@ -426,29 +298,8 @@ void UserMgr::updateGroupsAndPriv(const std::string& userName, + throwForMaxGrpUserCount(groupNames); + } + +- std::string groups = getCSVFromVector(groupNames); +- bool sshRequested = removeStringFromCSV(groups, grpSsh); +- +- // treat privilege as a group - This is to avoid using different file to +- // store the same. +- if (!priv.empty()) +- { +- if (groups.size() != 0) +- { +- groups += ","; +- } +- groups += priv; +- } +- try +- { +- executeCmd("/usr/sbin/usermod", userName.c_str(), "-G", groups.c_str(), +- "-s", (sshRequested ? "/bin/sh" : "/bin/nologin")); +- } +- catch (const InternalFailure& e) +- { +- log<level::ERR>("Unable to modify user privilege / groups"); +- elog<InternalFailure>(); +- } ++ // Call The User Service to update user groups and priv on the system ++ userSrvc->updateGroupsAndPriv(userName, groupNames, priv); + + log<level::INFO>("User groups / privilege updated successfully", + entry("USER_NAME=%s", userName.c_str())); +@@ -644,19 +495,9 @@ int UserMgr::setPamModuleArgValue(const std::string& moduleName, + + void UserMgr::userEnable(const std::string& userName, bool enabled) + { +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; + throwForUserDoesNotExist(userName); +- try +- { +- executeCmd("/usr/sbin/usermod", userName.c_str(), "-e", +- (enabled ? "" : "1970-01-02")); +- } +- catch (const InternalFailure& e) +- { +- log<level::ERR>("Unable to modify user enabled state"); +- elog<InternalFailure>(); +- } ++ // Call The User Service to update user groups and priv on the system ++ userSrvc->updateUserStatus(userName, enabled); + + log<level::INFO>("User enabled/disabled state updated successfully", + entry("USER_NAME=%s", userName.c_str()), +@@ -779,54 +620,8 @@ bool UserMgr::userPasswordExpired(const std::string& userName) + + UserSSHLists UserMgr::getUserAndSshGrpList() + { +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; +- +- std::vector<std::string> userList; +- std::vector<std::string> sshUsersList; +- struct passwd pw, *pwp = nullptr; +- std::array<char, 1024> buffer{}; +- +- phosphor::user::File passwd(passwdFileName, "r"); +- if ((passwd)() == NULL) +- { +- log<level::ERR>("Error opening the passwd file"); +- elog<InternalFailure>(); +- } +- +- while (true) +- { +- auto r = fgetpwent_r((passwd)(), &pw, buffer.data(), buffer.max_size(), +- &pwp); +- if ((r != 0) || (pwp == NULL)) +- { +- // Any error, break the loop. +- break; +- } +-#ifdef ENABLE_ROOT_USER_MGMT +- // Add all users whose UID >= 1000 and < 65534 +- // and special UID 0. +- if ((pwp->pw_uid == 0) || +- ((pwp->pw_uid >= 1000) && (pwp->pw_uid < 65534))) +-#else +- // Add all users whose UID >=1000 and < 65534 +- if ((pwp->pw_uid >= 1000) && (pwp->pw_uid < 65534)) +-#endif +- { +- std::string userName(pwp->pw_name); +- userList.emplace_back(userName); +- +- // ssh doesn't have separate group. Check login shell entry to +- // get all users list which are member of ssh group. +- std::string loginShell(pwp->pw_shell); +- if (loginShell == "/bin/sh") +- { +- sshUsersList.emplace_back(userName); +- } +- } +- } +- endpwent(); +- return std::make_pair(std::move(userList), std::move(sshUsersList)); ++ // Call The User Service to get the User and SSUsers lists ++ return std::move(userSrvc->getUserAndSshGrpList()); + } + + size_t UserMgr::getIpmiUsersCount() +@@ -837,49 +632,14 @@ size_t UserMgr::getIpmiUsersCount() + + bool UserMgr::isUserEnabled(const std::string& userName) + { +- // All user management lock has to be based on /etc/shadow +- // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; +- std::array<char, 4096> buffer{}; +- struct spwd spwd; +- struct spwd* resultPtr = nullptr; +- int status = getspnam_r(userName.c_str(), &spwd, buffer.data(), +- buffer.max_size(), &resultPtr); +- if (!status && (&spwd == resultPtr)) +- { +- if (resultPtr->sp_expire >= 0) +- { +- return false; // user locked out +- } +- return true; +- } +- return false; // assume user is disabled for any error. ++ // Call The User Service to verify if user is enabled ++ return userSrvc->isUserEnabled(userName); + } + + std::vector<std::string> UserMgr::getUsersInGroup(const std::string& groupName) + { +- std::vector<std::string> usersInGroup; +- // Should be more than enough to get the pwd structure. +- std::array<char, 4096> buffer{}; +- struct group grp; +- struct group* resultPtr = nullptr; +- +- int status = getgrnam_r(groupName.c_str(), &grp, buffer.data(), +- buffer.max_size(), &resultPtr); +- +- if (!status && (&grp == resultPtr)) +- { +- for (; *(grp.gr_mem) != NULL; ++(grp.gr_mem)) +- { +- usersInGroup.emplace_back(*(grp.gr_mem)); +- } +- } +- else +- { +- log<level::ERR>("Group not found", +- entry("GROUP=%s", groupName.c_str())); +- // Don't throw error, just return empty userList - fallback +- } +- return usersInGroup; ++ // Call The User Service to get the users that belong to a group ++ return std::move(userSrvc->getUsersInGroup(groupName)); + } + + DbusUserObj UserMgr::getPrivilegeMapperObject(void) +@@ -1106,11 +866,9 @@ void UserMgr::initUserObjects(void) + { + // All user management lock has to be based on /etc/shadow + // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; +- std::vector<std::string> userNameList; +- std::vector<std::string> sshGrpUsersList; + UserSSHLists userSSHLists = getUserAndSshGrpList(); +- userNameList = std::move(userSSHLists.first); +- sshGrpUsersList = std::move(userSSHLists.second); ++ std::vector<std::string> userNameList = std::move(userSSHLists.first); ++ std::vector<std::string> sshGrpUsersList = std::move(userSSHLists.second); + + if (!userNameList.empty()) + { +@@ -1165,8 +923,10 @@ void UserMgr::initUserObjects(void) + } + } + +-UserMgr::UserMgr(sdbusplus::bus::bus& bus, const char* path) : +- Ifaces(bus, path, true), bus(bus), path(path) ++UserMgr::UserMgr(sdbusplus::bus::bus& bus, const char* path, ++ UserService::ServiceType srvc) : ++ Ifaces(bus, path, true), ++ bus(bus), path(path) + { + UserMgrIface::allPrivileges(privMgr); + std::sort(groupsMgr.begin(), groupsMgr.end()); +@@ -1274,6 +1034,7 @@ UserMgr::UserMgr(sdbusplus::bus::bus& bus, const char* path) : + } + AccountPolicyIface::accountUnlockTimeout(value32); + } ++ userSrvc = std::make_unique<UserService>(srvc, groupsMgr, privMgr); + initUserObjects(); + + // emit the signal +diff --git a/user_mgr.hpp b/user_mgr.hpp +index f5aac22..5d5ca99 100644 +--- a/user_mgr.hpp ++++ b/user_mgr.hpp +@@ -14,6 +14,7 @@ + // limitations under the License. + */ + #pragma once ++#include "user_service.hpp" + #include "users.hpp" + + #include <sdbusplus/bus.hpp> +@@ -30,8 +31,6 @@ namespace user + { + + using UserMgrIface = sdbusplus::xyz::openbmc_project::User::server::Manager; +-using UserSSHLists = +- std::pair<std::vector<std::string>, std::vector<std::string>>; + using AccountPolicyIface = + sdbusplus::xyz::openbmc_project::User::server::AccountPolicy; + +@@ -77,8 +76,10 @@ class UserMgr : public Ifaces + * + * @param[in] bus - sdbusplus handler + * @param[in] path - D-Bus path ++ * @param[in] srvc - User service to be used + */ +- UserMgr(sdbusplus::bus::bus& bus, const char* path); ++ UserMgr(sdbusplus::bus::bus& bus, const char* path, ++ UserService::ServiceType srvc); + + /** @brief create user method. + * This method creates a new user as requested +@@ -194,6 +195,8 @@ class UserMgr : public Ifaces + /** @brief object path */ + const std::string path; + ++ /** @brief user service to be used */ ++ std::unique_ptr<UserService> userSrvc; + /** @brief privilege manager container */ + std::vector<std::string> privMgr = {"priv-admin", "priv-operator", + "priv-user", "priv-noaccess"}; +diff --git a/user_service.cpp b/user_service.cpp +new file mode 100644 +index 0000000..6e11755 +--- /dev/null ++++ b/user_service.cpp +@@ -0,0 +1,789 @@ ++/* ++// Copyright (c) 2018 Intel Corporation ++// ++// Licensed under the Apache License, Version 2.0 (the "License"); ++// you may not use this file except in compliance with the License. ++// You may obtain a copy of the License at ++// ++// http://www.apache.org/licenses/LICENSE-2.0 ++// ++// Unless required by applicable law or agreed to in writing, software ++// distributed under the License is distributed on an "AS IS" BASIS, ++// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++// See the License for the specific language governing permissions and ++// limitations under the License. ++*/ ++ ++#include "user_service.hpp" ++ ++#include "file.hpp" ++#include "shadowlock.hpp" ++ ++#include <grp.h> ++#include <pwd.h> ++ ++#include <boost/algorithm/string/split.hpp> ++#include <boost/process/child.hpp> ++#include <boost/process/io.hpp> ++ ++#include <numeric> ++ ++/* anonymous namespace for User Service interface implementations. ++// Each class inside this namespace implements a special service ++// to be used for the User Manager class. This can be extended to use ++// other user management services and it should be as simple as ++// adding a new class which inherits from phosphor::user::UserServiceInterface ++*/ ++ ++namespace ++{ ++ ++std::string getCSVFromVector(std::vector<std::string> vec) ++{ ++ switch (vec.size()) ++ { ++ case 0: ++ { ++ return ""; ++ } ++ break; ++ ++ case 1: ++ { ++ return std::string{vec[0]}; ++ } ++ break; ++ ++ default: ++ { ++ return std::accumulate( ++ std::next(vec.begin()), vec.end(), vec[0], ++ [](std::string a, std::string b) { return a + ',' + b; }); ++ } ++ } ++} ++ ++bool removeStringFromCSV(std::string& csvStr, const std::string& delStr) ++{ ++ std::string::size_type delStrPos = csvStr.find(delStr); ++ if (delStrPos != std::string::npos) ++ { ++ // need to also delete the comma char ++ if (delStrPos == 0) ++ { ++ csvStr.erase(delStrPos, delStr.size() + 1); ++ } ++ else ++ { ++ csvStr.erase(delStrPos - 1, delStr.size() + 1); ++ } ++ return true; ++ } ++ return false; ++} ++ ++class ShadowService : public phosphor::user::UserServiceInterface ++{ ++ public: ++ ShadowService() = default; ++ ++ ~ShadowService() = default; ++ ++ phosphor::user::UserSSHLists getUserAndSshGrpList() const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ ++ std::vector<std::string> userList; ++ std::vector<std::string> sshUsersList; ++ ++ struct passwd pw, *pwp = nullptr; ++ std::array<char, 1024> buffer{}; ++ ++ phosphor::user::File passwd(passwdFileName, "r"); ++ if ((passwd)() == NULL) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Error opening the passwd file"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ while (true) ++ { ++ auto r = fgetpwent_r((passwd)(), &pw, buffer.data(), ++ buffer.max_size(), &pwp); ++ if ((r != 0) || (pwp == NULL)) ++ { ++ // Any error, break the loop. ++ break; ++ } ++#ifdef ENABLE_ROOT_USER_MGMT ++ // Add all users whose UID >= 1000 and < 65534 ++ // and special UID 0. ++ if ((pwp->pw_uid == 0) || ++ ((pwp->pw_uid >= 1000) && (pwp->pw_uid < 65534))) ++#else ++ // Add all users whose UID >=1000 and < 65534 ++ if ((pwp->pw_uid >= 1000) && (pwp->pw_uid < 65534)) ++#endif ++ { ++ std::string userName(pwp->pw_name); ++ userList.emplace_back(userName); ++ ++ // ssh doesn't have separate group. Check login shell entry to ++ // get all users list which are member of ssh group. ++ std::string loginShell(pwp->pw_shell); ++ if (loginShell == "/bin/sh") ++ { ++ sshUsersList.emplace_back(userName); ++ } ++ } ++ } ++ endpwent(); ++ return std::make_pair(std::move(userList), std::move(sshUsersList)); ++ } ++ ++ std::vector<std::string> ++ getUsersInGroup(const std::string& groupName) const override ++ { ++ std::vector<std::string> usersInGroup; ++ // Should be more than enough to get the pwd structure. ++ std::array<char, 4096> buffer{}; ++ struct group grp; ++ struct group* grpPtr = &grp; ++ struct group* resultPtr; ++ ++ int status = getgrnam_r(groupName.c_str(), grpPtr, buffer.data(), ++ buffer.max_size(), &resultPtr); ++ ++ if (!status && (grpPtr == resultPtr)) ++ { ++ for (; *(grp.gr_mem) != NULL; ++(grp.gr_mem)) ++ { ++ usersInGroup.emplace_back(*(grp.gr_mem)); ++ } ++ } ++ else ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Group not found", ++ phosphor::logging::entry("GROUP=%s", groupName.c_str())); ++ // Don't throw error, just return empty usersInGroup - fallback ++ } ++ return usersInGroup; ++ } ++ ++ void createUser(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv, const bool& enabled) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ ++ std::string groups = getCSVFromVector(groupNames); ++ bool sshRequested = removeStringFromCSV(groups, phosphor::user::grpSsh); ++ ++ // treat privilege as a group - This is to avoid using different file to ++ // store the same ++ if (!priv.empty()) ++ { ++ if (groups.size() != 0) ++ { ++ groups.append(","); ++ } ++ groups.append(priv); ++ } ++ ++ try ++ { ++ phosphor::user::executeCmd( ++ "/usr/sbin/useradd", userName.c_str(), "-G", groups.c_str(), ++ "-m", "-N", "-s", (sshRequested ? "/bin/sh" : "/bin/nologin"), ++ "-e", (enabled ? "" : "1970-01-02")); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to create new user"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void renameUser(const std::string& userName, ++ const std::string& newUserName) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ try ++ { ++ std::string newHomeDir = "/home/" + newUserName; ++ phosphor::user::executeCmd("/usr/sbin/usermod", "-l", ++ newUserName.c_str(), userName.c_str(), ++ "-d", newHomeDir.c_str(), "-m"); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "User rename failed", ++ phosphor::logging::entry("USER_NAME=%s", userName.c_str())); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void deleteUser(const std::string& userName) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ ++ try ++ { ++ phosphor::user::executeCmd("/usr/sbin/userdel", userName.c_str(), ++ "-r"); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::INFO>( ++ "User delete failed", ++ phosphor::logging::entry("USER_NAME=%s", userName.c_str())); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void updateGroupsAndPriv(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ ++ std::string groups = getCSVFromVector(groupNames); ++ bool sshRequested = removeStringFromCSV(groups, phosphor::user::grpSsh); ++ ++ // treat privilege as a group - This is to avoid using different file to ++ // store the same. ++ if (!priv.empty()) ++ { ++ if (groups.size() != 0) ++ { ++ groups += ","; ++ } ++ groups += priv; ++ } ++ ++ try ++ { ++ phosphor::user::executeCmd( ++ "/usr/sbin/usermod", userName.c_str(), "-G", groups.c_str(), ++ "-s", (sshRequested ? "/bin/sh" : "/bin/nologin")); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to modify user privilege / groups"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void updateUserStatus(const std::string& userName, ++ const bool& enabled) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ try ++ { ++ phosphor::user::executeCmd("/usr/sbin/usermod", userName.c_str(), ++ "-e", (enabled ? "" : "1970-01-02")); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to modify user enabled state"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ bool isUserEnabled(const std::string& userName) const override ++ { ++ // All user management lock has to be based on /etc/shadow ++ // TODO phosphor-user-manager#10 phosphor::user::shadow::Lock lock{}; ++ std::array<char, 4096> buffer{}; ++ struct spwd spwd; ++ struct spwd* resultPtr = nullptr; ++ int status = getspnam_r(userName.c_str(), &spwd, buffer.data(), ++ buffer.max_size(), &resultPtr); ++ if (!status && (&spwd == resultPtr)) ++ { ++ if (resultPtr->sp_expire >= 0) ++ { ++ return false; // user locked out ++ } ++ return true; ++ } ++ return false; // assume user is disabled for any error. ++ } ++ ++ std::vector<std::string> ++ getUserGroups(const std::string& userName) const override ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "ShadowService::getUserGroups not implemented!"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ return std::vector<std::string>(); ++ } ++ ++ void createGroup(const std::string& groupName) const override ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "ShadowService::createGroup not implemented!"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ private: ++ static constexpr const char* passwdFileName = "/etc/passwd"; ++}; ++ ++class SSSDService : public phosphor::user::UserServiceInterface ++{ ++ public: ++ SSSDService(const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs) ++ { ++ ++ createGroup(lockedGrp); ++ for (const auto& g : groups) ++ { ++ createGroup(g); ++ } ++ for (const auto& p : privs) ++ { ++ createGroup(p); ++ } ++ } ++ ++ ~SSSDService() = default; ++ ++ phosphor::user::UserSSHLists getUserAndSshGrpList() const override ++ { ++ std::vector<std::string> users; ++ std::vector<std::string> sshGroup; ++ std::vector<std::string> exeOutput; ++ ++ try ++ { ++ exeOutput = phosphor::user::executeCmd("/usr/bin/getent", "-s", ++ "sss", "passwd"); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get users information " ++ "from sssd service"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ for (const auto& userLine : exeOutput) ++ { ++ std::vector<std::string> userInfo; ++ boost::algorithm::split(userInfo, userLine, ++ boost::algorithm::is_any_of(":")); ++ // At this point userInfo is a vector containing the passwd ++ // info for the user, so we know the correct positions: ++ // 0: User name. ++ // 1: Encrypted password. ++ // 2: User ID number (UID) ++ // 3: User's group ID number (GID) ++ // 4: Full name of the user (GECOS) ++ // 5: User home directory. ++ // 6: Login shell. ++ users.emplace_back(userInfo[0]); ++ ++ // ssh doesn't have separate group. Check login shell entry to ++ // get all users list which are member of ssh group. ++ if (userInfo[6] == "/bin/sh") ++ { ++ sshGroup.emplace_back(userInfo[0]); ++ } ++ } ++ ++ return std::make_pair(std::move(users), std::move(sshGroup)); ++ } ++ ++ std::vector<std::string> ++ getUsersInGroup(const std::string& groupName) const override ++ { ++ std::vector<std::string> userList; ++ std::vector<std::string> exeOutput; ++ ++ try ++ { ++ exeOutput = phosphor::user::executeCmd("/usr/sbin/sss_groupshow", ++ groupName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get group users from sssd service"); ++ // Don't throw error, just return empty usersInGroup - return ++ return userList; ++ } ++ // exeOutput should have 5 entries ++ // 0: Group ++ // 1: GID number ++ // 2: Member users ++ // 3: Is a member of ++ // 4: Member groups ++ exeOutput[2].erase( ++ exeOutput[2].begin(), ++ std::find(exeOutput[2].begin(), exeOutput[2].end(), ':')); ++ boost::algorithm::trim_left(exeOutput[2]); ++ boost::algorithm::split(userList, exeOutput[2], ++ boost::algorithm::is_any_of(",")); ++ return userList; ++ } ++ ++ void createUser(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv, const bool& enabled) const override ++ { ++ std::string groups = getCSVFromVector(groupNames); ++ bool sshRequested = removeStringFromCSV(groups, phosphor::user::grpSsh); ++ // treat privilege as a group - This is to avoid using different file to ++ // store the same ++ if (!priv.empty()) ++ { ++ if (groups.size() != 0) ++ { ++ groups += ","; ++ } ++ groups += priv; ++ } ++ ++ try ++ { ++ phosphor::user::executeCmd( ++ "/usr/sbin/sss_useradd", "-m", "-G", groups.c_str(), "-s", ++ (sshRequested ? "/bin/sh" : "/bin/nologin"), userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to create new user in sssd service"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ // Sometimes the SSSD service needs some time to actually ++ // reflect the changes to the local DB to the NSS service, ++ // that is why we have this sleep here ... ++ std::this_thread::sleep_for(std::chrono::seconds(1)); ++ // update user status (locked/unlocked) ++ updateUserStatus(userName, enabled); ++ } ++ ++ void renameUser(const std::string& userName, ++ const std::string& newUserName) const override ++ { ++ std::vector<std::string> exeOutput; ++ // Local Domain for sssd doesn't have a rename feature ++ // so we need to first create a new user and then delete ++ // the old one. ++ // The only issue with this is that the password for the ++ // user will have to be reseted since it is a new user being created. ++ ++ // Get original user groups ++ std::vector<std::string> groups = getUserGroups(userName); ++ // Check if it has a "ssh" group by looking for the shell login ++ try ++ { ++ exeOutput = phosphor::user::executeCmd( ++ "/usr/bin/getent", "-s", "sss", "passwd", userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get information for user"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ if (exeOutput[0].find("/bin/sh")) ++ { ++ groups.emplace_back(phosphor::user::grpSsh); ++ } ++ // Call create user with the new user names and previous groups ++ // Priv is already part of the groups so that can be empty. ++ createUser(newUserName, groups, "", isUserEnabled(userName)); ++ ++ // Now delete original user ++ deleteUser(userName); ++ } ++ ++ void deleteUser(const std::string& userName) const override ++ { ++ try ++ { ++ phosphor::user::executeCmd("/usr/sbin/sss_userdel", "-r", ++ userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to delete user from sssd service"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void updateGroupsAndPriv(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv) const override ++ { ++ // local domain sssd do not allow to update all list of groups, ++ // so we will remove all groups first (except for the user one) ++ // and then all all the ones that were passed ++ std::string oldGroups = getCSVFromVector(getUserGroups(userName)); ++ std::string groups = getCSVFromVector(groupNames); ++ bool sshRequested = removeStringFromCSV(groups, phosphor::user::grpSsh); ++ // treat privilege as a group - This is to avoid using different file to ++ // store the same ++ if (!priv.empty()) ++ { ++ if (groups.size() != 0) ++ { ++ groups += ","; ++ } ++ groups += priv; ++ } ++ try ++ { ++ phosphor::user::executeCmd( ++ "/usr/sbin/sss_usermod", "-r", oldGroups.c_str(), "-a", ++ groups.c_str(), "-s", ++ (sshRequested ? "/bin/sh" : "/bin/nologin"), userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to update user groups and " ++ "priv from sssd service"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ void updateUserStatus(const std::string& userName, ++ const bool& enabled) const override ++ { ++ std::string enabledStr; ++ std::string lockedStr; ++ if (isUserEnabled(userName) == enabled) ++ { ++ return; ++ } ++ if (enabled) ++ { ++ enabledStr = "-r"; ++ lockedStr = "-U"; ++ } ++ else ++ { ++ enabledStr = "-a"; ++ lockedStr = "-L"; ++ } ++ try ++ { ++ // We will add a special locked group to identify the users ++ // that have been locked out of the system. ++ // TODO: sss_usermod is not locking user accounts for the ++ // LOCAL domain, need to find the correct PAM configuration ++ // to actually lockout users for SSSD. ++ // As a workaround we are using the pam module pam_listfile.so ++ // to lockout all users that belong to the locked group. ++ phosphor::user::executeCmd("/usr/sbin/sss_usermod", ++ enabledStr.c_str(), lockedGrp.c_str(), ++ lockedStr.c_str(), userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to update user status from sssd service"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ bool isUserEnabled(const std::string& userName) const override ++ { ++ std::vector<std::string> userGrps = getUserGroups(userName); ++ return std::find(userGrps.begin(), userGrps.end(), lockedGrp) == ++ userGrps.end(); ++ } ++ ++ std::vector<std::string> ++ getUserGroups(const std::string& userName) const override ++ { ++ std::vector<std::string> exeOutput; ++ try ++ { ++ exeOutput = ++ phosphor::user::executeCmd("/usr/bin/groups", userName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to get groups for user"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ std::vector<std::string> groups; ++ boost::algorithm::split(groups, exeOutput[0], ++ boost::algorithm::is_any_of(" ")); ++ // Delete group that equals user name if it exists ++ auto userNameGroup = std::find(groups.begin(), groups.end(), userName); ++ if (userNameGroup != groups.end()) ++ { ++ groups.erase(userNameGroup); ++ } ++ return groups; ++ } ++ ++ void createGroup(const std::string& groupName) const override ++ { ++ try ++ { ++ if (!groupExists(groupName)) ++ { ++ phosphor::user::executeCmd("/usr/sbin/sss_groupadd", ++ groupName.c_str()); ++ } ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Unable to create group"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ } ++ ++ private: ++ static const std::string lockedGrp; ++ ++ bool groupExists(const std::string& groupName) const ++ { ++ try ++ { ++ phosphor::user::executeCmd("/usr/sbin/sss_groupshow", ++ groupName.c_str()); ++ } ++ catch (const phosphor::user::InternalFailure& e) ++ { ++ return false; ++ } ++ return true; ++ } ++}; ++ ++const std::string SSSDService::lockedGrp = "sssd_locked"; ++} // anonymous namespace ++ ++namespace phosphor ++{ ++namespace user ++{ ++ ++UserService::UserService(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs) ++{ ++ setServiceImpl(srvcType, groups, privs); ++} ++ ++void UserService::updateServiceType(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs) ++{ ++ usrSrvcImpl.reset(); ++ setServiceImpl(srvcType, groups, privs); ++} ++ ++void UserService::setServiceImpl(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs) ++{ ++ switch (srvcType) ++ { ++ case ServiceType::shadow: ++ { ++ usrSrvcImpl = std::make_unique<ShadowService>(); ++ } ++ break; ++ ++ case ServiceType::sssd: ++ { ++ usrSrvcImpl = std::make_unique<SSSDService>(groups, privs); ++ } ++ break; ++ ++ case ServiceType::none: ++ default: ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Invalid service type initialization!"); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ break; ++ } ++} ++ ++UserService::~UserService() ++{} ++ ++phosphor::user::UserSSHLists UserService::getUserAndSshGrpList() const ++{ ++ return usrSrvcImpl->getUserAndSshGrpList(); ++} ++ ++std::vector<std::string> ++ UserService::getUsersInGroup(const std::string& groupName) const ++{ ++ return usrSrvcImpl->getUsersInGroup(groupName); ++} ++ ++void UserService::createUser(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv, const bool& enabled) const ++{ ++ usrSrvcImpl->createUser(userName, groupNames, priv, enabled); ++} ++ ++void UserService::renameUser(const std::string& userName, ++ const std::string& newUserName) const ++{ ++ usrSrvcImpl->renameUser(userName, newUserName); ++} ++ ++void UserService::deleteUser(const std::string& userName) const ++{ ++ usrSrvcImpl->deleteUser(userName); ++} ++ ++void UserService::updateGroupsAndPriv( ++ const std::string& userName, const std::vector<std::string>& groupNames, ++ const std::string& priv) const ++{ ++ usrSrvcImpl->updateGroupsAndPriv(userName, groupNames, priv); ++} ++ ++void UserService::updateUserStatus(const std::string& userName, ++ const bool& enabled) const ++{ ++ usrSrvcImpl->updateUserStatus(userName, enabled); ++} ++ ++bool UserService::isUserEnabled(const std::string& userName) const ++{ ++ return usrSrvcImpl->isUserEnabled(userName); ++} ++ ++std::vector<std::string> ++ UserService::getUserGroups(const std::string& userName) const ++{ ++ return usrSrvcImpl->getUserGroups(userName); ++} ++ ++} // namespace user ++} // namespace phosphor +diff --git a/user_service.hpp b/user_service.hpp +new file mode 100644 +index 0000000..50ee4db +--- /dev/null ++++ b/user_service.hpp +@@ -0,0 +1,233 @@ ++/* ++// Copyright (c) 2018 Intel Corporation ++// ++// Licensed under the Apache License, Version 2.0 (the "License"); ++// you may not use this file except in compliance with the License. ++// You may obtain a copy of the License at ++// ++// http://www.apache.org/licenses/LICENSE-2.0 ++// ++// Unless required by applicable law or agreed to in writing, software ++// distributed under the License is distributed on an "AS IS" BASIS, ++// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ++// See the License for the specific language governing permissions and ++// limitations under the License. ++*/ ++ ++#pragma once ++#include <boost/process/child.hpp> ++#include <boost/process/io.hpp> ++#include <phosphor-logging/elog.hpp> ++#include <phosphor-logging/log.hpp> ++#include <xyz/openbmc_project/Common/error.hpp> ++#include <xyz/openbmc_project/User/Common/error.hpp> ++ ++namespace phosphor ++{ ++namespace user ++{ ++ ++using UserSSHLists = ++ std::pair<std::vector<std::string>, std::vector<std::string>>; ++using InternalFailure = ++ sdbusplus::xyz::openbmc_project::Common::Error::InternalFailure; ++using InsufficientPermission = ++ sdbusplus::xyz::openbmc_project::Common::Error::InsufficientPermission; ++ ++const std::string grpSsh = "ssh"; ++ ++template <typename... ArgTypes> ++std::vector<std::string> executeCmd(const char* path, ArgTypes&&... tArgs) ++{ ++ std::vector<std::string> stdOutput; ++ boost::process::ipstream stdOutStream; ++ boost::process::child execProg(path, const_cast<char*>(tArgs)..., ++ boost::process::std_out > stdOutStream); ++ std::string stdOutLine; ++ ++ while (stdOutStream && std::getline(stdOutStream, stdOutLine) && ++ !stdOutLine.empty()) ++ { ++ stdOutput.emplace_back(stdOutLine); ++ } ++ ++ execProg.wait(); ++ ++ int retCode = execProg.exit_code(); ++ if (retCode) ++ { ++ phosphor::logging::log<phosphor::logging::level::ERR>( ++ "Command execution failed", ++ phosphor::logging::entry("PATH=%d", path), ++ phosphor::logging::entry("RETURN_CODE:%d", retCode)); ++ phosphor::logging::elog<phosphor::user::InternalFailure>(); ++ } ++ ++ return stdOutput; ++} ++ ++/** @class UserServiceInterface ++ * @brief Interface class for methods provided by the implemmentations ++ * of the user service. Provides the same methods as the UserService ++ * class. ++ */ ++class UserServiceInterface ++{ ++ public: ++ UserServiceInterface() = default; ++ virtual ~UserServiceInterface() = default; ++ virtual UserSSHLists getUserAndSshGrpList() const = 0; ++ virtual std::vector<std::string> ++ getUsersInGroup(const std::string& groupName) const = 0; ++ virtual void createUser(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv, ++ const bool& enabled) const = 0; ++ virtual void renameUser(const std::string& userName, ++ const std::string& newUserName) const = 0; ++ virtual void deleteUser(const std::string& userName) const = 0; ++ virtual void updateGroupsAndPriv(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv) const = 0; ++ virtual void updateUserStatus(const std::string& userName, ++ const bool& enabled) const = 0; ++ virtual bool isUserEnabled(const std::string& userName) const = 0; ++ virtual std::vector<std::string> ++ getUserGroups(const std::string& userName) const = 0; ++ virtual void createGroup(const std::string& groupName) const = 0; ++}; ++ ++/** @class UserService ++ * @brief Responsible for managing the user service for the user manager. ++ * This service is the one responsible to actually change the user information ++ * of the application. It can support sevaral services, currently the ones ++ * supported are: ++ * ++ * 1) Shadow: Which uses the /etc/shadow file for updating the users ++ * 2) SSSD: Which uses the sssd service for a LOCAL domain only right now. ++ */ ++class UserService ++{ ++ public: ++ UserService() = delete; ++ UserService(const UserService&) = delete; ++ UserService& operator=(const UserService&) = delete; ++ UserService(UserService&&) = delete; ++ UserService& operator=(UserService&&) = delete; ++ ++ // Service Types implemented. None is used to validate. ++ enum class ServiceType ++ { ++ none, ++ shadow, ++ sssd ++ }; ++ ++ UserService(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs); ++ ~UserService(); ++ ++ /** @brief update the current Service type of the instance. ++ * This function is used to update in real time the service ++ * being used for the user management without restarting the ++ * whole service. ++ * ++ * @param[in] srvcType ++ * @param[in] groups ++ * @param[in] privs ++ */ ++ void updateServiceType(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs); ++ ++ /** @brief get user list and SSH group members list ++ * This method gets the list of users from the service. ++ * If the userlist reference is empty, all the users will be added ++ * and DBus notified about them. If the list is not empty, the function ++ * will only update list adding the missing ones to it. It will not remove ++ * any extra users on the list that are not part of the service! ++ * ++ */ ++ UserSSHLists getUserAndSshGrpList() const; ++ ++ /** @brief Get users in group. ++ * This method creates a new user as requested ++ * ++ * @param[in] groupName - Name of the group which has to be queried ++ */ ++ std::vector<std::string> ++ getUsersInGroup(const std::string& groupName) const; ++ ++ /** @brief create user method. ++ * This method creates a new user as requested ++ * ++ * @param[in] userName - Name of the user which has to be created ++ * @param[in] groupNames - Group names list, to which user has to be added. ++ * @param[in] priv - Privilege of the user. ++ * @param[in] enabled - State of the user enabled / disabled. ++ */ ++ void createUser(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv, const bool& enabled) const; ++ ++ /** @brief rename user method. ++ * This method renames the user as requested ++ * ++ * @param[in] userName - current name of the user ++ * @param[in] userName - user name to which it has to be renamed. ++ */ ++ void renameUser(const std::string& userName, ++ const std::string& newUserName) const; ++ ++ /** @brief delete user method. ++ * This method deletes the user as requested ++ * ++ * @param[in] userName - Name of the user which has to be deleted ++ */ ++ void deleteUser(const std::string& userName) const; ++ ++ /** @brief Updates user Groups and Privilege. ++ * ++ * @param[in] userName - Name of the user which has to be modified ++ * @param[in] groupNames - Group names list for user. ++ * @param[in] priv - Privilege of the user. ++ */ ++ void updateGroupsAndPriv(const std::string& userName, ++ const std::vector<std::string>& groupNames, ++ const std::string& priv) const; ++ ++ /** @brief Updates user status ++ * If enabled = false: User will be disabled ++ * If enabled = true : User will be enabled ++ * ++ * @param[in] userName - Name of the user ++ * @param[in] enabled - Status of the user: enabled / disabled? ++ */ ++ void updateUserStatus(const std::string& userName, ++ const bool& enabled) const; ++ ++ /** @brief Verify if user is enabled or not ++ * If enabled returns true ++ * If not enabled returns false ++ * ++ * @param[in] userName - Name of the user ++ */ ++ bool isUserEnabled(const std::string& userName) const; ++ ++ /** @brief Get the list of groups a user belongs to ++ * ++ * @param[in] userName - Name of the user ++ */ ++ std::vector<std::string> getUserGroups(const std::string& userName) const; ++ ++ private: ++ // User service implementation. ++ void setServiceImpl(const ServiceType& srvcType, ++ const std::vector<std::string>& groups, ++ const std::vector<std::string>& privs); ++ std::unique_ptr<UserServiceInterface> usrSrvcImpl; ++}; ++ ++} // namespace user ++} // namespace phosphor +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0006-Use-groupmems-instead-of-getgrnam_r-due-to-overlay.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0006-Use-groupmems-instead-of-getgrnam_r-due-to-overlay.patch new file mode 100644 index 000000000..7a0eff80e --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager/0006-Use-groupmems-instead-of-getgrnam_r-due-to-overlay.patch @@ -0,0 +1,76 @@ +From 06064b3d6e56f4e13e6b85552f8525b74d9f1931 Mon Sep 17 00:00:00 2001 +From: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Date: Mon, 24 Feb 2020 13:37:12 +0530 +Subject: [PATCH 2/2] Use groupmems instead of getgrnam_r due to overlay + +With JFFS2 overlay, getgrnam_r during initial time returns the +old group details as per the lower dir, instead of the overlay one +but at the same time groupmems where returning proper values, which +reads the file everytime. Hence replacing getgrnam_r with groupmems + +Tested: +1. Verified that when added multiple user and then doing +BMC reset using ipmitool raw 6 2 doesn't reproduce the issue of +user with only ssh group. (on 38 version source + this fix) +2. Updated using redfish to version 39 + this fix, and made sure +issue doesn't happen. + +Note: For testing purpose added debug statements to dump ouput of +both getgrnam_r & groupmems and able to see proper list only +in groupmems when the issue is reproduced + +Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com> +Signed-off-by: jayaprakash Mutyala <mutyalax.jayaprakash@intel.com> +--- + user_service.cpp | 28 +++++++++++++--------------- + 1 file changed, 13 insertions(+), 15 deletions(-) + +diff --git a/user_service.cpp b/user_service.cpp +index ad4e510..89b27ed 100644 +--- a/user_service.cpp ++++ b/user_service.cpp +@@ -147,28 +147,26 @@ class ShadowService : public phosphor::user::UserServiceInterface + getUsersInGroup(const std::string& groupName) const override + { + std::vector<std::string> usersInGroup; +- // Should be more than enough to get the pwd structure. +- std::array<char, 4096> buffer{}; +- struct group grp; +- struct group* grpPtr = &grp; +- struct group* resultPtr; +- +- int status = getgrnam_r(groupName.c_str(), grpPtr, buffer.data(), +- buffer.max_size(), &resultPtr); +- +- if (!status && (grpPtr == resultPtr)) ++ std::vector<std::string> output; ++ try + { +- for (; *(grp.gr_mem) != NULL; ++(grp.gr_mem)) +- { +- usersInGroup.emplace_back(*(grp.gr_mem)); +- } ++ output = phosphor::user::executeCmd("/usr/sbin/groupmems", "-l", ++ "-g", groupName.c_str()); + } +- else ++ catch (const phosphor::user::InternalFailure& e) + { + phosphor::logging::log<phosphor::logging::level::ERR>( + "Group not found", + phosphor::logging::entry("GROUP=%s", groupName.c_str())); + // Don't throw error, just return empty usersInGroup - fallback ++ return usersInGroup; ++ } ++ if (!output.empty()) ++ { ++ boost::algorithm::trim_right(output[0]); ++ boost::algorithm::split(usersInGroup, output[0], ++ boost::algorithm::is_any_of("\t "), ++ boost::token_compress_on); + } + return usersInGroup; + } +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend new file mode 100644 index 000000000..21c7991bd --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend @@ -0,0 +1,16 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI = "git://github.com/openbmc/phosphor-user-manager" +SRCREV = "c0760c9109a0d847fd77d54c6b7948322a375d1d" + +EXTRA_OECONF += "${@bb.utils.contains_any("IMAGE_FEATURES", [ 'debug-tweaks', 'allow-root-login' ], '', '--disable-root_user_mgmt', d)}" + +SRC_URI += " \ + file://0005-Added-suport-for-multiple-user-manager-services.patch \ + file://0006-Use-groupmems-instead-of-getgrnam_r-due-to-overlay.patch \ + " + +FILES:${PN} += "${datadir}/dbus-1/system.d/phosphor-nslcd-cert-config.conf" +FILES:${PN} += "/usr/share/phosphor-certificate-manager/nslcd" +FILES:${PN} += "\ + /lib/systemd/system/multi-user.target.wants/phosphor-certificate-manager@nslcd.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/virtual-media/virtual-media.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/virtual-media/virtual-media.bb new file mode 100644 index 000000000..b8aedc6ee --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/virtual-media/virtual-media.bb @@ -0,0 +1,24 @@ +SUMMARY = "Virtual Media Service" +DESCRIPTION = "Virtual Media Service" + +SRC_URI = "git://github.com/Intel-BMC/provingground.git;protocol=ssh" +SRCREV = "bee56d62b209088454d166d1efae4825a2b175df" + +S = "${WORKDIR}/git/virtual-media" +PV = "1.0+git${SRCPV}" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${S}/LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e" + +SYSTEMD_SERVICE:${PN} += "xyz.openbmc_project.VirtualMedia.service" + +DEPENDS = "udev boost nlohmann-json systemd sdbusplus" + +RDEPENDS:${PN} = "nbd-client nbdkit" + +inherit cmake systemd + +EXTRA_OECMAKE += "-DYOCTO_DEPENDENCIES=ON" +EXTRA_OECMAKE += "-DLEGACY_MODE_ENABLED=ON" + +FULL_OPTIMIZATION = "-Os -pipe -flto -fno-rtti" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Customize-phosphor-watchdog-for-Intel-platforms.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Customize-phosphor-watchdog-for-Intel-platforms.patch new file mode 100644 index 000000000..48bc4a086 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Customize-phosphor-watchdog-for-Intel-platforms.patch @@ -0,0 +1,348 @@ +From a7d1d3770a650df8fe61d594885fcb388ac2ca42 Mon Sep 17 00:00:00 2001 +From: James Feist <james.feist@linux.intel.com> +Date: Mon, 17 Jun 2019 12:00:58 -0700 +Subject: [PATCH] Customize phosphor-watchdog for Intel platforms + +This patch adds various changes to phosphor-watchdog that are +required for compatibility with Intel platforms. + + 1. Add Redfish messages for watchdog timeout and pre-interrupt + 2. Use dbus properties for power control insted of service files + 3. Use host status to enable/disable watchdog + 4. Set preTimeoutInterruptOccurFlag + 5. Assign watchdog cause for correct reset cause reporting + 6. Add NMI Pre-Interrupt support for IPMI watchdog timer. + +Signed-off-by: James Feist <james.feist@linux.intel.com> +Signed-off-by: Ren Yu <yux.ren@intel.com> +Signed-off-by: Yong Li <yong.b.li@linux.intel.com> +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +Signed-off-by: Johnathan Mantey <johnathanx.mantey@intel.com> +Signed-off-by: Sunita Kumari <sunitax.kumari@intel.com> + +%% original patch: 0001-Customize-phosphor-watchdog-for-Intel-platforms.patch +--- + src/watchdog.cpp | 229 ++++++++++++++++++++++++++++++++++++++++++++--- + src/watchdog.hpp | 22 ++++- + 2 files changed, 240 insertions(+), 11 deletions(-) + +diff --git a/src/watchdog.cpp b/src/watchdog.cpp +index 7de98ae3e70f..f96faebc7368 100644 +--- a/src/watchdog.cpp ++++ b/src/watchdog.cpp +@@ -5,8 +5,10 @@ + #include <phosphor-logging/elog.hpp> + #include <phosphor-logging/log.hpp> + #include <sdbusplus/exception.hpp> ++#include <systemd/sd-journal.h> + #include <string_view> + #include <xyz/openbmc_project/Common/error.hpp> ++#include <xyz/openbmc_project/State/Host/server.hpp> + + namespace phosphor + { +@@ -19,10 +21,86 @@ using namespace phosphor::logging; + using sdbusplus::exception::SdBusError; + using sdbusplus::xyz::openbmc_project::Common::Error::InternalFailure; + +-// systemd service to kick start a target. +-constexpr auto SYSTEMD_SERVICE = "org.freedesktop.systemd1"; +-constexpr auto SYSTEMD_ROOT = "/org/freedesktop/systemd1"; +-constexpr auto SYSTEMD_INTERFACE = "org.freedesktop.systemd1.Manager"; ++const static constexpr char* currentHostState = "CurrentHostState"; ++const static constexpr char* hostStatusOff = ++ "xyz.openbmc_project.State.Host.HostState.Off"; ++ ++const static constexpr char* actionDescription = " due to Watchdog timeout"; ++const static constexpr char* hardResetDescription = "Hard Reset - System reset"; ++const static constexpr char* powerOffDescription = ++ "Power Down - System power down"; ++const static constexpr char* powerCycleDescription = ++ "Power Cycle - System power cycle"; ++const static constexpr char* timerExpiredDescription = "Timer expired"; ++ ++const static constexpr char* preInterruptActionNone = ++ "xyz.openbmc_project.State.Watchdog.PreTimeoutInterruptAction.None"; ++ ++const static constexpr char* preInterruptDescriptionSMI = "SMI"; ++const static constexpr char* preInterruptDescriptionNMI = "NMI"; ++const static constexpr char* preInterruptDescriptionMI = "Messaging Interrupt"; ++ ++const static constexpr char* reservedDescription = "Reserved"; ++ ++const static constexpr char* timerUseDescriptionBIOSFRB2 = "BIOS FRB2"; ++const static constexpr char* timerUseDescriptionBIOSPOST = "BIOS/POST"; ++const static constexpr char* timerUseDescriptionOSLoad = "OSLoad"; ++const static constexpr char* timerUseDescriptionSMSOS = "SMS/OS"; ++const static constexpr char* timerUseDescriptionOEM = "OEM"; ++ ++namespace restart ++{ ++static constexpr const char* busName = ++ "xyz.openbmc_project.Control.Host.RestartCause"; ++static constexpr const char* path = ++ "/xyz/openbmc_project/control/host0/restart_cause"; ++static constexpr const char* interface = ++ "xyz.openbmc_project.Control.Host.RestartCause"; ++static constexpr const char* property = "RequestedRestartCause"; ++} // namespace restart ++ ++// chassis state manager service ++namespace chassis ++{ ++static constexpr const char* busName = "xyz.openbmc_project.State.Chassis"; ++static constexpr const char* path = "/xyz/openbmc_project/state/chassis0"; ++static constexpr const char* interface = "xyz.openbmc_project.State.Chassis"; ++static constexpr const char* request = "RequestedPowerTransition"; ++} // namespace chassis ++ ++namespace host ++{ ++static constexpr const char* busName = "xyz.openbmc_project.State.Host"; ++static constexpr const char* path = "/xyz/openbmc_project/state/host0"; ++static constexpr const char* interface = "xyz.openbmc_project.State.Host"; ++static constexpr const char* request = "RequestedHostTransition"; ++} // namespace host ++ ++namespace nmi ++{ ++static constexpr const char* busName = "xyz.openbmc_project.Control.Host.NMI"; ++static constexpr const char* path = "/xyz/openbmc_project/control/host0/nmi"; ++static constexpr const char* interface = "xyz.openbmc_project.Control.Host.NMI"; ++static constexpr const char* request = "NMI"; ++ ++} // namespace nmi ++ ++void Watchdog::powerStateChangedHandler( ++ const std::map<std::string, std::variant<std::string>>& props) ++{ ++ const auto iter = props.find(currentHostState); ++ if (iter != props.end()) ++ { ++ const std::string* powerState = std::get_if<std::string>(&iter->second); ++ if (powerState && (*powerState == hostStatusOff)) ++ { ++ if (timerEnabled()) ++ { ++ enabled(false); ++ } ++ } ++ } ++} + + void Watchdog::resetTimeRemaining(bool enableWatchdog) + { +@@ -108,13 +186,111 @@ uint64_t Watchdog::interval(uint64_t value) + // Optional callback function on timer expiration + void Watchdog::timeOutHandler() + { ++ PreTimeoutInterruptAction preTimeoutInterruptAction = preTimeoutInterrupt(); ++ std::string preInterruptActionMessageArgs{}; ++ + Action action = expireAction(); ++ std::string actionMessageArgs{}; ++ ++ expiredTimerUse(currentTimerUse()); ++ ++ TimerUse timeUser = expiredTimerUse(); ++ std::string timeUserMessage{}; ++ + if (!this->enabled()) + { + action = fallback->action; + } + +- expiredTimerUse(currentTimerUse()); ++ switch (timeUser) ++ { ++ case Watchdog::TimerUse::BIOSFRB2: ++ timeUserMessage = timerUseDescriptionBIOSFRB2; ++ break; ++ case Watchdog::TimerUse::BIOSPOST: ++ timeUserMessage = timerUseDescriptionBIOSPOST; ++ break; ++ case Watchdog::TimerUse::OSLoad: ++ timeUserMessage = timerUseDescriptionOSLoad; ++ break; ++ case Watchdog::TimerUse::SMSOS: ++ timeUserMessage = timerUseDescriptionSMSOS; ++ break; ++ case Watchdog::TimerUse::OEM: ++ timeUserMessage = timerUseDescriptionOEM; ++ break; ++ default: ++ timeUserMessage = reservedDescription; ++ break; ++ } ++ ++ switch (action) ++ { ++ case Watchdog::Action::HardReset: ++ actionMessageArgs = std::string(hardResetDescription) + ++ std::string(actionDescription); ++ break; ++ case Watchdog::Action::PowerOff: ++ actionMessageArgs = std::string(powerOffDescription) + ++ std::string(actionDescription); ++ break; ++ case Watchdog::Action::PowerCycle: ++ actionMessageArgs = std::string(powerCycleDescription) + ++ std::string(actionDescription); ++ break; ++ case Watchdog::Action::None: ++ actionMessageArgs = timerExpiredDescription; ++ break; ++ default: ++ actionMessageArgs = reservedDescription; ++ break; ++ } ++ ++ // Log into redfish event log ++ sd_journal_send("MESSAGE=IPMIWatchdog: Timed out ACTION=%s", ++ convertForMessage(action).c_str(), "PRIORITY=%i", LOG_INFO, ++ "REDFISH_MESSAGE_ID=%s", "OpenBMC.0.1.IPMIWatchdog", ++ "REDFISH_MESSAGE_ARGS=%s. timer use: %s", ++ actionMessageArgs.c_str(), timeUserMessage.c_str(), NULL); ++ ++ switch (preTimeoutInterruptAction) ++ { ++ case Watchdog::PreTimeoutInterruptAction::SMI: ++ preInterruptActionMessageArgs = preInterruptDescriptionSMI; ++ break; ++ case Watchdog::PreTimeoutInterruptAction::NMI: ++ preInterruptActionMessageArgs = preInterruptDescriptionNMI; ++ break; ++ case Watchdog::PreTimeoutInterruptAction::MI: ++ preInterruptActionMessageArgs = preInterruptDescriptionMI; ++ break; ++ default: ++ preInterruptActionMessageArgs = reservedDescription; ++ break; ++ } ++ ++ if (preInterruptActionNone != convertForMessage(preTimeoutInterruptAction)) ++ { ++ preTimeoutInterruptOccurFlag(true); ++ ++ sd_journal_send("MESSAGE=IPMIWatchdog: Pre Timed out Interrupt=%s", ++ convertForMessage(preTimeoutInterruptAction).c_str(), ++ "PRIORITY=%i", LOG_INFO, "REDFISH_MESSAGE_ID=%s", ++ "OpenBMC.0.1.IPMIWatchdog", ++ "REDFISH_MESSAGE_ARGS=Timer interrupt - %s due to " ++ "Watchdog timeout. timer use: %s", ++ preInterruptActionMessageArgs.c_str(), ++ timeUserMessage.c_str(), NULL); ++ ++ if (preTimeoutInterruptAction == ++ Watchdog::PreTimeoutInterruptAction::NMI) ++ { ++ sdbusplus::message::message preTimeoutInterruptHandler; ++ preTimeoutInterruptHandler = bus.new_method_call( ++ nmi::busName, nmi::path, nmi::interface, nmi::request); ++ bus.call_noreply(preTimeoutInterruptHandler); ++ } ++ } + + auto target = actionTargetMap.find(action); + if (target == actionTargetMap.end()) +@@ -147,12 +323,45 @@ void Watchdog::timeOutHandler() + + try + { +- auto method = bus.new_method_call(SYSTEMD_SERVICE, SYSTEMD_ROOT, +- SYSTEMD_INTERFACE, "StartUnit"); +- method.append(target->second); +- method.append("replace"); ++ sdbusplus::message::message method; ++ if (action == Watchdog::Action::HardReset) ++ { ++ auto method = bus.new_method_call( ++ restart::busName, restart::path, ++ "org.freedesktop.DBus.Properties", "Set"); ++ method.append( ++ restart::interface, restart::property, ++ std::variant<std::string>("xyz.openbmc_project.State.Host." ++ "RestartCause.WatchdogTimer")); ++ bus.call_noreply(method); + +- bus.call_noreply(method); ++ method = bus.new_method_call(host::busName, host::path, ++ "org.freedesktop.DBus.Properties", ++ "Set"); ++ method.append(host::interface, host::request, ++ std::variant<std::string>(target->second)); ++ bus.call_noreply(method); ++ } ++ else ++ { ++ if (action == Watchdog::Action::PowerCycle) ++ { ++ auto method = bus.new_method_call( ++ restart::busName, restart::path, ++ "org.freedesktop.DBus.Properties", "Set"); ++ method.append(restart::interface, restart::property, ++ std::variant<std::string>( ++ "xyz.openbmc_project.State.Host." ++ "RestartCause.WatchdogTimer")); ++ bus.call_noreply(method); ++ } ++ method = bus.new_method_call(chassis::busName, chassis::path, ++ "org.freedesktop.DBus.Properties", ++ "Set"); ++ method.append(chassis::interface, chassis::request, ++ std::variant<std::string>(target->second)); ++ bus.call_noreply(method); ++ } + } + catch (const SdBusError& e) + { +diff --git a/src/watchdog.hpp b/src/watchdog.hpp +index 736e71f68fcc..79158f192f40 100644 +--- a/src/watchdog.hpp ++++ b/src/watchdog.hpp +@@ -73,7 +73,17 @@ class Watchdog : public WatchdogInherits + bus(bus), actionTargetMap(std::move(actionTargetMap)), + fallback(std::move(fallback)), minInterval(minInterval), + timer(event, std::bind(&Watchdog::timeOutHandler, this)), +- objPath(objPath) ++ objPath(objPath), powerStateChangedSignal( ++ bus, ++ sdbusplus::bus::match::rules::propertiesChanged( ++ "/xyz/openbmc_project/state/host0", ++ "xyz.openbmc_project.State.Host"), ++ [this](sdbusplus::message::message& msg) { ++ std::string objectName; ++ std::map<std::string, std::variant<std::string>> props; ++ msg.read(objectName, props); ++ powerStateChangedHandler(props); ++ }) + { + // Use default if passed in otherwise just use default that comes + // with object +@@ -90,6 +100,12 @@ class Watchdog : public WatchdogInherits + tryFallbackOrDisable(); + } + ++ /** @brief Disable watchdog when power status change meet ++ * the specific requirement ++ */ ++ void powerStateChangedHandler( ++ const std::map<std::string, std::variant<std::string>>& props); ++ + /** @brief Resets the TimeRemaining to the configured Interval + * Optionally enables the watchdog. + * +@@ -178,6 +194,10 @@ class Watchdog : public WatchdogInherits + /** @brief Contained timer object */ + sdeventplus::utility::Timer<sdeventplus::ClockId::Monotonic> timer; + ++ /** @brief Optional Callback handler when power status change meet ++ * the specific requirement */ ++ sdbusplus::bus::match_t powerStateChangedSignal; ++ + /** @brief Optional Callback handler on timer expirartion */ + void timeOutHandler(); + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/phosphor-watchdog.service b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/phosphor-watchdog.service new file mode 100644 index 000000000..35d3e8e0f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/phosphor-watchdog.service @@ -0,0 +1,15 @@ +[Unit] +Description=Phosphor Watchdog + +[Service] +ExecStart=/usr/bin/phosphor-watchdog --continue --service=xyz.openbmc_project.Watchdog \ + --path=/xyz/openbmc_project/watchdog/host0 \ + --action_target=xyz.openbmc_project.State.Watchdog.Action.HardReset=xyz.openbmc_project.State.Host.Transition.ForceWarmReboot \ + --action_target=xyz.openbmc_project.State.Watchdog.Action.PowerOff=xyz.openbmc_project.State.Chassis.Transition.Off \ + --action_target=xyz.openbmc_project.State.Watchdog.Action.PowerCycle=xyz.openbmc_project.State.Chassis.Transition.PowerCycle + +BusName=xyz.openbmc_project.Watchdog +Type=dbus + +[Install] +WantedBy=basic.target diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend new file mode 100644 index 000000000..cc439b2c5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +SRC_URI += "file://0001-Customize-phosphor-watchdog-for-Intel-platforms.patch \ + " + +# Remove the override to keep service running after DC cycle +SYSTEMD_OVERRIDE:${PN}:remove = "poweron.conf:phosphor-watchdog@poweron.service.d/poweron.conf" +SYSTEMD_SERVICE:${PN} = "phosphor-watchdog.service" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog.bb new file mode 100644 index 000000000..ac1302d9c --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog.bb @@ -0,0 +1,12 @@ +SUMMARY = "System watchdog" +DESCRIPTION = "BMC hardware watchdog service that is used to reset BMC \ + when unrecoverable events occurs" + +inherit allarch +inherit obmc-phosphor-systemd + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SYSTEMD_SERVICE:${PN} += "system-watchdog.service" +SYSTEMD_ENVIRONMENT_FILE:${PN} += "obmc/system-watchdog/system-watchdog.conf" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/obmc/system-watchdog/system-watchdog.conf b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/obmc/system-watchdog/system-watchdog.conf new file mode 100644 index 000000000..defe830a1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/obmc/system-watchdog/system-watchdog.conf @@ -0,0 +1,3 @@ +TIMEOUT=60 +INTERVAL=10 +DEVICE=/dev/watchdog1 diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/system-watchdog.service b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/system-watchdog.service new file mode 100644 index 000000000..1564fda20 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/system-watchdog/system-watchdog.service @@ -0,0 +1,11 @@ +[Unit] +Description=BMC Hardware Watchdog Daemon + +[Service] +EnvironmentFile=/etc/default/obmc/system-watchdog/system-watchdog.conf +ExecStart=/sbin/watchdog -T ${{TIMEOUT}} -t ${{INTERVAL}} -F ${{DEVICE}} +KillSignal=SIGKILL + +[Install] +WantedBy=basic.target + diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json new file mode 100644 index 000000000..348a7792d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json @@ -0,0 +1,9 @@ +{ + "customKeyEnable": true, + "keyType" : "VT100+", + "customConsoleDisplaySize": { + "width": 100, + "height": 32 + }, + "VirtualMediaEnabled" : true +} diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend new file mode 100644 index 000000000..19db93805 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend @@ -0,0 +1,4 @@ +SRC_URI = "git://github.com/Intel-BMC/phosphor-webui;protocol=ssh;branch=intel2" +FILESEXTRAPATHS:prepend:intel := "${THISDIR}/${PN}:" + +SRCREV = "b5707d7648de19350b3f308b9602c888c6418d6f" diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue/login-company-logo.svg b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue/login-company-logo.svg new file mode 100644 index 000000000..0976f72e8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue/login-company-logo.svg @@ -0,0 +1,32 @@ +<?xml version="1.0" encoding="utf-8"?>
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+ c0.3,0,0.6,0,1,0c0.3,0,0.6,0.1,0.9,0.2c0.3,0.1,0.5,0.3,0.6,0.5c0.2,0.2,0.2,0.5,0.2,0.9c0,0.4-0.1,0.7-0.2,0.9
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diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue_%.bbappend new file mode 100644 index 000000000..1273ebb29 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/webui-vue_%.bbappend @@ -0,0 +1,15 @@ +# Enable downstream autobump +SRC_URI = "git://github.com/openbmc/webui-vue.git" +SRCREV = "2a2e1021f48e2a939859ba7f4ae86c5de6df5655" + +FILESEXTRAPATHS:append := "${THISDIR}/${PN}:" +SRC_URI += " \ + file://login-company-logo.svg \ + file://logo-header.svg \ + " + +do_compile:prepend() { + cp -vf ${S}/.env.intel ${S}/.env + cp -vf ${WORKDIR}/login-company-logo.svg ${S}/src/assets/images + cp -vf ${WORKDIR}/logo-header.svg ${S}/src/assets/images +} diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/files/ldb.sh b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/ldb.sh new file mode 100644 index 000000000..176bfd7ca --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/ldb.sh @@ -0,0 +1 @@ +export LDB_MODULES_PATH=/usr/lib/ldb diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/files/locked_groups b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/locked_groups new file mode 100644 index 000000000..7c189e231 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/locked_groups @@ -0,0 +1 @@ +sssd_locked diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/files/nscd.conf b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/nscd.conf new file mode 100644 index 000000000..d2ffe5ddc --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/nscd.conf @@ -0,0 +1,2 @@ +enable-cache passwd no +enable-cache group no
\ No newline at end of file diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.conf b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.conf new file mode 100644 index 000000000..7a2786bee --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.conf @@ -0,0 +1,16 @@ +[sssd] +domains = LOCAL +services = nss, pam +config_file_version = 2 + +[nss] +enum_cache_timeout = 1 +filter_groups = root +filter_users = root + +[pam] + +[domain/LOCAL] +enumerate = true +id_provider = local +auth_provider = local diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.service b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.service new file mode 100644 index 000000000..fe2bcf8b4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/files/sssd.service @@ -0,0 +1,15 @@ +[Unit] +Description=System Security Services Daemon +# SSSD must be running before we permit user sessions +Before=systemd-user-sessions.service nss-user-lookup.target +Wants=nss-user-lookup.target + +[Service] +Environment=LDB_MODULES_PATH=/usr/lib/ldb DEBUG_LOGGER=-f +ExecStart=/usr/sbin/sssd $DEBUG_LOGGER +Type=simple +Restart=always +PIDFile=/var/run/sssd.pid + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-security/sssd/sssd_%.bbappend b/meta-openbmc-mods/meta-common/recipes-security/sssd/sssd_%.bbappend new file mode 100644 index 000000000..2c58c6321 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-security/sssd/sssd_%.bbappend @@ -0,0 +1,26 @@ +inherit obmc-phosphor-systemd + +FILESEXTRAPATHS:append := "${THISDIR}/files:" +SRC_URI += "file://sssd.conf \ + file://nscd.conf \ + file://locked_groups \ + file://ldb.sh \ + " + +PACKAGECONFIG += " systemd " +SYSTEMD_AUTO_ENABLE = "enable" + +EXTRA_OECONF += " --enable-pammoddir=${base_libdir}/security" + +do_install:append() { + # sssd creates also the /var/run link. Need to remove it to avoid conflicts + # with the one created by base-files recipe. + rm -rf ${D}/var/run + install -m 600 ${WORKDIR}/locked_groups ${D}/${sysconfdir}/${BPN} + install -m 600 ${WORKDIR}/nscd.conf ${D}/${sysconfdir} + install -d ${D}${sysconfdir}/profile.d + install -m 0644 ${WORKDIR}/ldb.sh ${D}${sysconfdir}/profile.d +} + +FILES:${PN} += " /lib/security/pam_sss.so " + diff --git a/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++/0001-enable-cross-compilation-and-pkgconfig.patch b/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++/0001-enable-cross-compilation-and-pkgconfig.patch new file mode 100644 index 000000000..7355ad5f1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++/0001-enable-cross-compilation-and-pkgconfig.patch @@ -0,0 +1,71 @@ +diff --git a/lang/c++/CMakeLists.txt b/lang/c++/CMakeLists.txt +index 28a272b15..06ec38382 100644 +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -25,6 +25,7 @@ if (NOT DEFINED CMAKE_CXX_STANDARD) + endif() + + set(CMAKE_CXX_STANDARD_REQUIRED ON) ++set(PKGCONFIG_SUPPORT ON) + + cmake_policy (SET CMP0042 NEW) + +@@ -107,6 +108,12 @@ set (AVRO_SOURCE_FILES + impl/Resolver.cc impl/Validator.cc + ) + ++if (PKGCONFIG_SUPPORT) ++ install(FILES "avrocpp.pc" ++ DESTINATION "${CMAKE_INSTALL_LIBDIR}/pkgconfig") ++ message("${CMAKE_INSTALL_LIBDIR}/pkgconfig") ++endif() ++ + add_library (avrocpp SHARED ${AVRO_SOURCE_FILES}) + + set_property (TARGET avrocpp +@@ -141,6 +148,7 @@ macro (gen file ns) + add_custom_target (${file}_hh DEPENDS ${file}.hh) + endmacro (gen) + ++if (NOT DEFINED YOCTO_BUILD) + gen (empty_record empty) + gen (bigrecord testgen) + gen (bigrecord_r testgen_r) +@@ -196,13 +204,16 @@ include (InstallRequiredSystemLibraries) + set (CPACK_PACKAGE_FILE_NAME "avrocpp-${AVRO_VERSION_MAJOR}") + + include (CPack) ++endif () + + install (TARGETS avrocpp avrocpp_s + LIBRARY DESTINATION lib + ARCHIVE DESTINATION lib + RUNTIME DESTINATION lib) + ++if (NOT DEFINED YOCTO_BUILD) + install (TARGETS avrogencpp RUNTIME DESTINATION bin) ++endif () + + install (DIRECTORY api/ DESTINATION include/avro + FILES_MATCHING PATTERN *.hh) +@@ -212,3 +223,4 @@ if (NOT CMAKE_BUILD_TYPE) + "Choose the type of build, options are: None Debug Release RelWithDebInfo MinSizeRel." + FORCE) + endif (NOT CMAKE_BUILD_TYPE) ++ +diff --git a/lang/c++/avrocpp.pc b/lang/c++/avrocpp.pc +new file mode 100644 +index 000000000..471f1863c +--- /dev/null ++++ b/avrocpp.pc +@@ -0,0 +1,10 @@ ++prefix=/usr ++libdir=${prefix}/lib ++includedir=${prefix}/include/avro ++ ++Name: avrocpp ++Description: C++ bindings for Apache avro ++Version: 1.0.0 ++Libs: -L${libdir} -lavrocpp ++Cflags: -I${includedir} ++ diff --git a/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++_git.bb b/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++_git.bb new file mode 100644 index 000000000..00c3e6089 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/avro/avro-c++_git.bb @@ -0,0 +1,22 @@ +SUMMARY = "Apache Avro data serialization system (C++ bindings)" +HOMEPAGE = "http://apr.apache.org/" +SECTION = "libs" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=43abf34d8b9908494f83c55d213a7f89" + +DEPENDS = "boost" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +BRANCH = "master" +SRCREV = "f4e2ebaadaf6e6d99b59882233f8024243adb55d" +SRC_URI = "git://github.com/apache/avro;branch=${BRANCH} \ + file://0001-enable-cross-compilation-and-pkgconfig.patch \ + " + +S = "${WORKDIR}/git/lang/c++" + +EXTRA_OECMAKE = "-DSNAPPY_INCLUDE_DIR='' -DYOCTO_BUILD=ON -DCMAKE_BUILD_TYPE=MinSizeRel" +inherit cmake + diff --git a/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend b/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend new file mode 100644 index 000000000..3dbfd7822 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/boost/boost_%.bbappend @@ -0,0 +1,8 @@ +FILES:${PN} += "/usr/lib/libboost_chrono.so* \ + /usr/lib/libboost_atomic.so* \ + /usr/lib/libboost_context.so* \ + /usr/lib/libboost_thread.so*" + +BOOST_LIBS:intel += "iostreams coroutine filesystem program_options regex system" + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-openbmc-mods/meta-common/recipes-support/curl/curl/0001-replace-krb5-config-with-pkg-config.patch b/meta-openbmc-mods/meta-common/recipes-support/curl/curl/0001-replace-krb5-config-with-pkg-config.patch new file mode 100644 index 000000000..a7db1b3c9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/curl/curl/0001-replace-krb5-config-with-pkg-config.patch @@ -0,0 +1,44 @@ +From ed70f0623708b8a6c1f58a5d243d87c5ff45b24d Mon Sep 17 00:00:00 2001 +From: Roy Li <rongqing.li@windriver.com> +Date: Tue, 26 Apr 2016 13:13:01 +0800 +Subject: [PATCH] replace krb5-config with pkg-config + +Upstream-Status: Pending + +Signed-off-by: Roy Li <rongqing.li@windriver.com> + +--- + configure.ac | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/configure.ac b/configure.ac +index 5569a26..56b0380 100755 +--- a/configure.ac ++++ b/configure.ac +@@ -1290,7 +1290,7 @@ AC_ARG_WITH(gssapi, + fi + ]) + +-: ${KRB5CONFIG:="$GSSAPI_ROOT/bin/krb5-config"} ++KRB5CONFIG=`which pkg-config` + + save_CPPFLAGS="$CPPFLAGS" + AC_MSG_CHECKING([if GSS-API support is requested]) +@@ -1301,7 +1301,7 @@ if test x"$want_gss" = xyes; then + if test -n "$host_alias" -a -f "$GSSAPI_ROOT/bin/$host_alias-krb5-config"; then + GSSAPI_INCS=`$GSSAPI_ROOT/bin/$host_alias-krb5-config --cflags gssapi` + elif test -f "$KRB5CONFIG"; then +- GSSAPI_INCS=`$KRB5CONFIG --cflags gssapi` ++ GSSAPI_INCS=`$KRB5CONFIG --cflags mit-krb5-gssapi` + elif test "$GSSAPI_ROOT" != "yes"; then + GSSAPI_INCS="-I$GSSAPI_ROOT/include" + fi +@@ -1394,7 +1394,7 @@ if test x"$want_gss" = xyes; then + elif test -f "$KRB5CONFIG"; then + dnl krb5-config doesn't have --libs-only-L or similar, put everything + dnl into LIBS +- gss_libs=`$KRB5CONFIG --libs gssapi` ++ gss_libs=`$KRB5CONFIG --libs mit-krb5-gssapi` + LIBS="$gss_libs $LIBS" + else + case $host in diff --git a/meta-openbmc-mods/meta-common/recipes-support/curl/curl_7.79.1.bb b/meta-openbmc-mods/meta-common/recipes-support/curl/curl_7.79.1.bb new file mode 100644 index 000000000..365873e15 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/curl/curl_7.79.1.bb @@ -0,0 +1,89 @@ +SUMMARY = "Command line tool and library for client-side URL transfers" +DESCRIPTION = "It uses URL syntax to transfer data to and from servers. \ +curl is a widely used because of its ability to be flexible and complete \ +complex tasks. For example, you can use curl for things like user authentication, \ +HTTP post, SSL connections, proxy support, FTP uploads, and more!" +HOMEPAGE = "http://curl.haxx.se/" +BUGTRACKER = "http://curl.haxx.se/mail/list.cgi?list=curl-tracker" +SECTION = "console/network" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://COPYING;md5=425f6fdc767cc067518eef9bbdf4ab7b" + +SRC_URI = "https://curl.haxx.se/download/curl-${PV}.tar.bz2 \ + file://0001-replace-krb5-config-with-pkg-config.patch \ +" + +SRC_URI[sha256sum] = "de62c4ab9a9316393962e8b94777a570bb9f71feb580fb4475e412f2f9387851" + +# Curl has used many names over the years... +CVE_PRODUCT = "haxx:curl haxx:libcurl curl:curl curl:libcurl libcurl:libcurl daniel_stenberg:curl" + +inherit autotools pkgconfig binconfig multilib_header + +PACKAGECONFIG ??= "${@bb.utils.filter('DISTRO_FEATURES', 'ipv6', d)} ssl libidn proxy threaded-resolver verbose zlib" +PACKAGECONFIG_class-native = "ipv6 proxy ssl threaded-resolver verbose zlib" +PACKAGECONFIG_class-nativesdk = "ipv6 proxy ssl threaded-resolver verbose zlib" + +# 'ares' and 'threaded-resolver' are mutually exclusive +PACKAGECONFIG[ares] = "--enable-ares,--disable-ares,c-ares,,,threaded-resolver" +PACKAGECONFIG[brotli] = "--with-brotli,--without-brotli,brotli" +PACKAGECONFIG[builtinmanual] = "--enable-manual,--disable-manual" +PACKAGECONFIG[dict] = "--enable-dict,--disable-dict," +PACKAGECONFIG[gnutls] = "--with-gnutls,--without-gnutls,gnutls" +PACKAGECONFIG[gopher] = "--enable-gopher,--disable-gopher," +PACKAGECONFIG[imap] = "--enable-imap,--disable-imap," +PACKAGECONFIG[ipv6] = "--enable-ipv6,--disable-ipv6," +PACKAGECONFIG[krb5] = "--with-gssapi,--without-gssapi,krb5" +PACKAGECONFIG[ldap] = "--enable-ldap,--disable-ldap," +PACKAGECONFIG[ldaps] = "--enable-ldaps,--disable-ldaps," +PACKAGECONFIG[libgsasl] = "--with-libgsasl,--without-libgsasl,libgsasl" +PACKAGECONFIG[libidn] = "--with-libidn2,--without-libidn2,libidn2" +PACKAGECONFIG[libssh2] = "--with-libssh2,--without-libssh2,libssh2" +PACKAGECONFIG[mbedtls] = "--with-mbedtls=${STAGING_DIR_TARGET},--without-mbedtls,mbedtls" +PACKAGECONFIG[mqtt] = "--enable-mqtt,--disable-mqtt," +PACKAGECONFIG[nghttp2] = "--with-nghttp2,--without-nghttp2,nghttp2" +PACKAGECONFIG[pop3] = "--enable-pop3,--disable-pop3," +PACKAGECONFIG[proxy] = "--enable-proxy,--disable-proxy," +PACKAGECONFIG[rtmpdump] = "--with-librtmp,--without-librtmp,rtmpdump" +PACKAGECONFIG[rtsp] = "--enable-rtsp,--disable-rtsp," +PACKAGECONFIG[smb] = "--enable-smb,--disable-smb," +PACKAGECONFIG[smtp] = "--enable-smtp,--disable-smtp," +PACKAGECONFIG[ssl] = "--with-ssl --with-random=/dev/urandom,--without-ssl,openssl" +PACKAGECONFIG[nss] = "--with-nss,--without-nss,nss" +PACKAGECONFIG[telnet] = "--enable-telnet,--disable-telnet," +PACKAGECONFIG[tftp] = "--enable-tftp,--disable-tftp," +PACKAGECONFIG[threaded-resolver] = "--enable-threaded-resolver,--disable-threaded-resolver,,,,ares" +PACKAGECONFIG[verbose] = "--enable-verbose,--disable-verbose" +PACKAGECONFIG[zlib] = "--with-zlib=${STAGING_LIBDIR}/../,--without-zlib,zlib" + +EXTRA_OECONF = " \ + --disable-libcurl-option \ + --disable-ntlm-wb \ + --enable-crypto-auth \ + --with-ca-bundle=${sysconfdir}/ssl/certs/ca-certificates.crt \ + --without-libpsl \ + --enable-debug \ + --enable-optimize \ + --disable-curldebug \ +" + +do_install:append:class-target() { + # cleanup buildpaths from curl-config + sed -i \ + -e 's,--sysroot=${STAGING_DIR_TARGET},,g' \ + -e 's,--with-libtool-sysroot=${STAGING_DIR_TARGET},,g' \ + -e 's|${DEBUG_PREFIX_MAP}||g' \ + ${D}${bindir}/curl-config +} + +PACKAGES =+ "lib${BPN}" + +FILES_lib${BPN} = "${libdir}/lib*.so.*" +RRECOMMENDS_lib${BPN} += "ca-certificates" + +FILES_${PN} += "${datadir}/zsh" + +inherit multilib_script +MULTILIB_SCRIPTS = "${PN}-dev:${bindir}/curl-config" + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/Add-target-to-only-build-tests-not-run-them.patch b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/Add-target-to-only-build-tests-not-run-them.patch new file mode 100644 index 000000000..e3f5c6de7 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/Add-target-to-only-build-tests-not-run-them.patch @@ -0,0 +1,45 @@ +Add target to only build tests (not run them) + +Not sending upstream as this is only a start of a solution to +installable tests: It's useful for us already as is. + +Upstream-Status: Inappropriate [not a complete solution] + +Signed-off-by: Jussi Kukkonen <jussi.kukkonen@intel.com> +Refactored for 3.4 +Signed-off-by: Armin Kuster <akuster@mvista.com> +--- + Makefile.in | 3 +++ + testsuite/Makefile.in | 2 ++ + 2 files changed, 5 insertions(+) + +diff --git a/Makefile.in b/Makefile.in +index e5ccfc7..15c9275 100644 +--- a/Makefile.in ++++ b/Makefile.in +@@ -52,6 +52,9 @@ clean distclean mostlyclean maintainer-clean tags: + echo "Making $@ in $$d" ; (cd $$d && $(MAKE) $@); done + $(MAKE) $@-here + ++buildtest: ++ echo "Making $@ in testsuite" ; (cd testsuite && $(MAKE) $@) ++ + check-here: + true + +diff --git a/testsuite/Makefile.in b/testsuite/Makefile.in +index 3f5e5f6..8fd68a3 100644 +--- a/testsuite/Makefile.in ++++ b/testsuite/Makefile.in +@@ -122,6 +122,8 @@ $(TARGETS) $(EXTRA_TARGETS): testutils.$(OBJEXT) ../nettle-internal.$(OBJEXT) \ + # data. + VALGRIND = valgrind --error-exitcode=1 --leak-check=full --show-reachable=yes @IF_ASM@ --partial-loads-ok=yes + ++buildtest: $(TS_ALL) ++ + check: $(TS_ALL) + TEST_SHLIB_DIR="$(TEST_SHLIB_DIR)" \ + srcdir="$(srcdir)" \ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/check-header-files-of-openssl-only-if-enable_.patch b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/check-header-files-of-openssl-only-if-enable_.patch new file mode 100644 index 000000000..d5f266681 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/check-header-files-of-openssl-only-if-enable_.patch @@ -0,0 +1,36 @@ +From ffee6b5f6204a0210f717968ec6ce514d70acca1 Mon Sep 17 00:00:00 2001 +From: Haiqing Bai <Haiqing.Bai@windriver.com> +Date: Fri, 9 Dec 2016 15:23:17 +0800 +Subject: [PATCH] nettle: check header files of openssl only if + 'enable_openssl=yes'. + +The original configure script checks openssl header files to generate +config.h even if 'enable_openssl' is not set to yes, this made inconsistent +building for nettle. + +Upstream-Status: Pending +Signed-off-by: Haiqing Bai <Haiqing.Bai@windriver.com> + +refactored for 3.4. pending not in as of 3.4 + +Signed-off-by: Armin Kuster <akuster@mvista.com> + +Index: nettle-3.4/configure.ac +=================================================================== +--- nettle-3.4.orig/configure.ac ++++ nettle-3.4/configure.ac +@@ -185,9 +185,11 @@ AC_HEADER_TIME + AC_CHECK_SIZEOF(long) + AC_CHECK_SIZEOF(size_t) + +-AC_CHECK_HEADERS([openssl/evp.h openssl/ecdsa.h],, +-[enable_openssl=no +- break]) ++if test "x$enable_openssl" = "xyes"; then ++ AC_CHECK_HEADERS([openssl/evp.h openssl/ecdsa.h],, ++ [enable_openssl=no ++ break]) ++fi + + # For use by the testsuite + AC_CHECK_HEADERS([valgrind/memcheck.h]) diff --git a/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/dlopen-test.patch b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/dlopen-test.patch new file mode 100644 index 000000000..ab9b91f88 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/dlopen-test.patch @@ -0,0 +1,29 @@ +Remove the relative path for libnettle.so so the test +program can find it. +Relative paths are not suitable, as the folder strucure for ptest +is different from the one expected by the nettle testsuite. + +Upstream-Status: Inappropriate [embedded specific] + +Signed-off-by: Juro Bystricky <juro.bystricky@intel.com> +Signed-off-by: Mingli Yu <mingli.yu@windriver.com> +--- + testsuite/dlopen-test.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/testsuite/dlopen-test.c b/testsuite/dlopen-test.c +index 4265bf7..1a25d17 100644 +--- a/testsuite/dlopen-test.c ++++ b/testsuite/dlopen-test.c +@@ -15,7 +15,7 @@ int + main (int argc UNUSED, char **argv UNUSED) + { + #if HAVE_LIBDL +- void *handle = dlopen ("../libnettle." SO_EXT, RTLD_NOW); ++ void *handle = dlopen ("libnettle.so", RTLD_NOW); + int (*get_version)(void); + if (!handle) + { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/run-ptest b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/run-ptest new file mode 100644 index 000000000..b90bed66d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle/run-ptest @@ -0,0 +1,36 @@ +#! /bin/sh + +cd testsuite + +failed=0 +all=0 + +for f in *-test; do + if [ "$f" = "sha1-huge-test" ] ; then + echo "SKIP: $f (skipped for ludicrous run time)" + continue + fi + + "./$f" + case "$?" in + 0) + echo "PASS: $f" + all=$((all + 1)) + ;; + 77) + echo "SKIP: $f" + ;; + *) + echo "FAIL: $f" + failed=$((failed + 1)) + all=$((all + 1)) + ;; + esac +done + +if [ "$failed" -eq 0 ] ; then + echo "All $all tests passed" +else + echo "$failed of $all tests failed" +fi + diff --git a/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle_3.7.2.bb b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle_3.7.2.bb new file mode 100644 index 000000000..957650b3b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/nettle/nettle_3.7.2.bb @@ -0,0 +1,57 @@ +SUMMARY = "A low level cryptographic library" +DESCRIPTION = "Nettle is a cryptographic library that is designed to fit easily in more or less any context: In crypto toolkits for object-oriented languages (C++, Python, Pike, ...), in applications like LSH or GNUPG, or even in kernel space." +HOMEPAGE = "http://www.lysator.liu.se/~nisse/nettle/" +DESCRIPTION = "It tries to solve a problem of providing a common set of \ +cryptographic algorithms for higher-level applications by implementing a \ +context-independent set of cryptographic algorithms" +SECTION = "libs" +LICENSE = "LGPLv3+ | GPLv2+" + +LIC_FILES_CHKSUM = "file://COPYING.LESSERv3;md5=6a6a8e020838b23406c81b19c1d46df6 \ + file://COPYINGv2;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://serpent-decrypt.c;beginline=14;endline=36;md5=ca0d220bc413e1842ecc507690ce416e \ + file://serpent-set-key.c;beginline=14;endline=36;md5=ca0d220bc413e1842ecc507690ce416e" + +DEPENDS += "gmp" + +SRC_URI = "${GNU_MIRROR}/${BPN}/${BP}.tar.gz \ + file://Add-target-to-only-build-tests-not-run-them.patch \ + file://run-ptest \ + file://check-header-files-of-openssl-only-if-enable_.patch \ + " + +SRC_URI:append:class-target = "\ + file://dlopen-test.patch \ + " + +SRC_URI[sha256sum] = "8d2a604ef1cde4cd5fb77e422531ea25ad064679ff0adf956e78b3352e0ef162" + +UPSTREAM_CHECK_REGEX = "nettle-(?P<pver>\d+(\.\d+)+)\.tar" + +inherit autotools ptest multilib_header + +EXTRA_AUTORECONF += "--exclude=aclocal" + +EXTRA_OECONF = "--disable-openssl" + +do_compile_ptest() { + oe_runmake buildtest +} + +do_install:append() { + oe_multilib_header nettle/version.h +} + +do_install_ptest() { + install -d ${D}${PTEST_PATH}/testsuite/ + install ${S}/testsuite/gold-bug.txt ${D}${PTEST_PATH}/testsuite/ + install ${S}/testsuite/*-test ${D}${PTEST_PATH}/testsuite/ + # tools can be found in PATH, not in ../tools/ + sed -i -e 's|../tools/||' ${D}${PTEST_PATH}/testsuite/*-test + install ${B}/testsuite/*-test ${D}${PTEST_PATH}/testsuite/ +} + +RDEPENDS:${PN}-ptest += "${PN}-dev" +INSANE_SKIP:${PN}-ptest += "dev-deps" + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/default b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/default new file mode 100644 index 000000000..b9f8e0363 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/default @@ -0,0 +1 @@ +EXTRA_ARGS="-r /dev/hwrng" diff --git a/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/init b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/init new file mode 100644 index 000000000..13f0ecd37 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/init @@ -0,0 +1,42 @@ +#!/bin/sh +# +# This is an init script for openembedded +# Copy it to @SYSCONFDIR@/init.d/rng-tools and type +# > update-rc.d rng-tools defaults 60 +# + +rngd=@SBINDIR@/rngd +test -x "$rngd" || exit 1 + +[ -r @SYSCONFDIR@/default/rng-tools ] && . "@SYSCONFDIR@/default/rng-tools" + +case "$1" in + start) + echo -n "Starting random number generator daemon" + start-stop-daemon -S -q -x $rngd -- $EXTRA_ARGS + echo "." + ;; + stop) + echo -n "Stopping random number generator daemon" + start-stop-daemon -K -q -n rngd + echo "." + ;; + reload|force-reload) + echo -n "Signalling rng daemon restart" + start-stop-daemon -K -q -s 1 -x $rngd + start-stop-daemon -K -q -s 1 -x $rngd + ;; + restart) + echo -n "Stopping random number generator daemon" + start-stop-daemon -K -q -n rngd + echo "." + echo -n "Starting random number generator daemon" + start-stop-daemon -S -q -x $rngd -- $EXTRA_ARGS + echo "." + ;; + *) + echo "Usage: @SYSCONFDIR@/init.d/rng-tools {start|stop|reload|restart|force-reload}" + exit 1 +esac + +exit 0 diff --git a/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/rngd.service b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/rngd.service new file mode 100644 index 000000000..d76e9a0c4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools/rngd.service @@ -0,0 +1,10 @@ +[Unit] +Description=Hardware RNG Entropy Gatherer Daemon + +[Service] +EnvironmentFile=-@SYSCONFDIR@/default/rng-tools +ExecStart=@SBINDIR@/rngd -f $EXTRA_ARGS +Nice=15 + +[Install] +WantedBy=multi-user.target diff --git a/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools_6.7.bb b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools_6.7.bb new file mode 100644 index 000000000..3bbdcc351 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-support/rng-tools/rng-tools_6.7.bb @@ -0,0 +1,52 @@ +SUMMARY = "Random number generator daemon" +DESCRIPTION = "Check and feed random data from hardware device to kernel" +AUTHOR = "Philipp Rumpf, Jeff Garzik <jgarzik@pobox.com>, \ + Henrique de Moraes Holschuh <hmh@debian.org>" +HOMEPAGE = "https://github.com/nhorman/rng-tools" +BUGTRACKER = "https://github.com/nhorman/rng-tools/issues" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://COPYING;md5=b234ee4d69f5fce4486a80fdaf4a4263" +DEPENDS = "sysfsutils" + +SRC_URI = "\ + git://github.com/nhorman/rng-tools.git \ + file://init \ + file://default \ + file://rngd.service \ +" +SRCREV = "9fc873c5af0e392632e6b736938b811f7ca97251" + +S = "${WORKDIR}/git" + +inherit autotools update-rc.d systemd pkgconfig + +PACKAGECONFIG ??= "libgcrypt libjitterentropy" +PACKAGECONFIG:libc-musl = "libargp libjitterentropy" + +PACKAGECONFIG[libargp] = "--with-libargp,--without-libargp,argp-standalone," +PACKAGECONFIG[libgcrypt] = "--with-libgcrypt,--without-libgcrypt,libgcrypt," +PACKAGECONFIG[libjitterentropy] = "--enable-jitterentropy,--disable-jitterentropy,libjitterentropy" +PACKAGECONFIG[libp11] = "--with-pkcs11,--without-pkcs11,libp11 openssl" +PACKAGECONFIG[nistbeacon] = "--with-nistbeacon,--without-nistbeacon,curl libxml2 openssl" + +INITSCRIPT_NAME = "rng-tools" +INITSCRIPT_PARAMS = "start 03 2 3 4 5 . stop 30 0 6 1 ." + +SYSTEMD_SERVICE:${PN} = "rngd.service" + +# Refer autogen.sh in rng-tools +do_configure:prepend() { + cp ${S}/README.md ${S}/README +} + +do_install:append() { + install -Dm 0644 ${WORKDIR}/default ${D}${sysconfdir}/default/rng-tools + install -Dm 0755 ${WORKDIR}/init ${D}${sysconfdir}/init.d/rng-tools + install -Dm 0644 ${WORKDIR}/rngd.service \ + ${D}${systemd_system_unitdir}/rngd.service + sed -i \ + -e 's,@SYSCONFDIR@,${sysconfdir},g' \ + -e 's,@SBINDIR@,${sbindir},g' \ + ${D}${sysconfdir}/init.d/rng-tools \ + ${D}${systemd_system_unitdir}/rngd.service +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/beeper-test.bb b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/beeper-test.bb new file mode 100644 index 000000000..0610ec5a4 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/beeper-test.bb @@ -0,0 +1,14 @@ +SUMMARY = "Beeper Test App" +DESCRIPTION = "Beeper Test Application for pwm-beeper" + +inherit cmake + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM += "\ + file://beeper-test.cpp;beginline=2;endline=14;md5=c451359f18a13ee69602afce1588c01a \ + " + +SRC_URI = "\ + file://CMakeLists.txt;subdir=${BP} \ + file://beeper-test.cpp;subdir=${BP} \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/.clang-format b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/.clang-format new file mode 100644 index 000000000..ea71ad6e1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/.clang-format @@ -0,0 +1,99 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: false +AlignOperands: true +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: true +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: false +PointerAlignment: Left +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 5 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.hpp"' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 2 + - Regex: '^<.*' + Priority: 3 + - Regex: '.*' + Priority: 4 +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +KeepEmptyLinesAtTheStartOfBlocks: true +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +ReflowComments: true +SortIncludes: true +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp11 +TabWidth: 4 +UseTab: Never +... + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/CMakeLists.txt new file mode 100644 index 000000000..81a0c7e81 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(beeper-test CXX) +set(CMAKE_CXX_STANDARD 17) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +add_executable(beeper-test beeper-test.cpp) +install(TARGETS beeper-test DESTINATION bin) + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/beeper-test.cpp b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/beeper-test.cpp new file mode 100644 index 000000000..31dafdd88 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/beeper-test/files/beeper-test.cpp @@ -0,0 +1,81 @@ +/* +// Copyright (c) 2019 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// Abstract: pwm-beeper test application +// +*/ + +#include <fcntl.h> +#include <linux/input.h> +#include <stdio.h> +#include <unistd.h> + +#include <cstring> +#include <iostream> + +int main(int argc, char** argv) +{ + if (argc < 3) + { + std::cout << "usage: <input device> <sequence of 'tone in " + "Hz','duration in ms' pair>\n"; + std::cout << "example: beeper-test /dev/input/event0 " + "2100,100,0,150,2500,50,0,50,2200,100\n"; + return 1; + } + + int fd; + if ((fd = open(argv[1], O_RDWR | O_CLOEXEC)) < 0) + { + perror("Failed to open input device"); + return -1; + } + + struct input_event event; + event.type = EV_SND; + event.code = SND_TONE; + + char* pch = strtok(argv[2], ","); + while (pch != NULL) + { + event.value = atoi(pch); + + pch = strtok(NULL, ","); + if (!pch) + { + std::cerr << "Invalid tone,duration pair\n"; + close(fd); + return -1; + } + + int durationMs = atoi(pch); + + if (write(fd, &event, sizeof(struct input_event)) != + sizeof(struct input_event)) + { + perror("Failed to write a tone sound event"); + close(fd); + return -1; + } + + usleep(durationMs * 1000); + + pch = strtok(NULL, ","); + } + + close(fd); + + return 0; +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/dimmsensor.bb b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/dimmsensor.bb new file mode 100644 index 000000000..0a6cbee25 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/dimmsensor.bb @@ -0,0 +1,17 @@ +SUMMARY = "Dimm Sensor" +DESCRIPTION = "Dimm Sensor Executable" + +SRC_URI = "\ + file://CMakeLists.txt \ + file://DimmSensor.cpp \ + " + +LICENSE = "CLOSED" + +S = "${WORKDIR}" + +inherit cmake + +# linux-libc-headers guides this way to include custom uapi headers +CXXFLAGS:append = " -I ${STAGING_KERNEL_DIR}/include/uapi" +do_configure[depends] += "virtual/kernel:do_shared_workdir" diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/CMakeLists.txt new file mode 100644 index 000000000..6262f8dee --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(dimmsensor CXX) +set(CMAKE_CXX_STANDARD 14) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +add_executable(dimmsensor DimmSensor.cpp) +install (TARGETS dimmsensor DESTINATION bin) + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/DimmSensor.cpp b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/DimmSensor.cpp new file mode 100644 index 000000000..9cc13c2a5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/dimmsensor/files/DimmSensor.cpp @@ -0,0 +1,143 @@ +#include <fcntl.h> +#include <stdlib.h> +#include <sys/ioctl.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> +#include <cassert> +#include <cstdint> +#include <cstring> +#include <iostream> +#include <memory> +#include <vector> +#include <linux/aspeed_peci_ioctl.h> + +#define PECI_DIMM_TEMP_REG 0x150 +#define DIMM_DEFAULT_VALUE 0x55 + +class DimmConfig { + public: + uint8_t chanId, bus, device, function, dimmnum; +}; + +#define MAX_BUFFER_SIZE 32 + +// TODO get this from config +auto GetDimmConfig(uint8_t dimm) { + uint8_t chan = dimm / 2; + assert(chan < 6); + + auto ret = std::make_unique<DimmConfig>(); + + ret->chanId = chan; + ret->dimmnum = 2; + ret->bus = 2; + switch (chan) { + case 0: + ret->device = 10; + ret->function = 2; + break; + case 1: + ret->device = 10; + ret->function = 6; + break; + case 2: + ret->device = 11; + ret->function = 2; + break; + case 3: + ret->device = 12; + ret->function = 2; + break; + case 4: + ret->device = 12; + ret->function = 6; + break; + case 5: + ret->device = 13; + ret->function = 2; + break; + default: + assert(0); + break; + } + + return ret; +} + +// returns read vector on success, empty vector on failure +auto peci_config_local(uint8_t u8target, uint8_t u8bus, uint8_t u8device, + uint8_t u8fcn, uint16_t u16reg, uint8_t u8readlen) { + auto msg = std::make_unique<peci_xfer_msg>(); + uint32_t u32Address; + int fd; + std::vector<uint8_t> ret; + + u32Address = u16reg; + u32Address |= u8fcn << 12; + u32Address |= u8device << 15; + u32Address |= u8bus << 20; + + msg->client_addr = u8target; + msg->tx_len = RDPCICFGLOCAL_WRITE_LEN; + msg->rx_len = RDPCICFGLOCAL_READ_LEN_BASE + u8readlen; + + msg->tx_buf[0] = RDPCICFGLOCAL_PECI_CMD; + msg->tx_buf[2] = u32Address & 0xFF; + msg->tx_buf[3] = (u32Address >> 8) & 0xFF; + msg->tx_buf[4] = (u32Address >> 16) & 0xFF; + + fd = open("/dev/peci", O_RDWR | O_CLOEXEC); + if (fd >= 0) { + int success = ioctl(fd, PECI_IOC_XFER, msg.get()); + if (success == 0) { + if (DEV_PECI_CC_SUCCESS == msg->rx_buf[0]) { + ret.resize(RDPCICFGLOCAL_READ_LEN_BASE + u8readlen - 1); + memcpy(ret.data(), &(msg->rx_buf[1]), ret.size()); + } + } + close(fd); + } + return ret; +} + +int main(int argc, char** argv) { + if (argc != 3) { + std::cout << argv[0] << " requires 2 arguments: CPUNum, DimmNum.\n"; + return -1; + } + uint8_t cpunum = atoi(argv[1]); + if (cpunum > 3) { + std::cout << cpunum << " greater than cpu max of 3.\n"; + return -1; + } + uint8_t dimmnum = atoi(argv[2]); + if (dimmnum > 11) { + std::cout << dimmnum << " greater than dimm max of 11.\n"; + return -1; + } + + auto dimm_config = GetDimmConfig(dimmnum); + + uint8_t dimmSelect = dimmnum % 2; // dimm 0 or 1 for each config + + auto val = peci_config_local(PECI_BASE_ADDR + cpunum, dimm_config->bus, + dimm_config->device, dimm_config->function, + PECI_DIMM_TEMP_REG + dimmSelect * 4, 4); + + if (!val.size()) { + std::cout << "Peci Error\n"; + return -1; + } + + // TODO dimm offsets needed? + + if (val[0] == 0) + std::cout << "Dimm " << unsigned(dimmnum) << " CPU " << unsigned(cpunum) + << " not populated.\n"; + else if(val[0] == DIMM_DEFAULT_VALUE) + std::cout << "Dimm " << unsigned(dimmnum) << " CPU " << unsigned(cpunum) + << " in illegal state.\n"; + else + std::cout << unsigned(val[0]) << " degrees C.\n"; +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/files/CMakeLists.txt new file mode 100644 index 000000000..5a049e9ff --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/files/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(i3c-tools C) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +include_directories(include) +add_executable(i3ctransfer i3ctransfer.c) +install(TARGETS i3ctransfer DESTINATION bin) diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/i3c-tools.bb b/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/i3c-tools.bb new file mode 100644 index 000000000..89246bbdf --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/i3c-tools/i3c-tools.bb @@ -0,0 +1,25 @@ +SUMMARY = "i3c-tools" +DESCRIPTION = "Set of tools to interact with i3c devices from user space" + +SRC_URI = "git://github.com/vitor-soares-snps/i3c-tools.git" +SRCREV = "5d752038c72af8e011a2cf988b1476872206e706" + +S = "${WORKDIR}/git" + +PV = "0.1+git${SRCPV}" + +LICENSE = "GPL-2.0" +LIC_FILES_CHKSUM = "\ + file://i3ctransfer.c;beginline=1;endline=6;md5=8a1ae5c1aaf128e640de497ceaa9935e \ + " + +inherit cmake + +SRC_URI += "\ + file://CMakeLists.txt \ + " + +do_configure:prepend() { + cp -f ${WORKDIR}/CMakeLists.txt ${S} +} + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/intel-signed-image/files/genimage-si.ini b/meta-openbmc-mods/meta-common/recipes-utilities/intel-signed-image/files/genimage-si.ini new file mode 100644 index 000000000..38609ad5d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/intel-signed-image/files/genimage-si.ini @@ -0,0 +1,277 @@ +; +; Copyright 2015 Intel Corporation. +; +; The source code, information and material ("Material") contained herein is +; owned by Intel Corporation or its suppliers or licensors, and title to such +; Material remains with Intel Corporation or its suppliers or licensors. The +; Material contains proprietary information of Intel or its suppliers and +; licensors. The Material is protected by worldwide copyright laws and treaty +; provisions. No part of the Material may be used, copied, reproduced, +; modified, published, uploaded, posted, transmitted, distributed or disclosed +; in any way without Intel's prior express written permission. No license under +; any patent, copyright or other intellectual property rights in the Material +; is granted to or conferred upon you, either expressly, by implication, +; inducement, estoppel or otherwise. Any license under such intellectual +; property rights must be express and approved by Intel in writing. + +; +; This file is similar to the config.genimage2 file of previous BMC +; generations but it is not generated. It contains all of the information +; to generate the signed-image variant of the signtool config file. +; + +[GLOBAL] +Major = 0 +Minor = 72 +Output = update.bin +Alloc = 33792K ; 0x2100000 +BlockSize = 64K +Type = 0xffffffff ; generate top level composite image +Locate = 0 +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Factory ROM file generation +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +RomOutput = rom-a-only.ima +RomAlloc = 33M +KeyRegion = Certificate +NewKeyRegion = ReplacementCertificate +SecVersion = 0 + + + +; RecoveryOnly items should be place first in the image + +[FRISBEE_ROM] +Major = 1 +Minor = 5 +Type = ROBL +File = frisbee.bin +Locate = 0x00000000 +Alloc = 240K +Compress = 0 +SecVersion = 1 +Unsigned = 1 + +[Certificate] +Locate = 0x3c000 +Type = CERT +Alloc = 8K +Fill = 0xff +Unsigned = 1 +ROMOnly = 1 +SecVersion = 0 + +;[FWPRODUCTID] +;Major = 1 +;Minor = 0 +;Type = FWID +;File = fwproductid.bin +;Locate = 0x0003f000 +;ROMOnly = 1 +;SecVersion = 0 + +[FRISBEE_UPD] +Major = 1 +Minor = 5 +Type = RWBL +File = frisbee.bin +Locate = 0x040000 +Alloc = 256K +Compress = 0 +SecVersion = 1 +IndivSign = 1 +SigOffset = 0x03e000 + +[U-Boot] +Major = 1 +Minor = 5 +Type = UBT\x00 +File = u-boot.bin +Alloc = 256K +Compress = 0 +SecVersion = 1 +IndivSign = 1 +SigOffset = 0x03e000 + +; Linux OS Image +[OSIMAGE] +Major = 1 +Minor = 1 +Type = LKNL +File = uImage +SecVersion = 1 + +[DTB] +Major = 1 +Minor = 1 +Type = DTB\x00 +File = uImage-aspeed-bmc-intel-ast2500.dtb +SecVersion = 0 + +; Root File System +[ROOT] +Major = 1 +Minor = 1 +Type = RtFS +File = image-rofs.squashfs-xz.u-boot +Load = 0x83000000 +SecVersion = 1 +; +; WWW File System in CRAMFS. +;[WWW] +;Major = 1 +;Minor = 1 +;Type = WWW\x00 +;File = webfs.bin +;BlockDev = 1 +;SecVersion = 1 + +; Replacement certificate for re-keying the BMC +; Will only be added to image if -rk is specified +[ReplacementCertificate] +Major = 1 +Minor = 1 +Type = CRT0 +Alloc = 4K +SecVersion = 0 +Compress = 0 +IndivSign = 1 +Unbound = 1 +Fill = 0xff +SigOffset = 0x800 + +; Manifest goes here +; This gets some special treatment (this needs to match the location +; that Frisbee thinks the manifest is at or it won't boot) +[Manifest] +Major = 0 +Minor = 0 +Type = MFST +Alloc = 4K +Locate = 0x1bff000 +Fill = 0xff +SecVersion = 0 + +; +; NV File System in JFFS2, but it is blank in the ROM version +; and filled in with defaults from the rootfs +[PARAMS] +Major = 1 +Minor = 1 +Type = CONF +Alloc = 4096K +Locate = 0x1c00000 +ROMOnly = 1 +BlockDev = 1 +SecVersion = 1 +Unsigned = 1 + +; notice that these sections have no file +; and are marked as ROMOnly. This forces them +; into the allocation so we don't get overlapping +; sections, but does not actually put anything into +; the rom at build time. + +[UBootEnv] +Major = 1 +Minor = 0 +Type = UENV +; File = ; no file makes this a placeholder +Locate = 0x2000000 +Alloc = 64K +BlockDev = 1 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +[FRUData] +Major = 1 +Minor = 0 +Type = FRU\x00 +Alloc = 64K +Locate = 0x2010000 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +[SEL] +Major = 1 +Minor = 0 +Type = SEL\x00 +Alloc = 512K +Locate = 0x2020000 +BlockDev = 1 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +; NV filesystem that survives reset mfg defaults. +; OEM Web customization goes here. +[PersistentNV] +Major = 1 +Minor = 0 +Type = PNV\x00 +Alloc = 2048K +Locate = 0x20a0000 +BlockDev = 1 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +[RubixLog] +Major = 1 +Minor = 0 +Type = BTLG +Alloc = 4K +Locate = 0x23fe000 +BlockDev = 0 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +[BootPointer] +Major = 1 +Minor = 0 +Type = BPTR +Alloc = 4K +Locate = 0x23ff000 +BlockDev = 0 +ROMOnly = 1 +Unsigned = 1 +SecVersion = 0 + +; +; Example Section with all possible fields with their default +; values, unless the field is specified mandatory +; +;[EXAMPLE] +;Major = 0 ; Major number of module +;Minor = 0 ; Minor number of module +;Type = TYPE ; four bytes hopefully human readable, +; ; use c-style escapes if non-ascii, \x23\x10\x00\xf3 +; ; or use a number 0xf3001023 +;Alloc = X ; Maximum memory allocated; X = roundup +;File = name ; File containing the module +; ; If Alloc is specified, but no File, a blank +; ; header will be created (only useful for ROMOnly) +;Locate = addr ; Location in Flash; MANDATORY +;ROMOnly = 1 ; if ROMOnly is set and non-zero, this section +; ; will only be present in the ROM image, not the updater image +;RecoveryOnly = 1 ; if RecoveryOnly is set and non-zero, this section +; ; will only be present in the recovery image, not the active image +;BlockDev = 1 ; this will make the signed image code export this +; ; image as a mtd block device at runtime +;Unsigned = 1 ; Do not include this section in signatures (NV data) +;Compress = 1 ; compress image contents (useful for non-compressed items) +;SecVersion = X ; a 16-bit security revision to enforce no downgrades +;IndivSign = 1 ; section is individually signed; do not include in full signature +;Unbound = 1 ; by default, individually signed sections are part of the +; ; full signature too. This makes them independent +;SigOffset = X ; offset within individually-signed section to place signature +;Fill = xx ; fill with pattern xx instead of a file's contents +; +; Note: Numeric values can be represented either by decimal or a +; hexadecimal (Prefixed by 0x) +; Numeric values can either end with K or M to specify in +; KiloBytes or MegaBytes +; diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/CMakeLists.txt new file mode 100644 index 000000000..0c98160b9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(io-app C) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +add_executable(io io-app.c) +install (TARGETS io DESTINATION bin) + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/io-app.c b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/io-app.c new file mode 100644 index 000000000..955674fa6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/files/io-app.c @@ -0,0 +1,696 @@ +/* +// Copyright (c) 2017 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// Abstract: map io region to read or write to HW registers +// +*/ + +#define _GNU_SOURCE +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> +#include <termios.h> +#include <ctype.h> +#include <fcntl.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <sys/mman.h> + +static int quiet = 0; + +static int dump(unsigned long phys, void *addr, size_t len) +{ + const uint32_t *ubuf = addr; + unsigned int wd = 0, l, iv; + unsigned char *h, *a; + char line[256]; + static const char itoh[] = "0123456789abcdef"; + + /* 0 1 2 3 4 5 6 + * 0123456789012345678901234567890123456789012345678901234567890123456789 + * 00000000: 00000000 00000000 00000000 00000000 ................ + */ + while (wd < len) + { + memset(line, ' ', sizeof(line)); + sprintf(line, "%08lx: ", phys + (wd*sizeof(uint32_t))); + a = (unsigned char*)&line[47]; + h = (unsigned char*)&line[10]; + for (l=0; l<4 && (l+wd)<len; l++) + { + uint32_t v = *ubuf++; + for (iv=0; iv<sizeof(v); iv++) + { + uint8_t b = v >> (8*((sizeof(v)-1)-iv)); + *h++ = itoh[b>>4]; + *h++ = itoh[b&0xf]; + if (isprint(b)) + *a++ = (char)b; + else + *a++ = '.'; + } + *h++ = ' '; + } + *a++ = '\n'; + *a = 0; + wd += l; + fputs(line, stdout); + } + return wd; +} + + +struct mapping +{ + unsigned long phys; + void *virt; + size_t len; +}; + +static struct mapping *maps = NULL; +static int nr_maps = 0; + +static void unmap_all(void) +{ + int i; + for (i=0; i<nr_maps; i++) + { + if (maps[i].virt) + munmap(maps[i].virt, maps[i].len); + maps[i].virt = NULL; + } +} + +int add_a_map(unsigned long phys, void *virt, size_t len) +{ + void *new_maps; + new_maps = realloc(maps, (nr_maps + 1) * sizeof(struct mapping)); + if (!new_maps) + { + unmap_all(); + munmap(virt, len); + } + else + { + maps = new_maps; + maps[nr_maps].phys = phys; + maps[nr_maps].virt = virt; + maps[nr_maps].len = len; + nr_maps++; + return 0; + } + return -1; +} + +static void *map_fd(int fd, off_t offset, size_t len, int mode, int flags) +{ + void *mapped_at; + unsigned long phys = -1; + + if (offset != -1) + phys = offset; + else + offset = 0; + + mapped_at = mmap(NULL, len, mode, flags, fd, offset); + if (mapped_at != MAP_FAILED) + { + if (add_a_map(phys, mapped_at, len) != 0) + { + mapped_at = MAP_FAILED; + } + } + + return mapped_at; +} + +static void *map_file(const char *fname, size_t *len, int mode, int flags) +{ + int fd; + struct stat sb; + void *ptr; + int fmode; + + if (mode & PROT_WRITE) + fmode = O_RDWR; + else + fmode = O_RDONLY; + + fd = open(fname, fmode); + if (fd < 0) + return MAP_FAILED; + + if (*len == 0) + { + fstat(fd, &sb); + *len = sb.st_size; + } + ptr = map_fd(fd, -1, *len, mode, flags); + close(fd); + return ptr; +} + +static int load_maps(const char *cmap_str, size_t mlen) +{ + char *tmp_sa = NULL, *tmp_sl = NULL, *endptr = NULL; + const void *mapped = NULL; + int ret = 0; + const char *delim = "\r\n\t ,"; + unsigned long addr; + size_t len; + char *map_str = NULL, *paddr = NULL, *plen = NULL; + int fd; + + fd = open("/dev/mem", O_RDWR); + if (fd < 0) + { + return -1; + } + + len = strlen(cmap_str); + map_str = (char *)malloc(len + 1); + if (!map_str) + { + close(fd); + return -1; + } + strncpy(map_str, cmap_str, len); + map_str[len] = '\0'; + paddr = strtok_r(map_str, delim, &tmp_sa); + while (paddr) + { + /* find the next comma or newline */ + if (!strtok_r(paddr, ":", &tmp_sl)) + { + fprintf(stderr, "malformed map string '%s'\n", paddr); + goto _loop; + } + plen = strtok_r(NULL, ":", &tmp_sl); + if (!plen) + { + goto _loop; + } + addr = strtoul(paddr, &endptr, 16); + if (*endptr) + { + fprintf(stderr, "Failed to parse address from '%s'\n", paddr); + ret = -1; + break; + } + len = strtoul(plen, &endptr, 16); + if (*endptr) + { + fprintf(stderr, "Failed to parse len from '%s'\n", plen); + ret = -1; + break; + } + if (MAP_FAILED == (mapped = map_fd(fd, addr, len, PROT_READ|PROT_WRITE, MAP_SHARED))) + { + fprintf(stderr, "Failed to map %lx +%x\n", addr, len); + ret = -1; + break; + } + if (!quiet) + printf("added map: %p (%lx..%lx)\n", mapped, addr, addr+len); +_loop: + paddr = strtok_r(NULL, delim, &tmp_sa); + } + free(map_str); + close(fd); + return ret; +} + +int md(unsigned long addr, uint32_t unused, size_t len) +{ + int i, j; + + (void)unused; + for (i=0; i<nr_maps; i++) + { + if (-1 == maps[i].phys) + continue; + if (maps[i].phys <= addr && + (addr + len * sizeof(uint32_t)) < (maps[i].phys + maps[i].len)) + { + uint32_t *buf, *pv; + + buf = (uint32_t *)malloc(len*sizeof(uint32_t)); + if (!buf) + return 1; + pv = (uint32_t *)(maps[i].virt + (addr - maps[i].phys)); + for (j=0; j<len; j++) + buf[j] = *pv++; + + dump(addr, buf, len); + free(buf); + return 0; + } + } + fprintf(stderr, "%lx +%x not in mapped memory\n", addr, len); + return 1; +} + +int mw(unsigned long addr, uint32_t val, size_t len) +{ + int i, j; + + for (i=0; i<nr_maps; i++) + { + if (-1 == maps[i].phys) + continue; + if (maps[i].phys <= addr && + (addr + len * sizeof(uint32_t)) < (maps[i].phys + maps[i].len)) + { + for (j=0; j<len; j++) + { + *((uint32_t*)(maps[i].virt + (addr - maps[i].phys))) = val; + } + return 0; + } + } + fprintf(stderr, "%lx +%x not in mapped memory\n", addr, len); + return 1; +} + +char *readline(char *buf, size_t len, FILE *f) +{ + int raw = 0; + size_t br = 0; + struct termios tios, orig_tios; + + if (!quiet) + { + /* put terminal in raw mode to get unbuffered io */ + if (tcgetattr(fileno(f), &orig_tios) == 0) + { + tios = orig_tios; + tios.c_iflag |= IGNPAR; + tios.c_iflag &= ~(ISTRIP | INLCR | IGNCR | ICRNL | IXON | IXANY | IXOFF); + tios.c_lflag &= ~(ISIG | ICANON | ECHO | ECHOE | ECHOK | ECHONL | IEXTEN); + tios.c_oflag &= ~OPOST; + tios.c_cc[VMIN] = 1; + tios.c_cc[VTIME] = 0; + tcsetattr(fileno(f), TCSADRAIN, &tios); + raw = 1; + } + } + if (!raw) + { + return fgets(buf, len, f); + } + /* read in bytes one at a time and echo them */ + while (br < (len-1)) + { + int c = fgetc(f); + switch (c) + { + case 3: /* ^C */ + br = 0; + c = '\n'; + break; + case 4: + br = 0; + c = -1; + break; + case '\b': + if (br > 0) + { + fputs("\b \b", stdout); + br--; + } + break; + case '\r': + case '\n': + fputs("\r\n", stdout); + buf[br++] = '\n'; + break; + case ' '...'~': + fputc(c, stdout); + buf[br++] = c; + break; + break; + default: + break; + } + if (c == -1) + { + if (br == 0) + buf = NULL; + break; + } + if (c == '\r' || c == '\n') + break; + } + if (buf) + buf[br] = 0; + + tcsetattr(fileno(f), TCSADRAIN, &orig_tios); + return buf; +} + +#define MAX_LINE_LEN 4096 +int io(void) +{ + const char delim1[] = "\r\n;"; + const char delim2[] = "\t "; + char line[MAX_LINE_LEN]; + char *command, *cmd, *paddr, *pval, *plen, *endptr; + char *tmp_s1, *tmp_s2; + unsigned long addr; + uint32_t val; + size_t len; + int (*fn)(unsigned long, uint32_t, size_t); + + if (!quiet) + fputs("> ", stdout); + while (readline(line, MAX_LINE_LEN, stdin) != NULL && *line) + { + /* read next line or next command (up to newline or ';') */ + command = strtok_r(line, delim1, &tmp_s1); + if (!command || strlen(command) == 0) + goto _command_loop; + while (NULL != command && strlen(command) > 0) + { + cmd = strtok_r(command, delim2, &tmp_s2); + if (!cmd) + goto _cmd_err; + if (cmd[0] == 'q' || cmd[0] == 'Q') + return 0; + paddr = strtok_r(NULL, delim2, &tmp_s2); + if (!paddr) + goto _cmd_err; + addr = strtoul(paddr, &endptr, 16); + if (*endptr) + goto _cmd_err; + fn = NULL; + if (strncmp(cmd, "mw", 3) == 0) + { + fn = mw; + pval = strtok_r(NULL, delim2, &tmp_s2); + if (!pval) + goto _cmd_err; + val = strtoul(pval, &endptr, 16); + if (*endptr) + goto _cmd_err; + len = 1; + } + else if (strncmp(cmd, "md", 3) == 0) + { + fn = md; + len = 0x40; + val = 0; + } + else + { + goto _cmd_err; + } + plen = strtok_r(NULL, delim2, &tmp_s2); + if (plen) + { + len = strtoul(plen, &endptr, 16); + if (*endptr) + goto _cmd_err; + } + + if (fn) + fn(addr, val, len); + + command = strtok_r(NULL, delim1, &tmp_s1); + } +_command_loop: + if (!quiet) + fputs("> ", stderr); + continue; +_cmd_err: + fprintf(stderr, "md addr [len]\nmw addr val [len]\n" + "q[uit] | ctrl-d | ctrl-c to exit\n"); + if (!quiet) + fputs("> ", stderr); + } + return 0; +} + +typedef enum +{ + CPU_NONE = 0, + CPU_PILOT3, + CPU_PILOT4, + CPU_AST2500, + CPU_AST2600, + CPU_MAX, +} CPU_TYPE; + +static CPU_TYPE probe_cpu(void) +{ + FILE *f; + char cpuinfo[128]; + static CPU_TYPE this_cpu = CPU_NONE; + + if (CPU_NONE == this_cpu) + { + f = fopen("/sys/firmware/devicetree/base/compatible", "r"); + if (f) { + int br = fread(cpuinfo, 1, sizeof(cpuinfo)-1, f); + if (br > 0) { + cpuinfo[br] = 0; + char *v = cpuinfo; + while (v < (cpuinfo + sizeof(cpuinfo)) && *v) { + if (strncmp("aspeed,ast2500", v, 15) == 0) + { + if (!quiet) + fprintf(stderr, "AST2500\n"); + this_cpu = CPU_AST2500; + } + v += 1 + strnlen(v, sizeof(cpuinfo) - (v - cpuinfo)); + } + } + fclose(f); + } + } + if (CPU_NONE == this_cpu) + { + const char delim[] = "\r\n\t :"; + char *tmp_s; + f = fopen("/proc/cpuinfo", "r"); + if (f != NULL) { + while (fgets(cpuinfo, sizeof(cpuinfo), f)) + { + strtok_r(cpuinfo, delim, &tmp_s); + if (strncmp("Hardware", cpuinfo, 9) == 0) + { + char *v = strtok_r(NULL, delim, &tmp_s); + if (v) + { + if (strncmp("AST2500", v, 8) == 0) + { + if (!quiet) + fprintf(stderr, "AST2500\n"); + this_cpu = CPU_AST2500; + break; + } + else if (strncmp("ASpeed SoC", v, 11) == 0) + { + if (!quiet) + fprintf(stderr, "Found ASpeed SoC\n"); + this_cpu = CPU_AST2500; + break; + } + else if (strncmp("ServerEngines PILOT3", v, 21) == 0) + { + if (!quiet) + fprintf(stderr, "Found PILOT3\n"); + this_cpu = CPU_PILOT3; + break; + } + } + } + else if (strncmp("CPU", cpuinfo, 4) == 0) + { + char *v = strtok_r(NULL, delim, &tmp_s); + if (!v || strncmp("part", v, 5) != 0) + { + continue; + } + v = strtok_r(NULL, delim, &tmp_s); + if (v) + { + if (strncmp("0xb76", v, 6) == 0) + { + if (!quiet) + fprintf(stderr, "AST2500\n"); + this_cpu = CPU_AST2500; + break; + } + else if (strncmp("0xc07", v, 6) == 0) + { + if (!quiet) + fprintf(stderr, "AST2600\n"); + this_cpu = CPU_AST2600; + break; + } + } + } + } + fclose(f); + } + } + return this_cpu; +} + +static const char *probe_cpu_for_map(void) +{ + switch (probe_cpu()) + { + case CPU_PILOT3: + return "0:2000000,10000000:8000,40000000:43b000"; + case CPU_AST2500: + return "0:4000000,1e600000:1a0000,20000000:4000000"; + case CPU_AST2600: + return "0:20000000,38000000:8000000,60000000:20000000"; + default: + return ""; + } +} + +static void usage(void) +{ + fprintf(stderr, + "Usage: io [-c config] [-m map]\n" + " md [-c config] [-m map] <addr> [len]\n" + " mw [-c config] [-m map] <addr> <val> [len]\n\n" + "With: -c config load mappings from file config\n" + " -m map load mappings from string map\n" + " addr, val, len are all hex numbers\n\n" + "When invoked as io, this will start a shell that will\n" + "allow the user to type in md and mw commands much like\n" + "the U-Boot environment. By default, it will map in all\n" + "the addresses for the known processor type.\n\n" + "map string is of the format addr:len[,addr2:len2...]\n" + "config file is of the same format as map string\n" + "but with each mapping on separate lines instead of\n" + "comma separated values\n" + ); + exit(1); +} + +#define shift if (++i >= argc) usage() + +int main(int argc, const char *argv[]) +{ + char *exe_full; + char *exe; + char *endptr; + int i, first_arg = 1; + const char *cfg_file = NULL; + const char *map_str = NULL; + size_t flen = 0; + size_t len = 0; + unsigned long addr; + uint32_t val; + int ret = 0; + + i = 1; + while (i < argc) + { + if (argv[i][0] == '-') + { + switch (argv[i][1]) + { + case 'm': + shift; + map_str = argv[i]; + break; + case 'c': + shift; + cfg_file = argv[i]; + break; + default: + usage(); + } + } + else + { + first_arg = i; + break; + } + } + + exe_full = strdup(argv[0]); + if (exe_full != NULL ) + exe = basename(exe_full); + else + return ret; + + if (strncmp(exe, "io", 3) != 0 || !isatty(fileno(stdin))) + quiet = 1; + + if (!map_str) + { + if (!cfg_file) + map_str = probe_cpu_for_map(); + else + map_str = map_file(cfg_file, &flen, PROT_READ, MAP_PRIVATE); + } + else + { + flen = strlen(map_str); + } + if (load_maps(map_str, flen) < 0) + { + fprintf(stderr, "failed to map regions: check map string or config file\n"); + goto _cleanup; + } + + if (strncmp(exe, "md", 3) == 0) + { + len = 0x40; + addr = strtoul(argv[first_arg], &endptr, 16); + if ((first_arg + 1) < argc) + { + len = strtoul(argv[first_arg + 1], &endptr, 16); + } + ret = md(addr, 0, len); + goto _cleanup; + } + + if (strncmp(exe, "mw", 3) == 0) + { + len = 1; + addr = strtoul(argv[first_arg], &endptr, 16); + if ((first_arg + 1) < argc) + { + val = strtoul(argv[first_arg + 1], &endptr, 16); + } + else + { + usage(); + } + if ((first_arg + 2) < argc) + { + len = strtoul(argv[first_arg + 2], &endptr, 16); + } + ret = mw(addr, val, len); + goto _cleanup; + } + + io(); + +_cleanup: + unmap_all(); + free(exe_full); + return ret; +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/io-app/io-app.bb b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/io-app.bb new file mode 100644 index 000000000..af0bc8fde --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/io-app/io-app.bb @@ -0,0 +1,14 @@ +SUMMARY = "IO App" +DESCRIPTION = "IO application for accessing memory-mapped IO regions on the BMC" + +inherit cmake + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM += "\ + file://io-app.c;beginline=2;endline=14;md5=639666a0bf40bb717b46b378297eeceb \ + " + +SRC_URI = "\ + file://CMakeLists.txt;subdir=${BP} \ + file://io-app.c;subdir=${BP} \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/CMakeLists.txt b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/CMakeLists.txt new file mode 100644 index 000000000..1cde22b49 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/CMakeLists.txt @@ -0,0 +1,7 @@ +cmake_minimum_required(VERSION 2.8.10 FATAL_ERROR) +project(lpc-cmds C) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +add_executable(lpc_cmds lpc_cmds.c) +install (TARGETS lpc_cmds DESTINATION bin) + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c new file mode 100644 index 000000000..ff9498696 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c @@ -0,0 +1,555 @@ +/* +// Copyright (c) 2017 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// +*/ + +#include <stdio.h> +#include <time.h> +#include <unistd.h> +#include <stdlib.h> +#include <ctype.h> +#include <stdio.h> +#include <stdlib.h> +#include <stdint.h> +#include <string.h> +#include <errno.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <unistd.h> +#include <fcntl.h> +#include <sys/ioctl.h> +#include <sys/mman.h> + +#include "lpc_drv.h" + +#define SIO_DEVICE_NAME "/dev/lpc-sio" +#define KCS_DEVICE_NAME "/dev/ipmi-kcs" +#define MAILBOX_DEVICE_NAME "/dev/aspeed-mbox" +#define SNOOP_DEVICE_NAME "/dev/aspeed-lpc-snoop" + +#define SNOOP_BUF_SIZE 4096 + +#define SUPPORT_KCS_ADDR_CMD 0 +#define SUPPORT_MAILBOX 1 +#define SUPPORT_SNOOP 1 + +/*********************************************************************************/ +static void ProcessKCSReq(int fd, unsigned char *pReq, int ReqLen, int NoPrint) +{ + int i; + unsigned char SendPkt[16]; + + if (!NoPrint) { + printf("\nKCS Request >>>>>>>>>>>>>>>>>>>>>>>>>>\n"); + for (i = 0; i < ReqLen; i++) + printf("%02X ", pReq[i]); + printf("\n======================================\n"); + } + + SendPkt[0] = pReq[0] | 0x04; + SendPkt[1] = pReq[1]; + SendPkt[2] = 0xC1; /* Always Invalid Command */ + + if (!NoPrint) { + printf("\nKCS Response <<<<<<<<<<<<<<<<<<<<<<<<<\n"); + for (i = 0; i < 3; i++) + printf("%02X ", SendPkt[i]); + printf("\n======================================\n"); + } + + write(fd, SendPkt, 3); +} + +static void KCSIfcTask(int KCSIfcIdx, int NoPrint) +{ + int fd; + int RecvPktLen; + char KCSDev[16]; + struct kcs_ioctl_data IOData; + unsigned char RecvPkt[512]; + + snprintf(KCSDev, sizeof(KCSDev), KCS_DEVICE_NAME"%d", KCSIfcIdx); + fd = open(KCSDev, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open KCS device: %s\n", KCSDev); + exit(1); + } + + IOData.cmd = KCS_FORCE_ABORT; + IOData.data = 0; + ioctl(fd, KCS_IOC_COMMAND, &IOData); + + while (1) { + RecvPktLen = read(fd, RecvPkt, sizeof(RecvPkt)); + if (RecvPktLen < 2) + continue; + + ProcessKCSReq(fd, RecvPkt, RecvPktLen, NoPrint); + } +} + +#if SUPPORT_KCS_ADDR_CMD +static void KCSIfcSetAddr(int KCSIfcIdx, unsigned int addr) +{ + int fd; + struct kcs_ioctl_data kcs_data; + char KCSDev[16]; + + snprintf(KCSDev, sizeof(KCSDev), KCS_DEVICE_NAME"%d", KCSIfcIdx); + fd = open(KCSDev, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open KCS device: %s\n", KCSDev); + exit(1); + } + + kcs_data.cmd = KCS_SET_ADDR; + kcs_data.data = addr; + if (ioctl(fd, KCS_IOC_COMMAND, &kcs_data) == 0) + printf("Set KCS%d addr to 0x%X successfully!\n", KCSIfcIdx + 1, addr); + + close(fd); +} + +static void KCSIfcGetAddr(int KCSIfcIdx) +{ + int fd; + struct kcs_ioctl_data kcs_data; + char KCSDev[16]; + + snprintf(KCSDev, sizeof(KCSDev), KCS_DEVICE_NAME"%d", KCSIfcIdx); + fd = open(KCSDev, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open KCS device: %s\n", KCSDev); + exit(1); + } + + kcs_data.cmd = KCS_GET_ADDR; + if (ioctl(fd, KCS_IOC_COMMAND, &kcs_data) == 0) + printf("KCS%d addr is : 0x%X!\n", KCSIfcIdx + 1, kcs_data.data); + + close(fd); +} +#endif + +/*********************************************************************************/ + +#if SUPPORT_SNOOP +static void ReadBiosPOSTCodes(unsigned int if_idx) +{ + char snoop_dev[32]; + int fd; + int i; + unsigned char buf[SNOOP_BUF_SIZE]; + int len; + + snprintf(snoop_dev, sizeof(snoop_dev), SNOOP_DEVICE_NAME"%d", if_idx); + fd = open(snoop_dev, O_RDONLY | O_NONBLOCK | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s !\n", snoop_dev); + return; + } + + len = read(fd, &buf, sizeof(buf)); + + if (len == 0 || errno == EAGAIN) { + printf("No BIOS POST Codes Found!\n"); + goto out; + } else if (len < 0) { + printf("Failed to read the POST Codes! (%s)\n", + strerror(errno)); + goto out; + } + + printf("BIOS POST Codes in Hex (%d entries):\n", len); + + for (i = 0; i < len; i++) + printf(" %d: %02X\n", i, buf[i]); + + printf("\n"); + +out: + close(fd); +} +#endif + +/*********************************************************************************/ + +static void SIOGetACPIState(unsigned short changed) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_GET_ACPI_STATE; + sio_data.param = changed; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) { + if (changed) + printf("ACPI SLP state is %s!\n", + sio_data.param != 0 ? "Changed" : "Same"); + + if (sio_data.data == ACPI_STATE_S12) + printf("ACPI SLP state --> SLP_12\n"); + else if (sio_data.data == ACPI_STATE_S3I) + printf("ACPI SLP state --> SLP_3I\n"); + else if (sio_data.data == ACPI_STATE_S45) + printf("ACPI SLP state --> SLP_45\n"); + } + + close(fd); +} + +static void SIOGetPWRGDStatus(unsigned short changed) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_GET_PWRGD_STATUS; + sio_data.param = changed; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) { + if (changed) + printf("PWRGD status : %s\n", + sio_data.param != 0 ? "Changed" : "Same"); + + printf("PWRGD status value :%u\n", sio_data.data); + } + + close(fd); +} + +static void SIOGetONCTLStatus(void) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_GET_ONCTL_STATUS; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("ONCTL status value :%u\n", sio_data.data); + + close(fd); +} + +static void SIOSetONCTLGPIO(unsigned short enable, unsigned int value) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_SET_ONCTL_GPIO; + sio_data.param = enable; + sio_data.data = value; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("ONCTL GPIO mode setting is Done!\n"); + + close(fd); +} + +static void SIOGetPWRBTNOverride(unsigned short clear) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_GET_PWRBTN_OVERRIDE; + sio_data.param = clear; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("PWRBTN Override status : %u\n", sio_data.data); + + close(fd); +} + +static void SIOGetPFailStatus() +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_GET_PFAIL_STATUS; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("PFail status : %u\n", sio_data.data); + + close(fd); +} + +static void SIOSetBMCSCIEvent(unsigned short set) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_SET_BMC_SCI_EVENT; + sio_data.param = set; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("BMC SCI event is %s\n", + sio_data.data ? "set" : "cleared"); + + close(fd); +} + +static void SIOSetBMCSMIEvent(unsigned short set) +{ + int fd; + struct sio_ioctl_data sio_data; + + fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC); + if (fd < 0) { + printf("Error open %s\n", SIO_DEVICE_NAME); + exit(1); + } + + sio_data.sio_cmd = SIO_SET_BMC_SMI_EVENT; + sio_data.param = set; + + if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0) + printf("BMC SMI event is %s\n", + sio_data.data ? "set" : "cleared"); + + close(fd); +} + +/*********************************************************************************/ + +#if SUPPORT_MAILBOX +static void MailBoxRead(int num) +{ + int fd; + int len; + uint8_t data; + + fd = open(MAILBOX_DEVICE_NAME, O_RDWR | O_NONBLOCK | O_CLOEXEC); + if (fd < 0) { + printf("Error open mailbox\n"); + exit(1); + } + + len = pread(fd, &data, 1, num); + if (len == 0 || errno == EAGAIN) { + printf("No mailbox message found!\n"); + goto out; + } else if (len < 0) { + printf("Error reading from mailbox%d! (%s)\n", num, + strerror(errno)); + goto out; + } + + printf("MailBox%d read value : 0x%02X\n", num, data); + +out: + close(fd); +} + +static void MailBoxWrite(int num, uint8_t value) +{ + int fd; + ssize_t rc; + + fd = open(MAILBOX_DEVICE_NAME, O_RDWR | O_NONBLOCK | O_CLOEXEC); + if (fd < 0) { + printf("Error open mailbox\n"); + exit(1); + } + + rc = pwrite(fd, &value, 1, num); + + if (rc == 1) + printf("MailBox%d write value : 0x%02X done!\n", num, value); + else + printf("Error writing to mailbox%d, rc: %d\n", num, rc); + + close(fd); +} +#endif + +/*********************************************************************************/ + +static void usage(void) +{ + printf("Usage:\n" + "\tlpc_cmds sio get_acpi_state\n" + "\tlpc_cmds sio get_acpi_changed\n" + "\tlpc_cmds sio get_pwrgd_status\n" + "\tlpc_cmds sio get_pwrgd_changed\n" + "\tlpc_cmds sio get_onctl_status\n" + "\tlpc_cmds sio set_onctl_gpio_disable\n" + "\tlpc_cmds sio set_onctl_gpio_high\n" + "\tlpc_cmds sio set_onctl_gpio_low\n" + "\tlpc_cmds sio get_pwrbtn_override_status\n" + "\tlpc_cmds sio get_pwrbtn_override_status_clear\n" + "\tlpc_cmds sio get_pfail_status\n" + "\tlpc_cmds sio set_bmc_sci_event\n" + "\tlpc_cmds sio clear_bmc_sci_event\n" + "\tlpc_cmds sio set_bmc_smi_event\n" + "\tlpc_cmds sio clear_bmc_smi_event\n" + "\n" +#if SUPPORT_KCS_ADDR_CMD + "\tlpc_cmds kcs [1 ~ 4] (getaddr / setaddr / quiet)\n" +#else + "\tlpc_cmds kcs [1 ~ 4] (quiet)\n" +#endif +#if SUPPORT_MAILBOX + "\n" + "\tlpc_cmds mailbox read (0 ~ 15)\n" + "\tlpc_cmds mailbox write (0 ~ 15) (0x00 ~ 0xFF)\n" +#endif +#if SUPPORT_SNOOP + "\n" + "\tlpc_cmds snoop [0 ~ 1] read\n" +#endif + ); + + exit(-1); +} + +int main(int argc, char** argv) +{ + char *cmd; + + if (argc < 2) + usage(); + + cmd = argv[1]; + + if (strcmp(cmd, "sio") == 0) { + if (argc < 3) + usage(); + + if (strcmp(argv[2], "get_acpi_state") == 0) + SIOGetACPIState(0); + else if (strcmp(argv[2], "get_acpi_changed") == 0) + SIOGetACPIState(1); + else if (strcmp(argv[2], "get_pwrgd_status") == 0) + SIOGetPWRGDStatus(0); + else if (strcmp(argv[2], "get_pwrgd_changed") == 0) + SIOGetPWRGDStatus(1); + else if (strcmp(argv[2], "get_onctl_status") == 0) + SIOGetONCTLStatus(); + else if (strcmp(argv[2], "set_onctl_gpio_disable") == 0) + SIOSetONCTLGPIO(0, 0); + else if (strcmp(argv[2], "set_onctl_gpio_high") == 0) + SIOSetONCTLGPIO(1, 1); + else if (strcmp(argv[2], "set_onctl_gpio_low") == 0) + SIOSetONCTLGPIO(1, 0); + else if (strcmp(argv[2], "get_pwrbtn_override_status") == 0) + SIOGetPWRBTNOverride(0); + else if (strcmp(argv[2], "get_pwrbtn_override_status_clear") == 0) + SIOGetPWRBTNOverride(1); + else if (strcmp(argv[2], "get_pfail_status") == 0) + SIOGetPFailStatus(); + else if (strcmp(argv[2], "set_bmc_sci_event") == 0) + SIOSetBMCSCIEvent(1); + else if (strcmp(argv[2], "clear_bmc_sci_event") == 0) + SIOSetBMCSCIEvent(0); + else if (strcmp(argv[2], "set_bmc_smi_event") == 0) + SIOSetBMCSMIEvent(1); + else if (strcmp(argv[2], "clear_bmc_smi_event") == 0) + SIOSetBMCSMIEvent(0); + } else if (strcmp(cmd, "kcs") == 0) { + int ifc; + + if (argc < 3) + usage(); + + ifc = atoi(argv[2]); + if (ifc < 1 || ifc > 4) /* ipmi-kcs1 ~ ipmi-kcs4 */ + usage(); + + if (argc == 3) + KCSIfcTask(ifc, 0); + else if (argc == 4 && strcmp(argv[3], "quiet") == 0) + KCSIfcTask(ifc, 1); +#if SUPPORT_KCS_ADDR_CMD + else if (argc == 4 && strcmp(argv[3], "getaddr") == 0) + KCSIfcGetAddr(ifc); + else if (argc == 5 && strcmp(argv[3], "setaddr") == 0) + KCSIfcSetAddr(ifc, strtoul(argv[4], NULL, 16)); +#endif +#if SUPPORT_MAILBOX + } else if (strcmp(cmd, "mailbox") == 0) { + if (argc < 4) + usage(); + + if (strcmp(argv[2], "read") == 0) { + MailBoxRead(atoi(argv[3])); + } else { + if (argc < 5) + usage(); + MailBoxWrite(atoi(argv[3]), strtoul(argv[4], NULL, 16)); + } +#endif +#if SUPPORT_SNOOP + } else if (strcmp(cmd, "snoop") == 0) { + int ifc; + + if (argc < 3) + usage(); + + ifc = atoi(argv[2]); + if (ifc < 0 || ifc > 1) /* snoop0 ~ snoop1 */ + usage(); + + if (strcmp(argv[3], "read") == 0) + ReadBiosPOSTCodes(ifc); + else + usage(); +#endif + } + + return 0; +} + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_drv.h b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_drv.h new file mode 100644 index 000000000..354210c8b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_drv.h @@ -0,0 +1,80 @@ +/* +// Copyright (c) 2017 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// +*/ + +#ifndef __LPC_DRV_H__ +#define __LPC_DRV_H__ + +#define LPC_DEV_MAJOR 250 +#define LPC_DEV_MINOR 0 + +/***********************************************************************************/ + +enum KCS_CMD { + KCS_SET_ADDR = 0, + KCS_GET_ADDR, + KCS_SMS_ATN, + KCS_FORCE_ABORT, +}; + +struct kcs_ioctl_data { + unsigned int cmd; + unsigned int data; +}; + +#define KCS_IOC_BASE 'K' +#define KCS_IOC_COMMAND _IOWR(KCS_IOC_BASE, 1, struct kcs_ioctl_data) + +/***********************************************************************************/ + +enum ACPI_SLP_STATE { + ACPI_STATE_S12 = 1, + ACPI_STATE_S3I, + ACPI_STATE_S45 +}; + +/* SWC & ACPI for SuperIO IOCTL */ +enum SIO_CMD { + SIO_GET_ACPI_STATE = 0, + SIO_GET_PWRGD_STATUS, + SIO_GET_ONCTL_STATUS, + SIO_SET_ONCTL_GPIO, + SIO_GET_PWRBTN_OVERRIDE, + SIO_GET_PFAIL_STATUS, /* Start from AC Loss */ + SIO_SET_BMC_SCI_EVENT, + SIO_SET_BMC_SMI_EVENT, + + SIO_MAX_CMD +}; + +struct sio_ioctl_data { + unsigned short sio_cmd; + unsigned short param; + unsigned int data; +}; + +#define SIO_IOC_BASE 'P' +#define SIO_IOC_COMMAND _IOWR(SIO_IOC_BASE, 1, struct sio_ioctl_data) + +/***********************************************************************************/ + +#define MAX_MAILBOX_NUM 16 + +/***********************************************************************************/ + +#endif + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/lpc-cmds.bb b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/lpc-cmds.bb new file mode 100644 index 000000000..cf7182e3d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/lpc-cmds.bb @@ -0,0 +1,13 @@ +SUMMARY = "LPC tools" +DESCRIPTION = "command tool for LPC interface test on the BMC" + +inherit cmake + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658" + +SRC_URI = "\ + file://CMakeLists.txt;subdir=${BP} \ + file://lpc_drv.h;subdir=${BP} \ + file://lpc_cmds.c;subdir=${BP} \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit/0001-Force-nbdkit-to-send-PATCH-as-upload-method.patch b/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit/0001-Force-nbdkit-to-send-PATCH-as-upload-method.patch new file mode 100644 index 000000000..dc7f7b924 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit/0001-Force-nbdkit-to-send-PATCH-as-upload-method.patch @@ -0,0 +1,71 @@ +From ad236d3f04cb2547fea33d72aeeb695ce3035bba Mon Sep 17 00:00:00 2001 +From: Iwona Winiarska <iwona.winiarska@intel.com> +Date: Mon, 9 Dec 2019 01:58:15 +0100 +Subject: [PATCH] Force nbdkit to send PATCH as upload method + +This modifies pwrite to send PATCH rather than default upload method +used by curl. + +FIXME: This patch only works around lack of PATCH method support in curl. +It's just a hack and it should be removed if/when proper PATCH support +is implemented in curl. + +We've added it to nbdkit rather than curl, because currently PATCH +support is unlikely to be accepted in upstream curl and it is easier to +maintain this patch in nbdkit. + +Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com> +--- + plugins/curl/curl.c | 15 +++++++++++++-- + 1 file changed, 13 insertions(+), 2 deletions(-) + +diff --git a/plugins/curl/curl.c b/plugins/curl/curl.c +index 0ed3984..804ad78 100644 +--- a/plugins/curl/curl.c ++++ b/plugins/curl/curl.c +@@ -787,6 +787,7 @@ static int + curl_pwrite (void *handle, const void *buf, uint32_t count, uint64_t offset) + { + struct curl_handle *h = handle; ++ struct curl_slist *list = NULL; + CURLcode r; + char range[128]; + +@@ -800,15 +801,21 @@ curl_pwrite (void *handle, const void *buf, uint32_t count, uint64_t offset) + h->read_count = count; + + curl_easy_setopt (h->c, CURLOPT_UPLOAD, 1L); ++ curl_easy_setopt (h->c, CURLOPT_CUSTOMREQUEST, "PATCH"); + + /* Make an HTTP range request. */ +- snprintf (range, sizeof range, "%" PRIu64 "-%" PRIu64, ++ snprintf (range, sizeof range, "Range: bytes=%" PRIu64 "-%" PRIu64, + offset, offset + count); +- curl_easy_setopt (h->c, CURLOPT_RANGE, range); ++ list = curl_slist_append(list, range); ++ curl_easy_setopt(h->c, CURLOPT_HTTPHEADER, list); + + /* The assumption here is that curl will look after timeouts. */ + r = curl_easy_perform (h->c); + if (r != CURLE_OK) { ++ curl_easy_setopt (h->c, CURLOPT_RANGE, NULL); ++ curl_easy_setopt(h->c, CURLOPT_HTTPHEADER, NULL); ++ curl_slist_free_all(list); ++ curl_easy_setopt (h->c, CURLOPT_CUSTOMREQUEST, NULL); + display_curl_error (h, r, "pwrite: curl_easy_perform"); + return -1; + } +@@ -819,6 +826,10 @@ curl_pwrite (void *handle, const void *buf, uint32_t count, uint64_t offset) + + /* As far as I understand the cURL API, this should never happen. */ + assert (h->read_count == 0); ++ curl_easy_setopt (h->c, CURLOPT_RANGE, NULL); ++ curl_easy_setopt(h->c, CURLOPT_HTTPHEADER, NULL); ++ curl_slist_free_all(list); ++ curl_easy_setopt (h->c, CURLOPT_CUSTOMREQUEST, NULL); + + return 0; + } +-- +2.21.0 + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit_git.bb b/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit_git.bb new file mode 100644 index 000000000..d1b5e1b22 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/nbdkit/nbdkit_git.bb @@ -0,0 +1,35 @@ +SUMMARY = "nbdkit is a toolkit for creating NBD servers." +DESCRIPTION = "NBD — Network Block Device — is a protocol \ +for accessing Block Devices (hard disks and disk-like things) \ +over a Network. \ +\ +nbdkit is a toolkit for creating NBD servers." + +HOMEPAGE = "https://github.com/libguestfs/nbdkit" +LICENSE = "BSD" +LIC_FILES_CHKSUM = "file://LICENSE;md5=f9dcc2d8acdde215fa4bd6ac12bb14f0" + +SRC_URI = "git://github.com/libguestfs/nbdkit.git;protocol=https" +SRC_URI += "file://0001-Force-nbdkit-to-send-PATCH-as-upload-method.patch" + +PV = "1.28.0+git${SRCPV}" +SRCREV = "676c193ba05e479c145cf872e4912c576d1461d3" + +S = "${WORKDIR}/git" + +DEPENDS = "curl xz e2fsprogs zlib" + +inherit pkgconfig python3native perlnative autotools +inherit autotools-brokensep + +# Specify any options you want to pass to the configure script using EXTRA_OECONF: +EXTRA_OECONF = "--disable-python --disable-perl --disable-ocaml \ + --disable-rust --disable-ruby --disable-tcl \ + --disable-lua --disable-vddk --without-libvirt \ + --without-libguestfs" + +do_install:append() { + rm -f ${D}/usr/share/bash-completion/completions/nbdkit + rmdir ${D}/usr/share/bash-completion/completions + rmdir ${D}/usr/share/bash-completion +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/.clang-format b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/.clang-format new file mode 100644 index 000000000..ea71ad6e1 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/.clang-format @@ -0,0 +1,99 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlinesLeft: false +AlignOperands: true +AlignTrailingComments: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: true +BinPackArguments: true +BinPackParameters: true +BraceWrapping: + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + IndentBraces: false +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +ConstructorInitializerAllOnOneLineOrOnePerLine: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: false +PointerAlignment: Left +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 5 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.hpp"' + Priority: 1 + - Regex: '^<.*\.h>' + Priority: 2 + - Regex: '^<.*' + Priority: 3 + - Regex: '.*' + Priority: 4 +IndentCaseLabels: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +KeepEmptyLinesAtTheStartOfBlocks: true +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +ReflowComments: true +SortIncludes: true +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: false +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Cpp11 +TabWidth: 4 +UseTab: Never +... + diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/meson.build b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/meson.build new file mode 100644 index 000000000..215a7e60b --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/meson.build @@ -0,0 +1,21 @@ +project( + 'oom-test', + 'c', + default_options: [ + 'warning_level=3', + 'werror=true', + 'c_std=c11' + ], + license: 'Apache-2.0', + version: '0.1', +) +project_description = 'OOM (Out Of Memory) Test Application' + +executable( + 'oom-test', + [ + 'oom-test.c', + ], + install: true, + install_dir: get_option('bindir') +) diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/oom-test.c b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/oom-test.c new file mode 100644 index 000000000..90363a4b2 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/files/oom-test.c @@ -0,0 +1,86 @@ +/* +// Copyright (c) 2021 Intel Corporation +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +// Abstract: oom test application +// +*/ + +#include <getopt.h> +#include <stdio.h> +#include <stdlib.h> + +void Usage(char* progname) +{ + printf("Usage:\n"); + printf("%s -s <size>\n", progname); + printf("Options:\n"); + printf("\t%-12s%s\n", "-h", "Display this help information"); + printf("\t%-12s%s\n", "-s <size>", + "Allocation unit size for getting heap in infinite loop"); + printf("\n"); +} + +int main(int argc, char** argv) +{ + int c, i, unitSize = 0, allocSize = 0; + + while (-1 != (c = getopt(argc, argv, "h:s:"))) + { + switch (c) + { + case 'h': + Usage(argv[0]); + return 0; + + case 's': + if (optarg != NULL) + { + unitSize = (int)strtoul(optarg, NULL, 0); + } + break; + + default: + Usage(argv[0]); + return 1; + } + } + + if (!unitSize) + { + printf("Error: Invalid allocation unit size\n"); + Usage(argv[0]); + return 1; + } + + while (1) + { + char* buf = (char*)malloc(unitSize); + if (!buf) + { + printf("Can't allocate memory!\n"); + exit(0); + } + + printf("Filling allocated memory...\n"); + for (i = 0; i < unitSize; i++) + buf[i] = 1; + + printf("Allocated %d MB\n", (++allocSize * 10)); + + /* continue looping without freeing to make OOM condition */ + } + + return 0; +} diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/oom-test.bb b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/oom-test.bb new file mode 100644 index 000000000..eb943af8d --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/oom-test/oom-test.bb @@ -0,0 +1,14 @@ +SUMMARY = "OOM Test App" +DESCRIPTION = "OOM (Out Of Memory) Test Application" + +inherit meson + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM += "\ + file://oom-test.c;beginline=2;endline=14;md5=5175224c8877845cb45a6461c96de64d \ + " + +SRC_URI = "\ + file://meson.build;subdir=${BP} \ + file://oom-test.c;subdir=${BP} \ + " diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/files/peci-hwmon-test.py b/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/files/peci-hwmon-test.py new file mode 100755 index 000000000..977fcd3a0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/files/peci-hwmon-test.py @@ -0,0 +1,144 @@ +#!/usr/bin/python + +import glob +import os +import sys +import time + +if len(sys.argv) == 1: + cpuno = 0 +else: + cpuno = int(sys.argv[1]) + +hwmon_path = '/sys/class/hwmon' +cputemp_name_match = '{}{}'.format('peci_cputemp.cpu', cpuno) +dimmtemp_name_match = '{}{}'.format('peci_dimmtemp.cpu', cpuno) + +dimmtemp_path = '' + +os.chdir(hwmon_path) + +for dirpath, dirnames, files in os.walk(hwmon_path): + for d in dirnames: + try: + with open('{}/{}'.format(d, 'name')) as f: + hwmon_name = f.read().strip() + if hwmon_name == cputemp_name_match: + cputemp_path = os.path.abspath(d) + cputemp_name = hwmon_name + elif hwmon_name == dimmtemp_name_match: + dimmtemp_path = os.path.abspath(d) + dimmtemp_name = hwmon_name + except: + continue + +if not cputemp_path: + print "Can't find the " + cputemp_name_match + quit() + +try: + while True: + os.system('clear') + os.chdir(cputemp_path) + + print '{}/{}: {}'.format(hwmon_path, cputemp_path, cputemp_name) + if dimmtemp_path: + print '{}/{}: {}'.format(hwmon_path, dimmtemp_path, dimmtemp_name) + + print + print 'Package temperature' + for input in glob.glob('temp[1-5]_input'): + try: + with open(input) as f: + val = f.read().strip() + except IOError: + val = 0 + try: + with open(input.replace('input', 'label')) as l: + name = l.read().strip() + except IOError: + name = '' + print '{:11s}:{:3d}.{:03d}'.format( + name, (int(val) / 1000), (int(val) % 1000)) + + print + print 'Core temperature' + count = 0 + for input in glob.glob('temp[!1-5]_input'): + try: + with open(input) as f: + val = f.read().strip() + except IOError: + val = 0 + try: + with open(input.replace('input', 'label')) as l: + name = l.read().strip() + except IOError: + name = '' + print ('{:9s}:{:3d}.{:03d}'.format( + name, (int(val) / 1000), (int(val) % 1000))), + count += 1 + if count % 3 == 0: + print + else: + print ('\t'), + for input in glob.glob('temp??_input'): + try: + with open(input) as f: + val = f.read().strip() + except IOError: + val = 0 + try: + with open(input.replace('input', 'label')) as l: + name = l.read().strip() + except IOError: + name = '' + print ('{:9s}:{:3d}.{:03d}'.format( + name, (int(val) / 1000), (int(val) % 1000))), + count += 1 + if count % 3 == 0: + print + else: + print ('\t'), + print + + if dimmtemp_path: + os.chdir(dimmtemp_path) + print + print 'DIMM temperature' + count = 0 + for input in glob.glob('temp*_input'): + try: + with open(input) as f: + val = f.read().strip() + except IOError: + val = 0 + try: + with open(input.replace('input', 'label')) as l: + name = l.read().strip() + except IOError: + name = '' + print ('{:9s}:{:3d}.{:03d}'.format( + name, (int(val) / 1000), (int(val) % 1000))), + count += 1 + if count % 3 == 0: + print + else: + print ('\t'), + print + else: + os.chdir(hwmon_path) + for dirpath, dirnames, files in os.walk(hwmon_path): + for d in dirnames: + try: + with open('{}/{}'.format(d, 'name')) as f: + hwmon_name = f.read().strip() + if hwmon_name == dimmtemp_name_match: + dimmtemp_path = os.path.abspath(d) + dimmtemp_name = hwmon_name + except: + continue + + time.sleep(1) +except KeyboardInterrupt: + print " exiting..." diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/peci-hwmon-test.bb b/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/peci-hwmon-test.bb new file mode 100644 index 000000000..e8506d3e0 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-utilities/peci-hwmon-test/peci-hwmon-test.bb @@ -0,0 +1,20 @@ +SUMMARY = "PECI hwmon test tool" +DESCRIPTION = "command line python tool for testing PECI hwmon" + +SRC_URI = "\ + file://peci-hwmon-test.py \ + " +LICENSE = "CLOSED" + +RDEPENDS:${PN} += "python" + +S = "${WORKDIR}" + +do_compile () { +} + +do_install () { + install -d ${D}/${bindir} + install -m 0755 ${WORKDIR}/peci-hwmon-test.py ${D}/${bindir} +} + diff --git a/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control/0001-Extend-VR-Watchdog-timeout.patch b/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control/0001-Extend-VR-Watchdog-timeout.patch new file mode 100644 index 000000000..20b930fe6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control/0001-Extend-VR-Watchdog-timeout.patch @@ -0,0 +1,32 @@ +From df6782d834b3c502a9b71e946fdbbfb4513b4d96 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Thu, 11 Jun 2020 13:00:15 -0700 +Subject: [PATCH] Extend VR Watchdog timeout + +The VR watchdog reset is causing issues on platforms such as +Cooper City that take longer to assert CPU Power Good. This +extends the timeout to 12s to hold off the reset for Cooper +City. + +Change-Id: I9658b4ead6d9bf8eaa30e4aeb9f1d56c2f2187d3 +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + config/power-config-host0.json | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/config/power-config-host0.json b/config/power-config-host0.json +index ed91470..12c3309 100644 +--- a/config/power-config-host0.json ++++ b/config/power-config-host0.json +@@ -78,7 +78,7 @@ + "ForceOffPulseMs": 15000, + "ResetPulseMs": 500, + "PowerCycleMs": 5000, +- "SioPowerGoodWatchdogMs": 1000, ++ "SioPowerGoodWatchdogMs": 12000, + "PsPowerOKWatchdogMs": 8000, + "GracefulPowerOffS": 300, + "WarmResetCheckMs": 500, +-- +2.25.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend new file mode 100755 index 000000000..daac0ecb8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend @@ -0,0 +1,9 @@ +# Enable downstream autobump +SRC_URI = "git://github.com/openbmc/x86-power-control.git;protocol=ssh" +SRCREV = "48c94c59728023cdbff3bd62f203de3434af8b8a" + +FILESEXTRAPATHS:append := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://0001-Extend-VR-Watchdog-timeout.patch \ + " diff --git a/meta-openbmc-mods/meta-wht/conf/bblayers.conf.sample b/meta-openbmc-mods/meta-wht/conf/bblayers.conf.sample new file mode 100644 index 000000000..546cd7b31 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/conf/bblayers.conf.sample @@ -0,0 +1,28 @@ +# LAYER_CONF_VERSION is increased each time build/conf/bblayers.conf +# changes incompatibly +LCONF_VERSION = "14" + +BBPATH = "${TOPDIR}" +BBFILES ?= "" + +# meta-intel-openbmc has a config file that needs to be overridden +BBMASK = "/meta-intel-openbmc/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb" + +BBLAYERS ?= " \ + ##OEROOT##/meta \ + ##OEROOT##/meta-poky \ + ##OEROOT##/meta-openembedded/meta-oe \ + ##OEROOT##/meta-openembedded/meta-networking \ + ##OEROOT##/meta-openembedded/meta-perl \ + ##OEROOT##/meta-openembedded/meta-python \ + ##OEROOT##/meta-phosphor \ + ##OEROOT##/meta-aspeed \ + ##OEROOT##/meta-x86 \ + ##OEROOT##/meta-openbmc-mods \ + ##OEROOT##/meta-intel-openbmc \ + ##OEROOT##/meta-openbmc-mods/meta-common \ + ##OEROOT##/meta-openbmc-mods/meta-common-small \ + ##OEROOT##/meta-openbmc-mods/meta-ast2500 \ + ##OEROOT##/meta-openbmc-mods/meta-wht \ + ##OEROOT##/meta-security \ + " diff --git a/meta-openbmc-mods/meta-wht/conf/conf-notes.txt b/meta-openbmc-mods/meta-wht/conf/conf-notes.txt new file mode 100644 index 000000000..91059a72d --- /dev/null +++ b/meta-openbmc-mods/meta-wht/conf/conf-notes.txt @@ -0,0 +1,6 @@ +Common targets are: + intel-platforms + obmc-phosphor-image + qemu-helper-native + virtual/kernel + phosphor-ipmi-host diff --git a/meta-openbmc-mods/meta-wht/conf/layer.conf b/meta-openbmc-mods/meta-wht/conf/layer.conf new file mode 100644 index 000000000..1724b07f0 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/conf/layer.conf @@ -0,0 +1,14 @@ +LOCALCONF_VERSION = "5" +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "wht" +BBFILE_PATTERN_wht = "^${LAYERDIR}/" +BBFILE_PRIORITY_wht = "11" +LAYERSERIES_COMPAT_wht = "gatesgarth hardknott honister" + +PRODUCT_GENERATION = "wht" diff --git a/meta-openbmc-mods/meta-wht/conf/local.conf.sample b/meta-openbmc-mods/meta-wht/conf/local.conf.sample new file mode 100644 index 000000000..202c5bca7 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/conf/local.conf.sample @@ -0,0 +1,36 @@ +MACHINE ??= "intel-ast2500" +#DL_DIR ?= "/~YoctoDownloads" +#SSTATE_DIR ?= "/~YoctoSstate-cache" +DISTRO ?= "openbmc-phosphor" +PACKAGE_CLASSES ?= "package_rpm" +SANITY_TESTED_DISTROS:append ?= " RedHatEnterpriseWorkstation-6.*" +EXTRA_IMAGE_FEATURES = "validation-unsecure" +# Uncomment the following line to enable debug features / default user account. +#EXTRA_IMAGE_FEATURES += "debug-tweaks" +USER_CLASSES ?= "buildstats" +PATCHRESOLVE = "noop" + +# PFR image Build +# Before exporting the conf, please uncomment the below line +# for building Intel PFR compliant images. +#IMAGE_FSTYPES += "intel-pfr" + +BB_DISKMON_DIRS ??= "\ + STOPTASKS,${TMPDIR},1G,100K \ + STOPTASKS,${DL_DIR},1G,100K \ + STOPTASKS,${SSTATE_DIR},1G,100K \ + STOPTASKS,/tmp,100M,100K \ + ABORT,${TMPDIR},100M,1K \ + ABORT,${DL_DIR},100M,1K \ + ABORT,${SSTATE_DIR},100M,1K \ + ABORT,/tmp,10M,1K" +CONF_VERSION = "5" +#BB_NUMBER_THREADS = "70" + +FULL_OPTIMIZATION = "-Os -pipe ${DEBUG_FLAGS}" + +# The following class prints the SRC_URI of each recipe in the build +# Once enabled, run 'bitbake intel-platforms --runonly print_src' +# on a clean workspace to get the output +#INHERIT += "print-src" + diff --git a/meta-openbmc-mods/meta-wht/conf/machine/intel-ast2500.conf b/meta-openbmc-mods/meta-wht/conf/machine/intel-ast2500.conf new file mode 100644 index 000000000..907b9f1e1 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/conf/machine/intel-ast2500.conf @@ -0,0 +1 @@ +require conf/machine/include/intel-ast2500.inc diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Configure-host-error-monitors-for-meta-wht.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Configure-host-error-monitors-for-meta-wht.patch new file mode 100644 index 000000000..17f16cce5 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0001-Configure-host-error-monitors-for-meta-wht.patch @@ -0,0 +1,194 @@ +From 1b2df626b20aa14c0de7f46915758d10394d01b4 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@intel.com> +Date: Tue, 15 Dec 2020 10:05:31 -0800 +Subject: [PATCH] Configure host error monitors for meta-wht + +The new host error monitor architecture allows the list of error +monitors to be customized through a platform-specific patch file. + +This patch configures the host error monitors for meta-wht. + +Change-Id: I7070a3409b1471d7f9c93eca3e36b477f484e5d7 +Signed-off-by: Jason M. Bills <jason.m.bills@intel.com> +--- + include/error_monitors.hpp | 137 ++++++++++++++++++++++++++++++++++--- + 1 file changed, 129 insertions(+), 8 deletions(-) + +diff --git a/include/error_monitors.hpp b/include/error_monitors.hpp +index 55b8790d..8d1651d3 100644 +--- a/include/error_monitors.hpp ++++ b/include/error_monitors.hpp +@@ -14,23 +14,88 @@ + // limitations under the License. + */ + #pragma once ++#include <error_monitors/cpu_mismatch_monitor.hpp> ++#include <error_monitors/cpu_thermtrip_monitor.hpp> ++#include <error_monitors/err2_monitor.hpp> ++#include <error_monitors/err_pin_monitor.hpp> ++#include <error_monitors/ierr_monitor.hpp> ++#include <error_monitors/mem_thermtrip_monitor.hpp> ++#include <error_monitors/pch_thermtrip_monitor.hpp> ++#include <error_monitors/smi_monitor.hpp> ++#include <error_monitors/vr_hot_monitor.hpp> + #include <sdbusplus/asio/object_server.hpp> +-// #include <error_monitors/smi_monitor.hpp> + + #include <memory> + + namespace host_error_monitor::error_monitors + { + // Error signals to monitor +-// static std::unique_ptr<host_error_monitor::smi_monitor::SMIMonitor> +-// smiMonitor; ++static std::unique_ptr<host_error_monitor::smi_monitor::SMIMonitor> smiMonitor; ++static std::unique_ptr< ++ host_error_monitor::cpu_mismatch_monitor::CPUMismatchMonitor> ++ cpu1MismatchMonitor; ++static std::unique_ptr< ++ host_error_monitor::cpu_mismatch_monitor::CPUMismatchMonitor> ++ cpu2MismatchMonitor; ++static std::unique_ptr<host_error_monitor::err_pin_monitor::ErrPinMonitor> ++ err0Monitor; ++static std::unique_ptr<host_error_monitor::err_pin_monitor::ErrPinMonitor> ++ err1Monitor; ++static std::unique_ptr<host_error_monitor::err2_monitor::Err2Monitor> ++ err2Monitor; ++static std::unique_ptr<host_error_monitor::ierr_monitor::IERRMonitor> ++ ierrMonitor; ++static std::unique_ptr< ++ host_error_monitor::cpu_thermtrip_monitor::CPUThermtripMonitor> ++ cpu1ThermtripMonitor; ++static std::unique_ptr< ++ host_error_monitor::cpu_thermtrip_monitor::CPUThermtripMonitor> ++ cpu2ThermtripMonitor; ++static std::unique_ptr< ++ host_error_monitor::mem_thermtrip_monitor::MemThermtripMonitor> ++ mem1ThermtripMonitor; ++static std::unique_ptr< ++ host_error_monitor::mem_thermtrip_monitor::MemThermtripMonitor> ++ mem2ThermtripMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu1VRHotMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu1MemABCDVRHotMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu1MemEFGHVRHotMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu2VRHotMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu2MemABCDVRHotMonitor; ++static std::unique_ptr<host_error_monitor::vr_hot_monitor::VRHotMonitor> ++ cpu2MemEFGHVRHotMonitor; ++static std::unique_ptr< ++ host_error_monitor::pch_thermtrip_monitor::PCHThermtripMonitor> ++ pchThermtripMonitor; + + // Check if all the signal monitors started successfully + bool checkMonitors() + { + bool ret = true; + +- // ret &= smiMonitor->isValid(); ++ ret &= smiMonitor->isValid(); ++ ret &= cpu1MismatchMonitor->isValid(); ++ ret &= cpu2MismatchMonitor->isValid(); ++ ret &= err0Monitor->isValid(); ++ ret &= err1Monitor->isValid(); ++ ret &= err2Monitor->isValid(); ++ ret &= ierrMonitor->isValid(); ++ ret &= cpu1ThermtripMonitor->isValid(); ++ ret &= cpu2ThermtripMonitor->isValid(); ++ ret &= mem1ThermtripMonitor->isValid(); ++ ret &= mem2ThermtripMonitor->isValid(); ++ ret &= cpu1VRHotMonitor->isValid(); ++ ret &= cpu1MemABCDVRHotMonitor->isValid(); ++ ret &= cpu1MemEFGHVRHotMonitor->isValid(); ++ ret &= cpu2VRHotMonitor->isValid(); ++ ret &= cpu2MemABCDVRHotMonitor->isValid(); ++ ret &= cpu2MemEFGHVRHotMonitor->isValid(); ++ ret &= pchThermtripMonitor->isValid(); + + return ret; + } +@@ -39,9 +104,59 @@ bool checkMonitors() + bool startMonitors(boost::asio::io_service& io, + std::shared_ptr<sdbusplus::asio::connection> conn) + { +- // smiMonitor = +- // std::make_unique<host_error_monitor::smi_monitor::SMIMonitor>( +- // io, conn, "SMI"); ++ smiMonitor = std::make_unique<host_error_monitor::smi_monitor::SMIMonitor>( ++ io, conn, "SMI"); ++ cpu1MismatchMonitor = std::make_unique< ++ host_error_monitor::cpu_mismatch_monitor::CPUMismatchMonitor>( ++ io, conn, "CPU1_MISMATCH", 1); ++ cpu2MismatchMonitor = std::make_unique< ++ host_error_monitor::cpu_mismatch_monitor::CPUMismatchMonitor>( ++ io, conn, "CPU2_MISMATCH", 2); ++ err0Monitor = ++ std::make_unique<host_error_monitor::err_pin_monitor::ErrPinMonitor>( ++ io, conn, "CPU_ERR0", 0); ++ err1Monitor = ++ std::make_unique<host_error_monitor::err_pin_monitor::ErrPinMonitor>( ++ io, conn, "CPU_ERR1", 1); ++ err2Monitor = ++ std::make_unique<host_error_monitor::err2_monitor::Err2Monitor>( ++ io, conn, "CPU_ERR2"); ++ ierrMonitor = ++ std::make_unique<host_error_monitor::ierr_monitor::IERRMonitor>( ++ io, conn, "CPU_CATERR"); ++ cpu1ThermtripMonitor = std::make_unique< ++ host_error_monitor::cpu_thermtrip_monitor::CPUThermtripMonitor>( ++ io, conn, "CPU1_THERMTRIP", 1, "CPU1_FIVR_FAULT"); ++ cpu2ThermtripMonitor = std::make_unique< ++ host_error_monitor::cpu_thermtrip_monitor::CPUThermtripMonitor>( ++ io, conn, "CPU2_THERMTRIP", 2, "CPU2_FIVR_FAULT"); ++ mem1ThermtripMonitor = std::make_unique< ++ host_error_monitor::mem_thermtrip_monitor::MemThermtripMonitor>( ++ io, conn, "CPU1_MEM_THERM_EVENT", 1); ++ mem2ThermtripMonitor = std::make_unique< ++ host_error_monitor::mem_thermtrip_monitor::MemThermtripMonitor>( ++ io, conn, "CPU2_MEM_THERM_EVENT", 2); ++ cpu1VRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU1_VRHOT", "CPU 1"); ++ cpu1MemABCDVRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU1_MEM_ABCD_VRHOT", "CPU 1 Memory ABCD"); ++ cpu1MemEFGHVRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU1_MEM_EFGH_VRHOT", "CPU 1 Memory EFGH"); ++ cpu2VRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU2_VRHOT", "CPU 2"); ++ cpu2MemABCDVRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU2_MEM_ABCD_VRHOT", "CPU 2 Memory ABCD"); ++ cpu2MemEFGHVRHotMonitor = ++ std::make_unique<host_error_monitor::vr_hot_monitor::VRHotMonitor>( ++ io, conn, "CPU2_MEM_EFGH_VRHOT", "CPU 2 Memory EFGH"); ++ pchThermtripMonitor = std::make_unique< ++ host_error_monitor::pch_thermtrip_monitor::PCHThermtripMonitor>( ++ io, conn, "PCH_BMC_THERMTRIP"); + + return checkMonitors(); + } +@@ -49,7 +164,13 @@ bool startMonitors(boost::asio::io_service& io, + // Notify the signal monitors of host on event + void sendHostOn() + { +- // smiMonitor->hostOn(); ++ smiMonitor->hostOn(); ++ cpu1MismatchMonitor->hostOn(); ++ cpu2MismatchMonitor->hostOn(); ++ err0Monitor->hostOn(); ++ err1Monitor->hostOn(); ++ err2Monitor->hostOn(); ++ ierrMonitor->hostOn(); + } + + } // namespace host_error_monitor::error_monitors +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0002-Filter-memory-thermtrip-events-based-on-DIMM-status.patch b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0002-Filter-memory-thermtrip-events-based-on-DIMM-status.patch new file mode 100644 index 000000000..cf74a4925 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor/0002-Filter-memory-thermtrip-events-based-on-DIMM-status.patch @@ -0,0 +1,143 @@ +From b8b701fde79e7a8ca7bf5aa6ca6832524c011fa5 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@intel.com> +Date: Tue, 15 Dec 2020 16:09:00 -0800 +Subject: [PATCH] Filter memory thermtrip events based on DIMM status + +There is a race-condition on shutdown that makes it difficult to +differentiate between a normal shutdown and a memory thermtrip +shutdown. This race-condition will be resolved in the CPLD for +future platforms but for now it requires a workaround. + +This workaround assumes that a memory thermtrip can only occur +if a DIMM temperature sensor has already reached a critical +threshold. When memory thermtrip asserts on shutdown, it only +logs an error if a DIMM is critical; otherwise it is treated +as a normal shutdown. + +Tested: +Memory thermtrip errors no longer log on each power-off. +Manually set a DIMM temperature above critical and verified +that the memory thermtrip event is logged. + +Change-Id: I9d8cf9b1de688e27babb8004b41f662242c78b3c +Signed-off-by: Jason M. Bills <jason.m.bills@intel.com> +--- + .../error_monitors/mem_thermtrip_monitor.hpp | 81 +++++++++++++++++++ + 1 file changed, 81 insertions(+) + +diff --git a/include/error_monitors/mem_thermtrip_monitor.hpp b/include/error_monitors/mem_thermtrip_monitor.hpp +index d3dff1d3b..0a3f2fc22 100644 +--- a/include/error_monitors/mem_thermtrip_monitor.hpp ++++ b/include/error_monitors/mem_thermtrip_monitor.hpp +@@ -14,6 +14,7 @@ + // limitations under the License. + */ + #pragma once ++#include <boost/container/flat_set.hpp> + #include <error_monitors/base_gpio_monitor.hpp> + #include <host_error_monitor.hpp> + #include <sdbusplus/asio/object_server.hpp> +@@ -28,6 +29,72 @@ class MemThermtripMonitor : + host_error_monitor::base_gpio_monitor::AssertValue::lowAssert; + size_t cpuNum; + ++ std::shared_ptr<sdbusplus::bus::match::match> dimmThresholdEventMonitor; ++ boost::container::flat_set<std::string> criticalDIMMs; ++ ++ std::shared_ptr<sdbusplus::bus::match::match> ++ startDIMMThresholdEventMonitor() ++ { ++ return std::make_shared<sdbusplus::bus::match::match>( ++ *conn, ++ "type='signal',interface='org.freedesktop.DBus.Properties',member='" ++ "PropertiesChanged',arg0namespace='xyz.openbmc_project.Sensor." ++ "Threshold.Critical'", ++ [this](sdbusplus::message::message& msg) { ++ std::string interfaceName; ++ boost::container::flat_map<std::string, std::variant<bool>> ++ propertiesChanged; ++ try ++ { ++ msg.read(interfaceName, propertiesChanged); ++ } ++ catch (std::exception& e) ++ { ++ std::cerr << "Unable to read threshold event\n"; ++ return; ++ } ++ // We only want to check for CriticalAlarmHigh ++ if (propertiesChanged.begin()->first != "CriticalAlarmHigh") ++ { ++ return; ++ } ++ const bool* alarm = ++ std::get_if<bool>(&(propertiesChanged.begin()->second)); ++ if (alarm == nullptr) ++ { ++ std::cerr << propertiesChanged.begin()->first ++ << " property invalid\n"; ++ return; ++ } ++ ++ // Get the sensor path and check if it's a DIMM sensor ++ std::string sensor = msg.get_path(); ++ if (sensor.find("DIMM") == std::string::npos) ++ { ++ // Not a DIMM sensor ++ return; ++ } ++ ++ // Check if the DIMM belongs to this CPU ++ if (sensor.find("CPU" + std::to_string(cpuNum)) == ++ std::string::npos) ++ { ++ return; ++ } ++ ++ if (*alarm) ++ { ++ // DIMM crossed a critical threshold, so store it ++ criticalDIMMs.insert(sensor); ++ } ++ else ++ { ++ // DIMM is no longer critical, so remove it ++ criticalDIMMs.erase(sensor); ++ } ++ }); ++ } ++ + void logEvent() override + { + std::string cpuNumber = "CPU " + std::to_string(cpuNum); +@@ -39,6 +106,17 @@ class MemThermtripMonitor : + "REDFISH_MESSAGE_ARGS=%s", cpuNumber.c_str(), NULL); + } + ++ void assertHandler() override ++ { ++ // Only log a memory thermtrip if a DIMM is critical ++ if (criticalDIMMs.empty()) ++ { ++ return; ++ } ++ ++ host_error_monitor::base_gpio_monitor::BaseGPIOMonitor::assertHandler(); ++ } ++ + public: + MemThermtripMonitor(boost::asio::io_service& io, + std::shared_ptr<sdbusplus::asio::connection> conn, +@@ -46,6 +124,9 @@ class MemThermtripMonitor : + BaseGPIOMonitor(io, conn, signalName, assertValue), + cpuNum(cpuNum) + { ++ // Start tracking critical DIMM status ++ dimmThresholdEventMonitor = startDIMMThresholdEventMonitor(); ++ + if (valid) + { + startMonitoring(); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend new file mode 100644 index 000000000..14b3885cb --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-core/host-error-monitor/host-error-monitor_%.bbappend @@ -0,0 +1,6 @@ +FILESEXTRAPATHS:append := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://0001-Configure-host-error-monitors-for-meta-wht.patch \ + file://0002-Filter-memory-thermtrip-events-based-on-DIMM-status.patch \ + " diff --git a/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci/99-peci.rules b/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci/99-peci.rules new file mode 100644 index 000000000..b587a3f57 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci/99-peci.rules @@ -0,0 +1,2 @@ +ACTION=="add", SUBSYSTEM=="peci_dev", ATTRS{name}=="*.peci-bus", SYMLINK+="peci-wire" TAG+="peci-wire" +ACTION=="add", SUBSYSTEM=="peci_dev", TAG=="peci-wire", SYMLINK+="peci-default" diff --git a/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci_%.bbappend b/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci_%.bbappend new file mode 100644 index 000000000..c5716d9b1 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-core/libpeci/libpeci_%.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +SRC_URI += "file://99-peci.rules" + +do_install:append() { + install -d ${D}/lib/udev/rules.d + install -m 0644 ${WORKDIR}/99-peci.rules ${D}/lib/udev/rules.d +} diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bbappend b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bbappend new file mode 100644 index 000000000..aa512fd0f --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native.bbappend @@ -0,0 +1,24 @@ +FILESEXTRAPATHS:append := ":${THISDIR}/${PN}" + +SRC_URI:append = " \ + file://pfr_manifest.json \ + file://pfm_config.xml \ + file://bmc_config.xml \ + file://csk_prv.pem \ + file://csk_pub.pem \ + file://rk_pub.pem \ + file://rk_prv.pem \ + file://rk_cert.pem \ + " + +do_install:append () { + install -m 400 ${WORKDIR}/pfr_manifest.json ${D}/${datadir}/pfrconfig + install -m 400 ${WORKDIR}/pfm_config.xml ${D}/${datadir}/pfrconfig/pfm_config.xml + install -m 400 ${WORKDIR}/bmc_config.xml ${D}/${datadir}/pfrconfig/bmc_config.xml + install -m 400 ${WORKDIR}/csk_prv.pem ${D}/${datadir}/pfrconfig/csk_prv.pem + install -m 400 ${WORKDIR}/csk_pub.pem ${D}/${datadir}/pfrconfig/csk_pub.pem + install -m 400 ${WORKDIR}/rk_pub.pem ${D}/${datadir}/pfrconfig/rk_pub.pem + install -m 400 ${WORKDIR}/rk_prv.pem ${D}/${datadir}/pfrconfig/rk_prv.pem + install -m 0644 ${WORKDIR}/rk_cert.pem ${D}/${datadir}/pfrconfig/rk_cert.pem +} + diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/bmc_config.xml b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/bmc_config.xml new file mode 100644 index 000000000..36a35b447 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/bmc_config.xml @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- XML file for Block Sign Tool --> +<blocksign> + <version>1</version> + <!-- Block 0 --> + <block0> + <magic>0xB6EAFD19</magic> + <pctype>4</pctype> + </block0> + <!-- Block 1 --> + <block1> + <magic>0xF27F28D7</magic> + <!-- Root key --> + <rkey> + <magic>0xA757A046</magic> + <curvemagic>0xC7B88C74</curvemagic> + <permissions>-1</permissions> + <keyid>-1</keyid> + <pubkey>rk_pub.pem</pubkey> + </rkey> + <!-- Code signing key --> + <cskey> + <magic>0x14711C2F</magic> + <curvemagic>0xC7B88C74</curvemagic> + <permissions>8</permissions> + <keyid>1</keyid> + <pubkey>csk_pub.pem</pubkey> + <sigmagic>0xDE64437D</sigmagic> + <hashalg>sha256</hashalg> + <signkey>rk_prv.pem</signkey> + <!--<script>./sign_external.sh</script>--> + </cskey> + <!-- Signature over Block 0 --> + <b0_sig> + <magic>0x15364367</magic> + <sigmagic>0xDE64437D</sigmagic> + <hashalg>sha256</hashalg> + <signkey>csk_prv.pem</signkey> + </b0_sig> + </block1> + <!-- CPLD Bitstream Specific --> + <padding> + <!-- Pad block1 such that combined block length is 1024b --> + <blockpad>1024</blockpad> + <!-- Align total package to 128 bytes --> + <align>128</align> + </padding> +</blocksign> diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_prv.pem b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_prv.pem new file mode 100644 index 000000000..a46fa2a2b --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_prv.pem @@ -0,0 +1,8 @@ +-----BEGIN EC PARAMETERS----- +BggqhkjOPQMBBw== +-----END EC PARAMETERS----- +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEIFjPqxcb6tfFWyFVaQCVjeN9MtcISpYIbNlkQoODrHTUoAoGCCqGSM49 +AwEHoUQDQgAERGJveRnhIp7I5cvmjO74MJLbUJjTfvTDKlzK0hJB0WRBEFScpb9d +xWLrwj9TNcO+EexnNcjEkF1RYNs6lHavRQ== +-----END EC PRIVATE KEY----- diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_pub.pem b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_pub.pem new file mode 100644 index 000000000..cc70d6e28 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/csk_pub.pem @@ -0,0 +1,4 @@ +-----BEGIN PUBLIC KEY----- +MFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAERGJveRnhIp7I5cvmjO74MJLbUJjT +fvTDKlzK0hJB0WRBEFScpb9dxWLrwj9TNcO+EexnNcjEkF1RYNs6lHavRQ== +-----END PUBLIC KEY----- diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfm_config.xml b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfm_config.xml new file mode 100644 index 000000000..19378d1b9 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfm_config.xml @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- XML file for Block Sign Tool --> +<blocksign> + <version>1</version> + <!-- Block 0 --> + <block0> + <magic>0xB6EAFD19</magic> + <pctype>3</pctype> + </block0> + <!-- Block 1 --> + <block1> + <magic>0xF27F28D7</magic> + <!-- Root key --> + <rkey> + <magic>0xA757A046</magic> + <curvemagic>0xC7B88C74</curvemagic> + <permissions>-1</permissions> + <keyid>-1</keyid> + <pubkey>rk_pub.pem</pubkey> + </rkey> + <!-- Code signing key --> + <cskey> + <magic>0x14711C2F</magic> + <curvemagic>0xC7B88C74</curvemagic> + <permissions>4</permissions> + <keyid>1</keyid> + <pubkey>csk_pub.pem</pubkey> + <sigmagic>0xDE64437D</sigmagic> + <hashalg>sha256</hashalg> + <signkey>rk_prv.pem</signkey> + <!--<script>./sign_external.sh</script>--> + </cskey> + <!-- Signature over Block 0 --> + <b0_sig> + <magic>0x15364367</magic> + <sigmagic>0xDE64437D</sigmagic> + <hashalg>sha256</hashalg> + <signkey>csk_prv.pem</signkey> + </b0_sig> + </block1> + <!-- CPLD Bitstream Specific --> + <padding> + <!-- Pad block1 such that combined block length is 1024b --> + <blockpad>1024</blockpad> + <!-- Align total package to 128 bytes --> + <align>128</align> + </padding> +</blocksign> diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfr_manifest.json b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfr_manifest.json new file mode 100644 index 000000000..c79b7f343 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/pfr_manifest.json @@ -0,0 +1,196 @@ +{ + "image-parts": [{ + "name": "u-boot", + "index": 0, + "offset": "0", + "size": "0x80000", + "prot_mask": 29, + "pfm": 1, + "hash": 1, + "compress": 1 + }, + { + "name": "pfm", + "index": 1, + "offset": "0x80000", + "size": "0x20000", + "prot_mask": 0, + "pfm": 1, + "hash": 0, + "compress": 0 + }, + { + "name": "u-boot-env", + "index": 2, + "offset": "0xa0000", + "size": "0x20000", + "prot_mask": 31, + "pfm": 1, + "hash": 0, + "compress": 1 + }, + { + "name": "sofs", + "index": 3, + "offset": "0xc0000", + "size": "0x200000", + "prot_mask": 31, + "pfm": 1, + "hash": 0, + "compress": 1 + }, + { + "name": "rwfs", + "index": 4, + "offset": "0x2c0000", + "size": "0x840000", + "prot_mask": 31, + "pfm": 1, + "hash": 0, + "compress": 1 + }, + { + "name": "fit-image-a", + "index": 5, + "offset": "0xb00000", + "size": "0x1f00000", + "prot_mask": 29, + "pfm": 1, + "hash": 1, + "compress": 1 + }, + { + "name": "rc-image", + "index": 6, + "offset": "0x2a00000", + "size": "0x2000000", + "prot_mask": 0, + "pfm": 1, + "hash": 0, + "compress": 0 + }, + { + "name": "image-stg", + "index": 7, + "offset": "0x4a00000", + "size": "0x3500000", + "prot_mask": 3, + "pfm": 1, + "hash": 0, + "compress": 0 + }, + { + "name": "cpld-rc", + "index": 8, + "offset": "0x7f00000", + "size": "0x100000", + "prot_mask": 0, + "pfm": 1, + "hash": 0, + "compress": 0 + } + ], + "i2c-rules": [{ + "bus-id": 3, + "rule-id": 3, + "address": "0xD0", + "cmd-whitelist": ["0x00", "0x01", "0x02", "0x03", "0x04", "0x09", "0x0A", "0x0B", "0x0C", "0x0D", "0x0E", "0x0F", + "0x10", "0x13", "0x17", "0x1B", "0x1C", "0x1D", "0x02", "0x021", "0x22", "0x23", "0x25", "0x30", + "0x31", "0x32", "0x33", "0x035", "0x36", "0x37", "0x38", "0x39", "0x3A", "0x3B", "0x3C", "0x3D"] + }, + { + "bus-id": 3, + "rule-id": 4, + "address": "0xD8", + "cmd-whitelist": ["0x00", "0x01", "0x02", "0x03", "0x04", "0x09", "0x0A", "0x0B", "0x0C", "0x0D", "0x0E", "0x0F", + "0x10", "0x13", "0x17", "0x1B", "0x1C", "0x1D", "0x02", "0x021", "0x22", "0x23", "0x25", "0x30", + "0x31", "0x32", "0x33", "0x035", "0x36", "0x37", "0x38", "0x39", "0x3A", "0x3B", "0x3C", "0x3D"] + }, + { + "bus-id": 1, + "rule-id": 6, + "address": "0xB0", + "cmd-whitelist": ["0x00", "0x03", "0x05", "0x06", "0x19", "0x1A", "0x30", "0x3A", "0x3B", "0x3C", "0x3D", "0x3E", "0x3F", + "0x79", "0x7A", "0x7B", "0x7C", "0x7D", "0x7E", "0x7F", "0x81", "0x82", "0x86", "0x87", "0x88", + "0x89", "0x8C", "0x8D", "0x8E", "0x8F", "0x90", "0x91", "0x92", "0x93", "0x94", "0x95", "0x96", + "0x97", "0x98", "0x9A", "0xA6", "0xA7", "0xD0", "0xD3", "0xD4", "0xD5", "0xD6", "0xD7", "0xD8", + "0xD9", "0xDC", "0xDD", "0xDE", "0xDE"] + }, + { + "bus-id": 1, + "rule-id": 4, + "address": "0xB2", + "cmd-whitelist": ["0x00", "0x03", "0x05", "0x06", "0x19", "0x1A", "0x30", "0x3A", "0x3B", "0x3C", "0x3D", "0x3E", "0x3F", + "0x79", "0x7A", "0x7B", "0x7C", "0x7D", "0x7E", "0x7F", "0x81", "0x82", "0x86", "0x87", "0x88", + "0x89", "0x8C", "0x8D", "0x8E", "0x8F", "0x90", "0x91", "0x92", "0x93", "0x94", "0x95", "0x96", + "0x97", "0x98", "0x9A", "0xA6", "0xA7", "0xD0", "0xD3", "0xD4", "0xD5", "0xD6", "0xD7", "0xD8", + "0xD9", "0xDC", "0xDD", "0xDE", "0xDE"] + }, + { + "bus-id": 2, + "rule-id": 1, + "address": "0xB4", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 2, + "address": "0xD4", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 3, + "address": "0x4A", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 4, + "address": "0x4C", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 5, + "address": "0xDC", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 6, + "address": "0xEC", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 7, + "address": "0xE0", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 8, + "address": "0xB0", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 9, + "address": "0xC4", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 10, + "address": "0xCC", + "cmd-whitelist": ["0x00"] + }, + { + "bus-id": 2, + "rule-id": 11, + "address": "0xE4", + "cmd-whitelist": ["0x00"] + } + ] +} diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_cert.pem b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_cert.pem new file mode 100644 index 000000000..4f9776f18 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_cert.pem @@ -0,0 +1,15 @@ +-----BEGIN CERTIFICATE----- +MIICQjCCAemgAwIBAgIUfTMHDoCGQ2wj+ZVBx0SYFOQ7PFEwCgYIKoZIzj0EAwIw +dzELMAkGA1UEBhMCVVMxDzANBgNVBAgMBk9yZWdvbjESMBAGA1UEBwwJSGlsbHNi +b3JvMRowGAYDVQQKDBFJbnRlbCBDb3Jwb3JhdGlvbjEMMAoGA1UECwwDRFBHMRkw +FwYDVQQDDBBJbnRlbCBPcGVuQk1DIEZXMB4XDTIxMDkyMTIwMDI0OFoXDTMxMDkx +OTIwMDI0OFowdzELMAkGA1UEBhMCVVMxDzANBgNVBAgMBk9yZWdvbjESMBAGA1UE +BwwJSGlsbHNib3JvMRowGAYDVQQKDBFJbnRlbCBDb3Jwb3JhdGlvbjEMMAoGA1UE +CwwDRFBHMRkwFwYDVQQDDBBJbnRlbCBPcGVuQk1DIEZXMFkwEwYHKoZIzj0CAQYI +KoZIzj0DAQcDQgAEZUL6ZcF0YN590Pq/bKPYjfa3F4E44XiKcqvS6+l2GfSdCLRh +XWHwiV803vFkTsZ1CfpzFdZGwfbwg7nvG5UpSaNTMFEwHQYDVR0OBBYEFFILKRsX +S66KNT7j3MnuxvHiLl+DMB8GA1UdIwQYMBaAFFILKRsXS66KNT7j3MnuxvHiLl+D +MA8GA1UdEwEB/wQFMAMBAf8wCgYIKoZIzj0EAwIDRwAwRAIgOUGKxkh8SsEbH1zH +SYIbR7Vv4ksodnm4cH+pHtOp3wgCIBvwM0HST0k63MfoJcPsOIdnZn/sXf7CJbA7 +ReiaxMGg +-----END CERTIFICATE----- diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_prv.pem b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_prv.pem new file mode 100644 index 000000000..9e8616795 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_prv.pem @@ -0,0 +1,8 @@ +-----BEGIN EC PARAMETERS----- +BggqhkjOPQMBBw== +-----END EC PARAMETERS----- +-----BEGIN EC PRIVATE KEY----- +MHcCAQEEIHVbq5CmT4Vr4Jb0eJK0+KhUxDOWy1kh9QYAClV5MH1GoAoGCCqGSM49 +AwEHoUQDQgAEZUL6ZcF0YN590Pq/bKPYjfa3F4E44XiKcqvS6+l2GfSdCLRhXWHw +iV803vFkTsZ1CfpzFdZGwfbwg7nvG5UpSQ== +-----END EC PRIVATE KEY----- diff --git a/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_pub.pem b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_pub.pem new file mode 100644 index 000000000..117e08bae --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-intel/intel-pfr/obmc-intel-pfr-image-native/rk_pub.pem @@ -0,0 +1,4 @@ +-----BEGIN PUBLIC KEY----- +MFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAEZUL6ZcF0YN590Pq/bKPYjfa3F4E4 +4XiKcqvS6+l2GfSdCLRhXWHwiV803vFkTsZ1CfpzFdZGwfbwg7nvG5UpSQ== +-----END PUBLIC KEY----- diff --git a/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed/0001-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch b/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed/0001-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch new file mode 100644 index 000000000..143cccdba --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed/0001-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch @@ -0,0 +1,70 @@ +From a60792bba4fb67a1a181b6e1b488d3ca7b98b305 Mon Sep 17 00:00:00 2001 +From: "Jason M. Bills" <jason.m.bills@linux.intel.com> +Date: Mon, 6 May 2019 14:18:27 -0700 +Subject: [PATCH] Enable GPIOE0 and GPIOE2 pass-through by default + +This change sets the gpio DT pinctrl default configuration to +enable GPIOE0 and GPIOE2 pass-through. Since this causes +pinctrl_get_select_default() to be called automatically for +the gpio driver to claim the GPIO pins in those groups, we +also need to call pinctrl_put() to release claim on the +pass-through GPIOs so they can be requested at runtime. + +Tested: +Disabled pass-through in uboot and confirmed that after booting +Linux, pass-through is enabled and 'cat /sys/kernel/debug/pinctrl/ +1e6e2000.syscon\:pinctrl-aspeed-g5-pinctrl/pinmux-pins' shows that +the pass-through GPIOs are UNCLAIMED. + +Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com> +--- + arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts | 4 ++++ + drivers/gpio/gpio-aspeed.c | 10 ++++++++++ + 2 files changed, 14 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +index 7d0b65bde369..f99cbef971b4 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +@@ -194,6 +194,10 @@ + + &gpio { + status = "okay"; ++ /* Enable GPIOE0 and GPIOE2 pass-through by default */ ++ pinctrl-names = "pass-through"; ++ pinctrl-0 = <&pinctrl_gpie0_default ++ &pinctrl_gpie2_default>; + gpio-line-names = + /*A0-A7*/ "","","","","","","","", + /*B0-B7*/ "FM_BMC_BOARD_SKU_ID0_N","FM_BMC_BOARD_SKU_ID1_N","FM_BMC_BOARD_SKU_ID2_N","FM_BMC_BOARD_SKU_ID3_N","FM_BMC_BOARD_SKU_ID4_N","","","", +diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c +index b966f5e28ebf..ac2282f72de6 100644 +--- a/drivers/gpio/gpio-aspeed.c ++++ b/drivers/gpio/gpio-aspeed.c +@@ -1140,6 +1140,7 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) + { + const struct of_device_id *gpio_id; + struct aspeed_gpio *gpio; ++ struct pinctrl *pinctrl; + int rc, i, banks, err; + u32 ngpio; + +@@ -1189,6 +1190,15 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) + if (!gpio->dcache) + return -ENOMEM; + ++ /* ++ * Select the pass-through pinctrl config to enable the pass-through ++ * mux for GPIOs marked as pass-through. Then call pinctrl_put() to ++ * release claim of the GPIO pins, so they can be requested at runtime. ++ */ ++ pinctrl = pinctrl_get_select(&pdev->dev, "pass-through"); ++ if (!IS_ERR(pinctrl)) ++ pinctrl_put(pinctrl); ++ + /* + * Populate it with initial values read from the HW and switch + * all command sources to the ARM by default +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed_%.bbappend new file mode 100644 index 000000000..8db895312 --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-kernel/linux/linux-aspeed_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://0001-Enable-GPIOE0-and-GPIOE2-pass-through-by-default.patch \ + " diff --git a/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru.bbappend b/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru.bbappend new file mode 100644 index 000000000..cef8105da --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru.bbappend @@ -0,0 +1,3 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI:append = " file://decodeBoardID.sh;subdir=${BP}" diff --git a/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru/decodeBoardID.sh b/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru/decodeBoardID.sh new file mode 100644 index 000000000..ef973548a --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-phosphor/fru/default-fru/decodeBoardID.sh @@ -0,0 +1,35 @@ +#!/bin/bash + +# this script uses the BOARD_ID set from checkFru.sh and provides the NAME, +# PRODID, and EEPROM_FRU values for this platform +decode_board_id() { + if grep -q 'CPU part\s*: 0xb76' /proc/cpuinfo; then + # AST2500 + if [ -f $fruFile -a -f $prodIDFile -a $BOARD_ID -ne 0 ]; then + exit 0 + fi + + case $BOARD_ID in + 12) NAME="D50TNP1SB" + PRODID="0x99";; + 40) NAME="CooperCity" + PRODID="0x9d";; + 42) NAME="WilsonCity" + PRODID="0x91";; + 44) NAME="WilsonCityM" + PRODID="0x91";; + 45) NAME="WilsonCity" + PRODID="0x91";; + 60) NAME="M50CYP2SB2U" + PRODID="0x98";; + 62) NAME="WilsonPoint" + PRODID="0x9a";; + 16) EEPROM_FRU=true + PRODID="0xA1";; + 1) EEPROM_FRU=true + PRODID="0xA5";; + 0) EEPROM_FRU=true + PRODID="0xA0";; + esac + fi +} diff --git a/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json b/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json new file mode 100644 index 000000000..ff570c63c --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb/ipmb-channels.json @@ -0,0 +1,22 @@ +{ + "channels": [ + { + "type": "me", + "slave-path": "/dev/ipmb-5", + "bmc-addr": 32, + "remote-addr": 44 + }, + { + "type": "ipmb", + "slave-path": "/dev/ipmb-0", + "bmc-addr": 32, + "remote-addr": 88 + }, + { + "type": "slot-ipmb", + "slave-path": "/dev/ipmb-6", + "bmc-addr": 18, + "remote-addr": 176 + } + ] +} diff --git a/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend b/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend new file mode 100644 index 000000000..c088629fa --- /dev/null +++ b/meta-openbmc-mods/meta-wht/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI:append = " file://ipmb-channels.json" + +do_install:append(){ + install -m 0644 -D ${WORKDIR}/ipmb-channels.json \ + ${D}/usr/share/ipmbbridge/ +} diff --git a/meta-openbmc-mods/meta-wolfpass/conf/bblayers.conf.sample b/meta-openbmc-mods/meta-wolfpass/conf/bblayers.conf.sample new file mode 100644 index 000000000..925cdbd97 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/conf/bblayers.conf.sample @@ -0,0 +1,25 @@ +# LAYER_CONF_VERSION is increased each time build/conf/bblayers.conf +# changes incompatibly +LCONF_VERSION = "14" + +BBPATH = "${TOPDIR}" +BBFILES ?= "" + +BBLAYERS ?= " \ + ##OEROOT##/meta \ + ##OEROOT##/meta-poky \ + ##OEROOT##/meta-openembedded/meta-oe \ + ##OEROOT##/meta-openembedded/meta-networking \ + ##OEROOT##/meta-openembedded/meta-perl \ + ##OEROOT##/meta-openembedded/meta-python \ + ##OEROOT##/meta-phosphor \ + ##OEROOT##/meta-aspeed \ + ##OEROOT##/meta-x86 \ + ##OEROOT##/meta-openbmc-mods \ + ##OEROOT##/meta-intel-openbmc \ + ##OEROOT##/meta-openbmc-mods/meta-common \ + ##OEROOT##/meta-openbmc-mods/meta-common-small \ + ##OEROOT##/meta-openbmc-mods/meta-ast2500 \ + ##OEROOT##/meta-openbmc-mods/meta-wolfpass \ + ##OEROOT##/meta-security \ + " diff --git a/meta-openbmc-mods/meta-wolfpass/conf/conf-notes.txt b/meta-openbmc-mods/meta-wolfpass/conf/conf-notes.txt new file mode 100644 index 000000000..91059a72d --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/conf/conf-notes.txt @@ -0,0 +1,6 @@ +Common targets are: + intel-platforms + obmc-phosphor-image + qemu-helper-native + virtual/kernel + phosphor-ipmi-host diff --git a/meta-openbmc-mods/meta-wolfpass/conf/layer.conf b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf new file mode 100644 index 000000000..00a2e00a2 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf @@ -0,0 +1,14 @@ +LOCALCONF_VERSION = "4" +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have recipes-* directories, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILE_COLLECTIONS += "wolfpass" +BBFILE_PATTERN_wolfpass = "^${LAYERDIR}/" +BBFILE_PRIORITY_wolfpass = "11" +LAYERSERIES_COMPAT_wolfpass = "gatesgarth hardknott honister" + +PRODUCT_GENERATION = "prl" diff --git a/meta-openbmc-mods/meta-wolfpass/conf/local.conf.sample b/meta-openbmc-mods/meta-wolfpass/conf/local.conf.sample new file mode 100644 index 000000000..7549e10c2 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/conf/local.conf.sample @@ -0,0 +1,24 @@ +MACHINE ??= "intel-ast2500" +#DL_DIR ?= "/~YoctoDownloads" +#SSTATE_DIR ?= "/~YoctoSstate-cache" +DISTRO ?= "openbmc-phosphor" +PACKAGE_CLASSES ?= "package_rpm" +SANITY_TESTED_DISTROS:append ?= " RedHatEnterpriseWorkstation-6.*" +EXTRA_IMAGE_FEATURES = "validation-unsecure" +# Uncomment the following line to enable debug features / default user account. +#EXTRA_IMAGE_FEATURES += "debug-tweaks" +USER_CLASSES ?= "buildstats" +PATCHRESOLVE = "noop" +BB_DISKMON_DIRS ??= "\ + STOPTASKS,${TMPDIR},1G,100K \ + STOPTASKS,${DL_DIR},1G,100K \ + STOPTASKS,${SSTATE_DIR},1G,100K \ + STOPTASKS,/tmp,100M,100K \ + ABORT,${TMPDIR},100M,1K \ + ABORT,${DL_DIR},100M,1K \ + ABORT,${SSTATE_DIR},100M,1K \ + ABORT,/tmp,10M,1K" +CONF_VERSION = "4" +#BB_NUMBER_THREADS = "70" + +FULL_OPTIMIZATION = "-Os -pipe ${DEBUG_FLAGS}" diff --git a/meta-openbmc-mods/meta-wolfpass/conf/machine/intel-ast2500.conf b/meta-openbmc-mods/meta-wolfpass/conf/machine/intel-ast2500.conf new file mode 100644 index 000000000..907b9f1e1 --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/conf/machine/intel-ast2500.conf @@ -0,0 +1 @@ +require conf/machine/include/intel-ast2500.inc diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru.bbappend new file mode 100644 index 000000000..cef8105da --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru.bbappend @@ -0,0 +1,3 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI:append = " file://decodeBoardID.sh;subdir=${BP}" diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru/decodeBoardID.sh b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru/decodeBoardID.sh new file mode 100644 index 000000000..bcf2ade3f --- /dev/null +++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/fru/default-fru/decodeBoardID.sh @@ -0,0 +1,14 @@ +#!/bin/bash + +# this script uses the BOARD_ID set from checkFru.sh and provides the NAME, +# PRODID, and EEPROM_FRU values for this platform +decode_board_id() { + if grep -q 'CPU part\s*: 0xb76' /proc/cpuinfo; then + # AST2500 + if [ -f $fruFile -a -f $prodIDFile -a $BOARD_ID -ne 0 ]; then + exit 0 + fi + NAME="S2600WFT" + PRODID="0x7b" + fi +} diff --git a/meta-openbmc-mods/recipes-utilities/collectd/collectd_%.bbappend b/meta-openbmc-mods/recipes-utilities/collectd/collectd_%.bbappend new file mode 100644 index 000000000..814f7a57b --- /dev/null +++ b/meta-openbmc-mods/recipes-utilities/collectd/collectd_%.bbappend @@ -0,0 +1,2 @@ +SYSTEMD_AUTO_ENABLE:${PN} = "disable" +EXTRA_OECONF += " --disable-notify_email --disable-notify_nagios --disable-apache --disable-apcups --disable-battery --disable-bind --disable-email --disable-hddtemp --disable-nginx --disable-infiniband --disable-openvpn --disable-zfs_arc --disable-teamspeak2" |
