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Diffstat (limited to 'meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch')
-rw-r--r--meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch26
1 files changed, 13 insertions, 13 deletions
diff --git a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
index 99222f418..0a774946d 100644
--- a/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
+++ b/meta-openbmc-mods/meta-ast2500/recipes-bsp/u-boot/files/0035-PFR-platform-EXTRST-reset-mask-selection.patch
@@ -1,4 +1,4 @@
-From a5dc9fb9b33aa732858dc574f1ada22bc4cbd57c Mon Sep 17 00:00:00 2001
+From 9da7210783beeee237d82ee5306710c42c8025fa Mon Sep 17 00:00:00 2001
From: Vikram Bodireddy <vikram.bodireddy@intel.com>
Date: Thu, 5 Sep 2019 15:03:21 +0530
Subject: [PATCH] PFR platform - EXTRST# reset mask selection
@@ -12,13 +12,13 @@ to be reset so that Host functionality would be intact.
Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
---
- arch/arm/include/asm/arch-aspeed/ast-g5-intel.h | 31 +++++++++++++++++++++++++
- arch/arm/include/asm/arch-aspeed/regs-scu.h | 29 +++++++++++++++++++++++
- board/aspeed/ast-g5/ast-g5-intel.c | 9 +++++++
+ .../include/asm/arch-aspeed/ast-g5-intel.h | 31 +++++++++++++++++++
+ arch/arm/include/asm/arch-aspeed/regs-scu.h | 29 +++++++++++++++++
+ board/aspeed/ast-g5/ast-g5-intel.c | 9 ++++++
3 files changed, 69 insertions(+)
diff --git a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
-index 64f4ed1..b9386b2 100644
+index 64f4ed17bfd5..b9386b2cf61a 100644
--- a/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
+++ b/arch/arm/include/asm/arch-aspeed/ast-g5-intel.h
@@ -12,6 +12,37 @@
@@ -60,7 +60,7 @@ index 64f4ed1..b9386b2 100644
int intel_force_firmware_jumper_enabled(void);
int intel_failed_boot(void);
diff --git a/arch/arm/include/asm/arch-aspeed/regs-scu.h b/arch/arm/include/asm/arch-aspeed/regs-scu.h
-index 1bdb1d8..0a4fb6f 100644
+index 1bdb1d85746d..0a4fb6f77309 100644
--- a/arch/arm/include/asm/arch-aspeed/regs-scu.h
+++ b/arch/arm/include/asm/arch-aspeed/regs-scu.h
@@ -144,6 +144,35 @@
@@ -100,13 +100,13 @@ index 1bdb1d8..0a4fb6f 100644
#define SCU_RESET_CRT3 (0x1 << 8)
#define SCU_RESET_CRT2 (0x1 << 7)
diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
-index 06c6708..e6dd2e6 100644
+index 4d5fa2c023c8..4ca8ff38b809 100644
--- a/board/aspeed/ast-g5/ast-g5-intel.c
+++ b/board/aspeed/ast-g5/ast-g5-intel.c
-@@ -662,6 +662,15 @@ extern void espi_init(void);
- extern void kcs_init(void);
- void ast_g5_intel(void)
+@@ -686,6 +686,15 @@ void ast_g5_intel(void)
{
+ int platform_id;
+
+ /* EXTRST# mask for PFR platform
+ * EXTRST# is used by PFR CPLD to keep BMC in
+ * reset during firmware authentication, updates and recovery
@@ -117,8 +117,8 @@ index 06c6708..e6dd2e6 100644
+ ast_scu_write(AST_WDT_RESET_MASK, AST_SCU_WDT_RESET);
+
#ifdef USE_SOC_UART_DEBUG
- /* Enable uart port debug function */
- ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) &
+ /* Enable uart port debug function */
+ ast_scu_write(ast_scu_read(AST_SCU_MISC1_CTRL) &
--
-2.7.4
+2.17.1