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Diffstat (limited to 'meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch')
-rw-r--r--meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch30
1 files changed, 18 insertions, 12 deletions
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch
index 7868c03d6..1b2cc83a1 100644
--- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0004-AST2600-Adjust-default-GPIO-settings.patch
@@ -1,4 +1,4 @@
-From 2e848b74af709f84d1e9fe27a58a74bfc686bfff Mon Sep 17 00:00:00 2001
+From b6bce26bf19e74863e145e6e6e1f6e458077a31a Mon Sep 17 00:00:00 2001
From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Date: Fri, 3 Jan 2020 15:14:09 -0800
Subject: [PATCH] AST2600: Adjust default GPIO settings
@@ -10,14 +10,14 @@ Subject: [PATCH] AST2600: Adjust default GPIO settings
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
---
- board/aspeed/ast2600_intel/intel.c | 44 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
+ board/aspeed/ast2600_intel/intel.c | 50 ++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 50 insertions(+)
diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c
-index eb9b3959625e..25c61d1a806c 100644
+index d1ac8651ac6c..b1a08db91bec 100644
--- a/board/aspeed/ast2600_intel/intel.c
+++ b/board/aspeed/ast2600_intel/intel.c
-@@ -151,6 +151,48 @@ static void sgpio_init(void)
+@@ -162,6 +162,54 @@ static void sgpio_init(void)
SCU_BASE | SCU_414);
}
@@ -50,11 +50,17 @@ index eb9b3959625e..25c61d1a806c 100644
+#define SCU_610_GPIOB6 BIT(14)
+ writel(readl(SCU_BASE | SCU_610) | SCU_610_GPIOB6, SCU_BASE | SCU_610);
+
++ /*
++ * GPIO C5 has a connection between BMC(3.3v) and CPU(1.0v) so if we
++ * set it as an logic high output, it will be clipped by a protection
++ * circuit in the CPU and eventually the signal will be detected as
++ * logic low. So we leave this GPIO as an input so that the signal
++ * can be pulled up by a CPU internal resister. The signal will be
++ * 1.0v logic high resultingy.
++ */
+#define GPIO_C5 BIT(21)
-+ writel(readl(AST_GPIO_BASE | GPIO_004) | GPIO_C5,
++ writel(readl(AST_GPIO_BASE | GPIO_004) & ~GPIO_C5,
+ AST_GPIO_BASE | GPIO_004);
-+ writel(readl(AST_GPIO_BASE | GPIO_000) | GPIO_C5,
-+ AST_GPIO_BASE | GPIO_000);
+
+#define GPIO_G6 BIT(22)
+ writel(readl(AST_GPIO_BASE | GPIO_024) | GPIO_G6,
@@ -63,10 +69,10 @@ index eb9b3959625e..25c61d1a806c 100644
+ AST_GPIO_BASE | GPIO_020);
+}
+
- void espi_init(void);
- int arch_interrupt_init_early(void);
-
-@@ -167,6 +209,8 @@ int board_early_init_f(void)
+ static void timer_handler(void *regs)
+ {
+ printf("+");
+@@ -175,6 +223,8 @@ int board_early_init_f(void)
* I am not sure if it actually does anything... */
arch_interrupt_init_early();