diff options
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch | 61 |
1 files changed, 38 insertions, 23 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch index f7dd80504..e11f15870 100644 --- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0009-Add-basic-GPIO-support.patch @@ -1,7 +1,7 @@ -From 0fbd5fe6fa08f709b64bdbad6440ea77b422fc4b Mon Sep 17 00:00:00 2001 +From 15d04184a94aca6db889d77c2cc5a800b280da4b Mon Sep 17 00:00:00 2001 From: Vernon Mauery <vernon.mauery@linux.intel.com> Date: Fri, 16 Nov 2018 09:58:01 -0800 -Subject: [PATCH] Add basic GPIO support +Subject: [PATCH 01/30] Add basic GPIO support Add a table of well-known gpios (such as FP LEDs and FF UPD jumper) and initialize them at boot. @@ -11,18 +11,19 @@ Add a mechanism to get/set well known gpios from command line. Change-Id: I4136a5ccb048b3604f13b17ea0c18a4bc596c249 Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> +%% original patch: 0009-Add-basic-GPIO-support.patch --- board/aspeed/ast-g5/Makefile | 1 + - board/aspeed/ast-g5/ast-g5-gpio.c | 195 +++++++++++++++++++++++++++++++++++++ - board/aspeed/ast-g5/ast-g5-gpio.h | 102 +++++++++++++++++++ - board/aspeed/ast-g5/ast-g5-intel.c | 42 ++++++++ + board/aspeed/ast-g5/ast-g5-gpio.c | 202 +++++++++++++++++++++++++++++ + board/aspeed/ast-g5/ast-g5-gpio.h | 103 +++++++++++++++ + board/aspeed/ast-g5/ast-g5-intel.c | 45 +++++++ board/aspeed/ast-g5/ast-g5.h | 1 + - 5 files changed, 341 insertions(+) + 5 files changed, 352 insertions(+) create mode 100644 board/aspeed/ast-g5/ast-g5-gpio.c create mode 100644 board/aspeed/ast-g5/ast-g5-gpio.h diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile -index 58e0c64..2970ae5 100644 +index 58e0c648f4..2970ae5741 100644 --- a/board/aspeed/ast-g5/Makefile +++ b/board/aspeed/ast-g5/Makefile @@ -2,3 +2,4 @@ obj-y += ast-g5.o @@ -32,10 +33,10 @@ index 58e0c64..2970ae5 100644 +obj-y += ast-g5-gpio.o diff --git a/board/aspeed/ast-g5/ast-g5-gpio.c b/board/aspeed/ast-g5/ast-g5-gpio.c new file mode 100644 -index 0000000..d596c15 +index 0000000000..dc6962f4ba --- /dev/null +++ b/board/aspeed/ast-g5/ast-g5-gpio.c -@@ -0,0 +1,195 @@ +@@ -0,0 +1,202 @@ +/* + * Copyright 2018 Intel Corporation + * @@ -104,13 +105,13 @@ index 0000000..d596c15 + return; + } + port = GPIO_PORT(gpio_table[n].u8PortPin); -+ assert = GPIO_PORT(gpio_table[n].u8Value); ++ assert = GPIO_ASSERT(gpio_table[n].u8PinCFG); + pin = GPIO_PIN(gpio_table[n].u8PortPin); + base = GPIO_BASES[GPIO_GROUP(port)].u32ddr; + shift = GPIO_SHIFT(port, pin); + + gpio_value = readl(base + GPIO_DATA_VALUE); -+ if ((assert &&asserted) || !(assert || asserted)) { ++ if ((assert && asserted) || !(assert || asserted)) { + // set the bit + gpio_value |= (1 << shift); + } else { @@ -133,7 +134,7 @@ index 0000000..d596c15 + return -1; + } + port = GPIO_PORT(gpio_table[n].u8PortPin); -+ assert = GPIO_PORT(gpio_table[n].u8Value); ++ assert = GPIO_ASSERT(gpio_table[n].u8PinCFG); + pin = GPIO_PIN(gpio_table[n].u8PortPin); + base = GPIO_BASES[GPIO_GROUP(port)].u32ddr; + shift = GPIO_SHIFT(port, pin); @@ -141,6 +142,9 @@ index 0000000..d596c15 + gpio_value = readl(base + GPIO_DATA_VALUE); + gpio_value >>= shift; + gpio_value &= 1; ++ // the output here is the logical output, which is ++ // NOT (value XOR assert) ++ // This just gets there without a conditional + gpio_value ^= assert; + return !gpio_value; +} @@ -166,6 +170,8 @@ index 0000000..d596c15 + uint8_t pin; + uint32_t base; + uint8_t shift; ++ uint8_t assert; ++ uint8_t init_val; + + port = GPIO_PORT(gpio_table[i].u8PortPin); + pin = GPIO_PIN(gpio_table[i].u8PortPin); @@ -182,7 +188,9 @@ index 0000000..d596c15 + + /* set data value */ + value = readl(base + GPIO_DATA_VALUE); -+ if (gpio_table[i].u8Value) ++ assert = GPIO_ASSERT(gpio_table[i].u8PinCFG); ++ init_val = gpio_table[i].u8Value; ++ if ((assert && init_val) || !(assert || init_val)) + value |= (1 << shift); + else + value &= ~(1 << shift); @@ -211,7 +219,7 @@ index 0000000..d596c15 + if (argc < 3) { + return 1; + } -+ n = simple_strtoul(argv[2], NULL, 16); ++ n = simple_strtoul(argv[2], NULL, 0); + if (argv[1][0] == 'g') { + printf("%d\n", gpio_get_value(n)); + return 0; @@ -221,7 +229,7 @@ index 0000000..d596c15 + } + if (argv[1][0] == 's') { + int value; -+ value = simple_strtoul(argv[3], NULL, 16); ++ value = simple_strtoul(argv[3], NULL, 0); + gpio_set_value(n, value); + return 0; + } @@ -233,10 +241,10 @@ index 0000000..d596c15 + ""); diff --git a/board/aspeed/ast-g5/ast-g5-gpio.h b/board/aspeed/ast-g5/ast-g5-gpio.h new file mode 100644 -index 0000000..a820c0f +index 0000000000..54b7388a22 --- /dev/null +++ b/board/aspeed/ast-g5/ast-g5-gpio.h -@@ -0,0 +1,102 @@ +@@ -0,0 +1,103 @@ +#ifndef __HW_GPIO_H__ +#define __HW_GPIO_H__ + @@ -305,6 +313,7 @@ index 0000000..a820c0f +#define GPIO_PORT(N) (N >> 3) +#define GPIO_SHIFT(PORT, PIN) ((PIN) + (((PORT) % 4) * 8)) +#define GPIO_GROUP(PORT) ((PORT) / 4) ++#define GPIO_ASSERT(N) (((N) >> 4) & 0x01) + +#define ID_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_6) +#define GRN_LED_PORT_PIN PORT_PIN(GPIO_PORT_S, GPIO_PIN_4) @@ -340,10 +349,10 @@ index 0000000..a820c0f + +#endif /* __HW_GPIO_H__ */ diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c -index c2a8b33..069e7a3 100644 +index c2a8b33aec..1868c230eb 100644 --- a/board/aspeed/ast-g5/ast-g5-intel.c +++ b/board/aspeed/ast-g5/ast-g5-intel.c -@@ -14,6 +14,47 @@ +@@ -14,6 +14,50 @@ #include <asm/arch/aspeed.h> #include "ast-g5.h" @@ -361,8 +370,11 @@ index c2a8b33..069e7a3 100644 +#define GPIO_CFG_DEFAULT (GPCFG_ACTIVE_HIGH | GPCFG_LEVEL_TRIG) +// Active High, Level, Output Disabled + ++#define GPIO_CFG_LOW_INPUT (GPCFG_LEVEL_TRIG) ++// Active Low, Level, Output Disabled ++ +#define GPIO_CFG_FP_LED (GPCFG_OUTPUT_EN) -+// Active High, Pull-up, Level, Output Disabled ++// Active High, Pull-up, Level, Output Enabled + +// Format is: +// GPIO PORT, GPIO PIN Number, GPIO PIN Configuration, GPIO PIN Value, GPIO @@ -381,7 +393,7 @@ index c2a8b33..069e7a3 100644 + GPIO_DEBOUNCE_NONE}, + + /* Force Update Jumper -- pin D0 */ -+ [GPIO_FF_UPD_JUMPER] = {FORCE_BMC_UPDATE_PORT_PIN, GPIO_CFG_DEFAULT, 0, ++ [GPIO_FF_UPD_JUMPER] = {FORCE_BMC_UPDATE_PORT_PIN, GPIO_CFG_LOW_INPUT, 0, + GPIO_DEBOUNCE_8MS}, + + /* Enable Pulse -- pin D6 */ @@ -391,7 +403,7 @@ index c2a8b33..069e7a3 100644 #define LPC_SNOOP_ADDR 0x80 #define HICR5 0x080 /* Host Interface Control Register 5 */ -@@ -107,6 +148,7 @@ static void sgpio_init(void) +@@ -107,6 +151,7 @@ static void sgpio_init(void) extern void espi_init(void); void ast_g5_intel(void) { @@ -400,7 +412,7 @@ index c2a8b33..069e7a3 100644 sgpio_init(); } diff --git a/board/aspeed/ast-g5/ast-g5.h b/board/aspeed/ast-g5/ast-g5.h -index 9fd10ec..908db14 100644 +index 9fd10eccb3..908db1477b 100644 --- a/board/aspeed/ast-g5/ast-g5.h +++ b/board/aspeed/ast-g5/ast-g5.h @@ -3,5 +3,6 @@ @@ -410,3 +422,6 @@ index 9fd10ec..908db14 100644 +#include "ast-g5-gpio.h" #endif /* _AST_G5_H_ */ +-- +2.17.1 + |