diff options
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch index 5522d5f6c..915b0197f 100644 --- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0021-AST2600-Enable-host-searial-port-clock-configuration.patch @@ -1,4 +1,4 @@ -From ccfc20ceb2931e84ffb02b01099ccb7610b44d9c Mon Sep 17 00:00:00 2001 +From c2e2496dfd8cde56e32274b11968185a77f40736 Mon Sep 17 00:00:00 2001 From: Kuiying Wang <kuiying.wang@intel.com> Date: Tue, 10 Dec 2019 14:58:10 +0800 Subject: [PATCH] AST2600: Enable host searial port clock configuration in @@ -14,18 +14,17 @@ by default is 24Mhz. Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> --- - board/aspeed/ast2600_intel/intel.c | 36 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) + board/aspeed/ast2600_intel/intel.c | 35 +++++++++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c -index 100eb1e..eb6fbaf 100644 +index a02e246d0d81..eb9b3959625e 100644 --- a/board/aspeed/ast2600_intel/intel.c +++ b/board/aspeed/ast2600_intel/intel.c -@@ -35,9 +35,45 @@ int gpio_abort(void) - return value <= 0 ? 0 : 1; +@@ -36,9 +36,44 @@ int gpio_abort(void) } -+#define SCU_BASE 0x1E6E2000 + #define SCU_BASE 0x1E6E2000 +#define SCU_338 0x338 //Generate UART 24 MHz Reference from UXCLK +#define SCU_33C 0x33c //Generate UART 24 MHz Reference from HUXCLK +#define SCU_338_R_VALUE_192MHZ 0x8e |