diff options
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch new file mode 100644 index 000000000..b36627d17 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0040-Initialize-the-BMC-host-mailbox-at-reset-time.patch @@ -0,0 +1,65 @@ +From 933d80ac82dbe1f74c653b0ac505fde406e2553c Mon Sep 17 00:00:00 2001 +From: Vernon Mauery <vernon.mauery@intel.com> +Date: Mon, 27 Jan 2020 15:13:10 -0800 +Subject: [PATCH] Initialize the BMC/host mailbox at reset time + +When the BMC comes out of reset, the mailbox registers need to be set so +the communications with the host can start properly. + +Tested: boot the BMC and take note that the mailbox registers are no + longer random garbage. + +Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> +--- + board/aspeed/ast-g5/ast-g5-intel.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c +index ce87a46cd1..1086742045 100644 +--- a/board/aspeed/ast-g5/ast-g5-intel.c ++++ b/board/aspeed/ast-g5/ast-g5-intel.c +@@ -575,6 +575,33 @@ static void pwm_init(void) + writel(val, PWM_BASE_ADDR + PWM_CONTROL); + } + ++#define AST_MBX_COUNT 16 ++#define MB_HINIT_BP_REG1 (0) ++#define MB_HINIT_BP_REG2 (1) // reserved for future bit definition. ++#define MB_FW_MJ_VER_REG (2) ++#define MB_FW_MN_VER_REG (3) ++#define MB_HINIT_ERR_REG (4) ++#define MB_BOOTL_BP_REG1 (5) ++#define MB_BOOTL_BP_REG2 (6) // tracks which image selected ++#define MB_BOOTL_ERR_REG (7) ++#define MB_RUNTM_BP_REG1 (8) ++#define MB_RUNTM_BP_REG2 (9) // reserved for future bit definition. ++#define MB_RUNTM_ERR_REG (10) ++static void mailbox_init(void) ++{ ++ /* clear out default mbox values */ ++ int i; ++ for (i = 0; i < AST_MBX_COUNT; i++) ++ { ++ writel(0, AST_MBX_BASE + 4 * i); ++ } ++ /* by the time this is called, all the hardware init is done ++ * so we can mark that as complete */ ++ writel(0xff, AST_MBX_BASE + 4 * MB_HINIT_BP_REG1); ++ /* mark progress up through booting linux */ ++ writel(0x1f, AST_MBX_BASE + 4 * MB_BOOTL_BP_REG1); ++} ++ + extern void espi_init(void); + extern void kcs_init(void); + void ast_g5_intel(void) +@@ -597,6 +624,7 @@ void ast_g5_intel(void) + set_cpld_reg(PFR_CPLD_BOOT_CHECKPOINT_REG, PFR_CPLD_CHKPOINT_START); + + uart_init(); ++ mailbox_init(); + pwm_init(); + gpio_init(gpio_table, ARRAY_SIZE(gpio_table)); + espi_init(); +-- +2.17.1 + |