1 files changed, 0 insertions, 97 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0089-ast2600-enable-high-speed-uart-in-kernel.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0089-ast2600-enable-high-speed-uart-in-kernel.patch
deleted file mode 100644
index 962d42e6f..000000000
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0089-ast2600-enable-high-speed-uart-in-kernel.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 054391014d04e5b97ae62e1bf5e6aed005f3c67a Mon Sep 17 00:00:00 2001
-From: Kuiying Wang <kuiying.wang@intel.com>
-Date: Fri, 13 Dec 2019 16:15:16 +0800
-Subject: [PATCH] ast2600: enable high speed uart in kernel.
-
-Tested:
-1. Config baud rate to 921600 in BIOS setup page
-2. BMC could change env variable "hostserialcfg" to 1.
-3. BMC is force to reboot and SPA baud rate is changed to 921600 successfully.
-4. It is same for back to 115200.
-
-Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
----
- drivers/clk/clk-ast2600.c                 | 26 +++++++++++++++++++-------
- include/dt-bindings/clock/ast2600-clock.h |  2 ++
- 2 files changed, 21 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/clk/clk-ast2600.c b/drivers/clk/clk-ast2600.c
-index c7236e39ef85..af908b2dbeb6 100644
---- a/drivers/clk/clk-ast2600.c
-+++ b/drivers/clk/clk-ast2600.c
-@@ -15,7 +15,7 @@
- 
- #include "clk-aspeed.h"
- 
--#define ASPEED_G6_NUM_CLKS		71
-+#define ASPEED_G6_NUM_CLKS		ASPEED_CLK_MAX
- 
- #define ASPEED_G6_SILICON_REV		0x004
- 
-@@ -43,6 +43,9 @@
- #define ASPEED_MAC12_CLK_DLY		0x340
- #define ASPEED_MAC34_CLK_DLY		0x350
- 
-+#define ASPEED_G6_GEN_UART_REF		0x338
-+#define UART_192MHZ_R_N_VALUE		0x3c38e
-+
- /* Globally visible clocks */
- static DEFINE_SPINLOCK(aspeed_g6_clk_lock);
- 
-@@ -76,7 +79,7 @@ static const struct aspeed_gate_data aspeed_g6_gates[] = {
- 	/* Reserved 11/12 */
- 	[ASPEED_CLK_GATE_YCLK]		= { 13,  4, "yclk-gate",	NULL,	 0 },	/* HAC */
- 	[ASPEED_CLK_GATE_USBPORT1CLK]	= { 14, 14, "usb-port1-gate",	NULL,	 0 },	/* USB2 hub/USB2 host port 1/USB1.1 dev */
--	[ASPEED_CLK_GATE_UART5CLK]	= { 15, -1, "uart5clk-gate",	"uart",	 0 },	/* UART5 */
-+	[ASPEED_CLK_GATE_UART5CLK]	= { 15, -1, "uart5clk-gate",	"uart5",	 0 },	/* UART5 */
- 	/* Reserved 16/19 */
- 	[ASPEED_CLK_GATE_MAC1CLK]	= { 20, 11, "mac1clk-gate",	"mac12", 0 },	/* MAC1 */
- 	[ASPEED_CLK_GATE_MAC2CLK]	= { 21, 12, "mac2clk-gate",	"mac12", 0 },	/* MAC2 */
-@@ -437,17 +440,26 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev)
- 		return ret;
- 	}
- 
--	/* UART clock div13 setting */
--	regmap_read(map, ASPEED_G6_MISC_CTRL, &val);
--	if (val & UART_DIV13_EN)
--		rate = 24000000 / 13;
-+	/* UART clock setting */
-+	regmap_read(map, ASPEED_G6_GEN_UART_REF, &val);
-+	if (val == UART_192MHZ_R_N_VALUE){
-+		rate = 192000000 / 13;
-+		dev_err(dev, "192Mhz baud rate 921600\n");
-+	}
- 	else
--		rate = 24000000;
-+		rate = 24000000 / 13;
- 	hw = clk_hw_register_fixed_rate(dev, "uart", NULL, 0, rate);
- 	if (IS_ERR(hw))
- 		return PTR_ERR(hw);
- 	aspeed_g6_clk_data->hws[ASPEED_CLK_UART] = hw;
- 
-+	/* UART5 clock setting */
-+	rate = 24000000 / 13;
-+	hw = clk_hw_register_fixed_rate(dev, "uart5", NULL, 0, rate);
-+	if (IS_ERR(hw))
-+		return PTR_ERR(hw);
-+	aspeed_g6_clk_data->hws[ASPEED_CLK_UART5] = hw;
-+
- 	/* UART6~13 clock div13 setting */
- 	regmap_read(map, 0x80, &val);
- 	if (val & BIT(31))
-diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h
-index 3d90582a813f..4952f7683be7 100644
---- a/include/dt-bindings/clock/ast2600-clock.h
-+++ b/include/dt-bindings/clock/ast2600-clock.h
-@@ -87,6 +87,8 @@
- #define ASPEED_CLK_MAC2RCLK		68
- #define ASPEED_CLK_MAC3RCLK		69
- #define ASPEED_CLK_MAC4RCLK		70
-+#define ASPEED_CLK_UART5		71
-+#define ASPEED_CLK_MAX			72
- 
- /* Only list resets here that are not part of a gate */
- #define ASPEED_RESET_ADC		55
--- 
-2.7.4
-