diff options
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed')
12 files changed, 828 insertions, 0 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-peci-Add-debug-printing-to-check-caller-PID.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-peci-Add-debug-printing-to-check-caller-PID.patch new file mode 100644 index 000000000..fbd51df7a --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0001-peci-Add-debug-printing-to-check-caller-PID.patch @@ -0,0 +1,43 @@ +From 7474fe190f770e064a5ce5e939bd713ce2aa1de5 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Wed, 3 Feb 2021 16:18:37 -0800 +Subject: [PATCH] peci: Add debug printing to check caller PID + +This commit adds debug printing out to check caller PID for traffic +profiling. + +The printing can be enabled by this command: +echo -n 'file drivers/peci/peci-core.c line 218 +p' > /sys/kernel/debug/dynamic_debug/control +echo '8' > /proc/sys/kernel/printk + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + drivers/peci/peci-core.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c +index 10375e6087a5..02c8502fd846 100644 +--- a/drivers/peci/peci-core.c ++++ b/drivers/peci/peci-core.c +@@ -194,6 +194,7 @@ static int __peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg, + bool do_retry, bool has_aw_fcs) + { + uint interval_us = PECI_DEV_RETRY_INTERVAL_MIN_USEC; ++ char task_name[TASK_COMM_LEN]; + ulong timeout = jiffies; + u8 aw_fcs; + int ret; +@@ -214,6 +215,10 @@ static int __peci_xfer(struct peci_adapter *adapter, struct peci_xfer_msg *msg, + } + } + ++ get_task_comm(task_name, current); ++ dev_dbg(&adapter->dev, "%s is called by %s(%d) through %s\n", ++ __func__, task_name, current->pid, adapter->name); ++ + /* + * For some commands, the PECI originator may need to retry a command if + * the processor PECI client responds with a 0x8x completion code. In +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0002-soc-aspeed-add-AST2600-A0-specific-fix-into-mbox-dri.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0002-soc-aspeed-add-AST2600-A0-specific-fix-into-mbox-dri.patch new file mode 100644 index 000000000..1e1dac7a8 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0002-soc-aspeed-add-AST2600-A0-specific-fix-into-mbox-dri.patch @@ -0,0 +1,42 @@ +From ae96ce5f2a5bd76b234cea6fc3f0bf1df74387f3 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Thu, 4 Feb 2021 00:29:55 -0800 +Subject: [PATCH] soc: aspeed: add AST2600 A0 specific fix into mbox driver + +AST2600 A0 has the same LPC mbox register structure with AST2500 +but AST2600 A1 and later revision is different so this commit adds +AST2600 A0 specific fix into the mbox driver. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + drivers/soc/aspeed/aspeed-lpc-mbox.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/soc/aspeed/aspeed-lpc-mbox.c b/drivers/soc/aspeed/aspeed-lpc-mbox.c +index 8dd3345682c7..12bb436dda78 100644 +--- a/drivers/soc/aspeed/aspeed-lpc-mbox.c ++++ b/drivers/soc/aspeed/aspeed-lpc-mbox.c +@@ -363,6 +363,20 @@ static int aspeed_mbox_probe(struct platform_device *pdev) + return -EINVAL; + + config = match->data; ++ ++ if (of_device_is_compatible(pdev->dev.of_node, ++ "aspeed,ast2600-mbox")) { ++ #define REV_ID_IO_OFFSET 0x1e6e2014 ++ #define REV_ID_AST2600A0 0x05000303 ++ void __iomem *chip_id_base = devm_ioremap(&pdev->dev, ++ REV_ID_IO_OFFSET, ++ sizeof(u32)); ++ ++ if (!IS_ERR(chip_id_base) && ++ readl(chip_id_base) == REV_ID_AST2600A0) ++ config = &ast2500_config; ++ } ++ + memcpy(&mbox->configs, config, sizeof(mbox->configs)); + + rc = of_property_read_u32(dev->of_node, "reg", &mbox->base); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0003-Fix-libmctp-build-error.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0003-Fix-libmctp-build-error.patch new file mode 100644 index 000000000..b9a6ca527 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0003-Fix-libmctp-build-error.patch @@ -0,0 +1,116 @@ +From af414e45bade3cf7277215d82b59a31c9b459cea Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Mon, 22 Feb 2021 15:27:22 -0800 +Subject: [PATCH] Fix libmctp build error + +This is a quick fix for libmctp building which includes staging +kernel headers. It's a temporary fix until kernel tree fixes the +rwonce.h including issue. + +Note: Do not upstream it. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + include/asm/rwonce.h | 90 ++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 90 insertions(+) + create mode 100644 include/asm/rwonce.h + +diff --git a/include/asm/rwonce.h b/include/asm/rwonce.h +new file mode 100644 +index 000000000000..11619bdbebae +--- /dev/null ++++ b/include/asm/rwonce.h +@@ -0,0 +1,90 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Prevent the compiler from merging or refetching reads or writes. The ++ * compiler is also forbidden from reordering successive instances of ++ * READ_ONCE and WRITE_ONCE, but only when the compiler is aware of some ++ * particular ordering. One way to make the compiler aware of ordering is to ++ * put the two invocations of READ_ONCE or WRITE_ONCE in different C ++ * statements. ++ * ++ * These two macros will also work on aggregate data types like structs or ++ * unions. ++ * ++ * Their two major use cases are: (1) Mediating communication between ++ * process-level code and irq/NMI handlers, all running on the same CPU, ++ * and (2) Ensuring that the compiler does not fold, spindle, or otherwise ++ * mutilate accesses that either do not require ordering or that interact ++ * with an explicit memory barrier or atomic instruction that provides the ++ * required ordering. ++ */ ++#ifndef __ASM_GENERIC_RWONCE_H ++#define __ASM_GENERIC_RWONCE_H ++ ++#ifndef __ASSEMBLY__ ++ ++#include <linux/compiler_types.h> ++#include <linux/kasan-checks.h> ++#include <linux/kcsan-checks.h> ++ ++/* ++ * Yes, this permits 64-bit accesses on 32-bit architectures. These will ++ * actually be atomic in some cases (namely Armv7 + LPAE), but for others we ++ * rely on the access being split into 2x32-bit accesses for a 32-bit quantity ++ * (e.g. a virtual address) and a strong prevailing wind. ++ */ ++#define compiletime_assert_rwonce_type(t) \ ++ compiletime_assert(__native_word(t) || sizeof(t) == sizeof(long long), \ ++ "Unsupported access size for {READ,WRITE}_ONCE().") ++ ++/* ++ * Use __READ_ONCE() instead of READ_ONCE() if you do not require any ++ * atomicity. Note that this may result in tears! ++ */ ++#ifndef __READ_ONCE ++#define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x)) ++#endif ++ ++#define READ_ONCE(x) \ ++({ \ ++ compiletime_assert_rwonce_type(x); \ ++ __READ_ONCE(x); \ ++}) ++ ++#define __WRITE_ONCE(x, val) \ ++do { \ ++ *(volatile typeof(x) *)&(x) = (val); \ ++} while (0) ++ ++#define WRITE_ONCE(x, val) \ ++do { \ ++ compiletime_assert_rwonce_type(x); \ ++ __WRITE_ONCE(x, val); \ ++} while (0) ++ ++static __always_inline ++unsigned long __read_once_word_nocheck(const void *addr) ++{ ++ return __READ_ONCE(*(unsigned long *)addr); ++} ++ ++/* ++ * Use READ_ONCE_NOCHECK() instead of READ_ONCE() if you need to load a ++ * word from memory atomically but without telling KASAN/KCSAN. This is ++ * usually used by unwinding code when walking the stack of a running process. ++ */ ++#define READ_ONCE_NOCHECK(x) \ ++({ \ ++ compiletime_assert(sizeof(x) == sizeof(unsigned long), \ ++ "Unsupported access size for READ_ONCE_NOCHECK()."); \ ++ (typeof(x))__read_once_word_nocheck(&(x)); \ ++}) ++ ++static __always_inline ++unsigned long read_word_at_a_time(const void *addr) ++{ ++ kasan_check_read(addr, 1); ++ return *(unsigned long *)addr; ++} ++ ++#endif /* __ASSEMBLY__ */ ++#endif /* __ASM_GENERIC_RWONCE_H */ +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0004-Add-a-quick-fix-to-resolve-USB-gadget-DMA-issue.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0004-Add-a-quick-fix-to-resolve-USB-gadget-DMA-issue.patch new file mode 100644 index 000000000..2d435c796 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0004-Add-a-quick-fix-to-resolve-USB-gadget-DMA-issue.patch @@ -0,0 +1,33 @@ +From cdd7104850d34cfe22902c45d69dac6cb506b087 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 26 Feb 2021 11:00:54 -0800 +Subject: [PATCH] Add a quick fix to resolve USB gadget DMA issue. + +This is a quick fix to resolve USB gadget DMA issue and it should +be removed when a real fix is added. + +Tested: Keyboard and mouse in KVM feature worked. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + kernel/dma/mapping.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c +index 51bb8fa8eb89..7bcfedeb1e30 100644 +--- a/kernel/dma/mapping.c ++++ b/kernel/dma/mapping.c +@@ -146,8 +146,10 @@ dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, + + BUG_ON(!valid_dma_direction(dir)); + ++#if 0 /* Quick fix to resolve USB gadget issue */ + if (WARN_ON_ONCE(!dev->dma_mask)) + return DMA_MAPPING_ERROR; ++#endif + + if (dma_map_direct(dev, ops)) + addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-Die_CPU-filter-first-zero-from-GetTemp.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-Die_CPU-filter-first-zero-from-GetTemp.patch new file mode 100644 index 000000000..54dced64f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-Die_CPU-filter-first-zero-from-GetTemp.patch @@ -0,0 +1,61 @@ +From b0740cbafa468ece35d26a797e7cf80f04fb5102 Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Mon, 11 Jan 2021 16:31:36 -0800 +Subject: [PATCH] Die_CPU: filter first zero from GetTemp + +Peci command GetTemp can return 0 during CPU reset. +It does not have a have completion code either. +Discard the first zero reading and return -ENODATA. +Consecutive zeros will be returned so that real hot +condition will still be detected and logged but possibly delayed +by the sensor polling period, which is normally 500ms-1s. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + drivers/hwmon/peci-cputemp.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c +index c5d92d1d2c25..49670bc80530 100644 +--- a/drivers/hwmon/peci-cputemp.c ++++ b/drivers/hwmon/peci-cputemp.c +@@ -15,6 +15,7 @@ + + struct temp_group { + struct peci_sensor_data die; ++ u32 die_raw_prev; + struct peci_sensor_data dts; + struct peci_sensor_data tcontrol; + struct peci_sensor_data tthrottle; +@@ -119,6 +120,7 @@ static int get_die_temp(struct peci_cputemp *priv) + { + struct peci_get_temp_msg msg; + int ret; ++ bool discard = false; + + if (!peci_sensor_need_update(&priv->temp.die)) + return 0; +@@ -129,6 +131,20 @@ static int get_die_temp(struct peci_cputemp *priv) + if (ret) + return ret; + ++ /* ++ * GET_TEMP command does not have cc and can return zero during ++ * cpu reset. Treat the first zero reading as data not available. ++ * Consecutive zeros will be returned so true hot condition ++ * is not be missed. ++ */ ++ if (msg.temp_raw == 0 && priv->temp.die_raw_prev != 0) { ++ dev_err(priv->dev, "discard first 0 reading from GetTemp\n"); ++ discard = true; ++ } ++ priv->temp.die_raw_prev = msg.temp_raw; ++ if (discard) ++ return -ENODATA; ++ + /* Note that the tjmax should be available before calling it */ + priv->temp.die.value = priv->temp.tjmax.value + + (msg.temp_raw * 1000 / 64); +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0006-DTS_CPU-filter-first-zero-from-RdPkgConfig-10.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0006-DTS_CPU-filter-first-zero-from-RdPkgConfig-10.patch new file mode 100644 index 000000000..a498f9c19 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0006-DTS_CPU-filter-first-zero-from-RdPkgConfig-10.patch @@ -0,0 +1,66 @@ +From 4d4e68e0eed7ccf899bc1b3799a93ed8eb44270d Mon Sep 17 00:00:00 2001 +From: Zhikui Ren <zhikui.ren@intel.com> +Date: Tue, 2 Feb 2021 14:49:28 -0800 +Subject: [PATCH] DTS_CPU: filter first zero from RdPkgConfig 10 + +Peci command GetPkgConfig 10 can return 0 (hot) with cc 0x40 +after cpu reset. Once pcode run time image is loaded +and it returns 0x8000 as DTS margin data not ready +Discard the first zero reading and return -ENODATA. +Consecutive zeros will be returned so that real hot +condition will still be detected and logged but possibly delayed +by the sensor polling period, which is normally one second. + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +--- + drivers/hwmon/peci-cputemp.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c +index 49670bc80530..af1c09741120 100644 +--- a/drivers/hwmon/peci-cputemp.c ++++ b/drivers/hwmon/peci-cputemp.c +@@ -17,6 +17,7 @@ struct temp_group { + struct peci_sensor_data die; + u32 die_raw_prev; + struct peci_sensor_data dts; ++ u32 dts_raw_prev; + struct peci_sensor_data tcontrol; + struct peci_sensor_data tthrottle; + struct peci_sensor_data tjmax; +@@ -159,6 +160,7 @@ static int get_dts(struct peci_cputemp *priv) + s32 dts_margin; + u8 pkg_cfg[4]; + int ret; ++ bool discard = false; + + if (!peci_sensor_need_update(&priv->temp.dts)) + return 0; +@@ -172,6 +174,24 @@ static int get_dts(struct peci_cputemp *priv) + + dts_margin = le16_to_cpup((__le16 *)pkg_cfg); + ++ /* ++ * There is a small window (500us) for read dts_margin (RdPkgConfig 10) ++ * to return cc 0x40, and dts_margin of 0 after cpu reset, before ++ * runtime image is loaded to set it to 0x8000 (dts reading not ready). ++ * DTS sensor is polled by user application at a slower rate than this ++ * window. Treat the first zero reading as data not available. ++ * Consecutive zeros will be returned so true hot condition is not be ++ * missed. ++ */ ++ if (dts_margin == 0 && priv->temp.dts_raw_prev != 0) { ++ dev_err(priv->dev, ++ "discard first 0 reading from RdPkgConfig 10\n"); ++ discard = true; ++ } ++ priv->temp.dts_raw_prev = dts_margin; ++ if (discard) ++ return -ENODATA; ++ + /** + * Processors return a value of DTS reading in 10.6 format + * (10 bits signed decimal, 6 bits fractional). +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-peci-cputemp-filter-the-first-zero-from-RdPkgConfig-.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-peci-cputemp-filter-the-first-zero-from-RdPkgConfig-.patch new file mode 100644 index 000000000..1ee3be689 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-peci-cputemp-filter-the-first-zero-from-RdPkgConfig-.patch @@ -0,0 +1,70 @@ +From d622c220351def5c8b3fa5540473a4d3ca685233 Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Thu, 29 Jul 2021 11:07:31 -0700 +Subject: [PATCH] peci: cputemp: filter the first zero from RdPkgConfig 16 + +Peci command GetPkgConfig 16 can return 0 with cc 0x40 after a CPU +reset. Once pcode run time image is loaded and it returns 0x8000 +as a data not ready. This commit makes it discard the first zero +reading and return -ENODATA. Consecutive zeros will be returned +so that real invalid temperature target setting condition will +still be detected and logged but possibly delayed by the sensor +polling period which is one second (UPDATE_INTERVAL_DEFAULT). + +Signed-off-by: Zhikui Ren <zhikui.ren@intel.com> +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + drivers/hwmon/peci-cputemp.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c +index af1c09741120..8d5d579ccb1a 100644 +--- a/drivers/hwmon/peci-cputemp.c ++++ b/drivers/hwmon/peci-cputemp.c +@@ -21,6 +21,7 @@ struct temp_group { + struct peci_sensor_data tcontrol; + struct peci_sensor_data tthrottle; + struct peci_sensor_data tjmax; ++ u32 temp_target_raw_prev; + struct peci_sensor_data module[MODTEMP_CHANNEL_NUMS]; + }; + +@@ -89,6 +90,8 @@ static int get_temp_targets(struct peci_cputemp *priv) + s32 tcontrol_margin; + u8 pkg_cfg[4]; + int ret; ++ bool discard = false; ++ u32 temp_target_raw; + + /* + * Just use only the tcontrol marker to determine if target values need +@@ -103,6 +106,26 @@ static int get_temp_targets(struct peci_cputemp *priv) + if (ret) + return ret; + ++ /* ++ * There is a small window (500us) for read temperature target ++ * (RdPkgConfig 16) to return cc 0x40, and temperature target of 0 after ++ * cpu reset, before runtime image is loaded to set it to 0x8000 ++ * Since update interval of the temperature target value is slower than ++ * this window, treat the first zero reading as data not available. ++ * Consecutive zeros will be returned so true invalid temperature target ++ * setting condition will not be missed. ++ */ ++ temp_target_raw = le32_to_cpup((__le32 *)pkg_cfg); ++ if (temp_target_raw == 0 && ++ priv->temp.temp_target_raw_prev != 0) { ++ dev_err(priv->dev, ++ "discard first 0 reading from RdPkgConfig 16\n"); ++ discard = true; ++ } ++ priv->temp.temp_target_raw_prev = temp_target_raw; ++ if (discard) ++ return -ENODATA; ++ + priv->temp.tjmax.value = pkg_cfg[2] * 1000; + + tcontrol_margin = pkg_cfg[1]; +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-vegman-kernel-add-RTC-driver-for-PCHC620.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-vegman-kernel-add-RTC-driver-for-PCHC620.patch new file mode 100644 index 000000000..1622a01e5 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-vegman-kernel-add-RTC-driver-for-PCHC620.patch @@ -0,0 +1,205 @@ +From b80e1dea7595519edbabf3e12b6d31f0e128f901 Mon Sep 17 00:00:00 2001 +From: Ivan Mikhaylov <i.mikhaylov@yadro.com> +Date: Mon, 12 Jul 2021 10:46:22 +0300 +Subject: [PATCH] vegman: kernel: add RTC driver for PCHC620 + +Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com> +--- + drivers/rtc/Kconfig | 10 +++ + drivers/rtc/Makefile | 1 + + drivers/rtc/rtc-pchc620.c | 150 ++++++++++++++++++++++++++++++++++++++ + 3 files changed, 161 insertions(+) + create mode 100644 drivers/rtc/rtc-pchc620.c + +diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig +index 1adf9f815652..79aba84dd19f 100644 +--- a/drivers/rtc/Kconfig ++++ b/drivers/rtc/Kconfig +@@ -564,6 +564,16 @@ config RTC_DRV_PALMAS + This driver can also be built as a module. If so, the module + will be called rtc-palma. + ++config RTC_DRV_PCHC620 ++ tristate "PCH C620 RTC driver" ++ help ++ If you say yes here you get support for the Intel C620 Series PCH ++ built-in read-only RTC. This driver is not for in-system use on x86, ++ but rather is for external access over I2C from a BMC. ++ ++ This driver can also be built as a module. If so, the module ++ will be called rtc-pchc620. ++ + config RTC_DRV_TPS6586X + tristate "TI TPS6586X RTC driver" + depends on MFD_TPS6586X +diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile +index 4ac8f19fb631..87ab76563a59 100644 +--- a/drivers/rtc/Makefile ++++ b/drivers/rtc/Makefile +@@ -118,6 +118,7 @@ obj-$(CONFIG_RTC_DRV_MXC_V2) += rtc-mxc_v2.o + obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o + obj-$(CONFIG_RTC_DRV_OPAL) += rtc-opal.o + obj-$(CONFIG_RTC_DRV_PALMAS) += rtc-palmas.o ++obj-$(CONFIG_RTC_DRV_PCHC620) += rtc-pchc620.o + obj-$(CONFIG_RTC_DRV_PCAP) += rtc-pcap.o + obj-$(CONFIG_RTC_DRV_PCF2123) += rtc-pcf2123.o + obj-$(CONFIG_RTC_DRV_PCF2127) += rtc-pcf2127.o +diff --git a/drivers/rtc/rtc-pchc620.c b/drivers/rtc/rtc-pchc620.c +new file mode 100644 +index 000000000000..a944b327ca67 +--- /dev/null ++++ b/drivers/rtc/rtc-pchc620.c +@@ -0,0 +1,150 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * RTC driver for PCHC620 ++ * Copyright (C) 2021 YADRO ++ */ ++ ++#include <linux/i2c.h> ++#include <linux/slab.h> ++#include <linux/rtc.h> ++#include <linux/bcd.h> ++#include <linux/module.h> ++#include <linux/regmap.h> ++ ++#define PCH_REG_FORCE_OFF 0x00 ++#define PCH_REG_SC 0x09 ++#define PCH_REG_MN 0x0a ++#define PCH_REG_HR 0x0b ++#define PCH_REG_DW 0x0c ++#define PCH_REG_DM 0x0d ++#define PCH_REG_MO 0x0e ++#define PCH_REG_YR 0x0f ++ ++#define NUM_TIME_REGS (PCH_REG_YR - PCH_REG_SC + 1) ++ ++struct pch { ++ struct rtc_device *rtc; ++ struct regmap *regmap; ++}; ++ ++static int pchc620_rtc_read_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pch *pch = i2c_get_clientdata(client); ++ unsigned char rtc_data[NUM_TIME_REGS] = {0}; ++ int rc; ++ ++ rc = regmap_bulk_read(pch->regmap, PCH_REG_SC, rtc_data, NUM_TIME_REGS); ++ if (rc < 0) { ++ dev_err(dev, "Fail to read time reg(%d)\n", rc); ++ return rc; ++ } ++ ++ tm->tm_sec = bcd2bin(rtc_data[0]); ++ tm->tm_min = bcd2bin(rtc_data[1]); ++ tm->tm_hour = bcd2bin(rtc_data[2]); ++ tm->tm_wday = rtc_data[3]; ++ tm->tm_mday = bcd2bin(rtc_data[4]); ++ tm->tm_mon = bcd2bin(rtc_data[5]) - 1; ++ tm->tm_year = bcd2bin(rtc_data[6]) + 100; ++ ++ return 0; ++} ++ ++static ssize_t pch_force_off(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct i2c_client *client = to_i2c_client(dev); ++ struct pch *pch = i2c_get_clientdata(client); ++ unsigned long val; ++ int rc; ++ ++ if (kstrtoul(buf, 10, &val)) ++ return -EINVAL; ++ ++ if (val) { ++ /* 0x02 host force off */ ++ rc = regmap_write(pch->regmap, PCH_REG_FORCE_OFF, 0x2); ++ if (rc < 0) { ++ dev_err(dev, "Fail to read time reg(%d)\n", rc); ++ return rc; ++ } ++ } ++ ++ return 0; ++} ++static DEVICE_ATTR(force_off, S_IWUSR | S_IWGRP, NULL, pch_force_off); ++ ++static const struct rtc_class_ops pchc620_rtc_ops = { ++ .read_time = pchc620_rtc_read_time, ++}; ++ ++static const struct regmap_config pchc620_rtc_regmap_config = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .use_single_read = true, ++}; ++ ++static int pchc620_rtc_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) ++{ ++ struct pch *pch; ++ int rc; ++ ++ pch = devm_kzalloc(&client->dev, sizeof(*pch), GFP_KERNEL); ++ if (!pch) ++ return -ENOMEM; ++ ++ pch->regmap = devm_regmap_init_i2c(client, &pchc620_rtc_regmap_config); ++ if (IS_ERR(pch->regmap)) { ++ dev_err(&client->dev, "regmap_init failed\n"); ++ return PTR_ERR(pch->regmap); ++ } ++ ++ i2c_set_clientdata(client, pch); ++ ++ pch->rtc = devm_rtc_device_register(&client->dev, "pch-rtc", ++ &pchc620_rtc_ops, THIS_MODULE); ++ if (IS_ERR(pch->rtc)) ++ return PTR_ERR(pch->rtc); ++ ++ rc = sysfs_create_file(&client->dev.kobj, &dev_attr_force_off.attr); ++ if (rc) ++ return rc; ++ ++ return 0; ++} ++ ++static int pchc620_rtc_remove(struct i2c_client *client) ++{ ++ sysfs_remove_file(&client->dev.kobj, &dev_attr_force_off.attr); ++ return 0; ++} ++ ++static const struct i2c_device_id pchc620_rtc_id[] = { ++ { "pchc620-rtc", 0 }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, pchc620_rtc_id); ++ ++static const struct of_device_id pchc620_rtc_of_match[] = { ++ { .compatible = "rtc,pchc620", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, pchc620_rtc_of_match); ++ ++static struct i2c_driver pchc620_rtc_driver = { ++ .driver = { ++ .name = "pchc620-rtc", ++ .of_match_table = pchc620_rtc_of_match, ++ }, ++ .probe = pchc620_rtc_probe, ++ .remove = pchc620_rtc_remove, ++ .id_table = pchc620_rtc_id, ++}; ++module_i2c_driver(pchc620_rtc_driver); ++ ++MODULE_DESCRIPTION("RTC PCHC620 driver"); ++MODULE_AUTHOR("Ivan Mikhaylov <i.mikhaylov@yadro.com>"); ++MODULE_LICENSE("GPL"); +-- +2.31.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-ARM-dts-add-rtc-pch-node-into-aspeed-bmc-intel-ast2x.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-ARM-dts-add-rtc-pch-node-into-aspeed-bmc-intel-ast2x.patch new file mode 100644 index 000000000..4b84c831f --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-ARM-dts-add-rtc-pch-node-into-aspeed-bmc-intel-ast2x.patch @@ -0,0 +1,49 @@ +From dbd6feacb11dbcd81fb3586dd62170d3d5900c1c Mon Sep 17 00:00:00 2001 +From: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +Date: Fri, 30 Jul 2021 14:17:24 -0700 +Subject: [PATCH] ARM: dts: add rtc-pch node into aspeed-bmc-intel-ast2xxx + +This commit adds rtc-pch node into aspeed-bmc-intel-ast2500 and +aspeed-bmc-intel-ast2600 to enable PCH RTC driver. + +Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> +--- + arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts | 5 +++++ + arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts | 5 +++++ + 2 files changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +index 27f2febdb8e5..48e6029bcafc 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +@@ -399,6 +399,11 @@ + aspeed,dma-buf-size = <4095>; + aspeed,hw-timeout-ms = <300>; + status = "okay"; ++ ++ rtc-pch@44 { ++ compatible = "rtc,pchc620"; ++ reg = <0x44>; ++ }; + }; + + &i2c4 { +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +index 766496340b3c..8b2c20d200e1 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +@@ -478,6 +478,11 @@ + /* SMB_HOST_STBY_BMC_LVC3_R */ + multi-master; + status = "okay"; ++ ++ rtc-pch@44 { ++ compatible = "rtc,pchc620"; ++ reg = <0x44>; ++ }; + }; + + &i2c12 { +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch new file mode 100644 index 000000000..7dd9990a9 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/1000-128MB-flashmap-for-PFR.patch @@ -0,0 +1,45 @@ +From ca0fa975d066b15637188e8fe37dd6d12e0e2bc4 Mon Sep 17 00:00:00 2001 +From: Kuiying Wang <kuiying.wang@intel.com> +Date: Tue, 28 Apr 2020 22:32:41 +0800 +Subject: [PATCH] Selecting 128MB for PFR + +PFR platforms requires 128MB flash mapping. +This will override the existing 64MB flash map +and loads 128MB flash map. + +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> +Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> +--- + arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts | 2 +- + arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +index 13b94bdf5d62..2cab5fb38d4f 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2500.dts +@@ -96,7 +96,7 @@ + flash@0 { + status = "okay"; + m25p,fast-read; +-#include "openbmc-flash-layout-intel-64MB.dtsi" ++#include "openbmc-flash-layout-intel-128MB.dtsi" + }; + }; + +diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +index a95b5ac828b3..bf66e1b6c0fd 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-intel-ast2600.dts +@@ -94,7 +94,7 @@ + spi-max-frequency = <40000000>; + spi-tx-bus-width = <4>; + m25p,fast-read; +-#include "openbmc-flash-layout-intel-64MB.dtsi" ++#include "openbmc-flash-layout-intel-128MB.dtsi" + }; + }; + +-- +2.17.1 + diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg new file mode 100644 index 000000000..bbc7fa5b6 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/debug.cfg @@ -0,0 +1,2 @@ +CONFIG_DEVMEM = y +CONFIG_DEVMEM_BOOTPARAM = n diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg new file mode 100644 index 000000000..c33020874 --- /dev/null +++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/intel.cfg @@ -0,0 +1,96 @@ +CONFIG_BLK_DEV_RAM=y +CONFIG_HWMON=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_IIO=y +CONFIG_SENSORS_IIO_HWMON=y +CONFIG_ASPEED_ADC=y +CONFIG_GPIO_ASPEED_SGPIO=y +CONFIG_CRC8=y +CONFIG_PECI=y +CONFIG_PECI_CHARDEV=y +CONFIG_PECI_ASPEED=y +CONFIG_SENSORS_PECI_CPUTEMP=y +CONFIG_SENSORS_PECI_DIMMTEMP=y +CONFIG_SENSORS_PECI_CPUPOWER=y +CONFIG_SENSORS_PECI_DIMMPOWER=y +CONFIG_SENSORS_PECI_PLATFORMPOWER=y +CONFIG_CONFIGFS_FS=y +CONFIG_BLK_DEV_RAM_SIZE=49152 +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01 +CONFIG_MAGIC_SYSRQ_SERIAL=y +CONFIG_ASPEED_ESPI_SLAVE=y +CONFIG_ASPEED_KCS_IPMI_BMC=y +CONFIG_I2C_SLAVE=y +CONFIG_I2C_SLAVE_MQUEUE=y +CONFIG_I2C_SLAVE_MQUEUE_MESSAGE_SIZE=256 +CONFIG_I2C_SLAVE_MQUEUE_QUEUE_SIZE=32 +CONFIG_ASPEED_BT_IPMI_BMC=n +CONFIG_ASPEED_LPC_CTRL=n +CONFIG_ASPEED_LPC_MBOX=y +CONFIG_ASPEED_LPC_SIO=y +CONFIG_JTAG=y +CONFIG_JTAG_ASPEED=y +CONFIG_FRAME_VECTOR=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VIDEO_ASPEED=y +CONFIG_VIDEOBUF2_CORE=y +CONFIG_VIDEOBUF2_V4L2=y +CONFIG_VIDEOBUF2_MEMOPS=y +CONFIG_VIDEOBUF2_DMA_CONTIG=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_USB_GADGET_VBUS_DRAW=2 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_F_HID=y +CONFIG_USB_GADGET=y +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_ASPEED_VHUB=y +CONFIG_USB_MASS_STORAGE=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_ASPEED_UART_ROUTING=y +CONFIG_ASPEED_VGA_SHAREDMEM=y +CONFIG_PWM=y +CONFIG_PWM_FTTMR010=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PWM_BEEPER=y +CONFIG_VFAT_FS=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_UTF8=y +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_CIFS=y +CONFIG_CIFS_XATTR=y +CONFIG_PSTORE=y +CONFIG_PSTORE_ZLIB_COMPRESS=y +CONFIG_PSTORE_RAM=y +CONFIG_FSI=n +CONFIG_FSI_MASTER_HUB=n +CONFIG_FSI_MASTER_ASPEED=n +CONFIG_FSI_SCOM=n +CONFIG_FSI_SBEFIFO=n +CONFIG_FSI_OCC=n +CONFIG_ASPEED_P2A_CTRL=n +CONFIG_USB=n +CONFIG_USB_ANNOUNCE_NEW_DEVICES=n +CONFIG_USB_DYNAMIC_MINORS=n +CONFIG_USB_EHCI_HCD=n +CONFIG_USB_EHCI_ROOT_HUB_TT=n +CONFIG_USB_EHCI_HCD_PLATFORM=n +CONFIG_IPMB_DEVICE_INTERFACE=y +CONFIG_BPF_SYSCALL=n +CONFIG_IPV6_SIT=n +CONFIG_RTC_DRV_PCHC620=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
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