diff options
Diffstat (limited to 'meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch')
| -rw-r--r-- | meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch deleted file mode 100644 index 6005e216e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-7/0013-Add-MicroBlaze-ashrsi_3_with_size_opt.patch +++ /dev/null @@ -1,53 +0,0 @@ -From c32df2ec3d269d19b631a17cea2b6d19bbb98c27 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:27 -0700 -Subject: [PATCH] Add MicroBlaze ashrsi_3_with_size_opt - -Added ashrsi3_with_size_opt Added ashrsi3_with_size_opt pattern to -optimize the sra instructions when the -Os optimization is used. -lshrsi3_with_size_opt is being removed as it has conflicts with unsigned -int variables - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 59d629b559..8c0a97e032 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1505,6 +1505,27 @@ - (set_attr "length" "4,4")] - ) - -+(define_insn "*ashrsi3_with_size_opt" -+ [(set (match_operand:SI 0 "register_operand" "=&d") -+ (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "immediate_operand" "I")))] -+ "(INTVAL (operands[2]) > 5 && optimize_size)" -+ { -+ operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("ori\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addik\t%3,%3,-1", operands); -+ output_asm_insn ("bneid\t%3,.-4", operands); -+ return "sra\t%0,%0"; -+ } -+ [(set_attr "type" "arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "20")] -+) -+ - (define_insn "*ashrsi_inline" - [(set (match_operand:SI 0 "register_operand" "=&d") - (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") --- -2.14.2 - |