diff options
Diffstat (limited to 'meta-xilinx/meta-xilinx-bsp')
301 files changed, 4406 insertions, 21749 deletions
diff --git a/meta-xilinx/meta-xilinx-bsp/README.md b/meta-xilinx/meta-xilinx-bsp/README.md index ac1140d7a..e41428619 100644 --- a/meta-xilinx/meta-xilinx-bsp/README.md +++ b/meta-xilinx/meta-xilinx-bsp/README.md @@ -46,7 +46,6 @@ the [meta-xilinx mailing list](https://lists.yoctoproject.org/listinfo/meta-xili Maintainers: - Manjukumar Harthikote Matha <manjukumar.harthikote-matha@xilinx.com> Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> Mark Hatle <mark.hatle@xilinx.com> diff --git a/meta-xilinx/meta-xilinx-bsp/classes/image-types-xilinx-qemu.bbclass b/meta-xilinx/meta-xilinx-bsp/classes/image-types-xilinx-qemu.bbclass index 59dfabfcc..45417ea7b 100644 --- a/meta-xilinx/meta-xilinx-bsp/classes/image-types-xilinx-qemu.bbclass +++ b/meta-xilinx/meta-xilinx-bsp/classes/image-types-xilinx-qemu.bbclass @@ -1,10 +1,10 @@ # Define the 'qemu-sd' conversion type # -# This conversion type pads any image to the 256K boundary to ensure that the +# This conversion type pads any image to the 512K boundary to ensure that the # image file can be used directly with QEMU's SD emulation which requires the # block device to match that of valid SD card sizes (which are multiples of -# 256K). +# 512K). CONVERSIONTYPES_append = " qemu-sd" -CONVERSION_CMD_qemu-sd = "cp ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd; truncate -s %256K ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd" +CONVERSION_CMD_qemu-sd = "cp ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd; truncate -s %512K ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd" CONVERSION_DEPENDS_qemu-sd = "coreutils-native" diff --git a/meta-xilinx/meta-xilinx-bsp/classes/image-wic-utils.bbclass b/meta-xilinx/meta-xilinx-bsp/classes/image-wic-utils.bbclass index 6f66d553e..562f3263e 100644 --- a/meta-xilinx/meta-xilinx-bsp/classes/image-wic-utils.bbclass +++ b/meta-xilinx/meta-xilinx-bsp/classes/image-wic-utils.bbclass @@ -9,7 +9,7 @@ def boot_files_split_expand(d): # IMAGE_BOOT_FILES has extra renaming info in the format '<source>;<target>' for f in (d.getVar("IMAGE_BOOT_FILES") or "").split(" "): parts = f.split(";", 1) - sources = [parts[0]] + sources = [parts[0].strip()] if "*" in parts[0]: # has glob part import glob @@ -21,7 +21,7 @@ def boot_files_split_expand(d): # for all sources, yield an entry for s in sources: if len(parts) == 2: - yield s, parts[1] + yield s, parts[1].strip() yield s, s def boot_files_bitstream(d): diff --git a/meta-xilinx/meta-xilinx-bsp/classes/qemuboot-xilinx.bbclass b/meta-xilinx/meta-xilinx-bsp/classes/qemuboot-xilinx.bbclass index 024626cbf..62ecbdf91 100644 --- a/meta-xilinx/meta-xilinx-bsp/classes/qemuboot-xilinx.bbclass +++ b/meta-xilinx/meta-xilinx-bsp/classes/qemuboot-xilinx.bbclass @@ -2,13 +2,13 @@ # enable the overrides for the context of the conf only OVERRIDES .= ":qemuboot-xilinx" -# setup the target binary -QB_SYSTEM_NAME_prepend = "qemu-xilinx/" - # Default machine targets for Xilinx QEMU (FDT Generic) -QB_MACHINE_aarch64 = "-machine arm-generic-fdt" -QB_MACHINE_arm = "-machine arm-generic-fdt-7series" -QB_MACHINE_microblaze = "-machine microblaze-generic-fdt-plnx" +# Allow QB_MACHINE to be overridden by a BSP config +QB_MACHINE ?= "${QB_MACHINE_XILINX}" + +QB_MACHINE_XILINX_aarch64 = "-machine arm-generic-fdt" +QB_MACHINE_XILINX_arm = "-machine arm-generic-fdt-7series" +QB_MACHINE_XILINX_microblaze = "-machine microblaze-fdt-plnx" # defaults QB_DEFAULT_KERNEL ?= "none" diff --git a/meta-xilinx/meta-xilinx-bsp/classes/xlnx-standalone.bbclass b/meta-xilinx/meta-xilinx-bsp/classes/xlnx-standalone.bbclass new file mode 100644 index 000000000..9232b1ef4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/classes/xlnx-standalone.bbclass @@ -0,0 +1,16 @@ +# Only enabled when ilp32 is enabled. +def xlnx_ilp32_dict(machdata, d): + machdata["elf"] = { + "aarch64" : (183, 0, 0, True, 32), + "aarch64_be" :(183, 0, 0, False, 32), + } + return machdata + +# Only enabled when microblaze64 is enabled. +def xlnx_mb64_dict(machdata, d): + machdata["elf"] = { + "microblaze": (189, 0, 0, False, 64), + "microblazeeb":(189, 0, 0, False, 64), + "microblazeel":(189, 0, 0, True, 64), + } + return machdata diff --git a/meta-xilinx/meta-xilinx-bsp/conf/0001-local.conf.sample-PMU_ROM-to-use-pmu-rom.elf-from-pr.patch b/meta-xilinx/meta-xilinx-bsp/conf/0001-local.conf.sample-PMU_ROM-to-use-pmu-rom.elf-from-pr.patch new file mode 100644 index 000000000..f7d487fea --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/0001-local.conf.sample-PMU_ROM-to-use-pmu-rom.elf-from-pr.patch @@ -0,0 +1,27 @@ +From 4694f1ef8bdb40f5aa82597a62f2a8a8a5a38969 Mon Sep 17 00:00:00 2001 +From: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> +Date: Thu, 13 Aug 2020 16:56:12 -0700 +Subject: [meta-xilinx-bsp][master-upstream][PATCH] local.conf.sample: PMU_ROM + to use pmu-rom.elf from /proj/yocto + +Users have to manually copy pmu-rom.elf to DEPLOY_DIR when using runqemu. +Enable PMU_ROM line within local.conf to use pmu from /proj/yocto/pmu-rom/ + +Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> +--- + meta-xilinx-bsp/conf/local.conf.sample | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/meta-xilinx-bsp/conf/local.conf.sample b/meta-xilinx-bsp/conf/local.conf.sample +index 377a519..5d567af 100644 +--- a/meta-xilinx-bsp/conf/local.conf.sample ++++ b/meta-xilinx-bsp/conf/local.conf.sample +@@ -231,3 +231,5 @@ PMU_FIRMWARE_IMAGE_NAME = "pmu-firmware-${MACHINE}" + # this doesn't mean anything to you. + CONF_VERSION = "1" + ++#Enable the below line to use pmu-rom.elf from a specific path ++#PMU_ROM = "/proj/yocto/pmu-rom/pmu-rom.elf" +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/bblayers.conf.sample b/meta-xilinx/meta-xilinx-bsp/conf/bblayers.conf.sample new file mode 100644 index 000000000..e960dbd8f --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/bblayers.conf.sample @@ -0,0 +1,34 @@ +LCONF_VERSION = "7" + +BBPATH = "${TOPDIR}" +BBFILES ?= "" + +BBLAYERS ?= " \ + ##OEROOT##/meta \ + ##OEROOT##/meta-poky \ + ##OEROOT##/../meta-openembedded/meta-perl \ + ##OEROOT##/../meta-openembedded/meta-python \ + ##OEROOT##/../meta-openembedded/meta-filesystems \ + ##OEROOT##/../meta-openembedded/meta-gnome \ + ##OEROOT##/../meta-openembedded/meta-multimedia \ + ##OEROOT##/../meta-openembedded/meta-networking \ + ##OEROOT##/../meta-openembedded/meta-webserver \ + ##OEROOT##/../meta-openembedded/meta-xfce \ + ##OEROOT##/../meta-openembedded/meta-initramfs \ + ##OEROOT##/../meta-openembedded/meta-oe \ + ##OEROOT##/../meta-browser \ + ##OEROOT##/../meta-qt5 \ + ##OEROOT##/../meta-xilinx/meta-xilinx-bsp \ + ##OEROOT##/../meta-xilinx/meta-xilinx-pynq \ + ##OEROOT##/../meta-xilinx/meta-xilinx-standalone \ + ##OEROOT##/../meta-xilinx/meta-xilinx-contrib \ + ##OEROOT##/../meta-xilinx-tools \ + ##OEROOT##/../meta-petalinux \ + ##OEROOT##/../meta-virtualization \ + ##OEROOT##/../meta-openamp \ + ##OEROOT##/../meta-jupyter \ +" + +BBLAYERS_NON_REMOVABLE ?= " \ + ##OEROOT##/meta \ +" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/layer.conf b/meta-xilinx/meta-xilinx-bsp/conf/layer.conf index 437616cf2..e69e7d137 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/layer.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/layer.conf @@ -11,7 +11,8 @@ BBFILE_PRIORITY_xilinx = "5" LAYERDEPENDS_xilinx = "core" -LAYERSERIES_COMPAT_xilinx = "warrior" +LAYERSERIES_COMPAT_xilinx = "dunfell gatesgarth" BB_DANGLINGAPPENDS_WARNONLY ?= "1" +XILINX_RELEASE_VERSION = "v2020.1" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/local.conf.sample b/meta-xilinx/meta-xilinx-bsp/conf/local.conf.sample new file mode 100644 index 000000000..f10cd3894 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/local.conf.sample @@ -0,0 +1,235 @@ +# +# This file is your local configuration file and is where all local user settings +# are placed. The comments in this file give some guide to the options a new user +# to the system might want to change but pretty much any configuration option can +# be set in this file. More adventurous users can look at local.conf.extended +# which contains other examples of configuration which can be placed in this file +# but new users likely won't need any of them initially. +# +# Lines starting with the '#' character are commented out and in some cases the +# default values are provided as comments to show people example syntax. Enabling +# the option is a question of removing the # character and making any change to the +# variable as required. + +# BASE = "${COREBASE}/../.." + +# +# Machine Selection +# +# You need to select a specific machine to target the build with. There are a selection +# of emulated machines available which can boot and run in the QEMU emulator: +# +# This sets the default machine if no other machine is selected: +MACHINE ??= "qemuzynq" + +# +# Where to place downloads +# +# During a first build the system will download many different source code tarballs +# from various upstream projects. This can take a while, particularly if your network +# connection is slow. These are all stored in DL_DIR. When wiping and rebuilding you +# can preserve this directory to speed up this part of subsequent builds. This directory +# is safe to share between multiple builds on the same machine too. +# +# The default is a downloads directory under TOPDIR which is the build directory. +# +# DL_DIR ?= "${BASE}/downloads" + +# +# Where to place shared-state files +# +# BitBake has the capability to accelerate builds based on previously built output. +# This is done using "shared state" files which can be thought of as cache objects +# and this option determines where those files are placed. +# +# You can wipe out TMPDIR leaving this directory intact and the build would regenerate +# from these files if no changes were made to the configuration. If changes were made +# to the configuration, only shared state files where the state was still valid would +# be used (done using checksums). +# +# The default is a sstate-cache directory under TOPDIR. +# +# SSTATE_DIR ?= "${BASE}/sstate-cache" + +# +# Where to place the build output +# +# This option specifies where the bulk of the building work should be done and +# where BitBake should place its temporary files and output. Keep in mind that +# this includes the extraction and compilation of many applications and the toolchain +# which can use Gigabytes of hard disk space. +# +# The default is a tmp directory under TOPDIR. +# +#TMPDIR = "${TOPDIR}/tmp" +# +#TMPDIR_versal = "${TOPDIR}/tmp-versal" + +# +# Default policy config +# +# The distribution setting controls which policy settings are used as defaults. +# The default value is fine for general Yocto project use, at least initially. +# Ultimately when creating custom policy, people will likely end up subclassing +# these defaults. +# +DISTRO ?= "petalinux" + +# +# Package Management configuration +# +# This variable lists which packaging formats to enable. Multiple package backends +# can be enabled at once and the first item listed in the variable will be used +# to generate the root filesystems. +# Options are: +# - 'package_deb' for debian style deb files +# - 'package_ipk' for ipk files are used by opkg (a debian style embedded package manager) +# - 'package_rpm' for rpm style packages +# E.g.: PACKAGE_CLASSES ?= "package_rpm package_deb package_ipk" +# We default to rpm: +PACKAGE_CLASSES ?= "package_rpm" + +# +# SDK/ADT target architecture +# +# This variable specifies the architecture to build SDK/ADT items for and means +# you can build the SDK packages for architectures other than the machine you are +# running the build on (i.e. building i686 packages on an x86_64 host). +# Supported values are i686 and x86_64 +#SDKMACHINE ?= "i686" + +# +# Extra image configuration defaults +# +# The EXTRA_IMAGE_FEATURES variable allows extra packages to be added to the generated +# images. Some of these options are added to certain image types automatically. The +# variable can contain the following options: +# "dbg-pkgs" - add -dbg packages for all installed packages +# (adds symbol information for debugging/profiling) +# "dev-pkgs" - add -dev packages for all installed packages +# (useful if you want to develop against libs in the image) +# "ptest-pkgs" - add -ptest packages for all ptest-enabled packages +# (useful if you want to run the package test suites) +# "tools-sdk" - add development tools (gcc, make, pkgconfig etc.) +# "tools-debug" - add debugging tools (gdb, strace) +# "eclipse-debug" - add Eclipse remote debugging support +# "tools-profile" - add profiling tools (oprofile, exmap, lttng, valgrind) +# "tools-testapps" - add useful testing tools (ts_print, aplay, arecord etc.) +# "debug-tweaks" - make an image suitable for development +# e.g. ssh root access has a blank password +# There are other application targets that can be used here too, see +# meta/classes/image.bbclass and meta/classes/core-image.bbclass for more details. +# We default to enabling the debugging tweaks. +EXTRA_IMAGE_FEATURES = "debug-tweaks" + +# +# Additional image features +# +# The following is a list of additional classes to use when building images which +# enable extra features. Some available options which can be included in this variable +# are: +# - 'buildstats' collect build statistics +# - 'image-mklibs' to reduce shared library files size for an image +# - 'image-prelink' in order to prelink the filesystem image +# - 'image-swab' to perform host system intrusion detection +# NOTE: if listing mklibs & prelink both, then make sure mklibs is before prelink +# NOTE: mklibs also needs to be explicitly enabled for a given image, see local.conf.extended +USER_CLASSES ?= "buildstats image-mklibs" + +# +# Runtime testing of images +# +# The build system can test booting virtual machine images under qemu (an emulator) +# after any root filesystems are created and run tests against those images. To +# enable this uncomment this line. See classes/testimage(-auto).bbclass for +# further details. +#TEST_IMAGE = "1" +# +# Interactive shell configuration +# +# Under certain circumstances the system may need input from you and to do this it +# can launch an interactive shell. It needs to do this since the build is +# multithreaded and needs to be able to handle the case where more than one parallel +# process may require the user's attention. The default is iterate over the available +# terminal types to find one that works. +# +# Examples of the occasions this may happen are when resolving patches which cannot +# be applied, to use the devshell or the kernel menuconfig +# +# Supported values are auto, gnome, xfce, rxvt, screen, konsole (KDE 3.x only), none +# Note: currently, Konsole support only works for KDE 3.x due to the way +# newer Konsole versions behave +#OE_TERMINAL = "auto" +# By default disable interactive patch resolution (tasks will just fail instead): +PATCHRESOLVE = "noop" + +# +# Disk Space Monitoring during the build +# +# Monitor the disk space during the build. If there is less that 1GB of space or less +# than 100K inodes in any key build location (TMPDIR, DL_DIR, SSTATE_DIR), gracefully +# shutdown the build. If there is less that 100MB or 1K inodes, perform a hard abort +# of the build. The reason for this is that running completely out of space can corrupt +# files and damages the build in ways which may not be easily recoverable. +# It's necesary to monitor /tmp, if there is no space left the build will fail +# with very exotic errors. +BB_DISKMON_DIRS = "\ + STOPTASKS,${TMPDIR},1G,100K \ + STOPTASKS,${DL_DIR},1G,100K \ + STOPTASKS,${SSTATE_DIR},1G,100K \ + STOPTASKS,/tmp,100M,100K \ + ABORT,${TMPDIR},100M,1K \ + ABORT,${DL_DIR},100M,1K \ + ABORT,${SSTATE_DIR},100M,1K \ + ABORT,/tmp,10M,1K" + +# +# Shared-state files from other locations +# +# As mentioned above, shared state files are prebuilt cache data objects which can +# used to accelerate build time. This variable can be used to configure the system +# to search other mirror locations for these objects before it builds the data itself. +# +# This can be a filesystem directory, or a remote url such as http or ftp. These +# would contain the sstate-cache results from previous builds (possibly from other +# machines). This variable works like fetcher MIRRORS/PREMIRRORS and points to the +# cache locations to check for the shared objects. +# NOTE: if the mirror uses the same structure as SSTATE_DIR, you need to add PATH +# at the end as shown in the examples below. This will be substituted with the +# correct path within the directory structure. +#SSTATE_MIRRORS ?= "\ +#file://.* http://someserver.tld/share/sstate/PATH;downloadfilename=PATH \n \ +#file://.* file:///some/local/dir/sstate/PATH" + +XILINX_VER_MAIN = "2020.1" + +# Uncomment below lines to provide path for custom xsct trim +# This is required for building Versal based devices, please fetch the +# xsct-trim from Xilinx lounge area +# +#EXTERNAL_XSCT_TARBALL = "/proj/yocto/xsct-trim/2020.1_xsct_daily_latest" +#VALIDATE_XSCT_CHECKSUM = '0' + +# XILINX_VIVADO_DESIGN_SUIT should point to the Vivado installation directly if you are using xilinx-mcs recipe in meta-xilinx-tools +#XILINX_VIVADO_DESIGN_SUIT = "/proj/xbuilds/2018.3_daily_latest/installs/lin64/Vivado/2018.3" + +# INHERIT += "externalsrc" +# PREFERRED_PROVIDER_virtual/kernel = "linux-xlnx-dev" +# EXTERNALSRC_pn-linux-xlnx-dev = "${BASE}/sources/linux" +# RM_WORK_EXCLUDE += "linux-xlnx-dev" + +# PREFERRED_PROVIDER_virtual/bootloader = "u-boot-xlnx-dev" +# EXTERNALSRC_pn-u-boot-xlnx-dev = "${BASE}/sources/u-boot" +# RM_WORK_EXCLUDE += "u-boot-xlnx-dev" + +#Add below lines to use runqemu for ZU+ machines +PMU_FIRMWARE_DEPLOY_DIR ??= "${DEPLOY_DIR_IMAGE}" +PMU_FIRMWARE_IMAGE_NAME ??= "pmu-firmware-${MACHINE}" + +# CONF_VERSION is increased each time build/conf/ changes incompatibly and is used to +# track the version of this file when it was generated. This can safely be ignored if +# this doesn't mean anything to you. +CONF_VERSION = "1" + +#Enable the below line to use pmu-rom.elf from a specific path +#PMU_ROM = "/proj/yocto/pmu-rom/pmu-rom.elf" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch32-tc.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch32-tc.conf new file mode 100644 index 000000000..72fbc80f9 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch32-tc.conf @@ -0,0 +1,220 @@ +require conf/multilib.conf +require conf/machine/include/tune-cortexa9.inc +require conf/machine/include/baremetal-tc.conf + +# Define all of the multilibs supproted by this configuration +MULTILIB_GLOBAL_VARIANTS = "${@extend_variants(d,'MULTILIBS','multilib')}" + +MULTILIBS = "multilib:libarmv5tesoftfp multilib:libarmv5tehard" +MULTILIBS += "multilib:libnofp" +MULTILIBS += "multilib:libv7nofp multilib:libv7fpsoftfp multilib:libv7fphard" +MULTILIBS += "multilib:libv7anofp" +MULTILIBS += "multilib:libv7afpsoftfp" +MULTILIBS += "multilib:libv7afpthf multilib:libv7asimdsoftfp" +MULTILIBS += "multilib:libv7asimdhard multilib:libv7vesimdsoftfp" +MULTILIBS += "multilib:libvtvesimdhf" +MULTILIBS += "multilib:libv8anofp" +MULTILIBS += "multilib:libv8asimdsoftfp multilib:libv8asimdhard" + +TUNE_CCARGS = "${TUNE_CCARGS_tune-${DEFAULTTUNE}}" +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" + +# Base configuration +# CFLAGS: +DEFAULTTUNE = "aarch32" + +AVAILTUNES += "aarch32" +PACKAGE_EXTRA_ARCHS_tune-aarch32 = "${TUNE_PKGARCH_tune-aarch32}" +BASE_LIB_tune-aarch32 = "lib" +TUNE_FEATURES_tune-aarch32 = "arm" +TUNE_CCARGS_tune-aarch32 = "" +TUNE_PKGARCH_tune-aarch32 = "aarch32" + + +# arm/v5te/softfp +# CFLAGS: -marm -march=armv5te+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libarmv5tesoftfp = "armv5tesoftfp" + +AVAILTUNES += "armv5tesoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tesoftfp = "${TUNE_PKGARCH_tune-armv5tesoftfp}" +BASE_LIB_tune-armv5tesoftfp = "lib/arm/v5te/softfp" +TUNE_FEATURES_tune-armv5tesoftfp = "arm" +TUNE_CCARGS_tune-armv5tesoftfp = "-marm -march=armv5te+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv5tesoftfp = "armv5tefp" + + +# arm/v5te/hard +# CFLAGS: -marm -march=armv5te+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libarmv5tehard = "armv5tehard" + +AVAILTUNES += "armv5tehard" +PACKAGE_EXTRA_ARCHS_tune-armv5tehard = "${TUNE_PKGARCH_tune-armv5tehard}" +BASE_LIB_tune-armv5tehard = "lib/arm/v5te/hard" +TUNE_FEATURES_tune-armv5tehard = "arm" +TUNE_CCARGS_tune-armv5tehard = "-marm -march=armv5te+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv5tehard = "armv5tefphf" + + +# thumb/nofp +# CFLAGS: -mthumb -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libnofp = "armnofp" + +AVAILTUNES += "armnofp" +PACKAGE_EXTRA_ARCHS_tune-armnofp = "${TUNE_PKGARCH_tune-armnofp}" +BASE_LIB_tune-armnofp = "lib/thumb/nofp" +TUNE_FEATURES_tune-armnofp = "arm" +TUNE_CCARGS_tune-armnofp = "-mthumb -mfloat-abi=soft" +TUNE_PKGARCH_tune-armnofp = "armt" + + +# thumb/v7/nofp +# CFLAGS: -mthumb -march=armv7 -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv7nofp = "armv7nofp" + +AVAILTUNES += "armv7nofp" +PACKAGE_EXTRA_ARCHS_tune-armv7nofp = "${TUNE_PKGARCH_tune-armv7nofp}" +BASE_LIB_tune-armv7nofp = "lib/thumb/v7/nofp" +TUNE_FEATURES_tune-armv7nofp = "arm" +TUNE_CCARGS_tune-armv7nofp = "-mthumb -march=armv7 -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv7nofp = "armv7t" + + +# thumb/v7+fp/softfp +# CFLAGS: -mthumb -march=armv7+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7fpsoftfp = "armv7fpsoftfp" + +AVAILTUNES += "armv7fpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7fpsoftfp = "${TUNE_PKGARCH_tune-armv7fpsoftfp}" +BASE_LIB_tune-armv7fpsoftfp = "lib/thumb/v7+fp/softfp" +TUNE_FEATURES_tune-armv7fpsoftfp = "arm" +TUNE_CCARGS_tune-armv7fpsoftfp = "-mthumb -march=armv7+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7fpsoftfp = "armv7fpt" + + +# thumb/v7+fp/hard +# CFLAGS: -mthumb -march=armv7+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7fphard = "armv7fphard" + +AVAILTUNES += "armv7fphard" +PACKAGE_EXTRA_ARCHS_tune-armv7fphard = "${TUNE_PKGARCH_tune-armv7fphard}" +BASE_LIB_tune-armv7fphard = "lib/thumb/v7+fp/hard" +TUNE_FEATURES_tune-armv7fphard = "arm" +TUNE_CCARGS_tune-armv7fphard = "-mthumb -march=armv7+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7fphard = "armv7fpthf" + + +# thumb/v7-a/nofp +# CFLAGS: -mthumb -march=armv7-a -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv7anofp = "armv7anofp" + +AVAILTUNES += "armv7anofp" +PACKAGE_EXTRA_ARCHS_tune-armv7anofp = "${TUNE_PKGARCH_tune-armv7anofp}" +BASE_LIB_tune-armv7anofp = "lib/thumb/v7-a/nofp" +TUNE_FEATURES_tune-armv7anofp = "arm" +TUNE_CCARGS_tune-armv7anofp = "-mthumb -march=armv7-a -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv7anofp = "armv7at" + + +# thumb/v7-a+fp/softfp +# CFLAGS: -mthumb -march=armv7-a+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7afpsoftfp = "armv7afpsoftfp" + +AVAILTUNES += "armv7afpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7afpsoftfp = "${TUNE_PKGARCH_tune-armv7afpsoftfp}" +BASE_LIB_tune-armv7afpsoftfp = "lib/thumb/v7-a+fp/softfp" +TUNE_FEATURES_tune-armv7afpsoftfp = "arm" +TUNE_CCARGS_tune-armv7afpsoftfp = "-mthumb -march=armv7-a+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7afpsoftfp = "armv7afpt" + + +# thumb/v7-a+fp/hard +# CFLAGS: -mthumb -march=armv7-a+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7afpthf = "armv7afpthf" + +AVAILTUNES += "armv7afpthf" +PACKAGE_EXTRA_ARCHS_tune-armv7afpthf = "${TUNE_PKGARCH_tune-armv7afpthf}" +BASE_LIB_tune-armv7afpthf = "lib/thumb/v7-a+fp/hard" +TUNE_FEATURES_tune-armv7afpthf = "arm" +TUNE_CCARGS_tune-armv7afpthf = "-mthumb -march=armv7-a+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7afpthf = "armv7afpthf" + +# thumb/v7-a+simd/softfp +# CFLAGS: -mthumb -march=armv7-a+simd -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7asimdsoftfp = "armv7asimdsoftfp" + +AVAILTUNES += "armv7asimdsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7asimdsoftfp = "${TUNE_PKGARCH_tune-armv7asimdsoftfp}" +BASE_LIB_tune-armv7asimdsoftfp = "lib/thumb/v7-a+simd/softfp" +TUNE_FEATURES_tune-armv7asimdsoftfp = "arm" +TUNE_CCARGS_tune-armv7asimdsoftfp = "-mthumb -march=armv7-a+simd -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7asimdsoftfp = "armv7asimdt" + + +# thumb/v7-a+simd/hard +# CFLAGS: -mthumb -march=armv7-a+simd -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7asimdhard = "armv7asimdhard" + +AVAILTUNES += "armv7asimdhard" +PACKAGE_EXTRA_ARCHS_tune-armv7asimdhard = "${TUNE_PKGARCH_tune-armv7asimdhard}" +BASE_LIB_tune-armv7asimdhard = "lib/thumb/v7-a+simd/hard" +TUNE_FEATURES_tune-armv7asimdhard = "arm" +TUNE_CCARGS_tune-armv7asimdhard = "-mthumb -march=armv7-a+simd -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7asimdhard = "armv7asimdthf" + + +# thumb/v7ve+simd/softfp +# CFLAGS: -mthumb -march=armv7ve+simd -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7vesimdsoftfp = "armv7vesimdsoftfp" + +AVAILTUNES += "armv7vesimdsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7vesimdsoftfp = "${TUNE_PKGARCH_tune-armv7vesimdsoftfp}" +BASE_LIB_tune-armv7vesimdsoftfp = "lib/thumb/v7ve+simd/softfp" +TUNE_FEATURES_tune-armv7vesimdsoftfp = "arm" +TUNE_CCARGS_tune-armv7vesimdsoftfp = "-mthumb -march=armv7ve+simd -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7vesimdsoftfp = "armv7vesimdt" + +# thumb/v7ve+simd/hard +# CFLAGS: -mthumb -march=armv7ve+simd -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libvtvesimdhf = "armvtvesimdhf" + +AVAILTUNES += "armvtvesimdhf" +PACKAGE_EXTRA_ARCHS_tune-armvtvesimdhf = "${TUNE_PKGARCH_tune-armvtvesimdhf}" +BASE_LIB_tune-armvtvesimdhf = "lib/thumb/v7ve+simd/hard" +TUNE_FEATURES_tune-armvtvesimdhf = "arm" +TUNE_CCARGS_tune-armvtvesimdhf = "-mthumb -march=armv7ve+simd -mfloat-abi=hard" +TUNE_PKGARCH_tune-armvtvesimdhf = "armv7vesimdthf" + + +# thumb/v8-a/nofp +# CFLAGS: -mthumb -march=armv8-a -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv8anofp = "armv8anofp" + +AVAILTUNES += "armv8anofp" +PACKAGE_EXTRA_ARCHS_tune-armv8anofp = "${TUNE_PKGARCH_tune-armv8anofp}" +BASE_LIB_tune-armv8anofp = "lib/thumb/v8-a/nofp" +TUNE_FEATURES_tune-armv8anofp = "arm" +TUNE_CCARGS_tune-armv8anofp = "-mthumb -march=armv8-a -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv8anofp = "armv8at" + +# thumb/v8-a+simd/softfp +# CFLAGS: -mthumb -march=armv8-a+simd -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv8asimdsoftfp = "armv8asimdsoftfp" + +AVAILTUNES += "armv8asimdsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv8asimdsoftfp = "${TUNE_PKGARCH_tune-armv8asimdsoftfp}" +BASE_LIB_tune-armv8asimdsoftfp = "lib/thumb/v8-a+simd/softfp" +TUNE_FEATURES_tune-armv8asimdsoftfp = "arm" +TUNE_CCARGS_tune-armv8asimdsoftfp = "-mthumb -march=armv8-a+simd -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv8asimdsoftfp = "armv8asimdt" + + +# thumb/v8-a+simd/hard +# CFLAGS: -mthumb -march=armv8-a+simd -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv8asimdhard = "armv8asimdhard" + +AVAILTUNES += "armv8asimdhard" +PACKAGE_EXTRA_ARCHS_tune-armv8asimdhard = "${TUNE_PKGARCH_tune-armv8asimdhard}" +BASE_LIB_tune-armv8asimdhard = "lib/thumb/v8-a+simd/hard" +TUNE_FEATURES_tune-armv8asimdhard = "arm" +TUNE_CCARGS_tune-armv8asimdhard = "-mthumb -march=armv8-a+simd -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv8asimdhard = "armv8asimdthf" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch64-tc.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch64-tc.conf new file mode 100644 index 000000000..e9e0412b7 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/aarch64-tc.conf @@ -0,0 +1,29 @@ +require conf/multilib.conf +require conf/machine/include/tune-cortexa72-cortexa53.inc +require conf/machine/include/baremetal-tc.conf + +# Define ilp32 variant (not in tune files) +TUNEVALID[ilp32] = "ilp32 ABI" + +TUNE_CCARGS .= '${@bb.utils.contains("TUNE_FEATURES", "ilp32", " -mabi=ilp32", "", d)}' + +# ILP request an alternative machine dictionary +INHERIT += "xlnx-standalone" +PACKAGEQA_EXTRA_MACHDEFFUNCS .= '${@bb.utils.contains("TUNE_FEATURES", "ilp32", " xlnx_ilp32_dict", "", d)}' + +# Define all of the multilibs supported by this configuration +MULTILIB_GLOBAL_VARIANTS = "${@extend_variants(d,'MULTILIBS','multilib')}" +MULTILIBS = "multilib:libilp32" + +# Base configuration +# CFLAGS: +DEFAULTTUNE = "cortexa72-cortexa53" + +# CFLAGS: -mabi=ilp32 +DEFAULTTUNE_virtclass-multilib-libilp32 = "cortexa72-cortexa53-ilp32" + +AVAILTUNES += "cortexa72-cortexa53-ilp32" +ARMPKGARCH_tune-cortexa72-cortexa53-ilp32 = "${ARMPKGARCH_tune-cortexa72-cortexa53}_ilp32" +TUNE_FEATURES_tune-cortexa72-cortexa53-ilp32 = "${TUNE_FEATURES_tune-cortexa72-cortexa53} ilp32" +PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53-ilp32 = "${PACKAGE_EXTRA_ARCHS_tune-cortexa72-cortexa53} cortexa72-cortexa53-ilp32" +BASE_LIB_tune-cortexa72-cortexa53-ilp32 = "lib/ilp32" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/arm-rm-tc.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/arm-rm-tc.conf new file mode 100644 index 000000000..c13133398 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/arm-rm-tc.conf @@ -0,0 +1,264 @@ +require conf/multilib.conf +require conf/machine/include/tune-cortexrm.inc +require conf/machine/include/baremetal-tc.conf + +# Define all of the multilibs supproted by this configuration +MULTILIB_GLOBAL_VARIANTS = "${@extend_variants(d,'MULTILIBS','multilib')}" + +MULTILIBS = "multilib:libarmv5tesoftfp multilib:libarmv5tehard" +MULTILIBS += "multilib:libnofp" +MULTILIBS += "multilib:libv7nofp multilib:libv7fpsoftfp multilib:libv7fphard" +MULTILIBS += "multilib:libv6mnofp" +MULTILIBS += "multilib:libv7mnofp" +MULTILIBS += "multilib:libv7emnofp multilib:libv7emfpsoftfp" +MULTILIBS += "multilib:libv7emfphard multilib:libv7emdpsoftfp" +MULTILIBS += "multilib:libv7emdphard" +MULTILIBS += "multilib:libv8mbasenofp" +MULTILIBS += "multilib:libv8mmainnofp multilib:libv8mmainfpsoftfp multilib:libv8mmainfphard multilib:libv8mmaindpsoftfp multilib:libv8mmaindphard" + +TUNE_CCARGS = "${TUNE_CCARGS_tune-${DEFAULTTUNE}}" +TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" + +# Base configuration +# CFLAGS: +DEFAULTTUNE = "armrm" + +AVAILTUNES += "armrm" +PACKAGE_EXTRA_ARCHS_tune-armrm = "${TUNE_PKGARCH_tune-armrm}" +BASE_LIB_tune-armrm = "lib" +TUNE_FEATURES_tune-armrm = "arm armrm" +TUNE_CCARGS_tune-armrm = "" +TUNE_PKGARCH_tune-armrm = "armrm" + + +# arm/v5te/softfp +# CFLAGS: -marm -march=armv5te+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libarmv5tesoftfp = "armv5tesoftfp" + +AVAILTUNES += "armv5tesoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv5tesoftfp = "${TUNE_PKGARCH_tune-armv5tesoftfp}" +BASE_LIB_tune-armv5tesoftfp = "lib/arm/v5te/softfp" +TUNE_FEATURES_tune-armv5tesoftfp = "arm armrm" +TUNE_CCARGS_tune-armv5tesoftfp = "-marm -march=armv5te+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv5tesoftfp = "armv5tefp" + + +# arm/v5te/hard +# CFLAGS: -marm -march=armv5te+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libarmv5tehard = "armv5tehard" + +AVAILTUNES += "armv5tehard" +PACKAGE_EXTRA_ARCHS_tune-armv5tehard = "${TUNE_PKGARCH_tune-armv5tehard}" +BASE_LIB_tune-armv5tehard = "lib/arm/v5te/hard" +TUNE_FEATURES_tune-armv5tehard = "arm armrm" +TUNE_CCARGS_tune-armv5tehard = "-marm -march=armv5te+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv5tehard = "armv5tefphf" + + +# thumb/nofp +# CFLAGS: -mthumb -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libnofp = "armnofp" + +AVAILTUNES += "armnofp" +PACKAGE_EXTRA_ARCHS_tune-armnofp = "${TUNE_PKGARCH_tune-armnofp}" +BASE_LIB_tune-armnofp = "lib/thumb/nofp" +TUNE_FEATURES_tune-armnofp = "arm armrm" +TUNE_CCARGS_tune-armnofp = "-mthumb -mfloat-abi=soft" +TUNE_PKGARCH_tune-armnofp = "armt" + + +# thumb/v7/nofp +# CFLAGS: -mthumb -march=armv7 -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv7nofp = "armv7nofp" + +AVAILTUNES += "armv7nofp" +PACKAGE_EXTRA_ARCHS_tune-armv7nofp = "${TUNE_PKGARCH_tune-armv7nofp}" +BASE_LIB_tune-armv7nofp = "lib/thumb/v7/nofp" +TUNE_FEATURES_tune-armv7nofp ="arm armrm" +TUNE_CCARGS_tune-armv7nofp = "-mthumb -march=armv7 -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv7nofp = "armv7t" + + +# thumb/v7+fp/softfp +# CFLAGS: -mthumb -march=armv7+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7fpsoftfp = "armv7fpsoftfp" + +AVAILTUNES += "armv7fpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7fpsoftfp = "${TUNE_PKGARCH_tune-armv7fpsoftfp}" +BASE_LIB_tune-armv7fpsoftfp = "lib/thumb/v7+fp/softfp" +TUNE_FEATURES_tune-armv7fpsoftfp ="arm armrm" +TUNE_CCARGS_tune-armv7fpsoftfp = "-mthumb -march=armv7+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7fpsoftfp = "armv7fpt" + + +# thumb/v7+fp/hard +# CFLAGS: -mthumb -march=armv7+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7fphard = "armv7fphard" + +AVAILTUNES += "armv7fphard" +PACKAGE_EXTRA_ARCHS_tune-armv7fphard = "${TUNE_PKGARCH_tune-armv7fphard}" +BASE_LIB_tune-armv7fphard = "lib/thumb/v7+fp/hard" +TUNE_FEATURES_tune-armv7fphard ="arm armrm" +TUNE_CCARGS_tune-armv7fphard = "-mthumb -march=armv7+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7fphard = "armv7fpthf" + + +# thumb/v6-m/nofp +# CFLAGS: -mthumb -march=armv6s-m -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv6mnofp = "armv6mnofp" + +# Workaround for this multilib in newlib +# newlib/libc/sys/arm/trap.S:88: Error: lo register required -- `sub ip,sp,ip +EXTRA_OECONF_append_pn-libv6mnofp-newlib = " --disable-newlib-supplied-syscalls" + +AVAILTUNES += "armv6mnofp" +PACKAGE_EXTRA_ARCHS_tune-armv6mnofp = "${TUNE_PKGARCH_tune-armv6mnofp}" +BASE_LIB_tune-armv6mnofp = "lib/thumb/v6-m/nofp" +TUNE_FEATURES_tune-armv6mnofp ="arm armrm" +TUNE_CCARGS_tune-armv6mnofp = "-mthumb -march=armv6s-m -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv6mnofp = "armv6smt" + + +# thumb/v7-m/nofp +# CFLAGS: -mthumb -march=armv7-m -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv7mnofp = "armv7mnofp" + +AVAILTUNES += "armv7mnofp" +PACKAGE_EXTRA_ARCHS_tune-armv7mnofp = "${TUNE_PKGARCH_tune-armv7mnofp}" +BASE_LIB_tune-armv7mnofp = "lib/thumb/v7-m/nofp" +TUNE_FEATURES_tune-armv7mnofp ="arm armrm" +TUNE_CCARGS_tune-armv7mnofp = "-mthumb -march=armv7-m -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv7mnofp = "armv7mt" + + +# thumb/v7e-m/nofp +# CFLAGS: -mthumb -march=armv7e-m -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv7emnofp = "armv7emnofp" + +AVAILTUNES += "armv7emnofp" +PACKAGE_EXTRA_ARCHS_tune-armv7emnofp = "${TUNE_PKGARCH_tune-armv7emnofp}" +BASE_LIB_tune-armv7emnofp = "lib/thumb/v7e-m/nofp" +TUNE_FEATURES_tune-armv7emnofp ="arm armrm" +TUNE_CCARGS_tune-armv7emnofp = "-mthumb -march=armv7e-m -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv7emnofp = "armv7emt" + + +# thumb/v7e-m+fp/softfp +# CFLAGS: -mthumb -march=armv7e-m+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7emfpsoftfp = "armv7emfpsoftfp" + +AVAILTUNES += "armv7emfpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7emfpsoftfp = "${TUNE_PKGARCH_tune-armv7emfpsoftfp}" +BASE_LIB_tune-armv7emfpsoftfp = "lib/thumb/v7e-m+fp/softfp" +TUNE_FEATURES_tune-armv7emfpsoftfp ="arm armrm" +TUNE_CCARGS_tune-armv7emfpsoftfp = "-mthumb -march=armv7e-m+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7emfpsoftfp = "armv7emfpt" + + +# thumb/v7e-m+fp/hard +# CFLAGS: -mthumb -march=armv7e-m+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7emfphard = "armv7emfphard" + +AVAILTUNES += "armv7emfphard" +PACKAGE_EXTRA_ARCHS_tune-armv7emfphard = "${TUNE_PKGARCH_tune-armv7emfphard}" +BASE_LIB_tune-armv7emfphard = "lib/thumb/v7e-m+fp/hard" +TUNE_FEATURES_tune-armv7emfphard ="arm armrm" +TUNE_CCARGS_tune-armv7emfphard = "-mthumb -march=armv7e-m+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7emfphard = "armv7emfpthf" + + +# thumb/v7e-m+dp/softfp +# CFLAGS: -mthumb -march=armv7e-m+fp.dp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv7emdpsoftfp = "armv7emdpsoftfp" + +AVAILTUNES += "armv7emdpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv7emdpsoftfp = "${TUNE_PKGARCH_tune-armv7emdpsoftfp}" +BASE_LIB_tune-armv7emdpsoftfp = "lib/thumb/v7e-m+dp/softfp" +TUNE_FEATURES_tune-armv7emdpsoftfp ="arm armrm" +TUNE_CCARGS_tune-armv7emdpsoftfp = "-mthumb -march=armv7e-m+fp.dp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv7emdpsoftfp = "armv7emdp" + +# thumb/v7e-m+dp/hard +# CFLAGS: -mthumb -march=armv7e-m+fp.dp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv7emdphard = "armv7emdphard" + +AVAILTUNES += "armv7emdphard" +PACKAGE_EXTRA_ARCHS_tune-armv7emdphard = "${TUNE_PKGARCH_tune-armv7emdphard}" +BASE_LIB_tune-armv7emdphard = "lib/thumb/v7e-m+dp/hard" +TUNE_FEATURES_tune-armv7emdphard ="arm armrm" +TUNE_CCARGS_tune-armv7emdphard = "-mthumb -march=armv7e-m+fp.dp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv7emdphard = "armv7emdpthf" + + +# thumb/v8-m.base/nofp +# CFLAGS: -mthumb -march=armv8-m.base -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv8mbasenofp = "armv8mbasenofp" + +# Workaround for this multilib in newlib +# newlib/libc/sys/arm/trap.S:88: Error: lo register required -- `sub ip,sp,ip' +EXTRA_OECONF_append_pn-libv8mbasenofp-newlib = " --disable-newlib-supplied-syscalls" + +AVAILTUNES += "armv8mbasenofp" +PACKAGE_EXTRA_ARCHS_tune-armv8mbasenofp = "${TUNE_PKGARCH_tune-armv8mbasenofp}" +BASE_LIB_tune-armv8mbasenofp = "lib/thumb/v8-m.base/nofp" +TUNE_FEATURES_tune-armv8mbasenofp ="arm armrm" +TUNE_CCARGS_tune-armv8mbasenofp = "-mthumb -march=armv8-m.base -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv8mbasenofp = "armv8mbaset" + +# thumb/v8-m.main/nofp +# CFLAGS: -mthumb -march=armv8-m.main -mfloat-abi=soft +DEFAULTTUNE_virtclass-multilib-libv8mmainnofp = "armv8mmainnofp" + +AVAILTUNES += "armv8mmainnofp" +PACKAGE_EXTRA_ARCHS_tune-armv8mmainnofp = "${TUNE_PKGARCH_tune-armv8mmainnofp}" +BASE_LIB_tune-armv8mmainnofp = "lib/thumb/v8-m.main/nofp" +TUNE_FEATURES_tune-armv8mmainnofp ="arm armrm" +TUNE_CCARGS_tune-armv8mmainnofp = "-mthumb -march=armv8-m.main -mfloat-abi=soft" +TUNE_PKGARCH_tune-armv8mmainnofp = "armv8mmaint" + + +# thumb/v8-m.main+fp/softfp +# CFLAGS: -mthumb -march=armv8-m.main+fp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv8mmainfpsoftfp = "armv8mmainfpsoftfp" + +AVAILTUNES += "armv8mmainfpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv8mmainfpsoftfp = "${TUNE_PKGARCH_tune-armv8mmainfpsoftfp}" +BASE_LIB_tune-armv8mmainfpsoftfp = "lib/thumb/v8-m.main+fp/softfp" +TUNE_FEATURES_tune-armv8mmainfpsoftfp ="arm armrm" +TUNE_CCARGS_tune-armv8mmainfpsoftfp = "-mthumb -march=armv8-m.main+fp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv8mmainfpsoftfp = "armv8mmainfpt" + +# thumb/v8-m.main+fp/hard +# CFLAGS: -mthumb -march=armv8-m.main+fp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv8mmainfphard = "armv8mmainfphard" + +AVAILTUNES += "armv8mmainfphard" +PACKAGE_EXTRA_ARCHS_tune-armv8mmainfphard = "${TUNE_PKGARCH_tune-armv8mmainfphard}" +BASE_LIB_tune-armv8mmainfphard = "lib/thumb/v8-m.main+fp/hard" +TUNE_FEATURES_tune-armv8mmainfphard ="arm armrm" +TUNE_CCARGS_tune-armv8mmainfphard = "-mthumb -march=armv8-m.main+fp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv8mmainfphard = "armv8mmainfpthf" + + +# thumb/v8-m.main+dp/softfp +# CFLAGS: -mthumb -march=armv8-m.main+fp.dp -mfloat-abi=softfp +DEFAULTTUNE_virtclass-multilib-libv8mmaindpsoftfp = "armv8mmaindpsoftfp" + +AVAILTUNES += "armv8mmaindpsoftfp" +PACKAGE_EXTRA_ARCHS_tune-armv8mmaindpsoftfp = "${TUNE_PKGARCH_tune-armv8mmaindpsoftfp}" +BASE_LIB_tune-armv8mmaindpsoftfp = "lib/thumb/v8-m.main+dp/softfp" +TUNE_FEATURES_tune-armv8mmaindpsoftfp ="arm armrm" +TUNE_CCARGS_tune-armv8mmaindpsoftfp = "-mthumb -march=armv8-m.main+fp.dp -mfloat-abi=softfp" +TUNE_PKGARCH_tune-armv8mmaindpsoftfp = "armv8mmainfpdpt" + + +# thumb/v8-m.main+dp/hard +# CFLAGS: -mthumb -march=armv8-m.main+fp.dp -mfloat-abi=hard +DEFAULTTUNE_virtclass-multilib-libv8mmaindphard = "armv8mmaindphard" + +AVAILTUNES += "armv8mmaindphard" +PACKAGE_EXTRA_ARCHS_tune-armv8mmaindphard = "${TUNE_PKGARCH_tune-armv8mmaindphard}" +BASE_LIB_tune-armv8mmaindphard = "lib/thumb/v8-m.main+dp/hard" +TUNE_FEATURES_tune-armv8mmaindphard ="arm armrm" +TUNE_CCARGS_tune-armv8mmaindphard = "-mthumb -march=armv8-m.main+fp.dp -mfloat-abi=hard" +TUNE_PKGARCH_tune-armv8mmaindphard = "armv8mmainfpdpthf" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa53-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa53-zynqmp.conf new file mode 100644 index 000000000..d2bbab0de --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa53-zynqmp.conf @@ -0,0 +1,3 @@ +DEFAULTTUNE ?= "cortexa53" + +require conf/machine/include/soc-zynqmp.inc diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa72-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa72-versal.conf new file mode 100644 index 000000000..27e109c01 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa72-versal.conf @@ -0,0 +1,3 @@ +DEFAULTTUNE ?= "cortexa72" + +require conf/machine/include/soc-versal.inc diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa9-zynq.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa9-zynq.conf new file mode 100644 index 000000000..02568109b --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexa9-zynq.conf @@ -0,0 +1 @@ +require conf/machine/include/soc-zynq.inc diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-versal.conf new file mode 100644 index 000000000..fa58dc007 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-versal.conf @@ -0,0 +1,3 @@ +DEFAULTTUNE ?= "cortexr5f" + +require conf/machine/include/soc-versal.inc diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-zynqmp.conf new file mode 100644 index 000000000..817150f83 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/cortexr5-zynqmp.conf @@ -0,0 +1,3 @@ +DEFAULTTUNE ?= "cortexr5f" + +require conf/machine/include/soc-zynqmp.inc diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/baremetal-tc.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/baremetal-tc.conf new file mode 100644 index 000000000..a53ceac25 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/baremetal-tc.conf @@ -0,0 +1,7 @@ +# This is specific to baremetal toolchains only. +# +# Some of the operations we want to do are different then regular Yocto +# Project SDK workflows, so wrap baremetal toolchain items in a custom +# override: + +MACHINEOVERRIDES_append = ":baremetal-multilib-tc" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-default.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-default.inc index 1367e57ab..f2533be70 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-default.inc +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-default.inc @@ -6,26 +6,20 @@ MACHINE_FEATURES_BACKFILL_CONSIDERED += "rtc" IMAGE_FSTYPES ?= "tar.gz cpio cpio.gz.u-boot" # Kernel Configuration -XILINX_DEFAULT_KERNEL := "linux-xlnx" -XILINX_DEFAULT_KERNEL_microblaze := "linux-yocto" -XILINX_DEFAULT_KERNEL_zynqmp := "linux-yocto" -PREFERRED_PROVIDER_virtual/kernel ??= "${XILINX_DEFAULT_KERNEL}" +PREFERRED_PROVIDER_virtual/kernel ??= "linux-xlnx" # U-Boot Configuration -XILINX_DEFAULT_UBOOT := "u-boot-xlnx" -XILINX_DEFAULT_UBOOT_zynqmp := "u-boot" -PREFERRED_PROVIDER_virtual/bootloader ??= "${XILINX_DEFAULT_UBOOT}" +PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-xlnx" PREFERRED_PROVIDER_virtual/boot-bin ??= "${PREFERRED_PROVIDER_virtual/bootloader}" +do_image_wic[depends] += "${@' '.join('%s:do_deploy' % r for r in (d.getVar('WIC_DEPENDS') or "").split())}" + UBOOT_SUFFIX ?= "img" -UBOOT_SUFFIX_zynqmp ?= "bin" UBOOT_SUFFIX_microblaze ?= "bin" UBOOT_BINARY ?= "u-boot.${UBOOT_SUFFIX}" UBOOT_ELF ?= "u-boot" -UBOOT_ELF_zynq ?= "u-boot.elf" UBOOT_ELF_aarch64 ?= "u-boot.elf" -UBOOT_ELF_versal ?= "u-boot.elf" #Hardware accelaration PREFERRED_PROVIDER_virtual/libgles1_mali400 = "libmali-xlnx" @@ -39,6 +33,8 @@ GCCPIE_microblaze = "" GLIBCPIE_microblaze = "" SECURITY_CFLAGS_microblaze = "" SECURITY_LDFLAGS_microblaze = "" +# Microblaze does not support gnu hash style +LINKER_HASH_STYLE_microblaze = "sysv" XSERVER ?= " \ xserver-xorg \ @@ -79,9 +75,5 @@ def get_default_image_boot_files(d): return " ".join(files) XSERVER_EXT ?= "" -XSERVER_EXT_zynqmp ?= "xf86-video-armsoc" - -# For MicroBlaze default all microblaze machines to use GDB 7.7.1 (for gdbserver/gdb) -PREFERRED_VERSION_gdb_microblaze = "7.7.1" FPGA_MNGR_RECONFIG_ENABLE ?= "${@bb.utils.contains('IMAGE_FEATURES', 'fpga-manager', '1', '0', d)}" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-overrides.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-overrides.inc deleted file mode 100644 index 30049bc04..000000000 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-overrides.inc +++ /dev/null @@ -1,21 +0,0 @@ -SOC_VARIANT ??= "" -MACHINEOVERRIDES =. "${@['', '${SOC_FAMILY}${SOC_VARIANT}:']['${SOC_VARIANT}' != '']}" - -# Here we can extend overrides for the corresponding family and variant -def get_soc_overrides(fam, var, d): - extender = '' - if (fam == 'zynqmp'): - if (var == 'eg'): - extender = 'mali400:' - elif (var == 'ev'): - extender = 'mali400:vcu:' - return extender - -# Gets OVERRIDES extender depending on the board -SOC_OVERRIDES = "${@get_soc_overrides(d.getVar('SOC_FAMILY'),d.getVar('SOC_VARIANT'), d)}" - -MACHINEOVERRIDES =. "${SOC_OVERRIDES}" - -PACKAGE_EXTRA_ARCHS_append = " ${SOC_FAMILY}" -PACKAGE_EXTRA_ARCHS_append = "${@['', ' ${SOC_FAMILY}${SOC_VARIANT}']['${SOC_VARIANT}' != '']}" - diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-qemu.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-qemu.inc index 5eb4b5c47..b804112b5 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-qemu.inc +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/machine-xilinx-qemu.inc @@ -1,9 +1,17 @@ # This include is used to setup default QEMU and qemuboot config for meta-xilinx # machines. +# Use the xilinx specific version for these users +IMAGE_CLASSES += "qemuboot-xilinx" + # depend on qemu-helper-native, which will depend on QEMU EXTRA_IMAGEDEPENDS += "qemu-helper-native" +PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" +PREFERRED_PROVIDER_qemu = "qemu-xilinx" +PREFERRED_PROVIDER_qemu-native = "qemu-xilinx-native" +PREFERRED_PROVIDER_nativesdk-qemu = "nativesdk-qemu-xilinx" + def qemu_default_dtb(d): if d.getVar("IMAGE_BOOT_FILES", True): dtbs = d.getVar("IMAGE_BOOT_FILES", True).split(" ") @@ -16,8 +24,9 @@ def qemu_default_dtb(d): return "" def qemu_default_serial(d): - if d.getVar("SERIAL_CONSOLE", True): - speed, console = d.getVar("SERIAL_CONSOLE", True).split(" ", 1) + if d.getVar("SERIAL_CONSOLES", True): + first_console = d.getVar("SERIAL_CONSOLES", True).split(" ")[0] + speed, console = first_console.split(";", 1) # zynqmp uses earlycon and stdout (in dtb) if "zynqmp" in d.getVar("MACHINEOVERRIDES", True).split(":"): return "" @@ -38,6 +47,7 @@ def qemu_zynqmp_unhalt(d, multiarch): return "-device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4 -device loader,addr=0xfd1a0104,data=0x8000000e,data-len=4" # For qemuboot, default setup across all machines in meta-xilinx +QB_SYSTEM_NAME_aarch64 ?= "${@qemu_target_binary(d)}-multiarch" QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" QB_DEFAULT_FSTYPE ?= "cpio" QB_DTB ?= "${@qemu_default_dtb(d)}" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-tune-include.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-tune-include.inc new file mode 100644 index 000000000..7b6bd12ab --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-tune-include.inc @@ -0,0 +1,14 @@ +# Unfortunately various tunefiles don't include each other, so create +# a list of things to require based on the DEFAULTTUNE setting. +TUNEFILE[cortexr5] = "conf/machine/include/tune-cortexrm.inc" +TUNEFILE[cortexr5f] = "conf/machine/include/tune-cortexrm.inc" +TUNEFILE[cortexa9thf-neon] = "conf/machine/include/tune-cortexa9.inc" +TUNEFILE[cortexa53] = "conf/machine/include/tune-cortexa53.inc" +TUNEFILE[cortexa72] = "conf/machine/include/tune-cortexa72.inc" +TUNEFILE[cortexa72-cortexa53] = "conf/machine/include/tune-cortexa72-cortexa53.inc" +TUNEFILE[microblaze] = "conf/machine/include/tune-microblaze.inc" + +# Default to arch-armv8a.inc +TUNEFILE = "${@ d.getVarFlag('TUNEFILE', d.getVar('DEFAULTTUNE')) if d.getVarFlag('TUNEFILE', d.getVar('DEFAULTTUNE')) else 'conf/machine/include/arm/arch-armv8a.inc'}" + +require ${TUNEFILE} diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-versal.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-versal.inc new file mode 100644 index 000000000..d15f4909a --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-versal.inc @@ -0,0 +1,19 @@ +DEFAULTTUNE ?= "cortexa72-cortexa53" +SOC_FAMILY ?= "versal" + +# Available SOC_VARIANT's for versal: +# "-prime" - Versal deafult Prime Devices +# "-ai-core" - Versal AI-core Devices +# "-premium" - Versal Premium Devices + +SOC_VARIANT ?= "-prime" + +require soc-tune-include.inc +require xilinx-soc-family.inc + +# Linux Configuration +KERNEL_IMAGETYPE ?= "Image" + +WIC_DEPENDS ?= "virtual/kernel virtual/bootloader virtual/boot-bin virtual/arm-trusted-firmware" + +UBOOT_ELF ?= "u-boot.elf" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-zynq.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-zynq.inc index f7006026a..0111cbd98 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-zynq.inc +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-zynq.inc @@ -7,8 +7,8 @@ SOC_FAMILY ?= "zynq" SOC_VARIANT ?= "7z" -require conf/machine/include/tune-cortexa9.inc -require conf/machine/include/soc-family.inc +require soc-tune-include.inc +require xilinx-soc-family.inc # Linux Configuration KERNEL_IMAGETYPE ?= "uImage" @@ -17,3 +17,8 @@ KERNEL_IMAGETYPES += "zImage" # Set default load address. # Override with KERNEL_EXTRA_ARGS_<board> += "..." in machine file if required KERNEL_EXTRA_ARGS_zynq += "UIMAGE_LOADADDR=0x8000" + +# WIC Specific dependencies +WIC_DEPENDS ?= "virtual/kernel virtual/bootloader virtual/boot-bin" + +UBOOT_ELF ?= "u-boot.elf" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-zynqmp.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-zynqmp.inc new file mode 100644 index 000000000..8d421fb36 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/soc-zynqmp.inc @@ -0,0 +1,28 @@ +DEFAULTTUNE ?= "cortexa72-cortexa53" +SOC_FAMILY ?= "zynqmp" + +# Available SOC_VARIANT's for zynqmp: +# "cg" - Zynq UltraScale+ CG Devices +# "eg" - Zynq UltraScale+ EG Devices +# "ev" - Zynq UltraScale+ EV Devices +# "dr" - Zynq UltraScale+ DR Devices + +SOC_VARIANT ?= "eg" + +MACHINEOVERRIDES_prepend_zynqmpeg = "mali400:" +MACHINEOVERRIDES_prepend_zynqmpev = "mali400:vcu:" + +require soc-tune-include.inc +require xilinx-soc-family.inc + +# Linux Configuration +KERNEL_IMAGETYPE ?= "Image" + +# Support multilib on zynqmp +DEFAULTTUNE_virtclass-multilib-lib32 ?= "armv7vethf-neon-vfpv4" + +WIC_DEPENDS ?= "virtual/kernel virtual/bootloader virtual/boot-bin virtual/arm-trusted-firmware" + +UBOOT_SUFFIX ?= "bin" + +XSERVER_EXT_zynqmp ?= "xf86-video-armsoc" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-cortexrm.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-cortexrm.inc new file mode 100644 index 000000000..66edbdbdb --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-cortexrm.inc @@ -0,0 +1,21 @@ +DEFAULTTUNE ?= "cortexr5" + +require conf/machine/include/arm/arch-armv8a.inc + +TUNEVALID[armrm] = "Enable ARM Cortex-R/M Family" +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armrm', 'armrm:', '' ,d)}" + +TUNEVALID[cortexr5] = "Enable Cortex-r5 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr5', ' -mcpu=cortex-r5', '', d)}" + +AVAILTUNES += "cortexr5" +ARMPKGARCH_tune-cortexr5 = "cortexr5" + +TUNE_FEATURES_tune-cortexr5 = "armrm cortexr5" +PACKAGE_EXTRA_ARCHS_tune-cortexr5 = "${TUNE_PKGARCH}" + +AVAILTUNES += "cortexr5f" +ARMPKGARCH_tune-cortexr5f = "cortexr5f" + +TUNE_FEATURES_tune-cortexr5f = "armrm cortexr5 vfpv3d16 callconvention-hard" +PACKAGE_EXTRA_ARCHS_tune-cortexr5f = "${TUNE_PKGARCH}" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-versal.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-versal.inc deleted file mode 100644 index 83acf6e08..000000000 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-versal.inc +++ /dev/null @@ -1,14 +0,0 @@ -DEFAULTTUNE ?= "aarch64" -SOC_FAMILY ?= "versal" - -# Available SOC_VARIANT's for versal: -# virt - -SOC_VARIANT ?= "" - -require conf/machine/include/arm/arch-armv8.inc -require conf/machine/include/soc-family.inc - -# Linux Configuration -KERNEL_IMAGETYPE ?= "Image" - diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-zynqmp.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-zynqmp.inc deleted file mode 100644 index cbfa47b89..000000000 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/tune-zynqmp.inc +++ /dev/null @@ -1,18 +0,0 @@ -DEFAULTTUNE ?= "aarch64" -SOC_FAMILY ?= "zynqmp" - -# Available SOC_VARIANT's for zynqmp: -# "cg" - Zynq UltraScale+ CG Devices -# "eg" - Zynq UltraScale+ EG Devices -# "ev" - Zynq UltraScale+ EV Devices - -SOC_VARIANT ?= "eg" - -require conf/machine/include/arm/arch-armv8a.inc -require conf/machine/include/soc-family.inc - -# Linux Configuration -KERNEL_IMAGETYPE ?= "Image" - -# Support multilib on zynqmp -DEFAULTTUNE_virtclass-multilib-lib32 ?= "armv7vethf-neon-vfpv4" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/include/xilinx-soc-family.inc b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/xilinx-soc-family.inc new file mode 100644 index 000000000..e6c62ccc6 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/include/xilinx-soc-family.inc @@ -0,0 +1,10 @@ +require conf/machine/include/soc-family.inc + +SOC_VARIANT ??= "" +MACHINEOVERRIDES =. "${@['', '${SOC_FAMILY}${SOC_VARIANT}:']['${SOC_VARIANT}' != '']}" + +SOC_FAMILY_ARCH ?= "${SOC_FAMILY}" +SOC_VARIANT_ARCH ?= "${SOC_FAMILY}${SOC_VARIANT}" + +PACKAGE_EXTRA_ARCHS_append = " ${SOC_FAMILY_ARCH}" +PACKAGE_EXTRA_ARCHS_append = "${@['', ' ${SOC_VARIANT_ARCH}'][d.getVar('SOC_VARIANT_ARCH') != d.getVar('SOC_FAMILY_ARCH')]}" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf index d79e4efd9..73f5b0468 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf @@ -11,14 +11,12 @@ TUNE_FEATURES_tune-microblaze += "v11.0 barrel-shift reorder pattern-compare mul MACHINE_FEATURES = "" USE_VT = "" -SERIAL_CONSOLE = "115200 ttyS0" +SERIAL_CONSOLES ?= "115200;ttyS0" KERNEL_IMAGETYPE ?= "linux.bin.ub" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" EXTRA_IMAGEDEPENDS += "virtual/bitstream virtual/bootloader" -UBOOT_MACHINE ?= "microblaze-generic_config" +UBOOT_MACHINE = "microblaze-generic_defconfig" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-plm.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-plm.conf new file mode 100644 index 000000000..9ab8a46b2 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-plm.conf @@ -0,0 +1,10 @@ +DEFAULTTUNE ?= "microblaze" + +require conf/machine/include/soc-versal.inc + +# Endianess, multiplier, barrel shift, pattern compare, floating point double or single, are the possibilities +AVAILTUNES += "microblaze" +TUNE_FEATURES_tune-microblaze = "microblaze v11.0 barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblaze = "${TUNE_PKGARCH}" + +LINKER_HASH_STYLE_microblaze = "sysv" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-pmu.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-pmu.conf new file mode 100644 index 000000000..09fd3c805 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-pmu.conf @@ -0,0 +1,10 @@ +DEFAULTTUNE ?= "microblaze" + +require conf/machine/include/soc-zynqmp.inc + +# Endianess, multiplier, barrel shift, pattern compare, floating point double or single, are the possibilities +AVAILTUNES += "microblaze" +TUNE_FEATURES_tune-microblaze = "microblaze v11.0 barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblaze = "${TUNE_PKGARCH}" + +LINKER_HASH_STYLE_microblaze = "sysv" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-tc.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-tc.conf new file mode 100644 index 000000000..bc80ad754 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblaze-tc.conf @@ -0,0 +1,541 @@ +require conf/multilib.conf +require conf/machine/include/microblaze/arch-microblaze.inc +require conf/machine/include/baremetal-tc.conf + +# ILP request an alternative machine dictionary +INHERIT += "xlnx-standalone" +PACKAGEQA_EXTRA_MACHDEFFUNCS .= '${@bb.utils.contains("TUNE_FEATURES", "64-bit", " xlnx_mb64_dict", "", d)}' + +# GNU hash style not supported +LINKER_HASH_STYLE_microblaze = "" + +# Define all of the multilibs supproted by this configuration +MULTILIB_GLOBAL_VARIANTS = "${@extend_variants(d,'MULTILIBS','multilib')}" + +MULTILIBS += "multilib:libmble" +MULTILIBS += "multilib:libmbbs" +MULTILIBS += "multilib:libmbp" +MULTILIBS += "multilib:libmbm" +MULTILIBS += "multilib:libmbfpd" +MULTILIBS += "multilib:libmbmfpd" +MULTILIBS += "multilib:libmbpm" +MULTILIBS += "multilib:libmbpfpd" +MULTILIBS += "multilib:libmbpmfpd" +MULTILIBS += "multilib:libmbbsp" +MULTILIBS += "multilib:libmbbsm" +MULTILIBS += "multilib:libmbbsfpd" +MULTILIBS += "multilib:libmbbsmfpd" +MULTILIBS += "multilib:libmbbspm" +MULTILIBS += "multilib:libmbbspfpd" +MULTILIBS += "multilib:libmbbspmfpd" +MULTILIBS += "multilib:libmblem64" +MULTILIBS += "multilib:libmblebs" +MULTILIBS += "multilib:libmblep" +MULTILIBS += "multilib:libmblem" +MULTILIBS += "multilib:libmblefpd" +MULTILIBS += "multilib:libmblemfpd" +MULTILIBS += "multilib:libmblepm" +MULTILIBS += "multilib:libmblepfpd" +MULTILIBS += "multilib:libmblepmfpd" +MULTILIBS += "multilib:libmblebsp" +MULTILIBS += "multilib:libmblebsm" +MULTILIBS += "multilib:libmblebsfpd" +MULTILIBS += "multilib:libmblebsmfpd" +MULTILIBS += "multilib:libmblebspm" +MULTILIBS += "multilib:libmblebspfpd" +MULTILIBS += "multilib:libmblebspmfpd" +MULTILIBS += "multilib:libmblem64bs" +MULTILIBS += "multilib:libmblem64p" +MULTILIBS += "multilib:libmblem64m" +MULTILIBS += "multilib:libmblem64fpd" +MULTILIBS += "multilib:libmblem64mfpd" +MULTILIBS += "multilib:libmblem64pm" +MULTILIBS += "multilib:libmblem64pfpd" +MULTILIBS += "multilib:libmblem64pmfpd" +MULTILIBS += "multilib:libmblem64bsp" +MULTILIBS += "multilib:libmblem64bsm" +MULTILIBS += "multilib:libmblem64bsfpd" +MULTILIBS += "multilib:libmblem64bsmfpd" +MULTILIBS += "multilib:libmblem64bspm" +MULTILIBS += "multilib:libmblem64bspfpd" +MULTILIBS += "multilib:libmblem64bspmfpd" + + +# Base configuration +# CFLAGS: +DEFAULTTUNE = "microblaze" + +AVAILTUNES += "microblaze" +BASE_LIB_tune-microblaze = "lib" +TUNE_FEATURES_tune-microblaze = "microblaze bigendian" +PACKAGE_EXTRA_ARCHS_tune-microblaze = "${TUNE_PKGARCH}" + + +# le +# CFLAGS: -mlittle-endian +DEFAULTTUNE_virtclass-multilib-libmble = "microblazele" + +AVAILTUNES += "microblazele" +BASE_LIB_tune-microblazele = "lib/le" +TUNE_FEATURES_tune-microblazele = "microblaze" +PACKAGE_EXTRA_ARCHS_tune-microblazele = "${TUNE_PKGARCH}" + + +# bs +# CFLAGS: -mxl-barrel-shift +DEFAULTTUNE_virtclass-multilib-libmbbs = "microblazebs" + +AVAILTUNES += "microblazebs" +BASE_LIB_tune-microblazebs = "lib/bs" +TUNE_FEATURES_tune-microblazebs = "microblaze bigendian barrel-shift" +PACKAGE_EXTRA_ARCHS_tune-microblazebs = "${TUNE_PKGARCH}" + + +# p +# CFLAGS: -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmbp = "microblazep" + +AVAILTUNES += "microblazep" +BASE_LIB_tune-microblazep = "lib/p" +TUNE_FEATURES_tune-microblazep = "microblaze bigendian pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazep = "${TUNE_PKGARCH}" + + +# m +# CFLAGS: -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmbm = "microblazem" + +AVAILTUNES += "microblazem" +BASE_LIB_tune-microblazem = "lib/m" +TUNE_FEATURES_tune-microblazem = "microblaze bigendian multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazem = "${TUNE_PKGARCH}" + + +# fpd +# CFLAGS: -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbfpd = "microblazefpd" + +AVAILTUNES += "microblazefpd" +BASE_LIB_tune-microblazefpd = "lib/fpd" +TUNE_FEATURES_tune-microblazefpd = "microblaze bigendian fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazefpd = "${TUNE_PKGARCH}" + + +# m/fpd +# CFLAGS: -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbmfpd = "microblazemfpd" + +AVAILTUNES += "microblazemfpd" +BASE_LIB_tune-microblazemfpd = "lib/m/fpd" +TUNE_FEATURES_tune-microblazemfpd = "microblaze bigendian multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazemfpd = "${TUNE_PKGARCH}" + + +# p/m +# CFLAGS: -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmbpm = "microblazepm" + +AVAILTUNES += "microblazepm" +BASE_LIB_tune-microblazepm = "lib/p/m" +TUNE_FEATURES_tune-microblazepm = "microblaze bigendian pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazepm = "${TUNE_PKGARCH}" + + +# p/fpd +# CFLAGS: -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbpfpd = "microblazepfpd" + +AVAILTUNES += "microblazepfpd" +BASE_LIB_tune-microblazepfpd = "lib/p/fpd" +TUNE_FEATURES_tune-microblazepfpd = "microblaze bigendian pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazepfpd = "${TUNE_PKGARCH}" + + +# p/m/fpd +# CFLAGS: -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbpmfpd = "microblazepmfpd" + +AVAILTUNES += "microblazepmfpd" +BASE_LIB_tune-microblazepmfpd = "lib/p/m/fpd" +TUNE_FEATURES_tune-microblazepmfpd = "microblaze bigendian pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazepmfpd = "${TUNE_PKGARCH}" + + +# bs/p +# CFLAGS: -mxl-barrel-shift -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmbbsp = "microblazebsp" + +AVAILTUNES += "microblazebsp" +BASE_LIB_tune-microblazebsp = "lib/bs/p" +TUNE_FEATURES_tune-microblazebsp = "microblaze bigendian barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazebsp = "${TUNE_PKGARCH}" + + +# bs/m +# CFLAGS: -mxl-barrel-shift -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmbbsm = "microblazebsm" + +AVAILTUNES += "microblazebsm" +BASE_LIB_tune-microblazebsm = "lib/bs/m" +TUNE_FEATURES_tune-microblazebsm = "microblaze bigendian barrel-shift multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazebsm = "${TUNE_PKGARCH}" + + +# bs/fpd +# CFLAGS: -mxl-barrel-shift -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbbsfpd = "microblazebsfpd" + +AVAILTUNES += "microblazebsfpd" +BASE_LIB_tune-microblazebsfpd = "lib/bs/fpd" +TUNE_FEATURES_tune-microblazebsfpd = "microblaze bigendian barrel-shift fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazebsfpd = "${TUNE_PKGARCH}" + + +# bs/m/fpd +# CFLAGS: -mxl-barrel-shift -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbbsmfpd = "microblazebsmfpd" + +AVAILTUNES += "microblazebsmfpd" +BASE_LIB_tune-microblazebsmfpd = "lib/bs/m/fpd" +TUNE_FEATURES_tune-microblazebsmfpd = "microblaze bigendian barrel-shift multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazebsmfpd = "${TUNE_PKGARCH}" + + +# bs/p/m +# CFLAGS: -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmbbspm = "microblazebspm" + +AVAILTUNES += "microblazebspm" +BASE_LIB_tune-microblazebspm = "lib/bs/p/m" +TUNE_FEATURES_tune-microblazebspm = "microblaze bigendian barrel-shift pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazebspm = "${TUNE_PKGARCH}" + + +# bs/p/fpd +# CFLAGS: -mxl-barrel-shift -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbbspfpd = "microblazebspfpd" + +AVAILTUNES += "microblazebspfpd" +BASE_LIB_tune-microblazebspfpd = "lib/bs/p/fpd" +TUNE_FEATURES_tune-microblazebspfpd = "microblaze bigendian barrel-shift pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazebspfpd = "${TUNE_PKGARCH}" + + +# bs/p/m/fpd +# CFLAGS: -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmbbspmfpd = "microblazebspmfpd" + +AVAILTUNES += "microblazebspmfpd" +BASE_LIB_tune-microblazebspmfpd = "lib/bs/p/m/fpd" +TUNE_FEATURES_tune-microblazebspmfpd = "microblaze bigendian barrel-shift pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazebspmfpd = "${TUNE_PKGARCH}" + + +# le/m64 +# CFLAGS: -mlittle-endian -m64 +DEFAULTTUNE_virtclass-multilib-libmblem64 = "microblazele64" + +AVAILTUNES += "microblazele64" +BASE_LIB_tune-microblazele64 = "lib/le/m64" +TUNE_FEATURES_tune-microblazele64 = "microblaze 64-bit" +PACKAGE_EXTRA_ARCHS_tune-microblazele64 = "${TUNE_PKGARCH}" + + +# le/bs +# CFLAGS: -mlittle-endian -mxl-barrel-shift +DEFAULTTUNE_virtclass-multilib-libmblebs = "microblazelebs" + +AVAILTUNES += "microblazelebs" +BASE_LIB_tune-microblazelebs = "lib/le/bs" +TUNE_FEATURES_tune-microblazelebs = "microblaze barrel-shift" +PACKAGE_EXTRA_ARCHS_tune-microblazelebs = "${TUNE_PKGARCH}" + + +# le/p +# CFLAGS: -mlittle-endian -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmblep = "microblazelep" + +AVAILTUNES += "microblazelep" +BASE_LIB_tune-microblazelep = "lib/le/p" +TUNE_FEATURES_tune-microblazelep = "microblaze pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazelep = "${TUNE_PKGARCH}" + + +# le/m +# CFLAGS: -mlittle-endian -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblem = "microblazelem" + +AVAILTUNES += "microblazelem" +BASE_LIB_tune-microblazelem = "lib/le/m" +TUNE_FEATURES_tune-microblazelem = "microblaze multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazelem = "${TUNE_PKGARCH}" + + +# le/fpd +# CFLAGS: -mlittle-endian -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblefpd = "microblazelefpd" + +AVAILTUNES += "microblazelefpd" +BASE_LIB_tune-microblazelefpd = "lib/le/fpd" +TUNE_FEATURES_tune-microblazelefpd = "microblaze fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelefpd = "${TUNE_PKGARCH}" + + +# le/m/fpd +# CFLAGS: -mlittle-endian -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblemfpd = "microblazelemfpd" + +AVAILTUNES += "microblazelemfpd" +BASE_LIB_tune-microblazelemfpd = "lib/le/m/fpd" +TUNE_FEATURES_tune-microblazelemfpd = "microblaze multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelemfpd = "${TUNE_PKGARCH}" + + +# le/p/m +# CFLAGS: -mlittle-endian -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblepm = "microblazelepm" + +AVAILTUNES += "microblazelepm" +BASE_LIB_tune-microblazelepm = "lib/le/p/m" +TUNE_FEATURES_tune-microblazelepm = "microblaze pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazelepm = "${TUNE_PKGARCH}" + + +# le/p/fpd +# CFLAGS: -mlittle-endian -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblepfpd = "microblazelepfpd" + +AVAILTUNES += "microblazelepfpd" +BASE_LIB_tune-microblazelepfpd = "lib/le/p/fpd" +TUNE_FEATURES_tune-microblazelepfpd = "microblaze pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelepfpd = "${TUNE_PKGARCH}" + + +# le/p/m/fpd +# CFLAGS: -mlittle-endian -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblepmfpd = "microblazelepmfpd" + +AVAILTUNES += "microblazelepmfpd" +BASE_LIB_tune-microblazelepmfpd = "lib/le/p/m/fpd" +TUNE_FEATURES_tune-microblazelepmfpd = "microblaze pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelepmfpd = "${TUNE_PKGARCH}" + + +# le/bs/p +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmblebsp = "microblazelebsp" + +AVAILTUNES += "microblazelebsp" +BASE_LIB_tune-microblazelebsp = "lib/le/bs/p" +TUNE_FEATURES_tune-microblazelebsp = "microblaze barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazelebsp = "${TUNE_PKGARCH}" + + +# le/bs/m +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblebsm = "microblazelebsm" + +AVAILTUNES += "microblazelebsm" +BASE_LIB_tune-microblazelebsm = "lib/le/bs/m" +TUNE_FEATURES_tune-microblazelebsm = "microblaze barrel-shift multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazelebsm = "${TUNE_PKGARCH}" + + +# le/bs/fpd +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblebsfpd = "microblazelebsfpd" + +AVAILTUNES += "microblazelebsfpd" +BASE_LIB_tune-microblazelebsfpd = "lib/le/bs/fpd" +TUNE_FEATURES_tune-microblazelebsfpd = "microblaze barrel-shift fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelebsfpd = "${TUNE_PKGARCH}" + + +# le/bs/m/fpd +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblebsmfpd = "microblazelebsmfpd" + +AVAILTUNES += "microblazelebsmfpd" +BASE_LIB_tune-microblazelebsmfpd = "lib/le/bs/m/fpd" +TUNE_FEATURES_tune-microblazelebsmfpd = "microblaze barrel-shift multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelebsmfpd = "${TUNE_PKGARCH}" + + +# le/bs/p/m +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblebspm = "microblazelebspm" + +AVAILTUNES += "microblazelebspm" +BASE_LIB_tune-microblazelebspm = "lib/le/bs/p/m" +TUNE_FEATURES_tune-microblazelebspm = "microblaze barrel-shift pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazelebspm = "${TUNE_PKGARCH}" + + +# le/bs/p/fpd +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblebspfpd = "microblazelebspfpd" + +AVAILTUNES += "microblazelebspfpd" +BASE_LIB_tune-microblazelebspfpd = "lib/le/bs/p/fpd" +TUNE_FEATURES_tune-microblazelebspfpd = "microblaze barrel-shift pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelebspfpd = "${TUNE_PKGARCH}" + + +# le/bs/p/m/fpd +# CFLAGS: -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblebspmfpd = "microblazelebspmfpd" + +AVAILTUNES += "microblazelebspmfpd" +BASE_LIB_tune-microblazelebspmfpd = "lib/le/bs/p/m/fpd" +TUNE_FEATURES_tune-microblazelebspmfpd = "microblaze barrel-shift pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazelebspmfpd = "${TUNE_PKGARCH}" + + +# le/m64/bs +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift +DEFAULTTUNE_virtclass-multilib-libmblem64bs = "microblazele64bs" + +AVAILTUNES += "microblazele64bs" +BASE_LIB_tune-microblazele64bs = "lib/le/m64/bs" +TUNE_FEATURES_tune-microblazele64bs = "microblaze 64-bit barrel-shift" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bs = "${TUNE_PKGARCH}" + + +# le/m64/p +# CFLAGS: -mlittle-endian -m64 -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmblem64p = "microblazele64p" + +AVAILTUNES += "microblazele64p" +BASE_LIB_tune-microblazele64p = "lib/le/m64/p" +TUNE_FEATURES_tune-microblazele64p = "microblaze 64-bit pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazele64p = "${TUNE_PKGARCH}" + + +# le/m64/m +# CFLAGS: -mlittle-endian -m64 -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblem64m = "microblazele64m" + +AVAILTUNES += "microblazele64m" +BASE_LIB_tune-microblazele64m = "lib/le/m64/m" +TUNE_FEATURES_tune-microblazele64m = "microblaze 64-bit multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazele64m = "${TUNE_PKGARCH}" + + +# le/m64/fpd +# CFLAGS: -mlittle-endian -m64 -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64fpd = "microblazele64fpd" + +AVAILTUNES += "microblazele64fpd" +BASE_LIB_tune-microblazele64fpd = "lib/le/m64/fpd" +TUNE_FEATURES_tune-microblazele64fpd = "microblaze 64-bit fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64fpd = "${TUNE_PKGARCH}" + + +# le/m64/m/fpd +# CFLAGS: -mlittle-endian -m64 -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64mfpd = "microblazele64mfpd" + +AVAILTUNES += "microblazele64mfpd" +BASE_LIB_tune-microblazele64mfpd = "lib/le/m64/m/fpd" +TUNE_FEATURES_tune-microblazele64mfpd = "microblaze 64-bit multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64mfpd = "${TUNE_PKGARCH}" + + +# le/m64/p/m +# CFLAGS: -mlittle-endian -m64 -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblem64pm = "microblazele64pm" + +AVAILTUNES += "microblazele64pm" +BASE_LIB_tune-microblazele64pm = "lib/le/m64/p/m" +TUNE_FEATURES_tune-microblazele64pm = "microblaze 64-bit pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazele64pm = "${TUNE_PKGARCH}" + + +# le/m64/p/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64pfpd = "microblazele64pfpd" + +AVAILTUNES += "microblazele64pfpd" +BASE_LIB_tune-microblazele64pfpd = "lib/le/m64/p/fpd" +TUNE_FEATURES_tune-microblazele64pfpd = "microblaze 64-bit pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64pfpd = "${TUNE_PKGARCH}" + + +# le/m64/p/m/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64pmfpd = "microblazele64pmfpd" + +AVAILTUNES += "microblazele64pmfpd" +BASE_LIB_tune-microblazele64pmfpd = "lib/le/m64/p/m/fpd" +TUNE_FEATURES_tune-microblazele64pmfpd = "microblaze 64-bit pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64pmfpd = "${TUNE_PKGARCH}" + + +# le/m64/bs/p +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mxl-pattern-compare +DEFAULTTUNE_virtclass-multilib-libmblem64bsp = "microblazele64bsp" + +AVAILTUNES += "microblazele64bsp" +BASE_LIB_tune-microblazele64bsp = "lib/le/m64/bs/p" +TUNE_FEATURES_tune-microblazele64bsp = "microblaze 64-bit barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bsp = "${TUNE_PKGARCH}" + + +# le/m64/bs/m +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblem64bsm = "microblazele64bsm" + +AVAILTUNES += "microblazele64bsm" +BASE_LIB_tune-microblazele64bsm = "lib/le/m64/bs/m" +TUNE_FEATURES_tune-microblazele64bsm = "microblaze 64-bit barrel-shift multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bsm = "${TUNE_PKGARCH}" + + +# le/m64/bs/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64bsfpd = "microblazele64bsfpd" + +AVAILTUNES += "microblazele64bsfpd" +BASE_LIB_tune-microblazele64bsfpd = "lib/le/m64/bs/fpd" +TUNE_FEATURES_tune-microblazele64bsfpd = "microblaze 64-bit barrel-shift fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bsfpd = "${TUNE_PKGARCH}" + + +# le/m64/bs/m/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64bsmfpd = "microblazele64bsmfpd" + +AVAILTUNES += "microblazele64bsmfpd" +BASE_LIB_tune-microblazele64bsmfpd = "lib/le/m64/bs/m/fpd" +TUNE_FEATURES_tune-microblazele64bsmfpd = "microblaze 64-bit barrel-shift multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bsmfpd = "${TUNE_PKGARCH}" + + +# le/m64/bs/p/m +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul +DEFAULTTUNE_virtclass-multilib-libmblem64bspm = "microblazele64bspm" + +AVAILTUNES += "microblazele64bspm" +BASE_LIB_tune-microblazele64bspm = "lib/le/m64/bs/p/m" +TUNE_FEATURES_tune-microblazele64bspm = "microblaze 64-bit barrel-shift pattern-compare multiply-low" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bspm = "${TUNE_PKGARCH}" + + +# le/m64/bs/p/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mxl-pattern-compare -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64bspfpd = "microblazele64bspfpd" + +AVAILTUNES += "microblazele64bspfpd" +BASE_LIB_tune-microblazele64bspfpd = "lib/le/m64/bs/p/fpd" +TUNE_FEATURES_tune-microblazele64bspfpd = "microblaze 64-bit barrel-shift pattern-compare fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bspfpd = "${TUNE_PKGARCH}" + + +# le/m64/bs/p/m/fpd +# CFLAGS: -mlittle-endian -m64 -mxl-barrel-shift -mxl-pattern-compare -mno-xl-soft-mul -mhard-float +DEFAULTTUNE_virtclass-multilib-libmblem64bspmfpd = "microblazele64bspmfpd" + +AVAILTUNES += "microblazele64bspmfpd" +BASE_LIB_tune-microblazele64bspmfpd = "lib/le/m64/bs/p/m/fpd" +TUNE_FEATURES_tune-microblazele64bspmfpd = "microblaze 64-bit barrel-shift pattern-compare multiply-low fpu-hard" +PACKAGE_EXTRA_ARCHS_tune-microblazele64bspmfpd = "${TUNE_PKGARCH}" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf index 00aede111..ed4e2acb6 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf @@ -12,6 +12,6 @@ MACHINE_FEATURES = "" KERNEL_IMAGETYPE = "linux.bin.ub" KERNEL_IMAGETYPES = "" -SERIAL_CONSOLE = "115200 ttyS0" +SERIAL_CONSOLES ?= "115200;ttyS0" EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf index 30afbd71b..f154197ac 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf @@ -12,6 +12,6 @@ MACHINE_FEATURES = "" KERNEL_IMAGETYPE = "linux.bin.ub" KERNEL_IMAGETYPES = "" -SERIAL_CONSOLE = "115200 ttyS0" +SERIAL_CONSOLES ?= "115200;ttyS0" EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf index 83c5fc1e5..c531dbb2e 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf @@ -2,27 +2,25 @@ #@NAME: microzed-zynq7 #@DESCRIPTION: Machine support for microZed. (http://www.microzed.org/) -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "ext2 vfat usbhost" # u-boot configuration PREFERRED_PROVIDER_virtual/bootloader = "u-boot" -UBOOT_MACHINE = "zynq_microzed_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -UBOOT_ELF_zynq = "u-boot" +UBOOT_ELF = "u-boot" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "zynq-microzed.dtb" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf index f4ddb6dfd..3e5d623fd 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf @@ -11,15 +11,15 @@ TUNE_FEATURES_tune-microblaze += "v8.50 barrel-shift reorder pattern-compare div MACHINE_FEATURES = "" USE_VT = "" -SERIAL_CONSOLE = "115200 ttyS0" +SERIAL_CONSOLES ?= "115200;ttyS0" KERNEL_IMAGETYPE ?= "linux.bin.ub" # Use the networking setup from qemuarm +MACHINEOVERRIDES_prepend_pn-init-ifupdown = "qemuall:" FILESOVERRIDES_append_pn-init-ifupdown = ":qemuarm" # This machine is a targeting a QEMU model, runqemu setup: -IMAGE_CLASSES += "qemuboot" QB_MEM = "-m 256" QB_MACHINE = "-machine petalogix-ml605" QB_OPT_APPEND = "-nographic -serial mon:stdio" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf index c229dac65..17e83334b 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf @@ -6,27 +6,25 @@ # the picozed SOM. It also covers the multiple SKUs for the picoZed # including 7010, 7020, 7015 and 7030. -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "ext2 vfat usbhost usbgadget" # u-boot configuration PREFERRED_PROVIDER_virtual/bootloader = "u-boot" -UBOOT_MACHINE = "zynq_picozed_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -UBOOT_ELF_zynq = "u-boot" +UBOOT_ELF = "u-boot" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf index 97251048f..8bccfde29 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf @@ -2,26 +2,39 @@ #@NAME: qemu-zynq7 #@DESCRIPTION: Zynq QEMU machine support ('xilinx-zynq-a9' model) -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "ext2 vfat" -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" +HDF_MACHINE = "zc702-zynq7" + # Use the networking setup from qemuarm +MACHINEOVERRIDES_prepend_pn-init-ifupdown = "qemuall:" FILESOVERRIDES_append_pn-init-ifupdown = ":qemuarm" -# This machine is a targeting a QEMU model, runqemu setup: -IMAGE_CLASSES += "qemuboot" QB_MEM = "-m 1024" -QB_MACHINE = "-machine xilinx-zynq-a9" -QB_OPT_APPEND = "-nographic -serial null -serial mon:stdio" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" - +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=/tftpboot -net nic" +QB_DEFAULT_KERNEL_qemuboot-xilinx = "zImage" + +QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" +QB_DEFAULT_FSTYPE = "cpio.gz.u-boot" +QB_DTB = "system.dtb" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) +QB_OPT_APPEND = " \ + -nographic -serial null -serial mon:stdio \ + -initrd ${DEPLOY_DIR_IMAGE}/petalinux-image-minimal-qemu-zynq7.cpio.gz.u-boot \ + -gdb tcp::9000 \ + -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 \ + -device loader,addr=0xf8000140,data=0x00500801,data-len=4 \ + -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 \ + -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 \ + -device loader,addr=0xF8000910,data=0xF,data-len=0x4 \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf index 3a21eb78e..1ce632910 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf @@ -11,12 +11,11 @@ TUNE_FEATURES_tune-microblaze += "v8.00 bigendian barrel-shift pattern-compare m MACHINE_FEATURES = "" USE_VT = "" -SERIAL_CONSOLE = "115200 ttyUL0" +SERIAL_CONSOLES ?= "115200;ttyUL0" KERNEL_IMAGETYPE ?= "linux.bin.ub" # This machine is a targeting a QEMU model, runqemu setup: -IMAGE_CLASSES += "qemuboot" QB_MEM = "-m 256" QB_MACHINE = "-machine petalogix-s3adsp1800" QB_OPT_APPEND = "-nographic -serial mon:stdio" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/system-zcu102.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/system-zcu102.conf new file mode 100644 index 000000000..5d3bbd286 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/system-zcu102.conf @@ -0,0 +1,61 @@ +#@TYPE: Machine +#@NAME: system-zcu102 +#@DESCRIPTION: Machine supporting the architectures in the ZCU102 evaluation board. + +# This machine sets up a build for a heterogeneous architecture board. +# In this specific case, this refers to a zcu102-zynqmp board, which +# should build artifacts for the hard microblaze architecture, and the +# cortex-a53. + +# This is meant to be used as a base case and adapting it to +# other boards should be fairly simple. + +# To build a full system, simply invoke the command: +# $ bitbake <image> +# which is analogous to +# $ bitbake mc::<image> +# Where image can be core-image-minimal for example +# If a user wants to build a package for a certain architecture +# a similar command can be invoked, just changing the parameter +# between : and : to the desired multiconfig from one of the +# declared values below. +# For example, to build the xilstandalone library for the microblaze: +# $ bitbake mc:pmumc:xilstandalone +# or to build fsbl for cortexa53: +# $ bitbake mc:fsblmc:zyqmp-fsbl + + +# These artifacts are the pmu firmware along with the fsbl and the +# Linux OS respectively + +# Keep in mind that there would still be a wiring required to merge +# the artifacts from their respective deploy directories using bootgen. +BBMULTICONFIG = "fsblmc pmumc" + +# The following should be changed to the machine which corresponds to +# the architecture of a specific device, in this case cortexa53 +# But there are several hard coded expected values from several +# repos, e.g. linux-xlnx which expects a defconfig depending on +# the machine that is being used, as a TEMPORARY solution and +# to prove how multiconfig can be used to build a full system +# with heterogeneous architectures we'll use MACHINE=zcu102-zynqmp. + +# The downside is that this stills needs xsct and would technically +# build two pmu firmwrares and two fsbls, one coming from our +# multiconfig and one that uses xsct respectively, once the values +# mentioned above are fixed, this should work properly with: +# MACHINE = "cortexa53-zynqmp" + +MACHINE = "zcu102-zynqmp" +require conf/machine/${MACHINE}.conf + +# Use the same format for TMPDIR as in the other multiconfigs so its less confusing. +TMPDIR = "${TOPDIR}/tmp-${MACHINE}-${TCLIBC}" + +# Create dependencies for Linux only, other multiconfig applications, +# can be built separately, e.g. bitbake mc:pmumc:pmufw +# in this case, linux cannot, also worth mentioning that these should +# eventually be set on a recipe level and would probably be useful to +# create a chain of dependencies: pmufw<-fsbl<-Linux +do_image[mcdepends] += "multiconfig::fsblmc:zynqmp-fsbl:do_deploy" +do_image[mcdepends] += "multiconfig::pmumc:pmufw:do_deploy"
\ No newline at end of file diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/ultra96-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/ultra96-zynqmp.conf new file mode 100644 index 000000000..045e9422c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/ultra96-zynqmp.conf @@ -0,0 +1,35 @@ +#@TYPE: Machine +#@NAME: ultra96-zynqmp +#@DESCRIPTION: Machine support for Ultra96 Evaluation Board. +# + +require conf/machine/include/soc-zynqmp.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost usbgadget wifi bluetooth mipi" + +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" +SPL_BINARY ?= "spl/boot.bin" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + + +KERNEL_DEVICETREE = "xilinx/zynqmp-zcu100-revC.dtb" + +PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" +PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" + +EXTRA_IMAGEDEPENDS += " \ + u-boot-zynq-uenv \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + u-boot-zynq-scr \ + " +IMAGE_BOOT_FILES += " \ + uEnv.txt \ + atf-uboot.ub \ + boot.scr \ + " +MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += "linux-firmware-wl18xx" + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/v350-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/v350-versal.conf new file mode 100644 index 000000000..6741e2f32 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/v350-versal.conf @@ -0,0 +1,29 @@ +#@TYPE: Machine +#@NAME: v350-versal +##@DESCRIPTION: Machine support for v350 versal. + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + Image \ + boot.scr \ +" + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf new file mode 100644 index 000000000..4c174d2f5 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf @@ -0,0 +1,73 @@ +#@TYPE: Machine +#@NAME: vc-p-a2197-versal +##@DESCRIPTION: Machine support for vc-p-a2197 versal . + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc +require conf/machine/include/machine-xilinx-qemu.inc + +SOC_VARIANT = "-ai-core" + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +# Default SD image build onfiguration, use qemu-sd to pad +IMAGE_CLASSES += "image-types-xilinx-qemu" +IMAGE_FSTYPES += "wic.qemu-sd" +WKS_FILES ?= "sdimage-bootpart.wks" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ + qemu-devicetrees \ + virtual/cdo \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + system.dtb \ + Image \ + boot.scr \ +" +# This machine has a QEMU model, runqemu setup: +QB_MACHINE = "-M arm-generic-fdt" +QB_MEM = "-m 8G" +QB_DEFAULT_KERNEL = "none" +QB_NETWORK_DEVICE = "" +QB_KERNEL_CMDLINE_APPEND ?= "" +QB_NET = "none" + +QB_DEFAULT_FSTYPE_qemuboot-xilinx = "wic.qemu-sd" +QB_OPT_APPEND_append_qemuboot-xilinx = " -boot mode=5" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Use booti 80000 6000000 4000000 to launch +QB_OPT_APPEND ?= " -serial null -serial null -serial mon:stdio -display none" + +QB_OPT_APPEND_append_qemuboot-xilinx = " \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-ps-vc-p-a2197-00.dtb \ + -display none \ + -net nic -net user,tftp=${DEPLOY_DIR_IMAGE} \ + " +# PLM instance args +QB_PLM_OPT = " \ + -M microblaze-fdt \ + -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ + -device loader,addr=0xf0000000,data=0xba020004,data-len=4 \ + -device loader,addr=0xf0000004,data=0xb800fffc,data-len=4 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ + -device loader,addr=0xF1110624,data=0x0,data-len=4 \ + -device loader,addr=0xF1110620,data=0x1,data-len=4 \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-pmc-vc-p-a2197-00.dtb \ + -display none \ + " +QB_OPT_APPEND_append_qemuboot-xilinx = " -plm-args '${QB_PLM_OPT}'" + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/vck-sc-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck-sc-zynqmp.conf new file mode 100644 index 000000000..6a453a2cb --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck-sc-zynqmp.conf @@ -0,0 +1,32 @@ +#@TYPE: Machine +#@NAME: vck-sc-zynqmp +##@DESCRIPTION: Machine support for vck190 system controller. + + +require conf/machine/include/soc-zynqmp.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_zynqmp_virt_defconfig" +SPL_BINARY ?= "spl/boot.bin" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + +# PMU instance args +PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" +PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" + +EXTRA_IMAGEDEPENDS += " \ + u-boot-zynq-uenv \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + u-boot-zynq-scr \ +" +IMAGE_BOOT_FILES += " \ + uEnv.txt \ + atf-uboot.ub \ + boot.scr \ +" + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/vck190-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck190-versal.conf new file mode 100644 index 000000000..c9813b70c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck190-versal.conf @@ -0,0 +1,79 @@ +#@TYPE: Machine +#@NAME: vck-versal +##@DESCRIPTION: Machine support for vck-versal . + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc +require conf/machine/include/machine-xilinx-qemu.inc + +SOC_VARIANT = "-ai-core" + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +# Default SD image build onfiguration, use qemu-sd to pad +IMAGE_CLASSES += "image-types-xilinx-qemu" +IMAGE_FSTYPES += "wic.qemu-sd" +WKS_FILES ?= "sdimage-bootpart.wks" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ + qemu-devicetrees \ + virtual/cdo \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + Image \ + boot.scr \ +" +PLM_DEPLOY_DIR ?= "{TOPDIR}/versalmbtmp/deploy/images/versal-mb" +PLM_IMAGE_NAME ?= "plm-versal-mb" +PSM_FIRMWARE_DEPLOY_DIR ?= "{TOPDIR}/versalmbtmp/deploy/images/versal-mb" +PSM_FIRMWARE_IMAGE_NAME ?= "psm-firmware-versal-mb" + + +# This machine has a QEMU model, runqemu setup: +QB_MACHINE = "-M arm-generic-fdt" +QB_MEM = "-m 8G" +QB_DEFAULT_KERNEL = "none" +QB_NETWORK_DEVICE = "" +QB_KERNEL_CMDLINE_APPEND ?= "" +QB_NET = "none" + +QB_DEFAULT_FSTYPE_qemuboot-xilinx = "wic.qemu-sd" +QB_OPT_APPEND_append_qemuboot-xilinx = " -boot mode=5" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Use booti 80000 6000000 4000000 to launch +QB_OPT_APPEND ?= " -serial null -serial null -serial mon:stdio -display none" + +QB_OPT_APPEND_append_qemuboot-xilinx = " \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-ps-vc-p-a2197-00.dtb \ + -display none \ + -net nic -net user,tftp=${DEPLOY_DIR_IMAGE} \ + " + +# PLM instance args +QB_PLM_OPT = " \ + -M microblaze-fdt \ + -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ + -device loader,addr=0xf0000000,data=0xba020004,data-len=4 \ + -device loader,addr=0xf0000004,data=0xb800fffc,data-len=4 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ + -device loader,addr=0xF1110624,data=0x0,data-len=4 \ + -device loader,addr=0xF1110620,data=0x1,data-len=4 \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-pmc-vc-p-a2197-00.dtb \ + -display none \ + " +QB_OPT_APPEND_append_qemuboot-xilinx = " -plm-args '${QB_PLM_OPT}'" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/vck5000-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck5000-versal.conf new file mode 100644 index 000000000..97fb9cc78 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/vck5000-versal.conf @@ -0,0 +1,29 @@ +#@TYPE: Machine +#@NAME: vck500-versal +##@DESCRIPTION: Machine support for vck5000 versal. + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + Image \ + boot.scr \ +" + diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-generic.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-generic.conf new file mode 100644 index 000000000..9bf3593d4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-generic.conf @@ -0,0 +1,81 @@ +#@TYPE: Machine +#@NAME: Generic versal +#@DESCRIPTION: versal devices + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc +require conf/machine/include/machine-xilinx-qemu.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +# Default SD image build onfiguration, use qemu-sd to pad +IMAGE_CLASSES += "image-types-xilinx-qemu" +IMAGE_FSTYPES += "wic.qemu-sd" +WKS_FILES ?= "sdimage-bootpart.wks" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ + qemu-devicetrees \ + virtual/cdo \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + Image \ + boot.scr \ +" +PLM_DEPLOY_DIR ?= "{TOPDIR}/versalmbtmp/deploy/images/versal-mb" +PLM_IMAGE_NAME ?= "plm-versal-mb" +PSM_FIRMWARE_DEPLOY_DIR ?= "{TOPDIR}/versalmbtmp/deploy/images/versal-mb" +PSM_FIRMWARE_IMAGE_NAME ?= "psm-firmware-versal-mb" + +# We use the vc-p-a2197-00-versal DTB from the external-hdf. +HDF_MACHINE = "vc-p-a2197-00-versal" + +# This machine has a QEMU model, runqemu setup: +QB_MACHINE = "-M arm-generic-fdt" +QB_MEM = "-m 8G" +QB_DEFAULT_KERNEL = "none" +QB_NETWORK_DEVICE = "" +QB_KERNEL_CMDLINE_APPEND ?= "" +QB_NET = "none" + +QB_DEFAULT_FSTYPE_qemuboot-xilinx = "wic.qemu-sd" +QB_OPT_APPEND_append_qemuboot-xilinx = " -boot mode=5" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Use booti 80000 6000000 4000000 to launch +QB_OPT_APPEND ?= " -serial null -serial null -serial mon:stdio -display none" + +QB_OPT_APPEND_append_qemuboot-xilinx = " \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-ps-vc-p-a2197-00.dtb \ + -display none \ + -net nic -net user,tftp=${DEPLOY_DIR_IMAGE} \ + " + +# PLM instance args +QB_PLM_OPT = " \ + -M microblaze-fdt \ + -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ + -device loader,addr=0xf0000000,data=0xba020004,data-len=4 \ + -device loader,addr=0xf0000004,data=0xb800fffc,data-len=4 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ + -device loader,addr=0xF1110624,data=0x0,data-len=4 \ + -device loader,addr=0xF1110620,data=0x1,data-len=4 \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-pmc-vc-p-a2197-00.dtb \ + -display none \ + " +QB_OPT_APPEND_append_qemuboot-xilinx = " -plm-args '${QB_PLM_OPT}'" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-mb.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-mb.conf new file mode 100644 index 000000000..f40b8bca8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/versal-mb.conf @@ -0,0 +1,10 @@ +DEFAULTTUNE ?= "microblaze" + +require conf/machine/include/soc-versal.inc + +# Endianess, multiplier, barrel shift, pattern compare, floating point double or single, are the possibilities +AVAILTUNES += "microblaze" +TUNE_FEATURES_tune-microblaze = "microblaze v11.0 barrel-shift pattern-compare" +PACKAGE_EXTRA_ARCHS_tune-microblaze = "${TUNE_PKGARCH}" + +LINKER_HASH_STYLE_microblaze = "" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/vmk180-versal.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/vmk180-versal.conf new file mode 100644 index 000000000..baa5e12f0 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/vmk180-versal.conf @@ -0,0 +1,71 @@ +#@TYPE: Machine +#@NAME: vmk180-versal +##@DESCRIPTION: Machine support for vmk180-versal . + +require conf/machine/include/soc-versal.inc +require conf/machine/include/machine-xilinx-default.inc +require conf/machine/include/machine-xilinx-qemu.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyAMA0" + +IMAGE_CLASSES += "image-types-xilinx-qemu" +IMAGE_FSTYPES += "wic.qemu-sd" +WKS_FILES ?= "sdimage-bootpart.wks" + +EXTRA_IMAGEDEPENDS += " \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + virtual/psm-firmware \ + virtual/plm \ + u-boot-zynq-scr \ + qemu-devicetrees \ + virtual/cdo \ +" + +IMAGE_BOOT_FILES += " \ + boot.bin \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + Image \ + boot.scr \ +" + +# This machine has a QEMU model, runqemu setup: +QB_MACHINE = "-M arm-generic-fdt" +QB_MEM = "-m 8G" +QB_DEFAULT_KERNEL = "none" +QB_NETWORK_DEVICE = "" +QB_KERNEL_CMDLINE_APPEND ?= "" +QB_NET = "none" + +QB_DEFAULT_FSTYPE_qemuboot-xilinx = "wic.qemu-sd" +QB_OPT_APPEND_append_qemuboot-xilinx = " -boot mode=5" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Use booti 80000 6000000 4000000 to launch +QB_OPT_APPEND ?= " -serial null -serial null -serial mon:stdio -display none" + +QB_OPT_APPEND_append_qemuboot-xilinx = " \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-ps-vc-p-a2197-00.dtb \ + -display none \ + -net nic -net user,tftp=${DEPLOY_DIR_IMAGE} \ + " + +# PLM instance args +QB_PLM_OPT = " \ + -M microblaze-fdt \ + -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ + -device loader,addr=0xf0000000,data=0xba020004,data-len=4 \ + -device loader,addr=0xf0000004,data=0xb800fffc,data-len=4 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ + -device loader,addr=0xF1110624,data=0x0,data-len=4 \ + -device loader,addr=0xF1110620,data=0x1,data-len=4 \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/board-versal-pmc-vc-p-a2197-00.dtb \ + -display none \ + " +QB_OPT_APPEND_append_qemuboot-xilinx = " -plm-args '${QB_PLM_OPT}'" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf index 51dd2a9d5..3bdb215d0 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf @@ -5,24 +5,19 @@ SOC_VARIANT ?= "dr" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zc1254_revA_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE ?= "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" KERNEL_DEVICETREE = "xilinx/zynqmp-zc1254-revA.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -31,8 +26,10 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf index fbd58a6e8..edd3cb2d4 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf @@ -8,43 +8,51 @@ # http://www.xilinx.com/support/index.html/content/xilinx/en/supportNav/boards_and_kits/zynq-7000_soc_boards_and_kits/zynq-7000_soc_zc702_evaluation_kit.html # For the FSBL 'zynq_fsbl_0.elf' refer to UG873 and the associated design files. # -SOC_VARIANT ?= "7z" -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" # u-boot configuration -UBOOT_MACHINE = "zynq_zc702_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "zynq-zc702.dtb" IMAGE_BOOT_FILES += " \ boot.bin \ uEnv.txt \ + boot.scr \ " -# Although not fully supported you can run this machine on the mainline QEMU 'xilinx-zynq-a9' machine -IMAGE_CLASSES += "qemuboot" QB_MEM = "-m 1024" -QB_MACHINE = "-machine xilinx-zynq-a9" -QB_OPT_APPEND = "-nographic -serial null -serial mon:stdio" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" - -# Xilinx's fork of QEMU has much better results, so let's default to that -# Use qemu-xilinx instead of mainline -PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" - -IMAGE_CLASSES += "qemuboot-xilinx" +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=/tftpboot -net nic" +QB_DEFAULT_KERNEL_qemuboot-xilinx = "zImage" + +QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" +QB_DEFAULT_FSTYPE = "cpio.gz.u-boot" +QB_DTB = "system.dtb" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) +QB_OPT_APPEND = " \ + -nographic -serial null -serial mon:stdio \ + -initrd ${DEPLOY_DIR_IMAGE}/petalinux-image-minimal-zc702-zynq7.cpio.gz.u-boot \ + -gdb tcp::9000 \ + -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 \ + -device loader,addr=0xf8000140,data=0x00500801,data-len=4 \ + -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 \ + -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 \ + -device loader,addr=0xF8000910,data=0xF,data-len=0x4 \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf index 741ef5de6..10b5e29c9 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf @@ -9,43 +9,50 @@ # For the FSBL 'zynq_fsbl_0.elf' refer to UG873 and the associated design files. # -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost usbgadget" # u-boot configuration -UBOOT_MACHINE = "zynq_zc706_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "zynq-zc706.dtb" IMAGE_BOOT_FILES += " \ boot.bin \ uEnv.txt \ + boot.scr \ " -# Although not fully supported you can run this machine on the mainline QEMU 'xilinx-zynq-a9' machine -IMAGE_CLASSES += "qemuboot" QB_MEM = "-m 1024" -QB_MACHINE = "-machine xilinx-zynq-a9" -QB_OPT_APPEND = "-nographic -serial null -serial mon:stdio" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" - -# Xilinx's fork of QEMU has much better results, so let's default to that -# Use qemu-xilinx instead of mainline -PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" - -IMAGE_CLASSES += "qemuboot-xilinx" +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=/tftpboot -net nic" +QB_DEFAULT_KERNEL_qemuboot-xilinx = "zImage" + +QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" +QB_DEFAULT_FSTYPE = "cpio.gz.u-boot" +QB_DTB = "system.dtb" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) +QB_OPT_APPEND = " \ + -nographic -serial null -serial mon:stdio \ + -initrd ${DEPLOY_DIR_IMAGE}/petalinux-image-minimal-zc706-zynq7.cpio.gz.u-boot \ + -gdb tcp::9000 \ + -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 \ + -device loader,addr=0xf8000140,data=0x00500801,data-len=4 \ + -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 \ + -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 \ + -device loader,addr=0xF8000910,data=0xF,data-len=0x4 \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf index 281110d96..dee379785 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf @@ -2,16 +2,13 @@ #@NAME: zcu102-zynqmp #@DESCRIPTION: Machine support for ZCU102 Evaluation Board. -SOC_VARIANT ?= "eg" - -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zcu102_rev1_0_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" # Default SD image build onfiguration, use qemu-sd to pad @@ -19,46 +16,39 @@ IMAGE_CLASSES += "image-types-xilinx-qemu" IMAGE_FSTYPES += "wic.qemu-sd" WKS_FILES ?= "sdimage-bootpart.wks" -SERIAL_CONSOLE = "115200 ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "xilinx/zynqmp-zcu102-rev1.0.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ arm-trusted-firmware \ qemu-devicetrees \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + boot.scr \ " # This machine has a QEMU model, runqemu setup: -IMAGE_CLASSES += "qemuboot-xilinx" QB_MACHINE = "-machine xlnx-zcu102" QB_MEM = "-m 4096" QB_OPT_APPEND ?= "-nographic -serial mon:stdio -serial null" QB_NETWORK_DEVICE = "-net nic -net nic -net nic -net nic,netdev=net0,macaddr=@MAC@" -# Use qemu-xilinx instead of mainline -PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" - -# Use the multiarch script instead of launching QEMU directly -QB_SYSTEM_NAME_append = "-multiarch" - # Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) QB_OPT_APPEND_append_qemuboot-xilinx = " \ -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/zcu102-arm.dtb \ ${@qemu_zynqmp_unhalt(d, True)} \ -device loader,file=${DEPLOY_DIR_IMAGE}/arm-trusted-firmware.elf,cpu-num=0 \ -device loader,file=${DEPLOY_DIR_IMAGE}/u-boot.elf \ + -device loader,file=${DEPLOY_DIR_IMAGE}/system.dtb,addr=0x100000 \ " # Attach the rootfs disk image to the second SD interface of QEMU (which is SD0) @@ -68,8 +58,8 @@ QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" # PMU instance args PMU_ROM ?= "${DEPLOY_DIR_IMAGE}/pmu-rom.elf" -PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" -PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" +PMU_FIRMWARE_DEPLOY_DIR ?= "${@ '${TOPDIR}/pmutmp/deploy/images/microblaze-pmu' if d.getVar('BBMULTICONFIG') == 'pmu' else '${TOPDIR}/tmp/deploy/images/${MACHINE}'}" +PMU_FIRMWARE_IMAGE_NAME ?= "${@ 'pmu-firmware-microblaze-pmu' if d.getVar('BBMULTICONFIG') == 'pmu' else 'pmu-zcu102-zynqmp'}" QB_PMU_OPT = " \ -M microblaze-fdt \ diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf index c4b4a0329..17a677fe3 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf @@ -5,24 +5,19 @@ SOC_VARIANT ?= "ev" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zcu104_revC_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE ?= "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" KERNEL_DEVICETREE = "xilinx/zynqmp-zcu104-revC.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -31,10 +26,12 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " MACHINE_HWCODECS = "libomxil-xlnx" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf index 136efb903..27ab2a98f 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf @@ -4,23 +4,18 @@ SOC_VARIANT ?= "ev" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zcu106_revA_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE = "115200 ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "xilinx/zynqmp-zcu106-revA.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -29,11 +24,13 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " MACHINE_HWCODECS = "libomxil-xlnx" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf index 068e48903..24e96ad64 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf @@ -5,24 +5,19 @@ SOC_VARIANT ?= "dr" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zcu111_revA_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE ?= "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" KERNEL_DEVICETREE = "xilinx/zynqmp-zcu111-revA.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -31,8 +26,10 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1275-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf index 1e5cd0d7a..2ac4004fc 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zc1275-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf @@ -1,27 +1,22 @@ #@TYPE: Machine -#@NAME: zc1275-zynqmp -#@DESCRIPTION: Machine support for ZC1275 Evaluation Board. +#@NAME: zcu1275-zynqmp +#@DESCRIPTION: Machine support for ZCU1275 Evaluation Board. # SOC_VARIANT ?= "dr" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zc1275_revB_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE ?= "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" -KERNEL_DEVICETREE = "xilinx/zynqmp-zc1275-revB.dtb" - -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" +KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1275-revB.dtb" PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -31,8 +26,10 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf index 04508540d..d7d41d4d8 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf @@ -5,24 +5,19 @@ SOC_VARIANT ?= "dr" -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -UBOOT_MACHINE = "xilinx_zynqmp_zc1275_revB_defconfig" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -SERIAL_CONSOLE ?= "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" -SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}" KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1285-revA.dtb" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot-xlnx" - PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" @@ -31,8 +26,10 @@ EXTRA_IMAGEDEPENDS += " \ arm-trusted-firmware \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ uEnv.txt \ atf-uboot.ub \ + boot.scr \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf new file mode 100644 index 000000000..c69b5f35b --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf @@ -0,0 +1,33 @@ +#@TYPE: Machine +#@NAME: zcu208-zynqmp +#@DESCRIPTION: Machine support for ZCU208 Evaluation Board. +# + +SOC_VARIANT ?= "dr" + +require conf/machine/include/soc-zynqmp.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" +SPL_BINARY ?= "spl/boot.bin" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + + +PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" +PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" + +EXTRA_IMAGEDEPENDS += " \ + u-boot-zynq-uenv \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + u-boot-zynq-scr \ + " +IMAGE_BOOT_FILES += " \ + uEnv.txt \ + atf-uboot.ub \ + boot.scr \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf new file mode 100644 index 000000000..4f07e0ea8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf @@ -0,0 +1,33 @@ +#@TYPE: Machine +#@NAME: zcu216-zynqmp +#@DESCRIPTION: Machine support for ZCU216 Evaluation Board. +# + +SOC_VARIANT ?= "dr" + +require conf/machine/include/soc-zynqmp.inc +require conf/machine/include/machine-xilinx-default.inc + +MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" + +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" +SPL_BINARY ?= "spl/boot.bin" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + + +PMU_FIRMWARE_IMAGE_NAME ?= "pmu-firmware-zynqmp-pmu" +PMU_FIRMWARE_DEPLOY_DIR ?= "${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu" + +EXTRA_IMAGEDEPENDS += " \ + u-boot-zynq-uenv \ + arm-trusted-firmware \ + virtual/boot-bin \ + virtual/bootloader \ + u-boot-zynq-scr \ + " +IMAGE_BOOT_FILES += " \ + uEnv.txt \ + atf-uboot.ub \ + boot.scr \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf index 0b0a0de28..d731b6bb3 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf @@ -8,29 +8,27 @@ # http://www.zedboard.org/reference-designs-categories/zynq-concepts-tools-and-techniques-zedboard # -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc # u-boot configuration -UBOOT_MACHINE = "zynq_zed_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -UBOOT_ELF_zynq = "u-boot" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "zynq-zed.dtb" IMAGE_BOOT_FILES += " \ boot.bin \ uEnv.txt \ + boot.scr \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf index 87634fcc2..898954e9e 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf @@ -5,30 +5,27 @@ # generated base on ZYBO linux-bd project # -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc -PREFERRED_PROVIDER_virtual/kernel ?= "linux-xlnx" PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot" MACHINE_FEATURES = "ext2 vfat usbhost usbgadget keyboard screen alsa sdio" -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" -UBOOT_MACHINE = "zynq_zybo_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" FORCE_PLATFORM_INIT = "1" -UBOOT_ELF_zynq = "u-boot" +UBOOT_ELF = "u-boot" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bitstream \ virtual/bootloader \ + u-boot-zynq-scr \ " IMAGE_BOOT_FILES += " \ @@ -38,6 +35,6 @@ IMAGE_BOOT_FILES += " \ " KERNEL_FEATURES += " \ - bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc \ - features/v4l2/v4l2-xilinx.scc \ + bsp/xilinx/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc \ + features/xilinx/v4l2/v4l2.scc \ " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf index 732fa9435..d7af056a3 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf @@ -6,27 +6,25 @@ # https://www.digilentinc.com/Products/Detail.cfm?Prod=ZYBO # -SOC_VARIANT ?= "7z" - -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc MACHINE_FEATURES = "ext2 vfat usbhost usbgadget" # u-boot configuration PREFERRED_PROVIDER_virtual/bootloader = "u-boot" -UBOOT_MACHINE = "zynq_zybo_config" +UBOOT_MACHINE = "xilinx_zynq_virt_defconfig" SPL_BINARY ?= "spl/boot.bin" -UBOOT_ELF_zynq = "u-boot" +UBOOT_ELF = "u-boot" EXTRA_IMAGEDEPENDS += " \ u-boot-zynq-uenv \ virtual/boot-bin \ virtual/bootloader \ + u-boot-zynq-scr \ " -SERIAL_CONSOLE = "115200 ttyPS0" +SERIAL_CONSOLES ?= "115200;ttyPS0" KERNEL_DEVICETREE = "zynq-zybo.dtb" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zynq-generic.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zynq-generic.conf index 12fd13881..0f38e32b0 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zynq-generic.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zynq-generic.conf @@ -1,11 +1,40 @@ #@TYPE: Machine -#@NAME: -#@DESCRIPTION: zynq devices +#@NAME: Generic Zynq +#@DESCRIPTION: Generic Zynq Device -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-overrides.inc +require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc +require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost usbgadget" EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" + +UBOOT_MACHINE ?= "xilinx_zynq_virt_defconfig" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + +MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" + +HDF_MACHINE = "zc702-zynq7" + +QB_MEM = "-m 1024" +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=/tftpboot -net nic" +QB_DEFAULT_KERNEL_qemuboot-xilinx = "zImage" + +QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" +QB_DEFAULT_FSTYPE = "cpio.gz.u-boot" +QB_DTB = "system.dtb" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) +QB_OPT_APPEND = " \ + -nographic -serial null -serial mon:stdio \ + -initrd ${DEPLOY_DIR_IMAGE}/petalinux-image-minimal-zynq-generic.cpio.gz.u-boot \ + -gdb tcp::9000 \ + -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 \ + -device loader,addr=0xf8000140,data=0x00500801,data-len=4 \ + -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 \ + -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 \ + -device loader,addr=0xF8000910,data=0xF,data-len=0x4 \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/conf/machine/zynqmp-generic.conf b/meta-xilinx/meta-xilinx-bsp/conf/machine/zynqmp-generic.conf index 98385d251..7aa01986e 100644 --- a/meta-xilinx/meta-xilinx-bsp/conf/machine/zynqmp-generic.conf +++ b/meta-xilinx/meta-xilinx-bsp/conf/machine/zynqmp-generic.conf @@ -1,15 +1,82 @@ #@TYPE: Machine -#@NAME: +#@NAME: Generic zynqmp #@DESCRIPTION: zynqmp devices -require conf/machine/include/tune-zynqmp.inc -require conf/machine/include/machine-xilinx-overrides.inc +# CG is the lowest common demoninator, so use this by default +SOC_VARIANT ?= "cg" + +require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc MACHINE_FEATURES = "rtc ext2 ext3 vfat usbhost" -PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" - EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" +UBOOT_MACHINE = "xilinx_zynqmp_virt_defconfig" +SPL_BINARY ?= "spl/boot.bin" + +# Default SD image build onfiguration, use qemu-sd to pad +IMAGE_CLASSES += "image-types-xilinx-qemu" +IMAGE_FSTYPES += "wic.qemu-sd" +WKS_FILES ?= "sdimage-bootpart.wks" + +SERIAL_CONSOLES ?= "115200;ttyPS0" + +# We need a generic one that works with QEMU... +HDF_MACHINE = "zcu102-zynqmp" +KERNEL_DEVICETREE = "xilinx/zynqmp-zcu102-rev1.0.dtb" + +EXTRA_IMAGEDEPENDS += " \ + u-boot-zynq-uenv \ + arm-trusted-firmware \ + qemu-devicetrees \ + virtual/boot-bin \ + virtual/bootloader \ + u-boot-zynq-scr \ + " + +IMAGE_BOOT_FILES += " \ + uEnv.txt \ + atf-uboot.ub \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + boot.scr \ + " + +# This machine has a QEMU model, runqemu setup: +QB_MACHINE = "-machine xlnx-zcu102" +QB_MEM = "-m 4096" +QB_OPT_APPEND ?= "-nographic -serial mon:stdio -serial null" +QB_NETWORK_DEVICE = "-net nic -net nic -net nic -net nic,netdev=net0,macaddr=@MAC@" + +# Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) +QB_OPT_APPEND_append_qemuboot-xilinx = " \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/zcu102-arm.dtb \ + ${@qemu_zynqmp_unhalt(d, True)} \ + -device loader,file=${DEPLOY_DIR_IMAGE}/arm-trusted-firmware.elf,cpu-num=0 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/u-boot.elf \ + -device loader,file=${DEPLOY_DIR_IMAGE}/system.dtb,addr=0x100000 \ + " + +# Attach the rootfs disk image to the second SD interface of QEMU (which is SD0) +QB_DEFAULT_FSTYPE_qemuboot-xilinx = "wic.qemu-sd" +QB_OPT_APPEND_append_qemuboot-xilinx = " -boot mode=5" +QB_ROOTFS_OPT_qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" + +# PMU instance args +PMU_ROM ?= "${DEPLOY_DIR_IMAGE}/pmu-rom.elf" +PMU_FIRMWARE_DEPLOY_DIR ?= "${@ '${TOPDIR}/pmutmp/deploy/images/zynqmp-pmu' if d.getVar('BMULTICONFIG') == 'pmu' else '${TOPDIR}/tmp/deploy/images/${MACHINE}'}" +PMU_FIRMWARE_IMAGE_NAME ?= "${@ 'pmu-firmware-zynqmp-pmu' if d.getVar('BBMULTICONFIG') == 'pmu' else 'pmu-${MACHINE}'}" + +QB_PMU_OPT = " \ + -M microblaze-fdt \ + -display none \ + -hw-dtb ${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch/zynqmp-pmu.dtb \ + -kernel ${PMU_ROM} \ + -device loader,file=${PMU_FIRMWARE_DEPLOY_DIR}/${PMU_FIRMWARE_IMAGE_NAME}.elf \ + -device loader,addr=0xfd1a0074,data=0x1011003,data-len=4 \ + -device loader,addr=0xfd1a007C,data=0x1010f03,data-len=4 \ + " +QB_OPT_APPEND_append_qemuboot-xilinx = " -pmu-args '${QB_PMU_OPT}'" + +do_write_qemuboot_conf[depends] += "u-boot-zynq-uenv:do_deploy" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/fsblmc.conf b/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/fsblmc.conf new file mode 100644 index 000000000..87bb56a8c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/fsblmc.conf @@ -0,0 +1,8 @@ +MACHINE = "cortexa53-zynqmp" +DISTRO = "xilinx-standalone" +TMPDIR = "${TOPDIR}/tmp-${MACHINE}-${TCLIBC}" + +# These should be temporary until the dtg repo has the correct design +HDF_BASE ?= "file://" +HDF_PATH ?= "${TOPDIR}/system.dsa" +HDF_EXT ?= "dsa" diff --git a/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/pmumc.conf b/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/pmumc.conf new file mode 100644 index 000000000..756ea94aa --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/conf/multiconfig/pmumc.conf @@ -0,0 +1,8 @@ +MACHINE = "microblaze-pmu" +DISTRO = "xilinx-standalone" +TMPDIR = "${TOPDIR}/tmp-${MACHINE}-${TCLIBC}" + +# These should be temporary until the dtg repo has the correct design +HDF_BASE ?= "file://" +HDF_PATH ?= "${TOPDIR}/system.dsa" +HDF_EXT ?= "dsa" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc index 785f915ea..b086f8ca2 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc @@ -1,7 +1,7 @@ DESCRIPTION = "ARM Trusted Firmware" LICENSE = "BSD" -LIC_FILES_CHKSUM = "file://license.rst;md5=e927e02bca647e14efd87e9e914b2443" +LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" PROVIDES = "virtual/arm-trusted-firmware" @@ -12,8 +12,10 @@ DEPENDS += "u-boot-mkimage-native" S = "${WORKDIR}/git" B = "${WORKDIR}/build" +SYSROOT_DIRS += "/boot" + XILINX_RELEASE_VERSION ?= "" -ATF_VERSION ?= "2.0" +ATF_VERSION ?= "2.2" ATF_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}" PV = "${ATF_VERSION}${ATF_VERSION_EXTENSION}+git${SRCPV}" @@ -22,8 +24,7 @@ REPO ?= "git://github.com/Xilinx/arm-trusted-firmware.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -ATF_BASE_NAME ?= "${PN}-${PKGE}-${PKGV}-${PKGR}-${DATETIME}" -ATF_BASE_NAME[vardepsexclude] = "DATETIME" +ATF_BASE_NAME ?= "${PN}-${PKGE}-${PKGV}-${PKGR}${IMAGE_VERSION_SUFFIX}" COMPATIBLE_MACHINE ?= "^$" COMPATIBLE_MACHINE_zynqmp = ".*" @@ -45,14 +46,14 @@ ATF_CONSOLE ?= "" ATF_CONSOLE_zynqmp = "cadence" ATF_CONSOLE_versal ?= "pl011" -DEBUG ?= "" -DEBUG_versal ?= "1" +DEBUG_ATF ?= "" +DEBUG_ATF_versal ?= "1" EXTRA_OEMAKE_zynqmp_append = "${@' ZYNQMP_CONSOLE=${ATF_CONSOLE}' if d.getVar('ATF_CONSOLE', True) != '' else ''}" EXTRA_OEMAKE_append_versal = "${@' VERSAL_CONSOLE=${ATF_CONSOLE}' if d.getVar('ATF_CONSOLE', True) != '' else ''}" -EXTRA_OEMAKE_append = " ${@bb.utils.contains('DEBUG', '1', ' DEBUG=${DEBUG}', '', d)}" +EXTRA_OEMAKE_append = " ${@bb.utils.contains('DEBUG_ATF', '1', ' DEBUG=${DEBUG_ATF}', '', d)}" -OUTPUT_DIR = "${@bb.utils.contains('DEBUG', '1', '${B}/${PLATFORM}/debug', '${B}/${PLATFORM}/release', d)}" +OUTPUT_DIR = "${@bb.utils.contains('DEBUG_ATF', '1', '${B}/${PLATFORM}/debug', '${B}/${PLATFORM}/release', d)}" ATF_MEM_BASE ?= "" ATF_MEM_SIZE ?= "" @@ -62,6 +63,7 @@ EXTRA_OEMAKE_zynqmp_append = "${@' ZYNQMP_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.get EXTRA_OEMAKE_append_versal = "${@' VERSAL_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" EXTRA_OEMAKE_append_versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" +EXTRA_OEMAKE_append_vc-p-a2197-00-versal =" VERSAL_PLATFORM=silicon" do_configure() { oe_runmake clean -C ${S} BUILD_BASE=${B} PLAT=${PLATFORM} @@ -72,7 +74,8 @@ do_compile() { } do_install() { - : + install -d ${D}/boot + install -Dm 0644 ${OUTPUT_DIR}/bl31/bl31.elf ${D}/boot/${PN}-${SRCPV}.elf } do_deploy() { @@ -91,3 +94,4 @@ do_deploy() { ln -sf ${ATF_BASE_NAME}.ub ${DEPLOYDIR}/atf-uboot.ub } addtask deploy before do_build after do_compile +FILES_${PN} += "/boot/${PN}-${SRCPV}.elf" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2019.1.bb deleted file mode 100644 index 64cbddc4e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2019.1.bb +++ /dev/null @@ -1,7 +0,0 @@ -ATF_VERSION = "2.0" -XILINX_RELEASE_VERSION = "v2019.1" -BRANCH ?= "master" -SRCREV ?= "80d1c79007fda42d4cc0be31b185a1da5799cd4d" - -include arm-trusted-firmware.inc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2020.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2020.1.bb new file mode 100644 index 000000000..1d94c5183 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2020.1.bb @@ -0,0 +1,6 @@ +ATF_VERSION = "2.0" +BRANCH ?= "xlnx_rebase_v2.2" +SRCREV ?= "5918e656ef29dbdf234a6324ec85bc8a68eca113" + +include arm-trusted-firmware.inc + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/bootgen/bootgen_1.0.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/bootgen/bootgen_1.0.bb new file mode 100644 index 000000000..4904a8e0f --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/bootgen/bootgen_1.0.bb @@ -0,0 +1,31 @@ +SUMMARY = "Building and installing bootgen" +DESCRIPTION = "Building and installing bootgen, a Xilinx tool that lets you stitch binary files together and generate device boot images" + +LICENSE = "Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=be5410bcde8eb6481a6e5d3b22e0740b" + +S = "${WORKDIR}/git" + +DEPENDS += "openssl" +RDEPENDS_${PN} += "openssl" + +REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https" +BRANCH ?= "master" +SRCREV ?= "bb38995468d8c830cbbfc5062e903961444c0a3c" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +EXTRA_OEMAKE += 'CROSS_COMPILER="${CXX}" -C ${S}' +CXXFLAGS_append = " -std=c++0x" + +TARGET_CC_ARCH += "${LDFLAGS}" + +do_install() { + install -d ${D}${bindir} + install -Dm 0755 ${S}/bootgen ${D}${bindir} +} + +FILES_${PN} = "${bindir}/bootgen" + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bb index 81965c13c..0ecb3aa3c 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bb @@ -11,6 +11,8 @@ LIC_FILES_CHKSUM = " \ inherit devicetree +DEPENDS += "python3-dtc-native" + PROVIDES = "virtual/dtb" # common zynq include diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2020.1.bb index 6a2ca7cc4..6a2ca7cc4 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2019.1.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/reference-design/kc705-bitstream_2020.1.bb diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-spl-zynq-init.inc b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-spl-zynq-init.inc index cf8b9b7ca..97c449bd3 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-spl-zynq-init.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-spl-zynq-init.inc @@ -64,9 +64,7 @@ python () { d.setVar("SPL_BINARY", "") if providesbin and d.getVar("SOC_FAMILY") in ["zynqmp"]: - # determine the path relative to the source tree - relpath = os.path.relpath(d.expand("${PMU_FIRMWARE_DEPLOY_DIR}/${PMU_FIRMWARE_IMAGE_NAME}.bin"), d.getVar("S")) # setup PMU Firmware path via MAKEFLAGS - d.appendVar("EXTRA_OEMAKE", " CONFIG_PMUFW_INIT_FILE=\"{0}\"".format(relpath)) + d.appendVar("EXTRA_OEMAKE", " CONFIG_PMUFW_INIT_FILE=\"{0}\"".format("${PMU_FIRMWARE_DEPLOY_DIR}/${PMU_FIRMWARE_IMAGE_NAME}.bin")) } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx.inc b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx.inc index 737f5f91b..4b8c4efee 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx.inc @@ -13,8 +13,8 @@ UBRANCHARG = "${@['nobranch=1', 'branch=${UBRANCH}'][d.getVar('UBRANCH', True) ! SRC_URI = "${UBOOTURI};${UBRANCHARG}" S = "${WORKDIR}/git" +B = "${WORKDIR}/build" FILESEXTRAPATHS_prepend := "${THISDIR}/u-boot:" -FILESEXTRAPATHS_prepend := "${THISDIR}/u-boot-xlnx:" -FILESEXTRAPATHS_prepend := "${@'${THISDIR}/u-boot-xlnx/${XILINX_RELEASE_VERSION}:' if d.getVar('XILINX_RELEASE_VERSION') else ''}" +SYSROOT_DIRS += "/boot" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2019.1/microblaze-kc705-Convert-microblaze-generic-to-k.patch b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2019.1/microblaze-kc705-Convert-microblaze-generic-to-k.patch deleted file mode 100644 index 7e25f87cc..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx/v2019.1/microblaze-kc705-Convert-microblaze-generic-to-k.patch +++ /dev/null @@ -1,1133 +0,0 @@ -From afe880f500cff7a9486379c5ad7a4f3379015a62 Mon Sep 17 00:00:00 2001 -From: Jaewon Lee <jaewon.lee@xilinx.com> -Date: Mon, 14 Jan 2019 11:30:56 -0800 -Subject: [PATCH] kc705-microblazeel: Convert microblaze-generic to - kc705-microblazeel - -This is an update to earlier kc705-trd patch done by Nathan Rossi. - -Change the microblaze-generic board to match the kc705-microblazeel. -This patch is not intended for upstream and serves as an intermediate -solution until OF support in upstream u-boot allows for easy support for -custom microblaze boards. - -Signed-off-by: Jaewon Lee <jaewon.lee@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Not-Upstreamable [meta-xilinx/kc705 specific] ---- - arch/microblaze/dts/microblaze-generic.dts | 590 ++++++++++++++++++++++++++++- - board/xilinx/microblaze-generic/config.mk | 28 +- - configs/microblaze-generic_defconfig | 75 ++-- - include/configs/microblaze-generic.h | 348 ++++++++--------- - 4 files changed, 782 insertions(+), 259 deletions(-) - -diff --git a/arch/microblaze/dts/microblaze-generic.dts b/arch/microblaze/dts/microblaze-generic.dts -index 08a1396..f8e616b 100644 ---- a/arch/microblaze/dts/microblaze-generic.dts -+++ b/arch/microblaze/dts/microblaze-generic.dts -@@ -1,9 +1,587 @@ - /dts-v1/; -+ - / { -- #address-cells = <1>; -- #size-cells = <1>; -- aliases { -- } ; -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ compatible = "xlnx,microblaze"; -+ model = "Xilinx MicroBlaze"; -+ hard-reset-gpios = <0x1 0x0 0x1>; -+ -+ cpus { -+ #address-cells = <0x1>; -+ #cpus = <0x1>; -+ #size-cells = <0x0>; -+ -+ cpu@0 { -+ bus-handle = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clocks = <0x3>; -+ compatible = "xlnx,microblaze-10.0"; -+ d-cache-baseaddr = <0x80000000>; -+ d-cache-highaddr = <0xbfffffff>; -+ d-cache-line-size = <0x20>; -+ d-cache-size = <0x4000>; -+ device_type = "cpu"; -+ i-cache-baseaddr = <0x80000000>; -+ i-cache-highaddr = <0xbfffffff>; -+ i-cache-line-size = <0x10>; -+ i-cache-size = <0x4000>; -+ interrupt-handle = <0x4>; -+ model = "microblaze,10.0"; -+ timebase-frequency = <0xbebc200>; -+ xlnx,addr-size = <0x20>; -+ xlnx,addr-tag-bits = <0x10>; -+ xlnx,allow-dcache-wr = <0x1>; -+ xlnx,allow-icache-wr = <0x1>; -+ xlnx,area-optimized = <0x0>; -+ xlnx,async-interrupt = <0x1>; -+ xlnx,async-wakeup = <0x3>; -+ xlnx,avoid-primitives = <0x0>; -+ xlnx,base-vectors = <0x0>; -+ xlnx,branch-target-cache-size = <0x0>; -+ xlnx,cache-byte-size = <0x4000>; -+ xlnx,d-axi = <0x1>; -+ xlnx,d-lmb = <0x1>; -+ xlnx,d-lmb-mon = <0x0>; -+ xlnx,daddr-size = <0x20>; -+ xlnx,data-size = <0x20>; -+ xlnx,dc-axi-mon = <0x0>; -+ xlnx,dcache-addr-tag = <0x10>; -+ xlnx,dcache-always-used = <0x1>; -+ xlnx,dcache-byte-size = <0x4000>; -+ xlnx,dcache-data-width = <0x0>; -+ xlnx,dcache-force-tag-lutram = <0x0>; -+ xlnx,dcache-line-len = <0x8>; -+ xlnx,dcache-use-writeback = <0x0>; -+ xlnx,dcache-victims = <0x0>; -+ xlnx,debug-counter-width = <0x20>; -+ xlnx,debug-enabled = <0x1>; -+ xlnx,debug-event-counters = <0x5>; -+ xlnx,debug-external-trace = <0x0>; -+ xlnx,debug-interface = <0x0>; -+ xlnx,debug-latency-counters = <0x1>; -+ xlnx,debug-profile-size = <0x0>; -+ xlnx,debug-trace-async-reset = <0x0>; -+ xlnx,debug-trace-size = <0x2000>; -+ xlnx,div-zero-exception = <0x1>; -+ xlnx,dp-axi-mon = <0x0>; -+ xlnx,dynamic-bus-sizing = <0x0>; -+ xlnx,ecc-use-ce-exception = <0x0>; -+ xlnx,edge-is-positive = <0x1>; -+ xlnx,enable-discrete-ports = <0x0>; -+ xlnx,endianness = <0x1>; -+ xlnx,fault-tolerant = <0x0>; -+ xlnx,fpu-exception = <0x0>; -+ xlnx,freq = <0xbebc200>; -+ xlnx,fsl-exception = <0x0>; -+ xlnx,fsl-links = <0x0>; -+ xlnx,i-axi = <0x0>; -+ xlnx,i-lmb = <0x1>; -+ xlnx,i-lmb-mon = <0x0>; -+ xlnx,iaddr-size = <0x20>; -+ xlnx,ic-axi-mon = <0x0>; -+ xlnx,icache-always-used = <0x1>; -+ xlnx,icache-data-width = <0x0>; -+ xlnx,icache-force-tag-lutram = <0x0>; -+ xlnx,icache-line-len = <0x4>; -+ xlnx,icache-streams = <0x1>; -+ xlnx,icache-victims = <0x8>; -+ xlnx,ill-opcode-exception = <0x1>; -+ xlnx,imprecise-exceptions = <0x0>; -+ xlnx,instr-size = <0x20>; -+ xlnx,interconnect = <0x2>; -+ xlnx,interrupt-is-edge = <0x0>; -+ xlnx,interrupt-mon = <0x0>; -+ xlnx,ip-axi-mon = <0x0>; -+ xlnx,lockstep-master = <0x0>; -+ xlnx,lockstep-select = <0x0>; -+ xlnx,lockstep-slave = <0x0>; -+ xlnx,mmu-dtlb-size = <0x4>; -+ xlnx,mmu-itlb-size = <0x2>; -+ xlnx,mmu-privileged-instr = <0x0>; -+ xlnx,mmu-tlb-access = <0x3>; -+ xlnx,mmu-zones = <0x2>; -+ xlnx,num-sync-ff-clk = <0x2>; -+ xlnx,num-sync-ff-clk-debug = <0x2>; -+ xlnx,num-sync-ff-clk-irq = <0x1>; -+ xlnx,num-sync-ff-dbg-clk = <0x1>; -+ xlnx,num-sync-ff-dbg-trace-clk = <0x2>; -+ xlnx,number-of-pc-brk = <0x1>; -+ xlnx,number-of-rd-addr-brk = <0x0>; -+ xlnx,number-of-wr-addr-brk = <0x0>; -+ xlnx,opcode-0x0-illegal = <0x1>; -+ xlnx,optimization = <0x0>; -+ xlnx,pc-width = <0x20>; -+ xlnx,piaddr-size = <0x20>; -+ xlnx,pvr = <0x2>; -+ xlnx,pvr-user1 = <0x0>; -+ xlnx,pvr-user2 = <0x0>; -+ xlnx,reset-msr = <0x0>; -+ xlnx,reset-msr-bip = <0x0>; -+ xlnx,reset-msr-dce = <0x0>; -+ xlnx,reset-msr-ee = <0x0>; -+ xlnx,reset-msr-eip = <0x0>; -+ xlnx,reset-msr-ice = <0x0>; -+ xlnx,reset-msr-ie = <0x0>; -+ xlnx,sco = <0x0>; -+ xlnx,trace = <0x0>; -+ xlnx,unaligned-exceptions = <0x1>; -+ xlnx,use-barrel = <0x1>; -+ xlnx,use-branch-target-cache = <0x0>; -+ xlnx,use-config-reset = <0x0>; -+ xlnx,use-dcache = <0x1>; -+ xlnx,use-div = <0x1>; -+ xlnx,use-ext-brk = <0x0>; -+ xlnx,use-ext-nm-brk = <0x0>; -+ xlnx,use-extended-fsl-instr = <0x0>; -+ xlnx,use-fpu = <0x0>; -+ xlnx,use-hw-mul = <0x2>; -+ xlnx,use-icache = <0x1>; -+ xlnx,use-interrupt = <0x2>; -+ xlnx,use-mmu = <0x3>; -+ xlnx,use-msr-instr = <0x1>; -+ xlnx,use-non-secure = <0x0>; -+ xlnx,use-pcmp-instr = <0x1>; -+ xlnx,use-reorder-instr = <0x1>; -+ xlnx,use-stack-protection = <0x0>; -+ }; -+ }; -+ -+ clocks { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ -+ clk_cpu@0 { -+ #clock-cells = <0x0>; -+ clock-frequency = <0xbebc200>; -+ clock-output-names = "clk_cpu"; -+ compatible = "fixed-clock"; -+ reg = <0x0>; -+ linux,phandle = <0x3>; -+ phandle = <0x3>; -+ }; -+ -+ clk_bus_0@1 { -+ #clock-cells = <0x0>; -+ clock-frequency = <0xbebc200>; -+ clock-output-names = "clk_bus_0"; -+ compatible = "fixed-clock"; -+ reg = <0x1>; -+ linux,phandle = <0x8>; -+ phandle = <0x8>; -+ }; -+ }; -+ -+ amba_pl { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ compatible = "simple-bus"; -+ ranges; -+ linux,phandle = <0x2>; -+ phandle = <0x2>; -+ -+ ethernet@40c00000 { -+ axistream-connected = <0x5>; -+ axistream-control-connected = <0x5>; -+ clock-frequency = <0x5f5e100>; -+ compatible = "xlnx,axi-ethernet-1.00.a"; -+ device_type = "network"; -+ interrupt-names = "interrupt"; -+ interrupt-parent = <0x4>; -+ interrupts = <0x4 0x2>; -+ phy-mode = "gmii"; -+ reg = <0x40c00000 0x40000>; -+ xlnx = <0x0>; -+ xlnx,axiliteclkrate = <0x0>; -+ xlnx,axisclkrate = <0x0>; -+ xlnx,clockselection = <0x0>; -+ xlnx,enableasyncsgmii = <0x0>; -+ xlnx,gt-type = <0x0>; -+ xlnx,gtinex = <0x0>; -+ xlnx,gtlocation = <0x0>; -+ xlnx,gtrefclksrc = <0x0>; -+ xlnx,include-dre; -+ xlnx,instantiatebitslice0 = <0x0>; -+ xlnx,phy-type = <0x1>; -+ xlnx,phyaddr = <0x1>; -+ xlnx,rable = <0x0>; -+ xlnx,rxcsum = <0x0>; -+ xlnx,rxlane0-placement = <0x0>; -+ xlnx,rxlane1-placement = <0x0>; -+ xlnx,rxmem = <0x1000>; -+ xlnx,rxnibblebitslice0used = <0x0>; -+ xlnx,tx-in-upper-nibble = <0x1>; -+ xlnx,txcsum = <0x0>; -+ xlnx,txlane0-placement = <0x0>; -+ xlnx,txlane1-placement = <0x0>; -+ phy-handle = <0x6>; -+ local-mac-address = [00 0a 35 00 22 01]; -+ linux,phandle = <0x7>; -+ phandle = <0x7>; -+ -+ mdio { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ -+ phy@7 { -+ device_type = "ethernet-phy"; -+ reg = <0x7>; -+ linux,phandle = <0x6>; -+ phandle = <0x6>; -+ }; -+ }; -+ }; -+ -+ dma@41e00000 { -+ #dma-cells = <0x1>; -+ axistream-connected = <0x7>; -+ axistream-control-connected = <0x7>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_lite_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,eth-dma"; -+ interrupt-names = "mm2s_introut", "s2mm_introut"; -+ interrupt-parent = <0x4>; -+ interrupts = <0x3 0x2 0x2 0x2>; -+ reg = <0x41e00000 0x10000>; -+ xlnx,include-dre; -+ linux,phandle = <0x5>; -+ phandle = <0x5>; -+ }; -+ -+ timer@41c00000 { -+ clock-frequency = <0xbebc200>; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-timer-1.00.a"; -+ interrupt-names = "interrupt"; -+ interrupt-parent = <0x4>; -+ interrupts = <0x5 0x2>; -+ reg = <0x41c00000 0x10000>; -+ xlnx,count-width = <0x20>; -+ xlnx,gen0-assert = <0x1>; -+ xlnx,gen1-assert = <0x1>; -+ xlnx,one-timer-only = <0x0>; -+ xlnx,trig0-assert = <0x1>; -+ xlnx,trig1-assert = <0x1>; -+ }; -+ -+ gpio@40010000 { -+ #gpio-cells = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-gpio-1.00.a"; -+ gpio-controller; -+ reg = <0x40010000 0x10000>; -+ xlnx,all-inputs = <0x1>; -+ xlnx,all-inputs-2 = <0x0>; -+ xlnx,all-outputs = <0x0>; -+ xlnx,all-outputs-2 = <0x0>; -+ xlnx,dout-default = <0x0>; -+ xlnx,dout-default-2 = <0x0>; -+ xlnx,gpio-width = <0x1>; -+ xlnx,gpio2-width = <0x20>; -+ xlnx,interrupt-present = <0x0>; -+ xlnx,is-dual = <0x0>; -+ xlnx,tri-default = <0xffffffff>; -+ xlnx,tri-default-2 = <0xffffffff>; -+ }; -+ -+ gpio@40020000 { -+ #gpio-cells = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-gpio-1.00.a"; -+ gpio-controller; -+ reg = <0x40020000 0x10000>; -+ xlnx,all-inputs = <0x1>; -+ xlnx,all-inputs-2 = <0x0>; -+ xlnx,all-outputs = <0x0>; -+ xlnx,all-outputs-2 = <0x0>; -+ xlnx,dout-default = <0x0>; -+ xlnx,dout-default-2 = <0x0>; -+ xlnx,gpio-width = <0x4>; -+ xlnx,gpio2-width = <0x20>; -+ xlnx,interrupt-present = <0x0>; -+ xlnx,is-dual = <0x0>; -+ xlnx,tri-default = <0xffffffff>; -+ xlnx,tri-default-2 = <0xffffffff>; -+ }; -+ -+ i2c@40800000 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ clock-frequency = <0xbebc200>; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-iic-2.00.a"; -+ interrupt-names = "iic2intc_irpt"; -+ interrupt-parent = <0x4>; -+ interrupts = <0x1 0x2>; -+ reg = <0x40800000 0x10000>; -+ -+ i2cswitch@74 { -+ compatible = "nxp,pca9548"; -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ reg = <0x74>; -+ -+ i2c@0 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ reg = <0x0>; -+ -+ clock-generator@5d { -+ #clock-cells = <0x0>; -+ compatible = "silabs,si570"; -+ temperature-stability = <0x32>; -+ reg = <0x5d>; -+ factory-fout = <0x9502f90>; -+ clock-frequency = <0x8d9ee20>; -+ }; -+ }; -+ -+ i2c@3 { -+ #address-cells = <0x1>; -+ #size-cells = <0x0>; -+ reg = <0x3>; -+ -+ eeprom@54 { -+ compatible = "at,24c08"; -+ reg = <0x54>; -+ }; -+ }; -+ }; -+ }; -+ -+ gpio@40030000 { -+ #gpio-cells = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-gpio-1.00.a"; -+ gpio-controller; -+ reg = <0x40030000 0x10000>; -+ xlnx,all-inputs = <0x0>; -+ xlnx,all-inputs-2 = <0x0>; -+ xlnx,all-outputs = <0x1>; -+ xlnx,all-outputs-2 = <0x0>; -+ xlnx,dout-default = <0x0>; -+ xlnx,dout-default-2 = <0x0>; -+ xlnx,gpio-width = <0x8>; -+ xlnx,gpio2-width = <0x20>; -+ xlnx,interrupt-present = <0x0>; -+ xlnx,is-dual = <0x0>; -+ xlnx,tri-default = <0xffffffff>; -+ xlnx,tri-default-2 = <0xffffffff>; -+ }; -+ -+ flash@60000000 { -+ bank-width = <0x2>; -+ compatible = "cfi-flash"; -+ reg = <0x60000000 0x8000000>; -+ xlnx,axi-clk-period-ps = <0x1388>; -+ xlnx,include-datawidth-matching-0 = <0x1>; -+ xlnx,include-datawidth-matching-1 = <0x1>; -+ xlnx,include-datawidth-matching-2 = <0x1>; -+ xlnx,include-datawidth-matching-3 = <0x1>; -+ xlnx,include-negedge-ioregs = <0x0>; -+ xlnx,lflash-period-ps = <0x1388>; -+ xlnx,linear-flash-sync-burst = <0x0>; -+ xlnx,max-mem-width = <0x10>; -+ xlnx,mem-a-lsb = <0x0>; -+ xlnx,mem-a-msb = <0x1f>; -+ xlnx,mem0-type = <0x2>; -+ xlnx,mem0-width = <0x10>; -+ xlnx,mem1-type = <0x0>; -+ xlnx,mem1-width = <0x10>; -+ xlnx,mem2-type = <0x0>; -+ xlnx,mem2-width = <0x10>; -+ xlnx,mem3-type = <0x0>; -+ xlnx,mem3-width = <0x10>; -+ xlnx,num-banks-mem = <0x1>; -+ xlnx,page-size = <0x10>; -+ xlnx,parity-type-mem-0 = <0x0>; -+ xlnx,parity-type-mem-1 = <0x0>; -+ xlnx,parity-type-mem-2 = <0x0>; -+ xlnx,parity-type-mem-3 = <0x0>; -+ xlnx,port-diff = <0x0>; -+ xlnx,s-axi-en-reg = <0x0>; -+ xlnx,s-axi-mem-addr-width = <0x20>; -+ xlnx,s-axi-mem-data-width = <0x20>; -+ xlnx,s-axi-mem-id-width = <0x1>; -+ xlnx,s-axi-reg-addr-width = <0x5>; -+ xlnx,s-axi-reg-data-width = <0x20>; -+ xlnx,synch-pipedelay-0 = <0x1>; -+ xlnx,synch-pipedelay-1 = <0x1>; -+ xlnx,synch-pipedelay-2 = <0x1>; -+ xlnx,synch-pipedelay-3 = <0x1>; -+ xlnx,tavdv-ps-mem-0 = <0x1fbd0>; -+ xlnx,tavdv-ps-mem-1 = <0x3a98>; -+ xlnx,tavdv-ps-mem-2 = <0x3a98>; -+ xlnx,tavdv-ps-mem-3 = <0x3a98>; -+ xlnx,tcedv-ps-mem-0 = <0x1fbd0>; -+ xlnx,tcedv-ps-mem-1 = <0x3a98>; -+ xlnx,tcedv-ps-mem-2 = <0x3a98>; -+ xlnx,tcedv-ps-mem-3 = <0x3a98>; -+ xlnx,thzce-ps-mem-0 = <0x88b8>; -+ xlnx,thzce-ps-mem-1 = <0x1b58>; -+ xlnx,thzce-ps-mem-2 = <0x1b58>; -+ xlnx,thzce-ps-mem-3 = <0x1b58>; -+ xlnx,thzoe-ps-mem-0 = <0x1b58>; -+ xlnx,thzoe-ps-mem-1 = <0x1b58>; -+ xlnx,thzoe-ps-mem-2 = <0x1b58>; -+ xlnx,thzoe-ps-mem-3 = <0x1b58>; -+ xlnx,tlzwe-ps-mem-0 = <0xc350>; -+ xlnx,tlzwe-ps-mem-1 = <0x0>; -+ xlnx,tlzwe-ps-mem-2 = <0x0>; -+ xlnx,tlzwe-ps-mem-3 = <0x0>; -+ xlnx,tpacc-ps-flash-0 = <0x61a8>; -+ xlnx,tpacc-ps-flash-1 = <0x61a8>; -+ xlnx,tpacc-ps-flash-2 = <0x61a8>; -+ xlnx,tpacc-ps-flash-3 = <0x61a8>; -+ xlnx,twc-ps-mem-0 = <0x11170>; -+ xlnx,twc-ps-mem-1 = <0x3a98>; -+ xlnx,twc-ps-mem-2 = <0x3a98>; -+ xlnx,twc-ps-mem-3 = <0x3a98>; -+ xlnx,twp-ps-mem-0 = <0x13880>; -+ xlnx,twp-ps-mem-1 = <0x2ee0>; -+ xlnx,twp-ps-mem-2 = <0x2ee0>; -+ xlnx,twp-ps-mem-3 = <0x2ee0>; -+ xlnx,twph-ps-mem-0 = <0x13880>; -+ xlnx,twph-ps-mem-1 = <0x2ee0>; -+ xlnx,twph-ps-mem-2 = <0x2ee0>; -+ xlnx,twph-ps-mem-3 = <0x2ee0>; -+ xlnx,use-startup = <0x0>; -+ xlnx,use-startup-int = <0x0>; -+ xlnx,wr-rec-time-mem-0 = <0x186a0>; -+ xlnx,wr-rec-time-mem-1 = <0x6978>; -+ xlnx,wr-rec-time-mem-2 = <0x6978>; -+ xlnx,wr-rec-time-mem-3 = <0x6978>; -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ -+ partition@0x00000000 { -+ label = "fpga"; -+ reg = <0x0 0xb00000>; -+ }; -+ -+ partition@0x00b00000 { -+ label = "boot"; -+ reg = <0xb00000 0x80000>; -+ }; -+ -+ partition@0x00b80000 { -+ label = "bootenv"; -+ reg = <0xb80000 0x20000>; -+ }; -+ -+ partition@0x00ba0000 { -+ label = "kernel"; -+ reg = <0xba0000 0xc00000>; -+ }; -+ -+ partition@0x017a0000 { -+ label = "spare"; -+ reg = <0x17a0000 0x0>; -+ }; -+ }; -+ -+ interrupt-controller@41200000 { -+ #interrupt-cells = <0x2>; -+ compatible = "xlnx,xps-intc-1.00.a"; -+ interrupt-controller; -+ reg = <0x41200000 0x10000>; -+ xlnx,kind-of-intr = <0x0>; -+ xlnx,num-intr-inputs = <0x6>; -+ linux,phandle = <0x4>; -+ phandle = <0x4>; -+ }; -+ -+ gpio@40040000 { -+ #gpio-cells = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-gpio-1.00.a"; -+ gpio-controller; -+ reg = <0x40040000 0x10000>; -+ xlnx,all-inputs = <0x1>; -+ xlnx,all-inputs-2 = <0x0>; -+ xlnx,all-outputs = <0x0>; -+ xlnx,all-outputs-2 = <0x0>; -+ xlnx,dout-default = <0x0>; -+ xlnx,dout-default-2 = <0x0>; -+ xlnx,gpio-width = <0x5>; -+ xlnx,gpio2-width = <0x20>; -+ xlnx,interrupt-present = <0x0>; -+ xlnx,is-dual = <0x0>; -+ xlnx,tri-default = <0xffffffff>; -+ xlnx,tri-default-2 = <0xffffffff>; -+ }; -+ -+ gpio@40000000 { -+ #gpio-cells = <0x2>; -+ clock-frequency = <0xbebc200>; -+ clock-names = "s_axi_aclk"; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-gpio-1.00.a"; -+ gpio-controller; -+ reg = <0x40000000 0x10000>; -+ xlnx,all-inputs = <0x0>; -+ xlnx,all-inputs-2 = <0x0>; -+ xlnx,all-outputs = <0x1>; -+ xlnx,all-outputs-2 = <0x0>; -+ xlnx,dout-default = <0x0>; -+ xlnx,dout-default-2 = <0x0>; -+ xlnx,gpio-width = <0x1>; -+ xlnx,gpio2-width = <0x20>; -+ xlnx,interrupt-present = <0x0>; -+ xlnx,is-dual = <0x0>; -+ xlnx,tri-default = <0xffffffff>; -+ xlnx,tri-default-2 = <0xffffffff>; -+ linux,phandle = <0x1>; -+ phandle = <0x1>; -+ }; -+ -+ serial@44a00000 { -+ clock-frequency = <0xbebc200>; -+ clocks = <0x8>; -+ compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a"; -+ current-speed = <0x1c200>; -+ device_type = "serial"; -+ interrupt-names = "ip2intc_irpt"; -+ interrupt-parent = <0x4>; -+ interrupts = <0x0 0x2>; -+ port-number = <0x0>; -+ reg = <0x44a00000 0x10000>; -+ reg-offset = <0x1000>; -+ reg-shift = <0x2>; -+ xlnx,external-xin-clk-hz = <0x17d7840>; -+ xlnx,external-xin-clk-hz-d = <0x19>; -+ xlnx,has-external-rclk = <0x0>; -+ xlnx,has-external-xin = <0x0>; -+ xlnx,is-a-16550 = <0x1>; -+ xlnx,s-axi-aclk-freq-hz-d = "200.0"; -+ xlnx,use-modem-ports = <0x1>; -+ xlnx,use-user-ports = <0x1>; -+ }; -+ }; -+ - chosen { -- } ; --} ; -+ bootargs = "console=ttyS0,115200 earlyprintk"; -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ aliases { -+ ethernet0 = "/amba_pl/ethernet@40c00000"; -+ i2c0 = "/amba_pl/i2c@40800000"; -+ serial0 = "/amba_pl/serial@44a00000"; -+ }; -+ -+ memory { -+ device_type = "memory"; -+ reg = <0x80000000 0x40000000>; -+ }; -+}; -+ -diff --git a/board/xilinx/microblaze-generic/config.mk b/board/xilinx/microblaze-generic/config.mk -index a953977..cb75fde 100644 ---- a/board/xilinx/microblaze-generic/config.mk -+++ b/board/xilinx/microblaze-generic/config.mk -@@ -1,18 +1,10 @@ --# SPDX-License-Identifier: GPL-2.0+ --# --# (C) Copyright 2007 - 2016 Michal Simek --# --# Michal SIMEK <monstr@monstr.eu> -- --CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER)) -- --# USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support. --CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high --CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul --CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div --CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift --CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare -- --CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER)) -- --PLATFORM_CPPFLAGS += $(CPUFLAGS-1) $(CPUFLAGS-2) -+TEXT_BASE = 0x80400000 -+CONFIG_SYS_TEXT_BASE = 0x80400000 -+ -+PLATFORM_CPPFLAGS += -mxl-barrel-shift -+PLATFORM_CPPFLAGS += -mno-xl-soft-div -+PLATFORM_CPPFLAGS += -mxl-pattern-compare -+PLATFORM_CPPFLAGS += -mxl-multiply-high -+PLATFORM_CPPFLAGS += -mno-xl-soft-mul -+PLATFORM_CPPFLAGS += -mcpu=v11.0 -+PLATFORM_CPPFLAGS += -fgnu89-inline -diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig -index 02e62e2..8d64be4 100644 ---- a/configs/microblaze-generic_defconfig -+++ b/configs/microblaze-generic_defconfig -@@ -1,73 +1,58 @@ - CONFIG_MICROBLAZE=y --CONFIG_SYS_TEXT_BASE=0x29000000 - CONFIG_SPL_LIBCOMMON_SUPPORT=y - CONFIG_SPL_LIBGENERIC_SUPPORT=y - CONFIG_SPL_SERIAL_SUPPORT=y --CONFIG_SPL=y - CONFIG_TARGET_MICROBLAZE_GENERIC=y - CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 - CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 - CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 - CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1 --CONFIG_NR_DRAM_BANKS=1 -+CONFIG_SYS_TEXT_BASE=0x80400000 -+CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" - CONFIG_FIT=y - CONFIG_FIT_VERBOSE=y --CONFIG_BOOTDELAY=-1 --CONFIG_USE_BOOTARGS=y --CONFIG_BOOTARGS="root=romfs" -+CONFIG_BOOTDELAY=4 - CONFIG_SYS_CONSOLE_IS_IN_ENV=y --CONFIG_DISPLAY_BOARDINFO=y --CONFIG_SPL_BOARD_INIT=y --CONFIG_SPL_SYS_MALLOC_SIMPLE=y - CONFIG_SPL_NOR_SUPPORT=y - CONFIG_SPL_OS_BOOT=y - CONFIG_SYS_OS_BASE=0x2c060000 - CONFIG_HUSH_PARSER=y --# CONFIG_AUTO_COMPLETE is not set --CONFIG_SYS_PROMPT="U-Boot-mONStR> " --CONFIG_CMD_IMLS=y --CONFIG_CMD_SPL=y -+CONFIG_SYS_PROMPT="U-Boot> " - CONFIG_CMD_ASKENV=y --CONFIG_CMD_GPIO=y - CONFIG_CMD_SAVES=y - # CONFIG_CMD_SETEXPR is not set -+CONFIG_SYS_ENET=y -+CONFIG_NET=y -+CONFIG_NETDEVICES=y -+CONFIG_CMD_NET=y - CONFIG_CMD_DHCP=y --CONFIG_CMD_TFTPPUT=y -+CONFIG_CMD_NFS=y - CONFIG_CMD_MII=y - CONFIG_CMD_PING=y - CONFIG_CMD_JFFS2=y --CONFIG_SPL_OF_CONTROL=y - CONFIG_OF_EMBED=y --CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" --CONFIG_NETCONSOLE=y --CONFIG_SPL_DM=y -+CONFIG_DM_ETH=y -+CONFIG_SYS_MALLOC_F=y -+CONFIG_SYS_GENERIC_BOARD=y -+CONFIG_XILINX_AXIEMAC=y -+CONFIG_SYS_NS16550=y -+CONFIG_CMD_FLASH=y -+CONFIG_MTD_NOR_FLASH=y -+CONFIG_CMD_IMLS=y -+CONFIG_CMD_GPIO=y - CONFIG_DM_GPIO=y - CONFIG_XILINX_GPIO=y --CONFIG_LED=y --CONFIG_LED_GPIO=y --CONFIG_MTD_NOR_FLASH=y --CONFIG_MTD_DEVICE=y --CONFIG_FLASH_CFI_DRIVER=y --CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y --CONFIG_FLASH_CFI_MTD=y --CONFIG_SYS_FLASH_PROTECTION=y --CONFIG_SYS_FLASH_CFI=y --CONFIG_PHY_ATHEROS=y --CONFIG_PHY_BROADCOM=y --CONFIG_PHY_DAVICOM=y --CONFIG_PHY_LXT=y --CONFIG_PHY_MARVELL=y -+CONFIG_CMD_TFTPPUT=y -+CONFIG_NETCONSOLE=y -+CONFIG_XILINX_FSL_LINKS=0 -+CONFIG_PHY_GIGE=y -+CONFIG_ENV_IS_IN_FLASH=y - CONFIG_PHY_MICREL=y - CONFIG_PHY_MICREL_KSZ90X1=y --CONFIG_PHY_NATSEMI=y --CONFIG_PHY_REALTEK=y --CONFIG_PHY_VITESSE=y --CONFIG_DM_ETH=y --CONFIG_XILINX_AXIEMAC=y --CONFIG_XILINX_EMACLITE=y --CONFIG_SYS_NS16550=y --CONFIG_XILINX_UARTLITE=y --CONFIG_SYSRESET_GPIO=y --CONFIG_SYSRESET_MICROBLAZE=y --CONFIG_WDT=y --CONFIG_XILINX_TB_WATCHDOG=y -+CONFIG_SPL_DM_SERIAL=y -+CONFIG_SPL_OF_LIBFDT=y -+CONFIG_PHY_XILINX=y -+# CONFIG_SPL is not set -+# CONFIG_CMD_EEPROM is not set -+# CONFIG_BOOTARGS is not set -+# CONFIG_USE_BOOTARGS is not set -diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h -index ba0952c..fd1da2b 100644 ---- a/include/configs/microblaze-generic.h -+++ b/include/configs/microblaze-generic.h -@@ -1,205 +1,173 @@ --/* SPDX-License-Identifier: GPL-2.0+ */ --/* -- * (C) Copyright 2007-2010 Michal Simek -- * -- * Michal SIMEK <monstr@monstr.eu> -- */ -- - #ifndef __CONFIG_H - #define __CONFIG_H - --#include "../board/xilinx/microblaze-generic/xparameters.h" -- --/* MicroBlaze CPU */ --#define MICROBLAZE_V5 1 -- --/* linear and spi flash memory */ --#ifdef XILINX_FLASH_START --#define FLASH --#undef SPIFLASH --#undef RAMENV /* hold environment in flash */ --#else --#undef FLASH --#undef SPIFLASH --#define RAMENV /* hold environment in RAM */ --#endif -+#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 } -+ -+/* processor - microblaze_0 */ -+#define XILINX_USE_MSR_INSTR 1 -+#define XILINX_USE_ICACHE 1 -+#define XILINX_USE_DCACHE 1 -+#define XILINX_DCACHE_BYTE_SIZE 16384 -+#define XILINX_PVR 2 -+#define MICROBLAZE_V5 -+#define CONFIG_CMD_IRQ -+#define CONFIG_DCACHE -+#define CONFIG_ICACHE -+ -+/* main_memory - ddr3_sdram */ -+ -+ -+/* uart - rs232_uart */ -+#define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) -+#define CONFIG_SYS_NS16550_REG_SIZE -4 -+#define CONSOLE_ARG "console=console=ttyS0,115200\0" -+#define CONFIG_SYS_NS16550_SERIAL -+#define CONFIG_CONS_INDEX 1 -+#define ESERIAL0 "eserial0=setenv stdout eserial0;setenv stdin eserial0\0" -+#define SERIAL_MULTI "serial=setenv stdout serial;setenv stdin serial\0" -+#define CONFIG_SYS_NS16550_CLK 200000000 -+#define CONFIG_BAUDRATE 115200 -+ -+/* ethernet - axi_ethernet */ -+#define CONFIG_PHY_XILINX -+#define CONFIG_MII -+#define CONFIG_PHY_MARVELL -+#define CONFIG_PHY_NATSEMI -+#define CONFIG_NET_MULTI -+#define CONFIG_PHY_REALTEK -+#define CONFIG_NETCONSOLE 1 -+#define CONFIG_SERVERIP 172.25.229.115 -+#define CONFIG_IPADDR -+ -+/* nor_flash - linear_flash */ -+#define CONFIG_SYS_FLASH_BASE 0x60000000 -+#define CONFIG_FLASH_END 0x68000000 -+#define CONFIG_SYS_MAX_FLASH_SECT 2048 -+#define CONFIG_SYS_FLASH_PROTECTION -+#define CONFIG_SYS_FLASH_EMPTY_INFO -+#define CONFIG_SYS_FLASH_CFI -+#define CONFIG_FLASH_CFI_DRIVER -+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -+#define CONFIG_SYS_MAX_FLASH_BANKS 1 -+ -+/* timer - axi_timer_0 */ -+ -+/* intc - microblaze_0_axi_intc */ -+ -+/* FPGA */ -+ -+/* Memory testing handling */ -+#define CONFIG_SYS_MEMTEST_START 0x80000000 -+#define CONFIG_SYS_MEMTEST_END (0x80000000 + 0x1000) -+#define CONFIG_SYS_LOAD_ADDR 0x80000000 /* default load address */ -+ -+/* global pointer options */ -+#define CONFIG_SYS_GBL_DATA_OFFSET (0x40000000 - GENERATED_GBL_DATA_SIZE) -+ -+/* Size of malloc() pool */ -+#define SIZE 0x100000 -+#define CONFIG_SYS_MALLOC_LEN SIZE -+#define CONFIG_SYS_MONITOR_LEN SIZE -+#define CONFIG_SYS_MONITOR_BASE (0x80000000 + CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) -+#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) -+ -+/* stack */ -+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_F_LEN) -+ -+/* No of_control support yet*/ -+ -+/* BOOTP options */ -+#define CONFIG_BOOTP_SERVERIP -+#define CONFIG_BOOTP_BOOTFILESIZE -+#define CONFIG_BOOTP_BOOTPATH -+#define CONFIG_BOOTP_GATEWAY -+#define CONFIG_BOOTP_HOSTNAME -+#define CONFIG_BOOTP_MAY_FAIL -+#define CONFIG_BOOTP_DNS -+#define CONFIG_BOOTP_SUBNETMASK -+#define CONFIG_BOOTP_PXE - --/* uart */ --/* The following table includes the supported baudrates */ --# define CONFIG_SYS_BAUDRATE_TABLE \ -- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -- --/* setting reset address */ --/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ -- --#define CONFIG_SYS_MALLOC_LEN 0xC0000 -- --/* Stack location before relocation */ --#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ -- CONFIG_SYS_MALLOC_F_LEN) -- --/* -- * CFI flash memory layout - Example -- * CONFIG_SYS_FLASH_BASE = 0x2200_0000; -- * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB -- * -- * SECT_SIZE = 0x20000; 128kB is one sector -- * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store -- * -- * 0x2200_0000 CONFIG_SYS_FLASH_BASE -- * FREE 256kB -- * 0x2204_0000 CONFIG_ENV_ADDR -- * ENV_AREA 128kB -- * 0x2206_0000 -- * FREE -- * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE -- * -- */ -- --#ifdef FLASH --# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START --# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE --/* ?empty sector */ --# define CONFIG_SYS_FLASH_EMPTY_INFO 1 --/* max number of memory banks */ --# define CONFIG_SYS_MAX_FLASH_BANKS 1 --/* max number of sectors on one chip */ --# define CONFIG_SYS_MAX_FLASH_SECT 512 --/* hardware flash protection */ --/* use buffered writes (20x faster) */ --# ifdef RAMENV --# define CONFIG_ENV_SIZE 0x1000 --# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) -- --# else /* FLASH && !RAMENV */ --/* 128K(one sector) for env */ --# define CONFIG_ENV_SECT_SIZE 0x20000 --# define CONFIG_ENV_ADDR \ -- (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) --# define CONFIG_ENV_SIZE 0x20000 --# endif /* FLASH && !RAMBOOT */ --#else /* !FLASH */ -- --#ifdef SPIFLASH --# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 --# define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ --# define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS -- --# ifdef RAMENV --# define CONFIG_ENV_SIZE 0x1000 --# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) -- --# else /* SPIFLASH && !RAMENV */ --# define CONFIG_ENV_SPI_MODE SPI_MODE_3 --# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED --# define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS --/* 128K(two sectors) for env */ --# define CONFIG_ENV_SECT_SIZE 0x10000 --# define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) --/* Warning: adjust the offset in respect of other flash content and size */ --# define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ --# endif /* SPIFLASH && !RAMBOOT */ --#else /* !SPIFLASH */ -- --/* ENV in RAM */ --# define CONFIG_ENV_SIZE 0x1000 --# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) --#endif /* !SPIFLASH */ --#endif /* !FLASH */ -- --#if defined(XILINX_USE_ICACHE) --# define CONFIG_ICACHE --#else --# undef CONFIG_ICACHE --#endif -+/*Command line configuration.*/ -+#define CONFIG_CMDLINE_EDITING -+#define CONFIG_AUTO_COMPLETE - --#if defined(XILINX_USE_DCACHE) --# define CONFIG_DCACHE --#else --# undef CONFIG_DCACHE --#endif -+/* Miscellaneous configurable options */ -+#define CONFIG_SYS_CBSIZE 2048/* Console I/O Buffer Size */ -+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - --#ifndef XILINX_DCACHE_BYTE_SIZE --#define XILINX_DCACHE_BYTE_SIZE 32768 --#endif - --/* -- * BOOTP options -- */ --#define CONFIG_BOOTP_BOOTFILESIZE -+/* Use the HUSH parser */ -+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - --#if defined(CONFIG_MTD_PARTITIONS) --/* MTD partitions */ -+#define CONFIG_ENV_VARS_UBOOT_CONFIG -+#define CONFIG_ENV_OVERWRITE /* Allow to overwrite the u-boot environment variables */ - --/* default mtd partition table */ --#endif -+#define CONFIG_LMB - --/* size of console buffer */ --#define CONFIG_SYS_CBSIZE 512 --/* max number of command args */ --#define CONFIG_SYS_MAXARGS 15 --/* default load address */ --#define CONFIG_SYS_LOAD_ADDR 0 -+/* FDT support */ -+#define CONFIG_DISPLAY_BOARDINFO_LATE - --#define CONFIG_HOSTNAME "microblaze-generic" --#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" - - /* architecture dependent code */ --#define CONFIG_SYS_USR_EXCEP /* user exception */ -- --#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" -- --#ifndef CONFIG_EXTRA_ENV_SETTINGS --#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ -- "nor0=flash-0\0"\ -- "mtdparts=mtdparts=flash-0:"\ -- "256k(u-boot),256k(env),3m(kernel),"\ -- "1m(romfs),1m(cramfs),-(jffs2)\0"\ -- "nc=setenv stdout nc;"\ -- "setenv stdin nc\0" \ -- "serial=setenv stdout serial;"\ -- "setenv stdin serial\0" --#endif -- --/* Enable flat device tree support */ --#define CONFIG_LMB 1 -+#define CONFIG_SYS_USR_EXCEP /* user exception */ -+#define CONFIG_SYS_HZ 1000 -+ -+/* Boot Argument Buffer Size */ -+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -+#define CONFIG_SYS_LONGHELP -+/* Initial memory map for Linux */ -+#define CONFIG_SYS_BOOTMAPSZ 0x8000000 -+ -+/* Environment settings*/ -+#define CONFIG_ENV_ADDR 0x60b80000 -+#define CONFIG_ENV_SIZE 0x20000 -+#define CONFIG_ENV_SECT_SIZE 0x20000 -+/* PREBOOT */ -+#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot; echo; dhcp" -+ -+/* Extra U-Boot Env settings */ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ SERIAL_MULTI \ -+ CONSOLE_ARG \ -+ ESERIAL0 \ -+ "nc=setenv stdout nc;setenv stdin nc;\0" \ -+ "ethaddr=00:0a:35:00:22:01\0" \ -+ "autoload=no\0" \ -+ "sdbootdev=0\0" \ -+ "clobstart=0x81000000\0" \ -+ "netstart=0x81000000\0" \ -+ "dtbnetstart=0x82800000\0" \ -+ "loadaddr=0x81000000\0" \ -+ "bootsize=0x80000\0" \ -+ "bootstart=0x60b00000\0" \ -+ "boot_img=u-boot-s.bin\0" \ -+ "load_boot=tftpboot ${clobstart} ${boot_img}\0" \ -+ "update_boot=setenv img boot; setenv psize ${bootsize}; setenv installcmd \"install_boot\"; run load_boot test_img; setenv img; setenv psize; setenv installcmd\0" \ -+ "install_boot=protect off ${bootstart} +${bootsize} && erase ${bootstart} +${bootsize} && " "cp.b ${clobstart} ${bootstart} ${filesize}\0" \ -+ "bootenvsize=0x20000\0" \ -+ "bootenvstart=0x60b80000\0" \ -+ "eraseenv=protect off ${bootenvstart} +${bootenvsize} && erase ${bootenvstart} +${bootenvsize}\0" \ -+ "kernelsize=0xc00000\0" \ -+ "kernelstart=0x60ba0000\0" \ -+ "kernel_img=image.ub\0" \ -+ "load_kernel=tftpboot ${clobstart} ${kernel_img}\0" \ -+ "update_kernel=setenv img kernel; setenv psize ${kernelsize}; setenv installcmd \"install_kernel\"; run load_kernel test_crc; setenv img; setenv psize; setenv installcmd\0" \ -+ "install_kernel=protect off ${kernelstart} +${kernelsize} && erase ${kernelstart} +${kernelsize} && " "cp.b ${clobstart} ${kernelstart} ${filesize}\0" \ -+ "cp_kernel2ram=cp.b ${kernelstart} ${netstart} ${kernelsize}\0" \ -+ "fpgasize=0xb00000\0" \ -+ "fpgastart=0x60000000\0" \ -+ "fpga_img=system.bit.bin\0" \ -+ "load_fpga=tftpboot ${clobstart} ${fpga_img}\0" \ -+ "update_fpga=setenv img fpga; setenv psize ${fpgasize}; setenv installcmd \"install_fpga\"; run load_fpga test_img; setenv img; setenv psize; setenv installcmd\0" \ -+ "install_fpga=protect off ${fpgastart} +${fpgasize} && erase ${fpgastart} +${fpgasize} && " "cp.b ${clobstart} ${fpgastart} ${filesize}\0" \ -+ "fault=echo ${img} image size is greater than allocated place - partition ${img} is NOT UPDATED\0" \ -+ "test_crc=if imi ${clobstart}; then run test_img; else echo ${img} Bad CRC - ${img} is NOT UPDATED; fi\0" \ -+ "test_img=setenv var \"if test ${filesize} -gt ${psize}\\; then run fault\\; else run ${installcmd}\\; fi\"; run var; setenv var\0" \ -+ "netboot=tftpboot ${netstart} ${kernel_img} && bootm\0" \ -+ "default_bootcmd=run cp_kernel2ram && bootm ${netstart}\0" \ -+"" -+/* BOOTCOMMAND */ -+#define CONFIG_BOOTCOMMAND "run default_bootcmd" - --#if defined(CONFIG_XILINX_AXIEMAC) --# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 - #endif -- --/* SPL part */ -- --#ifdef CONFIG_SYS_FLASH_BASE --# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE --#endif -- --/* for booting directly linux */ -- --#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ -- 0x40000) --#define CONFIG_SYS_FDT_SIZE (16 << 10) --#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ -- 0x1000000) -- --/* SP location before relocation, must use scratch RAM */ --/* BRAM start */ --#define CONFIG_SYS_INIT_RAM_ADDR 0x0 --/* BRAM size - will be generated */ --#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 -- --# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ -- CONFIG_SYS_INIT_RAM_SIZE - \ -- CONFIG_SYS_MALLOC_F_LEN) -- --/* Just for sure that there is a space for stack */ --#define CONFIG_SPL_STACK_SIZE 0x100 -- --#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE -- --#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ -- CONFIG_SYS_INIT_RAM_ADDR - \ -- CONFIG_SYS_MALLOC_F_LEN - \ -- CONFIG_SPL_STACK_SIZE) -- --#endif /* __CONFIG_H */ --- -2.7.5 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2019.1.bb deleted file mode 100644 index 3377635df..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2019.1.bb +++ /dev/null @@ -1,32 +0,0 @@ -UBOOT_VERSION = "v2019.01" -XILINX_RELEASE_VERSION = "v2019.1" - -UBRANCH ?= "master" - -SRCREV ?= "d895ac5e94815d4b45dcf09d4752c5c2334a51db" - -include u-boot-xlnx.inc -include u-boot-spl-zynq-init.inc - -SRC_URI_append_kc705-microblazeel = " file://microblaze-kc705-Convert-microblaze-generic-to-k.patch" - -LICENSE = "GPLv2+" -LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" - -# u-boot-xlnx has support for these -HAS_PLATFORM_INIT ?= " \ - zynq_microzed_config \ - zynq_zed_config \ - zynq_zc702_config \ - zynq_zc706_config \ - zynq_zybo_config \ - xilinx_zynqmp_zcu102_rev1_0_config \ - xilinx_zynqmp_zcu106_revA_config \ - xilinx_zynqmp_zcu104_revC_config \ - xilinx_zynqmp_zcu100_revC_config \ - xilinx_zynqmp_zcu111_revA_config \ - xilinx_zynqmp_zc1275_revA_config \ - xilinx_zynqmp_zc1275_revB_config \ - xilinx_zynqmp_zc1254_revA_config \ - " - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2020.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2020.1.bb new file mode 100644 index 000000000..0eb66c8ad --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_2020.1.bb @@ -0,0 +1,19 @@ +UBOOT_VERSION = "v2020.01" + +UBRANCH ?= "xlnx_rebase_v2020.01" + +SRCREV ?= "86c84c0d0f916ec00d5d76a32dc9372a25429ca9" + +include u-boot-xlnx.inc +include u-boot-spl-zynq-init.inc + +LICENSE = "GPLv2+" +LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" + +# u-boot-xlnx has support for these +HAS_PLATFORM_INIT ?= " \ + xilinx_zynqmp_virt_config \ + xilinx_zynq_virt_defconfig \ + xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \ + " + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb index d2eedd58a..e8b91922b 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr.bb @@ -4,7 +4,7 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda DEPENDS = "u-boot-mkimage-native" -inherit deploy nopackages +inherit deploy nopackages image-wic-utils INHIBIT_DEFAULT_DEPS = "1" @@ -24,35 +24,44 @@ KERNEL_BOOTCMD_zynq ?= "bootm" KERNEL_BOOTCMD_versal ?= "booti" BOOTMODE ?= "sd" -BOOTMODE_versal ?= "qspi" SRC_URI = " \ file://boot.cmd.sd.zynq \ file://boot.cmd.sd.zynqmp \ + file://boot.cmd.sd.versal \ file://boot.cmd.qspi.versal \ file://pxeboot.pxe \ " PACKAGE_ARCH = "${MACHINE_ARCH}" -UBOOTSCR_BASE_NAME ?= "${PN}-${PKGE}-${PKGV}-${PKGR}-${DATETIME}" -UBOOTSCR_BASE_NAME[vardepsexclude] = "DATETIME" +UBOOTSCR_BASE_NAME ?= "${PN}-${PKGE}-${PKGV}-${PKGR}${IMAGE_VERSION_SUFFIX}" UBOOTPXE_CONFIG ?= "pxelinux.cfg" -UBOOTPXE_CONFIG_NAME = "${UBOOTPXE_CONFIG}-${DATETIME}" -UBOOTPXE_CONFIG_NAME[vardepsexclude] = "DATETIME" +UBOOTPXE_CONFIG_NAME = "${UBOOTPXE_CONFIG}${IMAGE_VERSION_SUFFIX}" -DEVICETREE_ADDRESS_zynqmp ?= "0x4000000" +DEVICETREE_ADDRESS_zynqmp ?= "0x100000" DEVICETREE_ADDRESS_zynq ?= "0x2000000" DEVICETREE_ADDRESS_versal ?= "0x1000" -KERNEL_LOAD_ADDRESS_zynqmp ?= "0x80000" +KERNEL_LOAD_ADDRESS_zynqmp ?= "0x200000" KERNEL_LOAD_ADDRESS_zynq ?= "0x2080000" KERNEL_LOAD_ADDRESS_versal ?= "0x80000" RAMDISK_IMAGE_ADDRESS_zynq ?= "0x4000000" RAMDISK_IMAGE_ADDRESS_versal ?= "0x6000000" + +SDBOOTDEV ?= "0" + +BITSTREAM_LOAD_ADDRESS ?= "0x100000" + do_configure[noexec] = "1" do_install[noexec] = "1" +def get_bitstream_load_type(d): + if boot_files_bitstream(d)[1] : + return "loadb" + else: + return "load" + do_compile() { sed -e 's/@@KERNEL_IMAGETYPE@@/${KERNEL_IMAGETYPE}/' \ -e 's/@@KERNEL_LOAD_ADDRESS@@/${KERNEL_LOAD_ADDRESS}/' \ @@ -61,10 +70,16 @@ do_compile() { -e 's/@@RAMDISK_IMAGE@@/${RAMDISK_IMAGE}/' \ -e 's/@@RAMDISK_IMAGE_ADDRESS@@/${RAMDISK_IMAGE_ADDRESS}/' \ -e 's/@@KERNEL_BOOTCMD@@/${KERNEL_BOOTCMD}/' \ + -e 's/@@SDBOOTDEV@@/${SDBOOTDEV}/' \ + -e 's/@@BITSTREAM@@/${@boot_files_bitstream(d)[0]}/g' \ + -e 's/@@BITSTREAM_LOAD_ADDRESS@@/${BITSTREAM_LOAD_ADDRESS}/g' \ + -e 's/@@BITSTREAM_IMAGE@@/${@boot_files_bitstream(d)[0]}/g' \ + -e 's/@@BITSTREAM_LOAD_TYPE@@/${@get_bitstream_load_type(d)}/g' \ "${WORKDIR}/boot.cmd.${BOOTMODE}.${SOC_FAMILY}" > "${WORKDIR}/boot.cmd" mkimage -A arm -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr sed -e 's/@@KERNEL_IMAGETYPE@@/${KERNEL_IMAGETYPE}/' \ -e 's/@@DEVICE_TREE_NAME@@/${DEVICE_TREE_NAME}/' \ + -e 's/@@RAMDISK_IMAGE@@/${RAMDISK_IMAGE}/' \ "${WORKDIR}/pxeboot.pxe" > "pxeboot.pxe" } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.qspi b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.qspi deleted file mode 100644 index 84a25d291..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.qspi +++ /dev/null @@ -1 +0,0 @@ -booti 0x80000 0x6000000 0x1000 diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd deleted file mode 100644 index 67a8057be..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd +++ /dev/null @@ -1,6 +0,0 @@ -setenv bootargs $bootargs root=/dev/mmcblk0p2 rw rootwait earlycon clk_ignore_unused -devicetree_image=@@DEVICE_TREE_NAME@@ -fatload mmc 0 ${fdt_addr_r} ${devicetree_image} -fatload mmc $sdbootdev:$partid ${kernel_addr_r} @@KERNEL_IMAGETYPE@@ -booti ${kernel_addr_r} - ${fdt_addr_r} - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.versal b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.versal new file mode 100644 index 000000000..10e83cd09 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.versal @@ -0,0 +1,3 @@ +setenv bootargs $bootargs root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused +fatload mmc $sdbootdev:$partid @@KERNEL_LOAD_ADDRESS@@ @@KERNEL_IMAGETYPE@@ +@@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@ diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynq b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynq index f593ab4a6..bbd2e01e9 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynq +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynq @@ -1,3 +1,6 @@ +if test -n "@@BITSTREAM@@"; then + fatload mmc $sdbootdev @@BITSTREAM_LOAD_ADDRESS@@ @@BITSTREAM_IMAGE@@ && fpga @@BITSTREAM_LOAD_TYPE@@ 0 @@BITSTREAM_LOAD_ADDRESS@@ ${filesize} +fi fatload mmc 0 @@DEVICETREE_ADDRESS@@ @@DEVICE_TREE_NAME@@ fatload mmc 0 @@KERNEL_LOAD_ADDRESS@@ @@KERNEL_IMAGETYPE@@ fatload mmc 0 @@RAMDISK_IMAGE_ADDRESS@@ @@RAMDISK_IMAGE@@ diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynqmp b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynqmp index 18f82d784..43062ce8f 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynqmp +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.sd.zynqmp @@ -1,4 +1,9 @@ +setenv sdbootdev @@SDBOOTDEV@@ +setenv bootargs $bootargs root=/dev/mmcblk${sdbootdev}p2 rw rootwait earlycon clk_ignore_unused setenv bootargs $bootargs root=/dev/mmcblk0p2 rw rootwait earlycon clk_ignore_unused -fatload mmc 0 @@DEVICETREE_ADDRESS@@ @@DEVICE_TREE_NAME@@ +if test -n "@@BITSTREAM@@"; then + fatload mmc $sdbootdev @@BITSTREAM_LOAD_ADDRESS@@ @@BITSTREAM_IMAGE@@ && fpga @@BITSTREAM_LOAD_TYPE@@ 0 @@BITSTREAM_LOAD_ADDRESS@@ ${filesize} +fi +fatload mmc $sdbootdev @@DEVICETREE_ADDRESS@@ @@DEVICE_TREE_NAME@@ fatload mmc $sdbootdev:$partid @@KERNEL_LOAD_ADDRESS@@ @@KERNEL_IMAGETYPE@@ @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@ diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/pxeboot.pxe b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/pxeboot.pxe index 6d7a0a946..407965453 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/pxeboot.pxe +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-scr/pxeboot.pxe @@ -1,3 +1,4 @@ LABEL Linux KERNEL @@KERNEL_IMAGETYPE@@ FDT @@DEVICE_TREE_NAME@@ +INITRD @@RAMDISK_IMAGE@@ diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-uenv.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-uenv.bb index 952077d12..6e4c3c0b2 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-uenv.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-zynq-uenv.bb @@ -37,6 +37,12 @@ def uboot_boot_cmd(d): return "booti" raise bb.parse.SkipRecipe("Unsupport kernel image type") +def get_sdbootdev(d): + if d.getVar("SOC_FAMILY") in ["zynqmp"]: + return "${sdbootdev}" + else: + return "0" + def uenv_populate(d): # populate the environment values env = {} @@ -51,10 +57,13 @@ def uenv_populate(d): env["bootargs"] = d.getVar("KERNEL_BOOTARGS") - env["loadkernel"] = "fatload mmc 0 ${kernel_load_address} ${kernel_image}" - env["loaddtb"] = "fatload mmc 0 ${devicetree_load_address} ${devicetree_image}" + env["loadkernel"] = "fatload mmc " + get_sdbootdev(d) + " ${kernel_load_address} ${kernel_image}" + env["loaddtb"] = "fatload mmc " + get_sdbootdev(d) + " ${devicetree_load_address} ${devicetree_image}" env["bootkernel"] = "run loadkernel && run loaddtb && " + uboot_boot_cmd(d) + " ${kernel_load_address} - ${devicetree_load_address}" + if d.getVar("SOC_FAMILY") in ["zynqmp"]: + env["bootkernel"] = "setenv bootargs " + d.getVar("KERNEL_BOOTARGS") + " ; " + env["bootkernel"] + # default uenvcmd does not load bitstream env["uenvcmd"] = "run bootkernel" @@ -67,14 +76,14 @@ def uenv_populate(d): env["bitstream_type"] = "loadb" if bitstreamtype else "load" # load bitstream first with loadfpa - env["loadfpga"] = "fatload mmc 0 ${bitstream_load_address} ${bitstream_image} && fpga ${bitstream_type} 0 ${bitstream_load_address} ${filesize}" + env["loadfpga"] = "fatload mmc " + get_sdbootdev(d) + " ${bitstream_load_address} ${bitstream_image} && fpga ${bitstream_type} 0 ${bitstream_load_address} ${filesize}" env["uenvcmd"] = "run loadfpga && run bootkernel" return env -# bootargs, default to booting with the rootfs device being partition 2 of the first mmc device +# bootargs, default to booting with the rootfs device being partition 2 KERNEL_BOOTARGS_zynq = "earlyprintk console=ttyPS0,115200 root=/dev/mmcblk0p2 rw rootwait" -KERNEL_BOOTARGS_zynqmp = "earlycon clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait" +KERNEL_BOOTARGS_zynqmp = "earlycon clk_ignore_unused root=/dev/mmcblk${sdbootdev}p2 rw rootwait" KERNEL_LOAD_ADDRESS_zynq = "0x2080000" KERNEL_LOAD_ADDRESS_zynqmp = "0x80000" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-bsp/uboot-device-tree/uboot-device-tree.bb b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/uboot-device-tree/uboot-device-tree.bb new file mode 100644 index 000000000..885dce8c8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-bsp/uboot-device-tree/uboot-device-tree.bb @@ -0,0 +1,78 @@ +SUMMARY = "Xilinx BSP u-boot device trees" +DESCRIPTION = "Xilinx BSP u-boot device trees from within layer." +SECTION = "bsp" + +LICENSE = "MIT & GPLv2" +LIC_FILES_CHKSUM = " \ + file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302 \ + file://${COMMON_LICENSE_DIR}/GPL-2.0;md5=801f80980d171dd6425610833a22dbe6 \ + " + +inherit devicetree xsctdt xsctyaml + + +REPO ??= "git://github.com/xilinx/device-tree-xlnx.git;protocol=https" +BRANCH ??= "master" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +PROVIDES = "virtual/uboot-dtb" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +SRCREV ??= "bc8445833318e9320bf485ea125921eecc3dc97a" +PV = "xilinx+git${SRCPV}" + +PACKAGE_ARCH ?= "${MACHINE_ARCH}" + +COMPATIBLE_MACHINE ?= "^$" +COMPATIBLE_MACHINE_zynqmp = ".*" +COMPATIBLE_MACHINE_zynq = ".*" +COMPATIBLE_MACHINE_versal = ".*" + +XSCTH_BUILD_CONFIG ?= "" + +DT_FILES_PATH = "${XSCTH_WS}/${XSCTH_PROJ}" +DT_INCLUDE_append = " ${WORKDIR}" +DT_PADDING_SIZE = "0x1000" + +UBOOT_DTS ?= "" +XSCTH_MISC = " -hdf_type ${HDF_EXT}" +XSCTH_APP = "device-tree" +YAML_DT_BOARD_FLAGS_zynqmp-generic ?= "" +YAML_DT_BOARD_FLAGS_versal-generic ?= "" +YAML_DT_BOARD_FLAGS_zynq-generic ?= "" +UBOOT_DTS_NAME = "u-boot" +DTB_FILE = "u-boot.dtb" + +do_configure[dirs] += "${DT_FILES_PATH}" +SRC_URI_append = "${@" ".join(["file://%s" % f for f in (d.getVar('UBOOT_DTS') or "").split()])}" + +do_configure_prepend () { + if [ ! -z "${UBOOT_DTS}" ]; then + for f in ${UBOOT_DTS}; do + cp -rf ${WORKDIR}/${f} ${DT_FILES_PATH}/ + done + return + fi +} + + +#Both linux dtb and uboot dtb are installing +#system-top.dtb for uboot env recipe while do_prepare_recipe_sysroot +#moving system-top.dts to othername. +do_compile_prepend() { + import shutil + + listpath = d.getVar("DT_FILES_PATH") + try: + os.remove(os.path.join(listpath, "system.dts")) + shutil.move(os.path.join(listpath, "system-top.dts"), os.path.join(listpath, d.getVar("UBOOT_DTS_NAME") + ".dts")) + except OSError: + pass +} + +do_deploy() { + install -Dm 0644 ${B}/${UBOOT_DTS_NAME}.dtb ${DEPLOYDIR}/${UBOOT_DTS_NAME}.dtb +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-core/glibc/glibc-locale_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-core/glibc/glibc-locale_%.bbappend new file mode 100644 index 000000000..68ae89b4d --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-core/glibc/glibc-locale_%.bbappend @@ -0,0 +1,4 @@ +do_install_append() { + # Remove the libdir if it is empty when gconv is not copied + find ${D}${libdir} -type d -empty -delete +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-Add-enable-disable-udev.patch b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-Add-enable-disable-udev.patch new file mode 100644 index 000000000..c2c5849d6 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-Add-enable-disable-udev.patch @@ -0,0 +1,29 @@ +From a471cf4e4c73350e090eb2cd87ec959d138012e5 Mon Sep 17 00:00:00 2001 +From: Jeremy Puhlman <jpuhlman@mvista.com> +Date: Thu, 19 Mar 2020 11:54:26 -0700 +Subject: [PATCH] Add enable/disable libudev + +Upstream-Status: Pending +Signed-off-by: Jeremy Puhlman <jpuhlman@mvista.com> +--- + configure | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/configure b/configure +index cac271c..bd116eb 100755 +--- a/configure ++++ b/configure +@@ -1539,6 +1539,10 @@ for opt do + ;; + --disable-plugins) plugins="no" + ;; ++ --enable-libudev) libudev="yes" ++ ;; ++ --disable-libudev) libudev="no" ++ ;; + *) + echo "ERROR: unknown option $opt" + echo "Try '$0 --help' for more information" +-- +1.8.3.1 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-linux-user-disable-qemu-bridge-helper-and-socket_scm.patch b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-linux-user-disable-qemu-bridge-helper-and-socket_scm.patch deleted file mode 100644 index 8f41f7469..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0001-linux-user-disable-qemu-bridge-helper-and-socket_scm.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 206d1b9c38daed50fcc08d2e743e649fbb82d60b Mon Sep 17 00:00:00 2001 -From: Laurent Vivier <laurent@vivier.eu> -Date: Tue, 5 Jun 2018 18:09:58 +0200 -Subject: [PATCH] linux-user: disable qemu-bridge-helper and socket_scm_helper - build - -linux-user targets don't need them, and if we ask to build statically -linked binaries, some static libraries they need are not available. - -Signed-off-by: Laurent Vivier <laurent@vivier.eu> -Reviewed-by: Peter Maydell <peter.maydell@linaro.org> -Message-Id: <20180605160958.5434-1-laurent@vivier.eu> - -Upstream-Status: Pending - - -With the split of qemu-xilinx into target,native and system-native recipes, -we need to avoid duplicating providers for qemu-brigde-helper. - -Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandr@xilinx.com> - - ---- - Makefile | 2 +- - tests/Makefile.include | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Makefile b/Makefile -index 023b343..e4bc34a 100644 ---- a/Makefile -+++ b/Makefile -@@ -351,7 +351,7 @@ $(call set-vpath, $(SRC_PATH)) - - LIBS+=-lz $(LIBS_TOOLS) - --HELPERS-$(CONFIG_LINUX) = qemu-bridge-helper$(EXESUF) -+HELPERS-$(call land,$(CONFIG_SOFTMMU),$(CONFIG_LINUX)) = qemu-bridge-helper$(EXESUF) - - ifdef BUILD_DOCS - DOCS=qemu-doc.html qemu-doc.txt qemu.1 qemu-img.1 qemu-nbd.8 qemu-ga.8 -diff --git a/tests/Makefile.include b/tests/Makefile.include -index d098a10..10397ed 100644 ---- a/tests/Makefile.include -+++ b/tests/Makefile.include -@@ -930,7 +930,7 @@ check-report.html: check-report.xml - - # Other tests - --QEMU_IOTESTS_HELPERS-$(CONFIG_LINUX) = tests/qemu-iotests/socket_scm_helper$(EXESUF) -+QEMU_IOTESTS_HELPERS-$(call land,$(CONFIG_SOFTMMU),$(CONFIG_LINUX)) = tests/qemu-iotests/socket_scm_helper$(EXESUF) - - .PHONY: check-tests/qemu-iotests-quick.sh - check-tests/qemu-iotests-quick.sh: tests/qemu-iotests-quick.sh qemu-img$(EXESUF) qemu-io$(EXESUF) $(QEMU_IOTESTS_HELPERS-y) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch new file mode 100644 index 000000000..a8ab7daa4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/0010-configure-Add-pkg-config-handling-for-libgcrypt.patch @@ -0,0 +1,93 @@ +From 5214dd4461f2090ef0965b4d2518f49927d61cbc Mon Sep 17 00:00:00 2001 +From: He Zhe <zhe.he@windriver.com> +Date: Wed, 28 Aug 2019 19:56:28 +0800 +Subject: [Qemu-devel] [PATCH] configure: Add pkg-config handling for libgcrypt + +libgcrypt may also be controlled by pkg-config, this patch adds pkg-config +handling for libgcrypt. + +Upstream-Status: Denied [https://lists.nongnu.org/archive/html/qemu-devel/2019-08/msg06333.html] + +Signed-off-by: He Zhe <zhe.he@windriver.com> +--- + configure | 48 ++++++++++++++++++++++++++++++++++++++++-------- + 1 file changed, 40 insertions(+), 8 deletions(-) + +diff --git a/configure b/configure +index e44e454..0f362a7 100755 +--- a/configure ++++ b/configure +@@ -2875,6 +2875,30 @@ has_libgcrypt() { + return 0 + } + ++has_libgcrypt_pkgconfig() { ++ if ! has $pkg_config ; then ++ return 1 ++ fi ++ ++ if ! $pkg_config --list-all | grep libgcrypt > /dev/null 2>&1 ; then ++ return 1 ++ fi ++ ++ if test -n "$cross_prefix" ; then ++ host=$($pkg_config --variable=host libgcrypt) ++ if test "${host%-gnu}-" != "${cross_prefix%-gnu}" ; then ++ print_error "host($host) does not match cross_prefix($cross_prefix)" ++ return 1 ++ fi ++ fi ++ ++ if ! $pkg_config --atleast-version=1.5.0 libgcrypt ; then ++ print_error "libgcrypt version is $($pkg_config --modversion libgcrypt)" ++ return 1 ++ fi ++ ++ return 0 ++} + + if test "$nettle" != "no"; then + pass="no" +@@ -2902,7 +2926,14 @@ fi + + if test "$gcrypt" != "no"; then + pass="no" +- if has_libgcrypt; then ++ if has_libgcrypt_pkgconfig; then ++ gcrypt_cflags=$($pkg_config --cflags libgcrypt) ++ if test "$static" = "yes" ; then ++ gcrypt_libs=$($pkg_config --libs --static libgcrypt) ++ else ++ gcrypt_libs=$($pkg_config --libs libgcrypt) ++ fi ++ elif has_libgcrypt; then + gcrypt_cflags=$(libgcrypt-config --cflags) + gcrypt_libs=$(libgcrypt-config --libs) + # Debian has removed -lgpg-error from libgcrypt-config +@@ -2912,15 +2943,16 @@ if test "$gcrypt" != "no"; then + then + gcrypt_libs="$gcrypt_libs -lgpg-error" + fi ++ fi + +- # Link test to make sure the given libraries work (e.g for static). +- write_c_skeleton +- if compile_prog "" "$gcrypt_libs" ; then +- LIBS="$gcrypt_libs $LIBS" +- QEMU_CFLAGS="$QEMU_CFLAGS $gcrypt_cflags" +- pass="yes" +- fi ++ # Link test to make sure the given libraries work (e.g for static). ++ write_c_skeleton ++ if compile_prog "" "$gcrypt_libs" ; then ++ LIBS="$gcrypt_libs $LIBS" ++ QEMU_CFLAGS="$QEMU_CFLAGS $gcrypt_cflags" ++ pass="yes" + fi ++ + if test "$pass" = "yes"; then + gcrypt="yes" + cat > $TMPC << EOF +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/flash_stripe.c b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/flash_stripe.c new file mode 100644 index 000000000..a9a6e76a5 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/flash_stripe.c @@ -0,0 +1,176 @@ +/* + * Stripe a flash image across multiple files. + * + * Copyright (C) 2019 Xilinx, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include <stdio.h> +#include <stdlib.h> +#include <stdint.h> +#include <stdbool.h> +#include <unistd.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <fcntl.h> +#include <string.h> + +/* N way (num) in place bit striper. Lay out row wise bits column wise + * (from element 0 to N-1). num is the length of x, and dir reverses the + * direction of the transform. be determines the bit endianess scheme. + * false to lay out bits LSB to MSB (little endian) and true for big endian. + * + * Best illustrated by examples: + * Each digit in the below array is a single bit (num == 3, be == false): + * + * {{ 76543210, } ----- stripe (dir == false) -----> {{ FCheb630, } + * { hgfedcba, } { GDAfc741, } + * { HGFEDCBA, }} <---- upstripe (dir == true) ----- { HEBgda52, }} + * + * Same but with be == true: + * + * {{ 76543210, } ----- stripe (dir == false) -----> {{ 741gdaFC, } + * { hgfedcba, } { 630fcHEB, } + * { HGFEDCBA, }} <---- upstripe (dir == true) ----- { 52hebGDA, }} + */ + +static inline void stripe8(uint8_t *x, int num, bool dir, bool be) +{ + uint8_t r[num]; + memset(r, 0, sizeof(uint8_t) * num); + int idx[2] = {0, 0}; + int bit[2] = {0, be ? 7 : 0}; + int d = dir; + + for (idx[0] = 0; idx[0] < num; ++idx[0]) { + for (bit[0] = be ? 7 : 0; bit[0] != (be ? -1 : 8); bit[0] += be ? -1 : 1) { + r[idx[!d]] |= x[idx[d]] & 1 << bit[d] ? 1 << bit[!d] : 0; + idx[1] = (idx[1] + 1) % num; + if (!idx[1]) { + bit[1] += be ? -1 : 1; + } + } + } + memcpy(x, r, sizeof(uint8_t) * num); +} + +int main (int argc, char *argv []) { +#ifdef UNSTRIPE + bool unstripe = true; +#else + bool unstripe = false; +#endif + +#ifdef FLASH_STRIPE_BE + bool be = true; +#else + bool be = false; +#endif + + int i; + + const char *exe_name = argv[0]; + argc--; + argv++; + + if (argc < 2) { + fprintf(stderr, "ERROR: %s requires at least two args\n", exe_name); + return 1; + } + + const char *single_f = argv[0]; + int single; + + if (unstripe) { + single = creat(single_f, 0644); + } else { + single = open(single_f, 0); + } + if (single == -1) { + perror(argv[0]); + return 1; + } + + argv++; + argc--; + + int multiple[argc]; + + for (i = 0; i < argc; ++i) { + if (unstripe) { + multiple[i] = open(argv[i], 0); + } else { + multiple[i] = creat(argv[i], 0644); + } + if (multiple[i] == -1) { + perror(argv[i]); + return 1; + } + } + + while (true) { + uint8_t buf[argc]; + for (i = 0; i < argc; ++i) { + switch (read(!unstripe ? single : multiple[ +#if defined(FLASH_STRIPE_BW) && defined (FLASH_STRIPE_BE) + argc - 1 - +#endif + i], &buf[i], 1)) { + case 0: + if (i == 0) { + goto done; + } else if (!unstripe) { + fprintf(stderr, "WARNING:input file %s is not multiple of " + "%d bytes, padding with garbage byte\n", single_f, + argc); + } + break; + case -1: + perror(unstripe ? argv[i] : single_f); + return 1; + } + } + +#ifndef FLASH_STRIPE_BW + stripe8(buf, argc, unstripe, be); +#endif + + for (i = 0; i < argc; ++i) { + switch (write(unstripe ? single : multiple[ +#if defined(FLASH_STRIPE_BW) && defined (FLASH_STRIPE_BE) + argc - 1 - +#endif + i], &buf[i], 1)) { + case -1: + perror(unstripe ? single_f : argv[i]); + return 1; + case 0: + i--; /* try again */ + } + } + } + +done: + close(single); + for (i = 0; i < argc; ++i) { + close(multiple[argc]); + } + return 0; +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch index ba0e27430..6f7fb5225 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch @@ -38,6 +38,7 @@ if (mbtype == 'PMU' and os.path.exists(PMU_rom)) or mbtype == 'PLM': # We need to switch tcp serial arguments (if they exist, e.g. qemurunner) to get the output correctly tcp_serial_ports = [i for i, s in enumerate(APU_args) if 'tcp:127.0.0.1:' in s] + #NEED TO FIX for next yocto release (dont need to switch ports anymore, they will be provided correctly upstream # We can only switch these if there are exactly two, otherwise we can't assume what is being executed so we leave it as is if len(tcp_serial_ports) == 2: APU_args[tcp_serial_ports[0]],APU_args[tcp_serial_ports[1]] = APU_args[tcp_serial_ports[1]],APU_args[tcp_serial_ports[0]] diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/flashstrip_1.0.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/flashstrip_1.0.bb new file mode 100644 index 000000000..eec7b2dad --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/flashstrip_1.0.bb @@ -0,0 +1,25 @@ +SUMMARY = "Building and installing flash strip utility" +DESCRIPTION = "Building and installing flash strip utility" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://../flash_stripe.c;beginline=1;endline=23;md5=abb859d98b7c4eede655e1b71824125a" + +B = "${WORKDIR}/build" + +SRC_URI += "file://flash_stripe.c" + +TARGET_CC_ARCH += "${LDFLAGS}" + +do_compile() { + ${CC} ${WORKDIR}/flash_stripe.c -o flash_strip + ${CC} ${WORKDIR}/flash_stripe.c -o flash_unstrip + ${CC} ${WORKDIR}/flash_stripe.c -o flash_strip_bw -DFLASH_STRIPE_BW + ${CC} ${WORKDIR}/flash_stripe.c -o flash_unstrip_bw -DUNSTRIP -DFLASH_STRIPE_BW +} + +do_install() { + install -d ${D}${bindir} + install -Dm 0755 ${B}/* ${D}${bindir}/ +} + +FILES_${PN} = "${bindir}/*" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees.inc b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees.inc index d4044ed72..8e752921a 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees.inc @@ -9,6 +9,9 @@ LIC_FILES_CHKSUM = "file://Makefile;beginline=1;endline=27;md5=7348b6cbcae69912c PV = "xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" +SRC_URI_append = " file://0001-Makefile-Use-python3-instead-of-python.patch" + BRANCH ?= "" REPO ?= "git://github.com/Xilinx/qemu-devicetrees.git;protocol=https" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees/0001-Makefile-Use-python3-instead-of-python.patch b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees/0001-Makefile-Use-python3-instead-of-python.patch new file mode 100644 index 000000000..afbe31560 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees/0001-Makefile-Use-python3-instead-of-python.patch @@ -0,0 +1,30 @@ +From e5af9cc9b167acc5c04d15fea03b34b70ec537c9 Mon Sep 17 00:00:00 2001 +From: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> +Date: Sun, 7 Jun 2020 20:35:59 -0700 +Subject: [PATCH] Makefile:Use python3 instead of python + +Signed-off-by: Sai Hari Chandana Kalluri <chandana.kalluri@xilinx.com> +--- + Makefile | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/Makefile b/Makefile +index 36b4937..efaa39a 100644 +--- a/Makefile ++++ b/Makefile +@@ -89,9 +89,9 @@ $(LQSPI_XIP_OUTDIR)/%.dts: %.dts $(DTSI_FILES) $(HEADER_FILES) + # TODO: Add support for auto-generated dependency list + versal-pmc-npi.dtsi: versal-pmc-npi-nxx.dtsi + versal-pmc-npi-nxx.dtsi: Makefile +- @python -c 'for a in range(0, 54): print("\tGEN_NMU(" + str(a) + ")")' > $@ +- @python -c 'for a in range(0, 50): print("\tGEN_NSU(" + str(a) + ")")' >> $@ +- @python -c 'for a in range(0, 146): print("\tGEN_NPS(" + str(a) + ")")' >> $@ ++ @python3 -c 'for a in range(0, 54): print("\tGEN_NMU(" + str(a) + ")")' > $@ ++ @python3 -c 'for a in range(0, 50): print("\tGEN_NSU(" + str(a) + ")")' >> $@ ++ @python3 -c 'for a in range(0, 146): print("\tGEN_NPS(" + str(a) + ")")' >> $@ + + clean: + $(RM) versal-pmc-npi-nxx.dtsi +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2019.1.bb deleted file mode 100644 index 064816609..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2019.1.bb +++ /dev/null @@ -1,6 +0,0 @@ -require qemu-devicetrees.inc - -XILINX_RELEASE_VERSION = "v2019.1" - -BRANCH ?= "branch/xilinx-v2019.1" -SRCREV ?= "445406ef4d06303f00387f7d81e8718255336fd0" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2020.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2020.1.bb new file mode 100644 index 000000000..26914f5a6 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-devicetrees_2020.1.bb @@ -0,0 +1,4 @@ +require qemu-devicetrees.inc + +BRANCH ?= "master" +SRCREV ?= "${AUTOREV}" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb index a9b11c6c6..55cec776b 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb @@ -15,6 +15,6 @@ do_compile[noexec] = "1" SYSROOT_DIRS += "${bindir}/qemu-xilinx" do_install() { - install -Dm 0755 ${WORKDIR}/qemu-system-aarch64-multiarch ${D}${bindir}/qemu-xilinx/qemu-system-aarch64-multiarch + install -Dm 0755 ${WORKDIR}/qemu-system-aarch64-multiarch ${D}${bindir}/qemu-system-aarch64-multiarch } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native.inc b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native.inc index aae607f56..a1dc5d662 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native.inc @@ -4,4 +4,8 @@ require qemu-xilinx.inc DEPENDS = "glib-2.0-native zlib-native" SRC_URI_remove = "file://0012-fix-libcap-header-issue-on-some-distro.patch" -SRC_URI_remove = "file://0013-cpus.c-Add-error-messages-when-qemi_cpu_kick_thread-.patch"
\ No newline at end of file +SRC_URI_remove = "file://0013-cpus.c-Add-error-messages-when-qemi_cpu_kick_thread-.patch" + +do_install_append(){ + rm -rf ${D}${datadir}/icons +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native_2020.1.bb index bc5a3850c..45d474d1e 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native_2019.1.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-native_2020.1.bb @@ -3,5 +3,4 @@ BPN = "qemu-xilinx" EXTRA_OECONF_append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent" - -SRC_URI_append = "file://0001-linux-user-disable-qemu-bridge-helper-and-socket_scm.patch" +PROVIDES = "qemu-native" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-system-native_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-system-native_2020.1.bb index a138704e0..93afebed2 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-system-native_2019.1.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx-system-native_2020.1.bb @@ -12,5 +12,6 @@ do_install_append() { # The following is also installed by qemu-native rm -f ${D}${datadir}/${BPN}/trace-events-all rm -rf ${D}${datadir}/${BPN}/keymaps + rm -rf ${D}${datadir}/icons } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx.inc b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx.inc index ad44f098c..d7b495b67 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx.inc @@ -1,53 +1,45 @@ SUMMARY = "Xilinx's fork of a fast open source processor emulator" HOMEPAGE = "https://github.com/xilinx/qemu/" -QEMU_TARGETS = "aarch64 arm microblaze microblazeel" - -XILINX_RELEASE_VERSION = "v2019.1" -XILINX_QEMU_VERSION ?= "v2.11.1" -BRANCH ?= "branch/xilinx-v2019.1" -SRCREV ?= "5f38ea92fb697b94ad43f01fe162f3ed6e6b0e16" - +# x86_64 is needed to build nativesdks +QEMU_TARGETS = "aarch64 arm microblaze microblazeel x86_64" LIC_FILES_CHKSUM = " \ file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \ - file://COPYING.LIB;endline=24;md5=c04def7ae38850e7d3ef548588159913 \ + file://COPYING.LIB;endline=24;md5=8c5efda6cf1e1b03dcfd0e6c0d271c7f \ " DEPENDS = "glib-2.0 zlib pixman" +XILINX_QEMU_VERSION ?= "v4.1.50" +BRANCH ?= "master" +SRCREV ?= "${AUTOREV}" + FILESEXTRAPATHS_prepend := "${THISDIR}/files:" PV = "${XILINX_QEMU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" BRANCH ?= "" -REPO ?= "git://github.com/Xilinx/qemu.git;protocol=https" +REPO ?= "gitsm://github.com/Xilinx/qemu.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" +SRC_URI_append = " file://0010-configure-Add-pkg-config-handling-for-libgcrypt.patch \ + file://0001-Add-enable-disable-udev.patch \ +" + S = "${WORKDIR}/git" # Disable KVM completely PACKAGECONFIG_remove = "kvm" - -# Enable libgcrypt -PACKAGECONFIG_append = " gcrypt" +PACKAGECONFIG_append = " fdt gcrypt" DISABLE_STATIC_pn-${PN} = "" PTEST_ENABLED = "" -# append a suffix dir, to allow multiple versions of QEMU to be installed -EXTRA_OECONF_append = " \ - --bindir=${bindir}/qemu-xilinx \ - --libexecdir=${libexecdir}/qemu-xilinx \ - " - -do_configure_prepend() { - # rewrite usage of 'libgcrypt-config' with 'pkg-config libgcrypt' - sed -r -i 's/libgcrypt-config(\s*--)/pkg-config libgcrypt\1/g' ${S}/configure -} +EXTRA_OECONF_append = " --with-git=/bin/false --disable-git-update" do_install_append() { # Prevent QA warnings about installed ${localstatedir}/run if [ -d ${D}${localstatedir}/run ]; then rmdir ${D}${localstatedir}/run; fi -}
\ No newline at end of file +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx_2020.1.bb index c158b1857..09f431eca 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx_2019.1.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/qemu/qemu-xilinx_2020.1.bb @@ -5,6 +5,9 @@ BBCLASSEXTEND = "nativesdk" RDEPENDS_${PN}_class-target += "bash" +PROVIDES_class-nativesdk = "nativesdk-qemu" +RPROVIDES_${PN}_class-nativesdk = "nativesdk-qemu" + EXTRA_OECONF_append_class-target = " --target-list=${@get_qemu_target_list(d)}" EXTRA_OECONF_append_class-nativesdk = " --target-list=${@get_qemu_target_list(d)}" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-devtools/run-postinsts/run-postinsts_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/run-postinsts/run-postinsts_%.bbappend new file mode 100644 index 000000000..3923fa2d5 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-devtools/run-postinsts/run-postinsts_%.bbappend @@ -0,0 +1,7 @@ +# Update-alternatives is not able to find stdout when using JTAG boot mode on +# our devices, exits ungracefully without performing the required work (symbolic +# linking), pass kmsg to it as output to achieve proper behavior. + +do_install_append(){ + sed -i "s/sh -c \$i \$append_log/sh -c \$i > \/dev\/kmsg/" ${D}${sbindir}/run-postinsts +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/cairo/cairo_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/cairo/cairo_%.bbappend new file mode 100644 index 000000000..b2942a820 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/cairo/cairo_%.bbappend @@ -0,0 +1,2 @@ +PACKAGECONFIG_zynqmp += "${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'x11 xcb', '', d)} \ + egl glesv2" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/egl.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/egl.pc index f9935f258..65c4c1f3a 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/egl.pc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/egl.pc @@ -6,7 +6,7 @@ includedir=/usr/include Name: egl Description: MALI EGL library Requires.private: -Version: r8p0 +Version: 17.3 Libs: -L${libdir} -lEGL Libs.private: -lm -lpthread -ldl Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/gbm.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/gbm.pc index 02ea94e6f..c40b5f4fd 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/gbm.pc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/gbm.pc @@ -6,7 +6,7 @@ includedir=/usr/include Name: gbm Description: MALI gbm library Requires.private: -Version: r8p0 +Version: 17.3 Libs: -L${libdir} -lgbm Libs.private: -lm -lpthread -ldl Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1.pc index 489540079..39467f332 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1.pc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1.pc @@ -6,7 +6,7 @@ includedir=/usr/include Name: glesv1 Description: MALI OpenGL ES 1.1 library Requires.private: -Version: r8p0 +Version: 17.3 Libs: -L${libdir} -lGLESv1_CM Libs.private: -lm -lpthread -ldl Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1_cm.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1_cm.pc index 888af87ef..1547b4c82 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1_cm.pc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv1_cm.pc @@ -6,7 +6,7 @@ includedir=/usr/include Name: gles_cm Description: Mali OpenGL ES 1.1 CM library Requires.private: -Version: r8p0 +Version: 17.3 Libs: -L${libdir} -lGLESv1_CM Libs.private: -lm -lpthread -ldl Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv2.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv2.pc index 5047c3948..a0a84f233 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv2.pc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/glesv2.pc @@ -6,7 +6,7 @@ includedir=/usr/include Name: glesv2 Description: MALI OpenGL ES 2.0 library Requires.private: -Version: r8p0 +Version: 17.3 Libs: -L${libdir} -lGLESv2 Libs.private: -lm -lpthread -ldl Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/wayland-egl.pc b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/wayland-egl.pc deleted file mode 100644 index 719fb3e43..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/files/wayland-egl.pc +++ /dev/null @@ -1,12 +0,0 @@ -prefix=/usr -exec_prefix=${prefix} -libdir=/usr/lib -includedir=/usr/include - -Name: wayland-egl -Description: MALI wayland-egl library -Requires.private: -Version: r8p0 -Libs: -L${libdir} -lwayland-egl -Libs.private: -lm -lpthread -ldl -Cflags: -I${includedir} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/libmali-xlnx.bb b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/libmali-xlnx.bb index 113710e33..8a1451e58 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/libmali-xlnx.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libgles/libmali-xlnx.bb @@ -1,68 +1,65 @@ DESCRIPTION = "libGLES for ZynqMP with Mali 400" LICENSE = "Proprietary" -LICENSE_FLAGS = "xilinx" -LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/Proprietary;md5=0557f9d92cf58f2ccdd50f62f8ac0b28" +LIC_FILES_CHKSUM = "file://EULA;md5=82e466d0ed92c5a15f568dbe6b31089c" -inherit distro_features_check -inherit xilinx-fetch-restricted +inherit features_check update-alternatives -ANY_OF_DISTRO_FEATURES = "fbdev x11" +ANY_OF_DISTRO_FEATURES = "x11 fbdev wayland" PROVIDES += "virtual/libgles1 virtual/libgles2 virtual/egl virtual/libgbm" -FILESEXTRAPATHS_append := " \ - ${THISDIR}/files: \ - ${THISDIR}/r8p0-00rel0: " +FILESEXTRAPATHS_prepend := "${THISDIR}/files:" +REPO ?= "git://github.com/Xilinx/mali-userspace-binaries.git;protocol=https" +BRANCH ?= "rel-v2020.1" +SRCREV ?= "da73805e3e011382c4d014ac10037cd193aaa9a0" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" -# Fetch the MALI 400 binaries from here -# https://www.xilinx.com/member/forms/download/mali-driver-license.html?filename=mali-400-userspace.tar - -PV = "r8p0-01rel0" +PV = "r9p0-01rel0" SRC_URI = " \ - https://www.xilinx.com/member/forms/download/mali-driver-license.html?filename=mali-400-userspace.tar;downloadfilename=mali-400-userspace.tar \ + ${REPO};${BRANCHARG} \ file://egl.pc \ file://glesv1_cm.pc \ file://glesv1.pc \ file://glesv2.pc \ - file://wayland-egl.pc \ file://gbm.pc \ " -SRC_URI[md5sum] = "4fd3456564ef8c818e21432221c9e1b7" -SRC_URI[sha256sum] = "26d473ae77c36104a215710beca55a22a712850dc26547dde950c7398210602c" - COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmpeg = "zynqmpeg" COMPATIBLE_MACHINE_zynqmpev = "zynqmpev" -PACKAGE_ARCH = "${SOC_FAMILY}" +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" -S = "${WORKDIR}/mali-400" +S = "${WORKDIR}/git" +# If were switching at runtime, we would need all RDEPENDS needed for all backends available X11RDEPENDS = "libxdamage libxext libx11 libdrm libxfixes" X11DEPENDS = "libxdamage libxext virtual/libx11 libdrm libxfixes" +# Don't install runtime dependencies for other backends unless the DISTRO supports it RDEPENDS_${PN} = " \ - kernel-module-mali \ - ${@bb.utils.contains('DISTRO_FEATURES', 'x11', '${X11RDEPENDS}', '', d)} \ - " + kernel-module-mali \ + ${@bb.utils.contains('DISTRO_FEATURES', 'x11', '${X11RDEPENDS}', '', d)} \ +" +# We dont build anything but we want to avoid QA warning build-deps DEPENDS = "\ - ${@bb.utils.contains('DISTRO_FEATURES', 'x11', '${X11DEPENDS}', '', d)} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'wayland', 'wayland libdrm', '', d)} \ - " + ${@bb.utils.contains('DISTRO_FEATURES', 'x11', '${X11DEPENDS}', '', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'wayland', 'wayland libdrm', '', d)} \ +" + + +# x11 is default, set to "fbdev" , "wayland", or "headless" if required +MALI_BACKEND_DEFAULT ?= "x11" USE_X11 = "${@bb.utils.contains("DISTRO_FEATURES", "x11", "yes", "no", d)}" USE_FB = "${@bb.utils.contains("DISTRO_FEATURES", "fbdev", "yes", "no", d)}" USE_WL = "${@bb.utils.contains("DISTRO_FEATURES", "wayland", "yes", "no", d)}" -do_compile() { - # Extract the MALI binaries into workdir - tar -xf ${WORKDIR}/mali/rel-v2018.3/r8p0-01rel0.tar -C ${S} -} +MONOLITHIC_LIBMALI = "libMali.so.9.0" do_install() { #Identify the ARCH type @@ -94,26 +91,84 @@ do_install() { cp -a --no-preserve=ownership ${S}/${PV}/${ARCH_PLATFORM_DIR}/common/*.so* ${D}${libdir} - if [ "${USE_WL}" = "yes" ]; then - install -m 0644 ${S}/${PV}/glesHeaders/GBM/gbm.h ${D}${includedir}/ - install -m 0644 ${WORKDIR}/gbm.pc ${D}${libdir}/pkgconfig/gbm.pc - install -m 0644 ${WORKDIR}/wayland-egl.pc ${D}${libdir}/pkgconfig/wayland-egl.pc - install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/wayland/libMali.so.8.0 ${D}${libdir}/wayland/libMali.so.8.0 - ln -snf wayland/libMali.so.8.0 ${D}${libdir}/libMali.so.8.0 - elif [ "${USE_X11}" = "yes" ]; then - install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/x11/libMali.so.8.0 ${D}${libdir}/x11/libMali.so.8.0 - ln -snf x11/libMali.so.8.0 ${D}${libdir}/libMali.so.8.0 - elif [ "${USE_FB}" = "yes" ]; then - install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/fbdev/libMali.so.8.0 ${D}${libdir}/fbdev/libMali.so.8.0 - ln -snf fbdev/libMali.so.8.0 ${D}${libdir}/libMali.so.8.0 - else - install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/headless/libMali.so.8.0 ${D}${libdir}/headless/libMali.so.8.0 - ln -snf headless/libMali.so.8.0 ${D}${libdir}/libMali.so.8.0 - fi + install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/headless/${MONOLITHIC_LIBMALI} ${D}${libdir}/headless/${MONOLITHIC_LIBMALI} + ln -snf headless/${MONOLITHIC_LIBMALI} ${D}${libdir}/${MONOLITHIC_LIBMALI} - if ${@bb.utils.contains('DISTRO_FEATURES', 'x11', 'false', 'true', d)}; then + if [ "${USE_FB}" = "yes" ]; then + install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/fbdev/${MONOLITHIC_LIBMALI} ${D}${libdir}/fbdev/${MONOLITHIC_LIBMALI} + if [ "${MALI_BACKEND_DEFAULT}" = "fbdev" ]; then + ln -snf fbdev/${MONOLITHIC_LIBMALI} ${D}${libdir}/${MONOLITHIC_LIBMALI} + fi + fi + if [ "${USE_X11}" = "yes" ]; then + install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/x11/${MONOLITHIC_LIBMALI} ${D}${libdir}/x11/${MONOLITHIC_LIBMALI} + if [ "${MALI_BACKEND_DEFAULT}" = "x11" ]; then + ln -snf x11/${MONOLITHIC_LIBMALI} ${D}${libdir}/${MONOLITHIC_LIBMALI} + fi + else + # We cant rely on the fact that all apps will use pkgconfig correctly sed -i -e 's/^#if defined(MESA_EGL_NO_X11_HEADERS)$/#if (1)/' ${D}${includedir}/EGL/eglplatform.h fi + if [ "${USE_WL}" = "yes" ]; then + install -m 0644 ${S}/${PV}/glesHeaders/GBM/gbm.h ${D}${includedir}/ + install -m 0644 ${WORKDIR}/gbm.pc ${D}${libdir}/pkgconfig/gbm.pc + install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/wayland/${MONOLITHIC_LIBMALI} ${D}${libdir}/wayland/${MONOLITHIC_LIBMALI} + if [ "${MALI_BACKEND_DEFAULT}" = "wayland" ]; then + ln -snf wayland/${MONOLITHIC_LIBMALI} ${D}${libdir}/${MONOLITHIC_LIBMALI} + fi + fi +} + + +# We need separate packages to provide multiple alternatives, at this point we install +# everything on the default one but that can be split if necessary +PACKAGES += "${PN}-x11 ${PN}-fbdev ${PN}-wayland ${PN}-headless" + +# This is default/common for all alternatives +ALTERNATIVE_LINK_NAME[libmali-xlnx] = "${libdir}/${MONOLITHIC_LIBMALI}" + + +# Declare alternatives and corresponding library location +ALTERNATIVE_${PN}-x11 = "libmali-xlnx" +ALTERNATIVE_TARGET_libmali-xlnx-x11[libmali-xlnx] = "${libdir}/x11/${MONOLITHIC_LIBMALI}" + +ALTERNATIVE_${PN}-fbdev = "libmali-xlnx" +ALTERNATIVE_TARGET_libmali-xlnx-fbdev[libmali-xlnx] = "${libdir}/fbdev/${MONOLITHIC_LIBMALI}" + +ALTERNATIVE_${PN}-wayland = "libmali-xlnx" +ALTERNATIVE_TARGET_libmali-xlnx-wayland[libmali-xlnx] = "${libdir}/wayland/${MONOLITHIC_LIBMALI}" + +ALTERNATIVE_${PN}-headless = "libmali-xlnx" +ALTERNATIVE_TARGET_libmali-xlnx-headless[libmali-xlnx] = "${libdir}/headless/${MONOLITHIC_LIBMALI}" + +# Set priorities according to what we prveiously defined +ALTERNATIVE_PRIORITY_libmali-xlnx-x11[libmali-xlnx] = "${@bb.utils.contains("MALI_BACKEND_DEFAULT", "x11", "20", "10", d)}" +ALTERNATIVE_PRIORITY_libmali-xlnx-fbdev[libmali-xlnx] = "${@bb.utils.contains("MALI_BACKEND_DEFAULT", "fbdev", "20", "10", d)}" +ALTERNATIVE_PRIORITY_libmali-xlnx-wayland[libmali-xlnx] = "${@bb.utils.contains("MALI_BACKEND_DEFAULT", "wayland", "20", "10", d)}" + +# If misconfigured, fallback to headless +ALTERNATIVE_PRIORITY_libmali-xlnx-headless[libmali-xlnx] = "${@bb.utils.contains("MALI_BACKEND_DEFAULT", "headless", "20", "15", d)}" + + +# Package gets renamed on the debian class, but we want to keep -xlnx +DEBIAN_NOAUTONAME_libmali-xlnx = "1" + +# Update alternatives will actually have separate postinst scripts (one for each package) +# This wont work for us, so we create a common postinst script and we pass that as the general +# libmali-xlnx postinst script, but we defer execution to run on first boot (pkg_postinst_ontarget). +# This will avoid ldconfig removing the symbolic links when creating the root filesystem. +python populate_packages_updatealternatives_append () { + # We need to remove the 'fake' libmali-xlnx before creating any links + libdir = d.getVar('libdir') + common_postinst = "#!/bin/sh\nrm " + libdir + "/${MONOLITHIC_LIBMALI}\n" + for pkg in (d.getVar('PACKAGES') or "").split(): + # Not all packages provide an alternative (e.g. ${PN}-lic) + postinst = d.getVar('pkg_postinst_%s' % pkg) + if postinst: + old_postinst = postinst + new_postinst = postinst.replace('#!/bin/sh','') + common_postinst += new_postinst + d.setVar('pkg_postinst_ontarget_%s' % 'libmali-xlnx', common_postinst) } @@ -130,3 +185,17 @@ RCONFLICTS_${PN} = "libegl libgles1 libglesv1-cm1 libgles2 libglesv2-2 libgbm" # explicitly depends upon them. EXCLUDE_FROM_WORLD = "1" FILES_${PN} += "${libdir}/*" + +do_package_append() { + + shlibswork_dir = d.getVar('SHLIBSWORKDIR') + pkg_filename = d.getVar('PN') + ".list" + shlibs_file = os.path.join(shlibswork_dir, pkg_filename) + lines = "" + with open(shlibs_file, "r") as f: + lines = f.readlines() + with open(shlibs_file, "w") as f: + for line in lines: + if d.getVar('MALI_BACKEND_DEFAULT') in line.strip("\n"): + f.write(line) +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libglu/libglu_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libglu/libglu_%.bbappend new file mode 100644 index 000000000..56924658c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/libglu/libglu_%.bbappend @@ -0,0 +1 @@ +DEPENDS_append_zynqmp = " virtual/libgles2" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali.bb b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali.bb index fe2fbdcf5..747ec724c 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali.bb @@ -3,10 +3,10 @@ SECTION = "kernel/modules" LICENSE = "GPLv2" LIC_FILES_CHKSUM = " \ - file://linux/license/gpl/mali_kernel_license.h;md5=436192a2c5cfd47df0ad1987dffc4ae6 \ + file://linux/license/gpl/mali_kernel_license.h;md5=f5af2d61f4c1eb262cb6a557aaa1070a \ " -PV = "r8p0-01rel0" +PV = "r9p0-01rel0" SRC_URI = " \ https://developer.arm.com/-/media/Files/downloads/mali-drivers/kernel/mali-utgard-gpu/DX910-SW-99002-${PV}.tgz \ @@ -16,21 +16,23 @@ SRC_URI = " \ file://0004-staging-mali-r8p0-01rel0-Don-t-include-mali_read_phy.patch \ file://0005-linux-mali_kernel_linux.c-Handle-clock-when-probed-a.patch \ file://0006-arm.c-global-variable-dma_ops-is-removed-from-the-ke.patch \ - file://0007-Replace-__GFP_REPEAT-by-__GFP_RETRY_MAYFAIL.patch \ - file://0008-mali_internal_sync-Rename-wait_queue_t-with-wait_que.patch \ - file://0009-mali_memory_swap_alloc.c-Rename-global_page_state-wi.patch \ file://0010-common-mali_pm.c-Add-PM-runtime-barrier-after-removi.patch \ file://0011-linux-mali_kernel_linux.c-Enable-disable-clock-for-r.patch\ file://0012-linux-mali_memory_os_alloc-Remove-__GFP_COLD.patch\ file://0013-linux-mali_memory_secure-Add-header-file-dma-direct..patch\ file://0014-linux-mali_-timer-Get-rid-of-init_timer.patch\ + file://0015-fix-driver-failed-to-check-map-error.patch \ + file://0016-mali_memory_secure-Kernel-5.0-onwards-access_ok-API-.patch \ + file://0017-Support-for-vm_insert_pfn-deprecated-from-kernel-4.2.patch \ + file://0018-Change-return-type-to-vm_fault_t-for-fault-handler.patch \ + file://0019-get_monotonic_boottime-ts-deprecated-from-kernel-4.2.patch \ " -SRC_URI[md5sum] = "8f04ae86957fd56197ad5a9d017b84ff" -SRC_URI[sha256sum] = "bfd14fa3f75a71d4ba313534e651ca1c58dc354e882c0b39867e335882a06350" +SRC_URI[md5sum] = "85ea110dd6675c70b7d01af87ec9633c" +SRC_URI[sha256sum] = "7a67127341d17640c1fff5dad80258fb2a37c8a2121b81525fe2327e4532ce2b" inherit module -do_make_scripts[depends] += "virtual/kernel:do_unpack" +PARALLEL_MAKE = "-j 1" S = "${WORKDIR}/DX910-SW-99002-${PV}/driver/src/devicedrv/mali" @@ -38,7 +40,7 @@ COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmpeg = "zynqmpeg" COMPATIBLE_MACHINE_zynqmpev = "zynqmpev" -PACKAGE_ARCH = "${SOC_FAMILY}${SOC_VARIANT}" +PACKAGE_ARCH = "${SOC_VARIANT_ARCH}" EXTRA_OEMAKE = 'KDIR="${STAGING_KERNEL_DIR}" \ ARCH="${ARCH}" \ @@ -47,6 +49,5 @@ EXTRA_OEMAKE = 'KDIR="${STAGING_KERNEL_DIR}" \ USING_DT=1 \ MALI_SHARED_INTERRUPTS=1 \ CROSS_COMPILE="${TARGET_PREFIX}" \ - O=${STAGING_KERNEL_BUILDDIR} \ MALI_QUIET=1 \ ' diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0001-Change-Makefile-to-be-compatible-with-Yocto.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0001-Change-Makefile-to-be-compatible-with-Yocto.patch index e5eeb19fd..3c82f602a 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0001-Change-Makefile-to-be-compatible-with-Yocto.patch +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0001-Change-Makefile-to-be-compatible-with-Yocto.patch @@ -21,9 +21,9 @@ index 5a259fe..a6dd94c 100644 -include $(KDIR)/.config +ifeq ($(O),) -+ include $(KDIR)/.config ++ -include $(KDIR)/.config +else -+ include $(O)/.config ++ -include $(O)/.config +endif ifeq ($(ARCH), arm) diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0007-Replace-__GFP_REPEAT-by-__GFP_RETRY_MAYFAIL.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0007-Replace-__GFP_REPEAT-by-__GFP_RETRY_MAYFAIL.patch deleted file mode 100644 index 6e5f54479..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0007-Replace-__GFP_REPEAT-by-__GFP_RETRY_MAYFAIL.patch +++ /dev/null @@ -1,54 +0,0 @@ -From a8190cd3b346633016d1c0096ef73e0e1ceef438 Mon Sep 17 00:00:00 2001 -From: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Date: Tue, 5 Dec 2017 09:25:15 -0800 -Subject: [PATCH 7/9] Replace __GFP_REPEAT by __GFP_RETRY_MAYFAIL - -Refer kernel patch dcda9b04713c3f6ff0875652924844fae28286ea -which replaces with a useful semantic - -Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Upstream-Status: Pending ---- - driver/src/devicedrv/mali/linux/mali_memory_os_alloc.c | 4 ++++ - driver/src/devicedrv/mali/linux/mali_osk_notification.c | 7 ++++++- - 2 files changed, 10 insertions(+), 1 deletion(-) - -diff --git a/driver/src/devicedrv/mali/linux/mali_memory_os_alloc.c b/driver/src/devicedrv/mali/linux/mali_memory_os_alloc.c -index 5fe1270..1602371 100644 ---- linux/mali_memory_os_alloc.c -+++ b/linux/mali_memory_os_alloc.c -@@ -202,7 +202,11 @@ int mali_mem_os_alloc_pages(mali_mem_os_mem *os_mem, u32 size) - /* Allocate new pages, if needed. */ - for (i = 0; i < remaining; i++) { - dma_addr_t dma_addr; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) -+ gfp_t flags = __GFP_ZERO | __GFP_RETRY_MAYFAIL | __GFP_NOWARN | __GFP_COLD; -+#else - gfp_t flags = __GFP_ZERO | __GFP_REPEAT | __GFP_NOWARN | __GFP_COLD; -+#endif - int err; - - #if defined(CONFIG_ARM) && !defined(CONFIG_ARM_LPAE) -diff --git a/driver/src/devicedrv/mali/linux/mali_osk_notification.c b/driver/src/devicedrv/mali/linux/mali_osk_notification.c -index b22fe68..d0c302a 100644 ---- linux/mali_osk_notification.c -+++ b/linux/mali_osk_notification.c -@@ -55,9 +55,14 @@ _mali_osk_notification_t *_mali_osk_notification_create(u32 type, u32 size) - { - /* OPT Recycling of notification objects */ - _mali_osk_notification_wrapper_t *notification; -- -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) -+ notification = (_mali_osk_notification_wrapper_t *)kmalloc(sizeof(_mali_osk_notification_wrapper_t) + size, -+ GFP_KERNEL | __GFP_HIGH | __GFP_RETRY_MAYFAIL); -+#else - notification = (_mali_osk_notification_wrapper_t *)kmalloc(sizeof(_mali_osk_notification_wrapper_t) + size, - GFP_KERNEL | __GFP_HIGH | __GFP_REPEAT); -+#endif -+ - if (NULL == notification) { - MALI_DEBUG_PRINT(1, ("Failed to create a notification object\n")); - return NULL; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0008-mali_internal_sync-Rename-wait_queue_t-with-wait_que.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0008-mali_internal_sync-Rename-wait_queue_t-with-wait_que.patch deleted file mode 100644 index 592fea04e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0008-mali_internal_sync-Rename-wait_queue_t-with-wait_que.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 717d7899f6d8048c6b88b3c52e8a9c8afbddbb65 Mon Sep 17 00:00:00 2001 -From: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Date: Tue, 5 Dec 2017 09:48:42 -0800 -Subject: [PATCH 8/9] mali_internal_sync: Rename wait_queue_t with - wait_queue_entry_t - -Refer kernel patch ac6424b981bce1c4bc55675c6ce11bfe1bbfa64f -and 2055da which replaces the struct name - -Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Upstream-Status: Pending ---- - .../src/devicedrv/mali/linux/mali_internal_sync.c | 27 ++++++++++++++++++++-- - .../src/devicedrv/mali/linux/mali_internal_sync.h | 4 ++++ - 2 files changed, 29 insertions(+), 2 deletions(-) - -diff --git a/driver/src/devicedrv/mali/linux/mali_internal_sync.c b/driver/src/devicedrv/mali/linux/mali_internal_sync.c -index 1f2574e..957a056 100644 ---- linux/mali_internal_sync.c -+++ b/linux/mali_internal_sync.c -@@ -121,8 +121,13 @@ static void mali_internal_sync_fence_add_fence(struct mali_internal_sync_fence * - } - #endif - -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+static int mali_internal_sync_fence_wake_up_wq(wait_queue_entry_t *curr, unsigned mode, -+ int wake_flags, void *key) -+#else - static int mali_internal_sync_fence_wake_up_wq(wait_queue_t *curr, unsigned mode, - int wake_flags, void *key) -+#endif - { - struct mali_internal_sync_fence_waiter *wait; - MALI_IGNORE(mode); -@@ -130,8 +135,12 @@ static int mali_internal_sync_fence_wake_up_wq(wait_queue_t *curr, unsigned mode - MALI_IGNORE(key); - - wait = container_of(curr, struct mali_internal_sync_fence_waiter, work); -- list_del_init(&wait->work.task_list); - -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+ list_del_init(&wait->work.entry); -+#else -+ list_del_init(&wait->work.task_list); -+#endif - wait->callback(wait->work.private, wait); - return 1; - } -@@ -498,7 +507,11 @@ void mali_internal_sync_fence_waiter_init(struct mali_internal_sync_fence_waiter - MALI_DEBUG_ASSERT_POINTER(waiter); - MALI_DEBUG_ASSERT_POINTER(callback); - -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+ INIT_LIST_HEAD(&waiter->work.entry); -+#else - INIT_LIST_HEAD(&waiter->work.task_list); -+#endif - waiter->callback = callback; - } - -@@ -560,8 +573,13 @@ int mali_internal_sync_fence_wait_async(struct mali_internal_sync_fence *sync_fe - spin_lock_irqsave(&sync_fence->wq.lock, flags); - err = sync_fence->fence->ops->signaled(sync_fence->fence); - -- if (0 == err) -+ if (0 == err){ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+ __add_wait_queue_entry_tail(&sync_fence->wq, &waiter->work); -+#else - __add_wait_queue_tail(&sync_fence->wq, &waiter->work); -+#endif -+ } - spin_unlock_irqrestore(&sync_fence->wq.lock, flags); - - return err; -@@ -578,8 +596,13 @@ int mali_internal_sync_fence_cancel_async(struct mali_internal_sync_fence *sync_ - MALI_DEBUG_ASSERT_POINTER(waiter); - - spin_lock_irqsave(&sync_fence->wq.lock, flags); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+ if (!list_empty(&waiter->work.entry)) -+ list_del_init(&waiter->work.entry); -+#else - if (!list_empty(&waiter->work.task_list)) - list_del_init(&waiter->work.task_list); -+#endif - else - ret = -ENOENT; - spin_unlock_irqrestore(&sync_fence->wq.lock, flags); -diff --git a/driver/src/devicedrv/mali/linux/mali_internal_sync.h b/driver/src/devicedrv/mali/linux/mali_internal_sync.h -index a5655c7..70f29f9 100644 ---- linux/mali_internal_sync.h -+++ b/linux/mali_internal_sync.h -@@ -112,7 +112,11 @@ typedef void (*mali_internal_sync_callback_t)(struct mali_internal_sync_fence *s - struct mali_internal_sync_fence_waiter *waiter); - - struct mali_internal_sync_fence_waiter { -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0) -+ wait_queue_entry_t work; -+#else - wait_queue_t work; -+#endif - mali_internal_sync_callback_t callback; - #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0) - #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 10, 0) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0009-mali_memory_swap_alloc.c-Rename-global_page_state-wi.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0009-mali_memory_swap_alloc.c-Rename-global_page_state-wi.patch deleted file mode 100644 index 3445512c7..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0009-mali_memory_swap_alloc.c-Rename-global_page_state-wi.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 478de18bf513ecad419d25981e7b66c78126752c Mon Sep 17 00:00:00 2001 -From: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Date: Tue, 5 Dec 2017 09:58:36 -0800 -Subject: [PATCH 9/9] mali_memory_swap_alloc.c: Rename global_page_state with - global_zone_page_state - -Refer Kernel commit c41f012ade0b95b0a6e25c7150673e0554736165 -Which simply renames without any functional changes - -Signed-off-by: Madhurkiran Harikrishnan <madhurki@xilinx.com> -Upstream-Status: Pending ---- - driver/src/devicedrv/mali/linux/mali_memory_swap_alloc.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - -diff --git a/driver/src/devicedrv/mali/linux/mali_memory_swap_alloc.c b/driver/src/devicedrv/mali/linux/mali_memory_swap_alloc.c -index a54faca..e122b4c 100644 ---- linux/mali_memory_swap_alloc.c -+++ b/linux/mali_memory_swap_alloc.c -@@ -248,7 +248,11 @@ static void mali_mem_swap_swapped_bkend_pool_shrink(_mali_mem_swap_pool_shrink_t - } - - /* Get system free pages number. */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) -+ system_free_size = global_zone_page_state(NR_FREE_PAGES) * PAGE_SIZE; -+#else - system_free_size = global_page_state(NR_FREE_PAGES) * PAGE_SIZE; -+#endif - last_gpu_utilization = _mali_ukk_utilization_gp_pp(); - - if ((last_gpu_utilization < gpu_utilization_threshold_value) -@@ -575,8 +579,12 @@ int mali_mem_swap_alloc_pages(mali_mem_swap *swap_mem, u32 size, u32 *bkend_idx) - - list_add_tail(&m_page->list, &swap_mem->pages); - } -- -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) -+ system_free_size = global_zone_page_state(NR_FREE_PAGES) * PAGE_SIZE; -+#else - system_free_size = global_page_state(NR_FREE_PAGES) * PAGE_SIZE; -+#endif -+ - - if ((system_free_size < mali_mem_swap_out_threshold_value) - && (mem_backend_swapped_pool_size > (mali_mem_swap_out_threshold_value >> 2)) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0015-fix-driver-failed-to-check-map-error.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0015-fix-driver-failed-to-check-map-error.patch new file mode 100644 index 000000000..5363c37e8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0015-fix-driver-failed-to-check-map-error.patch @@ -0,0 +1,17 @@ +Index: mali/linux/mali_memory_os_alloc.c +=================================================================== +--- mali.orig/linux/mali_memory_os_alloc.c ++++ mali/linux/mali_memory_os_alloc.c +@@ -239,8 +239,10 @@ int mali_mem_os_alloc_pages(mali_mem_os_ + /* Ensure page is flushed from CPU caches. */ + dma_addr = dma_map_page(&mali_platform_device->dev, new_page, + 0, _MALI_OSK_MALI_PAGE_SIZE, DMA_BIDIRECTIONAL); +- dma_unmap_page(&mali_platform_device->dev, dma_addr, +- _MALI_OSK_MALI_PAGE_SIZE, DMA_BIDIRECTIONAL); ++ err = dma_mapping_error(&mali_platform_device->dev, dma_addr); ++ if (likely(!err)) ++ dma_unmap_page(&mali_platform_device->dev, dma_addr, ++ _MALI_OSK_MALI_PAGE_SIZE, DMA_BIDIRECTIONAL); + dma_addr = dma_map_page(&mali_platform_device->dev, new_page, + 0, _MALI_OSK_MALI_PAGE_SIZE, DMA_BIDIRECTIONAL); + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0016-mali_memory_secure-Kernel-5.0-onwards-access_ok-API-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0016-mali_memory_secure-Kernel-5.0-onwards-access_ok-API-.patch new file mode 100644 index 000000000..dc8bbebf4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0016-mali_memory_secure-Kernel-5.0-onwards-access_ok-API-.patch @@ -0,0 +1,47 @@ +From 8cf1dd43f3f25cb4afb84dfc3b0e7c02bc8f7f0c Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Mon, 24 Feb 2020 18:19:37 -0800 +Subject: [LINUX][rel-v2020.1][PATCH v1 1/3] mali_memory_secure: Kernel 5.0 + onwards 'access_ok' API does not take 'type' as input parameter + +'access_ok' no longer needs 'type' as input paramter from kernel 5.0 +onwards. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +--- + driver/src/devicedrv/mali/linux/mali_ukk_mem.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/driver/src/devicedrv/mali/linux/mali_ukk_mem.c b/driver/src/devicedrv/mali/linux/mali_ukk_mem.c +index 4ec57dc..270bb6d 100644 +--- linux/mali_ukk_mem.c ++++ b/linux/mali_ukk_mem.c +@@ -207,8 +207,13 @@ int mem_write_safe_wrapper(struct mali_session_data *session_data, _mali_uk_mem_ + kargs.ctx = (uintptr_t)session_data; + + /* Check if we can access the buffers */ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0) ++ if (!access_ok((const void __user *)kargs.dest, kargs.size) ++ || !access_ok((const void __user *)kargs.src, kargs.size)) { ++#else + if (!access_ok(VERIFY_WRITE, kargs.dest, kargs.size) + || !access_ok(VERIFY_READ, kargs.src, kargs.size)) { ++#endif + return -EINVAL; + } + +@@ -266,7 +271,11 @@ int mem_dump_mmu_page_table_wrapper(struct mali_session_data *session_data, _mal + goto err_exit; + + user_buffer = (void __user *)(uintptr_t)kargs.buffer; ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0) ++ if (!access_ok(user_buffer, kargs.size)) ++#else + if (!access_ok(VERIFY_WRITE, user_buffer, kargs.size)) ++#endif + goto err_exit; + + /* allocate temporary buffer (kernel side) to store mmu page table info */ +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0017-Support-for-vm_insert_pfn-deprecated-from-kernel-4.2.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0017-Support-for-vm_insert_pfn-deprecated-from-kernel-4.2.patch new file mode 100644 index 000000000..9c4bbee9f --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0017-Support-for-vm_insert_pfn-deprecated-from-kernel-4.2.patch @@ -0,0 +1,146 @@ +From 953cab73b8bc487da330aa454abd7f8c7466737e Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Mon, 24 Feb 2020 18:32:16 -0800 +Subject: [LINUX][rel-v2020.1][PATCH v1 2/3] Support for vm_insert_pfn + deprecated from kernel 4.20 + +From kernel 4.20 onwards, support for vm_insert_pfn is deprecated. +Hence, replace the same with vmf_insert_pfn. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +--- + .../devicedrv/mali/linux/mali_memory_block_alloc.c | 6 +++++- + driver/src/devicedrv/mali/linux/mali_memory_cow.c | 14 ++++++++++++-- + .../src/devicedrv/mali/linux/mali_memory_os_alloc.c | 20 +++++++++++++++++--- + driver/src/devicedrv/mali/linux/mali_memory_secure.c | 7 ++++++- + 4 files changed, 40 insertions(+), 7 deletions(-) + +diff --git a/driver/src/devicedrv/mali/linux/mali_memory_block_alloc.c b/driver/src/devicedrv/mali/linux/mali_memory_block_alloc.c +index 0c5b6c3..e528699 100644 +--- linux/mali_memory_block_alloc.c ++++ b/linux/mali_memory_block_alloc.c +@@ -309,9 +309,13 @@ int mali_mem_block_cpu_map(mali_mem_backend *mem_bkend, struct vm_area_struct *v + + list_for_each_entry(m_page, &block_mem->pfns, list) { + MALI_DEBUG_ASSERT(m_page->type == MALI_PAGE_NODE_BLOCK); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, addr, _mali_page_node_get_pfn(m_page)); ++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, addr, _mali_page_node_get_pfn(m_page)); +- + if (unlikely(0 != ret)) { ++#endif + return -EFAULT; + } + addr += _MALI_OSK_MALI_PAGE_SIZE; +diff --git a/driver/src/devicedrv/mali/linux/mali_memory_cow.c b/driver/src/devicedrv/mali/linux/mali_memory_cow.c +index f1d44fe..1dae1d6 100644 +--- linux/mali_memory_cow.c ++++ b/linux/mali_memory_cow.c +@@ -532,9 +532,14 @@ int mali_mem_cow_cpu_map(mali_mem_backend *mem_bkend, struct vm_area_struct *vma + * flush which makes it way slower than remap_pfn_range or vm_insert_pfn.
+ ret = vm_insert_page(vma, addr, page);
+ */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, addr, _mali_page_node_get_pfn(m_page));
++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, addr, _mali_page_node_get_pfn(m_page));
+-
+ if (unlikely(0 != ret)) {
++#endif ++
+ return ret;
+ }
+ addr += _MALI_OSK_MALI_PAGE_SIZE;
+@@ -569,9 +574,14 @@ _mali_osk_errcode_t mali_mem_cow_cpu_map_pages_locked(mali_mem_backend *mem_bken +
+ list_for_each_entry(m_page, &cow->pages, list) {
+ if ((count >= offset) && (count < offset + num)) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, vaddr, _mali_page_node_get_pfn(m_page));
++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, vaddr, _mali_page_node_get_pfn(m_page));
+-
+ if (unlikely(0 != ret)) {
++#endif ++
+ if (count == offset) {
+ return _MALI_OSK_ERR_FAULT;
+ } else {
+diff --git a/driver/src/devicedrv/mali/linux/mali_memory_os_alloc.c b/driver/src/devicedrv/mali/linux/mali_memory_os_alloc.c +index 3fb6f05..7de3920 100644 +--- linux/mali_memory_os_alloc.c ++++ b/linux/mali_memory_os_alloc.c +@@ -378,9 +378,14 @@ int mali_mem_os_cpu_map(mali_mem_backend *mem_bkend, struct vm_area_struct *vma) + ret = vm_insert_page(vma, addr, page); + */ + page = m_page->page; ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, addr, page_to_pfn(page)); ++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, addr, page_to_pfn(page)); +- + if (unlikely(0 != ret)) { ++#endif ++ + return -EFAULT; + } + addr += _MALI_OSK_MALI_PAGE_SIZE; +@@ -416,9 +421,13 @@ _mali_osk_errcode_t mali_mem_os_resize_cpu_map_locked(mali_mem_backend *mem_bken + + vm_end -= _MALI_OSK_MALI_PAGE_SIZE; + if (mapping_page_num > 0) { ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, vm_end, page_to_pfn(m_page->page)); ++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, vm_end, page_to_pfn(m_page->page)); +- + if (unlikely(0 != ret)) { ++#endif + /*will return -EBUSY If the page has already been mapped into table, but it's OK*/ + if (-EBUSY == ret) { + break; +@@ -439,9 +448,14 @@ _mali_osk_errcode_t mali_mem_os_resize_cpu_map_locked(mali_mem_backend *mem_bken + list_for_each_entry(m_page, &os_mem->pages, list) { + if (count >= offset) { + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, vstart, page_to_pfn(m_page->page)); ++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, vstart, page_to_pfn(m_page->page)); +- + if (unlikely(0 != ret)) { ++#endif ++ + /*will return -EBUSY If the page has already been mapped into table, but it's OK*/ + if (-EBUSY == ret) { + break; +diff --git a/driver/src/devicedrv/mali/linux/mali_memory_secure.c b/driver/src/devicedrv/mali/linux/mali_memory_secure.c +index 5546304..cebd1c8 100644 +--- linux/mali_memory_secure.c ++++ b/linux/mali_memory_secure.c +@@ -132,9 +132,14 @@ int mali_mem_secure_cpu_map(mali_mem_backend *mem_bkend, struct vm_area_struct * + MALI_DEBUG_ASSERT(0 == size % _MALI_OSK_MALI_PAGE_SIZE); + + for (j = 0; j < size / _MALI_OSK_MALI_PAGE_SIZE; j++) { ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ ret = vmf_insert_pfn(vma, addr, PFN_DOWN(phys)); ++ if (unlikely(VM_FAULT_ERROR & ret)) { ++#else + ret = vm_insert_pfn(vma, addr, PFN_DOWN(phys)); +- + if (unlikely(0 != ret)) { ++#endif ++ + return -EFAULT; + } + addr += _MALI_OSK_MALI_PAGE_SIZE; +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0018-Change-return-type-to-vm_fault_t-for-fault-handler.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0018-Change-return-type-to-vm_fault_t-for-fault-handler.patch new file mode 100644 index 000000000..9797db629 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0018-Change-return-type-to-vm_fault_t-for-fault-handler.patch @@ -0,0 +1,32 @@ +From ad5c569f0cc40698699fc2f2c1db3ceb9f8b8f35 Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Tue, 25 Feb 2020 11:36:01 -0800 +Subject: [LINUX][rel-v2020.1][PATCH v1 3/3] Change return type to vm_fault_t + for fault handler + +From kernel 4.17 onwards the return type of fault handler for +vm_operations is of type 'vm_fault_t'. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +--- + driver/src/devicedrv/mali/linux/mali_memory.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/driver/src/devicedrv/mali/linux/mali_memory.c b/driver/src/devicedrv/mali/linux/mali_memory.c +index c0f0982..2b2b209 100644 +--- linux/mali_memory.c ++++ b/linux/mali_memory.c +@@ -70,7 +70,9 @@ static void mali_mem_vma_close(struct vm_area_struct *vma) + } + } + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 17, 0) ++static vm_fault_t mali_mem_vma_fault(struct vm_fault *vmf) ++#elif LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) + static int mali_mem_vma_fault(struct vm_fault *vmf) + #else + static int mali_mem_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf) +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0019-get_monotonic_boottime-ts-deprecated-from-kernel-4.2.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0019-get_monotonic_boottime-ts-deprecated-from-kernel-4.2.patch new file mode 100644 index 000000000..154bb673e --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mali/kernel-module-mali/0019-get_monotonic_boottime-ts-deprecated-from-kernel-4.2.patch @@ -0,0 +1,36 @@ +From c6a6b39cea3fdfd91cae7f2a4ef6f36d2c55fdd6 Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Tue, 25 Feb 2020 15:17:17 -0800 +Subject: [LINUX][rel-v2020.1][PATCH v1] "get_monotonic_boottime(&ts)" + deprecated from kernel 4.20 onwards + +As "get_monotonic_boottime(&ts)" is deprecated, replace the same with +"ktime_get_boottime_ts64(&ts)". Refer kernel commit ID +976516404ff3fab2a8caa8bd6f5efc1437fed0b8 + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +--- + driver/src/devicedrv/mali/linux/mali_osk_time.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/driver/src/devicedrv/mali/linux/mali_osk_time.c b/driver/src/devicedrv/mali/linux/mali_osk_time.c +index 03046a5..bfcbf7f 100644 +--- linux/mali_osk_time.c ++++ b/linux/mali_osk_time.c +@@ -53,7 +53,13 @@ u64 _mali_osk_time_get_ns(void) + + u64 _mali_osk_boot_time_get_ns(void) + { ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0) ++ struct timespec64 tsval; ++ ktime_get_boottime_ts64(&tsval); ++ return (u64)timespec64_to_ns(&tsval); ++#else + struct timespec tsval; + get_monotonic_boottime(&tsval); + return (u64)timespec_to_ns(&tsval); ++#endif + } +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mesa/mesa-gl_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mesa/mesa-gl_%.bbappend new file mode 100644 index 000000000..bcfefa1e1 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/mesa/mesa-gl_%.bbappend @@ -0,0 +1,3 @@ +do_install_append_zynqmp () { + rm -rf ${D}${includedir}/KHR/* +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-gl-renderer.c-Use-gr-egl_config-to-create-pbuffer-su.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-gl-renderer.c-Use-gr-egl_config-to-create-pbuffer-su.patch new file mode 100644 index 000000000..d7d411f63 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-gl-renderer.c-Use-gr-egl_config-to-create-pbuffer-su.patch @@ -0,0 +1,84 @@ +From 7cc76d50bddd6ff1eb5fb19712415f385f5d3f49 Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Mon, 3 Feb 2020 14:26:21 -0800 +Subject: [PATCH] gl-renderer.c: Use gr->egl_config to create pbuffer surface + +The original implementation always chose first egl config for pbuffer +surface type, however the returned configs are implementation specific +and egl config may not always match between ctx and surface. Hence, +use gr->egl_config which already has the matching config but ensure that +windows and pbuffer bit are set for the surface type. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Upstream-status: Pending +--- + libweston/renderer-gl/gl-renderer.c | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +diff --git a/libweston/renderer-gl/gl-renderer.c b/libweston/renderer-gl/gl-renderer.c +index 54f8b1c..f50c959 100644 +--- a/libweston/renderer-gl/gl-renderer.c ++++ b/libweston/renderer-gl/gl-renderer.c +@@ -3567,7 +3567,7 @@ gl_renderer_setup_egl_extensions(struct weston_compositor *ec) + } + + static const EGLint gl_renderer_opaque_attribs[] = { +- EGL_SURFACE_TYPE, EGL_WINDOW_BIT, ++ EGL_SURFACE_TYPE, EGL_WINDOW_BIT | EGL_PBUFFER_BIT, + EGL_RED_SIZE, 1, + EGL_GREEN_SIZE, 1, + EGL_BLUE_SIZE, 1, +@@ -3577,7 +3577,7 @@ static const EGLint gl_renderer_opaque_attribs[] = { + }; + + static const EGLint gl_renderer_alpha_attribs[] = { +- EGL_SURFACE_TYPE, EGL_WINDOW_BIT, ++ EGL_SURFACE_TYPE, EGL_WINDOW_BIT | EGL_PBUFFER_BIT, + EGL_RED_SIZE, 1, + EGL_GREEN_SIZE, 1, + EGL_BLUE_SIZE, 1, +@@ -3682,15 +3682,7 @@ static int + gl_renderer_create_pbuffer_surface(struct gl_renderer *gr) { + EGLConfig pbuffer_config; + +- static const EGLint pbuffer_config_attribs[] = { +- EGL_SURFACE_TYPE, EGL_PBUFFER_BIT, +- EGL_RED_SIZE, 1, +- EGL_GREEN_SIZE, 1, +- EGL_BLUE_SIZE, 1, +- EGL_ALPHA_SIZE, 0, +- EGL_RENDERABLE_TYPE, EGL_OPENGL_ES2_BIT, +- EGL_NONE +- }; ++ EGLint surface_type; + + static const EGLint pbuffer_attribs[] = { + EGL_WIDTH, 10, +@@ -3698,13 +3690,21 @@ gl_renderer_create_pbuffer_surface(struct gl_renderer *gr) { + EGL_NONE + }; + +- if (egl_choose_config(gr, pbuffer_config_attribs, NULL, 0, &pbuffer_config) < 0) { +- weston_log("failed to choose EGL config for PbufferSurface\n"); ++ if(!eglGetConfigAttrib(gr->egl_display, gr->egl_config, EGL_SURFACE_TYPE, &surface_type)) { ++ weston_log("failed to get surface type for PbufferSurface\n"); ++ return -1; ++ } ++ ++ if (!((surface_type & EGL_WINDOW_BIT) && (surface_type & EGL_PBUFFER_BIT)) && ++ !gr->has_configless_context) { ++ weston_log("attempted to use a different EGL config for an " ++ "output but EGL_KHR_no_config_context or " ++ "EGL_MESA_configless_context is not supported\n"); + return -1; + } + + gr->dummy_surface = eglCreatePbufferSurface(gr->egl_display, +- pbuffer_config, ++ gr->egl_config, + pbuffer_attribs); + + if (gr->dummy_surface == EGL_NO_SURFACE) { +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-libweston-Remove-substitute-format-for-ARGB8888.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-libweston-Remove-substitute-format-for-ARGB8888.patch new file mode 100644 index 000000000..e8e8a1f00 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/0001-libweston-Remove-substitute-format-for-ARGB8888.patch @@ -0,0 +1,29 @@ +From 77afc64239199f75041ec344f8f886ee20bba0f8 Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Tue, 11 Feb 2020 19:07:45 -0800 +Subject: [PATCH] libweston: Remove substitute format for ARGB8888 + +Xilinx DP gfx layer does not support XRGB8888. Hence, remove the same +as opaque substitute. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Upstream-Status : Inappropriate [Xilinx specific] +--- + libweston/pixel-formats.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/libweston/pixel-formats.c b/libweston/pixel-formats.c +index b96f3b2..e2a7715 100644 +--- a/libweston/pixel-formats.c ++++ b/libweston/pixel-formats.c +@@ -165,7 +165,6 @@ static const struct pixel_format_info pixel_format_table[] = { + }, + { + DRM_FORMAT(ARGB8888), +- .opaque_substitute = DRM_FORMAT_XRGB8888, + .depth = 32, + .bpp = 32, + GL_FORMAT(GL_BGRA_EXT), +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/weston.ini b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/weston.ini new file mode 100644 index 000000000..783a9c6b8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/files/weston.ini @@ -0,0 +1,4 @@ +[core] +idle-time=0 + +gbm-format=rgb565 diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston-init%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston-init%.bbappend new file mode 100644 index 000000000..aaee7f5dc --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston-init%.bbappend @@ -0,0 +1,7 @@ +FILESEXTRAPATHS_prepend_zynqmp := "${THISDIR}/files:" + +SRC_URI_append_zynqmp = " file://weston.ini" + +do_install_append_zynqmp() { + install -Dm 0700 ${WORKDIR}/weston.ini ${D}/${sysconfdir}/xdg/weston/weston.ini +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston_%.bbappend new file mode 100644 index 000000000..a13b627a4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/weston/weston_%.bbappend @@ -0,0 +1,5 @@ +FILESEXTRAPATHS_prepend_zynqmp := "${THISDIR}/files:" + +SRC_URI_append_zynqmp = " file://0001-gl-renderer.c-Use-gr-egl_config-to-create-pbuffer-su.patch \ + file://0001-libweston-Remove-substitute-format-for-ARGB8888.patch \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-armsoc_driver.c-Bypass-the-exa-layer-to-free-the-roo.patch b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-armsoc_driver.c-Bypass-the-exa-layer-to-free-the-roo.patch new file mode 100644 index 000000000..2e0247944 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-armsoc_driver.c-Bypass-the-exa-layer-to-free-the-roo.patch @@ -0,0 +1,33 @@ +From 497de8b16265468cacad880f4a371756924ae0c1 Mon Sep 17 00:00:00 2001 +From: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +Date: Tue, 14 Apr 2020 15:25:13 -0700 +Subject: [xf86-video-armsoc][PATCH v2] armsoc_driver.c: Bypass the exa layer + to free the root pixmap + +Since the root pixmap was allocated through miCreateScreenResources, +the exa layer is not aware of the pixmap resulting in the assertion +to fail. Instead, we can directly invoke fbDestroyPixmap, thereby +freeing the pixmap and avoiding a memory leak. + +Signed-off-by: Madhurkiran Harikrishnan <madhurkiran.harikrishnan@xilinx.com> +--- + src/armsoc_driver.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/src/armsoc_driver.c b/src/armsoc_driver.c +index 3ace3c7..a4a1ba3 100644 +--- a/src/armsoc_driver.c ++++ b/src/armsoc_driver.c +@@ -1259,7 +1259,8 @@ ARMSOCCloseScreen(CLOSE_SCREEN_ARGS_DECL) + * we do it here, before calling the CloseScreen chain which would just free pScreen->devPrivate in fbCloseScreen() + */ + if (pScreen->devPrivate) { +- (void) (*pScreen->DestroyPixmap)(pScreen->devPrivate); ++ fbDestroyPixmap (pScreen->devPrivate); ++ armsoc_bo_unreference(pARMSOC->scanout); + pScreen->devPrivate = NULL; + } + +-- +2.7.4 + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend index 3ddcf0b81..955398a3f 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend +++ b/meta-xilinx/meta-xilinx-bsp/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend @@ -1,3 +1,5 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/xf86-video-armsoc:" -SRC_URI_append = " file://0001-src-drmmode_xilinx-Add-the-dumb-gem-support-for-Xili.patch" +SRC_URI_append = " file://0001-src-drmmode_xilinx-Add-the-dumb-gem-support-for-Xili.patch \ + file://0001-armsoc_driver.c-Bypass-the-exa-layer-to-free-the-roo.patch \ + " diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/dtc/python3-dtc_1.5.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/dtc/python3-dtc_1.5.1.bb new file mode 100644 index 000000000..08e356d43 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/dtc/python3-dtc_1.5.1.bb @@ -0,0 +1,27 @@ +SUMMARY = "Device Tree Compiler" +HOMEPAGE = "https://devicetree.org/" +DESCRIPTION = "The Device Tree Compiler is a tool used to manipulate the Open-Firmware-like device tree used by PowerPC kernels." +SECTION = "bootloader" +LICENSE = "GPLv2 | BSD" +DEPENDS = "flex-native bison-native swig-native" + +SRC_URI = "git://git.kernel.org/pub/scm/utils/dtc/dtc.git" + +UPSTREAM_CHECK_GITTAGREGEX = "v(?P<pver>\d+(\.\d+)+)" + +LIC_FILES_CHKSUM = "file://libfdt.i;beginline=1;endline=6;md5=afda088c974174a29108c8d80b5dce90" + +SRCREV = "60e0db3d65a1218b0d5a29474e769f28a18e3ca6" + +S = "${WORKDIR}/git/pylibfdt" + +DEPENDS += "libyaml dtc" + +inherit distutils3 + +do_configure_prepend() { + (cd ${S}/../ ; make version_gen.h ) +} + +BBCLASSEXTEND = "native nativesdk" + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/hdmi/kernel-module-hdmi_git.bb b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/hdmi/kernel-module-hdmi_git.bb new file mode 100644 index 000000000..e2ce3eca4 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/hdmi/kernel-module-hdmi_git.bb @@ -0,0 +1,26 @@ +SUMMARY = "Xilinx HDMI Linux Kernel module" +DESCRIPTION = "Out-of-tree HDMI kernel modules provider for MPSoC EG/EV devices" +SECTION = "kernel/modules" +LICENSE = "GPLv2" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=61ac10ffd8cd46f9637586205af76cea" + +XLNX_HDMI_VERSION = "5.4.0" +PV = "${XLNX_HDMI_VERSION}" + +S = "${WORKDIR}/git" + +BRANCH ?= "rel-v2020.1" +REPO ?= "git://github.com/xilinx/hdmi-modules.git;protocol=https" +SRCREV ?= "3a6e440b50263a3ed99492aba3e507d7c130355c" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit module + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE_zynqmp = "zynqmp" +COMPATIBLE_MACHINE_versal = "versal" + +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux-firmware/linux-firmware_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux-firmware/linux-firmware_%.bbappend new file mode 100644 index 000000000..a1e4cb0ba --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux-firmware/linux-firmware_%.bbappend @@ -0,0 +1,28 @@ +# TIInit_11.8.32.bts is required for bluetooth support but this particular +# version is not available in the linux-firmware repository. +# +SRC_URI_append_ultra96-zynqmp = "\ + https://git.ti.com/ti-bt/service-packs/blobs/raw/c290f8af9e388f37e509ecb111a1b64572b7c225/initscripts/TIInit_11.8.32.bts;name=TIInit_11.8.32 \ + " + +SRC_URI[TIInit_11.8.32.md5sum] = "b1e142773e8ef0537b93895ebe2fcae3" +SRC_URI[TIInit_11.8.32.sha256sum] = "962322c05857ad6b1fb81467bdfc59c125e04a6a8eaabf7f24b742ddd68c3bfa" + +do_install_append_ultra96-zynqmp() { + cp ${WORKDIR}/TIInit_11.8.32.bts ${D}${nonarch_base_libdir}/firmware/ti-connectivity/ + ( cd ${D}${nonarch_base_libdir}/firmware ; ln -sf ti-connectivity/* . ) + rm -f ${D}${nonarch_base_libdir}/firmware/ti-connectivity/TIInit_7* + rm -f ${D}${nonarch_base_libdir}/firmware/TIInit_7* +} + +INSANE_SKIP_${PN} += "installed-vs-shipped" + +PACKAGES_remove_ultra96-zynqmp = "${PN}-wl12xx" + +FILES_${PN}-wl18xx_ultra96-zynqmp = " \ + ${nonarch_base_libdir}/firmware/wl18* \ + ${nonarch_base_libdir}/firmware/TI* \ + ${nonarch_base_libdir}/firmware/ti-connectivity/wl18* \ + ${nonarch_base_libdir}/firmware/ti-connectivity/TI* \ + " + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx.inc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx.inc index 54ec3f216..6b4264f54 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx.inc @@ -1,17 +1,20 @@ # This version extension should match CONFIG_LOCALVERSION in defconfig XILINX_RELEASE_VERSION ?= "" LINUX_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}" -PV = "${LINUX_VERSION}${LINUX_VERSION_EXTENSION}+git${SRCPV}" +PV = "${LINUX_VERSION}+git${SRCPV}" # Sources, by default allow for the use of SRCREV pointing to orphaned tags/commits -KBRANCH ?= "" +KBRANCH ?= "xlnx_rebase_v5.4" SRCBRANCHARG = "${@['nobranch=1', 'branch=${KBRANCH}'][d.getVar('KBRANCH', True) != '']}" FILESOVERRIDES_append = ":${XILINX_RELEASE_VERSION}" -KERNELURI ?= "git://github.com/Xilinx/linux-xlnx.git;protocol=https" -SRC_URI = "${KERNELURI};${SRCBRANCHARG}" +KERNELURI ?= "git://github.com/Xilinx/linux-xlnx.git;protocol=https;name=machine" +YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-5.4;destsuffix=yocto-kmeta" +SRC_URI = "${KERNELURI};${SRCBRANCHARG} ${YOCTO_META}" SRCREV_machine ?= "${SRCREV}" +SRCREV_meta ?= "33bd5e8ac6fa46d5d7891b6e850603159f095b1a" +SRCREV_FORMAT = "machine" require recipes-kernel/linux/linux-yocto.inc require linux-microblaze.inc @@ -43,21 +46,20 @@ COMPATIBLE_MACHINE_versal = ".*" # Use DEFCONFIGs for configuring linux-xlnx kernels KCONFIG_MODE ?= "alldefconfig" -KBUILD_DEFCONFIG_zynqmp = "xilinx_zynqmp_defconfig" +KBUILD_DEFCONFIG_zynqmp = "xilinx_defconfig" KBUILD_DEFCONFIG_zynq = "xilinx_zynq_defconfig" KBUILD_DEFCONFIG_microblaze = "mmu_defconfig" -KBUILD_DEFCONFIG_versal = "xilinx_versal_defconfig" - -# Add meta-xilinx kmeta, used for MicroBlaze BSP fragments -FILESEXTRAPATHS_prepend := "${THISDIR}:" -SRC_URI_append = " file://xilinx-kmeta;type=kmeta;name=xilinx-kmeta;destsuffix=xilinx-kmeta" +KBUILD_DEFCONFIG_versal = "xilinx_defconfig" # MicroBlaze BSP fragments -KERNEL_FEATURES_append_kc705-microblazeel = " bsp/kc705-microblazeel/kc705-microblazeel.scc" +KERNEL_FEATURES_append_kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" + +KERNEL_FEATURES_append_zynqmp = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ' features/xen/xen.scc', '', d)}" -KERNEL_FEATURES_append_zynqmp = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ' bsp/xilinx/xen.scc', '', d)}" +KERNEL_FEATURES_append_zynqmp = "${@' features/xilinx/overlay/overlay_of.scc' if d.getVar('FPGA_MNGR_RECONFIG_ENABLE') == '1' else ''}" -KERNEL_FEATURES_append_zynqmp = "${@' features/overlay/overlay.scc' if d.getVar('FPGA_MNGR_RECONFIG_ENABLE') == '1' else ''}" +KERNEL_FEATURES_append_versal = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ' features/xen/xen.scc', '', d)} features/xilinx/hdmi-module/hdmi-module.scc" -KERNEL_FEATURES_append_versal = "${@bb.utils.contains('DISTRO_FEATURES', 'xen', ' bsp/xilinx/xen.scc', '', d)}" +KERNEL_FEATURES_append_ultra96-zynqmp = " bsp/xilinx/ultra96-zynqmp/mipi-config-ultra96.scc" +KERNEL_FEATURES_append = " ${@bb.utils.contains('DISTRO_FEATURES', 'virtualization', ' features/ocicontainer/ocicontainer.scc', '', d)}" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/perf-fix-build-with-binutils.patch b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/perf-fix-build-with-binutils.patch new file mode 100755 index 000000000..1470a5d7c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/perf-fix-build-with-binutils.patch @@ -0,0 +1,60 @@ +From 0ada120c883d4f1f6aafd01cf0fbb10d8bbba015 Mon Sep 17 00:00:00 2001 +From: Changbin Du <changbin.du@gmail.com> +Date: Tue, 28 Jan 2020 23:29:38 +0800 +Subject: [PATCH] perf: Make perf able to build with latest libbfd + +libbfd has changed the bfd_section_* macros to inline functions +bfd_section_<field> since 2019-09-18. See below two commits: + o http://www.sourceware.org/ml/gdb-cvs/2019-09/msg00064.html + o https://www.sourceware.org/ml/gdb-cvs/2019-09/msg00072.html + +This fix make perf able to build with both old and new libbfd. + +Signed-off-by: Changbin Du <changbin.du@gmail.com> +Acked-by: Jiri Olsa <jolsa@redhat.com> +Cc: Peter Zijlstra <peterz@infradead.org> +Link: http://lore.kernel.org/lkml/20200128152938.31413-1-changbin.du@gmail.com +Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> + +Upstream-Status: Backport [https://github.com/torvalds/linux/commit/0ada120c883d4f1f6aafd01cf0fbb10d8bbba015] +Signed-off-by: Anuj Mittal <anuj.mittal@intel.com> +--- + tools/perf/util/srcline.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/tools/perf/util/srcline.c b/tools/perf/util/srcline.c +index 6ccf6f6d09df9..5b7d6c16d33fe 100644 +--- a/tools/perf/util/srcline.c ++++ b/tools/perf/util/srcline.c +@@ -193,16 +193,30 @@ static void find_address_in_section(bfd *abfd, asection *section, void *data) + bfd_vma pc, vma; + bfd_size_type size; + struct a2l_data *a2l = data; ++ flagword flags; + + if (a2l->found) + return; + +- if ((bfd_get_section_flags(abfd, section) & SEC_ALLOC) == 0) ++#ifdef bfd_get_section_flags ++ flags = bfd_get_section_flags(abfd, section); ++#else ++ flags = bfd_section_flags(section); ++#endif ++ if ((flags & SEC_ALLOC) == 0) + return; + + pc = a2l->addr; ++#ifdef bfd_get_section_vma + vma = bfd_get_section_vma(abfd, section); ++#else ++ vma = bfd_section_vma(section); ++#endif ++#ifdef bfd_get_section_size + size = bfd_get_section_size(section); ++#else ++ size = bfd_section_size(section); ++#endif + + if (pc < vma || pc >= vma + size) + return; diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2019.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2019.1.bb deleted file mode 100644 index 5bac31e99..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2019.1.bb +++ /dev/null @@ -1,7 +0,0 @@ -LINUX_VERSION = "4.19" -XILINX_RELEASE_VERSION = "v2019.1" -KBRANCH ?= "xlnx_rebase_v4.19" -SRCREV ?= "9811303824b66a8db9a8ec61b570879336a9fde5" - -include linux-xlnx.inc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2020.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2020.1.bb new file mode 100644 index 000000000..10a13250e --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_2020.1.bb @@ -0,0 +1,9 @@ +LINUX_VERSION = "5.4" +SRCREV ?= "22b71b41620dac13c69267d2b7898ebfb14c954e" + +include linux-xlnx.inc + +FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" +SRC_URI_append = " file://perf-fix-build-with-binutils.patch" + + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-xilinx.inc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-xilinx.inc index 92093008c..3f3efa95c 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-xilinx.inc +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-xilinx.inc @@ -1,9 +1,5 @@ require linux-microblaze.inc -# Add meta-xilinx kmeta -FILESEXTRAPATHS_prepend := "${THISDIR}:" -SRC_URI_append = " file://xilinx-kmeta;type=kmeta;name=xilinx-kmeta;destsuffix=xilinx-kmeta" - # Zynq default generic KMACHINE COMPATIBLE_MACHINE_zynq = "zynq" KMACHINE_zynq = "zynq" @@ -21,5 +17,5 @@ KMACHINE_microblaze = "microblaze" COMPATIBLE_MACHINE_microblaze = "microblaze" # Default kernel config fragements for specific machines -KERNEL_FEATURES_append_kc705-microblazeel = " bsp/kc705-microblazeel/kc705-microblazeel.scc" +KERNEL_FEATURES_append_kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg deleted file mode 100644 index ef6fd6a8d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg +++ /dev/null @@ -1,17 +0,0 @@ -CONFIG_XILINX_MICROBLAZE0_FAMILY="kintex7" - -# CPU ISA Config -CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1 -CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1 -CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1 -CONFIG_XILINX_MICROBLAZE0_USE_DIV=1 -CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2 -CONFIG_XILINX_MICROBLAZE0_USE_FPU=0 -CONFIG_XILINX_MICROBLAZE0_HW_VER="11.0" - -# Memory Base Address -CONFIG_KERNEL_BASE_ADDR=0x80000000 - -CONFIG_XILINX_AXI_EMAC=y -CONFIG_XILINX_PHY=y -CONFIG_BLK_DEV_INITRD=y diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc deleted file mode 100644 index aaf7c2af9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc +++ /dev/null @@ -1,4 +0,0 @@ -define KFEATURE_DESCRIPTION "Kernel Config for kc705-microblazeel specific setup" -define KFEATURE_COMPATIBILITY board - -kconf hardware kc705-microblazeel.cfg diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc deleted file mode 100644 index 170489d4b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc +++ /dev/null @@ -1,14 +0,0 @@ -define KMACHINE microblaze -define KTYPE standard -define KARCH microblaze - -include ktypes/standard/standard.scc - -include bsp/xilinx/soc/microblaze.scc - -# Common board drivers -include bsp/xilinx/board-common.scc - -# default policy for standard kernels -include features/latencytop/latencytop.scc -include features/profiling/profiling.scc diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc deleted file mode 100644 index 979fb86bb..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc +++ /dev/null @@ -1,11 +0,0 @@ -define KMACHINE microblaze -define KTYPE tiny -define KARCH microblaze - -include ktypes/tiny/tiny.scc - -include bsp/xilinx/soc/microblaze.scc - -# Common board drivers -include bsp/xilinx/board-common.scc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg deleted file mode 100644 index 0f66c8bcd..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg +++ /dev/null @@ -1,14 +0,0 @@ -# CMA -CONFIG_CMA=y -CONFIG_DMA_CMA=y -CONFIG_CMA_SIZE_MBYTES=128 -CONFIG_CMA_SIZE_SEL_MBYTES=y -CONFIG_CMA_ALIGNMENT=8 - -# DRM -CONFIG_DRM=y -CONFIG_DRM_XILINX=y - -# frame buffer console -CONFIG_FRAMEBUFFER_CONSOLE=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc deleted file mode 100644 index 56c80c3ac..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc +++ /dev/null @@ -1,4 +0,0 @@ -define KFEATURE_DESCRIPTION "Enable Xilinx DRM support" -define KFEATURE_COMPATIBILITY board - -kconfig hardware drivers-drm.cfg diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg deleted file mode 100644 index df88fce7a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg +++ /dev/null @@ -1,7 +0,0 @@ - -# PCIe -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_XILINX=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc deleted file mode 100644 index e60047ae1..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc +++ /dev/null @@ -1,5 +0,0 @@ -define KFEATURE_DESCRIPTION "Xilinx AXI PCIe Host Bridge" -define KFEATURE_COMPATIBILITY board - -kconfig hardware drivers-softip-pcie.cfg - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg deleted file mode 100644 index 5c2529a2d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg +++ /dev/null @@ -1,19 +0,0 @@ -# Xilinx DMA engines -CONFIG_XILINX_DMA_ENGINES=y - -# Xilinx Traffic Generator -CONFIG_XILINX_TRAFGEN=y - -# Xilinx Perfmon UIO driver -CONFIG_UIO_XILINX_APM=y - -# Interrupt controller -CONFIG_XILINX_INTC=y - -# Xilinx PHY -CONFIG_XILINX_PHY=y - -# JESD204B PHY -CONFIG_XILINX_JESD204B=y -CONFIG_XILINX_JESD204B_PHY=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg deleted file mode 100644 index 9b70ac4ea..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg +++ /dev/null @@ -1,16 +0,0 @@ -# Devcfg -CONFIG_XILINX_DEVCFG=y - -# Ethernet -CONFIG_XILINX_PS_EMAC=y - -# SPI -CONFIG_SPI_ZYNQ_QSPI=y - -# NAND -CONFIG_MTD_NAND_PL353=y -CONFIG_MTD_NAND_PL35X=y - -# FPGA -CONFIG_XILINX_PR_DECOUPLER=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg deleted file mode 100644 index 4cbb2050a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg +++ /dev/null @@ -1,67 +0,0 @@ -CONFIG_SOC_XILINX_ZYNQMP=y - -# PMU Firmware API -CONFIG_ZYNQMP_PM_API_DEBUGFS=y - -# DMA -CONFIG_DMADEVICES=y -CONFIG_XILINX_DMA_ENGINES=y -CONFIG_XILINX_DPDMA=y - -# NAND -CONFIG_MTD=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ARASAN=y - -# PCIe -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCIE_XILINX_NWL=y - -# CONFIG_ARM_MALI is not set - -CONFIG_PHY_XILINX_ZYNQMP=y - -# EDAC -CONFIG_EDAC=y -CONFIG_EDAC_MM_EDAC=y -CONFIG_EDAC_CORTEX_ARM64=y -CONFIG_EDAC_SYNOPSYS=y -CONFIG_EDAC_ZYNQMP_OCM=y - -# Sound -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_DRIVERS=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_XILINX_DP=y - -# Ethernet -CONFIG_MACB_EXT_BD=y - -# FPGA -CONFIG_FPGA=y -CONFIG_FPGA_MGR_ZYNQMP_FPGA=y -CONFIG_FPGA_REGION=y -CONFIG_FPGA_BRIDGE=y -CONFIG_XILINX_PR_DECOUPLER=y - -# AMS -CONFIG_XILINX_AMS=y - -# NVMEM -CONFIG_NVMEM=y -CONFIG_NVMEM_ZYNQMP=y - -# Fabric Clock -CONFIG_STAGING=y -CONFIG_XILINX_FCLK=y - -# Clock controllers -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_ZYNQMP=y - -# Reset controller -CONFIG_RESET_CONTROLLER=y -CONFIG_ZYNQMP_RESET_CONTROLLER=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg deleted file mode 100644 index dc69a659f..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg +++ /dev/null @@ -1,68 +0,0 @@ - -# Bus -CONFIG_ARM_CCI400_PMU=y - -# IOMMU -CONFIG_IOMMU_SUPPORT=y -CONFIG_ARM_SMMU=y - -# Serial -CONFIG_TTY=y -CONFIG_SERIAL_EARLYCON=y -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y - -# Watchdog -CONFIG_WATCHDOG=y -CONFIG_CADENCE_WATCHDOG=y - -# RTC -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ZYNQMP=y - -# Ethernet -CONFIG_NET_CADENCE=y -CONFIG_MACB=y - -# GPIO -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_ZYNQ=y - -# I2C -CONFIG_I2C=y -CONFIG_I2C_CADENCE=y - -# SPI -CONFIG_SPI=y -CONFIG_SPI_CADENCE=y -CONFIG_SPI_ZYNQMP_GQSPI=y - -# CAN -CONFIG_CAN=y -CONFIG_CAN_DEV=y -CONFIG_CAN_XILINXCAN=y - -# SATA -CONFIG_ATA=y -CONFIG_ATA_SFF=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_AHCI_CEVA=y - -# MMC/SD -CONFIG_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_OF_ARASAN=y - -# USB -CONFIG_USB=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_DWC3=y -CONFIG_USB_GADGET=y - -# DMA -CONFIG_DMA_ENGINE=y -CONFIG_XILINX_ZYNQMP_DMA=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg deleted file mode 100644 index 072a3febe..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg +++ /dev/null @@ -1,26 +0,0 @@ - -# Arch Feature Selections -CONFIG_ARM64=y -CONFIG_64BIT=y -CONFIG_ARCH_ZYNQMP=y - -# SMP -CONFIG_SMP=y - -# ARM 32-Bit compatiblity -CONFIG_COMPAT=y -# CONFIG_COMPAT_BRK is not set - -# CPU Frequency -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPU_IDLE=y -CONFIG_ARM_CPUIDLE=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc deleted file mode 100644 index 8fcb8e629..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc +++ /dev/null @@ -1,10 +0,0 @@ -define KFEATURE_DESCRIPTION "Xilinx Zynq UltraScale+ MPSoC" -define KFEATURE_COMPATIBILITY board - -include features/net/net.scc -include cfg/timer/no_hz.scc - -kconf hardware zynqmp.cfg -kconf hardware drivers-zynqmp.cfg -include bsp/xilinx/soc/drivers-softip.scc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.cfg deleted file mode 100644 index 50d5e4629..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.cfg +++ /dev/null @@ -1,45 +0,0 @@ -CONFIG_HYPERVISOR_GUEST=y -CONFIG_PARAVIRT=y -CONFIG_XEN=y -CONFIG_XEN_DOM0=y -CONFIG_XEN_PVHVM=y -CONFIG_XEN_SAVE_RESTORE=y -# CONFIG_XEN_DEBUG_FS is not set -CONFIG_MMU_NOTIFIER=y -CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_PCI_XEN=y -CONFIG_XEN_PCIDEV_FRONTEND=y -CONFIG_SYS_HYPERVISOR=y -CONFIG_XEN_BLKDEV_FRONTEND=y -CONFIG_XEN_BLKDEV_BACKEND=m -CONFIG_XEN_SCSI_FRONTEND=m -CONFIG_XEN_NETDEV_FRONTEND=y -CONFIG_XEN_NETDEV_BACKEND=m -CONFIG_INPUT_MISC=y -CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y -CONFIG_HVC_IRQ=y -CONFIG_HVC_XEN=y -CONFIG_HVC_XEN_FRONTEND=y -CONFIG_XEN_WDT=m -CONFIG_FB_SYS_FILLRECT=y -CONFIG_FB_SYS_COPYAREA=y -CONFIG_FB_SYS_IMAGEBLIT=y -CONFIG_FB_SYS_FOPS=y -CONFIG_FB_DEFERRED_IO=y -CONFIG_XEN_FBDEV_FRONTEND=y -CONFIG_XEN_BALLOON=y -CONFIG_XEN_SCRUB_PAGES=y -CONFIG_XEN_DEV_EVTCHN=y -CONFIG_XEN_BACKEND=y -CONFIG_XENFS=y -CONFIG_XEN_COMPAT_XENFS=y -CONFIG_XEN_SYS_HYPERVISOR=y -CONFIG_XEN_XENBUS_FRONTEND=y -CONFIG_XEN_GNTDEV=m -CONFIG_XEN_GRANT_DEV_ALLOC=m -CONFIG_SWIOTLB_XEN=y -CONFIG_XEN_PCIDEV_BACKEND=m -CONFIG_XEN_PRIVCMD=y -CONFIG_XEN_ACPI_PROCESSOR=m -CONFIG_XEN_MCE_LOG=y -CONFIG_XEN_HAVE_PVMMU=y diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.scc deleted file mode 100644 index b588e5df9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/xen.scc +++ /dev/null @@ -1,4 +0,0 @@ -define KFEATURE_DESCRIPTION "Xen Kernel Support" -define KFEATURE_COMPATIBILITY arch - -kconf non-hardware xen.cfg diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc deleted file mode 100644 index 1c9a4f3d8..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc +++ /dev/null @@ -1,15 +0,0 @@ -define KMACHINE zynqmp -define KTYPE standard -define KARCH arm64 - -include ktypes/standard/standard.scc - -include bsp/xilinx/soc/zynqmp.scc -include bsp/xilinx/board-common.scc - -include features/input/input.scc -include cfg/usb-mass-storage.scc - -# default policy for standard kernels -#include features/latencytop/latencytop.scc -#include features/profiling/profiling.scc diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc deleted file mode 100644 index 6cdfc7236..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc +++ /dev/null @@ -1,9 +0,0 @@ -define KMACHINE zynqmp -define KTYPE tiny -define KARCH arm64 - -include ktypes/tiny/tiny.scc - -include bsp/xilinx/soc/zynqmp.scc -include bsp/xilinx/board-common.scc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg deleted file mode 100644 index 37eaa4cff..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg +++ /dev/null @@ -1,19 +0,0 @@ -# Keyboard GPIO support -CONFIG_KEYBOARD_GPIO=y -CONFIG_KEYBOARD_GPIO_POLLED=y - -# Sound support for Zybo linux_bd project -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_ADI=y -CONFIG_SND_SOC_ADI_AXI_I2S=y -CONFIG_SND_SIMPLE_CARD=y -CONFIG_SND_SOC_SSM2602_I2C=y - -# Drivers for Digilent DRM encoder -# DRM encoder -CONFIG_DRM_DIGILENT_ENCODER=y -# Common Clock Framework -CONFIG_COMMON_CLK_DGLNT_DYNCLK=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc deleted file mode 100644 index f3e6e8b86..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc +++ /dev/null @@ -1,7 +0,0 @@ -define KFEATURE_DESCRIPTION "Kernel Config for ZYBO Linux-BD Design" -define KFEATURE_COMPATIBILITY board - -kconf hardware zybo-linux-bd-zynq7.cfg - -include bsp/xilinx/soc/drivers-drm.scc - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.cfg deleted file mode 100644 index 44462beb5..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.cfg +++ /dev/null @@ -1,3 +0,0 @@ -# Device Tree support -CONFIG_OF_CONFIGFS=y -CONFIG_OF_OVERLAY=y diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.scc deleted file mode 100644 index 14f05ff42..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/overlay/overlay.scc +++ /dev/null @@ -1,4 +0,0 @@ -define KFEATURE_DESCRIPTION "Enable overlay" -define KFEATURE_COMPATIBILITY board - -kconfig hardware overlay.cfg diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg deleted file mode 100644 index 048ffe493..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_UIO=y -CONFIG_UIO_PDRV_GENIRQ=y -CONFIG_UIO_DMEM_GENIRQ=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc deleted file mode 100644 index 9697949ab..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc +++ /dev/null @@ -1,5 +0,0 @@ -define KFEATURE_DESCRIPTION "Enable UIO Support" -define KFEATURE_COMPATIBILITY board - -kconfig hardware uio.cfg - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg deleted file mode 100644 index 49a5d6fe2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg +++ /dev/null @@ -1,23 +0,0 @@ -# Media support -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y - -# V4L -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L2=y -CONFIG_VIDEO_V4L2_SUBDEV_API=y - -# Xilinx Video drivers -CONFIG_VIDEO_XILINX=y -CONFIG_VIDEO_XILINX_CFA=y -CONFIG_VIDEO_XILINX_CRESAMPLE=y -CONFIG_VIDEO_XILINX_HLS=y -CONFIG_VIDEO_XILINX_REMAPPER=y -CONFIG_VIDEO_XILINX_RGB2YUV=y -CONFIG_VIDEO_XILINX_SCALER=y -CONFIG_VIDEO_XILINX_SWITCH=y -CONFIG_VIDEO_XILINX_TPG=y -CONFIG_VIDEO_XILINX_VTC=y - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc deleted file mode 100644 index 6d6ba6ac4..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc +++ /dev/null @@ -1,4 +0,0 @@ -define KFEATURE_DESCRIPTION "Enable Xilinx V4L2 support" -define KFEATURE_COMPATIBILITY board - -kconfig hardware v4l2-xilinx.cfg
\ No newline at end of file diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-kernel/lopper/lopper.bb b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/lopper/lopper.bb new file mode 100644 index 000000000..ea3a9a34d --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-kernel/lopper/lopper.bb @@ -0,0 +1,42 @@ +SUMMARY = "Device tree lopper" +DESCRIPTION = "Tool to subset a system device tree" +SECTION = "bootloader" +LICENSE = "BSD-3-Clause" +DEPENDS += "python3-dtc" + +RDEPENDS_${PN} += "python3-core python3-dtc" + +SRC_URI = "git://github.com/devicetree-org/lopper.git" + +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=8e5f5f691f01c9fdfa7a7f2d535be619" + +SRCREV = "f4389167a200c5d41ee276ff9ad67d01ef6f0aec" + +S = "${WORKDIR}/git" + +do_configure() { + : +} + +do_compile() { + sed -i 's,#!/usr/bin/python3,#!/usr/bin/env python3,' lopper.py + sed -i 's,#!/usr/bin/python3,#!/usr/bin/env python3,' lopper_sanity.py +} + +do_install() { + datadirrelpath=${@os.path.relpath(d.getVar('datadir'), d.getVar('bindir'))} + + mkdir -p ${D}/${bindir} + mkdir -p ${D}/${datadir}/lopper + + cp -r ${S}/README* ${D}/${datadir}/lopper/. + cp -r ${S}/assists* ${D}/${datadir}/lopper/. + cp -r ${S}/lop* ${D}/${datadir}/lopper/. + cp -r ${S}/LICENSE* ${D}/${datadir}/lopper/. + cp -r ${S}/device-tree* ${D}/${datadir}/lopper/. + cp -r ${S}/.gitignore ${D}/${datadir}/lopper/. + + ln -s ${datadirrelpath}/lopper/lopper.py ${D}/${bindir}/. +} + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend deleted file mode 100644 index 1a00c61c0..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils%.bbappend +++ /dev/null @@ -1,32 +0,0 @@ -FILESEXTRAPATHS_append_microblaze := "${THISDIR}/binutils-2.32:" -SRC_URI_append_microblaze = " \ - file://0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch \ - file://0002-Add-mlittle-endian-and-mbig-endian-flags.patch \ - file://0003-Disable-the-warning-message-for-eh_frame_hdr.patch \ - file://0004-Fix-relaxation-of-assembler-resolved-references.patch \ - file://0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \ - file://0006-upstream-change-to-garbage-collection-sweep-causes-m.patch \ - file://0007-Fix-bug-in-TLSTPREL-Relocation.patch \ - file://0008-Added-Address-extension-instructions.patch \ - file://0009-fixing-the-MAX_OPCODES-to-correct-value.patch \ - file://0010-Add-new-bit-field-instructions.patch \ - file://0011-fixing-the-imm-bug.patch \ - file://0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch \ - file://0013-fixing-the-constant-range-check-issue.patch \ - file://0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch \ - file://0015-intial-commit-of-MB-64-bit.patch \ - file://0016-MB-X-initial-commit.patch \ - file://0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch \ - file://0018-Added-relocations-for-MB-X.patch \ - file://0019-Fixed-MB-x-relocation-issues.patch \ - file://0020-Fixing-the-branch-related-issues.patch \ - file://0021-Fixed-address-computation-issues-with-64bit-address.patch \ - file://0022-Adding-new-relocation-to-support-64bit-rodata.patch \ - file://0023-fixing-the-.bss-relocation-issue.patch \ - file://0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch \ - file://0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch \ - file://0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch \ - file://0029-Patch-Microblaze-Binutils-security-check-is-causing-.patch \ - file://0030-fixing-the-long-long-long-mingw-toolchain-issue.patch \ - file://0031-fixing-the-_STACK_SIZE-issue-with-the-flto-flag.patch \ - " diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch deleted file mode 100644 index 586084855..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0001-Add-wdc.ext.clear-and-wdc.ext.flush-insns.patch +++ /dev/null @@ -1,63 +0,0 @@ -From ad671256112cfee47871e91c6d390daea1b8fa2f Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Wed, 8 May 2013 11:03:36 +1000 -Subject: [PATCH] Add wdc.ext.clear and wdc.ext.flush insns - -Added two new instructions, wdc.ext.clear and wdc.ext.flush, -to enable MicroBlaze to flush an external cache, which is -used with the new coherency support for multiprocessing. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> - ---- - opcodes/microblaze-opc.h | 5 ++++- - opcodes/microblaze-opcm.h | 4 ++-- - 2 files changed, 6 insertions(+), 3 deletions(-) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 62ee3c9..865151f 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -91,6 +91,7 @@ - #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ - #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ - #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ -+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ - #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ - - /* New Mask for msrset, msrclr insns. */ -@@ -101,7 +102,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 289 -+#define MAX_OPCODES 291 - - struct op_code_struct - { -@@ -174,7 +175,9 @@ struct op_code_struct - {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst }, - {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst }, - {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst }, -+ {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, - {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, -+ {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst }, - {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst }, - {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, - {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 5a2d3b0..42f3dd3 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -33,8 +33,8 @@ enum microblaze_instr - /* 'or/and/xor' are C++ keywords. */ - microblaze_or, microblaze_and, microblaze_xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -- wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd, -- brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, -+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br, -+ brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, - bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, - imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, - brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0002-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0002-Add-mlittle-endian-and-mbig-endian-flags.patch deleted file mode 100644 index f0df4b8fe..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0002-Add-mlittle-endian-and-mbig-endian-flags.patch +++ /dev/null @@ -1,62 +0,0 @@ -From cd4e233a38df5eee833c77f4393e710ad5383ac0 Mon Sep 17 00:00:00 2001 -From: nagaraju <nmekala@xilix.com> -Date: Tue, 19 Mar 2013 17:18:23 +0530 -Subject: [PATCH] Add mlittle-endian and mbig-endian flags - -Added support in gas for mlittle-endian and mbig-endian flags -as options. - -Updated show usage for MicroBlaze specific assembler options -to include new entries. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> - ---- - gas/config/tc-microblaze.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index ab90c6b..c92e9ce 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -37,6 +37,8 @@ - - #define OPTION_EB (OPTION_MD_BASE + 0) - #define OPTION_EL (OPTION_MD_BASE + 1) -+#define OPTION_LITTLE (OPTION_MD_BASE + 2) -+#define OPTION_BIG (OPTION_MD_BASE + 3) - - void microblaze_generate_symbol (char *sym); - static bfd_boolean check_spl_reg (unsigned *); -@@ -1845,6 +1847,8 @@ struct option md_longopts[] = - { - {"EB", no_argument, NULL, OPTION_EB}, - {"EL", no_argument, NULL, OPTION_EL}, -+ {"mlittle-endian", no_argument, NULL, OPTION_LITTLE}, -+ {"mbig-endian", no_argument, NULL, OPTION_BIG}, - { NULL, no_argument, NULL, 0} - }; - -@@ -2498,9 +2502,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) - switch (c) - { - case OPTION_EB: -+ case OPTION_BIG: - target_big_endian = 1; - break; - case OPTION_EL: -+ case OPTION_LITTLE: - target_big_endian = 0; - break; - default: -@@ -2515,6 +2521,9 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) - /* fprintf(stream, _("\ - MicroBlaze options:\n\ - -noSmall Data in the comm and data sections do not go into the small data section\n")); */ -+ fprintf (stream, _(" MicroBlaze specific assembler options:\n")); -+ fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); -+ fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); - } - - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0003-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0003-Disable-the-warning-message-for-eh_frame_hdr.patch deleted file mode 100644 index 64d27d92b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0003-Disable-the-warning-message-for-eh_frame_hdr.patch +++ /dev/null @@ -1,30 +0,0 @@ -From a8cbf5f3e93150132f194cfa3008fe896457171f Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> -Date: Fri, 22 Jun 2012 01:20:20 +0200 -Subject: [PATCH] Disable the warning message for eh_frame_hdr - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf-eh-frame.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c -index a13e81e..1824ba6 100644 ---- a/bfd/elf-eh-frame.c -+++ b/bfd/elf-eh-frame.c -@@ -1044,10 +1044,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, - goto success; - - free_no_table: -+/* FIXME: Remove the microblaze specifics when relaxing gets fixed. */ -+if (bfd_get_arch(abfd) != bfd_arch_microblaze) { - _bfd_error_handler - /* xgettext:c-format */ - (_("error in %pB(%pA); no .eh_frame_hdr table will be created"), - abfd, sec); -+} - hdr_info->u.dwarf.table = FALSE; - if (sec_info) - free (sec_info); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0004-Fix-relaxation-of-assembler-resolved-references.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0004-Fix-relaxation-of-assembler-resolved-references.patch deleted file mode 100644 index 4cae439ed..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0004-Fix-relaxation-of-assembler-resolved-references.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 2b87c5c4ec4a7d6285c0991c202aae3cf8401d99 Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> -Date: Tue, 14 Feb 2012 01:00:22 +0100 -Subject: [PATCH] Fix relaxation of assembler resolved references - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf32-microblaze.c | 38 ++++++++++++++++++++++++++++++++++++++ - gas/config/tc-microblaze.c | 1 + - 2 files changed, 39 insertions(+) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index e3c8027..359484d 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -1973,6 +1973,44 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) -+ { -+ unsigned int val; -+ -+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -+ -+ /* This was a PC-relative instruction that was completely resolved. */ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend -+ + isym->st_value, sec); -+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, -+ irelscan->r_addend); -+ } -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { -+ fprintf(stderr, "Unhandled NONE 64\n"); -+ } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index c92e9ce..3e72840 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -2205,6 +2205,7 @@ md_apply_fix (fixS * fixP, - else - fixP->fx_r_type = BFD_RELOC_NONE; - fixP->fx_addsy = section_symbol (absolute_section); -+ fixP->fx_done = 0; - } - return; - } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch deleted file mode 100644 index a2954c91e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0005-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch +++ /dev/null @@ -1,245 +0,0 @@ -From 68a91eb7ac94f0e0c6e9ebd7ad148c80cbc227df Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 6 Feb 2017 15:53:08 +0530 -Subject: [PATCH] Fixup debug_loc sections after linker relaxation Adds a new - reloctype R_MICROBLAZE_32_NONE, used for passing reloc info from the - assembler to the linker when the linker manages to fully resolve a local - symbol reference. - -This is a workaround for design flaws in the assembler to -linker interface with regards to linker relaxation. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/bfd-in2.h | 9 ++++++-- - bfd/elf32-microblaze.c | 53 ++++++++++++++++++++++++++++++++++------------ - bfd/libbfd.h | 1 + - bfd/reloc.c | 6 ++++++ - binutils/readelf.c | 4 ++++ - gas/config/tc-microblaze.c | 5 ++++- - include/elf/microblaze.h | 2 ++ - 7 files changed, 64 insertions(+), 16 deletions(-) - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index e251d7e..fe6933a 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5867,10 +5867,15 @@ value relative to the read-write small data area anchor */ - expressions of the form "Symbol Op Symbol" */ - BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, - --/* This is a 64 bit reloc that stores the 32 bit pc relative -+/* This is a 32 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). No relocation is - done here - only used for relaxing */ -- BFD_RELOC_MICROBLAZE_64_NONE, -+ BFD_RELOC_MICROBLAZE_32_NONE, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative -+ * +value in two words (with an imm instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64_NONE, - - /* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 359484d..1c69c26 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -176,7 +176,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - FALSE), /* PC relative offset? */ - -- /* This reloc does nothing. Used for relaxation. */ -+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_32_NONE",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* This reloc does nothing. Used for relaxation. */ - HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ - 0, /* Rightshift. */ - 3, /* Size (0 = byte, 1 = short, 2 = long). */ -@@ -562,6 +576,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_NONE: - microblaze_reloc = R_MICROBLAZE_NONE; - break; -+ case BFD_RELOC_MICROBLAZE_32_NONE: -+ microblaze_reloc = R_MICROBLAZE_32_NONE; -+ break; - case BFD_RELOC_MICROBLAZE_64_NONE: - microblaze_reloc = R_MICROBLAZE_64_NONE; - break; -@@ -1918,6 +1935,7 @@ microblaze_elf_relax_section (bfd *abfd, - } - break; - case R_MICROBLAZE_NONE: -+ case R_MICROBLAZE_32_NONE: - { - /* This was a PC-relative instruction that was - completely resolved. */ -@@ -1926,12 +1944,18 @@ microblaze_elf_relax_section (bfd *abfd, - target_address = irel->r_addend + irel->r_offset; - sfix = calc_fixup (irel->r_offset, 0, sec); - efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } - irel->r_addend -= (efix - sfix); - /* Should use HOWTO. */ - microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, - irel->r_addend); -- } -- break; -+ } -+ break; - case R_MICROBLAZE_64_NONE: - { - /* This was a PC-relative 64-bit instruction that was -@@ -1973,12 +1997,16 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) -+ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) - { - unsigned int val; - - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); - -+ /* hax: We only do the following fixup for debug location lists. */ -+ if (strcmp(".debug_loc", o->name)) -+ continue; -+ - /* This was a PC-relative instruction that was completely resolved. */ - if (ocontents == NULL) - { -@@ -1999,18 +2027,17 @@ microblaze_elf_relax_section (bfd *abfd, - (file_ptr) 0, - o->rawsize)) - goto error_return; -- elf_section_data (o)->this_hdr.contents = ocontents; -- } -- } -- irelscan->r_addend -= calc_fixup (irelscan->r_addend -- + isym->st_value, sec); -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } - val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ if (val != irelscan->r_addend) { -+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); - microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, - irelscan->r_addend); - } -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { -- fprintf(stderr, "Unhandled NONE 64\n"); -- } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -@@ -2070,7 +2097,7 @@ microblaze_elf_relax_section (bfd *abfd, - elf_section_data (o)->this_hdr.contents = ocontents; - } - } -- irelscan->r_addend -= calc_fixup (irel->r_addend -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend - + isym->st_value, - 0, - sec); -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 36284d7..feb9fad 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2901,6 +2901,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_32_ROSDA", - "BFD_RELOC_MICROBLAZE_32_RWSDA", - "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", -+ "BFD_RELOC_MICROBLAZE_32_NONE", - "BFD_RELOC_MICROBLAZE_64_NONE", - "BFD_RELOC_MICROBLAZE_64_GOTPC", - "BFD_RELOC_MICROBLAZE_64_GOT", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index e6446a7..87753ae 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6796,6 +6796,12 @@ ENUMDOC - This is a 32 bit reloc for the microblaze to handle - expressions of the form "Symbol Op Symbol" - ENUM -+ BFD_RELOC_MICROBLAZE_32_NONE -+ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imm instruction). No relocation is -+ done here - only used for relaxing -+ENUM - BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative -diff --git a/binutils/readelf.c b/binutils/readelf.c -index 9df3742..1bbc2d1 100644 ---- a/binutils/readelf.c -+++ b/binutils/readelf.c -@@ -13020,6 +13020,10 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type) - || reloc_type == 32 /* R_AVR_DIFF32. */); - case EM_METAG: - return reloc_type == 3; /* R_METAG_NONE. */ -+ case EM_MICROBLAZE: -+ return reloc_type == 30 /* R_MICROBLAZE_32_NONE. */ -+ || reloc_type == 0 /* R_MICROBLAZE_NONE. */ -+ || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ - case EM_NDS32: - return (reloc_type == 0 /* R_XTENSA_NONE. */ - || reloc_type == 204 /* R_NDS32_DIFF8. */ -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 3e72840..fa665b4 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -2201,7 +2201,9 @@ md_apply_fix (fixS * fixP, - /* This fixup has been resolved. Create a reloc in case the linker - moves code around due to relaxing. */ - if (fixP->fx_r_type == BFD_RELOC_64_PCREL) -- fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; -+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; -+ else if (fixP->fx_r_type == BFD_RELOC_32) -+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; - else - fixP->fx_r_type = BFD_RELOC_NONE; - fixP->fx_addsy = section_symbol (absolute_section); -@@ -2426,6 +2428,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) - switch (fixp->fx_r_type) - { - case BFD_RELOC_NONE: -+ case BFD_RELOC_MICROBLAZE_32_NONE: - case BFD_RELOC_MICROBLAZE_64_NONE: - case BFD_RELOC_32: - case BFD_RELOC_MICROBLAZE_32_LO: -diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index 830b5ad..6ee0966 100644 ---- a/include/elf/microblaze.h -+++ b/include/elf/microblaze.h -@@ -61,6 +61,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) - RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ -+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) -+ - END_RELOC_NUMBERS (R_MICROBLAZE_max) - - /* Global base address names. */ diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch deleted file mode 100644 index 8c72ecf7d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0006-upstream-change-to-garbage-collection-sweep-causes-m.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 0ee164f7e50d88e1cda4fdebd6f7bd182d0f27b3 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Wed, 27 Feb 2013 13:56:11 +1000 -Subject: [PATCH] upstream change to garbage collection sweep causes mb - regression - -Upstream change for PR13177 now clears the def_regular during gc_sweep of a -section. (All other archs in binutils/bfd/elf32-*.c received an update -to a warning about unresolvable relocations - this warning is not present -in binutils/bfd/elf32-microblaze.c, but this warning check would not -prevent the error being seen) - -The visible issue with this change is when running a c++ application -in Petalinux which links libstdc++.so for exception handling it segfaults -on execution. - -This does not occur if static linking libstdc++.a, so its during the -relocations for a shared lib with garbage collection this occurs - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elflink.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/bfd/elflink.c b/bfd/elflink.c -index e50c0e4..09d43e3 100644 ---- a/bfd/elflink.c -+++ b/bfd/elflink.c -@@ -6187,7 +6187,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) - - inf = (struct elf_gc_sweep_symbol_info *) data; - (*inf->hide_symbol) (inf->info, h, TRUE); -- h->def_regular = 0; - h->ref_regular = 0; - h->ref_regular_nonweak = 0; - } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0007-Fix-bug-in-TLSTPREL-Relocation.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0007-Fix-bug-in-TLSTPREL-Relocation.patch deleted file mode 100644 index 472aa0cf8..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0007-Fix-bug-in-TLSTPREL-Relocation.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 1367d2933de24720fa24032947f784b72b54e974 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 15 Jun 2015 16:50:30 +0530 -Subject: [PATCH] Fix bug in TLSTPREL Relocation - -Fixed the problem related to the fixup/relocations TLSTPREL. -When the fixup is applied the addend is not added at the correct offset -of the instruction. The offset is hard coded considering its big endian -and it fails for Little endian. This patch allows support for both -big & little-endian compilers - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf32-microblaze.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 1c69c26..d19a6dc 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -1451,9 +1451,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, - relocation += addend; - relocation -= dtprel_base(info); - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -- contents + offset + 2); -+ contents + offset + endian); - bfd_put_16 (input_bfd, relocation & 0xffff, -- contents + offset + 2 + INST_WORD_SIZE); -+ contents + offset + endian + INST_WORD_SIZE); - break; - case (int) R_MICROBLAZE_TEXTREL_64: - case (int) R_MICROBLAZE_TEXTREL_32_LO: diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0008-Added-Address-extension-instructions.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0008-Added-Address-extension-instructions.patch deleted file mode 100644 index 23d179352..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0008-Added-Address-extension-instructions.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 57675e049d815f6fce100bd5effaea187abacf04 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 18 Jan 2016 12:28:21 +0530 -Subject: [PATCH] Added Address extension instructions - -This patch adds the support of new instructions which are required -for supporting Address extension feature. - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - -ChangeLog: - 2016-01-18 Nagaraju Mekala <nmekala@xilix.com> - - *microblaze-opc.h (op_code_struct): Update - Added new instructions - *microblaze-opcm.h (microblaze_instr): Update - Added new instructions - ---- - opcodes/microblaze-opc.h | 11 +++++++++++ - opcodes/microblaze-opcm.h | 10 +++++----- - 2 files changed, 16 insertions(+), 5 deletions(-) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 865151f..330f104 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -178,8 +178,11 @@ struct op_code_struct - {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, - {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, - {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst }, -+ {"wdc.clear.ea", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E6, OPCODE_MASK_H34B, wdcclearea, special_inst }, - {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst }, -+ {"mtse", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9500C000, OPCODE_MASK_H13S, mtse,special_inst }, - {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, -+ {"mfse", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94088000, OPCODE_MASK_H23S, mfse, special_inst }, - {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, - {"brd", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst }, - {"brld", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst }, -@@ -229,18 +232,24 @@ struct op_code_struct - {"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst }, - {"lbu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst }, - {"lbur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst }, -+ {"lbuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000080, OPCODE_MASK_H4, lbuea, memory_load_inst }, - {"lhu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst }, - {"lhur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst }, -+ {"lhuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000080, OPCODE_MASK_H4, lhuea, memory_load_inst }, - {"lw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst }, - {"lwr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst }, - {"lwx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst }, -+ {"lwea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000080, OPCODE_MASK_H4, lwea, memory_load_inst }, - {"sb", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst }, - {"sbr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst }, -+ {"sbea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000080, OPCODE_MASK_H4, sbea, memory_store_inst }, - {"sh", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst }, - {"shr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst }, -+ {"shea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000080, OPCODE_MASK_H4, shea, memory_store_inst }, - {"sw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst }, - {"swr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst }, - {"swx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst }, -+ {"swea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000080, OPCODE_MASK_H4, swea, memory_store_inst }, - {"lbui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst }, - {"lhui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst }, - {"lwi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst }, -@@ -405,6 +414,8 @@ struct op_code_struct - {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst }, - {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst }, - {"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */ -+ {"hibernate", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 8. */ -+ {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */ - {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, - {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, - {"", 0, 0, 0, 0, 0, 0, 0, 0}, -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 42f3dd3..1c39dbf 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -33,13 +33,13 @@ enum microblaze_instr - /* 'or/and/xor' are C++ keywords. */ - microblaze_or, microblaze_and, microblaze_xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -- wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, br, -- brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, -- bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, -+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, wdcclearea, mts, mtse, -+ mfs, mfse, mbar, br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, -+ bne, bned, blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, - imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, - brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, -- bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, -- shr, sw, swr, swx, lbui, lhui, lwi, -+ bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, -+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, - sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, - fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0009-fixing-the-MAX_OPCODES-to-correct-value.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0009-fixing-the-MAX_OPCODES-to-correct-value.patch deleted file mode 100644 index 0eaa69900..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0009-fixing-the-MAX_OPCODES-to-correct-value.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 98b1a76e13ad32c979208a22e5b6b7cb260426b0 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Thu, 28 Jan 2016 14:07:34 +0530 -Subject: [PATCH] fixing the MAX_OPCODES to correct value - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - opcodes/microblaze-opc.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 330f104..2a6b841 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -102,7 +102,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 291 -+#define MAX_OPCODES 299 - - struct op_code_struct - { diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0010-Add-new-bit-field-instructions.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0010-Add-new-bit-field-instructions.patch deleted file mode 100644 index ea288aa15..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0010-Add-new-bit-field-instructions.patch +++ /dev/null @@ -1,228 +0,0 @@ -From 200359b776fbb19a1423ff4d0c46f5301af197c6 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 18 Jul 2016 12:24:28 +0530 -Subject: [PATCH] Add new bit-field instructions - -This patches adds new bsefi and bsifi instructions. -BSEFI- The instruction shall extract a bit field from a -register and place it right-adjusted in the destination register. -The other bits in the destination register shall be set to zero -BSIFI- The instruction shall insert a right-adjusted bit field -from a register at another position in the destination register. -The rest of the bits in the destination register shall be unchanged - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - ---- - gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++++++++++- - opcodes/microblaze-dis.c | 16 +++++++++++ - opcodes/microblaze-opc.h | 12 +++++++- - opcodes/microblaze-opcm.h | 6 +++- - 4 files changed, 102 insertions(+), 3 deletions(-) - -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index fa665b4..71bb888 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -917,7 +917,7 @@ md_assemble (char * str) - unsigned reg2; - unsigned reg3; - unsigned isize; -- unsigned int immed, temp; -+ unsigned int immed, immed2, temp; - expressionS exp; - char name[20]; - -@@ -1172,7 +1172,76 @@ md_assemble (char * str) - inst |= (reg2 << RA_LOW) & RA_MASK; - inst |= (immed << IMM_LOW) & IMM5_MASK; - break; -+ case INST_TYPE_RD_R1_IMM5_IMM5: -+ if (strcmp (op_end, "")) -+ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ -+ else -+ { -+ as_fatal (_("Error in statement syntax")); -+ reg1 = 0; -+ } -+ if (strcmp (op_end, "")) -+ op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ -+ else -+ { -+ as_fatal (_("Error in statement syntax")); -+ reg2 = 0; -+ } -+ -+ /* Check for spl registers. */ -+ if (check_spl_reg (®1)) -+ as_fatal (_("Cannot use special register with this instruction")); -+ if (check_spl_reg (®2)) -+ as_fatal (_("Cannot use special register with this instruction")); - -+ /* Width immediate value. */ -+ if (strcmp (op_end, "")) -+ op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); -+ else -+ as_fatal (_("Error in statement syntax")); -+ if (exp.X_op != O_constant) -+ { -+ as_warn (_("Symbol used as immediate width value for bit field instruction")); -+ immed = 1; -+ } -+ else -+ immed = exp.X_add_number; -+ if (opcode->instr == bsefi && immed > 31) -+ as_fatal (_("Width value must be less than 32")); -+ -+ /* Shift immediate value. */ -+ if (strcmp (op_end, "")) -+ op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); -+ else -+ as_fatal (_("Error in statement syntax")); -+ if (exp.X_op != O_constant) -+ { -+ as_warn (_("Symbol used as immediate shift value for bit field instruction")); -+ immed2 = 0; -+ } -+ else -+ { -+ output = frag_more (isize); -+ immed2 = exp.X_add_number; -+ } -+ if (immed2 != (immed2 % 32)) -+ { -+ as_warn (_("Shift value greater than 32. using <value %% 32>")); -+ immed2 = immed2 % 32; -+ } -+ -+ /* Check combined value. */ -+ if (immed + immed2 > 32) -+ as_fatal (_("Width value + shift value must not be greater than 32")); -+ -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (reg2 << RA_LOW) & RA_MASK; -+ if (opcode->instr == bsefi) -+ inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */ -+ else -+ inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */ -+ inst |= (immed2 << IMM_LOW) & IMM5_MASK; -+ break; - case INST_TYPE_R1_R2: - if (strcmp (op_end, "")) - op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index f691740..f8aaf27 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -74,6 +74,18 @@ get_field_imm5_mbar (long instr) - } - - static char * -+get_field_imm5width (long instr) -+{ -+ char tmpstr[25]; -+ -+ if (instr & 0x00004000) -+ sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ -+ else -+ sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ -+ return (strdup (tmpstr)); -+} -+ -+static char * - get_field_rfsl (long instr) - { - char tmpstr[25]; -@@ -396,6 +408,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - /* For mbar 16 or sleep insn. */ - case INST_TYPE_NONE: - break; -+ /* For bit field insns. */ -+ case INST_TYPE_RD_R1_IMM5_IMM5: -+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); -+ break; - /* For tuqula instruction */ - case INST_TYPE_RD: - print_func (stream, "\t%s", get_field_rd (inst)); -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 2a6b841..ce8ac35 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -59,6 +59,9 @@ - /* For mbar. */ - #define INST_TYPE_IMM5 20 - -+/* For bsefi and bsifi */ -+#define INST_TYPE_RD_R1_IMM5_IMM5 21 -+ - #define INST_TYPE_NONE 25 - - -@@ -89,7 +92,9 @@ - #define OPCODE_MASK_H124 0xFFFF07FF /* High 16, and low 11 bits. */ - #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits. */ - #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ -+#define OPCODE_MASK_H3B 0xFC00C600 /* High 6 bits and bits 16, 17, 21, 22. */ - #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ -+#define OPCODE_MASK_H32B 0xFC00C000 /* High 6 bits and bit 16, 17. */ - #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ - #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ - #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ -@@ -102,7 +107,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 299 -+#define MAX_OPCODES 301 - - struct op_code_struct - { -@@ -159,6 +164,8 @@ struct op_code_struct - {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst }, - {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst }, - {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst }, -+ {"bsefi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, -+ {"bsifi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, - {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, - {"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst }, - {"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst }, -@@ -438,5 +445,8 @@ char pvr_register_prefix[] = "rpvr"; - #define MIN_IMM5 ((int) 0x00000000) - #define MAX_IMM5 ((int) 0x0000001f) - -+#define MIN_IMM_WIDTH ((int) 0x00000001) -+#define MAX_IMM_WIDTH ((int) 0x00000020) -+ - #endif /* MICROBLAZE_OPC */ - -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 1c39dbf..2866269 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -29,7 +29,7 @@ enum microblaze_instr - addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, - mulh, mulhu, mulhsu,swapb,swaph, - idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, -- ncget, ncput, muli, bslli, bsrai, bsrli, mului, -+ ncget, ncput, muli, bslli, bsrai, bsrli, bsefi, bsifi, mului, - /* 'or/and/xor' are C++ keywords. */ - microblaze_or, microblaze_and, microblaze_xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -@@ -129,6 +129,7 @@ enum microblaze_instr_type - #define RB_LOW 11 /* Low bit for RB. */ - #define IMM_LOW 0 /* Low bit for immediate. */ - #define IMM_MBAR 21 /* low bit for mbar instruction. */ -+#define IMM_WIDTH_LOW 6 /* Low bit for immediate width */ - - #define RD_MASK 0x03E00000 - #define RA_MASK 0x001F0000 -@@ -141,6 +142,9 @@ enum microblaze_instr_type - /* Imm mask for mbar. */ - #define IMM5_MBAR_MASK 0x03E00000 - -+/* Imm mask for extract/insert width. */ -+#define IMM5_WIDTH_MASK 0x000007C0 -+ - /* FSL imm mask for get, put instructions. */ - #define RFSL_MASK 0x000000F - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0011-fixing-the-imm-bug.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0011-fixing-the-imm-bug.patch deleted file mode 100644 index 43d368c3b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0011-fixing-the-imm-bug.patch +++ /dev/null @@ -1,26 +0,0 @@ -From cb65478b8ec240b372a9da7fe33875a59e89a1fe Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 10 Jul 2017 16:07:28 +0530 -Subject: [PATCH] fixing the imm bug. with relax option imm -1 is also getting - removed this is corrected now. - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf32-microblaze.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index d19a6dc..d001437 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -1869,8 +1869,7 @@ microblaze_elf_relax_section (bfd *abfd, - else - symval += irel->r_addend; - -- if ((symval & 0xffff8000) == 0 -- || (symval & 0xffff8000) == 0xffff8000) -+ if ((symval & 0xffff8000) == 0) - { - /* We can delete this instruction. */ - sec->relax[sec->relax_count].addr = irel->r_offset; diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch deleted file mode 100644 index 9abed968b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0012-Patch-Microblaze-fixed-bug-in-GCC-so-that-It-will-su.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 58271555959fcc3eadb1f23c8d31d793c979984b Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Fri, 29 Sep 2017 18:00:23 +0530 -Subject: [PATCH] fixed bug in GCC so that It will support .long 0U and .long - 0u - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - gas/expr.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/gas/expr.c b/gas/expr.c -index ee85bda..b502418 100644 ---- a/gas/expr.c -+++ b/gas/expr.c -@@ -810,6 +810,15 @@ operand (expressionS *expressionP, enum expr_mode mode) - break; - } - } -+ if ((*input_line_pointer == 'U') || (*input_line_pointer == 'u')) -+ { -+ input_line_pointer--; -+ -+ integer_constant ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) -+ ? 0 : 10, -+ expressionP); -+ break; -+ } - c = *input_line_pointer; - switch (c) - { diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0013-fixing-the-constant-range-check-issue.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0013-fixing-the-constant-range-check-issue.patch deleted file mode 100644 index 4aef7c982..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0013-fixing-the-constant-range-check-issue.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 70ba2154c2261d5a9d35a765c29acc5fdcdeea38 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 16 Oct 2017 15:44:23 +0530 -Subject: [PATCH] fixing the constant range check issue sample error: not in - range ffffffff80000000..7fffffff, not ffffffff70000000 - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - gas/config/tc-microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 71bb888..16b10d0 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -757,7 +757,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) - if ((e->X_add_number >> 31) == 1) - e->X_add_number |= -((addressT) (1U << 31)); - -- if (e->X_add_number < min || e->X_add_number > max) -+ if ((int)e->X_add_number < min || (int)e->X_add_number > max) - { - as_fatal (_("operand must be absolute in range %lx..%lx, not %lx"), - (long) min, (long) max, (long) e->X_add_number); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch deleted file mode 100644 index 211825694..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0014-Patch-Microblaze-Compiler-will-give-error-messages-i.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 1b8f6099c5f85d77ef666becff1c4edd0aa724ab Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 21 Feb 2018 12:32:02 +0530 -Subject: [PATCH] Compiler will give error messages in more detail for - mxl-gp-opt flag.. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - ld/ldmain.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/ld/ldmain.c b/ld/ldmain.c -index 725512f..2ed413a 100644 ---- a/ld/ldmain.c -+++ b/ld/ldmain.c -@@ -1448,6 +1448,18 @@ reloc_overflow (struct bfd_link_info *info, - break; - case bfd_link_hash_defined: - case bfd_link_hash_defweak: -+ -+ if((strcmp(reloc_name,"R_MICROBLAZE_SRW32") == 0) && entry->type == bfd_link_hash_defined) -+ { -+ einfo (_(" relocation truncated to fit: don't enable small data pointer optimizations[mxl-gp-opt] if extern or multiple declarations used: " -+ "%s against symbol `%T' defined in %A section in %B"), -+ reloc_name, entry->root.string, -+ entry->u.def.section, -+ entry->u.def.section == bfd_abs_section_ptr -+ ? info->output_bfd : entry->u.def.section->owner); -+ break; -+ } -+ - einfo (_(" relocation truncated to fit: " - "%s against symbol `%pT' defined in %pA section in %pB"), - reloc_name, entry->root.string, diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0015-intial-commit-of-MB-64-bit.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0015-intial-commit-of-MB-64-bit.patch deleted file mode 100644 index 1afe8307e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0015-intial-commit-of-MB-64-bit.patch +++ /dev/null @@ -1,4738 +0,0 @@ -From e0a7cf883ed02a73fda5f7d3e131afc8f1ebe416 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Sun, 30 Sep 2018 16:28:28 +0530 -Subject: [PATCH] intial commit of MB 64-bit - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/Makefile.am | 2 + - bfd/Makefile.in | 3 + - bfd/config.bfd | 4 + - bfd/configure | 2 + - bfd/configure.ac | 2 + - bfd/cpu-microblaze.c | 52 +- - bfd/elf64-microblaze.c | 3584 ++++++++++++++++++++++++++++++++++++ - bfd/targets.c | 6 + - gas/config/tc-microblaze.c | 274 ++- - gas/config/tc-microblaze.h | 4 +- - include/elf/common.h | 1 + - ld/Makefile.am | 8 + - ld/Makefile.in | 10 + - ld/configure.tgt | 3 + - ld/emulparams/elf64microblaze.sh | 23 + - ld/emulparams/elf64microblazeel.sh | 23 + - opcodes/microblaze-dis.c | 39 +- - opcodes/microblaze-opc.h | 162 +- - opcodes/microblaze-opcm.h | 20 +- - 19 files changed, 4181 insertions(+), 41 deletions(-) - create mode 100644 bfd/elf64-microblaze.c - create mode 100644 ld/emulparams/elf64microblaze.sh - create mode 100644 ld/emulparams/elf64microblazeel.sh - -diff --git a/bfd/Makefile.am b/bfd/Makefile.am -index a919155..c5fd250 100644 ---- a/bfd/Makefile.am -+++ b/bfd/Makefile.am -@@ -570,6 +570,7 @@ BFD64_BACKENDS = \ - elf64-riscv.lo \ - elfxx-riscv.lo \ - elf64-s390.lo \ -+ elf64-microblaze.lo \ - elf64-sparc.lo \ - elf64-tilegx.lo \ - elf64-x86-64.lo \ -@@ -603,6 +604,7 @@ BFD64_BACKENDS_CFILES = \ - elf64-nfp.c \ - elf64-ppc.c \ - elf64-s390.c \ -+ elf64-microblaze.c \ - elf64-sparc.c \ - elf64-tilegx.c \ - elf64-x86-64.c \ -diff --git a/bfd/Makefile.in b/bfd/Makefile.in -index 896df52..fd457cb 100644 ---- a/bfd/Makefile.in -+++ b/bfd/Makefile.in -@@ -995,6 +995,7 @@ BFD64_BACKENDS = \ - elf64-riscv.lo \ - elfxx-riscv.lo \ - elf64-s390.lo \ -+ elf64-microblaze.lo \ - elf64-sparc.lo \ - elf64-tilegx.lo \ - elf64-x86-64.lo \ -@@ -1028,6 +1029,7 @@ BFD64_BACKENDS_CFILES = \ - elf64-nfp.c \ - elf64-ppc.c \ - elf64-s390.c \ -+ elf64-microblaze.c \ - elf64-sparc.c \ - elf64-tilegx.c \ - elf64-x86-64.c \ -@@ -1494,6 +1496,7 @@ distclean-compile: - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ -diff --git a/bfd/config.bfd b/bfd/config.bfd -index aef1448..8072c8a 100644 ---- a/bfd/config.bfd -+++ b/bfd/config.bfd -@@ -850,11 +850,15 @@ case "${targ}" in - microblazeel*-*) - targ_defvec=microblaze_elf32_le_vec - targ_selvecs=microblaze_elf32_vec -+ targ64_selvecs=microblaze_elf64_vec -+ targ64_selvecs=microblaze_elf64_le_vec - ;; - - microblaze*-*) - targ_defvec=microblaze_elf32_vec - targ_selvecs=microblaze_elf32_le_vec -+ targ64_selvecs=microblaze_elf64_vec -+ targ64_selvecs=microblaze_elf64_le_vec - ;; - - #ifdef BFD64 -diff --git a/bfd/configure b/bfd/configure -index e5bde48..5bf94d5 100755 ---- a/bfd/configure -+++ b/bfd/configure -@@ -15502,6 +15502,8 @@ do - rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; - s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; - s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; - score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; - score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; - sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; -diff --git a/bfd/configure.ac b/bfd/configure.ac -index 7cdf9c8..998a651 100644 ---- a/bfd/configure.ac -+++ b/bfd/configure.ac -@@ -615,6 +615,8 @@ do - rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; - s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; - s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; - score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; - score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo $elf"; want64=true; target_size=64 ;; - sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; -diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c -index 9bc2eb3..c91ba46 100644 ---- a/bfd/cpu-microblaze.c -+++ b/bfd/cpu-microblaze.c -@@ -23,7 +23,24 @@ - #include "bfd.h" - #include "libbfd.h" - --const bfd_arch_info_type bfd_microblaze_arch = -+const bfd_arch_info_type bfd_microblaze_arch[] = -+{ -+#if BFD_DEFAULT_TARGET_SIZE == 64 -+{ -+ 64, /* 32 bits in a word. */ -+ 64, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ 0, /* Machine number - 0 for now. */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ FALSE, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ -+}, - { - 32, /* 32 bits in a word. */ - 32, /* 32 bits in an address. */ -@@ -38,4 +55,37 @@ const bfd_arch_info_type bfd_microblaze_arch = - bfd_default_scan, /* String to architecture conversion. */ - bfd_arch_default_fill, /* Default fill. */ - NULL /* Next in list. */ -+} -+#else -+{ -+ 32, /* 32 bits in a word. */ -+ 32, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ 0, /* Machine number - 0 for now. */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ TRUE, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ -+}, -+{ -+ 64, /* 32 bits in a word. */ -+ 64, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ 0, /* Machine number - 0 for now. */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ FALSE, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ NULL /* Next in list. */ -+} -+#endif - }; -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -new file mode 100644 -index 0000000..0f43ae6 ---- /dev/null -+++ b/bfd/elf64-microblaze.c -@@ -0,0 +1,3584 @@ -+/* Xilinx MicroBlaze-specific support for 32-bit ELF -+ -+ Copyright (C) 2009-2016 Free Software Foundation, Inc. -+ -+ This file is part of BFD, the Binary File Descriptor library. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the -+ Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, -+ Boston, MA 02110-1301, USA. */ -+ -+ -+int dbg1 = 0; -+ -+#include "sysdep.h" -+#include "bfd.h" -+#include "bfdlink.h" -+#include "libbfd.h" -+#include "elf-bfd.h" -+#include "elf/microblaze.h" -+#include <assert.h> -+ -+#define USE_RELA /* Only USE_REL is actually significant, but this is -+ here are a reminder... */ -+#define INST_WORD_SIZE 4 -+ -+static int ro_small_data_pointer = 0; -+static int rw_small_data_pointer = 0; -+ -+static reloc_howto_type * microblaze_elf_howto_table [(int) R_MICROBLAZE_max]; -+ -+static reloc_howto_type microblaze_elf_howto_raw[] = -+{ -+ /* This reloc does nothing. */ -+ HOWTO (R_MICROBLAZE_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 3, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 0, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_NONE", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* A standard 32 bit relocation. */ -+ HOWTO (R_MICROBLAZE_32, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_32", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0xffffffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* A standard PCREL 32 bit relocation. */ -+ HOWTO (R_MICROBLAZE_32_PCREL,/* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_32_PCREL", /* Name. */ -+ TRUE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0xffffffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* A 64 bit PCREL relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_64_PCREL,/* Type. */ -+ 0, /* Rightshift. */ -+ 4, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 64, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_64_PCREL", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* The low half of a PCREL 32 bit relocation. */ -+ HOWTO (R_MICROBLAZE_32_PCREL_LO, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_signed, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_32_PCREL_LO", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* A 64 bit relocation. Table entry not really used. */ -+ HOWTO (R_MICROBLAZE_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* The low half of a 32 bit relocation. */ -+ HOWTO (R_MICROBLAZE_32_LO, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_signed, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_32_LO", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* Read-only small data section relocation. */ -+ HOWTO (R_MICROBLAZE_SRO32, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_SRO32", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* Read-write small data area relocation. */ -+ HOWTO (R_MICROBLAZE_SRW32, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_SRW32", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_32_NONE",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* This reloc does nothing. Used for relaxation. */ -+ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 3, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 0, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_64_NONE",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* Symbol Op Symbol relocation. */ -+ HOWTO (R_MICROBLAZE_32_SYM_OP_SYM, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_32_SYM_OP_SYM", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0xffffffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* GNU extension to record C++ vtable hierarchy. */ -+ HOWTO (R_MICROBLAZE_GNU_VTINHERIT, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 0, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont,/* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_GNU_VTINHERIT", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* GNU extension to record C++ vtable member usage. */ -+ HOWTO (R_MICROBLAZE_GNU_VTENTRY, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 0, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont,/* Complain on overflow. */ -+ _bfd_elf_rel_vtable_reloc_fn, /* Special Function. */ -+ "R_MICROBLAZE_GNU_VTENTRY", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* A 64 bit GOTPC relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GOTPC_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_GOTPC_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* A 64 bit GOT relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_GOT_64",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* A 64 bit PLT relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_PLT_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_PLT_64",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_REL, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_REL", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_JUMP_SLOT,/* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_JUMP_SLOT", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GLOB_DAT,/* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_GLOB_DAT", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* A 64 bit GOT relative relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GOTOFF_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_GOTOFF_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* A 32 bit GOT relative relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GOTOFF_32, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_GOTOFF_32", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* COPY relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_COPY, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ FALSE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_COPY", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ -+ /* Marker relocs for TLS. */ -+ HOWTO (R_MICROBLAZE_TLS, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLS", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ HOWTO (R_MICROBLAZE_TLSGD, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSGD", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ HOWTO (R_MICROBLAZE_TLSLD, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSLD", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ /* Computes the load module index of the load module that contains the -+ definition of its TLS sym. */ -+ HOWTO (R_MICROBLAZE_TLSDTPMOD32, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSDTPMOD32", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ /* Computes a dtv-relative displacement, the difference between the value -+ of sym+add and the base address of the thread-local storage block that -+ contains the definition of sym, minus 0x8000. Used for initializing GOT */ -+ HOWTO (R_MICROBLAZE_TLSDTPREL32, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSDTPREL32", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ /* Computes a dtv-relative displacement, the difference between the value -+ of sym+add and the base address of the thread-local storage block that -+ contains the definition of sym, minus 0x8000. */ -+ HOWTO (R_MICROBLAZE_TLSDTPREL64, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSDTPREL64", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ /* Computes a tp-relative displacement, the difference between the value of -+ sym+add and the value of the thread pointer (r13). */ -+ HOWTO (R_MICROBLAZE_TLSGOTTPREL32, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSGOTTPREL32", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+ /* Computes a tp-relative displacement, the difference between the value of -+ sym+add and the value of the thread pointer (r13). */ -+ HOWTO (R_MICROBLAZE_TLSTPREL32, -+ 0, /* rightshift */ -+ 2, /* size (0 = byte, 1 = short, 2 = long) */ -+ 32, /* bitsize */ -+ FALSE, /* pc_relative */ -+ 0, /* bitpos */ -+ complain_overflow_dont, /* complain_on_overflow */ -+ bfd_elf_generic_reloc, /* special_function */ -+ "R_MICROBLAZE_TLSTPREL32", /* name */ -+ FALSE, /* partial_inplace */ -+ 0, /* src_mask */ -+ 0x0000ffff, /* dst_mask */ -+ FALSE), /* pcrel_offset */ -+ -+}; -+ -+#ifndef NUM_ELEM -+#define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0]) -+#endif -+ -+/* Initialize the microblaze_elf_howto_table, so that linear accesses can be done. */ -+ -+static void -+microblaze_elf_howto_init (void) -+{ -+ unsigned int i; -+ -+ for (i = NUM_ELEM (microblaze_elf_howto_raw); i--;) -+ { -+ unsigned int type; -+ -+ type = microblaze_elf_howto_raw[i].type; -+ -+ BFD_ASSERT (type < NUM_ELEM (microblaze_elf_howto_table)); -+ -+ microblaze_elf_howto_table [type] = & microblaze_elf_howto_raw [i]; -+ } -+} -+ -+static reloc_howto_type * -+microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, -+ bfd_reloc_code_real_type code) -+{ -+ enum elf_microblaze_reloc_type microblaze_reloc = R_MICROBLAZE_NONE; -+ -+ switch (code) -+ { -+ case BFD_RELOC_NONE: -+ microblaze_reloc = R_MICROBLAZE_NONE; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_NONE: -+ microblaze_reloc = R_MICROBLAZE_32_NONE; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_NONE: -+ microblaze_reloc = R_MICROBLAZE_64_NONE; -+ break; -+ case BFD_RELOC_32: -+ microblaze_reloc = R_MICROBLAZE_32; -+ break; -+ /* RVA is treated the same as 32 */ -+ case BFD_RELOC_RVA: -+ microblaze_reloc = R_MICROBLAZE_32; -+ break; -+ case BFD_RELOC_32_PCREL: -+ microblaze_reloc = R_MICROBLAZE_32_PCREL; -+ break; -+ case BFD_RELOC_64_PCREL: -+ microblaze_reloc = R_MICROBLAZE_64_PCREL; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_LO_PCREL: -+ microblaze_reloc = R_MICROBLAZE_32_PCREL_LO; -+ break; -+ case BFD_RELOC_64: -+ microblaze_reloc = R_MICROBLAZE_64; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_LO: -+ microblaze_reloc = R_MICROBLAZE_32_LO; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_ROSDA: -+ microblaze_reloc = R_MICROBLAZE_SRO32; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_RWSDA: -+ microblaze_reloc = R_MICROBLAZE_SRW32; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: -+ microblaze_reloc = R_MICROBLAZE_32_SYM_OP_SYM; -+ break; -+ case BFD_RELOC_VTABLE_INHERIT: -+ microblaze_reloc = R_MICROBLAZE_GNU_VTINHERIT; -+ break; -+ case BFD_RELOC_VTABLE_ENTRY: -+ microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_GOTPC: -+ microblaze_reloc = R_MICROBLAZE_GOTPC_64; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_GOT: -+ microblaze_reloc = R_MICROBLAZE_GOT_64; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_PLT: -+ microblaze_reloc = R_MICROBLAZE_PLT_64; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_GOTOFF: -+ microblaze_reloc = R_MICROBLAZE_GOTOFF_64; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_GOTOFF: -+ microblaze_reloc = R_MICROBLAZE_GOTOFF_32; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_TLSGD: -+ microblaze_reloc = R_MICROBLAZE_TLSGD; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_TLSLD: -+ microblaze_reloc = R_MICROBLAZE_TLSLD; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_TLSDTPREL: -+ microblaze_reloc = R_MICROBLAZE_TLSDTPREL32; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_TLSDTPREL: -+ microblaze_reloc = R_MICROBLAZE_TLSDTPREL64; -+ break; -+ case BFD_RELOC_MICROBLAZE_32_TLSDTPMOD: -+ microblaze_reloc = R_MICROBLAZE_TLSDTPMOD32; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL: -+ microblaze_reloc = R_MICROBLAZE_TLSGOTTPREL32; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_TLSTPREL: -+ microblaze_reloc = R_MICROBLAZE_TLSTPREL32; -+ break; -+ case BFD_RELOC_MICROBLAZE_COPY: -+ microblaze_reloc = R_MICROBLAZE_COPY; -+ break; -+ default: -+ return (reloc_howto_type *) NULL; -+ } -+ -+ if (!microblaze_elf_howto_table [R_MICROBLAZE_32]) -+ /* Initialize howto table if needed. */ -+ microblaze_elf_howto_init (); -+ -+ return microblaze_elf_howto_table [(int) microblaze_reloc]; -+}; -+ -+static reloc_howto_type * -+microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, -+ const char *r_name) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < NUM_ELEM (microblaze_elf_howto_raw); i++) -+ if (microblaze_elf_howto_raw[i].name != NULL -+ && strcasecmp (microblaze_elf_howto_raw[i].name, r_name) == 0) -+ return µblaze_elf_howto_raw[i]; -+ -+ return NULL; -+} -+ -+/* Set the howto pointer for a RCE ELF reloc. */ -+ -+static void -+microblaze_elf_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, -+ arelent * cache_ptr, -+ Elf_Internal_Rela * dst) -+{ -+ unsigned int r_type; -+ -+ if (!microblaze_elf_howto_table [R_MICROBLAZE_32]) -+ /* Initialize howto table if needed. */ -+ microblaze_elf_howto_init (); -+ -+ r_type = ELF64_R_TYPE (dst->r_info); -+ if (r_type >= R_MICROBLAZE_max) -+ { -+ (*_bfd_error_handler) (_("%B: unrecognised MicroBlaze reloc number: %d"), -+ abfd, r_type); -+ bfd_set_error (bfd_error_bad_value); -+ r_type = R_MICROBLAZE_NONE; -+ } -+ -+ cache_ptr->howto = microblaze_elf_howto_table [r_type]; -+} -+ -+/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ -+ -+static bfd_boolean -+microblaze_elf_is_local_label_name (bfd *abfd, const char *name) -+{ -+ if (name[0] == 'L' && name[1] == '.') -+ return TRUE; -+ -+ if (name[0] == '$' && name[1] == 'L') -+ return TRUE; -+ -+ /* With gcc, the labels go back to starting with '.', so we accept -+ the generic ELF local label syntax as well. */ -+ return _bfd_elf_is_local_label_name (abfd, name); -+} -+ -+/* The microblaze linker (like many others) needs to keep track of -+ the number of relocs that it decides to copy as dynamic relocs in -+ check_relocs for each symbol. This is so that it can later discard -+ them if they are found to be unnecessary. We store the information -+ in a field extending the regular ELF linker hash table. */ -+ -+struct elf64_mb_dyn_relocs -+{ -+ struct elf64_mb_dyn_relocs *next; -+ -+ /* The input section of the reloc. */ -+ asection *sec; -+ -+ /* Total number of relocs copied for the input section. */ -+ bfd_size_type count; -+ -+ /* Number of pc-relative relocs copied for the input section. */ -+ bfd_size_type pc_count; -+}; -+ -+/* ELF linker hash entry. */ -+ -+struct elf64_mb_link_hash_entry -+{ -+ struct elf_link_hash_entry elf; -+ -+ /* Track dynamic relocs copied for this symbol. */ -+ struct elf64_mb_dyn_relocs *dyn_relocs; -+ -+ /* TLS Reference Types for the symbol; Updated by check_relocs */ -+#define TLS_GD 1 /* GD reloc. */ -+#define TLS_LD 2 /* LD reloc. */ -+#define TLS_TPREL 4 /* TPREL reloc, => IE. */ -+#define TLS_DTPREL 8 /* DTPREL reloc, => LD. */ -+#define TLS_TLS 16 /* Any TLS reloc. */ -+ unsigned char tls_mask; -+ -+}; -+ -+#define IS_TLS_GD(x) (x == (TLS_TLS | TLS_GD)) -+#define IS_TLS_LD(x) (x == (TLS_TLS | TLS_LD)) -+#define IS_TLS_DTPREL(x) (x == (TLS_TLS | TLS_DTPREL)) -+#define IS_TLS_NONE(x) (x == 0) -+ -+#define elf64_mb_hash_entry(ent) ((struct elf64_mb_link_hash_entry *)(ent)) -+ -+/* ELF linker hash table. */ -+ -+struct elf64_mb_link_hash_table -+{ -+ struct elf_link_hash_table elf; -+ -+ /* Short-cuts to get to dynamic linker sections. */ -+ asection *sgot; -+ asection *sgotplt; -+ asection *srelgot; -+ asection *splt; -+ asection *srelplt; -+ asection *sdynbss; -+ asection *srelbss; -+ -+ /* Small local sym to section mapping cache. */ -+ struct sym_cache sym_sec; -+ -+ /* TLS Local Dynamic GOT Entry */ -+ union { -+ bfd_signed_vma refcount; -+ bfd_vma offset; -+ } tlsld_got; -+}; -+ -+/* Nonzero if this section has TLS related relocations. */ -+#define has_tls_reloc sec_flg0 -+ -+/* Get the ELF linker hash table from a link_info structure. */ -+ -+#define elf64_mb_hash_table(p) \ -+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \ -+ == MICROBLAZE_ELF_DATA ? ((struct elf64_mb_link_hash_table *) ((p)->hash)) : NULL) -+ -+/* Create an entry in a microblaze ELF linker hash table. */ -+ -+static struct bfd_hash_entry * -+link_hash_newfunc (struct bfd_hash_entry *entry, -+ struct bfd_hash_table *table, -+ const char *string) -+{ -+ /* Allocate the structure if it has not already been allocated by a -+ subclass. */ -+ if (entry == NULL) -+ { -+ entry = bfd_hash_allocate (table, -+ sizeof (struct elf64_mb_link_hash_entry)); -+ if (entry == NULL) -+ return entry; -+ } -+ -+ /* Call the allocation method of the superclass. */ -+ entry = _bfd_elf_link_hash_newfunc (entry, table, string); -+ if (entry != NULL) -+ { -+ struct elf64_mb_link_hash_entry *eh; -+ -+ eh = (struct elf64_mb_link_hash_entry *) entry; -+ eh->dyn_relocs = NULL; -+ eh->tls_mask = 0; -+ } -+ -+ return entry; -+} -+ -+/* Create a mb ELF linker hash table. */ -+ -+static struct bfd_link_hash_table * -+microblaze_elf_link_hash_table_create (bfd *abfd) -+{ -+ struct elf64_mb_link_hash_table *ret; -+ bfd_size_type amt = sizeof (struct elf64_mb_link_hash_table); -+ -+ ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt); -+ if (ret == NULL) -+ return NULL; -+ -+ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, -+ sizeof (struct elf64_mb_link_hash_entry), -+ MICROBLAZE_ELF_DATA)) -+ { -+ free (ret); -+ return NULL; -+ } -+ -+ return &ret->elf.root; -+} -+ -+/* Set the values of the small data pointers. */ -+ -+static void -+microblaze_elf_final_sdp (struct bfd_link_info *info) -+{ -+ struct bfd_link_hash_entry *h; -+ -+ h = bfd_link_hash_lookup (info->hash, RO_SDA_ANCHOR_NAME, FALSE, FALSE, TRUE); -+ if (h != (struct bfd_link_hash_entry *) NULL -+ && h->type == bfd_link_hash_defined) -+ ro_small_data_pointer = (h->u.def.value -+ + h->u.def.section->output_section->vma -+ + h->u.def.section->output_offset); -+ -+ h = bfd_link_hash_lookup (info->hash, RW_SDA_ANCHOR_NAME, FALSE, FALSE, TRUE); -+ if (h != (struct bfd_link_hash_entry *) NULL -+ && h->type == bfd_link_hash_defined) -+ rw_small_data_pointer = (h->u.def.value -+ + h->u.def.section->output_section->vma -+ + h->u.def.section->output_offset); -+} -+ -+static bfd_vma -+dtprel_base (struct bfd_link_info *info) -+{ -+ /* If tls_sec is NULL, we should have signalled an error already. */ -+ if (elf_hash_table (info)->tls_sec == NULL) -+ return 0; -+ return elf_hash_table (info)->tls_sec->vma; -+} -+ -+/* The size of the thread control block. */ -+#define TCB_SIZE 8 -+ -+/* Output a simple dynamic relocation into SRELOC. */ -+ -+static void -+microblaze_elf_output_dynamic_relocation (bfd *output_bfd, -+ asection *sreloc, -+ unsigned long reloc_index, -+ unsigned long indx, -+ int r_type, -+ bfd_vma offset, -+ bfd_vma addend) -+{ -+ -+ Elf_Internal_Rela rel; -+ -+ rel.r_info = ELF64_R_INFO (indx, r_type); -+ rel.r_offset = offset; -+ rel.r_addend = addend; -+ -+ bfd_elf64_swap_reloca_out (output_bfd, &rel, -+ (sreloc->contents + reloc_index * sizeof (Elf64_External_Rela))); -+} -+ -+/* This code is taken from elf64-m32r.c -+ There is some attempt to make this function usable for many architectures, -+ both USE_REL and USE_RELA ['twould be nice if such a critter existed], -+ if only to serve as a learning tool. -+ -+ The RELOCATE_SECTION function is called by the new ELF backend linker -+ to handle the relocations for a section. -+ -+ The relocs are always passed as Rela structures; if the section -+ actually uses Rel structures, the r_addend field will always be -+ zero. -+ -+ This function is responsible for adjust the section contents as -+ necessary, and (if using Rela relocs and generating a -+ relocatable output file) adjusting the reloc addend as -+ necessary. -+ -+ This function does not have to worry about setting the reloc -+ address or the reloc symbol index. -+ -+ LOCAL_SYMS is a pointer to the swapped in local symbols. -+ -+ LOCAL_SECTIONS is an array giving the section in the input file -+ corresponding to the st_shndx field of each local symbol. -+ -+ The global hash table entry for the global symbols can be found -+ via elf_sym_hashes (input_bfd). -+ -+ When generating relocatable output, this function must handle -+ STB_LOCAL/STT_SECTION symbols specially. The output symbol is -+ going to be the section symbol corresponding to the output -+ section, which means that the addend must be adjusted -+ accordingly. */ -+ -+static bfd_boolean -+microblaze_elf_relocate_section (bfd *output_bfd, -+ struct bfd_link_info *info, -+ bfd *input_bfd, -+ asection *input_section, -+ bfd_byte *contents, -+ Elf_Internal_Rela *relocs, -+ Elf_Internal_Sym *local_syms, -+ asection **local_sections) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; -+ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); -+ Elf_Internal_Rela *rel, *relend; -+ int endian = (bfd_little_endian (output_bfd)) ? 0 : 2; -+ /* Assume success. */ -+ bfd_boolean ret = TRUE; -+ asection *sreloc; -+ bfd_vma *local_got_offsets; -+ unsigned int tls_type; -+ -+ if (!microblaze_elf_howto_table[R_MICROBLAZE_max-1]) -+ microblaze_elf_howto_init (); -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ local_got_offsets = elf_local_got_offsets (input_bfd); -+ -+ sreloc = elf_section_data (input_section)->sreloc; -+ -+ rel = relocs; -+ relend = relocs + input_section->reloc_count; -+ for (; rel < relend; rel++) -+ { -+ int r_type; -+ reloc_howto_type *howto; -+ unsigned long r_symndx; -+ bfd_vma addend = rel->r_addend; -+ bfd_vma offset = rel->r_offset; -+ struct elf_link_hash_entry *h; -+ Elf_Internal_Sym *sym; -+ asection *sec; -+ const char *sym_name; -+ bfd_reloc_status_type r = bfd_reloc_ok; -+ const char *errmsg = NULL; -+ bfd_boolean unresolved_reloc = FALSE; -+ -+ h = NULL; -+ r_type = ELF64_R_TYPE (rel->r_info); -+ tls_type = 0; -+ -+ if (r_type < 0 || r_type >= (int) R_MICROBLAZE_max) -+ { -+ (*_bfd_error_handler) (_("%s: unknown relocation type %d"), -+ bfd_get_filename (input_bfd), (int) r_type); -+ bfd_set_error (bfd_error_bad_value); -+ ret = FALSE; -+ continue; -+ } -+ -+ howto = microblaze_elf_howto_table[r_type]; -+ r_symndx = ELF64_R_SYM (rel->r_info); -+ -+ if (bfd_link_relocatable (info)) -+ { -+ /* This is a relocatable link. We don't have to change -+ anything, unless the reloc is against a section symbol, -+ in which case we have to adjust according to where the -+ section symbol winds up in the output section. */ -+ sec = NULL; -+ if (r_symndx >= symtab_hdr->sh_info) -+ /* External symbol. */ -+ continue; -+ -+ /* Local symbol. */ -+ sym = local_syms + r_symndx; -+ sym_name = "<local symbol>"; -+ /* STT_SECTION: symbol is associated with a section. */ -+ if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) -+ /* Symbol isn't associated with a section. Nothing to do. */ -+ continue; -+ -+ sec = local_sections[r_symndx]; -+ addend += sec->output_offset + sym->st_value; -+#ifndef USE_REL -+ /* This can't be done for USE_REL because it doesn't mean anything -+ and elf_link_input_bfd asserts this stays zero. */ -+ /* rel->r_addend = addend; */ -+#endif -+ -+#ifndef USE_REL -+ /* Addends are stored with relocs. We're done. */ -+ continue; -+#else /* USE_REL */ -+ /* If partial_inplace, we need to store any additional addend -+ back in the section. */ -+ if (!howto->partial_inplace) -+ continue; -+ /* ??? Here is a nice place to call a special_function like handler. */ -+ r = _bfd_relocate_contents (howto, input_bfd, addend, -+ contents + offset); -+#endif /* USE_REL */ -+ } -+ else -+ { -+ bfd_vma relocation; -+ -+ /* This is a final link. */ -+ sym = NULL; -+ sec = NULL; -+ unresolved_reloc = FALSE; -+ -+ if (r_symndx < symtab_hdr->sh_info) -+ { -+ /* Local symbol. */ -+ sym = local_syms + r_symndx; -+ sec = local_sections[r_symndx]; -+ if (sec == 0) -+ continue; -+ sym_name = "<local symbol>"; -+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); -+ /* r_addend may have changed if the reference section was -+ a merge section. */ -+ addend = rel->r_addend; -+ } -+ else -+ { -+ /* External symbol. */ -+ bfd_boolean warned ATTRIBUTE_UNUSED; -+ bfd_boolean ignored ATTRIBUTE_UNUSED; -+ -+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, -+ r_symndx, symtab_hdr, sym_hashes, -+ h, sec, relocation, -+ unresolved_reloc, warned, ignored); -+ sym_name = h->root.root.string; -+ } -+ -+ /* Sanity check the address. */ -+ if (offset > bfd_get_section_limit (input_bfd, input_section)) -+ { -+ r = bfd_reloc_outofrange; -+ goto check_reloc; -+ } -+ -+ switch ((int) r_type) -+ { -+ case (int) R_MICROBLAZE_SRO32 : -+ { -+ const char *name; -+ -+ /* Only relocate if the symbol is defined. */ -+ if (sec) -+ { -+ name = bfd_get_section_name (sec->owner, sec); -+ -+ if (strcmp (name, ".sdata2") == 0 -+ || strcmp (name, ".sbss2") == 0) -+ { -+ if (ro_small_data_pointer == 0) -+ microblaze_elf_final_sdp (info); -+ if (ro_small_data_pointer == 0) -+ { -+ ret = FALSE; -+ r = bfd_reloc_undefined; -+ goto check_reloc; -+ } -+ -+ /* At this point `relocation' contains the object's -+ address. */ -+ relocation -= ro_small_data_pointer; -+ /* Now it contains the offset from _SDA2_BASE_. */ -+ r = _bfd_final_link_relocate (howto, input_bfd, -+ input_section, -+ contents, offset, -+ relocation, addend); -+ } -+ else -+ { -+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"), -+ bfd_get_filename (input_bfd), -+ sym_name, -+ microblaze_elf_howto_table[(int) r_type]->name, -+ bfd_get_section_name (sec->owner, sec)); -+ /*bfd_set_error (bfd_error_bad_value); ??? why? */ -+ ret = FALSE; -+ continue; -+ } -+ } -+ } -+ break; -+ -+ case (int) R_MICROBLAZE_SRW32 : -+ { -+ const char *name; -+ -+ /* Only relocate if the symbol is defined. */ -+ if (sec) -+ { -+ name = bfd_get_section_name (sec->owner, sec); -+ -+ if (strcmp (name, ".sdata") == 0 -+ || strcmp (name, ".sbss") == 0) -+ { -+ if (rw_small_data_pointer == 0) -+ microblaze_elf_final_sdp (info); -+ if (rw_small_data_pointer == 0) -+ { -+ ret = FALSE; -+ r = bfd_reloc_undefined; -+ goto check_reloc; -+ } -+ -+ /* At this point `relocation' contains the object's -+ address. */ -+ relocation -= rw_small_data_pointer; -+ /* Now it contains the offset from _SDA_BASE_. */ -+ r = _bfd_final_link_relocate (howto, input_bfd, -+ input_section, -+ contents, offset, -+ relocation, addend); -+ } -+ else -+ { -+ (*_bfd_error_handler) (_("%s: The target (%s) of an %s relocation is in the wrong section (%s)"), -+ bfd_get_filename (input_bfd), -+ sym_name, -+ microblaze_elf_howto_table[(int) r_type]->name, -+ bfd_get_section_name (sec->owner, sec)); -+ /*bfd_set_error (bfd_error_bad_value); ??? why? */ -+ ret = FALSE; -+ continue; -+ } -+ } -+ } -+ break; -+ -+ case (int) R_MICROBLAZE_32_SYM_OP_SYM: -+ break; /* Do nothing. */ -+ -+ case (int) R_MICROBLAZE_GOTPC_64: -+ relocation = htab->sgotplt->output_section->vma -+ + htab->sgotplt->output_offset; -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ relocation += addend; -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, relocation & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ break; -+ -+ case (int) R_MICROBLAZE_PLT_64: -+ { -+ bfd_vma immediate; -+ if (htab->splt != NULL && h != NULL -+ && h->plt.offset != (bfd_vma) -1) -+ { -+ relocation = (htab->splt->output_section->vma -+ + htab->splt->output_offset -+ + h->plt.offset); -+ unresolved_reloc = FALSE; -+ immediate = relocation - (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, immediate & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ } -+ else -+ { -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ immediate = relocation; -+ bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, immediate & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ } -+ break; -+ } -+ -+ case (int) R_MICROBLAZE_TLSGD: -+ tls_type = (TLS_TLS | TLS_GD); -+ goto dogot; -+ case (int) R_MICROBLAZE_TLSLD: -+ tls_type = (TLS_TLS | TLS_LD); -+ dogot: -+ case (int) R_MICROBLAZE_GOT_64: -+ { -+ bfd_vma *offp; -+ bfd_vma off, off2; -+ unsigned long indx; -+ bfd_vma static_value; -+ -+ bfd_boolean need_relocs = FALSE; -+ if (htab->sgot == NULL) -+ abort (); -+ -+ indx = 0; -+ offp = NULL; -+ -+ /* 1. Identify GOT Offset; -+ 2. Compute Static Values -+ 3. Process Module Id, Process Offset -+ 4. Fixup Relocation with GOT offset value. */ -+ -+ /* 1. Determine GOT Offset to use : TLS_LD, global, local */ -+ if (IS_TLS_LD (tls_type)) -+ offp = &htab->tlsld_got.offset; -+ else if (h != NULL) -+ { -+ if (htab->sgotplt != NULL && h->got.offset != (bfd_vma) -1) -+ offp = &h->got.offset; -+ else -+ abort (); -+ } -+ else -+ { -+ if (local_got_offsets == NULL) -+ abort (); -+ offp = &local_got_offsets[r_symndx]; -+ } -+ -+ if (!offp) -+ abort (); -+ -+ off = (*offp) & ~1; -+ off2 = off; -+ -+ if (IS_TLS_LD(tls_type) || IS_TLS_GD(tls_type)) -+ off2 = off + 4; -+ -+ /* Symbol index to use for relocs */ -+ if (h != NULL) -+ { -+ bfd_boolean dyn = -+ elf_hash_table (info)->dynamic_sections_created; -+ -+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, -+ bfd_link_pic (info), -+ h) -+ && (!bfd_link_pic (info) -+ || !SYMBOL_REFERENCES_LOCAL (info, h))) -+ indx = h->dynindx; -+ } -+ -+ /* Need to generate relocs ? */ -+ if ((bfd_link_pic (info) || indx != 0) -+ && (h == NULL -+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT -+ || h->root.type != bfd_link_hash_undefweak)) -+ need_relocs = TRUE; -+ -+ /* 2. Compute/Emit Static value of r-expression */ -+ static_value = relocation + addend; -+ -+ /* 3. Process module-id and offset */ -+ if (! ((*offp) & 1) ) -+ { -+ bfd_vma got_offset; -+ -+ got_offset = (htab->sgot->output_section->vma -+ + htab->sgot->output_offset -+ + off); -+ -+ /* Process module-id */ -+ if (IS_TLS_LD(tls_type)) -+ { -+ if (! bfd_link_pic (info)) -+ { -+ bfd_put_32 (output_bfd, 1, htab->sgot->contents + off); -+ } -+ else -+ { -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ htab->srelgot, htab->srelgot->reloc_count++, -+ /* symindex= */ 0, R_MICROBLAZE_TLSDTPMOD32, -+ got_offset, 0); -+ } -+ } -+ else if (IS_TLS_GD(tls_type)) -+ { -+ if (! need_relocs) -+ { -+ bfd_put_32 (output_bfd, 1, htab->sgot->contents + off); -+ } -+ else -+ { -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ htab->srelgot, -+ htab->srelgot->reloc_count++, -+ /* symindex= */ indx, R_MICROBLAZE_TLSDTPMOD32, -+ got_offset, indx ? 0 : static_value); -+ } -+ } -+ -+ /* Process Offset */ -+ if (htab->srelgot == NULL) -+ abort (); -+ -+ got_offset = (htab->sgot->output_section->vma -+ + htab->sgot->output_offset -+ + off2); -+ if (IS_TLS_LD(tls_type)) -+ { -+ /* For LD, offset should be 0 */ -+ *offp |= 1; -+ bfd_put_32 (output_bfd, 0, htab->sgot->contents + off2); -+ } -+ else if (IS_TLS_GD(tls_type)) -+ { -+ *offp |= 1; -+ static_value -= dtprel_base(info); -+ if (need_relocs) -+ { -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ htab->srelgot, htab->srelgot->reloc_count++, -+ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32, -+ got_offset, indx ? 0 : static_value); -+ } -+ else -+ { -+ bfd_put_32 (output_bfd, static_value, -+ htab->sgot->contents + off2); -+ } -+ } -+ else -+ { -+ bfd_put_32 (output_bfd, static_value, -+ htab->sgot->contents + off2); -+ -+ /* Relocs for dyn symbols generated by -+ finish_dynamic_symbols */ -+ if (bfd_link_pic (info) && h == NULL) -+ { -+ *offp |= 1; -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ htab->srelgot, htab->srelgot->reloc_count++, -+ /* symindex= */ indx, R_MICROBLAZE_REL, -+ got_offset, static_value); -+ } -+ } -+ } -+ -+ /* 4. Fixup Relocation with GOT offset value -+ Compute relative address of GOT entry for applying -+ the current relocation */ -+ relocation = htab->sgot->output_section->vma -+ + htab->sgot->output_offset -+ + off -+ - htab->sgotplt->output_section->vma -+ - htab->sgotplt->output_offset; -+ -+ /* Apply Current Relocation */ -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, relocation & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ -+ unresolved_reloc = FALSE; -+ break; -+ } -+ -+ case (int) R_MICROBLAZE_GOTOFF_64: -+ { -+ bfd_vma immediate; -+ unsigned short lo, high; -+ relocation += addend; -+ relocation -= htab->sgotplt->output_section->vma -+ + htab->sgotplt->output_offset; -+ /* Write this value into correct location. */ -+ immediate = relocation; -+ lo = immediate & 0x0000ffff; -+ high = (immediate >> 16) & 0x0000ffff; -+ bfd_put_16 (input_bfd, high, contents + offset + endian); -+ bfd_put_16 (input_bfd, lo, contents + offset + INST_WORD_SIZE + endian); -+ break; -+ } -+ -+ case (int) R_MICROBLAZE_GOTOFF_32: -+ { -+ relocation += addend; -+ relocation -= htab->sgotplt->output_section->vma -+ + htab->sgotplt->output_offset; -+ /* Write this value into correct location. */ -+ bfd_put_32 (input_bfd, relocation, contents + offset); -+ break; -+ } -+ -+ case (int) R_MICROBLAZE_TLSDTPREL64: -+ relocation += addend; -+ relocation -= dtprel_base(info); -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, relocation & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ break; -+ case (int) R_MICROBLAZE_64_PCREL : -+ case (int) R_MICROBLAZE_64: -+ case (int) R_MICROBLAZE_32: -+ { -+ /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols -+ from removed linkonce sections, or sections discarded by -+ a linker script. */ -+ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) -+ { -+ relocation += addend; -+ if (r_type == R_MICROBLAZE_32) -+ bfd_put_32 (input_bfd, relocation, contents + offset); -+ else -+ { -+ if (r_type == R_MICROBLAZE_64_PCREL) -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, relocation & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ } -+ break; -+ } -+ -+ if ((bfd_link_pic (info) -+ && (h == NULL -+ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT -+ || h->root.type != bfd_link_hash_undefweak) -+ && (!howto->pc_relative -+ || (h != NULL -+ && h->dynindx != -1 -+ && (!info->symbolic -+ || !h->def_regular)))) -+ || (!bfd_link_pic (info) -+ && h != NULL -+ && h->dynindx != -1 -+ && !h->non_got_ref -+ && ((h->def_dynamic -+ && !h->def_regular) -+ || h->root.type == bfd_link_hash_undefweak -+ || h->root.type == bfd_link_hash_undefined))) -+ { -+ Elf_Internal_Rela outrel; -+ bfd_byte *loc; -+ bfd_boolean skip; -+ -+ /* When generating a shared object, these relocations -+ are copied into the output file to be resolved at run -+ time. */ -+ -+ BFD_ASSERT (sreloc != NULL); -+ -+ skip = FALSE; -+ -+ outrel.r_offset = -+ _bfd_elf_section_offset (output_bfd, info, input_section, -+ rel->r_offset); -+ if (outrel.r_offset == (bfd_vma) -1) -+ skip = TRUE; -+ else if (outrel.r_offset == (bfd_vma) -2) -+ skip = TRUE; -+ outrel.r_offset += (input_section->output_section->vma -+ + input_section->output_offset); -+ -+ if (skip) -+ memset (&outrel, 0, sizeof outrel); -+ /* h->dynindx may be -1 if the symbol was marked to -+ become local. */ -+ else if (h != NULL -+ && ((! info->symbolic && h->dynindx != -1) -+ || !h->def_regular)) -+ { -+ BFD_ASSERT (h->dynindx != -1); -+ outrel.r_info = ELF64_R_INFO (h->dynindx, r_type); -+ outrel.r_addend = addend; -+ } -+ else -+ { -+ if (r_type == R_MICROBLAZE_32) -+ { -+ outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); -+ outrel.r_addend = relocation + addend; -+ } -+ else -+ { -+ BFD_FAIL (); -+ (*_bfd_error_handler) -+ (_("%B: probably compiled without -fPIC?"), -+ input_bfd); -+ bfd_set_error (bfd_error_bad_value); -+ return FALSE; -+ } -+ } -+ -+ loc = sreloc->contents; -+ loc += sreloc->reloc_count++ * sizeof (Elf64_External_Rela); -+ bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc); -+ break; -+ } -+ else -+ { -+ relocation += addend; -+ if (r_type == R_MICROBLAZE_32) -+ bfd_put_32 (input_bfd, relocation, contents + offset); -+ else -+ { -+ if (r_type == R_MICROBLAZE_64_PCREL) -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); -+ bfd_put_16 (input_bfd, relocation & 0xffff, -+ contents + offset + endian + INST_WORD_SIZE); -+ } -+ break; -+ } -+ } -+ -+ default : -+ r = _bfd_final_link_relocate (howto, input_bfd, input_section, -+ contents, offset, -+ relocation, addend); -+ break; -+ } -+ } -+ -+ check_reloc: -+ -+ if (r != bfd_reloc_ok) -+ { -+ /* FIXME: This should be generic enough to go in a utility. */ -+ const char *name; -+ -+ if (h != NULL) -+ name = h->root.root.string; -+ else -+ { -+ name = (bfd_elf_string_from_elf_section -+ (input_bfd, symtab_hdr->sh_link, sym->st_name)); -+ if (name == NULL || *name == '\0') -+ name = bfd_section_name (input_bfd, sec); -+ } -+ -+ if (errmsg != NULL) -+ goto common_error; -+ -+ switch (r) -+ { -+ case bfd_reloc_overflow: -+ (*info->callbacks->reloc_overflow) -+ (info, (h ? &h->root : NULL), name, howto->name, -+ (bfd_vma) 0, input_bfd, input_section, offset); -+ break; -+ -+ case bfd_reloc_undefined: -+ (*info->callbacks->undefined_symbol) -+ (info, name, input_bfd, input_section, offset, TRUE); -+ break; -+ -+ case bfd_reloc_outofrange: -+ errmsg = _("internal error: out of range error"); -+ goto common_error; -+ -+ case bfd_reloc_notsupported: -+ errmsg = _("internal error: unsupported relocation error"); -+ goto common_error; -+ -+ case bfd_reloc_dangerous: -+ errmsg = _("internal error: dangerous error"); -+ goto common_error; -+ -+ default: -+ errmsg = _("internal error: unknown error"); -+ /* Fall through. */ -+ common_error: -+ (*info->callbacks->warning) (info, errmsg, name, input_bfd, -+ input_section, offset); -+ break; -+ } -+ } -+ } -+ -+ return ret; -+} -+ -+/* Merge backend specific data from an object file to the output -+ object file when linking. -+ -+ Note: We only use this hook to catch endian mismatches. */ -+static bfd_boolean -+microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) -+{ -+ /* Check if we have the same endianess. */ -+ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) -+ return FALSE; -+ -+ return TRUE; -+} -+ -+ -+/* Calculate fixup value for reference. */ -+ -+static int -+calc_fixup (bfd_vma start, bfd_vma size, asection *sec) -+{ -+ bfd_vma end = start + size; -+ int i, fixup = 0; -+ -+ if (sec == NULL || sec->relax == NULL) -+ return 0; -+ -+ /* Look for addr in relax table, total fixup value. */ -+ for (i = 0; i < sec->relax_count; i++) -+ { -+ if (end <= sec->relax[i].addr) -+ break; -+ if ((end != start) && (start > sec->relax[i].addr)) -+ continue; -+ fixup += sec->relax[i].size; -+ } -+ return fixup; -+} -+ -+/* Read-modify-write into the bfd, an immediate value into appropriate fields of -+ a 32-bit instruction. */ -+static void -+microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) -+{ -+ unsigned long instr = bfd_get_32 (abfd, bfd_addr); -+ instr &= ~0x0000ffff; -+ instr |= (val & 0x0000ffff); -+ bfd_put_32 (abfd, instr, bfd_addr); -+} -+ -+/* Read-modify-write into the bfd, an immediate value into appropriate fields of -+ two consecutive 32-bit instructions. */ -+static void -+microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) -+{ -+ unsigned long instr_hi; -+ unsigned long instr_lo; -+ -+ instr_hi = bfd_get_32 (abfd, bfd_addr); -+ instr_hi &= ~0x0000ffff; -+ instr_hi |= ((val >> 16) & 0x0000ffff); -+ bfd_put_32 (abfd, instr_hi, bfd_addr); -+ -+ instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); -+ instr_lo &= ~0x0000ffff; -+ instr_lo |= (val & 0x0000ffff); -+ bfd_put_32 (abfd, instr_lo, bfd_addr + INST_WORD_SIZE); -+} -+ -+static bfd_boolean -+microblaze_elf_relax_section (bfd *abfd, -+ asection *sec, -+ struct bfd_link_info *link_info, -+ bfd_boolean *again) -+{ -+ Elf_Internal_Shdr *symtab_hdr; -+ Elf_Internal_Rela *internal_relocs; -+ Elf_Internal_Rela *free_relocs = NULL; -+ Elf_Internal_Rela *irel, *irelend; -+ bfd_byte *contents = NULL; -+ bfd_byte *free_contents = NULL; -+ int rel_count; -+ unsigned int shndx; -+ int i, sym_index; -+ asection *o; -+ struct elf_link_hash_entry *sym_hash; -+ Elf_Internal_Sym *isymbuf, *isymend; -+ Elf_Internal_Sym *isym; -+ int symcount; -+ int offset; -+ bfd_vma src, dest; -+ -+ /* We only do this once per section. We may be able to delete some code -+ by running multiple passes, but it is not worth it. */ -+ *again = FALSE; -+ -+ /* Only do this for a text section. */ -+ if (bfd_link_relocatable (link_info) -+ || (sec->flags & SEC_RELOC) == 0 -+ || (sec->reloc_count == 0) -+ || (sec->flags & SEC_CODE) == 0) -+ return TRUE; -+ -+ BFD_ASSERT ((sec->size > 0) || (sec->rawsize > 0)); -+ -+ /* If this is the first time we have been called for this section, -+ initialize the cooked size. */ -+ if (sec->size == 0) -+ sec->size = sec->rawsize; -+ -+ /* Get symbols for this section. */ -+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr; -+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; -+ symcount = symtab_hdr->sh_size / sizeof (Elf64_External_Sym); -+ if (isymbuf == NULL) -+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, symcount, -+ 0, NULL, NULL, NULL); -+ BFD_ASSERT (isymbuf != NULL); -+ -+ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory); -+ if (internal_relocs == NULL) -+ goto error_return; -+ if (! link_info->keep_memory) -+ free_relocs = internal_relocs; -+ -+ sec->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) -+ * sizeof (struct relax_table)); -+ if (sec->relax == NULL) -+ goto error_return; -+ sec->relax_count = 0; -+ -+ irelend = internal_relocs + sec->reloc_count; -+ rel_count = 0; -+ for (irel = internal_relocs; irel < irelend; irel++, rel_count++) -+ { -+ bfd_vma symval; -+ if ((ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64_PCREL) -+ && (ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64 )) -+ continue; /* Can't delete this reloc. */ -+ -+ /* Get the section contents. */ -+ if (contents == NULL) -+ { -+ if (elf_section_data (sec)->this_hdr.contents != NULL) -+ contents = elf_section_data (sec)->this_hdr.contents; -+ else -+ { -+ contents = (bfd_byte *) bfd_malloc (sec->size); -+ if (contents == NULL) -+ goto error_return; -+ free_contents = contents; -+ -+ if (!bfd_get_section_contents (abfd, sec, contents, -+ (file_ptr) 0, sec->size)) -+ goto error_return; -+ elf_section_data (sec)->this_hdr.contents = contents; -+ } -+ } -+ -+ /* Get the value of the symbol referred to by the reloc. */ -+ if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info) -+ { -+ /* A local symbol. */ -+ asection *sym_sec; -+ -+ isym = isymbuf + ELF64_R_SYM (irel->r_info); -+ if (isym->st_shndx == SHN_UNDEF) -+ sym_sec = bfd_und_section_ptr; -+ else if (isym->st_shndx == SHN_ABS) -+ sym_sec = bfd_abs_section_ptr; -+ else if (isym->st_shndx == SHN_COMMON) -+ sym_sec = bfd_com_section_ptr; -+ else -+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); -+ -+ symval = _bfd_elf_rela_local_sym (abfd, isym, &sym_sec, irel); -+ } -+ else -+ { -+ unsigned long indx; -+ struct elf_link_hash_entry *h; -+ -+ indx = ELF64_R_SYM (irel->r_info) - symtab_hdr->sh_info; -+ h = elf_sym_hashes (abfd)[indx]; -+ BFD_ASSERT (h != NULL); -+ -+ if (h->root.type != bfd_link_hash_defined -+ && h->root.type != bfd_link_hash_defweak) -+ /* This appears to be a reference to an undefined -+ symbol. Just ignore it--it will be caught by the -+ regular reloc processing. */ -+ continue; -+ -+ symval = (h->root.u.def.value -+ + h->root.u.def.section->output_section->vma -+ + h->root.u.def.section->output_offset); -+ } -+ -+ /* If this is a PC-relative reloc, subtract the instr offset from -+ the symbol value. */ -+ if (ELF64_R_TYPE (irel->r_info) == (int) R_MICROBLAZE_64_PCREL) -+ { -+ symval = symval + irel->r_addend -+ - (irel->r_offset -+ + sec->output_section->vma -+ + sec->output_offset); -+ } -+ else -+ symval += irel->r_addend; -+ -+ if ((symval & 0xffff8000) == 0) -+ { -+ /* We can delete this instruction. */ -+ sec->relax[sec->relax_count].addr = irel->r_offset; -+ sec->relax[sec->relax_count].size = INST_WORD_SIZE; -+ sec->relax_count++; -+ -+ /* Rewrite relocation type. */ -+ switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info)) -+ { -+ case R_MICROBLAZE_64_PCREL: -+ irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), -+ (int) R_MICROBLAZE_32_PCREL_LO); -+ break; -+ case R_MICROBLAZE_64: -+ irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), -+ (int) R_MICROBLAZE_32_LO); -+ break; -+ default: -+ /* Cannot happen. */ -+ BFD_ASSERT (FALSE); -+ } -+ } -+ } /* Loop through all relocations. */ -+ -+ /* Loop through the relocs again, and see if anything needs to change. */ -+ if (sec->relax_count > 0) -+ { -+ shndx = _bfd_elf_section_from_bfd_section (abfd, sec); -+ rel_count = 0; -+ sec->relax[sec->relax_count].addr = sec->size; -+ -+ for (irel = internal_relocs; irel < irelend; irel++, rel_count++) -+ { -+ bfd_vma nraddr; -+ -+ /* Get the new reloc address. */ -+ nraddr = irel->r_offset - calc_fixup (irel->r_offset, 0, sec); -+ switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info)) -+ { -+ default: -+ break; -+ case R_MICROBLAZE_64_PCREL: -+ break; -+ case R_MICROBLAZE_64: -+ case R_MICROBLAZE_32_LO: -+ /* If this reloc is against a symbol defined in this -+ section, we must check the addend to see it will put the value in -+ range to be adjusted, and hence must be changed. */ -+ if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info) -+ { -+ isym = isymbuf + ELF64_R_SYM (irel->r_info); -+ /* Only handle relocs against .text. */ -+ if (isym->st_shndx == shndx -+ && ELF64_ST_TYPE (isym->st_info) == STT_SECTION) -+ irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); -+ } -+ break; -+ case R_MICROBLAZE_NONE: -+ case R_MICROBLAZE_32_NONE: -+ { -+ /* This was a PC-relative instruction that was -+ completely resolved. */ -+ int sfix, efix; -+ unsigned int val; -+ bfd_vma target_address; -+ target_address = irel->r_addend + irel->r_offset; -+ sfix = calc_fixup (irel->r_offset, 0, sec); -+ efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } -+ irel->r_addend -= (efix - sfix); -+ /* Should use HOWTO. */ -+ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, -+ irel->r_addend); -+ } -+ break; -+ case R_MICROBLAZE_64_NONE: -+ { -+ /* This was a PC-relative 64-bit instruction that was -+ completely resolved. */ -+ int sfix, efix; -+ bfd_vma target_address; -+ target_address = irel->r_addend + irel->r_offset + INST_WORD_SIZE; -+ sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); -+ efix = calc_fixup (target_address, 0, sec); -+ irel->r_addend -= (efix - sfix); -+ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset -+ + INST_WORD_SIZE, irel->r_addend); -+ } -+ break; -+ } -+ irel->r_offset = nraddr; -+ } /* Change all relocs in this section. */ -+ -+ /* Look through all other sections. */ -+ for (o = abfd->sections; o != NULL; o = o->next) -+ { -+ Elf_Internal_Rela *irelocs; -+ Elf_Internal_Rela *irelscan, *irelscanend; -+ bfd_byte *ocontents; -+ -+ if (o == sec -+ || (o->flags & SEC_RELOC) == 0 -+ || o->reloc_count == 0) -+ continue; -+ -+ /* We always cache the relocs. Perhaps, if info->keep_memory is -+ FALSE, we should free them, if we are permitted to. */ -+ -+ irelocs = _bfd_elf_link_read_relocs (abfd, o, NULL, NULL, TRUE); -+ if (irelocs == NULL) -+ goto error_return; -+ -+ ocontents = NULL; -+ irelscanend = irelocs + o->reloc_count; -+ for (irelscan = irelocs; irelscan < irelscanend; irelscan++) -+ { -+ if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) -+ { -+ unsigned int val; -+ -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* hax: We only do the following fixup for debug location lists. */ -+ if (strcmp(".debug_loc", o->name)) -+ continue; -+ -+ /* This was a PC-relative instruction that was completely resolved. */ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ -+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ if (val != irelscan->r_addend) { -+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); -+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, -+ irelscan->r_addend); -+ } -+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) -+ { -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* Look at the reloc only if the value has been resolved. */ -+ if (isym->st_shndx == shndx -+ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) -+ { -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); -+ } -+ else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM) -+ { -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* Look at the reloc only if the value has been resolved. */ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend -+ + isym->st_value, -+ 0, -+ sec); -+ } -+ } -+ else if ((ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_PCREL_LO) -+ || (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_LO)) -+ { -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* Look at the reloc only if the value has been resolved. */ -+ if (isym->st_shndx == shndx -+ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) -+ { -+ bfd_vma immediate; -+ bfd_vma target_address; -+ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ -+ unsigned long instr = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ immediate = instr & 0x0000ffff; -+ target_address = immediate; -+ offset = calc_fixup (target_address, 0, sec); -+ immediate -= offset; -+ irelscan->r_addend -= offset; -+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, -+ irelscan->r_addend); -+ } -+ } -+ -+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64) -+ { -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* Look at the reloc only if the value has been resolved. */ -+ if (isym->st_shndx == shndx -+ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) -+ { -+ bfd_vma immediate; -+ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ unsigned long instr_hi = bfd_get_32 (abfd, ocontents -+ + irelscan->r_offset); -+ unsigned long instr_lo = bfd_get_32 (abfd, ocontents -+ + irelscan->r_offset -+ + INST_WORD_SIZE); -+ immediate = (instr_hi & 0x0000ffff) << 16; -+ immediate |= (instr_lo & 0x0000ffff); -+ offset = calc_fixup (irelscan->r_addend, 0, sec); -+ immediate -= offset; -+ irelscan->r_addend -= offset; -+ } -+ } -+ else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL) -+ { -+ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); -+ -+ /* Look at the reloc only if the value has been resolved. */ -+ if (isym->st_shndx == shndx -+ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) -+ { -+ bfd_vma immediate; -+ bfd_vma target_address; -+ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ unsigned long instr_hi = bfd_get_32 (abfd, ocontents -+ + irelscan->r_offset); -+ unsigned long instr_lo = bfd_get_32 (abfd, ocontents -+ + irelscan->r_offset -+ + INST_WORD_SIZE); -+ immediate = (instr_hi & 0x0000ffff) << 16; -+ immediate |= (instr_lo & 0x0000ffff); -+ target_address = immediate; -+ offset = calc_fixup (target_address, 0, sec); -+ immediate -= offset; -+ irelscan->r_addend -= offset; -+ microblaze_bfd_write_imm_value_64 (abfd, ocontents -+ + irelscan->r_offset, immediate); -+ } -+ } -+ } -+ } -+ -+ /* Adjust the local symbols defined in this section. */ -+ isymend = isymbuf + symtab_hdr->sh_info; -+ for (isym = isymbuf; isym < isymend; isym++) -+ { -+ if (isym->st_shndx == shndx) -+ { -+ isym->st_value -= calc_fixup (isym->st_value, 0, sec); -+ if (isym->st_size) -+ isym->st_size -= calc_fixup (isym->st_value, isym->st_size, sec); -+ } -+ } -+ -+ /* Now adjust the global symbols defined in this section. */ -+ isym = isymbuf + symtab_hdr->sh_info; -+ symcount = (symtab_hdr->sh_size / sizeof (Elf64_External_Sym)) - symtab_hdr->sh_info; -+ for (sym_index = 0; sym_index < symcount; sym_index++) -+ { -+ sym_hash = elf_sym_hashes (abfd)[sym_index]; -+ if ((sym_hash->root.type == bfd_link_hash_defined -+ || sym_hash->root.type == bfd_link_hash_defweak) -+ && sym_hash->root.u.def.section == sec) -+ { -+ sym_hash->root.u.def.value -= calc_fixup (sym_hash->root.u.def.value, -+ 0, sec); -+ if (sym_hash->size) -+ sym_hash->size -= calc_fixup (sym_hash->root.u.def.value, -+ sym_hash->size, sec); -+ } -+ } -+ -+ /* Physically move the code and change the cooked size. */ -+ dest = sec->relax[0].addr; -+ for (i = 0; i < sec->relax_count; i++) -+ { -+ int len; -+ src = sec->relax[i].addr + sec->relax[i].size; -+ len = sec->relax[i+1].addr - sec->relax[i].addr - sec->relax[i].size; -+ -+ memmove (contents + dest, contents + src, len); -+ sec->size -= sec->relax[i].size; -+ dest += len; -+ } -+ -+ elf_section_data (sec)->relocs = internal_relocs; -+ free_relocs = NULL; -+ -+ elf_section_data (sec)->this_hdr.contents = contents; -+ free_contents = NULL; -+ -+ symtab_hdr->contents = (bfd_byte *) isymbuf; -+ } -+ -+ if (free_relocs != NULL) -+ { -+ free (free_relocs); -+ free_relocs = NULL; -+ } -+ -+ if (free_contents != NULL) -+ { -+ if (!link_info->keep_memory) -+ free (free_contents); -+ else -+ /* Cache the section contents for elf_link_input_bfd. */ -+ elf_section_data (sec)->this_hdr.contents = contents; -+ free_contents = NULL; -+ } -+ -+ if (sec->relax_count == 0) -+ { -+ *again = FALSE; -+ free (sec->relax); -+ sec->relax = NULL; -+ } -+ else -+ *again = TRUE; -+ return TRUE; -+ -+ error_return: -+ if (free_relocs != NULL) -+ free (free_relocs); -+ if (free_contents != NULL) -+ free (free_contents); -+ if (sec->relax != NULL) -+ { -+ free (sec->relax); -+ sec->relax = NULL; -+ sec->relax_count = 0; -+ } -+ return FALSE; -+} -+ -+/* Return the section that should be marked against GC for a given -+ relocation. */ -+ -+static asection * -+microblaze_elf_gc_mark_hook (asection *sec, -+ struct bfd_link_info * info, -+ Elf_Internal_Rela * rel, -+ struct elf_link_hash_entry * h, -+ Elf_Internal_Sym * sym) -+{ -+ if (h != NULL) -+ switch (ELF64_R_TYPE (rel->r_info)) -+ { -+ case R_MICROBLAZE_GNU_VTINHERIT: -+ case R_MICROBLAZE_GNU_VTENTRY: -+ return NULL; -+ } -+ -+ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); -+} -+ -+/* Update the got entry reference counts for the section being removed. */ -+ -+static bfd_boolean -+microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED, -+ struct bfd_link_info * info ATTRIBUTE_UNUSED, -+ asection * sec ATTRIBUTE_UNUSED, -+ const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED) -+{ -+ return TRUE; -+} -+ -+/* PIC support. */ -+ -+#define PLT_ENTRY_SIZE 16 -+ -+#define PLT_ENTRY_WORD_0 0xb0000000 /* "imm 0". */ -+#define PLT_ENTRY_WORD_1 0xe9940000 /* "lwi r12,r20,0" - relocated to lwi r12,r20,func@GOT. */ -+#define PLT_ENTRY_WORD_1_NOPIC 0xe9800000 /* "lwi r12,r0,0" - non-PIC object. */ -+#define PLT_ENTRY_WORD_2 0x98186000 /* "brad r12". */ -+#define PLT_ENTRY_WORD_3 0x80000000 /* "nop". */ -+ -+/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up -+ shortcuts to them in our hash table. */ -+ -+static bfd_boolean -+create_got_section (bfd *dynobj, struct bfd_link_info *info) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ -+ if (! _bfd_elf_create_got_section (dynobj, info)) -+ return FALSE; -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ htab->sgot = bfd_get_linker_section (dynobj, ".got"); -+ htab->sgotplt = bfd_get_linker_section (dynobj, ".got.plt"); -+ if (!htab->sgot || !htab->sgotplt) -+ return FALSE; -+ -+ if ((htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got")) == NULL) -+ htab->srelgot = bfd_make_section_anyway (dynobj, ".rela.got"); -+ if (htab->srelgot == NULL -+ || ! bfd_set_section_flags (dynobj, htab->srelgot, SEC_ALLOC -+ | SEC_LOAD -+ | SEC_HAS_CONTENTS -+ | SEC_IN_MEMORY -+ | SEC_LINKER_CREATED -+ | SEC_READONLY) -+ || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2)) -+ return FALSE; -+ return TRUE; -+} -+ -+static bfd_boolean -+update_local_sym_info (bfd *abfd, -+ Elf_Internal_Shdr *symtab_hdr, -+ unsigned long r_symndx, -+ unsigned int tls_type) -+{ -+ bfd_signed_vma *local_got_refcounts = elf_local_got_refcounts (abfd); -+ unsigned char *local_got_tls_masks; -+ -+ if (local_got_refcounts == NULL) -+ { -+ bfd_size_type size = symtab_hdr->sh_info; -+ -+ size *= (sizeof (*local_got_refcounts) + sizeof (*local_got_tls_masks)); -+ local_got_refcounts = bfd_zalloc (abfd, size); -+ if (local_got_refcounts == NULL) -+ return FALSE; -+ elf_local_got_refcounts (abfd) = local_got_refcounts; -+ } -+ -+ local_got_tls_masks = -+ (unsigned char *) (local_got_refcounts + symtab_hdr->sh_info); -+ local_got_tls_masks[r_symndx] |= tls_type; -+ local_got_refcounts[r_symndx] += 1; -+ -+ return TRUE; -+} -+/* Look through the relocs for a section during the first phase. */ -+ -+static bfd_boolean -+microblaze_elf_check_relocs (bfd * abfd, -+ struct bfd_link_info * info, -+ asection * sec, -+ const Elf_Internal_Rela * relocs) -+{ -+ Elf_Internal_Shdr * symtab_hdr; -+ struct elf_link_hash_entry ** sym_hashes; -+ struct elf_link_hash_entry ** sym_hashes_end; -+ const Elf_Internal_Rela * rel; -+ const Elf_Internal_Rela * rel_end; -+ struct elf64_mb_link_hash_table *htab; -+ asection *sreloc = NULL; -+ -+ if (bfd_link_relocatable (info)) -+ return TRUE; -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ symtab_hdr = & elf_tdata (abfd)->symtab_hdr; -+ sym_hashes = elf_sym_hashes (abfd); -+ sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf64_External_Sym); -+ if (!elf_bad_symtab (abfd)) -+ sym_hashes_end -= symtab_hdr->sh_info; -+ -+ rel_end = relocs + sec->reloc_count; -+ -+ for (rel = relocs; rel < rel_end; rel++) -+ { -+ unsigned int r_type; -+ struct elf_link_hash_entry * h; -+ unsigned long r_symndx; -+ unsigned char tls_type = 0; -+ -+ r_symndx = ELF64_R_SYM (rel->r_info); -+ r_type = ELF64_R_TYPE (rel->r_info); -+ -+ if (r_symndx < symtab_hdr->sh_info) -+ h = NULL; -+ else -+ { -+ h = sym_hashes [r_symndx - symtab_hdr->sh_info]; -+ -+ /* PR15323, ref flags aren't set for references in the same -+ object. */ -+ h->root.non_ir_ref = 1; -+ } -+ -+ switch (r_type) -+ { -+ /* This relocation describes the C++ object vtable hierarchy. -+ Reconstruct it for later use during GC. */ -+ case R_MICROBLAZE_GNU_VTINHERIT: -+ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) -+ return FALSE; -+ break; -+ -+ /* This relocation describes which C++ vtable entries are actually -+ used. Record for later use during GC. */ -+ case R_MICROBLAZE_GNU_VTENTRY: -+ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) -+ return FALSE; -+ break; -+ -+ /* This relocation requires .plt entry. */ -+ case R_MICROBLAZE_PLT_64: -+ if (h != NULL) -+ { -+ h->needs_plt = 1; -+ h->plt.refcount += 1; -+ } -+ break; -+ -+ /* This relocation requires .got entry. */ -+ case R_MICROBLAZE_TLSGD: -+ tls_type |= (TLS_TLS | TLS_GD); -+ goto dogottls; -+ case R_MICROBLAZE_TLSLD: -+ tls_type |= (TLS_TLS | TLS_LD); -+ dogottls: -+ sec->has_tls_reloc = 1; -+ case R_MICROBLAZE_GOT_64: -+ if (htab->sgot == NULL) -+ { -+ if (htab->elf.dynobj == NULL) -+ htab->elf.dynobj = abfd; -+ if (!create_got_section (htab->elf.dynobj, info)) -+ return FALSE; -+ } -+ if (h != NULL) -+ { -+ h->got.refcount += 1; -+ elf64_mb_hash_entry (h)->tls_mask |= tls_type; -+ } -+ else -+ { -+ if (! update_local_sym_info(abfd, symtab_hdr, r_symndx, tls_type) ) -+ return FALSE; -+ } -+ break; -+ -+ case R_MICROBLAZE_64: -+ case R_MICROBLAZE_64_PCREL: -+ case R_MICROBLAZE_32: -+ { -+ if (h != NULL && !bfd_link_pic (info)) -+ { -+ /* we may need a copy reloc. */ -+ h->non_got_ref = 1; -+ -+ /* we may also need a .plt entry. */ -+ h->plt.refcount += 1; -+ if (ELF64_R_TYPE (rel->r_info) != R_MICROBLAZE_64_PCREL) -+ h->pointer_equality_needed = 1; -+ } -+ -+ -+ /* If we are creating a shared library, and this is a reloc -+ against a global symbol, or a non PC relative reloc -+ against a local symbol, then we need to copy the reloc -+ into the shared library. However, if we are linking with -+ -Bsymbolic, we do not need to copy a reloc against a -+ global symbol which is defined in an object we are -+ including in the link (i.e., DEF_REGULAR is set). At -+ this point we have not seen all the input files, so it is -+ possible that DEF_REGULAR is not set now but will be set -+ later (it is never cleared). In case of a weak definition, -+ DEF_REGULAR may be cleared later by a strong definition in -+ a shared library. We account for that possibility below by -+ storing information in the relocs_copied field of the hash -+ table entry. A similar situation occurs when creating -+ shared libraries and symbol visibility changes render the -+ symbol local. -+ -+ If on the other hand, we are creating an executable, we -+ may need to keep relocations for symbols satisfied by a -+ dynamic library if we manage to avoid copy relocs for the -+ symbol. */ -+ -+ if ((bfd_link_pic (info) -+ && (sec->flags & SEC_ALLOC) != 0 -+ && (r_type != R_MICROBLAZE_64_PCREL -+ || (h != NULL -+ && (! info->symbolic -+ || h->root.type == bfd_link_hash_defweak -+ || !h->def_regular)))) -+ || (!bfd_link_pic (info) -+ && (sec->flags & SEC_ALLOC) != 0 -+ && h != NULL -+ && (h->root.type == bfd_link_hash_defweak -+ || !h->def_regular))) -+ { -+ struct elf64_mb_dyn_relocs *p; -+ struct elf64_mb_dyn_relocs **head; -+ -+ /* When creating a shared object, we must copy these -+ relocs into the output file. We create a reloc -+ section in dynobj and make room for the reloc. */ -+ -+ if (sreloc == NULL) -+ { -+ bfd *dynobj; -+ -+ if (htab->elf.dynobj == NULL) -+ htab->elf.dynobj = abfd; -+ dynobj = htab->elf.dynobj; -+ -+ sreloc = _bfd_elf_make_dynamic_reloc_section (sec, dynobj, -+ 2, abfd, 1); -+ if (sreloc == NULL) -+ return FALSE; -+ } -+ -+ /* If this is a global symbol, we count the number of -+ relocations we need for this symbol. */ -+ if (h != NULL) -+ head = &((struct elf64_mb_link_hash_entry *) h)->dyn_relocs; -+ else -+ { -+ /* Track dynamic relocs needed for local syms too. -+ We really need local syms available to do this -+ easily. Oh well. */ -+ -+ asection *s; -+ Elf_Internal_Sym *isym; -+ void *vpp; -+ -+ isym = bfd_sym_from_r_symndx (&htab->sym_sec, -+ abfd, r_symndx); -+ if (isym == NULL) -+ return FALSE; -+ -+ s = bfd_section_from_elf_index (abfd, isym->st_shndx); -+ if (s == NULL) -+ return FALSE; -+ -+ vpp = &elf_section_data (s)->local_dynrel; -+ head = (struct elf64_mb_dyn_relocs **) vpp; -+ } -+ -+ p = *head; -+ if (p == NULL || p->sec != sec) -+ { -+ bfd_size_type amt = sizeof *p; -+ p = ((struct elf64_mb_dyn_relocs *) -+ bfd_alloc (htab->elf.dynobj, amt)); -+ if (p == NULL) -+ return FALSE; -+ p->next = *head; -+ *head = p; -+ p->sec = sec; -+ p->count = 0; -+ p->pc_count = 0; -+ } -+ -+ p->count += 1; -+ if (r_type == R_MICROBLAZE_64_PCREL) -+ p->pc_count += 1; -+ } -+ } -+ break; -+ } -+ } -+ -+ return TRUE; -+} -+ -+static bfd_boolean -+microblaze_elf_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ if (!htab->sgot && !create_got_section (dynobj, info)) -+ return FALSE; -+ -+ if (!_bfd_elf_create_dynamic_sections (dynobj, info)) -+ return FALSE; -+ -+ htab->splt = bfd_get_linker_section (dynobj, ".plt"); -+ htab->srelplt = bfd_get_linker_section (dynobj, ".rela.plt"); -+ htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss"); -+ if (!bfd_link_pic (info)) -+ htab->srelbss = bfd_get_linker_section (dynobj, ".rela.bss"); -+ -+ if (!htab->splt || !htab->srelplt || !htab->sdynbss -+ || (!bfd_link_pic (info) && !htab->srelbss)) -+ abort (); -+ -+ return TRUE; -+} -+ -+/* Copy the extra info we tack onto an elf_link_hash_entry. */ -+ -+static void -+microblaze_elf_copy_indirect_symbol (struct bfd_link_info *info, -+ struct elf_link_hash_entry *dir, -+ struct elf_link_hash_entry *ind) -+{ -+ struct elf64_mb_link_hash_entry *edir, *eind; -+ -+ edir = (struct elf64_mb_link_hash_entry *) dir; -+ eind = (struct elf64_mb_link_hash_entry *) ind; -+ -+ if (eind->dyn_relocs != NULL) -+ { -+ if (edir->dyn_relocs != NULL) -+ { -+ struct elf64_mb_dyn_relocs **pp; -+ struct elf64_mb_dyn_relocs *p; -+ -+ if (ind->root.type == bfd_link_hash_indirect) -+ abort (); -+ -+ /* Add reloc counts against the weak sym to the strong sym -+ list. Merge any entries against the same section. */ -+ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) -+ { -+ struct elf64_mb_dyn_relocs *q; -+ -+ for (q = edir->dyn_relocs; q != NULL; q = q->next) -+ if (q->sec == p->sec) -+ { -+ q->pc_count += p->pc_count; -+ q->count += p->count; -+ *pp = p->next; -+ break; -+ } -+ if (q == NULL) -+ pp = &p->next; -+ } -+ *pp = edir->dyn_relocs; -+ } -+ -+ edir->dyn_relocs = eind->dyn_relocs; -+ eind->dyn_relocs = NULL; -+ } -+ -+ edir->tls_mask |= eind->tls_mask; -+ -+ _bfd_elf_link_hash_copy_indirect (info, dir, ind); -+} -+ -+static bfd_boolean -+microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info, -+ struct elf_link_hash_entry *h) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ struct elf64_mb_link_hash_entry * eh; -+ struct elf64_mb_dyn_relocs *p; -+ asection *sdynbss, *s; -+ unsigned int power_of_two; -+ bfd *dynobj; -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ /* If this is a function, put it in the procedure linkage table. We -+ will fill in the contents of the procedure linkage table later, -+ when we know the address of the .got section. */ -+ if (h->type == STT_FUNC -+ || h->needs_plt) -+ { -+ if (h->plt.refcount <= 0 -+ || SYMBOL_CALLS_LOCAL (info, h) -+ || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT -+ && h->root.type == bfd_link_hash_undefweak)) -+ { -+ /* This case can occur if we saw a PLT reloc in an input -+ file, but the symbol was never referred to by a dynamic -+ object, or if all references were garbage collected. In -+ such a case, we don't actually need to build a procedure -+ linkage table, and we can just do a PC32 reloc instead. */ -+ h->plt.offset = (bfd_vma) -1; -+ h->needs_plt = 0; -+ } -+ -+ return TRUE; -+ } -+ else -+ /* It's possible that we incorrectly decided a .plt reloc was -+ needed for an R_MICROBLAZE_64_PCREL reloc to a non-function sym in -+ check_relocs. We can't decide accurately between function and -+ non-function syms in check-relocs; Objects loaded later in -+ the link may change h->type. So fix it now. */ -+ h->plt.offset = (bfd_vma) -1; -+ -+ /* If this is a weak symbol, and there is a real definition, the -+ processor independent code will have arranged for us to see the -+ real definition first, and we can just use the same value. */ -+ if (h->u.weakdef != NULL) -+ { -+ BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined -+ || h->u.weakdef->root.type == bfd_link_hash_defweak); -+ h->root.u.def.section = h->u.weakdef->root.u.def.section; -+ h->root.u.def.value = h->u.weakdef->root.u.def.value; -+ return TRUE; -+ } -+ -+ /* This is a reference to a symbol defined by a dynamic object which -+ is not a function. */ -+ -+ /* If we are creating a shared library, we must presume that the -+ only references to the symbol are via the global offset table. -+ For such cases we need not do anything here; the relocations will -+ be handled correctly by relocate_section. */ -+ if (bfd_link_pic (info)) -+ return TRUE; -+ -+ /* If there are no references to this symbol that do not use the -+ GOT, we don't need to generate a copy reloc. */ -+ if (!h->non_got_ref) -+ return TRUE; -+ -+ /* If -z nocopyreloc was given, we won't generate them either. */ -+ if (info->nocopyreloc) -+ { -+ h->non_got_ref = 0; -+ return TRUE; -+ } -+ -+ eh = (struct elf64_mb_link_hash_entry *) h; -+ for (p = eh->dyn_relocs; p != NULL; p = p->next) -+ { -+ s = p->sec->output_section; -+ if (s != NULL && (s->flags & SEC_READONLY) != 0) -+ break; -+ } -+ -+ /* If we didn't find any dynamic relocs in read-only sections, then -+ we'll be keeping the dynamic relocs and avoiding the copy reloc. */ -+ if (p == NULL) -+ { -+ h->non_got_ref = 0; -+ return TRUE; -+ } -+ -+ /* We must allocate the symbol in our .dynbss section, which will -+ become part of the .bss section of the executable. There will be -+ an entry for this symbol in the .dynsym section. The dynamic -+ object will contain position independent code, so all references -+ from the dynamic object to this symbol will go through the global -+ offset table. The dynamic linker will use the .dynsym entry to -+ determine the address it must put in the global offset table, so -+ both the dynamic object and the regular object will refer to the -+ same memory location for the variable. */ -+ -+ /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker -+ to copy the initial value out of the dynamic object and into the -+ runtime process image. */ -+ dynobj = elf_hash_table (info)->dynobj; -+ BFD_ASSERT (dynobj != NULL); -+ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) -+ { -+ htab->srelbss->size += sizeof (Elf64_External_Rela); -+ h->needs_copy = 1; -+ } -+ -+ /* We need to figure out the alignment required for this symbol. I -+ have no idea how ELF linkers handle this. */ -+ power_of_two = bfd_log2 (h->size); -+ if (power_of_two > 3) -+ power_of_two = 3; -+ -+ sdynbss = htab->sdynbss; -+ /* Apply the required alignment. */ -+ sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); -+ if (power_of_two > bfd_get_section_alignment (dynobj, sdynbss)) -+ { -+ if (! bfd_set_section_alignment (dynobj, sdynbss, power_of_two)) -+ return FALSE; -+ } -+ -+ /* Define the symbol as being at this point in the section. */ -+ h->root.u.def.section = sdynbss; -+ h->root.u.def.value = sdynbss->size; -+ -+ /* Increment the section size to make room for the symbol. */ -+ sdynbss->size += h->size; -+ return TRUE; -+} -+ -+/* Allocate space in .plt, .got and associated reloc sections for -+ dynamic relocs. */ -+ -+static bfd_boolean -+allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat) -+{ -+ struct bfd_link_info *info; -+ struct elf64_mb_link_hash_table *htab; -+ struct elf64_mb_link_hash_entry *eh; -+ struct elf64_mb_dyn_relocs *p; -+ -+ if (h->root.type == bfd_link_hash_indirect) -+ return TRUE; -+ -+ info = (struct bfd_link_info *) dat; -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ if (htab->elf.dynamic_sections_created -+ && h->plt.refcount > 0) -+ { -+ /* Make sure this symbol is output as a dynamic symbol. -+ Undefined weak syms won't yet be marked as dynamic. */ -+ if (h->dynindx == -1 -+ && !h->forced_local) -+ { -+ if (! bfd_elf_link_record_dynamic_symbol (info, h)) -+ return FALSE; -+ } -+ -+ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) -+ { -+ asection *s = htab->splt; -+ -+ /* The first entry in .plt is reserved. */ -+ if (s->size == 0) -+ s->size = PLT_ENTRY_SIZE; -+ -+ h->plt.offset = s->size; -+ -+ /* If this symbol is not defined in a regular file, and we are -+ not generating a shared library, then set the symbol to this -+ location in the .plt. This is required to make function -+ pointers compare as equal between the normal executable and -+ the shared library. */ -+ if (! bfd_link_pic (info) -+ && !h->def_regular) -+ { -+ h->root.u.def.section = s; -+ h->root.u.def.value = h->plt.offset; -+ } -+ -+ /* Make room for this entry. */ -+ s->size += PLT_ENTRY_SIZE; -+ -+ /* We also need to make an entry in the .got.plt section, which -+ will be placed in the .got section by the linker script. */ -+ htab->sgotplt->size += 4; -+ -+ /* We also need to make an entry in the .rel.plt section. */ -+ htab->srelplt->size += sizeof (Elf64_External_Rela); -+ } -+ else -+ { -+ h->plt.offset = (bfd_vma) -1; -+ h->needs_plt = 0; -+ } -+ } -+ else -+ { -+ h->plt.offset = (bfd_vma) -1; -+ h->needs_plt = 0; -+ } -+ -+ eh = (struct elf64_mb_link_hash_entry *) h; -+ if (h->got.refcount > 0) -+ { -+ unsigned int need; -+ asection *s; -+ -+ /* Make sure this symbol is output as a dynamic symbol. -+ Undefined weak syms won't yet be marked as dynamic. */ -+ if (h->dynindx == -1 -+ && !h->forced_local) -+ { -+ if (! bfd_elf_link_record_dynamic_symbol (info, h)) -+ return FALSE; -+ } -+ -+ need = 0; -+ if ((eh->tls_mask & TLS_TLS) != 0) -+ { -+ /* Handle TLS Symbol */ -+ if ((eh->tls_mask & TLS_LD) != 0) -+ { -+ if (!eh->elf.def_dynamic) -+ /* We'll just use htab->tlsld_got.offset. This should -+ always be the case. It's a little odd if we have -+ a local dynamic reloc against a non-local symbol. */ -+ htab->tlsld_got.refcount += 1; -+ else -+ need += 8; -+ } -+ if ((eh->tls_mask & TLS_GD) != 0) -+ need += 8; -+ } -+ else -+ { -+ /* Regular (non-TLS) symbol */ -+ need += 4; -+ } -+ if (need == 0) -+ { -+ h->got.offset = (bfd_vma) -1; -+ } -+ else -+ { -+ s = htab->sgot; -+ h->got.offset = s->size; -+ s->size += need; -+ htab->srelgot->size += need * (sizeof (Elf64_External_Rela) / 4); -+ } -+ } -+ else -+ h->got.offset = (bfd_vma) -1; -+ -+ if (eh->dyn_relocs == NULL) -+ return TRUE; -+ -+ /* In the shared -Bsymbolic case, discard space allocated for -+ dynamic pc-relative relocs against symbols which turn out to be -+ defined in regular objects. For the normal shared case, discard -+ space for pc-relative relocs that have become local due to symbol -+ visibility changes. */ -+ -+ if (bfd_link_pic (info)) -+ { -+ if (h->def_regular -+ && (h->forced_local -+ || info->symbolic)) -+ { -+ struct elf64_mb_dyn_relocs **pp; -+ -+ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) -+ { -+ p->count -= p->pc_count; -+ p->pc_count = 0; -+ if (p->count == 0) -+ *pp = p->next; -+ else -+ pp = &p->next; -+ } -+ } -+ } -+ else -+ { -+ /* For the non-shared case, discard space for relocs against -+ symbols which turn out to need copy relocs or are not -+ dynamic. */ -+ -+ if (!h->non_got_ref -+ && ((h->def_dynamic -+ && !h->def_regular) -+ || (htab->elf.dynamic_sections_created -+ && (h->root.type == bfd_link_hash_undefweak -+ || h->root.type == bfd_link_hash_undefined)))) -+ { -+ /* Make sure this symbol is output as a dynamic symbol. -+ Undefined weak syms won't yet be marked as dynamic. */ -+ if (h->dynindx == -1 -+ && !h->forced_local) -+ { -+ if (! bfd_elf_link_record_dynamic_symbol (info, h)) -+ return FALSE; -+ } -+ -+ /* If that succeeded, we know we'll be keeping all the -+ relocs. */ -+ if (h->dynindx != -1) -+ goto keep; -+ } -+ -+ eh->dyn_relocs = NULL; -+ -+ keep: ; -+ } -+ -+ /* Finally, allocate space. */ -+ for (p = eh->dyn_relocs; p != NULL; p = p->next) -+ { -+ asection *sreloc = elf_section_data (p->sec)->sreloc; -+ sreloc->size += p->count * sizeof (Elf64_External_Rela); -+ } -+ -+ return TRUE; -+} -+ -+/* Set the sizes of the dynamic sections. */ -+ -+static bfd_boolean -+microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, -+ struct bfd_link_info *info) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ bfd *dynobj; -+ asection *s; -+ bfd *ibfd; -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ dynobj = htab->elf.dynobj; -+ BFD_ASSERT (dynobj != NULL); -+ -+ /* Set up .got offsets for local syms, and space for local dynamic -+ relocs. */ -+ for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) -+ { -+ bfd_signed_vma *local_got; -+ bfd_signed_vma *end_local_got; -+ bfd_size_type locsymcount; -+ Elf_Internal_Shdr *symtab_hdr; -+ unsigned char *lgot_masks; -+ asection *srel; -+ -+ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) -+ continue; -+ -+ for (s = ibfd->sections; s != NULL; s = s->next) -+ { -+ struct elf64_mb_dyn_relocs *p; -+ -+ for (p = ((struct elf64_mb_dyn_relocs *) -+ elf_section_data (s)->local_dynrel); -+ p != NULL; -+ p = p->next) -+ { -+ if (!bfd_is_abs_section (p->sec) -+ && bfd_is_abs_section (p->sec->output_section)) -+ { -+ /* Input section has been discarded, either because -+ it is a copy of a linkonce section or due to -+ linker script /DISCARD/, so we'll be discarding -+ the relocs too. */ -+ } -+ else if (p->count != 0) -+ { -+ srel = elf_section_data (p->sec)->sreloc; -+ srel->size += p->count * sizeof (Elf64_External_Rela); -+ if ((p->sec->output_section->flags & SEC_READONLY) != 0) -+ info->flags |= DF_TEXTREL; -+ } -+ } -+ } -+ -+ local_got = elf_local_got_refcounts (ibfd); -+ if (!local_got) -+ continue; -+ -+ symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; -+ locsymcount = symtab_hdr->sh_info; -+ end_local_got = local_got + locsymcount; -+ lgot_masks = (unsigned char *) end_local_got; -+ s = htab->sgot; -+ srel = htab->srelgot; -+ -+ for (; local_got < end_local_got; ++local_got, ++lgot_masks) -+ { -+ if (*local_got > 0) -+ { -+ unsigned int need = 0; -+ if ((*lgot_masks & TLS_TLS) != 0) -+ { -+ if ((*lgot_masks & TLS_GD) != 0) -+ need += 8; -+ if ((*lgot_masks & TLS_LD) != 0) -+ htab->tlsld_got.refcount += 1; -+ } -+ else -+ need += 4; -+ -+ if (need == 0) -+ { -+ *local_got = (bfd_vma) -1; -+ } -+ else -+ { -+ *local_got = s->size; -+ s->size += need; -+ if (bfd_link_pic (info)) -+ srel->size += need * (sizeof (Elf64_External_Rela) / 4); -+ } -+ } -+ else -+ *local_got = (bfd_vma) -1; -+ } -+ } -+ -+ /* Allocate global sym .plt and .got entries, and space for global -+ sym dynamic relocs. */ -+ elf_link_hash_traverse (elf_hash_table (info), allocate_dynrelocs, info); -+ -+ if (htab->tlsld_got.refcount > 0) -+ { -+ htab->tlsld_got.offset = htab->sgot->size; -+ htab->sgot->size += 8; -+ if (bfd_link_pic (info)) -+ htab->srelgot->size += sizeof (Elf64_External_Rela); -+ } -+ else -+ htab->tlsld_got.offset = (bfd_vma) -1; -+ -+ if (elf_hash_table (info)->dynamic_sections_created) -+ { -+ /* Make space for the trailing nop in .plt. */ -+ if (htab->splt->size > 0) -+ htab->splt->size += 4; -+ } -+ -+ /* The check_relocs and adjust_dynamic_symbol entry points have -+ determined the sizes of the various dynamic sections. Allocate -+ memory for them. */ -+ for (s = dynobj->sections; s != NULL; s = s->next) -+ { -+ const char *name; -+ bfd_boolean strip = FALSE; -+ -+ if ((s->flags & SEC_LINKER_CREATED) == 0) -+ continue; -+ -+ /* It's OK to base decisions on the section name, because none -+ of the dynobj section names depend upon the input files. */ -+ name = bfd_get_section_name (dynobj, s); -+ -+ if (strncmp (name, ".rela", 5) == 0) -+ { -+ if (s->size == 0) -+ { -+ /* If we don't need this section, strip it from the -+ output file. This is to handle .rela.bss and -+ .rela.plt. We must create it in -+ create_dynamic_sections, because it must be created -+ before the linker maps input sections to output -+ sections. The linker does that before -+ adjust_dynamic_symbol is called, and it is that -+ function which decides whether anything needs to go -+ into these sections. */ -+ strip = TRUE; -+ } -+ else -+ { -+ /* We use the reloc_count field as a counter if we need -+ to copy relocs into the output file. */ -+ s->reloc_count = 0; -+ } -+ } -+ else if (s != htab->splt && s != htab->sgot && s != htab->sgotplt) -+ { -+ /* It's not one of our sections, so don't allocate space. */ -+ continue; -+ } -+ -+ if (strip) -+ { -+ s->flags |= SEC_EXCLUDE; -+ continue; -+ } -+ -+ /* Allocate memory for the section contents. */ -+ /* FIXME: This should be a call to bfd_alloc not bfd_zalloc. -+ Unused entries should be reclaimed before the section's contents -+ are written out, but at the moment this does not happen. Thus in -+ order to prevent writing out garbage, we initialise the section's -+ contents to zero. */ -+ s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); -+ if (s->contents == NULL && s->size != 0) -+ return FALSE; -+ } -+ -+ if (elf_hash_table (info)->dynamic_sections_created) -+ { -+ /* Add some entries to the .dynamic section. We fill in the -+ values later, in microblaze_elf_finish_dynamic_sections, but we -+ must add the entries now so that we get the correct size for -+ the .dynamic section. The DT_DEBUG entry is filled in by the -+ dynamic linker and used by the debugger. */ -+#define add_dynamic_entry(TAG, VAL) \ -+ _bfd_elf_add_dynamic_entry (info, TAG, VAL) -+ -+ if (bfd_link_executable (info)) -+ { -+ if (!add_dynamic_entry (DT_DEBUG, 0)) -+ return FALSE; -+ } -+ -+ if (!add_dynamic_entry (DT_RELA, 0) -+ || !add_dynamic_entry (DT_RELASZ, 0) -+ || !add_dynamic_entry (DT_RELAENT, sizeof (Elf64_External_Rela))) -+ return FALSE; -+ -+ if (htab->splt->size != 0) -+ { -+ if (!add_dynamic_entry (DT_PLTGOT, 0) -+ || !add_dynamic_entry (DT_PLTRELSZ, 0) -+ || !add_dynamic_entry (DT_PLTREL, DT_RELA) -+ || !add_dynamic_entry (DT_JMPREL, 0) -+ || !add_dynamic_entry (DT_BIND_NOW, 1)) -+ return FALSE; -+ } -+ -+ if (info->flags & DF_TEXTREL) -+ { -+ if (!add_dynamic_entry (DT_TEXTREL, 0)) -+ return FALSE; -+ } -+ } -+#undef add_dynamic_entry -+ return TRUE; -+} -+ -+/* Finish up dynamic symbol handling. We set the contents of various -+ dynamic sections here. */ -+ -+static bfd_boolean -+microblaze_elf_finish_dynamic_symbol (bfd *output_bfd, -+ struct bfd_link_info *info, -+ struct elf_link_hash_entry *h, -+ Elf_Internal_Sym *sym) -+{ -+ struct elf64_mb_link_hash_table *htab; -+ struct elf64_mb_link_hash_entry *eh = elf64_mb_hash_entry(h); -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ if (h->plt.offset != (bfd_vma) -1) -+ { -+ asection *splt; -+ asection *srela; -+ asection *sgotplt; -+ Elf_Internal_Rela rela; -+ bfd_byte *loc; -+ bfd_vma plt_index; -+ bfd_vma got_offset; -+ bfd_vma got_addr; -+ -+ /* This symbol has an entry in the procedure linkage table. Set -+ it up. */ -+ BFD_ASSERT (h->dynindx != -1); -+ -+ splt = htab->splt; -+ srela = htab->srelplt; -+ sgotplt = htab->sgotplt; -+ BFD_ASSERT (splt != NULL && srela != NULL && sgotplt != NULL); -+ -+ plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; /* first entry reserved. */ -+ got_offset = (plt_index + 3) * 4; /* 3 reserved ??? */ -+ got_addr = got_offset; -+ -+ /* For non-PIC objects we need absolute address of the GOT entry. */ -+ if (!bfd_link_pic (info)) -+ got_addr += htab->sgotplt->output_section->vma + sgotplt->output_offset; -+ -+ /* Fill in the entry in the procedure linkage table. */ -+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff), -+ splt->contents + h->plt.offset); -+ if (bfd_link_pic (info)) -+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1 + (got_addr & 0xffff), -+ splt->contents + h->plt.offset + 4); -+ else -+ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1_NOPIC + (got_addr & 0xffff), -+ splt->contents + h->plt.offset + 4); -+ bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_2, -+ splt->contents + h->plt.offset + 8); -+ bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_3, -+ splt->contents + h->plt.offset + 12); -+ -+ /* Any additions to the .got section??? */ -+ /* bfd_put_32 (output_bfd, -+ splt->output_section->vma + splt->output_offset + h->plt.offset + 4, -+ sgotplt->contents + got_offset); */ -+ -+ /* Fill in the entry in the .rela.plt section. */ -+ rela.r_offset = (sgotplt->output_section->vma -+ + sgotplt->output_offset -+ + got_offset); -+ rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_JUMP_SLOT); -+ rela.r_addend = 0; -+ loc = srela->contents; -+ loc += plt_index * sizeof (Elf64_External_Rela); -+ bfd_elf64_swap_reloca_out (output_bfd, &rela, loc); -+ -+ if (!h->def_regular) -+ { -+ /* Mark the symbol as undefined, rather than as defined in -+ the .plt section. Zero the value. */ -+ sym->st_shndx = SHN_UNDEF; -+ sym->st_value = 0; -+ } -+ } -+ -+ /* h->got.refcount to be checked ? */ -+ if (h->got.offset != (bfd_vma) -1 && -+ ! ((h->got.offset & 1) || -+ IS_TLS_LD(eh->tls_mask) || IS_TLS_GD(eh->tls_mask))) -+ { -+ asection *sgot; -+ asection *srela; -+ bfd_vma offset; -+ -+ /* This symbol has an entry in the global offset table. Set it -+ up. */ -+ -+ sgot = htab->sgot; -+ srela = htab->srelgot; -+ BFD_ASSERT (sgot != NULL && srela != NULL); -+ -+ offset = (sgot->output_section->vma + sgot->output_offset -+ + (h->got.offset &~ (bfd_vma) 1)); -+ -+ /* If this is a -Bsymbolic link, and the symbol is defined -+ locally, we just want to emit a RELATIVE reloc. Likewise if -+ the symbol was forced to be local because of a version file. -+ The entry in the global offset table will already have been -+ initialized in the relocate_section function. */ -+ if (bfd_link_pic (info) -+ && ((info->symbolic && h->def_regular) -+ || h->dynindx == -1)) -+ { -+ asection *sec = h->root.u.def.section; -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ srela, srela->reloc_count++, -+ /* symindex= */ 0, -+ R_MICROBLAZE_REL, offset, -+ h->root.u.def.value -+ + sec->output_section->vma -+ + sec->output_offset); -+ } -+ else -+ { -+ microblaze_elf_output_dynamic_relocation (output_bfd, -+ srela, srela->reloc_count++, -+ h->dynindx, -+ R_MICROBLAZE_GLOB_DAT, -+ offset, 0); -+ } -+ -+ bfd_put_32 (output_bfd, (bfd_vma) 0, -+ sgot->contents + (h->got.offset &~ (bfd_vma) 1)); -+ } -+ -+ if (h->needs_copy) -+ { -+ asection *s; -+ Elf_Internal_Rela rela; -+ bfd_byte *loc; -+ -+ /* This symbols needs a copy reloc. Set it up. */ -+ -+ BFD_ASSERT (h->dynindx != -1); -+ -+ s = bfd_get_linker_section (htab->elf.dynobj, ".rela.bss"); -+ BFD_ASSERT (s != NULL); -+ -+ rela.r_offset = (h->root.u.def.value -+ + h->root.u.def.section->output_section->vma -+ + h->root.u.def.section->output_offset); -+ rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_COPY); -+ rela.r_addend = 0; -+ loc = s->contents + s->reloc_count++ * sizeof (Elf64_External_Rela); -+ bfd_elf64_swap_reloca_out (output_bfd, &rela, loc); -+ } -+ -+ /* Mark some specially defined symbols as absolute. */ -+ if (h == htab->elf.hdynamic -+ || h == htab->elf.hgot -+ || h == htab->elf.hplt) -+ sym->st_shndx = SHN_ABS; -+ -+ return TRUE; -+} -+ -+ -+/* Finish up the dynamic sections. */ -+ -+static bfd_boolean -+microblaze_elf_finish_dynamic_sections (bfd *output_bfd, -+ struct bfd_link_info *info) -+{ -+ bfd *dynobj; -+ asection *sdyn, *sgot; -+ struct elf64_mb_link_hash_table *htab; -+ -+ htab = elf64_mb_hash_table (info); -+ if (htab == NULL) -+ return FALSE; -+ -+ dynobj = htab->elf.dynobj; -+ -+ sdyn = bfd_get_linker_section (dynobj, ".dynamic"); -+ -+ if (htab->elf.dynamic_sections_created) -+ { -+ asection *splt; -+ Elf64_External_Dyn *dyncon, *dynconend; -+ -+ splt = bfd_get_linker_section (dynobj, ".plt"); -+ BFD_ASSERT (splt != NULL && sdyn != NULL); -+ -+ dyncon = (Elf64_External_Dyn *) sdyn->contents; -+ dynconend = (Elf64_External_Dyn *) (sdyn->contents + sdyn->size); -+ for (; dyncon < dynconend; dyncon++) -+ { -+ Elf_Internal_Dyn dyn; -+ const char *name; -+ bfd_boolean size; -+ -+ bfd_elf64_swap_dyn_in (dynobj, dyncon, &dyn); -+ -+ switch (dyn.d_tag) -+ { -+ case DT_PLTGOT: name = ".got.plt"; size = FALSE; break; -+ case DT_PLTRELSZ: name = ".rela.plt"; size = TRUE; break; -+ case DT_JMPREL: name = ".rela.plt"; size = FALSE; break; -+ case DT_RELA: name = ".rela.dyn"; size = FALSE; break; -+ case DT_RELASZ: name = ".rela.dyn"; size = TRUE; break; -+ default: name = NULL; size = FALSE; break; -+ } -+ -+ if (name != NULL) -+ { -+ asection *s; -+ -+ s = bfd_get_section_by_name (output_bfd, name); -+ if (s == NULL) -+ dyn.d_un.d_val = 0; -+ else -+ { -+ if (! size) -+ dyn.d_un.d_ptr = s->vma; -+ else -+ dyn.d_un.d_val = s->size; -+ } -+ bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon); -+ } -+ } -+ -+ /* Clear the first entry in the procedure linkage table, -+ and put a nop in the last four bytes. */ -+ if (splt->size > 0) -+ { -+ memset (splt->contents, 0, PLT_ENTRY_SIZE); -+ bfd_put_32 (output_bfd, (bfd_vma) 0x80000000 /* nop. */, -+ splt->contents + splt->size - 4); -+ } -+ -+ elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; -+ } -+ -+ /* Set the first entry in the global offset table to the address of -+ the dynamic section. */ -+ sgot = bfd_get_linker_section (dynobj, ".got.plt"); -+ if (sgot && sgot->size > 0) -+ { -+ if (sdyn == NULL) -+ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); -+ else -+ bfd_put_32 (output_bfd, -+ sdyn->output_section->vma + sdyn->output_offset, -+ sgot->contents); -+ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; -+ } -+ -+ if (htab->sgot && htab->sgot->size > 0) -+ elf_section_data (htab->sgot->output_section)->this_hdr.sh_entsize = 4; -+ -+ return TRUE; -+} -+ -+/* Hook called by the linker routine which adds symbols from an object -+ file. We use it to put .comm items in .sbss, and not .bss. */ -+ -+static bfd_boolean -+microblaze_elf_add_symbol_hook (bfd *abfd, -+ struct bfd_link_info *info, -+ Elf_Internal_Sym *sym, -+ const char **namep ATTRIBUTE_UNUSED, -+ flagword *flagsp ATTRIBUTE_UNUSED, -+ asection **secp, -+ bfd_vma *valp) -+{ -+ if (sym->st_shndx == SHN_COMMON -+ && !bfd_link_relocatable (info) -+ && sym->st_size <= elf_gp_size (abfd)) -+ { -+ /* Common symbols less than or equal to -G nn bytes are automatically -+ put into .sbss. */ -+ *secp = bfd_make_section_old_way (abfd, ".sbss"); -+ if (*secp == NULL -+ || ! bfd_set_section_flags (abfd, *secp, SEC_IS_COMMON)) -+ return FALSE; -+ -+ *valp = sym->st_size; -+ } -+ -+ return TRUE; -+} -+ -+#define TARGET_LITTLE_SYM microblaze_elf64_le_vec -+#define TARGET_LITTLE_NAME "elf64-microblazeel" -+ -+#define TARGET_BIG_SYM microblaze_elf64_vec -+#define TARGET_BIG_NAME "elf64-microblaze" -+ -+#define ELF_ARCH bfd_arch_microblaze -+#define ELF_TARGET_ID MICROBLAZE_ELF_DATA -+#define ELF_MACHINE_CODE EM_MICROBLAZE -+#define ELF_MACHINE_ALT1 EM_MICROBLAZE_OLD -+#define ELF_MAXPAGESIZE 0x1000 -+#define elf_info_to_howto microblaze_elf_info_to_howto -+#define elf_info_to_howto_rel NULL -+ -+#define bfd_elf64_bfd_reloc_type_lookup microblaze_elf_reloc_type_lookup -+#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name -+#define elf_backend_relocate_section microblaze_elf_relocate_section -+#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section -+#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data -+#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup -+ -+#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook -+#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook -+#define elf_backend_check_relocs microblaze_elf_check_relocs -+#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol -+#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create -+#define elf_backend_can_gc_sections 1 -+#define elf_backend_can_refcount 1 -+#define elf_backend_want_got_plt 1 -+#define elf_backend_plt_readonly 1 -+#define elf_backend_got_header_size 12 -+#define elf_backend_rela_normal 1 -+ -+#define elf_backend_adjust_dynamic_symbol microblaze_elf_adjust_dynamic_symbol -+#define elf_backend_create_dynamic_sections microblaze_elf_create_dynamic_sections -+#define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections -+#define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol -+#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections -+#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook -+ -+#include "elf64-target.h" -diff --git a/bfd/targets.c b/bfd/targets.c -index 158168c..ef567a3 100644 ---- a/bfd/targets.c -+++ b/bfd/targets.c -@@ -706,6 +706,8 @@ extern const bfd_target mep_elf32_le_vec; - extern const bfd_target metag_elf32_vec; - extern const bfd_target microblaze_elf32_vec; - extern const bfd_target microblaze_elf32_le_vec; -+extern const bfd_target microblaze_elf64_vec; -+extern const bfd_target microblaze_elf64_le_vec; - extern const bfd_target mips_ecoff_be_vec; - extern const bfd_target mips_ecoff_le_vec; - extern const bfd_target mips_ecoff_bele_vec; -@@ -1073,6 +1075,10 @@ static const bfd_target * const _bfd_target_vector[] = - - &metag_elf32_vec, - -+#ifdef BFD64 -+ µblaze_elf64_vec, -+ µblaze_elf64_le_vec, -+#endif - µblaze_elf32_vec, - - &mips_ecoff_be_vec, -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 16b10d0..c794347 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -35,10 +35,13 @@ - #define streq(a,b) (strcmp (a, b) == 0) - #endif - -+static int microblaze_arch_size = 0; -+ - #define OPTION_EB (OPTION_MD_BASE + 0) - #define OPTION_EL (OPTION_MD_BASE + 1) - #define OPTION_LITTLE (OPTION_MD_BASE + 2) - #define OPTION_BIG (OPTION_MD_BASE + 3) -+#define OPTION_M64 (OPTION_MD_BASE + 4) - - void microblaze_generate_symbol (char *sym); - static bfd_boolean check_spl_reg (unsigned *); -@@ -773,6 +776,74 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) - return new_pointer; - } - -+ static char * -+parse_imml (char * s, expressionS * e, long min, long max) -+{ -+ char *new_pointer; -+ char *atp; -+ int itype, ilen; -+ -+ ilen = 0; -+ -+ /* Find the start of "@GOT" or "@PLT" suffix (if any) */ -+ for (atp = s; *atp != '@'; atp++) -+ if (is_end_of_line[(unsigned char) *atp]) -+ break; -+ -+ if (*atp == '@') -+ { -+ itype = match_imm (atp + 1, &ilen); -+ if (itype != 0) -+ { -+ *atp = 0; -+ e->X_md = itype; -+ } -+ else -+ { -+ atp = NULL; -+ e->X_md = 0; -+ ilen = 0; -+ } -+ *atp = 0; -+ } -+ else -+ { -+ atp = NULL; -+ e->X_md = 0; -+ } -+ -+ if (atp && !GOT_symbol) -+ { -+ GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME); -+ } -+ -+ new_pointer = parse_exp (s, e); -+ -+ if (!GOT_symbol && ! strncmp (s, GOT_SYMBOL_NAME, 20)) -+ { -+ GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME); -+ } -+ -+ if (e->X_op == O_absent) -+ ; /* An error message has already been emitted. */ -+ else if ((e->X_op != O_constant && e->X_op != O_symbol) ) -+ as_fatal (_("operand must be a constant or a label")); -+ else if ((e->X_op == O_constant) && ((long) e->X_add_number < min -+ || (long) e->X_add_number > max)) -+ { -+ as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"), -+ min, max, (long) e->X_add_number); -+ } -+ -+ if (atp) -+ { -+ *atp = '@'; /* restore back (needed?) */ -+ if (new_pointer >= atp) -+ new_pointer += ilen + 1; /* sizeof (imm_suffix) + 1 for '@' */ -+ } -+ return new_pointer; -+} -+ - static char * - check_got (int * got_type, int * got_len) - { -@@ -920,6 +991,7 @@ md_assemble (char * str) - unsigned int immed, immed2, temp; - expressionS exp; - char name[20]; -+ long immedl; - - /* Drop leading whitespace. */ - while (ISSPACE (* str)) -@@ -1129,7 +1201,7 @@ md_assemble (char * str) - } - break; - -- case INST_TYPE_RD_R1_IMM5: -+ case INST_TYPE_RD_R1_IMMS: - if (strcmp (op_end, "")) - op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ - else -@@ -1163,16 +1235,22 @@ md_assemble (char * str) - immed = exp.X_add_number; - } - -- if (immed != (immed % 32)) -+ if ((immed != (immed % 32)) && -+ (opcode->instr == bslli || opcode->instr == bsrai || opcode->instr == bsrli)) - { - as_warn (_("Shift value > 32. using <value %% 32>")); - immed = immed % 32; - } -+ else if (immed != (immed % 64)) -+ { -+ as_warn (_("Shift value > 64. using <value %% 64>")); -+ immed = immed % 64; -+ } - inst |= (reg1 << RD_LOW) & RD_MASK; - inst |= (reg2 << RA_LOW) & RA_MASK; -- inst |= (immed << IMM_LOW) & IMM5_MASK; -+ inst |= (immed << IMM_LOW) & IMM6_MASK; - break; -- case INST_TYPE_RD_R1_IMM5_IMM5: -+ case INST_TYPE_RD_R1_IMMW_IMMS: - if (strcmp (op_end, "")) - op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ - else -@@ -1196,7 +1274,7 @@ md_assemble (char * str) - - /* Width immediate value. */ - if (strcmp (op_end, "")) -- op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); -+ op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); - else - as_fatal (_("Error in statement syntax")); - if (exp.X_op != O_constant) -@@ -1208,6 +1286,8 @@ md_assemble (char * str) - immed = exp.X_add_number; - if (opcode->instr == bsefi && immed > 31) - as_fatal (_("Width value must be less than 32")); -+ else if (opcode->instr == bslefi && immed > 63) -+ as_fatal (_("Width value must be less than 64")); - - /* Shift immediate value. */ - if (strcmp (op_end, "")) -@@ -1215,32 +1295,40 @@ md_assemble (char * str) - else - as_fatal (_("Error in statement syntax")); - if (exp.X_op != O_constant) -- { -+ { - as_warn (_("Symbol used as immediate shift value for bit field instruction")); - immed2 = 0; - } - else -- { -+ { - output = frag_more (isize); - immed2 = exp.X_add_number; -- } -- if (immed2 != (immed2 % 32)) -- { -- as_warn (_("Shift value greater than 32. using <value %% 32>")); -+ } -+ if ((immed2 != (immed2 % 32)) && (opcode->instr == bsefi || opcode->instr == bsifi)) -+ { -+ -+ as_warn (_("Shift value greater than 32. using <value %% 32>")); - immed2 = immed2 % 32; - } -+ else if (immed2 != (immed2 % 64)) -+ { -+ as_warn (_("Shift value greater than 64. using <value %% 64>")); -+ immed2 = immed2 % 64; -+ } - - /* Check combined value. */ -- if (immed + immed2 > 32) -+ if ((immed + immed2 > 32) && (opcode->instr == bsefi || opcode->instr == bsifi)) - as_fatal (_("Width value + shift value must not be greater than 32")); - -+ else if (immed + immed2 > 64) -+ as_fatal (_("Width value + shift value must not be greater than 64")); - inst |= (reg1 << RD_LOW) & RD_MASK; - inst |= (reg2 << RA_LOW) & RA_MASK; -- if (opcode->instr == bsefi) -- inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */ -+ if (opcode->instr == bsefi || opcode->instr == bslefi) -+ inst |= (immed & IMM6_MASK) << IMM_WIDTH_LOW; /* bsefi or bslefi */ - else -- inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */ -- inst |= (immed2 << IMM_LOW) & IMM5_MASK; -+ inst |= ((immed + immed2 - 1) & IMM6_MASK) << IMM_WIDTH_LOW; /* bsifi or bslifi */ -+ inst |= (immed2 << IMM_LOW) & IMM6_MASK; - break; - case INST_TYPE_R1_R2: - if (strcmp (op_end, "")) -@@ -1808,6 +1896,142 @@ md_assemble (char * str) - } - inst |= (immed << IMM_MBAR); - break; -+ /* For 64-bit instructions */ -+ case INST_TYPE_RD_R1_IMML: -+ if (strcmp (op_end, "")) -+ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ -+ else -+ { -+ as_fatal (_("Error in statement syntax")); -+ reg1 = 0; -+ } -+ if (strcmp (op_end, "")) -+ op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ -+ else -+ { -+ as_fatal (_("Error in statement syntax")); -+ reg2 = 0; -+ } -+ if (strcmp (op_end, "")) -+ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); -+ else -+ as_fatal (_("Error in statement syntax")); -+ -+ /* Check for spl registers. */ -+ if (check_spl_reg (& reg1)) -+ as_fatal (_("Cannot use special register with this instruction")); -+ if (check_spl_reg (& reg2)) -+ as_fatal (_("Cannot use special register with this instruction")); -+ -+ if (exp.X_op != O_constant) -+ { -+ char *opc = NULL; -+ relax_substateT subtype; -+ -+ if (exp.X_md != 0) -+ subtype = get_imm_otype(exp.X_md); -+ else -+ subtype = opcode->inst_offset_type; -+ -+ output = frag_var (rs_machine_dependent, -+ isize * 2, /* maxm of 2 words. */ -+ isize * 2, /* minm of 2 words. */ -+ subtype, /* PC-relative or not. */ -+ exp.X_add_symbol, -+ exp.X_add_number, -+ opc); -+ immedl = 0L; -+ } -+ else -+ { -+ output = frag_more (isize); -+ immedl = exp.X_add_number; -+ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } -+ -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (reg2 << RA_LOW) & RA_MASK; -+ inst |= (immedl << IMM_LOW) & IMM_MASK; -+ break; -+ -+ case INST_TYPE_R1_IMML: -+ if (strcmp (op_end, "")) -+ op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ -+ else -+ { -+ as_fatal (_("Error in statement syntax")); -+ reg1 = 0; -+ } -+ if (strcmp (op_end, "")) -+ op_end = parse_imml (op_end + 1, & exp, MIN_IMM, MAX_IMM); -+ else -+ as_fatal (_("Error in statement syntax")); -+ -+ /* Check for spl registers. */ -+ if (check_spl_reg (®1)) -+ as_fatal (_("Cannot use special register with this instruction")); -+ -+ if (exp.X_op != O_constant) -+ { -+ char *opc = NULL; -+ relax_substateT subtype; -+ -+ if (exp.X_md != 0) -+ subtype = get_imm_otype(exp.X_md); -+ else -+ subtype = opcode->inst_offset_type; -+ -+ output = frag_var (rs_machine_dependent, -+ isize * 2, /* maxm of 2 words. */ -+ isize * 2, /* minm of 2 words. */ -+ subtype, /* PC-relative or not. */ -+ exp.X_add_symbol, -+ exp.X_add_number, -+ opc); -+ immedl = 0L; -+ } -+ else -+ { -+ output = frag_more (isize); -+ immedl = exp.X_add_number; -+ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } -+ -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ -+ inst |= (reg1 << RA_LOW) & RA_MASK; -+ inst |= (immedl << IMM_LOW) & IMM_MASK; -+ break; -+ -+ case INST_TYPE_IMML: -+ as_fatal (_("An IMML instruction should not be present in the .s file")); -+ break; - - default: - as_fatal (_("unimplemented opcode \"%s\""), name); -@@ -1918,6 +2142,7 @@ struct option md_longopts[] = - {"EL", no_argument, NULL, OPTION_EL}, - {"mlittle-endian", no_argument, NULL, OPTION_LITTLE}, - {"mbig-endian", no_argument, NULL, OPTION_BIG}, -+ {"m64", no_argument, NULL, OPTION_M64}, - { NULL, no_argument, NULL, 0} - }; - -@@ -2569,6 +2794,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) - return rel; - } - -+/* Called by TARGET_FORMAT. */ -+const char * -+microblaze_target_format (void) -+{ -+ -+ if (microblaze_arch_size == 64) -+ return "elf64-microblazeel"; -+ else -+ return target_big_endian ? "elf32-microblaze" : "elf32-microblazeel"; -+} -+ -+ - int - md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) - { -@@ -2582,6 +2819,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) - case OPTION_LITTLE: - target_big_endian = 0; - break; -+ case OPTION_M64: -+ //if (arg != NULL && strcmp (arg, "64") == 0) -+ microblaze_arch_size = 64; -+ break; - default: - return 0; - } -@@ -2597,6 +2838,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) - fprintf (stream, _(" MicroBlaze specific assembler options:\n")); - fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); - fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); -+ fprintf (stream, " -%-23s%s\n", "m64", N_("generate 64-bit elf")); - } - - -diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h -index ca9dbb8..9d38d2c 100644 ---- a/gas/config/tc-microblaze.h -+++ b/gas/config/tc-microblaze.h -@@ -78,7 +78,9 @@ extern const struct relax_type md_relax_table[]; - - #ifdef OBJ_ELF - --#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel") -+#define TARGET_FORMAT microblaze_target_format() -+extern const char *microblaze_target_format (void); -+//#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel") - - #define ELF_TC_SPECIAL_SECTIONS \ - { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ -diff --git a/include/elf/common.h b/include/elf/common.h -index 996acf9..2f1e5be 100644 ---- a/include/elf/common.h -+++ b/include/elf/common.h -@@ -339,6 +339,7 @@ - #define EM_RISCV 243 /* RISC-V */ - #define EM_LANAI 244 /* Lanai 32-bit processor. */ - #define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */ -+#define EM_MB_64 248 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ - #define EM_NFP 250 /* Netronome Flow Processor. */ - #define EM_CSKY 252 /* C-SKY processor family. */ - -diff --git a/ld/Makefile.am b/ld/Makefile.am -index d7faf19..f7b3b97 100644 ---- a/ld/Makefile.am -+++ b/ld/Makefile.am -@@ -422,6 +422,8 @@ ALL_64_EMULATION_SOURCES = \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ - eelf32mipswindiss.c \ -+ eelf64microblazeel.c \ -+ eelf64microblaze.c \ - eelf64_aix.c \ - eelf64_ia64.c \ - eelf64_ia64_fbsd.c \ -@@ -1702,6 +1704,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \ - $(srcdir)/emulparams/elf_nacl.sh \ - $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} - -+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \ -+ $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} -+ -+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \ -+ $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} -+ - eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} - -diff --git a/ld/Makefile.in b/ld/Makefile.in -index 8b14f52..ffc9a3e 100644 ---- a/ld/Makefile.in -+++ b/ld/Makefile.in -@@ -907,6 +907,8 @@ ALL_64_EMULATION_SOURCES = \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ - eelf32mipswindiss.c \ -+ eelf64microblazeel.c \ -+ eelf64microblaze.c \ - eelf64_aix.c \ - eelf64_ia64.c \ - eelf64_ia64_fbsd.c \ -@@ -1355,6 +1357,8 @@ distclean-compile: - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xc16xs.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xstormy16.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32xtensa.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblazeel.Po@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64microblaze.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_aix.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64.Po@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf64_ia64_fbsd.Po@am__quote@ -@@ -3306,6 +3310,12 @@ eelf32_x86_64_nacl.c: $(srcdir)/emulparams/elf32_x86_64_nacl.sh \ - $(srcdir)/emulparams/elf_nacl.sh \ - $(ELF_X86_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} - -+eelf64microblazeel.c: $(srcdir)/emulparams/elf64microblazeel.sh \ -+ $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} -+ -+eelf64microblaze.c: $(srcdir)/emulparams/elf64microblaze.sh \ -+ $(ELF_DEPS) $(srcdir)/scripttempl/elfmicroblaze.sc ${GEN_DEPENDS} -+ - eelf64_aix.c: $(srcdir)/emulparams/elf64_aix.sh \ - $(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS} - -diff --git a/ld/configure.tgt b/ld/configure.tgt -index 1e37d74..42f106d 100644 ---- a/ld/configure.tgt -+++ b/ld/configure.tgt -@@ -424,6 +424,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" - microblazeel*) targ_emul=elf32microblazeel - targ_extra_emuls=elf32microblaze - ;; -+microblazeel64*) targ_emul=elf64microblazeel -+ targ_extra_emuls=elf64microblaze -+ ;; - microblaze*) targ_emul=elf32microblaze - targ_extra_emuls=elf32microblazeel - ;; -diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh -new file mode 100644 -index 0000000..9c7b0eb ---- /dev/null -+++ b/ld/emulparams/elf64microblaze.sh -@@ -0,0 +1,23 @@ -+SCRIPT_NAME=elfmicroblaze -+OUTPUT_FORMAT="elf64-microblazeel" -+#BIG_OUTPUT_FORMAT="elf64-microblaze" -+LITTLE_OUTPUT_FORMAT="elf64-microblazeel" -+#TEXT_START_ADDR=0 -+NONPAGED_TEXT_START_ADDR=0x28 -+ALIGNMENT=4 -+MAXPAGESIZE=4 -+ARCH=microblaze -+EMBEDDED=yes -+ -+NOP=0x80000000 -+ -+# Hmmm, there's got to be a better way. This sets the stack to the -+# top of the simulator memory (2^19 bytes). -+#PAGE_SIZE=0x1000 -+#DATA_ADDR=0x10000 -+#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' -+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} -+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' -+ -+TEMPLATE_NAME=elf32 -+#GENERATE_SHLIB_SCRIPT=yes -diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh -new file mode 100644 -index 0000000..9c7b0eb ---- /dev/null -+++ b/ld/emulparams/elf64microblazeel.sh -@@ -0,0 +1,23 @@ -+SCRIPT_NAME=elfmicroblaze -+OUTPUT_FORMAT="elf64-microblazeel" -+#BIG_OUTPUT_FORMAT="elf64-microblaze" -+LITTLE_OUTPUT_FORMAT="elf64-microblazeel" -+#TEXT_START_ADDR=0 -+NONPAGED_TEXT_START_ADDR=0x28 -+ALIGNMENT=4 -+MAXPAGESIZE=4 -+ARCH=microblaze -+EMBEDDED=yes -+ -+NOP=0x80000000 -+ -+# Hmmm, there's got to be a better way. This sets the stack to the -+# top of the simulator memory (2^19 bytes). -+#PAGE_SIZE=0x1000 -+#DATA_ADDR=0x10000 -+#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' -+#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} -+#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' -+ -+TEMPLATE_NAME=elf32 -+#GENERATE_SHLIB_SCRIPT=yes -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index f8aaf27..20ea6a8 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -33,6 +33,7 @@ - #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW) - #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW) - #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) -+#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) - #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) - - -@@ -56,11 +57,20 @@ get_field_imm (long instr) - } - - static char * --get_field_imm5 (long instr) -+get_field_imml (long instr) - { - char tmpstr[25]; - -- sprintf (tmpstr, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); -+ sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); -+ return (strdup (tmpstr)); -+} -+ -+static char * -+get_field_imms (long instr) -+{ -+ char tmpstr[25]; -+ -+ sprintf (tmpstr, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); - return (strdup (tmpstr)); - } - -@@ -74,14 +84,14 @@ get_field_imm5_mbar (long instr) - } - - static char * --get_field_imm5width (long instr) -+get_field_immw (long instr) - { - char tmpstr[25]; - - if (instr & 0x00004000) -- sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ -+ sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ - else -- sprintf (tmpstr, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ -+ sprintf (tmpstr, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ - return (strdup (tmpstr)); - } - -@@ -286,9 +296,13 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - } - } - break; -- case INST_TYPE_RD_R1_IMM5: -+ case INST_TYPE_RD_R1_IMML: -+ print_func (stream, "\t%s, %s, %s", get_field_rd (inst), -+ get_field_r1(inst), get_field_imm (inst)); -+ /* TODO: Also print symbol */ -+ case INST_TYPE_RD_R1_IMMS: - print_func (stream, "\t%s, %s, %s", get_field_rd (inst), -- get_field_r1(inst), get_field_imm5 (inst)); -+ get_field_r1(inst), get_field_imms (inst)); - break; - case INST_TYPE_RD_RFSL: - print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst)); -@@ -386,6 +400,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - } - } - break; -+ case INST_TYPE_IMML: -+ print_func (stream, "\t%s", get_field_imml (inst)); -+ /* TODO: Also print symbol */ -+ break; - case INST_TYPE_RD_R2: - print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst)); - break; -@@ -409,9 +427,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - case INST_TYPE_NONE: - break; - /* For bit field insns. */ -- case INST_TYPE_RD_R1_IMM5_IMM5: -- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst),get_field_r1(inst),get_field_imm5width (inst), get_field_imm5 (inst)); -- break; -+ case INST_TYPE_RD_R1_IMMW_IMMS: -+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (inst), get_field_r1(inst), -+ get_field_immw (inst), get_field_imms (inst)); -+ break; - /* For tuqula instruction */ - case INST_TYPE_RD: - print_func (stream, "\t%s", get_field_rd (inst)); -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index ce8ac35..985834b 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -40,7 +40,7 @@ - #define INST_TYPE_RD_SPECIAL 11 - #define INST_TYPE_R1 12 - /* New instn type for barrel shift imms. */ --#define INST_TYPE_RD_R1_IMM5 13 -+#define INST_TYPE_RD_R1_IMMS 13 - #define INST_TYPE_RD_RFSL 14 - #define INST_TYPE_R1_RFSL 15 - -@@ -60,7 +60,13 @@ - #define INST_TYPE_IMM5 20 - - /* For bsefi and bsifi */ --#define INST_TYPE_RD_R1_IMM5_IMM5 21 -+#define INST_TYPE_RD_R1_IMMW_IMMS 21 -+ -+/* For 64-bit instructions */ -+#define INST_TYPE_IMML 22 -+#define INST_TYPE_RD_R1_IMML 23 -+#define INST_TYPE_R1_IMML 24 -+#define INST_TYPE_RD_R1_IMMW_IMMS 21 - - #define INST_TYPE_NONE 25 - -@@ -91,13 +97,14 @@ - #define OPCODE_MASK_H24 0xFC1F07FF /* High 6, bits 20-16 and low 11 bits. */ - #define OPCODE_MASK_H124 0xFFFF07FF /* High 16, and low 11 bits. */ - #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits. */ --#define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ --#define OPCODE_MASK_H3B 0xFC00C600 /* High 6 bits and bits 16, 17, 21, 22. */ -+#define OPCODE_MASK_H3 0xFC000700 /* High 6 bits and bits 21, 22, 23. */ -+#define OPCODE_MASK_H3B 0xFC00E600 /* High 6 bits and bits 16, 17, 18, 21, 22. */ - #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ --#define OPCODE_MASK_H32B 0xFC00C000 /* High 6 bits and bit 16, 17. */ -+#define OPCODE_MASK_H32B 0xFC00E000 /* High 6 bits and bit 16, 17, 18. */ - #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ - #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ - #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ -+#define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ - - /* New Mask for msrset, msrclr insns. */ - #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ -@@ -107,7 +114,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 301 -+#define MAX_OPCODES 412 - - struct op_code_struct - { -@@ -125,6 +132,7 @@ struct op_code_struct - /* More info about output format here. */ - } opcodes[MAX_OPCODES] = - { -+ /* 32-bit instructions */ - {"add", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst }, - {"rsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst }, - {"addc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst }, -@@ -161,11 +169,11 @@ struct op_code_struct - {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst }, - {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst }, - {"muli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst }, -- {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst }, -- {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst }, -- {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst }, -- {"bsefi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, -- {"bsifi", INST_TYPE_RD_R1_IMM5_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, -+ {"bslli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst }, -+ {"bsrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst }, -+ {"bsrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst }, -+ {"bsefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, -+ {"bsifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, - {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, - {"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst }, - {"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst }, -@@ -425,6 +433,129 @@ struct op_code_struct - {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */ - {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, - {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, -+ -+ /* 64-bit instructions */ -+ {"addl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000100, OPCODE_MASK_H4, addl, arithmetic_inst }, -+ {"rsubl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000100, OPCODE_MASK_H4, rsubl, arithmetic_inst }, -+ {"addlc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000100, OPCODE_MASK_H4, addlc, arithmetic_inst }, -+ {"rsublc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000100, OPCODE_MASK_H4, rsublc, arithmetic_inst }, -+ {"addlk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000100, OPCODE_MASK_H4, addlk, arithmetic_inst }, -+ {"rsublk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000100, OPCODE_MASK_H4, rsublk, arithmetic_inst }, -+ {"addlkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000100, OPCODE_MASK_H4, addlkc, arithmetic_inst }, -+ {"rsublkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000100, OPCODE_MASK_H4, rsublkc, arithmetic_inst }, -+ {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, -+ {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, -+ {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, -+ {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, -+ {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, -+ {"bslrl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000100, OPCODE_MASK_H3, bslrl, barrel_shift_inst }, -+ {"bsllli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002400, OPCODE_MASK_H3B, bsllli, barrel_shift_inst }, -+ {"bslrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002200, OPCODE_MASK_H3B, bslrai, barrel_shift_inst }, -+ {"bslrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002000, OPCODE_MASK_H3B, bslrli, barrel_shift_inst }, -+ {"bslefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64006000, OPCODE_MASK_H32B, bslefi, barrel_shift_inst }, -+ {"bslifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6400a000, OPCODE_MASK_H32B, bslifi, barrel_shift_inst }, -+ {"orl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000100, OPCODE_MASK_H4, orl, logical_inst }, -+ {"andl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000100, OPCODE_MASK_H4, andl, logical_inst }, -+ {"xorl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000100, OPCODE_MASK_H4, xorl, logical_inst }, -+ {"andnl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000100, OPCODE_MASK_H4, andnl, logical_inst }, -+ {"pcmplbf", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000500, OPCODE_MASK_H4, pcmplbf, logical_inst }, -+ {"pcmpleq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000500, OPCODE_MASK_H4, pcmpleq, logical_inst }, -+ {"pcmplne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000500, OPCODE_MASK_H4, pcmplne, logical_inst }, -+ {"srla", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000101, OPCODE_MASK_H34, srla, logical_inst }, -+ {"srlc", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000121, OPCODE_MASK_H34, srlc, logical_inst }, -+ {"srll", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000141, OPCODE_MASK_H34, srll, logical_inst }, -+ {"sextl8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000160, OPCODE_MASK_H34, sextl8, logical_inst }, -+ {"sextl16", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000161, OPCODE_MASK_H34, sextl16, logical_inst }, -+ {"sextl32", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000162, OPCODE_MASK_H34, sextl32, logical_inst }, -+ {"brea", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98010000, OPCODE_MASK_H124, brea, branch_inst }, -+ {"bread", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98110000, OPCODE_MASK_H124, bread, branch_inst }, -+ {"breald", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98150000, OPCODE_MASK_H24, breald, branch_inst }, -+ {"beaeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000000, OPCODE_MASK_H14, beaeq, branch_inst }, -+ {"bealeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000100, OPCODE_MASK_H14, bealeq, branch_inst }, -+ {"beaeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000000, OPCODE_MASK_H14, beaeqd, branch_inst }, -+ {"bealeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000100, OPCODE_MASK_H14, bealeqd, branch_inst }, -+ {"beane", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200000, OPCODE_MASK_H14, beane, branch_inst }, -+ {"bealne", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200100, OPCODE_MASK_H14, bealne, branch_inst }, -+ {"beaned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200000, OPCODE_MASK_H14, beaned, branch_inst }, -+ {"bealned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200100, OPCODE_MASK_H14, bealned, branch_inst }, -+ {"bealt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400000, OPCODE_MASK_H14, bealt, branch_inst }, -+ {"beallt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400100, OPCODE_MASK_H14, beallt, branch_inst }, -+ {"bealtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400000, OPCODE_MASK_H14, bealtd, branch_inst }, -+ {"bealltd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400100, OPCODE_MASK_H14, bealltd, branch_inst }, -+ {"beale", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600000, OPCODE_MASK_H14, beale, branch_inst }, -+ {"bealle", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600100, OPCODE_MASK_H14, bealle, branch_inst }, -+ {"bealed", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600000, OPCODE_MASK_H14, bealed, branch_inst }, -+ {"bealled", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600100, OPCODE_MASK_H14, bealled, branch_inst }, -+ {"beagt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800000, OPCODE_MASK_H14, beagt, branch_inst }, -+ {"bealgt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800100, OPCODE_MASK_H14, bealgt, branch_inst }, -+ {"beagtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800000, OPCODE_MASK_H14, beagtd, branch_inst }, -+ {"bealgtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800100, OPCODE_MASK_H14, bealgtd, branch_inst }, -+ {"beage", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00000, OPCODE_MASK_H14, beage, branch_inst }, -+ {"bealge", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00100, OPCODE_MASK_H14, bealge, branch_inst }, -+ {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, -+ {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, -+ {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, -+ {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, -+ {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, -+ {"brealid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8150000, OPCODE_MASK_H2, brealid, branch_inst }, -+ {"beaeqi", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, beaeqi, branch_inst }, -+ {"bealeqi", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqi */ -+ {"beaeqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, beaeqid, branch_inst }, -+ {"bealeqid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqid */ -+ {"beanei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, beanei, branch_inst }, -+ {"bealnei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beanei */ -+ {"beaneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, beaneid, branch_inst }, -+ {"bealneid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaneid */ -+ {"bealti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, bealti, branch_inst }, -+ {"beallti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealti */ -+ {"bealtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, bealtid, branch_inst }, -+ {"bealltid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealtid */ -+ {"bealei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, bealei, branch_inst }, -+ {"beallei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealei */ -+ {"bealeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, bealeid, branch_inst }, -+ {"bealleid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealeid */ -+ {"beagti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, beagti, branch_inst }, -+ {"bealgti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagti */ -+ {"beagtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, beagtid, branch_inst }, -+ {"bealgtid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagtid */ -+ {"beagei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, beagei, branch_inst }, -+ {"bealgei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagei */ -+ {"beageid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, beageid, branch_inst }, -+ {"bealgeid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beageid */ -+ {"ll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000100, OPCODE_MASK_H4, ll, memory_load_inst }, -+ {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, -+ {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, -+ {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, -+ {"lli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ -+ {"sli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ -+ {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ -+ {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, -+ {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, -+ {"dmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000500, OPCODE_MASK_H4, dmul, arithmetic_inst }, -+ {"ddiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000580, OPCODE_MASK_H4, ddiv, arithmetic_inst }, -+ {"dcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000610, OPCODE_MASK_H4, dcmp_lt, arithmetic_inst }, -+ {"dcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000620, OPCODE_MASK_H4, dcmp_eq, arithmetic_inst }, -+ {"dcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000630, OPCODE_MASK_H4, dcmp_le, arithmetic_inst }, -+ {"dcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000640, OPCODE_MASK_H4, dcmp_gt, arithmetic_inst }, -+ {"dcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000650, OPCODE_MASK_H4, dcmp_ne, arithmetic_inst }, -+ {"dcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000660, OPCODE_MASK_H4, dcmp_ge, arithmetic_inst }, -+ {"dcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000600, OPCODE_MASK_H4, dcmp_un, arithmetic_inst }, -+ {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst }, -+ {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst }, -+ {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst }, -+ - {"", 0, 0, 0, 0, 0, 0, 0, 0}, - }; - -@@ -445,8 +576,17 @@ char pvr_register_prefix[] = "rpvr"; - #define MIN_IMM5 ((int) 0x00000000) - #define MAX_IMM5 ((int) 0x0000001f) - -+#define MIN_IMM6 ((int) 0x00000000) -+#define MAX_IMM6 ((int) 0x0000003f) -+ - #define MIN_IMM_WIDTH ((int) 0x00000001) - #define MAX_IMM_WIDTH ((int) 0x00000020) - -+#define MIN_IMM6_WIDTH ((int) 0x00000001) -+#define MAX_IMM6_WIDTH ((int) 0x00000040) -+ -+#define MIN_IMML ((long) 0xffffff8000000000L) -+#define MAX_IMML ((long) 0x0000007fffffffffL) -+ - #endif /* MICROBLAZE_OPC */ - -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 2866269..076dbcd 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -25,6 +25,7 @@ - - enum microblaze_instr - { -+ /* 32-bit instructions */ - add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu, - addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, - mulh, mulhu, mulhsu,swapb,swaph, -@@ -58,6 +59,18 @@ enum microblaze_instr - aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd, - eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd, - eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, -+ -+ /* 64-bit instructions */ -+ addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, -+ bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, -+ andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, -+ brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, -+ bealned, bealt, beallt, bealtd, bealltd, beale, bealle, bealed, bealled, beagt, -+ bealgt, beagtd, bealgtd, beage, bealge, beaged, bealged, breai, breaid, brealid, -+ beaeqi, beaeqid, beanei, beaneid, bealti, bealtid, bealei, bealeid, beagti, -+ beagtid, beagei, beageid, imml, ll, llr, sl, slr, -+ dadd, drsub, dmul, ddiv, dcmp_lt, dcmp_eq, dcmp_le, dcmp_gt, dcmp_ne, dcmp_ge, -+ dcmp_un, dbl, dlong, dsqrt, - invalid_inst - }; - -@@ -135,15 +148,18 @@ enum microblaze_instr_type - #define RA_MASK 0x001F0000 - #define RB_MASK 0x0000F800 - #define IMM_MASK 0x0000FFFF -+#define IMML_MASK 0x00FFFFFF - --/* Imm mask for barrel shifts. */ -+/* Imm masks for barrel shifts. */ - #define IMM5_MASK 0x0000001F -+#define IMM6_MASK 0x0000003F - - /* Imm mask for mbar. */ - #define IMM5_MBAR_MASK 0x03E00000 - --/* Imm mask for extract/insert width. */ -+/* Imm masks for extract/insert width. */ - #define IMM5_WIDTH_MASK 0x000007C0 -+#define IMM6_WIDTH_MASK 0x00000FC0 - - /* FSL imm mask for get, put instructions. */ - #define RFSL_MASK 0x000000F diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0016-MB-X-initial-commit.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0016-MB-X-initial-commit.patch deleted file mode 100644 index 406d7bf2c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0016-MB-X-initial-commit.patch +++ /dev/null @@ -1,692 +0,0 @@ -From 549bf1fafb7dfa2718e172a94ff68acb14320ed8 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Sun, 30 Sep 2018 16:31:26 +0530 -Subject: [PATCH] MB-X initial commit code cleanup is needed. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/bfd-in2.h | 10 +++ - bfd/elf32-microblaze.c | 65 +++++++++++++++++-- - bfd/elf64-microblaze.c | 61 +++++++++++++++++- - bfd/libbfd.h | 2 + - bfd/reloc.c | 12 ++++ - gas/config/tc-microblaze.c | 152 +++++++++++++++++++++++++++++++++++++-------- - include/elf/microblaze.h | 2 + - opcodes/microblaze-opc.h | 4 +- - opcodes/microblaze-opcm.h | 4 +- - 9 files changed, 277 insertions(+), 35 deletions(-) - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index fe6933a..90645d1 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5878,11 +5878,21 @@ done here - only used for relaxing */ - BFD_RELOC_MICROBLAZE_64_NONE, - - /* This is a 64 bit reloc that stores the 32 bit pc relative -+ * +value in two words (with an imml instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - PC-relative GOT offset */ - BFD_RELOC_MICROBLAZE_64_GOTPC, - - /* This is a 64 bit reloc that stores the 32 bit pc relative -+value in two words (with an imml instruction). The relocation is -+PC-relative GOT offset */ -+ BFD_RELOC_MICROBLAZE_64_GPC, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - GOT offset */ - BFD_RELOC_MICROBLAZE_64_GOT, -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index d001437..035e71f 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -116,6 +116,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - TRUE), /* PC relative offset? */ - -+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_IMML_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ - /* A 64 bit relocation. Table entry not really used. */ - HOWTO (R_MICROBLAZE_64, /* Type. */ - 0, /* Rightshift. */ -@@ -280,6 +294,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - TRUE), /* PC relative offset? */ - -+ /* A 64 bit GOTPC relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_GPC_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ - /* A 64 bit GOT relocation. Table-entry not really used. */ - HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ - 0, /* Rightshift. */ -@@ -619,9 +648,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_VTABLE_ENTRY: - microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; - break; -+ case BFD_RELOC_MICROBLAZE_64: -+ microblaze_reloc = R_MICROBLAZE_IMML_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOTPC: - microblaze_reloc = R_MICROBLAZE_GOTPC_64; - break; -+ case BFD_RELOC_MICROBLAZE_64_GPC: -+ microblaze_reloc = R_MICROBLAZE_GPC_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOT: - microblaze_reloc = R_MICROBLAZE_GOT_64; - break; -@@ -1467,7 +1502,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) - { - relocation += addend; -- if (r_type == R_MICROBLAZE_32) -+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) - bfd_put_32 (input_bfd, relocation, contents + offset); - else - { -@@ -1933,6 +1968,28 @@ microblaze_elf_relax_section (bfd *abfd, - irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); - } - break; -+ case R_MICROBLAZE_IMML_64: -+ { -+ /* This was a PC-relative instruction that was -+ completely resolved. */ -+ int sfix, efix; -+ unsigned int val; -+ bfd_vma target_address; -+ target_address = irel->r_addend + irel->r_offset; -+ sfix = calc_fixup (irel->r_offset, 0, sec); -+ efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } -+ irel->r_addend -= (efix - sfix); -+ /* Should use HOWTO. */ -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); -+ } -+ break; - case R_MICROBLAZE_NONE: - case R_MICROBLAZE_32_NONE: - { -@@ -2037,9 +2094,9 @@ microblaze_elf_relax_section (bfd *abfd, - microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, - irelscan->r_addend); - } -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) -- { -- isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) -+ { -+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); - - /* Look at the reloc only if the value has been resolved. */ - if (isym->st_shndx == shndx -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 0f43ae6..56a45f2 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -117,6 +117,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - TRUE), /* PC relative offset? */ - - /* A 64 bit relocation. Table entry not really used. */ -+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 4, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 64, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_IMML_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ -+ /* A 64 bit relocation. Table entry not really used. */ - HOWTO (R_MICROBLAZE_64, /* Type. */ - 0, /* Rightshift. */ - 2, /* Size (0 = byte, 1 = short, 2 = long). */ -@@ -265,6 +280,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - TRUE), /* PC relative offset? */ - -+ /* A 64 bit GOTPC relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_GPC_64", /* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ TRUE), /* PC relative offset? */ -+ - /* A 64 bit GOT relocation. Table-entry not really used. */ - HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ - 0, /* Rightshift. */ -@@ -589,9 +619,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_VTABLE_ENTRY: - microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; - break; -+ case BFD_RELOC_MICROBLAZE_64: -+ microblaze_reloc = R_MICROBLAZE_IMML_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOTPC: - microblaze_reloc = R_MICROBLAZE_GOTPC_64; - break; -+ case BFD_RELOC_MICROBLAZE_64_GPC: -+ microblaze_reloc = R_MICROBLAZE_GPC_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOT: - microblaze_reloc = R_MICROBLAZE_GOT_64; - break; -@@ -1161,6 +1197,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - break; /* Do nothing. */ - - case (int) R_MICROBLAZE_GOTPC_64: -+ case (int) R_MICROBLAZE_GPC_64: - relocation = htab->sgotplt->output_section->vma - + htab->sgotplt->output_offset; - relocation -= (input_section->output_section->vma -@@ -1431,7 +1468,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) - { - relocation += addend; -- if (r_type == R_MICROBLAZE_32) -+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) - bfd_put_32 (input_bfd, relocation, contents + offset); - else - { -@@ -1876,6 +1913,28 @@ microblaze_elf_relax_section (bfd *abfd, - irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); - } - break; -+ case R_MICROBLAZE_IMML_64: -+ { -+ /* This was a PC-relative instruction that was -+ completely resolved. */ -+ int sfix, efix; -+ unsigned int val; -+ bfd_vma target_address; -+ target_address = irel->r_addend + irel->r_offset; -+ sfix = calc_fixup (irel->r_offset, 0, sec); -+ efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } -+ irel->r_addend -= (efix - sfix); -+ /* Should use HOWTO. */ -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); -+ } -+ break; - case R_MICROBLAZE_NONE: - case R_MICROBLAZE_32_NONE: - { -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index feb9fad..450653f 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2903,7 +2903,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", - "BFD_RELOC_MICROBLAZE_32_NONE", - "BFD_RELOC_MICROBLAZE_64_NONE", -+ "BFD_RELOC_MICROBLAZE_64", - "BFD_RELOC_MICROBLAZE_64_GOTPC", -+ "BFD_RELOC_MICROBLAZE_64_GPC", - "BFD_RELOC_MICROBLAZE_64_GOT", - "BFD_RELOC_MICROBLAZE_64_PLT", - "BFD_RELOC_MICROBLAZE_64_GOTOFF", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index 87753ae..ccf29f5 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6804,6 +6804,12 @@ ENUMDOC - ENUM - BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing -+ENUM -+ BFD_RELOC_MICROBLAZE_64 -+ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). No relocation is - done here - only used for relaxing -@@ -6811,6 +6817,12 @@ ENUM - BFD_RELOC_MICROBLAZE_64_GOTPC - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing -+ENUM -+ BFD_RELOC_MICROBLAZE_64_GPC -+ENUMDOC -+ This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - PC-relative GOT offset - ENUM -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index c794347..3f90b7c 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -94,6 +94,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; - #define TLSTPREL_OFFSET 16 - #define TEXT_OFFSET 17 - #define TEXT_PC_OFFSET 18 -+#define DEFINED_64_OFFSET 19 - - /* Initialize the relax table. */ - const relax_typeS md_relax_table[] = -@@ -117,6 +118,8 @@ const relax_typeS md_relax_table[] = - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ -+// { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ -+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */ - }; - - static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ -@@ -396,7 +399,8 @@ const pseudo_typeS md_pseudo_table[] = - {"data32", cons, 4}, /* Same as word. */ - {"ent", s_func, 0}, /* Treat ent as function entry point. */ - {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ -- {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ -+ {"gpword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ -+ {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ - {"weakext", microblaze_s_weakext, 0}, - {"rodata", microblaze_s_rdata, 0}, - {"sdata2", microblaze_s_rdata, 1}, -@@ -405,6 +409,7 @@ const pseudo_typeS md_pseudo_table[] = - {"sbss", microblaze_s_bss, 1}, - {"text", microblaze_s_text, 0}, - {"word", cons, 4}, -+ {"dword", cons, 8}, - {"frame", s_ignore, 0}, - {"mask", s_ignore, 0}, /* Emitted by gcc. */ - {NULL, NULL, 0} -@@ -898,7 +903,7 @@ check_got (int * got_type, int * got_len) - extern bfd_reloc_code_real_type - parse_cons_expression_microblaze (expressionS *exp, int size) - { -- if (size == 4) -+ if (size == 4 || (microblaze_arch_size == 64 && size == 8)) - { - /* Handle @GOTOFF et.al. */ - char *save, *gotfree_copy; -@@ -930,6 +935,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) - - static const char * str_microblaze_ro_anchor = "RO"; - static const char * str_microblaze_rw_anchor = "RW"; -+static const char * str_microblaze_64 = "64"; - - static bfd_boolean - check_spl_reg (unsigned * reg) -@@ -1174,6 +1180,33 @@ md_assemble (char * str) - inst |= (immed << IMM_LOW) & IMM_MASK; - } - } -+#if 0 //revisit -+ else if (streq (name, "lli") || streq (name, "sli")) -+ { -+ temp = immed & 0xFFFFFFFFFFFF8000; -+ if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) -+ { -+ /* Needs an immediate inst. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } -+ -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (reg2 << RA_LOW) & RA_MASK; -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } -+#endif - else - { - temp = immed & 0xFFFF8000; -@@ -1926,6 +1959,7 @@ md_assemble (char * str) - if (exp.X_op != O_constant) - { - char *opc = NULL; -+ //char *opc = str_microblaze_64; - relax_substateT subtype; - - if (exp.X_md != 0) -@@ -1939,7 +1973,7 @@ md_assemble (char * str) - subtype, /* PC-relative or not. */ - exp.X_add_symbol, - exp.X_add_number, -- opc); -+ (char *) opc); - immedl = 0L; - } - else -@@ -1977,7 +2011,7 @@ md_assemble (char * str) - reg1 = 0; - } - if (strcmp (op_end, "")) -- op_end = parse_imml (op_end + 1, & exp, MIN_IMM, MAX_IMM); -+ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); - else - as_fatal (_("Error in statement syntax")); - -@@ -1987,7 +2021,8 @@ md_assemble (char * str) - - if (exp.X_op != O_constant) - { -- char *opc = NULL; -+ //char *opc = NULL; -+ char *opc = str_microblaze_64; - relax_substateT subtype; - - if (exp.X_md != 0) -@@ -2001,14 +2036,13 @@ md_assemble (char * str) - subtype, /* PC-relative or not. */ - exp.X_add_symbol, - exp.X_add_number, -- opc); -+ (char *) opc); - immedl = 0L; - } - else - { - output = frag_more (isize); - immedl = exp.X_add_number; -- - opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); - if (opcode1 == NULL) - { -@@ -2187,13 +2221,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, - fragP->fr_fix += INST_WORD_SIZE * 2; - fragP->fr_var = 0; - break; -+ case DEFINED_64_OFFSET: -+ if (fragP->fr_symbol == GOT_symbol) -+ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, -+ fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GPC); -+ else -+ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, -+ fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64); -+ fragP->fr_fix += INST_WORD_SIZE * 2; -+ fragP->fr_var = 0; -+ break; - case DEFINED_ABS_SEGMENT: - if (fragP->fr_symbol == GOT_symbol) - fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, - fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC); - else - fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, -- fragP->fr_offset, FALSE, BFD_RELOC_64); -+ fragP->fr_offset, TRUE, BFD_RELOC_64); - fragP->fr_fix += INST_WORD_SIZE * 2; - fragP->fr_var = 0; - break; -@@ -2416,22 +2460,38 @@ md_apply_fix (fixS * fixP, - case BFD_RELOC_64_PCREL: - case BFD_RELOC_64: - case BFD_RELOC_MICROBLAZE_64_TEXTREL: -+ case BFD_RELOC_MICROBLAZE_64: - /* Add an imm instruction. First save the current instruction. */ - for (i = 0; i < INST_WORD_SIZE; i++) - buf[i + INST_WORD_SIZE] = buf[i]; -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) -+ { -+ /* Generate the imm instruction. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } - -- /* Generate the imm instruction. */ -- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -- if (opcode1 == NULL) -- { -- as_bad (_("unknown opcode \"%s\""), "imm"); -- return; -- } -- -- inst1 = opcode1->bit_sequence; -- if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) -- inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; -- -+ inst1 = opcode1->bit_sequence; -+ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) -+ inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ } -+ else -+ { -+ /* Generate the imm instruction. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imm"); -+ return; -+ } -+ -+ inst1 = opcode1->bit_sequence; -+ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) -+ inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; -+ } - buf[0] = INST_BYTE0 (inst1); - buf[1] = INST_BYTE1 (inst1); - buf[2] = INST_BYTE2 (inst1); -@@ -2460,6 +2520,7 @@ md_apply_fix (fixS * fixP, - /* Fall through. */ - - case BFD_RELOC_MICROBLAZE_64_GOTPC: -+ case BFD_RELOC_MICROBLAZE_64_GPC: - case BFD_RELOC_MICROBLAZE_64_GOT: - case BFD_RELOC_MICROBLAZE_64_PLT: - case BFD_RELOC_MICROBLAZE_64_GOTOFF: -@@ -2467,12 +2528,16 @@ md_apply_fix (fixS * fixP, - /* Add an imm instruction. First save the current instruction. */ - for (i = 0; i < INST_WORD_SIZE; i++) - buf[i + INST_WORD_SIZE] = buf[i]; -- -- /* Generate the imm instruction. */ -- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ else -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); - if (opcode1 == NULL) - { -- as_bad (_("unknown opcode \"%s\""), "imm"); -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ else -+ as_bad (_("unknown opcode \"%s\""), "imm"); - return; - } - -@@ -2496,6 +2561,8 @@ md_apply_fix (fixS * fixP, - moves code around due to relaxing. */ - if (fixP->fx_r_type == BFD_RELOC_64_PCREL) - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) -+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; - else if (fixP->fx_r_type == BFD_RELOC_32) - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; - else -@@ -2539,6 +2606,32 @@ md_estimate_size_before_relax (fragS * fragP, - as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); - abort (); - } -+ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type -+ && !S_IS_WEAK (fragP->fr_symbol)) -+ { -+ if (fragP->fr_opcode != NULL) { -+ if(streq (fragP->fr_opcode, str_microblaze_64)) -+ { -+ /* Used as an absolute value. */ -+ fragP->fr_subtype = DEFINED_64_OFFSET; -+ /* Variable part does not change. */ -+ fragP->fr_var = INST_WORD_SIZE; -+ } -+ else -+ { -+ fragP->fr_subtype = DEFINED_PC_OFFSET; -+ /* Don't know now whether we need an imm instruction. */ -+ fragP->fr_var = INST_WORD_SIZE; -+ } -+ } -+ else -+ { -+ fragP->fr_subtype = DEFINED_PC_OFFSET; -+ /* Don't know now whether we need an imm instruction. */ -+ fragP->fr_var = INST_WORD_SIZE; -+ } -+ } -+ #if 0 - else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && - !S_IS_WEAK (fragP->fr_symbol)) - { -@@ -2546,6 +2639,7 @@ md_estimate_size_before_relax (fragS * fragP, - /* Don't know now whether we need an imm instruction. */ - fragP->fr_var = INST_WORD_SIZE; - } -+#endif - else if (S_IS_DEFINED (fragP->fr_symbol) - && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) - { -@@ -2648,6 +2742,7 @@ md_estimate_size_before_relax (fragS * fragP, - case TLSLD_OFFSET: - case TLSTPREL_OFFSET: - case TLSDTPREL_OFFSET: -+ case DEFINED_64_OFFSET: - fragP->fr_var = INST_WORD_SIZE*2; - break; - case DEFINED_RO_SEGMENT: -@@ -2701,7 +2796,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) - else - { - /* The case where we are going to resolve things... */ -- if (fixp->fx_r_type == BFD_RELOC_64_PCREL) -+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) - return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; - else - return fixp->fx_where + fixp->fx_frag->fr_address; -@@ -2734,6 +2829,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) - case BFD_RELOC_MICROBLAZE_32_RWSDA: - case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: - case BFD_RELOC_MICROBLAZE_64_GOTPC: -+ case BFD_RELOC_MICROBLAZE_64_GPC: -+ case BFD_RELOC_MICROBLAZE_64: - case BFD_RELOC_MICROBLAZE_64_GOT: - case BFD_RELOC_MICROBLAZE_64_PLT: - case BFD_RELOC_MICROBLAZE_64_GOTOFF: -@@ -2876,7 +2973,10 @@ cons_fix_new_microblaze (fragS * frag, - r = BFD_RELOC_32; - break; - case 8: -- r = BFD_RELOC_64; -+ if (microblaze_arch_size == 64) -+ r = BFD_RELOC_32; -+ else -+ r = BFD_RELOC_64; - break; - default: - as_bad (_("unsupported BFD relocation size %u"), size); -diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index 6ee0966..16b2736 100644 ---- a/include/elf/microblaze.h -+++ b/include/elf/microblaze.h -@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ - RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) -+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) -+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ - - END_RELOC_NUMBERS (R_MICROBLAZE_max) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 985834b..9b6264b 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -538,8 +538,8 @@ struct op_code_struct - {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, - {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, - {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, -- {"lli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ -- {"sli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ -+ {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ -+ {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ - {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ - {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, - {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 076dbcd..5f2e190 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -40,8 +40,8 @@ enum microblaze_instr - imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, - brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, - bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, -- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, -- sbi, shi, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, -+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, -+ sbi, shi, sli, swi, msrset, msrclr, tuqula, fadd, frsub, fmul, fdiv, - fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - fint, fsqrt, - tget, tcget, tnget, tncget, tput, tcput, tnput, tncput, diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch deleted file mode 100644 index 062ee364c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0017-Patch-Microblaze-negl-instruction-is-overriding-rsub.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 3735a1bb6174f15bde23dd2767675b49c9e8712f Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 11 Sep 2018 13:48:33 +0530 -Subject: [PATCH] negl instruction is overriding rsubl,fixed it by changing the - instruction order... - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - opcodes/microblaze-opc.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 9b6264b..824afc0 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -275,9 +275,7 @@ struct op_code_struct - {"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */ - {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */ - {"not", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1. */ -- {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ - {"rtb", INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4. */ -- {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ - {"lmi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, - {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, - {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst }, -@@ -555,6 +553,8 @@ struct op_code_struct - {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst }, - {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst }, - {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst }, -+ {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ -+ {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ - - {"", 0, 0, 0, 0, 0, 0, 0, 0}, - }; diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0018-Added-relocations-for-MB-X.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0018-Added-relocations-for-MB-X.patch deleted file mode 100644 index b98db228d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0018-Added-relocations-for-MB-X.patch +++ /dev/null @@ -1,348 +0,0 @@ -From 6b6c4a67212ced3fe1593fb173cfc4bce8d7f922 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 11 Sep 2018 17:30:17 +0530 -Subject: [PATCH] Added relocations for MB-X - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/bfd-in2.h | 11 ++++-- - bfd/libbfd.h | 4 +-- - bfd/reloc.c | 26 +++++++------- - gas/config/tc-microblaze.c | 90 ++++++++++++++++++++-------------------------- - 4 files changed, 62 insertions(+), 69 deletions(-) - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 90645d1..f74aac1 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5873,16 +5873,21 @@ done here - only used for relaxing */ - BFD_RELOC_MICROBLAZE_32_NONE, - - /* This is a 64 bit reloc that stores the 32 bit pc relative -- * +value in two words (with an imm instruction). No relocation is -+ * +value in two words (with an imml instruction). No relocation is - * +done here - only used for relaxing */ -- BFD_RELOC_MICROBLAZE_64_NONE, -+ BFD_RELOC_MICROBLAZE_64_PCREL, - --/* This is a 64 bit reloc that stores the 32 bit pc relative -+/* This is a 64 bit reloc that stores the 32 bit relative - * +value in two words (with an imml instruction). No relocation is - * +done here - only used for relaxing */ - BFD_RELOC_MICROBLAZE_64, - - /* This is a 64 bit reloc that stores the 32 bit pc relative -+ * +value in two words (with an imm instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64_NONE, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - PC-relative GOT offset */ - BFD_RELOC_MICROBLAZE_64_GOTPC, -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 450653f..d87a183 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2903,14 +2903,14 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", - "BFD_RELOC_MICROBLAZE_32_NONE", - "BFD_RELOC_MICROBLAZE_64_NONE", -- "BFD_RELOC_MICROBLAZE_64", - "BFD_RELOC_MICROBLAZE_64_GOTPC", -- "BFD_RELOC_MICROBLAZE_64_GPC", - "BFD_RELOC_MICROBLAZE_64_GOT", - "BFD_RELOC_MICROBLAZE_64_PLT", - "BFD_RELOC_MICROBLAZE_64_GOTOFF", - "BFD_RELOC_MICROBLAZE_32_GOTOFF", - "BFD_RELOC_MICROBLAZE_COPY", -+ "BFD_RELOC_MICROBLAZE_64", -+ "BFD_RELOC_MICROBLAZE_64_PCREL", - "BFD_RELOC_MICROBLAZE_64_TLS", - "BFD_RELOC_MICROBLAZE_64_TLSGD", - "BFD_RELOC_MICROBLAZE_64_TLSLD", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index ccf29f5..861f2d4 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6804,12 +6804,6 @@ ENUMDOC - ENUM - BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC -- This is a 32 bit reloc that stores the 32 bit pc relative -- value in two words (with an imml instruction). No relocation is -- done here - only used for relaxing --ENUM -- BFD_RELOC_MICROBLAZE_64 --ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). No relocation is - done here - only used for relaxing -@@ -6817,12 +6811,6 @@ ENUM - BFD_RELOC_MICROBLAZE_64_GOTPC - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative -- value in two words (with an imml instruction). No relocation is -- done here - only used for relaxing --ENUM -- BFD_RELOC_MICROBLAZE_64_GPC --ENUMDOC -- This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - PC-relative GOT offset - ENUM -@@ -6906,6 +6894,20 @@ ENUMDOC - value in two words (with an imm instruction). The relocation is - relative offset from start of TEXT. - -+ This is a 64 bit reloc that stores 64-bit thread pointer relative offset -+ to two words (uses imml instruction). -+ENUM -+BFD_RELOC_MICROBLAZE_64, -+ENUMDOC -+ This is a 64 bit reloc that stores the 64 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing -+ENUM -+BFD_RELOC_MICROBLAZE_64_PCREL, -+ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing - ENUM - BFD_RELOC_AARCH64_RELOC_START - ENUMDOC -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 3f90b7c..587a4d5 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -95,6 +95,7 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; - #define TEXT_OFFSET 17 - #define TEXT_PC_OFFSET 18 - #define DEFINED_64_OFFSET 19 -+#define DEFINED_64_PC_OFFSET 20 - - /* Initialize the relax table. */ - const relax_typeS md_relax_table[] = -@@ -119,7 +120,8 @@ const relax_typeS md_relax_table[] = - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ - // { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ -- { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 17: DEFINED_64_OFFSET. */ -+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ -+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ - }; - - static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ -@@ -1180,33 +1182,6 @@ md_assemble (char * str) - inst |= (immed << IMM_LOW) & IMM_MASK; - } - } --#if 0 //revisit -- else if (streq (name, "lli") || streq (name, "sli")) -- { -- temp = immed & 0xFFFFFFFFFFFF8000; -- if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) -- { -- /* Needs an immediate inst. */ -- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -- if (opcode1 == NULL) -- { -- as_bad (_("unknown opcode \"%s\""), "imml"); -- return; -- } -- -- inst1 = opcode1->bit_sequence; -- inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -- output[0] = INST_BYTE0 (inst1); -- output[1] = INST_BYTE1 (inst1); -- output[2] = INST_BYTE2 (inst1); -- output[3] = INST_BYTE3 (inst1); -- output = frag_more (isize); -- } -- inst |= (reg1 << RD_LOW) & RD_MASK; -- inst |= (reg2 << RA_LOW) & RA_MASK; -- inst |= (immed << IMM_LOW) & IMM_MASK; -- } --#endif - else - { - temp = immed & 0xFFFF8000; -@@ -1958,8 +1933,8 @@ md_assemble (char * str) - - if (exp.X_op != O_constant) - { -- char *opc = NULL; -- //char *opc = str_microblaze_64; -+ //char *opc = NULL; -+ char *opc = str_microblaze_64; - relax_substateT subtype; - - if (exp.X_md != 0) -@@ -2221,13 +2196,19 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, - fragP->fr_fix += INST_WORD_SIZE * 2; - fragP->fr_var = 0; - break; -+ case DEFINED_64_PC_OFFSET: -+ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, -+ fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_PCREL); -+ fragP->fr_fix += INST_WORD_SIZE * 2; -+ fragP->fr_var = 0; -+ break; - case DEFINED_64_OFFSET: - if (fragP->fr_symbol == GOT_symbol) - fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, -- fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GPC); -+ fragP->fr_offset, FALSE, BFD_RELOC_MICROBLAZE_64_GPC); - else - fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, -- fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64); -+ fragP->fr_offset, FALSE, BFD_RELOC_MICROBLAZE_64); - fragP->fr_fix += INST_WORD_SIZE * 2; - fragP->fr_var = 0; - break; -@@ -2237,7 +2218,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, - fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_GOTPC); - else - fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, -- fragP->fr_offset, TRUE, BFD_RELOC_64); -+ fragP->fr_offset, FALSE, BFD_RELOC_64); - fragP->fr_fix += INST_WORD_SIZE * 2; - fragP->fr_var = 0; - break; -@@ -2457,14 +2438,17 @@ md_apply_fix (fixS * fixP, - } - } - break; -+ - case BFD_RELOC_64_PCREL: - case BFD_RELOC_64: - case BFD_RELOC_MICROBLAZE_64_TEXTREL: - case BFD_RELOC_MICROBLAZE_64: -+ case BFD_RELOC_MICROBLAZE_64_PCREL: - /* Add an imm instruction. First save the current instruction. */ - for (i = 0; i < INST_WORD_SIZE; i++) - buf[i + INST_WORD_SIZE] = buf[i]; -- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 -+ || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) - { - /* Generate the imm instruction. */ - opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -@@ -2477,6 +2461,10 @@ md_apply_fix (fixS * fixP, - inst1 = opcode1->bit_sequence; - if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) - inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) -+ fixP->fx_r_type = BFD_RELOC_64; -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) -+ fixP->fx_r_type = BFD_RELOC_64_PCREL; - } - else - { -@@ -2487,7 +2475,7 @@ md_apply_fix (fixS * fixP, - as_bad (_("unknown opcode \"%s\""), "imm"); - return; - } -- -+ - inst1 = opcode1->bit_sequence; - if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) - inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; -@@ -2534,7 +2522,7 @@ md_apply_fix (fixS * fixP, - opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); - if (opcode1 == NULL) - { -- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) -+ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) - as_bad (_("unknown opcode \"%s\""), "imml"); - else - as_bad (_("unknown opcode \"%s\""), "imm"); -@@ -2561,8 +2549,6 @@ md_apply_fix (fixS * fixP, - moves code around due to relaxing. */ - if (fixP->fx_r_type == BFD_RELOC_64_PCREL) - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; -- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) -- fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; - else if (fixP->fx_r_type == BFD_RELOC_32) - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; - else -@@ -2613,33 +2599,24 @@ md_estimate_size_before_relax (fragS * fragP, - if(streq (fragP->fr_opcode, str_microblaze_64)) - { - /* Used as an absolute value. */ -- fragP->fr_subtype = DEFINED_64_OFFSET; -+ fragP->fr_subtype = DEFINED_64_PC_OFFSET; - /* Variable part does not change. */ -- fragP->fr_var = INST_WORD_SIZE; -+ fragP->fr_var = INST_WORD_SIZE*2; - } - else - { - fragP->fr_subtype = DEFINED_PC_OFFSET; -- /* Don't know now whether we need an imm instruction. */ -+ /* Don't know now whether we need an imm instruction. */ - fragP->fr_var = INST_WORD_SIZE; - } - } - else - { - fragP->fr_subtype = DEFINED_PC_OFFSET; -- /* Don't know now whether we need an imm instruction. */ -+ /* Don't know now whether we need an imm instruction. */ - fragP->fr_var = INST_WORD_SIZE; - } - } -- #if 0 -- else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && -- !S_IS_WEAK (fragP->fr_symbol)) -- { -- fragP->fr_subtype = DEFINED_PC_OFFSET; -- /* Don't know now whether we need an imm instruction. */ -- fragP->fr_var = INST_WORD_SIZE; -- } --#endif - else if (S_IS_DEFINED (fragP->fr_symbol) - && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) - { -@@ -2669,6 +2646,13 @@ md_estimate_size_before_relax (fragS * fragP, - /* Variable part does not change. */ - fragP->fr_var = INST_WORD_SIZE*2; - } -+ else if (streq (fragP->fr_opcode, str_microblaze_64)) -+ { -+ /* Used as an absolute value. */ -+ fragP->fr_subtype = DEFINED_64_OFFSET; -+ /* Variable part does not change. */ -+ fragP->fr_var = INST_WORD_SIZE; -+ } - else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor)) - { - /* It is accessed using the small data read only anchor. */ -@@ -2743,6 +2727,7 @@ md_estimate_size_before_relax (fragS * fragP, - case TLSTPREL_OFFSET: - case TLSDTPREL_OFFSET: - case DEFINED_64_OFFSET: -+ case DEFINED_64_PC_OFFSET: - fragP->fr_var = INST_WORD_SIZE*2; - break; - case DEFINED_RO_SEGMENT: -@@ -2796,7 +2781,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) - else - { - /* The case where we are going to resolve things... */ -- if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) -+ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) - return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; - else - return fixp->fx_where + fixp->fx_frag->fr_address; -@@ -2831,6 +2816,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) - case BFD_RELOC_MICROBLAZE_64_GOTPC: - case BFD_RELOC_MICROBLAZE_64_GPC: - case BFD_RELOC_MICROBLAZE_64: -+ case BFD_RELOC_MICROBLAZE_64_PCREL: - case BFD_RELOC_MICROBLAZE_64_GOT: - case BFD_RELOC_MICROBLAZE_64_PLT: - case BFD_RELOC_MICROBLAZE_64_GOTOFF: diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0019-Fixed-MB-x-relocation-issues.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0019-Fixed-MB-x-relocation-issues.patch deleted file mode 100644 index 55319ee2c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0019-Fixed-MB-x-relocation-issues.patch +++ /dev/null @@ -1,373 +0,0 @@ -From 616031595c692c2181c3b1ce8c08678b68b2fe4e Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 28 Sep 2018 12:04:55 +0530 -Subject: [PATCH] -Fixed MB-x relocation issues -Added imml for required MB-x - instructions - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf64-microblaze.c | 68 ++++++++++++++++---- - gas/config/tc-microblaze.c | 152 ++++++++++++++++++++++++++++++++------------- - gas/tc.h | 2 +- - 3 files changed, 167 insertions(+), 55 deletions(-) - -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 56a45f2..54a2461 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -1476,8 +1476,17 @@ microblaze_elf_relocate_section (bfd *output_bfd, - relocation -= (input_section->output_section->vma - + input_section->output_offset - + offset + INST_WORD_SIZE); -- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); -+ if (insn == 0xb2000000 || insn == 0xb2ffffff) -+ { -+ insn &= ~0x00ffffff; -+ insn |= (relocation >> 16) & 0xffffff; -+ bfd_put_32 (input_bfd, insn, - contents + offset + endian); -+ } -+ else -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); - bfd_put_16 (input_bfd, relocation & 0xffff, - contents + offset + endian + INST_WORD_SIZE); - } -@@ -1567,11 +1576,28 @@ microblaze_elf_relocate_section (bfd *output_bfd, - else - { - if (r_type == R_MICROBLAZE_64_PCREL) -- relocation -= (input_section->output_section->vma -- + input_section->output_offset -- + offset + INST_WORD_SIZE); -- bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ { -+ if (!input_section->output_section->vma && -+ !input_section->output_offset && !offset) -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset); -+ else -+ relocation -= (input_section->output_section->vma -+ + input_section->output_offset -+ + offset + INST_WORD_SIZE); -+ } -+ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); -+ if (insn == 0xb2000000 || insn == 0xb2ffffff) -+ { -+ insn &= ~0x00ffffff; -+ insn |= (relocation >> 16) & 0xffffff; -+ bfd_put_32 (input_bfd, insn, - contents + offset + endian); -+ } -+ else -+ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -+ contents + offset + endian); - bfd_put_16 (input_bfd, relocation & 0xffff, - contents + offset + endian + INST_WORD_SIZE); - } -@@ -1690,9 +1716,19 @@ static void - microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) - { - unsigned long instr = bfd_get_32 (abfd, bfd_addr); -- instr &= ~0x0000ffff; -- instr |= (val & 0x0000ffff); -- bfd_put_32 (abfd, instr, bfd_addr); -+ -+ if (instr == 0xb2000000 || instr == 0xb2ffffff) -+ { -+ instr &= ~0x00ffffff; -+ instr |= (val & 0xffffff); -+ bfd_put_32 (abfd, instr, bfd_addr); -+ } -+ else -+ { -+ instr &= ~0x0000ffff; -+ instr |= (val & 0x0000ffff); -+ bfd_put_32 (abfd, instr, bfd_addr); -+ } - } - - /* Read-modify-write into the bfd, an immediate value into appropriate fields of -@@ -1704,10 +1740,18 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) - unsigned long instr_lo; - - instr_hi = bfd_get_32 (abfd, bfd_addr); -- instr_hi &= ~0x0000ffff; -- instr_hi |= ((val >> 16) & 0x0000ffff); -- bfd_put_32 (abfd, instr_hi, bfd_addr); -- -+ if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff) -+ { -+ instr_hi &= ~0x00ffffff; -+ instr_hi |= (val >> 16) & 0xffffff; -+ bfd_put_32 (abfd, instr_hi,bfd_addr); -+ } -+ else -+ { -+ instr_hi &= ~0x0000ffff; -+ instr_hi |= ((val >> 16) & 0x0000ffff); -+ bfd_put_32 (abfd, instr_hi, bfd_addr); -+ } - instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); - instr_lo &= ~0x0000ffff; - instr_lo |= (val & 0x0000ffff); -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 587a4d5..fa437b6 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -392,7 +392,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) - Integer arg to pass to the function. */ - /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, - and then in the read.c table. */ --const pseudo_typeS md_pseudo_table[] = -+pseudo_typeS md_pseudo_table[] = - { - {"lcomm", microblaze_s_lcomm, 1}, - {"data", microblaze_s_data, 0}, -@@ -401,7 +401,7 @@ const pseudo_typeS md_pseudo_table[] = - {"data32", cons, 4}, /* Same as word. */ - {"ent", s_func, 0}, /* Treat ent as function entry point. */ - {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ -- {"gpword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ -+ {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ - {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ - {"weakext", microblaze_s_weakext, 0}, - {"rodata", microblaze_s_rdata, 0}, -@@ -996,7 +996,7 @@ md_assemble (char * str) - unsigned reg2; - unsigned reg3; - unsigned isize; -- unsigned int immed, immed2, temp; -+ unsigned long immed, immed2, temp; - expressionS exp; - char name[20]; - long immedl; -@@ -1118,8 +1118,9 @@ md_assemble (char * str) - as_fatal (_("lmi pseudo instruction should not use a label in imm field")); - else if (streq (name, "smi")) - as_fatal (_("smi pseudo instruction should not use a label in imm field")); -- -- if (reg2 == REG_ROSDP) -+ if(streq (name, "lli") || streq (name, "sli")) -+ opc = str_microblaze_64; -+ else if (reg2 == REG_ROSDP) - opc = str_microblaze_ro_anchor; - else if (reg2 == REG_RWSDP) - opc = str_microblaze_rw_anchor; -@@ -1182,31 +1183,55 @@ md_assemble (char * str) - inst |= (immed << IMM_LOW) & IMM_MASK; - } - } -- else -- { -- temp = immed & 0xFFFF8000; -- if ((temp != 0) && (temp != 0xFFFF8000)) -- { -+ else if (streq (name, "lli") || streq (name, "sli")) -+ { -+ temp = immed & 0xFFFFFF8000; -+ if (temp != 0 && temp != 0xFFFFFF8000) -+ { - /* Needs an immediate inst. */ -- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); - if (opcode1 == NULL) - { -- as_bad (_("unknown opcode \"%s\""), "imm"); -+ as_bad (_("unknown opcode \"%s\""), "imml"); - return; - } -- - inst1 = opcode1->bit_sequence; -- inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; -+ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; - output[0] = INST_BYTE0 (inst1); - output[1] = INST_BYTE1 (inst1); - output[2] = INST_BYTE2 (inst1); - output[3] = INST_BYTE3 (inst1); - output = frag_more (isize); -- } -- inst |= (reg1 << RD_LOW) & RD_MASK; -- inst |= (reg2 << RA_LOW) & RA_MASK; -- inst |= (immed << IMM_LOW) & IMM_MASK; -- } -+ } -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (reg2 << RA_LOW) & RA_MASK; -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } -+ else -+ { -+ temp = immed & 0xFFFF8000; -+ if ((temp != 0) && (temp != 0xFFFF8000)) -+ { -+ /* Needs an immediate inst. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imm"); -+ return; -+ } -+ -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (reg2 << RA_LOW) & RA_MASK; -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } - break; - - case INST_TYPE_RD_R1_IMMS: -@@ -1832,12 +1857,20 @@ md_assemble (char * str) - case INST_TYPE_IMM: - if (streq (name, "imm")) - as_fatal (_("An IMM instruction should not be present in the .s file")); -- -- op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); -+ if (microblaze_arch_size == 64) -+ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); -+ else -+ op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); - - if (exp.X_op != O_constant) - { -- char *opc = NULL; -+ char *opc; -+ if (microblaze_arch_size == 64 && (streq (name, "breai") || -+ streq (name, "breaid") || -+ streq (name, "brai") || streq (name, "braid"))) -+ opc = str_microblaze_64; -+ else -+ opc = NULL; - relax_substateT subtype; - - if (exp.X_md != 0) -@@ -1860,27 +1893,54 @@ md_assemble (char * str) - immed = exp.X_add_number; - } - -+ if (microblaze_arch_size == 64 && (streq (name, "breai") || -+ streq (name, "breaid") || -+ streq (name, "brai") || streq (name, "braid"))) -+ { -+ temp = immed & 0xFFFFFF8000; -+ if (temp != 0) -+ { -+ /* Needs an immediate inst. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } - -- temp = immed & 0xFFFF8000; -- if ((temp != 0) && (temp != 0xFFFF8000)) -- { -- /* Needs an immediate inst. */ -- opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -- if (opcode1 == NULL) -- { -- as_bad (_("unknown opcode \"%s\""), "imm"); -- return; -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); - } -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } -+ else -+ { -+ temp = immed & 0xFFFF8000; -+ if ((temp != 0) && (temp != 0xFFFF8000)) -+ { -+ /* Needs an immediate inst. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imm"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imm"); -+ return; -+ } - -- inst1 = opcode1->bit_sequence; -- inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; -- output[0] = INST_BYTE0 (inst1); -- output[1] = INST_BYTE1 (inst1); -- output[2] = INST_BYTE2 (inst1); -- output[3] = INST_BYTE3 (inst1); -- output = frag_more (isize); -- } -- inst |= (immed << IMM_LOW) & IMM_MASK; -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } - break; - - case INST_TYPE_NONE: -@@ -2460,7 +2520,7 @@ md_apply_fix (fixS * fixP, - - inst1 = opcode1->bit_sequence; - if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) -- inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ inst1 |= ((val & 0xFFFFFF0000L) >> 16) & IMML_MASK; - if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) - fixP->fx_r_type = BFD_RELOC_64; - if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) -@@ -2628,7 +2688,14 @@ md_estimate_size_before_relax (fragS * fragP, - } - else - { -- fragP->fr_subtype = UNDEFINED_PC_OFFSET; -+ if (fragP->fr_opcode != NULL) { -+ if (streq (fragP->fr_opcode, str_microblaze_64)) -+ fragP->fr_subtype = DEFINED_64_PC_OFFSET; -+ else -+ fragP->fr_subtype = UNDEFINED_PC_OFFSET; -+ } -+ else -+ fragP->fr_subtype = UNDEFINED_PC_OFFSET; - fragP->fr_var = INST_WORD_SIZE*2; - } - break; -@@ -2905,6 +2972,7 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) - case OPTION_M64: - //if (arg != NULL && strcmp (arg, "64") == 0) - microblaze_arch_size = 64; -+ md_pseudo_table[7].poc_val = 8; - break; - default: - return 0; -diff --git a/gas/tc.h b/gas/tc.h -index 0a50a69..529a73b 100644 ---- a/gas/tc.h -+++ b/gas/tc.h -@@ -22,7 +22,7 @@ - /* In theory (mine, at least!) the machine dependent part of the assembler - should only have to include one file. This one. -- JF */ - --extern const pseudo_typeS md_pseudo_table[]; -+extern pseudo_typeS md_pseudo_table[]; - - const char * md_atof (int, char *, int *); - int md_parse_option (int, const char *); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0020-Fixing-the-branch-related-issues.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0020-Fixing-the-branch-related-issues.patch deleted file mode 100644 index 43a06d894..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0020-Fixing-the-branch-related-issues.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 05cac23e0cdb94705c87cf9d94ffe00e7cba53f6 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Sun, 30 Sep 2018 17:06:58 +0530 -Subject: [PATCH] Fixing the branch related issues - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf64-microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 54a2461..e9b3cf3 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -2532,7 +2532,7 @@ microblaze_elf_check_relocs (bfd * abfd, - - /* PR15323, ref flags aren't set for references in the same - object. */ -- h->root.non_ir_ref = 1; -+ h->root.non_ir_ref_regular = 1; - } - - switch (r_type) diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0021-Fixed-address-computation-issues-with-64bit-address.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0021-Fixed-address-computation-issues-with-64bit-address.patch deleted file mode 100644 index b3aebb745..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0021-Fixed-address-computation-issues-with-64bit-address.patch +++ /dev/null @@ -1,217 +0,0 @@ -From 8b98898add56667d28b7d6242c86603bb2f5946e Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 9 Oct 2018 10:14:22 +0530 -Subject: [PATCH] - Fixed address computation issues with 64bit address - Fixed - imml dissassamble issue - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/bfd-in2.h | 5 ++++ - bfd/elf64-microblaze.c | 14 ++++----- - gas/config/tc-microblaze.c | 74 +++++++++++++++++++++++++++++++++++++++++----- - opcodes/microblaze-dis.c | 2 +- - 4 files changed, 79 insertions(+), 16 deletions(-) - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index f74aac1..434b41c 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5882,6 +5882,11 @@ done here - only used for relaxing */ - * +done here - only used for relaxing */ - BFD_RELOC_MICROBLAZE_64, - -+/* This is a 64 bit reloc that stores the 32 bit relative -+ * +value in two words (with an imml instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_EA64, -+ - /* This is a 64 bit reloc that stores the 32 bit pc relative - * +value in two words (with an imm instruction). No relocation is - * +done here - only used for relaxing */ -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index e9b3cf3..40f10aa 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -121,15 +121,15 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0, /* Rightshift. */ - 4, /* Size (0 = byte, 1 = short, 2 = long). */ - 64, /* Bitsize. */ -- TRUE, /* PC_relative. */ -+ FALSE, /* PC_relative. */ - 0, /* Bitpos. */ - complain_overflow_dont, /* Complain on overflow. */ - bfd_elf_generic_reloc,/* Special Function. */ - "R_MICROBLAZE_IMML_64", /* Name. */ - FALSE, /* Partial Inplace. */ - 0, /* Source Mask. */ -- 0x0000ffff, /* Dest Mask. */ -- TRUE), /* PC relative offset? */ -+ 0xffffffffffffff, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ - - /* A 64 bit relocation. Table entry not really used. */ - HOWTO (R_MICROBLAZE_64, /* Type. */ -@@ -585,9 +585,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_32: - microblaze_reloc = R_MICROBLAZE_32; - break; -- /* RVA is treated the same as 32 */ -+ /* RVA is treated the same as 64 */ - case BFD_RELOC_RVA: -- microblaze_reloc = R_MICROBLAZE_32; -+ microblaze_reloc = R_MICROBLAZE_IMML_64; - break; - case BFD_RELOC_32_PCREL: - microblaze_reloc = R_MICROBLAZE_32_PCREL; -@@ -619,7 +619,7 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_VTABLE_ENTRY: - microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; - break; -- case BFD_RELOC_MICROBLAZE_64: -+ case BFD_RELOC_MICROBLAZE_EA64: - microblaze_reloc = R_MICROBLAZE_IMML_64; - break; - case BFD_RELOC_MICROBLAZE_64_GOTPC: -@@ -1969,7 +1969,7 @@ microblaze_elf_relax_section (bfd *abfd, - efix = calc_fixup (target_address, 0, sec); - - /* Validate the in-band val. */ -- val = bfd_get_32 (abfd, contents + irel->r_offset); -+ val = bfd_get_64 (abfd, contents + irel->r_offset); - if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { - fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); - } -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index fa437b6..46df32e 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -402,7 +402,6 @@ pseudo_typeS md_pseudo_table[] = - {"ent", s_func, 0}, /* Treat ent as function entry point. */ - {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ - {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ -- {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ - {"weakext", microblaze_s_weakext, 0}, - {"rodata", microblaze_s_rdata, 0}, - {"sdata2", microblaze_s_rdata, 1}, -@@ -2482,15 +2481,71 @@ md_apply_fix (fixS * fixP, - /* Don't do anything if the symbol is not defined. */ - if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) - { -+ if ((fixP->fx_r_type == BFD_RELOC_RVA) && (microblaze_arch_size == 64)) -+ { -+ if (target_big_endian) -+ { -+ buf[0] |= ((val >> 56) & 0xff); -+ buf[1] |= ((val >> 48) & 0xff); -+ buf[2] |= ((val >> 40) & 0xff); -+ buf[3] |= ((val >> 32) & 0xff); -+ buf[4] |= ((val >> 24) & 0xff); -+ buf[5] |= ((val >> 16) & 0xff); -+ buf[6] |= ((val >> 8) & 0xff); -+ buf[7] |= (val & 0xff); -+ } -+ else -+ { -+ buf[7] |= ((val >> 56) & 0xff); -+ buf[6] |= ((val >> 48) & 0xff); -+ buf[5] |= ((val >> 40) & 0xff); -+ buf[4] |= ((val >> 32) & 0xff); -+ buf[3] |= ((val >> 24) & 0xff); -+ buf[2] |= ((val >> 16) & 0xff); -+ buf[1] |= ((val >> 8) & 0xff); -+ buf[0] |= (val & 0xff); -+ } -+ } -+ else { -+ if (target_big_endian) -+ { -+ buf[0] |= ((val >> 24) & 0xff); -+ buf[1] |= ((val >> 16) & 0xff); -+ buf[2] |= ((val >> 8) & 0xff); -+ buf[3] |= (val & 0xff); -+ } -+ else -+ { -+ buf[3] |= ((val >> 24) & 0xff); -+ buf[2] |= ((val >> 16) & 0xff); -+ buf[1] |= ((val >> 8) & 0xff); -+ buf[0] |= (val & 0xff); -+ } -+ } -+ } -+ break; -+ -+ case BFD_RELOC_MICROBLAZE_EA64: -+ /* Don't do anything if the symbol is not defined. */ -+ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) -+ { - if (target_big_endian) - { -- buf[0] |= ((val >> 24) & 0xff); -- buf[1] |= ((val >> 16) & 0xff); -- buf[2] |= ((val >> 8) & 0xff); -- buf[3] |= (val & 0xff); -+ buf[0] |= ((val >> 56) & 0xff); -+ buf[1] |= ((val >> 48) & 0xff); -+ buf[2] |= ((val >> 40) & 0xff); -+ buf[3] |= ((val >> 32) & 0xff); -+ buf[4] |= ((val >> 24) & 0xff); -+ buf[5] |= ((val >> 16) & 0xff); -+ buf[6] |= ((val >> 8) & 0xff); -+ buf[7] |= (val & 0xff); - } - else - { -+ buf[7] |= ((val >> 56) & 0xff); -+ buf[6] |= ((val >> 48) & 0xff); -+ buf[5] |= ((val >> 40) & 0xff); -+ buf[4] |= ((val >> 32) & 0xff); - buf[3] |= ((val >> 24) & 0xff); - buf[2] |= ((val >> 16) & 0xff); - buf[1] |= ((val >> 8) & 0xff); -@@ -2611,6 +2666,8 @@ md_apply_fix (fixS * fixP, - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; - else if (fixP->fx_r_type == BFD_RELOC_32) - fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; -+ else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64) -+ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64; - else - fixP->fx_r_type = BFD_RELOC_NONE; - fixP->fx_addsy = section_symbol (absolute_section); -@@ -2882,6 +2939,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) - case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: - case BFD_RELOC_MICROBLAZE_64_GOTPC: - case BFD_RELOC_MICROBLAZE_64_GPC: -+ case BFD_RELOC_MICROBLAZE_EA64: - case BFD_RELOC_MICROBLAZE_64: - case BFD_RELOC_MICROBLAZE_64_PCREL: - case BFD_RELOC_MICROBLAZE_64_GOT: -@@ -3027,10 +3085,10 @@ cons_fix_new_microblaze (fragS * frag, - r = BFD_RELOC_32; - break; - case 8: -- if (microblaze_arch_size == 64) -+ /*if (microblaze_arch_size == 64) - r = BFD_RELOC_32; -- else -- r = BFD_RELOC_64; -+ else*/ -+ r = BFD_RELOC_MICROBLAZE_EA64; - break; - default: - as_bad (_("unsupported BFD relocation size %u"), size); -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index 20ea6a8..f679a43 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -61,7 +61,7 @@ get_field_imml (long instr) - { - char tmpstr[25]; - -- sprintf (tmpstr, "%d", (short)((instr & IMML_MASK) >> IMM_LOW)); -+ sprintf (tmpstr, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); - return (strdup (tmpstr)); - } - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0022-Adding-new-relocation-to-support-64bit-rodata.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0022-Adding-new-relocation-to-support-64bit-rodata.patch deleted file mode 100644 index aec793d9c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0022-Adding-new-relocation-to-support-64bit-rodata.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 3eb0c068ad5a698007341b32c82d9e7ac6cabc49 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Sat, 13 Oct 2018 21:17:01 +0530 -Subject: [PATCH] Adding new relocation to support 64bit rodata - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf64-microblaze.c | 11 +++++++++-- - gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++++++++++---- - 2 files changed, 54 insertions(+), 6 deletions(-) - -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 40f10aa..4d9b906 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -1461,6 +1461,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - case (int) R_MICROBLAZE_64_PCREL : - case (int) R_MICROBLAZE_64: - case (int) R_MICROBLAZE_32: -+ case (int) R_MICROBLAZE_IMML_64: - { - /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols - from removed linkonce sections, or sections discarded by -@@ -1470,6 +1471,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, - relocation += addend; - if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) - bfd_put_32 (input_bfd, relocation, contents + offset); -+ else if (r_type == R_MICROBLAZE_IMML_64) -+ bfd_put_64 (input_bfd, relocation, contents + offset); - else - { - if (r_type == R_MICROBLAZE_64_PCREL) -@@ -1547,7 +1550,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - } - else - { -- if (r_type == R_MICROBLAZE_32) -+ if (r_type == R_MICROBLAZE_32 || r_type == R_MICROBLAZE_IMML_64) - { - outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); - outrel.r_addend = relocation + addend; -@@ -1573,6 +1576,8 @@ microblaze_elf_relocate_section (bfd *output_bfd, - relocation += addend; - if (r_type == R_MICROBLAZE_32) - bfd_put_32 (input_bfd, relocation, contents + offset); -+ else if (r_type == R_MICROBLAZE_IMML_64) -+ bfd_put_64 (input_bfd, relocation, contents + offset + endian); - else - { - if (r_type == R_MICROBLAZE_64_PCREL) -@@ -2085,7 +2090,8 @@ microblaze_elf_relax_section (bfd *abfd, - microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, - irelscan->r_addend); - } -- if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) -+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32 -+ || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) - { - isym = isymbuf + ELF64_R_SYM (irelscan->r_info); - -@@ -2591,6 +2597,7 @@ microblaze_elf_check_relocs (bfd * abfd, - case R_MICROBLAZE_64: - case R_MICROBLAZE_64_PCREL: - case R_MICROBLAZE_32: -+ case R_MICROBLAZE_IMML_64: - { - if (h != NULL && !bfd_link_pic (info)) - { -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index 46df32e..c6d2e4c 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -1119,6 +1119,13 @@ md_assemble (char * str) - as_fatal (_("smi pseudo instruction should not use a label in imm field")); - if(streq (name, "lli") || streq (name, "sli")) - opc = str_microblaze_64; -+ else if ((microblaze_arch_size == 64) && ((streq (name, "lbui") -+ || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi") -+ || streq (name, "shi") || streq (name, "swi")))) -+ { -+ opc = str_microblaze_64; -+ subtype = opcode->inst_offset_type; -+ } - else if (reg2 == REG_ROSDP) - opc = str_microblaze_ro_anchor; - else if (reg2 == REG_RWSDP) -@@ -1182,7 +1189,10 @@ md_assemble (char * str) - inst |= (immed << IMM_LOW) & IMM_MASK; - } - } -- else if (streq (name, "lli") || streq (name, "sli")) -+ else if (streq (name, "lli") || streq (name, "sli") || ((microblaze_arch_size == 64) -+ && ((streq (name, "lbui")) || streq (name, "lhui") -+ || streq (name, "lwi") || streq (name, "sbi") -+ || streq (name, "shi") || streq (name, "swi")))) - { - temp = immed & 0xFFFFFF8000; - if (temp != 0 && temp != 0xFFFFFF8000) -@@ -1794,6 +1804,11 @@ md_assemble (char * str) - - if (exp.X_md != 0) - subtype = get_imm_otype(exp.X_md); -+ else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) -+ { -+ opc = str_microblaze_64; -+ subtype = opcode->inst_offset_type; -+ } - else - subtype = opcode->inst_offset_type; - -@@ -1811,6 +1826,31 @@ md_assemble (char * str) - output = frag_more (isize); - immed = exp.X_add_number; - } -+ if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) -+ { -+ temp = immed & 0xFFFFFF8000; -+ if (temp != 0 && temp != 0xFFFFFF8000) -+ { -+ /* Needs an immediate inst. */ -+ opcode1 = (struct op_code_struct *) hash_find (opcode_hash_control, "imml"); -+ if (opcode1 == NULL) -+ { -+ as_bad (_("unknown opcode \"%s\""), "imml"); -+ return; -+ } -+ inst1 = opcode1->bit_sequence; -+ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; -+ output[0] = INST_BYTE0 (inst1); -+ output[1] = INST_BYTE1 (inst1); -+ output[2] = INST_BYTE2 (inst1); -+ output[3] = INST_BYTE3 (inst1); -+ output = frag_more (isize); -+ } -+ inst |= (reg1 << RD_LOW) & RD_MASK; -+ inst |= (immed << IMM_LOW) & IMM_MASK; -+ } -+ else -+ { - - temp = immed & 0xFFFF8000; - if ((temp != 0) && (temp != 0xFFFF8000)) -@@ -1834,6 +1874,7 @@ md_assemble (char * str) - - inst |= (reg1 << RD_LOW) & RD_MASK; - inst |= (immed << IMM_LOW) & IMM_MASK; -+ } - break; - - case INST_TYPE_R2: -@@ -3085,10 +3126,10 @@ cons_fix_new_microblaze (fragS * frag, - r = BFD_RELOC_32; - break; - case 8: -- /*if (microblaze_arch_size == 64) -- r = BFD_RELOC_32; -- else*/ -+ if (microblaze_arch_size == 64) - r = BFD_RELOC_MICROBLAZE_EA64; -+ else -+ r = BFD_RELOC_64; - break; - default: - as_bad (_("unsupported BFD relocation size %u"), size); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0023-fixing-the-.bss-relocation-issue.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0023-fixing-the-.bss-relocation-issue.patch deleted file mode 100644 index cd54cae46..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0023-fixing-the-.bss-relocation-issue.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 52f6c56353aad424dfdaf713e0192f8fc9c874f4 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Wed, 24 Oct 2018 12:34:37 +0530 -Subject: [PATCH] fixing the .bss relocation issue - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf64-microblaze.c | 18 ++++++++++++------ - 1 file changed, 12 insertions(+), 6 deletions(-) - -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 4d9b906..184b7d5 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -1480,7 +1480,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - + input_section->output_offset - + offset + INST_WORD_SIZE); - unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); -- if (insn == 0xb2000000 || insn == 0xb2ffffff) -+ if ((insn & 0xff000000) == 0xb2000000) - { - insn &= ~0x00ffffff; - insn |= (relocation >> 16) & 0xffffff; -@@ -1593,7 +1593,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - + offset + INST_WORD_SIZE); - } - unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); -- if (insn == 0xb2000000 || insn == 0xb2ffffff) -+ if ((insn & 0xff000000) == 0xb2000000) - { - insn &= ~0x00ffffff; - insn |= (relocation >> 16) & 0xffffff; -@@ -1722,7 +1722,7 @@ microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) - { - unsigned long instr = bfd_get_32 (abfd, bfd_addr); - -- if (instr == 0xb2000000 || instr == 0xb2ffffff) -+ if ((instr & 0xff000000) == 0xb2000000) - { - instr &= ~0x00ffffff; - instr |= (val & 0xffffff); -@@ -1745,7 +1745,7 @@ microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) - unsigned long instr_lo; - - instr_hi = bfd_get_32 (abfd, bfd_addr); -- if (instr_hi == 0xb2000000 || instr_hi == 0xb2ffffff) -+ if ((instr_hi & 0xff000000) == 0xb2000000) - { - instr_hi &= ~0x00ffffff; - instr_hi |= (val >> 16) & 0xffffff; -@@ -2238,7 +2238,10 @@ microblaze_elf_relax_section (bfd *abfd, - unsigned long instr_lo = bfd_get_32 (abfd, ocontents - + irelscan->r_offset - + INST_WORD_SIZE); -- immediate = (instr_hi & 0x0000ffff) << 16; -+ if ((instr_hi & 0xff000000) == 0xb2000000) -+ immediate = (instr_hi & 0x00ffffff) << 24; -+ else -+ immediate = (instr_hi & 0x0000ffff) << 16; - immediate |= (instr_lo & 0x0000ffff); - offset = calc_fixup (irelscan->r_addend, 0, sec); - immediate -= offset; -@@ -2282,7 +2285,10 @@ microblaze_elf_relax_section (bfd *abfd, - unsigned long instr_lo = bfd_get_32 (abfd, ocontents - + irelscan->r_offset - + INST_WORD_SIZE); -- immediate = (instr_hi & 0x0000ffff) << 16; -+ if ((instr_hi & 0xff000000) == 0xb2000000) -+ immediate = (instr_hi & 0x00ffffff) << 24; -+ else -+ immediate = (instr_hi & 0x0000ffff) << 16; - immediate |= (instr_lo & 0x0000ffff); - target_address = immediate; - offset = calc_fixup (target_address, 0, sec); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch deleted file mode 100644 index a4f8257d2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch +++ /dev/null @@ -1,44 +0,0 @@ -From ed3e6fad3e2a626fc987e9c7477f51d03d2b4512 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Wed, 28 Nov 2018 14:00:29 +0530 -Subject: [PATCH] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. It was - adjusting only lower 16bits. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf32-microblaze.c | 4 ++-- - bfd/elf64-microblaze.c | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 035e71f..2d8c062 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd, - sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); - efix = calc_fixup (target_address, 0, sec); - irel->r_addend -= (efix - sfix); -- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset -- + INST_WORD_SIZE, irel->r_addend); -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); - } - break; - } -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index 184b7d5..ef6a870 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd, - sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); - efix = calc_fixup (target_address, 0, sec); - irel->r_addend -= (efix - sfix); -- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset -- + INST_WORD_SIZE, irel->r_addend); -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); - } - break; - } diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch deleted file mode 100644 index fec19b6b6..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0025-Patch-MicroBlaze-fixed-Build-issue-which-are-due-to-.patch +++ /dev/null @@ -1,67 +0,0 @@ -From b8bd638f71649980e114548d8eeecba34683af42 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sun, 2 Dec 2018 14:49:14 +0530 -Subject: [PATCH] fixed Build issue which are due to conflicts in patches. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf32-microblaze.c | 1 + - bfd/elf64-microblaze.c | 12 ++++++------ - gas/config/tc-microblaze.c | 4 ++-- - 3 files changed, 9 insertions(+), 8 deletions(-) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 2d8c062..6a795c5 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -1996,6 +1996,7 @@ microblaze_elf_relax_section (bfd *abfd, - /* This was a PC-relative instruction that was - completely resolved. */ - int sfix, efix; -+ unsigned int val; - bfd_vma target_address; - target_address = irel->r_addend + irel->r_offset; - sfix = calc_fixup (irel->r_offset, 0, sec); -diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c -index ef6a870..bed534e 100644 ---- a/bfd/elf64-microblaze.c -+++ b/bfd/elf64-microblaze.c -@@ -2854,14 +2854,14 @@ microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info, - /* If this is a weak symbol, and there is a real definition, the - processor independent code will have arranged for us to see the - real definition first, and we can just use the same value. */ -- if (h->u.weakdef != NULL) -+ if (h->is_weakalias) - { -- BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined -- || h->u.weakdef->root.type == bfd_link_hash_defweak); -- h->root.u.def.section = h->u.weakdef->root.u.def.section; -- h->root.u.def.value = h->u.weakdef->root.u.def.value; -+ struct elf_link_hash_entry *def = weakdef (h); -+ BFD_ASSERT (def->root.type == bfd_link_hash_defined); -+ h->root.u.def.section = def->root.u.def.section; -+ h->root.u.def.value = def->root.u.def.value; - return TRUE; -- } -+ } - - /* This is a reference to a symbol defined by a dynamic object which - is not a function. */ -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index c6d2e4c..b3e49f0 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -118,9 +118,9 @@ const relax_typeS md_relax_table[] = - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */ - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ - { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ -- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ -+ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */ - // { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 16: TLSTPREL_OFFSET. */ -- { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 } /* 19: DEFINED_64_OFFSET. */ -+ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */ - { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ - }; - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch deleted file mode 100644 index cd6965d70..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0026-Patch-Microblaze-changes-of-PR22458-failure-to-choos.patch +++ /dev/null @@ -1,31 +0,0 @@ -From cbe98e5a0cbc2337bf25d6b3f9dabcae38b95952 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 26 Feb 2019 17:31:41 +0530 -Subject: [PATCH] changes of "PR22458, failure to choose a matching ELF target" - is causing "Multiple Prevailing definition errors",added check for best_match - elf. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/format.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/bfd/format.c b/bfd/format.c -index 97a9229..3a74cc4 100644 ---- a/bfd/format.c -+++ b/bfd/format.c -@@ -292,7 +292,12 @@ bfd_check_format_matches (bfd *abfd, bfd_format format, char ***matching) - - /* Don't check the default target twice. */ - if (*target == &binary_vec -+#if !BFD_SUPPORTS_PLUGINS - || (!abfd->target_defaulted && *target == save_targ)) -+#else -+ || (!abfd->target_defaulted && *target == save_targ) -+ || (*target)->match_priority > best_match) -+#endif - continue; - - /* If we already tried a match, the bfd is modified and may diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0029-Patch-Microblaze-Binutils-security-check-is-causing-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0029-Patch-Microblaze-Binutils-security-check-is-causing-.patch deleted file mode 100644 index f293f5cf6..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0029-Patch-Microblaze-Binutils-security-check-is-causing-.patch +++ /dev/null @@ -1,33 +0,0 @@ -From b1e425aed65150d7ce9ddb119f4b94969fe4043e Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Mon, 11 Mar 2019 14:23:58 +0530 -Subject: [PATCH] Binutils security check is causing build error for windows - builds.commenting for now. - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - bfd/elf-attrs.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/bfd/elf-attrs.c b/bfd/elf-attrs.c -index bfe135e..feb5cb3 100644 ---- a/bfd/elf-attrs.c -+++ b/bfd/elf-attrs.c -@@ -440,6 +440,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) - /* PR 17512: file: 2844a11d. */ - if (hdr->sh_size == 0) - return; -+ #if 0 - if (hdr->sh_size > bfd_get_file_size (abfd)) - { - /* xgettext:c-format */ -@@ -448,6 +449,7 @@ _bfd_elf_parse_attributes (bfd *abfd, Elf_Internal_Shdr * hdr) - bfd_set_error (bfd_error_invalid_operation); - return; - } -+ #endif - - contents = (bfd_byte *) bfd_malloc (hdr->sh_size + 1); - if (!contents) diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0030-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0030-fixing-the-long-long-long-mingw-toolchain-issue.patch deleted file mode 100644 index 7e3accad0..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0030-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 1eec84c155aeaeead673310f83293853f01b578d Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Thu, 29 Nov 2018 17:59:25 +0530 -Subject: [PATCH] fixing the long & long long mingw toolchain issue - -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - gas/config/tc-microblaze.c | 10 +++++----- - opcodes/microblaze-opc.h | 4 ++-- - 2 files changed, 7 insertions(+), 7 deletions(-) - -diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c -index b3e49f0..5b506d3 100644 ---- a/gas/config/tc-microblaze.c -+++ b/gas/config/tc-microblaze.c -@@ -783,7 +783,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) - } - - static char * --parse_imml (char * s, expressionS * e, long min, long max) -+parse_imml (char * s, expressionS * e, long long min, long long max) - { - char *new_pointer; - char *atp; -@@ -834,11 +834,11 @@ parse_imml (char * s, expressionS * e, long min, long max) - ; /* An error message has already been emitted. */ - else if ((e->X_op != O_constant && e->X_op != O_symbol) ) - as_fatal (_("operand must be a constant or a label")); -- else if ((e->X_op == O_constant) && ((long) e->X_add_number < min -- || (long) e->X_add_number > max)) -+ else if ((e->X_op == O_constant) && ((long long) e->X_add_number < min -+ || (long long) e->X_add_number > max)) - { -- as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"), -- min, max, (long) e->X_add_number); -+ as_fatal (_("operand must be absolute in range %lld..%lld, not %lld"), -+ min, max, (long long) e->X_add_number); - } - - if (atp) -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index 824afc0..d59ee0a 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -585,8 +585,8 @@ char pvr_register_prefix[] = "rpvr"; - #define MIN_IMM6_WIDTH ((int) 0x00000001) - #define MAX_IMM6_WIDTH ((int) 0x00000040) - --#define MIN_IMML ((long) 0xffffff8000000000L) --#define MAX_IMML ((long) 0x0000007fffffffffL) -+#define MIN_IMML ((long long) 0xffffff8000000000L) -+#define MAX_IMML ((long long) 0x0000007fffffffffL) - - #endif /* MICROBLAZE_OPC */ - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0031-fixing-the-_STACK_SIZE-issue-with-the-flto-flag.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0031-fixing-the-_STACK_SIZE-issue-with-the-flto-flag.patch deleted file mode 100644 index 8c54f761e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0031-fixing-the-_STACK_SIZE-issue-with-the-flto-flag.patch +++ /dev/null @@ -1,55 +0,0 @@ -From e28b33db95e6b71afe2eaca9d7090b3bfc20f08e Mon Sep 17 00:00:00 2001 -From: Nagaraju <nmekala@xilinx.com> -Date: Wed, 20 Mar 2019 11:42:07 +0530 -Subject: [PATCH] fixing the _STACK_SIZE issue with the flto flag - -Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com> - ---- - ld/scripttempl/elfmicroblaze.sc | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/ld/scripttempl/elfmicroblaze.sc b/ld/scripttempl/elfmicroblaze.sc -index 30b9c28..6be0f4e 100644 ---- a/ld/scripttempl/elfmicroblaze.sc -+++ b/ld/scripttempl/elfmicroblaze.sc -@@ -63,9 +63,9 @@ ${RELOCATING+${LIB_SEARCH_DIRS}} - - ${RELOCATING+ENTRY (${ENTRY})} - --${RELOCATING+_TEXT_START_ADDR = DEFINED(_TEXT_START_ADDR) ? _TEXT_START_ADDR : 0x50; --_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x0; --_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;} -+${RELOCATING+_DEF_TEXT_START_ADDR = DEFINED(_TEXT_START_ADDR) ? _TEXT_START_ADDR : 0x50; -+_DEF_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x0; -+_DEF_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;} - - SECTIONS - { -@@ -75,7 +75,7 @@ SECTIONS - .vectors.debug_sw_break 0x18 : { KEEP (*(.vectors.debug_sw_break)) } = 0 - .vectors.hw_exception 0x20 : { KEEP (*(.vectors.hw_exception)) } = 0 - -- ${RELOCATING+. = _TEXT_START_ADDR;} -+ ${RELOCATING+. = _DEF_TEXT_START_ADDR;} - - ${RELOCATING+ _ftext = .;} - .text : { -@@ -207,7 +207,7 @@ SECTIONS - .heap : { - ${RELOCATING+ _heap = .;} - ${RELOCATING+ _heap_start = .;} -- ${RELOCATING+ . += _HEAP_SIZE;} -+ ${RELOCATING+ . += _DEF_HEAP_SIZE;} - ${RELOCATING+ _heap_end = .;} - } - -@@ -215,7 +215,7 @@ SECTIONS - - .stack : { - ${RELOCATING+ _stack_end = .;} -- ${RELOCATING+ . += _STACK_SIZE;} -+ ${RELOCATING+ . += _DEF_STACK_SIZE;} - ${RELOCATING+ . = ALIGN(. != 0 ? 8 : 1);} - ${RELOCATING+ _stack = .;} - ${RELOCATING+ _end = .;} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch deleted file mode 100644 index 5d29531d2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 7fbf19ba660c72a1d4817780cad5c4ae52cbe0b5 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 13:13:57 +0530 -Subject: [PATCH 01/54] LOCAL]: Testsuite - builtins tests require fpic - Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> - -Conflicts: - - gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp ---- - gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -index 9f0b24a..1cb4f97 100644 ---- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -@@ -48,6 +48,14 @@ if { [istarget *-*-eabi*] - lappend additional_flags "-Wl,--allow-multiple-definition" - } - -+<<<<<<< HEAD -+======= -+if [istarget "microblaze*-*-linux*"] { -+ lappend additional_flags "-Wl,-zmuldefs" -+ lappend additional_flags "-fPIC" -+} -+ -+>>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic - foreach src [lsort [find $srcdir/$subdir *.c]] { - if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { - c-torture-execute [list $src \ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch deleted file mode 100644 index 503b1ecf9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 4b675eeabceea22ec51abfa7c37e11a631e58659 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 14:31:10 +0530 -Subject: [PATCH 02/54] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This - particular testcase fails with a timeout. Instead, fail it at compile-time - for microblaze. This speeds up the testsuite without removing it from the - FAIL reports. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> ---- - gcc/testsuite/g++.dg/opt/memcpy1.C | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/gcc/testsuite/g++.dg/opt/memcpy1.C b/gcc/testsuite/g++.dg/opt/memcpy1.C -index 66411cd..d951fee 100644 ---- a/gcc/testsuite/g++.dg/opt/memcpy1.C -+++ b/gcc/testsuite/g++.dg/opt/memcpy1.C -@@ -4,6 +4,10 @@ - // { dg-do compile } - // { dg-options "-O" } - -+#if defined (__MICROBLAZE__) -+#error "too slow on mb. Investigate." -+#endif -+ - typedef unsigned char uint8_t; - typedef uint8_t uint8; - __extension__ typedef __SIZE_TYPE__ size_t; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch deleted file mode 100644 index 390584968..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch +++ /dev/null @@ -1,116 +0,0 @@ -From 03d4d7335be2b2f72c199ab5177685b6dfd1a9d6 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 15:28:38 +0530 -Subject: [PATCH 03/54] [LOCAL]: Testsuite - explicitly add -fivopts for tests - that depend on it (test gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c doesnt - exist in 4.6 branch) - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> ---- - gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- - gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +- - 8 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -index 438db88..ede883e 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -@@ -1,5 +1,5 @@ - /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ --/* { dg-options "-O2 -fdump-tree-ivopts-details" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */ - - void test (int *b, int *e, int stride) - { -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -index 07ff1b7..a09710c 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -@@ -1,5 +1,5 @@ - // { dg-do compile } --// { dg-options "-O2 -fdump-tree-ivopts-details" } -+// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } - - class MinimalVec3 - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -index bda2516..22c8a5d 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -index f0770ab..65d74c8 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -index 5f42857..9bc86ee 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -@@ -1,7 +1,7 @@ - /* A test for induction variable merging. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - - void foo(long); - -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -index 0fa5600..94caa44 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fopt-info-loop-missed -Wunsafe-loop-optimizations" } */ -+/* { dg-options "-O2 -fivopts -fopt-info-loop-missed -Wunsafe-loop-optimizations" } */ - extern void g(void); - - void -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -index 2c6cfc6..648e6e6 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fdump-tree-ivopts" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */ - - void vnum_test8(int *data) - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -index e911bfc..5d3e7e0 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-Os -fdump-tree-optimized" } */ -+/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */ - - /* Slightly changed testcase from PR middle-end/40815. */ - void bar(char*, char*, int); --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch deleted file mode 100644 index e16528b6b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch +++ /dev/null @@ -1,35 +0,0 @@ -From a4c99f7f7775f105eb6f1dfbdf304e6b7e498e2e Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 15:46:28 +0530 -Subject: [PATCH 04/54] [LOCAL]: For dejagnu static testing on qemu, suppress - warnings about multiple definitions from the test function and libc in line - with method used by powerpc. Dynamic linking and using a qemu binary which - understands sysroot resolves all test failures with builtins - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ---- - 1 file changed, 4 deletions(-) - -diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -index 1cb4f97..bdfa08a 100644 ---- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -+++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -@@ -48,14 +48,10 @@ if { [istarget *-*-eabi*] - lappend additional_flags "-Wl,--allow-multiple-definition" - } - --<<<<<<< HEAD --======= - if [istarget "microblaze*-*-linux*"] { - lappend additional_flags "-Wl,-zmuldefs" -- lappend additional_flags "-fPIC" - } - -->>>>>>> 6ef6e5b... [LOCAL]: Testsuite - builtins tests require fpic - foreach src [lsort [find $srcdir/$subdir *.c]] { - if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { - c-torture-execute [list $src \ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch deleted file mode 100644 index 33688f143..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 6b0de6811796b6834d426263eaa855b65c9b3389 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 15:50:35 +0530 -Subject: [PATCH 05/54] [Patch, testsuite]: Add MicroBlaze to target-supports - for atomic buil. .tin tests - -MicroBlaze added to supported targets for atomic builtin tests. - -Changelog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/lib/target-supports.exp: Add microblaze to - check_effective_target_sync_int_long. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/testsuite/lib/target-supports.exp | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index c591acd..94353cc 100644 ---- a/gcc/testsuite/lib/target-supports.exp -+++ b/gcc/testsuite/lib/target-supports.exp -@@ -7428,6 +7428,7 @@ proc check_effective_target_sync_int_long { } { - && [check_effective_target_arm_acq_rel]) - || [istarget bfin*-*linux*] - || [istarget hppa*-*linux*] -+ || [istarget microblaze*-*linux*] - || [istarget s390*-*-*] - || [istarget powerpc*-*-*] - || [istarget crisv32-*-*] || [istarget cris-*-*] --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch deleted file mode 100644 index b428d121c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0005-Testsuite-explicitly-add-fivopts-for-tests-that-depe.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 7f0a129701ce9809d79ea4618f3293062bd24bbf Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Sat, 26 Aug 2017 19:21:18 -0700 -Subject: [PATCH] Testsuite - explicitly add -fivopts for tests that depend on - it - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com> -Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com> -Upstream-Status: Pending ---- - gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C | 2 +- - gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-2.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-4.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/loop-5.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/pr19590.c | 2 +- - gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c | 2 +- - 8 files changed, 8 insertions(+), 8 deletions(-) - -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -index 438db88204..ede883eb28 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C -@@ -1,5 +1,5 @@ - /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ --/* { dg-options "-O2 -fdump-tree-ivopts-details" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } */ - - void test (int *b, int *e, int stride) - { -diff --git a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -index eb72581390..02f3ea4a7d 100644 ---- a/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -+++ b/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C -@@ -1,5 +1,5 @@ - // { dg-do compile } --// { dg-options "-O2 -fdump-tree-ivopts-details" } -+// { dg-options "-O2 -fivopts -fdump-tree-ivopts-details" } - - class MinimalVec3 - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -index bda2516735..22c8a5dcff 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -index f0770abdbb..65d74c8e62 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c -@@ -1,7 +1,7 @@ - /* A test for strength reduction and induction variable elimination. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - /* { dg-require-effective-target size32plus } */ - - /* Size of this structure should be sufficiently weird so that no memory -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -index 5f42857fe1..9bc86ee0d2 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c -@@ -1,7 +1,7 @@ - /* A test for induction variable merging. */ - - /* { dg-do compile } */ --/* { dg-options "-O1 -fdump-tree-optimized" } */ -+/* { dg-options "-O1 -fivopts -fdump-tree-optimized" } */ - - void foo(long); - -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -index 3c8ee06016..db192a657f 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19210-1.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -Wunsafe-loop-optimizations" } */ -+/* { dg-options "-O2 -fivopts -Wunsafe-loop-optimizations" } */ - extern void g(void); - - void -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -index 2c6cfc6f83..648e6e67e8 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-O2 -fdump-tree-ivopts" } */ -+/* { dg-options "-O2 -fivopts -fdump-tree-ivopts" } */ - - void vnum_test8(int *data) - { -diff --git a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -index e911bfcd52..5d3e7e0801 100644 ---- a/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -+++ b/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c -@@ -1,5 +1,5 @@ - /* { dg-do compile } */ --/* { dg-options "-Os -fdump-tree-optimized" } */ -+/* { dg-options "-Os -fivopts -fdump-tree-optimized" } */ - - /* Slightly changed testcase from PR middle-end/40815. */ - void bar(char*, char*, int); --- -2.14.2 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch deleted file mode 100644 index 3e2368f27..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 0d2cca275f3e85ae42dac7888d862975d65ffb36 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 11 Jan 2017 16:20:01 +0530 -Subject: [PATCH 06/54] [Patch, testsuite]: Update MicroBlaze strings test for - new scan-assembly output resulting in use of $LC label - -ChangeLog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/gcc.target/microblaze/others/strings1.c: Update - to include $LC label. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/testsuite/gcc.target/microblaze/others/strings1.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/gcc/testsuite/gcc.target/microblaze/others/strings1.c b/gcc/testsuite/gcc.target/microblaze/others/strings1.c -index 7a63faf..0403b7b 100644 ---- a/gcc/testsuite/gcc.target/microblaze/others/strings1.c -+++ b/gcc/testsuite/gcc.target/microblaze/others/strings1.c -@@ -1,13 +1,15 @@ - /* { dg-options "-O3" } */ - -+/* { dg-final { scan-assembler "\.rodata*" } } */ -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),\\\$LC.*" } } */ -+/* { dg-final { scan-assembler "\lwi\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),*" } } */ -+ - #include <string.h> - --/* { dg-final { scan-assembler "\.rodata*" } } */ - extern void somefunc (char *); - int testfunc () - { - char string2[80]; --/* { dg-final { scan-assembler "\lwi\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,.LC*" } } */ - strcpy (string2, "hello"); - somefunc (string2); - } --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch deleted file mode 100644 index bcd5dbade..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch +++ /dev/null @@ -1,67 +0,0 @@ -From b6f828da3caa827d8ccc08bbf260a2a01b2b2613 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:14:15 +0530 -Subject: [PATCH 07/54] [Patch, testsuite]: Allow MicroBlaze .weakext pattern - in regex match Extend regex pattern to include optional ext at the end of - .weak to match the MicroBlaze weak label .weakext - -ChangeLog/testsuite - -2014-02-14 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler - pattern to take optional ext after .weak. - * gcc/testsuite/g++.dg/abi/thunk4.C: Likewise. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> - -Conflicts: - - gcc/testsuite/g++.dg/abi/rtti3.C ---- - gcc/testsuite/g++.dg/abi/rtti3.C | 4 ++-- - gcc/testsuite/g++.dg/abi/thunk3.C | 2 +- - gcc/testsuite/g++.dg/abi/thunk4.C | 2 +- - 3 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C -index 0cc7d3e..f284cd9 100644 ---- a/gcc/testsuite/g++.dg/abi/rtti3.C -+++ b/gcc/testsuite/g++.dg/abi/rtti3.C -@@ -3,8 +3,8 @@ - - // { dg-require-weak "" } - // { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } } --// { dg-final { scan-assembler ".weak\[ \t\]_?_ZTSPP1A" { target { ! { *-*-darwin* hppa*-*-hpux* } } } } } --// { dg-final { scan-assembler-not ".weak\[ \t\]_?_ZTIPP1A" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler ".weak(ext)?\[ \t\]_?_ZTSPP1A" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler-not ".weak(ext)?\[ \t\]_?_ZTIPP1A" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZTSPP1A" { target { *-*-darwin* } } } } - // { dg-final { scan-assembler-not ".weak_definition\[ \t\]_?_ZTIPP1A" { target { *-*-darwin* } } } } - -diff --git a/gcc/testsuite/g++.dg/abi/thunk3.C b/gcc/testsuite/g++.dg/abi/thunk3.C -index f2347f7..dcec8a7 100644 ---- a/gcc/testsuite/g++.dg/abi/thunk3.C -+++ b/gcc/testsuite/g++.dg/abi/thunk3.C -@@ -1,5 +1,5 @@ - // { dg-require-weak "" } --// { dg-final { scan-assembler-not ".weak\[\t \]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler-not ".weak(ext)?\[\t \]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler-not ".weak_definition\[\t \]_?_ZThn._N7Derived3FooEv" { target { *-*-darwin* } } } } - - struct Base -diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C -index 6e8f124..d1d34fe 100644 ---- a/gcc/testsuite/g++.dg/abi/thunk4.C -+++ b/gcc/testsuite/g++.dg/abi/thunk4.C -@@ -1,6 +1,6 @@ - // { dg-require-weak "" } - // { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } } --// { dg-final { scan-assembler ".weak\[ \t\]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } -+// { dg-final { scan-assembler ".weak(ext)?\[ \t\]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } - // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZThn._N7Derived3FooEv" { target { *-*-darwin* } } } } - - struct Base --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch deleted file mode 100644 index 6232535d2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch +++ /dev/null @@ -1,28 +0,0 @@ -From d27a2545486da9c6a4d3d5ca06b4affb83f8d0a1 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:34:27 +0530 -Subject: [PATCH 08/54] [Patch, testsuite]: Add MicroBlaze to - check_profiling_available Testsuite, add microblaze*-*-* target in - check_profiling_available inline with other archs setting - profiling_available_saved to 0 - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/testsuite/lib/target-supports.exp | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index 94353cc..ecfbe4d 100644 ---- a/gcc/testsuite/lib/target-supports.exp -+++ b/gcc/testsuite/lib/target-supports.exp -@@ -676,6 +676,7 @@ proc check_profiling_available { test_what } { - || [istarget m68k-*-elf] - || [istarget m68k-*-uclinux*] - || [istarget mips*-*-elf*] -+ || [istarget microblaze*-*-*] - || [istarget mmix-*-*] - || [istarget mn10300-*-elf*] - || [istarget moxie-*-elf*] --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0009-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0009-Patch-microblaze-Fix-atomic-side-effects.patch deleted file mode 100644 index db730f438..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0009-Patch-microblaze-Fix-atomic-side-effects.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 8711bdfe27bce04d35ba93a1d18ccccd61371829 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:41:43 +0530 -Subject: [PATCH 09/54] [Patch, microblaze]: Fix atomic side effects. In - atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions - during optimization. Previously, the outputs were considered unused; this - generated assembly code with undefined side effects after invocation of the - atomic. - -Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/config/microblaze/microblaze.md | 3 +++ - gcc/config/microblaze/sync.md | 21 +++++++++++++-------- - 2 files changed, 16 insertions(+), 8 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index f698e54..93f5fa2 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -41,6 +41,9 @@ - (UNSPEC_CMP 104) ;; signed compare - (UNSPEC_CMPU 105) ;; unsigned compare - (UNSPEC_TLS 106) ;; jump table -+ (UNSPECV_CAS_BOOL 201) ;; compare and swap (bool) -+ (UNSPECV_CAS_VAL 202) ;; compare and swap (val) -+ (UNSPECV_CAS_MEM 203) ;; compare and swap (mem) - ]) - - (define_c_enum "unspec" [ -diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index b34bd54..8e694e9 100644 ---- a/gcc/config/microblaze/sync.md -+++ b/gcc/config/microblaze/sync.md -@@ -18,14 +18,19 @@ - ;; <http://www.gnu.org/licenses/>. - - (define_insn "atomic_compare_and_swapsi" -- [(match_operand:SI 0 "register_operand" "=&d") ;; bool output -- (match_operand:SI 1 "register_operand" "=&d") ;; val output -- (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory -- (match_operand:SI 3 "register_operand" "d") ;; expected value -- (match_operand:SI 4 "register_operand" "d") ;; desired value -- (match_operand:SI 5 "const_int_operand" "") ;; is_weak -- (match_operand:SI 6 "const_int_operand" "") ;; mod_s -- (match_operand:SI 7 "const_int_operand" "") ;; mod_f -+ [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output -+ (unspec_volatile:SI -+ [(match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory -+ (match_operand:SI 3 "register_operand" "d") ;; expected value -+ (match_operand:SI 4 "register_operand" "d")] ;; desired value -+ UNSPECV_CAS_BOOL)) -+ (set (match_operand:SI 1 "register_operand" "=&d") ;; val output -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_VAL)) -+ (set (match_dup 2) -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_MEM)) -+ (match_operand:SI 5 "const_int_operand" "") ;; is_weak -+ (match_operand:SI 6 "const_int_operand" "") ;; mod_s -+ (match_operand:SI 7 "const_int_operand" "") ;; mod_f - (clobber (match_scratch:SI 8 "=&d"))] - "" - { --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch deleted file mode 100644 index 5058529ad..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 92015c19e5d1baabd62067bf1cfc4522e85d1b25 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:45:45 +0530 -Subject: [PATCH 10/54] [Patch, microblaze]: Fix atomic boolean return value. - In atomic_compare_and_swapsi, fix boolean return value. Previously, it - contained zero if successful and non-zero if unsuccessful. - -Signed-off-by: Kirk Meyer <kirk.meyer@sencore.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/config/microblaze/sync.md | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index 8e694e9..8ddb10d 100644 ---- a/gcc/config/microblaze/sync.md -+++ b/gcc/config/microblaze/sync.md -@@ -34,15 +34,16 @@ - (clobber (match_scratch:SI 8 "=&d"))] - "" - { -- output_asm_insn ("addc \tr0,r0,r0", operands); -+ output_asm_insn ("add \t%0,r0,r0", operands); - output_asm_insn ("lwx \t%1,%y2,r0", operands); - output_asm_insn ("addic\t%8,r0,0", operands); - output_asm_insn ("bnei \t%8,.-8", operands); -- output_asm_insn ("cmp \t%0,%1,%3", operands); -- output_asm_insn ("bnei \t%0,.+16", operands); -+ output_asm_insn ("cmp \t%8,%1,%3", operands); -+ output_asm_insn ("bnei \t%8,.+20", operands); - output_asm_insn ("swx \t%4,%y2,r0", operands); - output_asm_insn ("addic\t%8,r0,0", operands); - output_asm_insn ("bnei \t%8,.-28", operands); -+ output_asm_insn ("addi \t%0,r0,1", operands); - return ""; - } - ) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch deleted file mode 100644 index 2451c9385..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 658476aef537c0c2d031eb1c7a001f00c1d9bf7b Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:50:17 +0530 -Subject: [PATCH 11/54] [Patch, microblaze]: Fix the Microblaze crash with - msmall-divides flag Compiler is crashing when we use msmall-divides and - mxl-barrel-shift flag. This is because when use above flags - microblaze_expand_divide function will be called for division operation. In - microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't - have subreg register due to this compiler was crashing. Changed the logic to - avoid sub_reg call - -Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> ---- - gcc/config/microblaze/microblaze.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 9a4a287..cbe8cb7 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3575,8 +3575,7 @@ microblaze_expand_divide (rtx operands[]) - mem_rtx = gen_rtx_MEM (QImode, - gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); - -- insn = emit_insn (gen_movqi (regqi, mem_rtx)); -- insn = emit_insn (gen_movsi (operands[0], gen_rtx_SUBREG (SImode, regqi, 0))); -+ insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); - jump = emit_jump_insn_after (gen_jump (div_end_label), insn); - JUMP_LABEL (jump) = div_end_label; - LABEL_NUSES (div_end_label) = 1; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch deleted file mode 100644 index b58df8731..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 64f1a238641616c9cca5823d7ca99e76a7c2a490 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 16:52:56 +0530 -Subject: [PATCH 12/54] [Patch, microblaze]: Added ashrsi3_with_size_opt Added - ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os - optimization is used. lshrsi3_with_size_opt is being removed as it has - conflicts with unsigned int variables - -Signed-off-by:Nagaraju Mekala <nmekala@xilix.com> ---- - gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 93f5fa2..fe90a14 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1506,6 +1506,27 @@ - (set_attr "length" "4,4")] - ) - -+(define_insn "*ashrsi3_with_size_opt" -+ [(set (match_operand:SI 0 "register_operand" "=&d") -+ (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "immediate_operand" "I")))] -+ "(INTVAL (operands[2]) > 5 && optimize_size)" -+ { -+ operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("ori\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addik\t%3,%3,-1", operands); -+ output_asm_insn ("bneid\t%3,.-4", operands); -+ return "sra\t%0,%0"; -+ } -+ [(set_attr "type" "arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "20")] -+) -+ - (define_insn "*ashrsi_inline" - [(set (match_operand:SI 0 "register_operand" "=&d") - (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch deleted file mode 100644 index 6af0f10e2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch +++ /dev/null @@ -1,41 +0,0 @@ -From ed23e22fb25a2d3dc357c0743f51b2735fc46a6a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 17:50:03 +0530 -Subject: [PATCH 13/54] [Patch, microblaze]: Fixed missing save of r18 in - fast_interrupt. Register 18 is used as a clobber register, and must be stored - when entering a fast_interrupt. Before this fix, register 18 was only saved - if it was used directly in the interrupt function. - -However, if the fast_interrupt function called a function that used -r18, the register would not be saved, and thus be mangled -upon returning from the interrupt. - -Changelog - -2014-02-27 Klaus Petersen <klauspetersen@gmail.com> - - * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in - microblaze_must_save_register. - -Signed-off-by: Klaus Petersen <klauspetersen@gmail.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/config/microblaze/microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index cbe8cb7..6f0b4f4 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1967,7 +1967,7 @@ microblaze_must_save_register (int regno) - { - if (df_regs_ever_live_p (regno) - || regno == MB_ABI_MSR_SAVE_REG -- || (interrupt_handler -+ || ((interrupt_handler || fast_interrupt) - && (regno == MB_ABI_ASM_TEMP_REGNUM - || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM))) - return 1; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch deleted file mode 100644 index f47265b07..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 582558f3c18d096885ab24e645899f310b148b5c Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 10:57:19 +0530 -Subject: [PATCH 14/54] [Patch, microblaze]: Use bralid for profiler calls - Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> - ---- - gcc/config/microblaze/microblaze.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 0d3718f..88e0351 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -486,7 +486,7 @@ typedef struct microblaze_args - - #define FUNCTION_PROFILER(FILE, LABELNO) { \ - { \ -- fprintf (FILE, "\tbrki\tr16,_mcount\n"); \ -+ fprintf (FILE, "\tbralid\tr15,_mcount\nnop\n"); \ - } \ - } - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0015-Patch-microblaze-Disable-fivopts-by-default.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0015-Patch-microblaze-Disable-fivopts-by-default.patch deleted file mode 100644 index acfa083f2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0015-Patch-microblaze-Disable-fivopts-by-default.patch +++ /dev/null @@ -1,42 +0,0 @@ -From b60068cbdd3c830e541fbd35f2ed119245911461 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 11:10:21 +0530 -Subject: [PATCH 15/54] [Patch, microblaze]: Disable fivopts by default Turn - off ivopts by default. Interferes with cse. - -Changelog - -2013-03-18 Edgar E. Iglesias <edgar.iglesias@xilinx.com> - - * gcc/common/config/microblaze/microblaze-common.c - (microblaze_option_optimization_table): Disable fivopts by default. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/common/config/microblaze/microblaze-common.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c -index 3e75675..fe45f2e 100644 ---- a/gcc/common/config/microblaze/microblaze-common.c -+++ b/gcc/common/config/microblaze/microblaze-common.c -@@ -24,6 +24,15 @@ - #include "common/common-target.h" - #include "common/common-target-def.h" - -+/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */ -+static const struct default_options microblaze_option_optimization_table[] = -+ { -+ /* Turn off ivopts by default. It messes up cse. */ -+ { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 }, -+ { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, -+ { OPT_LEVELS_NONE, 0, NULL, 0 } -+ }; -+ - #undef TARGET_DEFAULT_TARGET_FLAGS - #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0016-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0016-Patch-microblaze-Removed-moddi3-routinue.patch deleted file mode 100644 index dbd7b2e2c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0016-Patch-microblaze-Removed-moddi3-routinue.patch +++ /dev/null @@ -1,157 +0,0 @@ -From 640628680ff6f028ad6d5fef2e41da29664f036f Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 12 Jan 2017 17:36:16 +0530 -Subject: [PATCH 16/54] [Patch, microblaze]: Removed moddi3 routinue Using the - default moddi3 function as the existing implementation has many bugs - -Signed-off-by:Nagaraju <nmekala@xilix.com> ---- - libgcc/config/microblaze/moddi3.S | 121 ---------------------------------- - libgcc/config/microblaze/t-microblaze | 3 +- - 2 files changed, 1 insertion(+), 123 deletions(-) - delete mode 100644 libgcc/config/microblaze/moddi3.S - -diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S -deleted file mode 100644 -index a8f17d7..0000000 ---- a/libgcc/config/microblaze/moddi3.S -+++ /dev/null -@@ -1,121 +0,0 @@ --################################### --# --# Copyright (C) 2009-2018 Free Software Foundation, Inc. --# --# Contributed by Michael Eager <eager@eagercon.com>. --# --# This file is free software; you can redistribute it and/or modify it --# under the terms of the GNU General Public License as published by the --# Free Software Foundation; either version 3, or (at your option) any --# later version. --# --# GCC is distributed in the hope that it will be useful, but WITHOUT --# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public --# License for more details. --# --# Under Section 7 of GPL version 3, you are granted additional --# permissions described in the GCC Runtime Library Exception, version --# 3.1, as published by the Free Software Foundation. --# --# You should have received a copy of the GNU General Public License and --# a copy of the GCC Runtime Library Exception along with this program; --# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --# <http://www.gnu.org/licenses/>. --# --# modsi3.S --# --# modulo operation for 64 bit integers. --# --####################################### -- -- --/* An executable stack is *not* required for these functions. */ --#ifdef __linux__ --.section .note.GNU-stack,"",%progbits --.previous --#endif -- -- .globl __moddi3 -- .ent __moddi3 --__moddi3: -- .frame r1,0,r15 -- --#Change the stack pointer value and Save callee saved regs -- addik r1,r1,-24 -- swi r25,r1,0 -- swi r26,r1,4 -- swi r27,r1,8 # used for sign -- swi r28,r1,12 # used for loop count -- swi r29,r1,16 # Used for div value High -- swi r30,r1,20 # Used for div value Low -- --#Check for Zero Value in the divisor/dividend -- OR r9,r5,r6 # Check for the op1 being zero -- BEQID r9,$LaResult_Is_Zero # Result is zero -- OR r9,r7,r8 # Check for the dividend being zero -- BEQI r9,$LaDiv_By_Zero # Div_by_Zero # Division Error -- BGEId r5,$La1_Pos -- XOR r27,r5,r7 # Get the sign of the result -- RSUBI r6,r6,0 # Make dividend positive -- RSUBIC r5,r5,0 # Make dividend positive --$La1_Pos: -- BGEI r7,$La2_Pos -- RSUBI r8,r8,0 # Make Divisor Positive -- RSUBIC r9,r9,0 # Make Divisor Positive --$La2_Pos: -- ADDIK r4,r0,0 # Clear mod low -- ADDIK r3,r0,0 # Clear mod high -- ADDIK r29,r0,0 # clear div high -- ADDIK r30,r0,0 # clear div low -- ADDIK r28,r0,64 # Initialize the loop count -- # First part try to find the first '1' in the r5/r6 --$LaDIV1: -- ADD r6,r6,r6 -- ADDC r5,r5,r5 # left shift logical r5 -- BGEID r5,$LaDIV1 -- ADDIK r28,r28,-1 --$LaDIV2: -- ADD r6,r6,r6 -- ADDC r5,r5,r5 # left shift logical r5/r6 get the '1' into the Carry -- ADDC r4,r4,r4 # Move that bit into the Mod register -- ADDC r3,r3,r3 # Move carry into high mod register -- rsub r18,r7,r3 # Compare the High Parts of Mod and Divisor -- bnei r18,$L_High_EQ -- rsub r18,r6,r4 # Compare Low Parts only if Mod[h] == Divisor[h] --$L_High_EQ: -- rSUB r26,r8,r4 # Subtract divisor[L] from Mod[L] -- rsubc r25,r7,r3 # Subtract divisor[H] from Mod[H] -- BLTi r25,$LaMOD_TOO_SMALL -- OR r3,r0,r25 # move r25 to mod [h] -- OR r4,r0,r26 # move r26 to mod [l] -- ADDI r30,r30,1 -- ADDC r29,r29,r0 --$LaMOD_TOO_SMALL: -- ADDIK r28,r28,-1 -- BEQi r28,$LaLOOP_END -- ADD r30,r30,r30 # Shift in the '1' into div [low] -- ADDC r29,r29,r29 # Move the carry generated into high -- BRI $LaDIV2 # Div2 --$LaLOOP_END: -- BGEI r27,$LaRETURN_HERE -- rsubi r30,r30,0 -- rsubc r29,r29,r0 -- BRI $LaRETURN_HERE --$LaDiv_By_Zero: --$LaResult_Is_Zero: -- or r29,r0,r0 # set result to 0 [High] -- or r30,r0,r0 # set result to 0 [Low] --$LaRETURN_HERE: --# Restore values of CSRs and that of r29 and the divisor and the dividend -- -- lwi r25,r1,0 -- lwi r26,r1,4 -- lwi r27,r1,8 -- lwi r28,r1,12 -- lwi r29,r1,16 -- lwi r30,r1,20 -- rtsd r15,8 -- addik r1,r1,24 -- .end __moddi3 -- -diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze -index 96959f0..8d954a4 100644 ---- a/libgcc/config/microblaze/t-microblaze -+++ b/libgcc/config/microblaze/t-microblaze -@@ -1,8 +1,7 @@ --LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _moddi3 _mulsi3 _udivsi3 _umodsi3 -+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 - - LIB2ADD += \ - $(srcdir)/config/microblaze/divsi3.S \ -- $(srcdir)/config/microblaze/moddi3.S \ - $(srcdir)/config/microblaze/modsi3.S \ - $(srcdir)/config/microblaze/muldi3_hard.S \ - $(srcdir)/config/microblaze/mulsi3.S \ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch deleted file mode 100644 index 6fb1b32fe..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch +++ /dev/null @@ -1,101 +0,0 @@ -From c0e74b79cc1db2f68dd560154225da1e5ddfd920 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 14:41:58 +0530 -Subject: [PATCH 17/54] [Patch, microblaze]: Add INIT_PRIORITY support Added - TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros. - -These macros allows users to control the order of initialization -of objects defined at namespace scope with the init_priority -attribute by specifying a relative priority, a constant integral -expression currently bounded between 101 and 65535 inclusive. - -Lower numbers indicate a higher priority. - -Changelog - -2013-11-26 Nagaraju Mekala <nagaraju.mekala@xilinx.com> - - * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor, - microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and - TARGET_ASM_DESTRUCTOR. - -Signed-off-by:nagaraju <nmekala@xilix.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/config/microblaze/microblaze.c | 53 ++++++++++++++++++++++++++++++++++++++ - 1 file changed, 53 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 6f0b4f4..53b44df 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2554,6 +2554,53 @@ print_operand_address (FILE * file, rtx addr) - } - } - -+/* Output an element in the table of global constructors. */ -+void -+microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) -+{ -+ const char *section = ".ctors"; -+ char buf[16]; -+ -+ if (priority != DEFAULT_INIT_PRIORITY) -+ { -+ sprintf (buf, ".ctors.%.5u", -+ /* Invert the numbering so the linker puts us in the proper -+ order; constructors are run from right to left, and the -+ linker sorts in increasing order. */ -+ MAX_INIT_PRIORITY - priority); -+ section = buf; -+ } -+ -+ switch_to_section (get_section (section, 0, NULL)); -+ assemble_align (POINTER_SIZE); -+ fputs ("\t.word\t", asm_out_file); -+ output_addr_const (asm_out_file, symbol); -+ fputs ("\n", asm_out_file); -+} -+ -+/* Output an element in the table of global destructors. */ -+void -+microblaze_asm_destructor (rtx symbol, int priority) -+{ -+ const char *section = ".dtors"; -+ char buf[16]; -+ if (priority != DEFAULT_INIT_PRIORITY) -+ { -+ sprintf (buf, ".dtors.%.5u", -+ /* Invert the numbering so the linker puts us in the proper -+ order; constructors are run from right to left, and the -+ linker sorts in increasing order. */ -+ MAX_INIT_PRIORITY - priority); -+ section = buf; -+ } -+ -+ switch_to_section (get_section (section, 0, NULL)); -+ assemble_align (POINTER_SIZE); -+ fputs ("\t.word\t", asm_out_file); -+ output_addr_const (asm_out_file, symbol); -+ fputs ("\n", asm_out_file); -+} -+ - /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol - is used, so that we don't emit an .extern for it in - microblaze_asm_file_end. */ -@@ -3841,6 +3888,12 @@ microblaze_starting_frame_offset (void) - #undef TARGET_ATTRIBUTE_TABLE - #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table - -+#undef TARGET_ASM_CONSTRUCTOR -+#define TARGET_ASM_CONSTRUCTOR microblaze_asm_constructor -+ -+#undef TARGET_ASM_DESTRUCTOR -+#define TARGET_ASM_DESTRUCTOR microblaze_asm_destructor -+ - #undef TARGET_IN_SMALL_DATA_P - #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0018-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0018-Patch-microblaze-Add-optimized-lshrsi3.patch deleted file mode 100644 index ab2473a37..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0018-Patch-microblaze-Add-optimized-lshrsi3.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 2cba68c3e27ffaea77cc5469233cf4dcb9383142 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 15:23:57 +0530 -Subject: [PATCH 18/54] [Patch, microblaze]: Add optimized lshrsi3 When barrel - shifter is not present, the immediate value is greater than #5 and - optimization is -OS, the compiler will generate shift operation using loop. - -Changelog - -2013-11-26 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn - -ChangeLog/testsuite - -2014-02-12 David Holsgrove <david.holsgrove@xilinx.com> - - * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test. - -Signed-off-by:Nagaraju <nmekala@xilix.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> ---- - gcc/config/microblaze/microblaze.md | 21 +++++++++++++++++++++ - .../gcc.target/microblaze/others/lshrsi_Os_1.c | 13 +++++++++++++ - 2 files changed, 34 insertions(+) - create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index fe90a14..c063ffc 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1616,6 +1616,27 @@ - (set_attr "length" "4,4")] - ) - -+(define_insn "*lshrsi3_with_size_opt" -+ [(set (match_operand:SI 0 "register_operand" "=&d") -+ (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "immediate_operand" "I")))] -+ "(INTVAL (operands[2]) > 5 && optimize_size)" -+ { -+ operands[3] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("ori\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addik\t%3,%3,-1", operands); -+ output_asm_insn ("bneid\t%3,.-4", operands); -+ return "srl\t%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "SI") -+ (set_attr "length" "20")] -+) -+ - (define_insn "*lshrsi_inline" - [(set (match_operand:SI 0 "register_operand" "=&d") - (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") -diff --git a/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c -new file mode 100644 -index 0000000..32a3be7 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-Os -mno-xl-barrel-shift" } */ -+ -+void testfunc(void) -+{ -+ unsigned volatile int z = 8192; -+ z >>= 8; -+} -+/* { dg-final { scan-assembler-not "\bsrli" } } */ -+/* { dg-final { scan-assembler "\ori\tr18,r0" } } */ -+/* { dg-final { scan-assembler "addk\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0" } } */ -+/* { dg-final { scan-assembler "addik\tr18,r18,-1" } } */ -+/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */ -+/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0019-Patch-microblaze-Modified-trap-instruction.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0019-Patch-microblaze-Modified-trap-instruction.patch deleted file mode 100644 index 5afcff434..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0019-Patch-microblaze-Modified-trap-instruction.patch +++ /dev/null @@ -1,29 +0,0 @@ -From e8b05b5105655d276c93864ab90e15bfbe46cf74 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 15:42:15 +0530 -Subject: [PATCH 19/54] [Patch, microblaze]: Modified trap instruction The - instruction was wrongly written to brki r0,-1 it should be bri r0. Modified - with the correct instruction - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - :Ajit Agarwal <ajitkum@xilinx.com> ---- - gcc/config/microblaze/microblaze.md | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index c063ffc..7bbdbe1 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2344,7 +2344,7 @@ - (define_insn "trap" - [(trap_if (const_int 1) (const_int 0))] - "" -- "brki\tr0,-1" -+ "bri\t0" - [(set_attr "type" "trap")] - ) - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch deleted file mode 100644 index 6e07ac4fc..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch +++ /dev/null @@ -1,206 +0,0 @@ -From 0cc6aabbd3f7b331c3995f11efec545499297358 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 16:42:44 +0530 -Subject: [PATCH 20/54] [Patch, microblaze]: Reducing Stack space for arguments - Currently in Microblaze target stack space for arguments in register is being - allocated even if there are no arguments in the function. This patch will - optimize the extra 24 bytes that are being allocated. - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - :Ajit Agarwal <ajitkum@xilinx.com> - -ChangeLog: -2015-04-17 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *microblaze.c (microblaze_parm_needs_stack, microblaze_function_parms_need_stack): New - *microblaze.c (REG_PARM_STACK_SPACE): Modify ---- - gcc/config/microblaze/microblaze-protos.h | 1 + - gcc/config/microblaze/microblaze.c | 134 +++++++++++++++++++++++++++++- - gcc/config/microblaze/microblaze.h | 4 +- - 3 files changed, 136 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index 4cbba0c..f8a56f7 100644 ---- a/gcc/config/microblaze/microblaze-protos.h -+++ b/gcc/config/microblaze/microblaze-protos.h -@@ -58,6 +58,7 @@ extern int symbol_mentioned_p (rtx); - extern int label_mentioned_p (rtx); - extern bool microblaze_cannot_force_const_mem (machine_mode, rtx); - extern void microblaze_eh_return (rtx op0); -+int microblaze_reg_parm_stack_space(tree fun); - #endif /* RTX_CODE */ - - /* Declare functions in microblaze-c.c. */ -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 53b44df..0dec362 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1989,6 +1989,138 @@ microblaze_must_save_register (int regno) - return 0; - } - -+static bool -+microblaze_parm_needs_stack (cumulative_args_t args_so_far, tree type) -+{ -+ enum machine_mode mode; -+ int unsignedp; -+ rtx entry_parm; -+ -+ /* Catch errors. */ -+ if (type == NULL || type == error_mark_node) -+ return true; -+ -+ if (TREE_CODE (type) == POINTER_TYPE) -+ return true; -+ -+ /* Handle types with no storage requirement. */ -+ if (TYPE_MODE (type) == VOIDmode) -+ return false; -+ -+ /* Handle complex types. */ -+ if (TREE_CODE (type) == COMPLEX_TYPE) -+ return (microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type)) -+ || microblaze_parm_needs_stack (args_so_far, TREE_TYPE (type))); -+ -+ /* Handle transparent aggregates. */ -+ if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) -+ && TYPE_TRANSPARENT_AGGR (type)) -+ type = TREE_TYPE (first_field (type)); -+ -+ /* See if this arg was passed by invisible reference. */ -+ if (pass_by_reference (get_cumulative_args (args_so_far), -+ TYPE_MODE (type), type, true)) -+ type = build_pointer_type (type); -+ -+ /* Find mode as it is passed by the ABI. */ -+ unsignedp = TYPE_UNSIGNED (type); -+ mode = promote_mode (type, TYPE_MODE (type), &unsignedp); -+ -+/* If there is no incoming register, we need a stack. */ -+ entry_parm = microblaze_function_arg (args_so_far, mode, type, true); -+ if (entry_parm == NULL) -+ return true; -+ -+ /* Likewise if we need to pass both in registers and on the stack. */ -+ if (GET_CODE (entry_parm) == PARALLEL -+ && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) -+ return true; -+ -+ /* Also true if we're partially in registers and partially not. */ -+ if (function_arg_partial_bytes (args_so_far, mode, type, true) != 0) -+ return true; -+ -+ /* Update info on where next arg arrives in registers. */ -+ microblaze_function_arg_advance (args_so_far, mode, type, true); -+ return false; -+ } -+ -+static bool -+microblaze_function_parms_need_stack (tree fun, bool incoming) -+{ -+ tree fntype, result; -+ CUMULATIVE_ARGS args_so_far_v; -+ cumulative_args_t args_so_far; -+ int num_of_args = 0; -+ -+ /* Must be a libcall, all of which only use reg parms. */ -+ if (!fun) -+ return true; -+ -+ fntype = fun; -+ if (!TYPE_P (fun)) -+ fntype = TREE_TYPE (fun); -+ -+ /* Varargs functions need the parameter save area. */ -+ if ((!incoming && !prototype_p (fntype)) || stdarg_p (fntype)) -+ return true; -+ -+ INIT_CUMULATIVE_ARGS(args_so_far_v, fntype, NULL_RTX,0,0); -+ args_so_far = pack_cumulative_args (&args_so_far_v); -+ -+ /* When incoming, we will have been passed the function decl. -+ * It is necessary to use the decl to handle K&R style functions, -+ * where TYPE_ARG_TYPES may not be available. */ -+ if (incoming) -+ { -+ gcc_assert (DECL_P (fun)); -+ result = DECL_RESULT (fun); -+ } -+ else -+ result = TREE_TYPE (fntype); -+ -+ if (result && aggregate_value_p (result, fntype)) -+ { -+ if (!TYPE_P (result)) -+ result = build_pointer_type (result); -+ microblaze_parm_needs_stack (args_so_far, result); -+ } -+ -+ if (incoming) -+ { -+ tree parm; -+ for (parm = DECL_ARGUMENTS (fun); -+ parm && parm != void_list_node; -+ parm = TREE_CHAIN (parm)) -+ if (microblaze_parm_needs_stack (args_so_far, TREE_TYPE (parm))) -+ return true; -+ } -+ else -+ { -+ function_args_iterator args_iter; -+ tree arg_type; -+ -+ FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter) -+ { -+ num_of_args++; -+ if (microblaze_parm_needs_stack (args_so_far, arg_type)) -+ return true; -+ } -+ } -+ -+ if (num_of_args > 3) return true; -+ -+ return false; -+} -+ -+int microblaze_reg_parm_stack_space(tree fun) -+{ -+ if (microblaze_function_parms_need_stack (fun,false)) -+ return MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD; -+ else -+ return 0; -+} -+ - /* Return the bytes needed to compute the frame pointer from the current - stack pointer. - -@@ -3298,7 +3430,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, - emit_insn (gen_indirect_jump (temp2)); - - /* Run just enough of rest_of_compilation. This sequence was -- "borrowed" from rs6000.c. */ -+ "borrowed" from microblaze.c. */ - insn = get_insns (); - shorten_branches (insn); - final_start_function (insn, file, 1); -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 88e0351..9f74ec8 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -434,9 +434,9 @@ extern struct microblaze_frame_info current_frame_info; - - #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 - --#define REG_PARM_STACK_SPACE(FNDECL) (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) -+#define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL) - --#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 -+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 - - #define STACK_BOUNDARY 32 - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0021-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0021-Patch-microblaze-Add-cbranchsi4_reg.patch deleted file mode 100644 index b04ee5802..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0021-Patch-microblaze-Add-cbranchsi4_reg.patch +++ /dev/null @@ -1,159 +0,0 @@ -From f846bd900d5277dd9defb5fe0625f97e3417ee61 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 17:04:37 +0530 -Subject: [PATCH 21/54] [Patch, microblaze]: Add cbranchsi4_reg This patch - optimizes the generation of pcmpne/pcmpeq instruction if the compare - instruction has no immediate values.For the immediate values the xor - instruction is generated - -Signed-off-by: Nagaraju Mekala <nmekala@xilix.com> -Signed-off-by: Ajit Agarwal <ajitkum@xilinx.com> - -ChangeLog: -2015-01-13 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *microblaze.md (cbranchsi4_reg): New - *microblaze.c (microblaze_expand_conditional_branch_reg): New - -Conflicts: - - gcc/config/microblaze/microblaze-protos.h ---- - gcc/config/microblaze/microblaze-protos.h | 2 +- - gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c | 2 +- - gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c | 2 +- - gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c | 2 +- - gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c | 2 +- - gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c | 14 +++++++------- - gcc/testsuite/gcc.target/microblaze/isa/vanilla.c | 12 ++++++------ - gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c | 2 +- - 8 files changed, 19 insertions(+), 19 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index f8a56f7..c39e2e9 100644 ---- a/gcc/config/microblaze/microblaze-protos.h -+++ b/gcc/config/microblaze/microblaze-protos.h -@@ -32,7 +32,7 @@ extern int microblaze_expand_shift (rtx *); - extern bool microblaze_expand_move (machine_mode, rtx *); - extern bool microblaze_expand_block_move (rtx, rtx, rtx, rtx); - extern void microblaze_expand_divide (rtx *); --extern void microblaze_expand_conditional_branch (machine_mode, rtx *); -+extern void microblaze_expand_conditional_branch (enum machine_mode, rtx *); - extern void microblaze_expand_conditional_branch_reg (machine_mode, rtx *); - extern void microblaze_expand_conditional_branch_sf (rtx *); - extern int microblaze_can_use_return_insn (void); -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c -index 4041a24..ccc6a46 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp1.c -@@ -6,5 +6,5 @@ void float_func () - { - /* { dg-final { scan-assembler "fcmp\.(le|gt)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ - if (f2 <= f3) -- print ("le"); -+ f2 = f3; - } -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c -index 3902b83..1dd5fe6 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp2.c -@@ -6,5 +6,5 @@ void float_func () - { - /* { dg-final { scan-assembler "fcmp\.(lt|ge)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ - if (f2 < f3) -- print ("lt"); -+ f2 = f3; - } -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c -index 8555974..d6f80fb 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp3.c -@@ -6,5 +6,5 @@ void float_func () - { - /* { dg-final { scan-assembler "fcmp\.(eq|ne)\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ - if (f2 == f3) -- print ("eq"); -+ f1 = f2 + f3; - } -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c -index 79cc5f9..d117724 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/fcmp4.c -@@ -5,5 +5,5 @@ void float_func(float f1, float f2, float f3) - /* { dg-final { scan-assembler "fcmp\.eq\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ - /* { dg-final { scan-assembler "fcmp\.le\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */ - if(f1==f2 && f1<=f3) -- print ("f1 eq f2 && f1 le f3"); -+ f2 = f3; - } -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c -index ebfb170..7582297 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/nofcmp.c -@@ -5,17 +5,17 @@ volatile float f1, f2, f3; - void float_func () - { - /* { dg-final { scan-assembler-not "fcmp" } } */ -- if (f2 <= f3) -- print ("le"); -+ if (f2 <= f3) -+ f1 = f3; - else if (f2 == f3) -- print ("eq"); -+ f1 = f3; - else if (f2 < f3) -- print ("lt"); -+ f1 = f3; - else if (f2 > f3) -- print ("gt"); -+ f1 = f3; - else if (f2 >= f3) -- print ("ge"); -+ f1 = f3; - else if (f2 != f3) -- print ("ne"); -+ f1 = f3; - - } -diff --git a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c -index 1d6ba80..532c035 100644 ---- a/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c -+++ b/gcc/testsuite/gcc.target/microblaze/isa/vanilla.c -@@ -74,16 +74,16 @@ void float_cmp_func () - { - /* { dg-final { scan-assembler-not "fcmp" } } */ - if (f2 <= f3) -- print ("le"); -+ f1 = f3; - else if (f2 == f3) -- print ("eq"); -+ f1 = f3; - else if (f2 < f3) -- print ("lt"); -+ f1 = f3; - else if (f2 > f3) -- print ("gt"); -+ f1 = f3; - else if (f2 >= f3) -- print ("ge"); -+ f1 = f3; - else if (f2 != f3) -- print ("ne"); -+ f1 = f3; - - } -diff --git a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c -index fdcde1f..580b4db 100644 ---- a/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c -+++ b/gcc/testsuite/gcc.target/microblaze/others/builtin-trap.c -@@ -5,4 +5,4 @@ void trap () - __builtin_trap (); - } - --/* { dg-final { scan-assembler "brki\tr0,-1" } } */ -\ No newline at end of file -+/* { dg-final { scan-assembler "bri\t0" } } */ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch deleted file mode 100644 index beeb80fda..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 7d70a287544dd915b66a5658a3857ebecb8b3583 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 17:11:04 +0530 -Subject: [PATCH 22/54] [Patch,microblaze]: Inline Expansion of fsqrt builtin. - The changes are made in the patch for the inline expansion of the fsqrt - builtin with fqrt instruction. The sqrt math function takes double as - argument and return double as argument. The pattern is selected while - expanding the unary op through expand_unop which passes DFmode and the DFmode - pattern was not there returning zero. Thus the sqrt math function is not - inlined and expanded. The pattern with DFmode argument is added. Also the - source and destination argument is not same the DF through two different - consecutive registers with lower 32 bit is the argument passed to sqrt and - the higher 32 bit is zero. If the source and destinations are different the - DFmode 64 bits registers is not set properly giving the problem in runtime. - Such changes are taken care in the implementation of the pattern for DFmode - for inline expansion of the sqrt. - -ChangeLog: -2015-06-16 Ajit Agarwal <ajitkum@xilinx.com> - Nagaraju Mekala <nmekala@xilinx.com> - - * config/microblaze/microblaze.md (sqrtdf2): New - pattern. - -Signed-off-by:Ajit Agarwal ajitkum@xilinx.com - Nagaraju Mekala nmekala@xilinx.com ---- - gcc/config/microblaze/microblaze.md | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 7bbdbe1..3a53e24 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -449,6 +449,20 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -+(define_insn "sqrtdf2" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))] -+ "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT" -+ { -+ if (REGNO (operands[0]) == REGNO (operands[1])) -+ return "fsqrt\t%0,%1"; -+ else -+ return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0"; -+ } -+ [(set_attr "type" "fsqrt") -+ (set_attr "mode" "SF") -+ (set_attr "length" "4")]) -+ - (define_insn "fix_truncsfsi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:SF 1 "register_operand" "d")))] --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch deleted file mode 100644 index 8f5bed52a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch +++ /dev/null @@ -1,47 +0,0 @@ -From a28768eec0a9d5137196bed8e8c6d284cf4c3cbc Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 17:33:31 +0530 -Subject: [PATCH 23/54] [Patch] OPT: Update heuristics for loop-invariant for - address arithme. .tic. - -The changes are made in the patch to update the heuristics -for loop invariant for address arithmetic. The heuristics is -changed to calculate the estimated register pressure cost when -ira based register pressure is not enabled. The estimated -register pressure cost modifies the existing calculation cost -associated to perform the Loop invariant code motion for address -arithmetic. - -ChangeLog: -2015-06-17 Ajit Agarwal <ajitkum@xilinx.com> - Nagaraju Mekala <nmekala@xilinx.com> - - * loop-invariant.c (gain_for_invariant): update the - heuristics for estimate_reg_pressure_cost. - -Signed-off-by:Ajit Agarwal ajitkum@xilinx.com - Nagaraju Mekala nmekala@xilinx.com ---- - gcc/loop-invariant.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c -index bd31a51..8e22ca0 100644 ---- a/gcc/loop-invariant.c -+++ b/gcc/loop-invariant.c -@@ -1466,10 +1466,8 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, - - if (! flag_ira_loop_pressure) - { -- size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0], -- regs_used, speed, call_p) -- - estimate_reg_pressure_cost (new_regs[0], -- regs_used, speed, call_p)); -+ size_cost = estimate_reg_pressure_cost (regs_needed[0], -+ regs_used, speed, call_p); - } - else if (ret < 0) - return -1; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch deleted file mode 100644 index 85a749e58..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch +++ /dev/null @@ -1,63 +0,0 @@ -From be9c512be09fa4ef67870ab0456eb3781394dac3 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 18:07:24 +0530 -Subject: [PATCH 24/54] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' - insn definitions Change adddi3 to handle DI immediates as the second operand, - this requires modification to the output template however reduces the need to - specify seperate templates for 16-bit positive/negative immediate operands. - The use of 32-bit immediates for the addi and addic instructions is handled - by the assembler, which will emit the imm instructions when required. This - conveniently handles the optimizable cases where the immediate constant value - does not need the higher half words of the operands upper/lower words. - -Change the constraints of the subdi3 instruction definition such that it -does not match the second operand as an immediate value. This is because -there is no definition to handle this case nor is it possible to -implement purely with instructions as microblaze does not provide an -instruction to perform a forward arithmetic subtraction (it only -provides reverse 'rD = IMM - rA'). - -Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> ---- - gcc/config/microblaze/microblaze.md | 13 ++++++------- - 1 file changed, 6 insertions(+), 7 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 3a53e24..949e103 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -500,17 +500,16 @@ - ;; Adding 2 DI operands in register or reg/imm - - (define_insn "adddi3" -- [(set (match_operand:DI 0 "register_operand" "=d,d,d") -- (plus:DI (match_operand:DI 1 "register_operand" "%d,d,d") -- (match_operand:DI 2 "arith_operand32" "d,P,N")))] -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (plus:DI (match_operand:DI 1 "register_operand" "%d,d") -+ (match_operand:DI 2 "arith_operand" "d,i")))] - "" - "@ - add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 -- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0 -- addi\t%L0,%L1,%2\;addc\t%M0,%M1,r0\;addi\t%M0,%M0,-1" -+ addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" - [(set_attr "type" "darith") - (set_attr "mode" "DI") -- (set_attr "length" "8,8,12")]) -+ (set_attr "length" "8,8")]) - - ;;---------------------------------------------------------------- - ;; Subtraction -@@ -547,7 +546,7 @@ - (define_insn "subdi3" - [(set (match_operand:DI 0 "register_operand" "=&d") - (minus:DI (match_operand:DI 1 "register_operand" "d") -- (match_operand:DI 2 "arith_operand32" "d")))] -+ (match_operand:DI 2 "register_operand" "d")))] - "" - "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" - [(set_attr "type" "darith") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch deleted file mode 100644 index 17f254488..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch +++ /dev/null @@ -1,72 +0,0 @@ -From c8ee051fa3e0ad05b19eb6141a7cb72245b412b7 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 18:18:41 +0530 -Subject: [PATCH 25/54] [Patch, microblaze]: Update ashlsi3 & movsf patterns - This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand - of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal - patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our - instruction doesn't support so using gen_int_mode function - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - :Ajit Agarwal <ajitkum@xilinx.com> - -ChangeLog: -2016-01-07 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *microblaze.md (ashlsi3_with_mul_nodelay, - ashlsi3_with_mul_delay, - movsf_internal): - Updated the patterns to use gen_int_mode function - *microblaze.c (print_operand): - updated the 'F' case to use "unsinged int" instead - of HOST_WIDE_INT_PRINT_HEX ---- - gcc/config/microblaze/microblaze.c | 2 +- - gcc/config/microblaze/microblaze.md | 10 ++++++++-- - 2 files changed, 9 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 0dec362..daf0269 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2531,7 +2531,7 @@ print_operand (FILE * file, rtx op, int letter) - unsigned long value_long; - REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), - value_long); -- fprintf (file, HOST_WIDE_INT_PRINT_HEX, value_long); -+ fprintf (file, "0x%08x", (unsigned int) value_long); - } - else - { -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 949e103..bc675ca 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1366,7 +1366,10 @@ - (match_operand:SI 2 "immediate_operand" "I")))] - "!TARGET_SOFT_MUL - && ((1 << INTVAL (operands[2])) <= 32767 && (1 << INTVAL (operands[2])) >= -32768)" -- "muli\t%0,%1,%m2" -+ { -+ operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); -+ return "muli\t%0,%1,%2"; -+ } - ;; This MUL will not generate an imm. Can go into a delay slot. - [(set_attr "type" "arith") - (set_attr "mode" "SI") -@@ -1378,7 +1381,10 @@ - (ashift:SI (match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "immediate_operand" "I")))] - "!TARGET_SOFT_MUL" -- "muli\t%0,%1,%m2" -+ { -+ operands[2] = gen_int_mode (1 << INTVAL (operands[2]), SImode); -+ return "muli\t%0,%1,%2"; -+ } - ;; This MUL will generate an IMM. Cannot go into a delay slot - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "SI") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch deleted file mode 100644 index 506714bd3..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch +++ /dev/null @@ -1,193 +0,0 @@ -From 64e76f3be6ad78044ea2b89b555a07758c2b2950 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 17 Jan 2017 19:50:34 +0530 -Subject: [PATCH 26/54] [Patch, microblaze]: 8-stage pipeline for microblaze - This patch adds the support for the 8-stage pipeline. The new 8-stage - pipeline reduces the latencies of float & integer division drastically - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - -ChangeLog: -2016-01-18 Nagaraju Mekala <nmekala@xilix.com> - - *microblaze.md (define_automaton mbpipe_8): New - - *microblaze.c (microblaze_option_override): Update - Updated the logic to generate only when MB version is 10.0 - - *microblaze.h (pipeline_type): Update - Update the enum with MICROBLAZE_PIPE_8 - - *microblaze.opt (mxl-frequency): New - New flag added for 8-stage pipeline ---- - gcc/config/microblaze/microblaze.c | 13 ++++++ - gcc/config/microblaze/microblaze.h | 3 +- - gcc/config/microblaze/microblaze.md | 79 +++++++++++++++++++++++++++++++++++- - gcc/config/microblaze/microblaze.opt | 4 ++ - 4 files changed, 96 insertions(+), 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index daf0269..3832d16 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -1772,6 +1772,19 @@ microblaze_option_override (void) - warning (0, "-mxl-reorder requires -mxl-pattern-compare for -mcpu=v8.30.a"); - TARGET_REORDER = 0; - } -+ ver = ver_int - microblaze_version_to_int("v10.0"); -+ if (ver < 0) -+ { -+ if (TARGET_AREA_OPTIMIZED_2) -+ warning (0, "-mxl-frequency can be used only with -mcpu=v10.0 or greater"); -+ } -+ else -+ { -+ if (TARGET_AREA_OPTIMIZED_2) -+ microblaze_pipe = MICROBLAZE_PIPE_8; -+ if (TARGET_BARREL_SHIFT) -+ microblaze_has_bitfield = 1; -+ } - - if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) - error ("-mxl-multiply-high requires -mno-xl-soft-mul"); -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 9f74ec8..2ac5aeec 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -27,7 +27,8 @@ - enum pipeline_type - { - MICROBLAZE_PIPE_3 = 0, -- MICROBLAZE_PIPE_5 = 1 -+ MICROBLAZE_PIPE_5 = 1, -+ MICROBLAZE_PIPE_8 = 2 - }; - - #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index bc675ca..6395533 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -35,6 +35,7 @@ - (R_GOT 20) ;; GOT ptr reg - (MB_PIPE_3 0) ;; Microblaze 3-stage pipeline - (MB_PIPE_5 1) ;; Microblaze 5-stage pipeline -+ (MB_PIPE_8 2) ;; Microblaze 8-stage pipeline - (UNSPEC_SET_GOT 101) ;; - (UNSPEC_GOTOFF 102) ;; GOT offset - (UNSPEC_PLT 103) ;; jump table -@@ -80,7 +81,7 @@ - ;; bshift Shift operations - - (define_attr "type" -- "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap" -+ "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,fint,trap" - (const_string "unknown")) - - ;; Main data type used by the insn -@@ -222,6 +223,80 @@ - ;;----------------------------------------------------------------- - - -+ -+;;---------------------------------------------------------------- -+;; Microblaze 8-stage pipeline description (v10.0 and later) -+;;---------------------------------------------------------------- -+ -+(define_automaton "mbpipe_8") -+(define_cpu_unit "mb8_issue,mb8_iu,mb8_wb,mb8_fpu,mb8_fpu_2,mb8_mul,mb8_mul_2,mb8_div,mb8_div_2,mb8_bs,mb8_bs_2" "mbpipe_8") -+ -+(define_insn_reservation "mb8-integer" 1 -+ (and (eq_attr "type" "branch,jump,call,arith,darith,icmp,nop,no_delay_arith") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-special-move" 2 -+ (and (eq_attr "type" "move") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu*2,mb8_wb") -+ -+(define_insn_reservation "mb8-mem-load" 3 -+ (and (eq_attr "type" "load,no_delay_load") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-mem-store" 1 -+ (and (eq_attr "type" "store,no_delay_store") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_iu,mb8_wb") -+ -+(define_insn_reservation "mb8-mul" 3 -+ (and (eq_attr "type" "imul,no_delay_imul") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_mul,mb8_mul_2*2,mb8_wb") -+ -+(define_insn_reservation "mb8-div" 30 -+ (and (eq_attr "type" "idiv") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_div,mb8_div_2*29,mb8_wb") -+ -+(define_insn_reservation "mb8-bs" 2 -+ (and (eq_attr "type" "bshift") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_bs,mb8_bs_2,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-add-sub-mul" 1 -+ (and (eq_attr "type" "fadd,frsub,fmul") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fcmp" 3 -+ (and (eq_attr "type" "fcmp") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu*2,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-div" 24 -+ (and (eq_attr "type" "fdiv") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu_2*23,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-sqrt" 23 -+ (and (eq_attr "type" "fsqrt") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_fpu_2*22,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fcvt" 1 -+ (and (eq_attr "type" "fcvt") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+(define_insn_reservation "mb8-fpu-fint" 2 -+ (and (eq_attr "type" "fint") -+ (eq (symbol_ref "microblaze_pipe") (const_int MB_PIPE_8))) -+ "mb8_issue,mb8_fpu,mb8_wb") -+ -+ - ;;---------------------------------------------------------------- - ;; Microblaze 5-stage pipeline description (v5.00.a and later) - ;;---------------------------------------------------------------- -@@ -468,7 +543,7 @@ - (fix:SI (match_operand:SF 1 "register_operand" "d")))] - "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "fint\t%0,%1" -- [(set_attr "type" "fcvt") -+ [(set_attr "type" "fint") - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt -index 8242998..c8e6f00 100644 ---- a/gcc/config/microblaze/microblaze.opt -+++ b/gcc/config/microblaze/microblaze.opt -@@ -129,3 +129,7 @@ Use hardware prefetch instruction - - mxl-mode-xilkernel - Target -+ -+mxl-frequency -+Target Mask(AREA_OPTIMIZED_2) -+Use 8 stage pipeline (frequency optimization) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch deleted file mode 100644 index 95b9b2aa3..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch +++ /dev/null @@ -1,142 +0,0 @@ -From 5147c831c6a78d9b95138b679bb2ca7624abc3a1 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 11:08:40 +0530 -Subject: [PATCH 27/54] [Patch,rtl Optimization]: Better register pressure - estimate for loop . .invariant code motion - -Calculate the loop liveness used for regs for calculating the register pressure -in the cost estimation. Loop liveness is based on the following properties. -We only need to find the set of objects that are live at the birth or the header -of the loop. We don't need to calculate the live through the loop by considering -live in and live out of all the basic blocks of the loop. This is based on the -point that the set of objects that are live-in at the birth or header of the loop -will be live-in at every node in the loop. - -If a v live is out at the header of the loop then the variable is live-in at every node -in the loop. To prove this, consider a loop L with header h such that the variable v -defined at d is live-in at h. Since v is live at h, d is not part of L. This follows i -from the dominance property, i.e. h is strictly dominated by d. Furthermore, there -exists a path from h to a use of v which does not go through d. For every node p in -the loop, since the loop is strongly connected and node is a component of the CFG, -there exists a path, consisting only of nodes of L from p to h. Concatenating these -two paths proves that v is live-in and live-out of p. - -Calculate the live-out and live-in for the exit edge of the loop. This patch considers -liveness for not only the loop latch but also the liveness outside the loops. - -ChangeLog: -2016-01-22 Ajit Agarwal <ajitkum@xilinx.com> - - * loop-invariant.c - (find_invariants_to_move): Add the logic of regs_used based - on liveness. - * cfgloopanal.c - (estimate_reg_pressure_cost): Update the heuristics in presence - of call_p. - -Signed-off-by:Ajit Agarwal ajitkum@xilinx.com. ---- - gcc/cfgloopanal.c | 4 +++- - gcc/loop-invariant.c | 63 +++++++++++++++++++++++++++++++++++++++------------- - 2 files changed, 50 insertions(+), 17 deletions(-) - -diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c -index 3af0b2d..123dc6b 100644 ---- a/gcc/cfgloopanal.c -+++ b/gcc/cfgloopanal.c -@@ -411,7 +411,9 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed, - if (regs_needed + target_res_regs <= available_regs) - return 0; - -- if (regs_needed <= available_regs) -+ if ((regs_needed <= available_regs) -+ || (call_p && (regs_needed <= -+ (available_regs + target_clobbered_regs)))) - /* If we are close to running out of registers, try to preserve - them. */ - cost = target_reg_cost [speed] * n_new; -diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c -index 8e22ca0..c9ec8df 100644 ---- a/gcc/loop-invariant.c -+++ b/gcc/loop-invariant.c -@@ -1520,7 +1520,7 @@ gain_for_invariant (struct invariant *inv, unsigned *regs_needed, - size_cost = 0; - } - -- return comp_cost - size_cost; -+ return comp_cost - size_cost + 1; - } - - /* Finds invariant with best gain for moving. Returns the gain, stores -@@ -1614,22 +1614,53 @@ find_invariants_to_move (bool speed, bool call_p) - /* REGS_USED is actually never used when the flag is on. */ - regs_used = 0; - else -- /* We do not really do a good job in estimating number of -- registers used; we put some initial bound here to stand for -- induction variables etc. that we do not detect. */ -+ /* The logic used in estimating the number of regs_used is changed. -+ Now it will be based on liveness of the loop. */ - { -- unsigned int n_regs = DF_REG_SIZE (df); -- -- regs_used = 2; -- -- for (i = 0; i < n_regs; i++) -- { -- if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i)) -- { -- /* This is a value that is used but not changed inside loop. */ -- regs_used++; -- } -- } -+ int i; -+ edge e; -+ vec<edge> edges; -+ bitmap_head regs_live; -+ -+ bitmap_initialize (®s_live, ®_obstack); -+ edges = get_loop_exit_edges (curr_loop); -+ -+ /* Loop liveness is based on the following properties. -+ We only need to find the set of objects that are live at the -+ birth or the header of the loop. -+ We don't need to calculate the live through the loop considering -+ live-in and live-out of all the basic blocks of the loop. This is -+ based on the point that the set of objects that are live-in at the -+ birth or header of the loop will be live-in at every block in the -+ loop. -+ -+ If a v live out at the header of the loop then the variable is -+ live-in at every node in the Loop. To prove this, consider a loop -+ L with header h such that the variable v defined at d is live-in -+ at h. Since v is live at h, d is not part of L. This follows from -+ the dominance property, i.e. h is strictly dominated by d. Furthermore, -+ there exists a path from h to a use of v which does not go through d. -+ For every node of the loop, p, since the loop is strongly connected -+ component of the CFG, there exists a path, consisting only of nodes -+ of L from p to h. Concatenating these two paths prove that v is -+ live-in and live-out of p. */ -+ -+ bitmap_ior_into (®s_live, DF_LR_IN (curr_loop->header)); -+ bitmap_ior_into (®s_live, DF_LR_OUT (curr_loop->header)); -+ -+ /* Calculate the live-out and live-in for the exit edge of the loop. -+ This considers liveness for not only the loop latch but also the -+ liveness outside the loops. */ -+ -+ FOR_EACH_VEC_ELT (edges, i, e) -+ { -+ bitmap_ior_into (®s_live, DF_LR_OUT (e->src)); -+ bitmap_ior_into (®s_live, DF_LR_IN (e->dest)); -+ } -+ -+ regs_used = bitmap_count_bits (®s_live) + 2; -+ bitmap_clear (®s_live); -+ edges.release (); - } - - if (! flag_ira_loop_pressure) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch deleted file mode 100644 index 3643ff19d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0028-Patch-microblaze-Correct-the-const-high-double-immed.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 2715b235b3db423bf35b9304a2ba5daa86b1680e Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 11:25:48 +0530 -Subject: [PATCH 28/54] [Patch, microblaze]: Correct the const high double - immediate value With this patch the loading of the DI mode immediate values - will be using REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE - functions, as CONST_DOUBLE_HIGH was returning the sign extension value even - of the unsigned long long constants also - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - -ChangeLog: -2016-02-03 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *microblaze.c (print_operand): Use REAL_VALUE_FROM_CONST_DOUBLE & - REAL_VALUE_TO_TARGET_DOUBLE - *long.c (new): Added new testcase ---- - gcc/config/microblaze/microblaze.c | 8 ++++++-- - gcc/testsuite/gcc.target/microblaze/long.c | 10 ++++++++++ - 2 files changed, 16 insertions(+), 2 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/microblaze/long.c - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 3832d16..29cd54f 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2517,14 +2517,18 @@ print_operand (FILE * file, rtx op, int letter) - else if (letter == 'h' || letter == 'j') - { - long val[2]; -+ long l[2]; - if (code == CONST_DOUBLE) - { - if (GET_MODE (op) == DFmode) - REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); - else - { -- val[0] = CONST_DOUBLE_HIGH (op); -- val[1] = CONST_DOUBLE_LOW (op); -+ REAL_VALUE_TYPE rv; -+ REAL_VALUE_FROM_CONST_DOUBLE (rv, op); -+ REAL_VALUE_TO_TARGET_DOUBLE (rv, l); -+ val[1] = l[WORDS_BIG_ENDIAN == 0]; -+ val[0] = l[WORDS_BIG_ENDIAN != 0]; - } - } - else if (code == CONST_INT) -diff --git a/gcc/testsuite/gcc.target/microblaze/long.c b/gcc/testsuite/gcc.target/microblaze/long.c -new file mode 100644 -index 0000000..4d45186 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/microblaze/long.c -@@ -0,0 +1,10 @@ -+/* { dg-options "-O0" } */ -+#define BASEADDR 0xF0000000ULL -+int main () -+{ -+ unsigned long long start; -+ start = (unsigned long long) BASEADDR; -+ return 0; -+} -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */ -+/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch deleted file mode 100644 index b4b9d2ecb..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 7e025a0b22eee87bf9597267918bd16fc87c85c2 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 11:49:58 +0530 -Subject: [PATCH 29/54] [Fix, microblaze]: Fix internal compiler error with - msmall-divides This patch will fix the internal error - microblaze_expand_divide function which comes because of rtx PLUS where the - mem_rtx is of type SI and the operand is of type QImode. This patch modifies - the mem_rtx as QImode and Plus as QImode to fix the error. - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> -ChangeLog: - 2016-02-23 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *microblaze.c (microblaze_expand_divide): Update ---- - gcc/config/microblaze/microblaze.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 29cd54f..f8a417c 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3769,7 +3769,7 @@ microblaze_expand_divide (rtx operands[]) - emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); - emit_insn (gen_addsi3 (regt1, regt1, operands[2])); - mem_rtx = gen_rtx_MEM (QImode, -- gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); -+ gen_rtx_PLUS (QImode, regt1, div_table_rtx)); - - insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); - jump = emit_jump_insn_after (gen_jump (div_end_label), insn); --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch deleted file mode 100644 index 52fd4beab..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 27a69d1873221747121360d0a1dffc4336a1d0cc Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 12:03:39 +0530 -Subject: [PATCH 30/54] [patch,microblaze]: Fix the calculation of high word in - a long long 6. .4-bit - -This patch will change the calculation of high word in a long long 64-bit. -Earlier to this patch the high word of long long word (0xF0000000ULL) is -coming to be 0xFFFFFFFF and low word is 0xF0000000. Instead the high word -should be 0x00000000 and the low word should be 0xF0000000. This patch -removes the condition of checking high word = 0 & low word < 0. -This check is not required for the correctness of calculating 32-bit high -and low words in a 64-bit long long. - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - -ChangeLog: -2016-03-01 Nagaraju Mekala <nmekala@xilix.com> - Ajit Agarwal <ajitkum@xilinx.com> - - *config/microblaze/microblaze.c (print_operand): Remove the condition of checking - high word = 0 & low word < 0. - *testsuite/gcc.target/microblaze/others/long.c: Add -O0 option. ---- - gcc/config/microblaze/microblaze.c | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index f8a417c..70d8d03 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2535,9 +2535,6 @@ print_operand (FILE * file, rtx op, int letter) - { - val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; - val[1] = INTVAL (op) & 0x00000000ffffffffLL; -- if (val[0] == 0 && val[1] < 0) -- val[0] = -1; -- - } - fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); - } --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0031-Patch-microblaze-Add-new-bit-field-instructions.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0031-Patch-microblaze-Add-new-bit-field-instructions.patch deleted file mode 100644 index 571445237..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0031-Patch-microblaze-Add-new-bit-field-instructions.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 35569bb20a5bb881f7f275d901a0be3408b16622 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 12:14:51 +0530 -Subject: [PATCH 31/54] [Patch, microblaze]: Add new bit-field instructions - This patches adds new bsefi and bsifi instructions. BSEFI- The instruction - shall extract a bit field from a register and place it right-adjusted in the - destination register. The other bits in the destination register shall be set - to zero BSIFI- The instruction shall insert a right-adjusted bit field from a - register at another position in the destination register. The rest of the - bits in the destination register shall be unchanged - -Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> - -ChangeLog: - 2016-02-03 Nagaraju Mekala <nmekala@xilix.com> - - *microblaze.md (Update): Added new patterns ---- - gcc/config/microblaze/microblaze.md | 73 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 73 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 6395533..5a2dd13 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -980,6 +980,8 @@ - (set_attr "mode" "DI") - (set_attr "length" "20,20,20")]) - -+ -+ - ;;---------------------------------------------------------------- - ;; Data movement - ;;---------------------------------------------------------------- -@@ -1774,6 +1776,7 @@ - (set_attr "length" "28")] - ) - -+ - ;;---------------------------------------------------------------- - ;; Setting a register from an integer comparison. - ;;---------------------------------------------------------------- -@@ -2473,4 +2476,74 @@ - DONE; - }") - -+(define_expand "extvsi" -+ [(set (match_operand:SI 0 "register_operand" "r") -+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r") -+ (match_operand:SI 2 "immediate_operand" "I") -+ (match_operand:SI 3 "immediate_operand" "I")))] -+"TARGET_HAS_BITFIELD" -+" -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); -+ -+ if ((len == 0) || (pos + len > 32) ) -+ FAIL; -+ -+ ;;if (!register_operand (operands[1], VOIDmode)) -+ ;; FAIL; -+ if (operands[0] == operands[1]) -+ FAIL; -+ if (GET_CODE (operands[1]) == ASHIFT) -+ FAIL; -+;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); -+ emit_insn (gen_extv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") -+ -+(define_insn "extv_32" -+ [(set (match_operand:SI 0 "register_operand" "=r") -+ (zero_extract:SI (match_operand:SI 1 "register_operand" "r") -+ (match_operand:SI 2 "immediate_operand" "I") -+ (match_operand:SI 3 "immediate_operand" "I")))] -+ "TARGET_HAS_BITFIELD && (UINTVAL (operands[2]) > 0) -+ && ((UINTVAL (operands[2]) + UINTVAL (operands[3])) <= 32)" -+ "bsefi %0,%1,%2,%3" -+ [(set_attr "type" "bshift") -+ (set_attr "length" "4")]) -+ -+(define_expand "insvsi" -+ [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") -+ (match_operand:SI 1 "immediate_operand" "I") -+ (match_operand:SI 2 "immediate_operand" "I")) -+ (match_operand:SI 3 "register_operand" "r"))] -+ "TARGET_HAS_BITFIELD" -+ " -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); -+ -+ if (len <= 0 || pos + len > 32) -+ FAIL; -+ -+ ;;if (!register_operand (operands[0], VOIDmode)) -+ ;; FAIL; -+ -+ emit_insn (gen_insv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") -+ -+(define_insn "insv_32" -+ [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") -+ (match_operand:SI 1 "immediate_operand" "I") -+ (match_operand:SI 2 "immediate_operand" "I")) -+ (match_operand:SI 3 "register_operand" "r"))] -+ "TARGET_HAS_BITFIELD && UINTVAL (operands[1]) > 0 -+ && UINTVAL (operands[1]) + UINTVAL (operands[2]) <= 32" -+ "bsifi %0, %3, %1, %2" -+ [(set_attr "type" "bshift") -+ (set_attr "length" "4")]) -+ - (include "sync.md") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch deleted file mode 100644 index dce1bc58b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch +++ /dev/null @@ -1,247 +0,0 @@ -From 3db8f0c3124d3001d3c10e6d400943f3ec57616b Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 12:42:10 +0530 -Subject: [PATCH 32/54] [Patch, microblaze]: Fix bug in MB version calculation - This patch fixes the bug in microblaze_version_to_int function. Earlier the - conversion of vXX.YY.Z to int has a bug which is fixed now. - -Signed-off-by : Mahesh Bodapati <mbodapat@xilinx.com> - Nagaraju Mekala <nmekala@xilix.com> ---- - gcc/config/microblaze/microblaze.c | 147 ++++++++++++++++++------------------- - 1 file changed, 70 insertions(+), 77 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 70d8d03..30a0fcf 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -238,6 +238,63 @@ section *sdata2_section; - #define TARGET_HAVE_TLS true - #endif - -+/* Convert a version number of the form "vX.YY.Z" to an integer encoding -+ for easier range comparison. */ -+static int -+microblaze_version_to_int (const char *version) -+{ -+ const char *p, *v; -+ const char *tmpl = "vXX.YY.Z"; -+ int iver1 =0, iver2 =0, iver3 =0; -+ -+ p = version; -+ v = tmpl; -+ -+ while (*p) -+ { -+ if (*v == 'X') -+ { /* Looking for major */ -+ if (*p == '.') -+ { -+ *v++; -+ } -+ else -+ { -+ if (!(*p >= '0' && *p <= '9')) -+ return -1; -+ iver1 += (int) (*p - '0'); -+ iver1 *= 1000; -+ } -+ } -+ else if (*v == 'Y') -+ { /* Looking for minor */ -+ if (!(*p >= '0' && *p <= '9')) -+ return -1; -+ iver2 += (int) (*p - '0'); -+ iver2 *= 10; -+ } -+ else if (*v == 'Z') -+ { /* Looking for compat */ -+ if (!(*p >= 'a' && *p <= 'z')) -+ return -1; -+ iver3 = ((int) (*p)) - 96; -+ } -+ else -+ { -+ if (*p != *v) -+ return -1; -+ } -+ -+ v++; -+ p++; -+ } -+ -+ if (*p) -+ return -1; -+ -+ return iver1 + iver2 + iver3; -+} -+ - /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ - static bool - microblaze_const_double_ok (rtx op, machine_mode mode) -@@ -1266,8 +1323,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, - { - if (TARGET_BARREL_SHIFT) - { -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") -- >= 0) -+ if (microblaze_version_to_int(microblaze_select_cpu) >= microblaze_version_to_int("v5.00.a")) - *total = COSTS_N_INSNS (1); - else - *total = COSTS_N_INSNS (2); -@@ -1328,8 +1384,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, - } - else if (!TARGET_SOFT_MUL) - { -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") -- >= 0) -+ if (microblaze_version_to_int(microblaze_select_cpu) >= microblaze_version_to_int("v5.00.a")) - *total = COSTS_N_INSNS (1); - else - *total = COSTS_N_INSNS (3); -@@ -1609,72 +1664,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, - return 0; - } - --/* Convert a version number of the form "vX.YY.Z" to an integer encoding -- for easier range comparison. */ --static int --microblaze_version_to_int (const char *version) --{ -- const char *p, *v; -- const char *tmpl = "vXX.YY.Z"; -- int iver = 0; -- -- p = version; -- v = tmpl; -- -- while (*p) -- { -- if (*v == 'X') -- { /* Looking for major */ -- if (*p == '.') -- { -- v++; -- } -- else -- { -- if (!(*p >= '0' && *p <= '9')) -- return -1; -- iver += (int) (*p - '0'); -- iver *= 10; -- } -- } -- else if (*v == 'Y') -- { /* Looking for minor */ -- if (!(*p >= '0' && *p <= '9')) -- return -1; -- iver += (int) (*p - '0'); -- iver *= 10; -- } -- else if (*v == 'Z') -- { /* Looking for compat */ -- if (!(*p >= 'a' && *p <= 'z')) -- return -1; -- iver *= 10; -- iver += (int) (*p - 'a'); -- } -- else -- { -- if (*p != *v) -- return -1; -- } -- -- v++; -- p++; -- } -- -- if (*p) -- return -1; -- -- return iver; --} -- -- - static void - microblaze_option_override (void) - { - register int i, start; - register int regno; - register machine_mode mode; -- int ver; -+ int ver,ver_int; - - microblaze_section_threshold = (global_options_set.x_g_switch_value - ? g_switch_value -@@ -1695,13 +1691,13 @@ microblaze_option_override (void) - /* Check the MicroBlaze CPU version for any special action to be done. */ - if (microblaze_select_cpu == NULL) - microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU; -- ver = microblaze_version_to_int (microblaze_select_cpu); -- if (ver == -1) -+ ver_int = microblaze_version_to_int (microblaze_select_cpu); -+ if (ver_int == -1) - { - error ("%qs is an invalid argument to -mcpu=", microblaze_select_cpu); - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v3.00.a"); -+ ver = ver_int - microblaze_version_to_int("v3.00.a"); - if (ver < 0) - { - /* No hardware exceptions in earlier versions. So no worries. */ -@@ -1712,8 +1708,7 @@ microblaze_option_override (void) - microblaze_pipe = MICROBLAZE_PIPE_3; - } - else if (ver == 0 -- || (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v4.00.b") -- == 0)) -+ || (ver_int == microblaze_version_to_int("v4.00.b"))) - { - #if 0 - microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY); -@@ -1730,11 +1725,9 @@ microblaze_option_override (void) - #endif - microblaze_no_unsafe_delay = 0; - microblaze_pipe = MICROBLAZE_PIPE_5; -- if (MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v5.00.a") == 0 -- || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, -- "v5.00.b") == 0 -- || MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, -- "v5.00.c") == 0) -+ if ((ver_int == microblaze_version_to_int("v5.00.a")) -+ || (ver_int == microblaze_version_to_int("v5.00.b")) -+ || (ver_int == microblaze_version_to_int("v5.00.c"))) - { - /* Pattern compares are to be turned on by default only when - compiling for MB v5.00.'z'. */ -@@ -1742,7 +1735,7 @@ microblaze_option_override (void) - } - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v6.00.a"); -+ ver = ver_int - microblaze_version_to_int("v6.00.a"); - if (ver < 0) - { - if (TARGET_MULTIPLY_HIGH) -@@ -1750,7 +1743,7 @@ microblaze_option_override (void) - "-mxl-multiply-high can be used only with -mcpu=v6.00.a or greater"); - } - -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.10.a"); -+ ver = ver_int - microblaze_version_to_int("v8.10.a"); - microblaze_has_clz = 1; - if (ver < 0) - { -@@ -1759,7 +1752,7 @@ microblaze_option_override (void) - } - - /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */ -- ver = MICROBLAZE_VERSION_COMPARE (microblaze_select_cpu, "v8.30.a"); -+ ver = ver_int - microblaze_version_to_int("v8.30.a"); - if (ver < 0) - { - if (TARGET_REORDER == 1) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0033-Fixing-the-bug-in-the-bit-field-instruction.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0033-Fixing-the-bug-in-the-bit-field-instruction.patch deleted file mode 100644 index 15111477a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0033-Fixing-the-bug-in-the-bit-field-instruction.patch +++ /dev/null @@ -1,48 +0,0 @@ -From f3e259923788176ebb323155cc089e68c6de0895 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 13:57:48 +0530 -Subject: [PATCH 33/54] Fixing the bug in the bit-field instruction. Bit field - instruction should be generated only if mcpu >10.0 - ---- - gcc/config/microblaze/microblaze.c | 3 +++ - gcc/config/microblaze/microblaze.h | 2 ++ - 2 files changed, 5 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 30a0fcf..835e906 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -163,6 +163,9 @@ int microblaze_no_unsafe_delay; - /* Set to one if the targeted core has the CLZ insn. */ - int microblaze_has_clz = 0; - -+/* Set to one if the targeted core has barrel-shift and cpu > 10.0 */ -+int microblaze_has_bitfield = 0; -+ - /* Which CPU pipeline do we use. We haven't really standardized on a CPU - version having only a particular type of pipeline. There can still be - options on the CPU to scale pipeline features up or down. :( -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 2ac5aeec..991d0f7 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[]; - - extern int microblaze_no_unsafe_delay; - extern int microblaze_has_clz; -+extern int microblaze_has_bitfield; - extern enum pipeline_type microblaze_pipe; - - #define OBJECT_FORMAT_ELF -@@ -62,6 +63,7 @@ extern enum pipeline_type microblaze_pipe; - - /* Do we have CLZ? */ - #define TARGET_HAS_CLZ (TARGET_PATTERN_COMPARE && microblaze_has_clz) -+#define TARGET_HAS_BITFIELD (TARGET_BARREL_SHIFT && microblaze_has_bitfield) - - /* The default is to support PIC. */ - #define TARGET_SUPPORTS_PIC 1 --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch deleted file mode 100644 index f22f2f3fb..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 52cf8e91f06ce9259d4d94bb8ea5cb327825b806 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 18 Jan 2017 20:57:10 +0530 -Subject: [PATCH 34/54] [Patch, microblaze]: Macros used in Xilinx internal - patches has been removed in gcc 6.2 version so modified the code accordingly. - ---- - gcc/config/microblaze/microblaze.c | 8 +++----- - 1 file changed, 3 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 835e906..2e3b4c9 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2520,11 +2520,9 @@ print_operand (FILE * file, rtx op, int letter) - REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); - else - { -- REAL_VALUE_TYPE rv; -- REAL_VALUE_FROM_CONST_DOUBLE (rv, op); -- REAL_VALUE_TO_TARGET_DOUBLE (rv, l); -- val[1] = l[WORDS_BIG_ENDIAN == 0]; -- val[0] = l[WORDS_BIG_ENDIAN != 0]; -+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); -+ val[1] = l[WORDS_BIG_ENDIAN == 0]; -+ val[0] = l[WORDS_BIG_ENDIAN != 0]; - } - } - else if (code == CONST_INT) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0035-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0035-Fixing-the-issue-with-the-builtin_alloc.patch deleted file mode 100644 index 00d67bcf6..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0035-Fixing-the-issue-with-the-builtin_alloc.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 727b0f7ae03279177559f5d85d8920352bd853b2 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Thu, 23 Feb 2017 17:09:04 +0530 -Subject: [PATCH 35/54] Fixing the issue with the builtin_alloc. register r18 - was not properly handling the stack pattern which was resolved by using free - available register - -signed-off-by:nagaraju mekala <nmekala@xilinx.com> ---- - gcc/config/microblaze/microblaze.md | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 5a2dd13..8072ffc 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2076,10 +2076,10 @@ - "" - { - rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx); -- rtx rtmp = gen_rtx_REG (SImode, R_TMP); -+ rtx reg = gen_reg_rtx (Pmode); - rtx neg_op0; - -- emit_move_insn (rtmp, retaddr); -+ emit_move_insn (reg, retaddr); - if (GET_CODE (operands[1]) != CONST_INT) - { - neg_op0 = gen_reg_rtx (Pmode); -@@ -2088,9 +2088,9 @@ - neg_op0 = GEN_INT (- INTVAL (operands[1])); - - emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, neg_op0)); -- emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), rtmp); -+ emit_move_insn (gen_rtx_MEM (Pmode, stack_pointer_rtx), reg); - emit_move_insn (operands[0], virtual_stack_dynamic_rtx); -- emit_insn (gen_rtx_CLOBBER (SImode, rtmp)); -+ emit_insn (gen_rtx_CLOBBER (SImode, reg)); - DONE; - } - ) --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch deleted file mode 100644 index 54ccd9a0c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 7156e379a67fa47a5fb9ede1448c0d528dbda65b Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Thu, 2 Mar 2017 19:02:31 +0530 -Subject: [PATCH 36/54] [Patch,Microblaze]:reverting the cost check before - propagating constants. - ---- - gcc/cprop.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/gcc/cprop.c b/gcc/cprop.c -index e4df509..deb706b 100644 ---- a/gcc/cprop.c -+++ b/gcc/cprop.c -@@ -733,6 +733,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - int success = 0; - rtx set = single_set (insn); - -+#if 0 - bool check_rtx_costs = true; - bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); - int old_cost = set ? set_rtx_cost (set, speed) : 0; -@@ -744,6 +745,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - && (GET_CODE (XEXP (note, 0)) == CONST - || CONSTANT_P (XEXP (note, 0))))) - check_rtx_costs = false; -+#endif - - /* Usually we substitute easy stuff, so we won't copy everything. - We however need to take care to not duplicate non-trivial CONST -@@ -752,6 +754,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - - validate_replace_src_group (from, to, insn); - -+#if 0 - /* If TO is a constant, check the cost of the set after propagation - to the cost of the set before the propagation. If the cost is - higher, then do not replace FROM with TO. */ -@@ -764,6 +767,7 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - return false; - } - -+#endif - - if (num_changes_pending () && apply_change_group ()) - success = 1; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch deleted file mode 100644 index 26b685a58..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 149cf4619622d27641a2886cd8bf38a49ad88f87 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Mon, 19 Feb 2018 18:06:16 +0530 -Subject: [PATCH 37/54] [Patch,Microblaze]: update in constraints for bitfield - insert and extract instructions. - ---- - gcc/config/microblaze/microblaze.md | 43 ++++++------------------------------- - 1 file changed, 7 insertions(+), 36 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 8072ffc..9bb87ec 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2476,33 +2476,17 @@ - DONE; - }") - --(define_expand "extvsi" -+(define_expand "extzvsi" - [(set (match_operand:SI 0 "register_operand" "r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") - (match_operand:SI 3 "immediate_operand" "I")))] - "TARGET_HAS_BITFIELD" --" --{ -- unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); -- unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); -- -- if ((len == 0) || (pos + len > 32) ) -- FAIL; -- -- ;;if (!register_operand (operands[1], VOIDmode)) -- ;; FAIL; -- if (operands[0] == operands[1]) -- FAIL; -- if (GET_CODE (operands[1]) == ASHIFT) -- FAIL; --;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); -- emit_insn (gen_extv_32 (operands[0], operands[1], -- operands[2], operands[3])); -- DONE; --}") -+"" -+) - --(define_insn "extv_32" -+ -+(define_insn "extzv_32" - [(set (match_operand:SI 0 "register_operand" "=r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") -@@ -2519,21 +2503,8 @@ - (match_operand:SI 2 "immediate_operand" "I")) - (match_operand:SI 3 "register_operand" "r"))] - "TARGET_HAS_BITFIELD" -- " --{ -- unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); -- unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); -- -- if (len <= 0 || pos + len > 32) -- FAIL; -- -- ;;if (!register_operand (operands[0], VOIDmode)) -- ;; FAIL; -- -- emit_insn (gen_insv_32 (operands[0], operands[1], -- operands[2], operands[3])); -- DONE; --}") -+"" -+) - - (define_insn "insv_32" - [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch deleted file mode 100644 index d8ae6c155..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 5494699756f8e1dba6848fcf09780a031139c232 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Mon, 4 Jun 2018 10:10:18 +0530 -Subject: [PATCH 38/54] [Patch,Microblaze] : Removed fsqrt generation for - double values. - ---- - gcc/config/microblaze/microblaze.md | 14 -------------- - 1 file changed, 14 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 9bb87ec..a93ddd0 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -524,20 +524,6 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - --(define_insn "sqrtdf2" -- [(set (match_operand:DF 0 "register_operand" "=d") -- (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))] -- "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT" -- { -- if (REGNO (operands[0]) == REGNO (operands[1])) -- return "fsqrt\t%0,%1"; -- else -- return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0"; -- } -- [(set_attr "type" "fsqrt") -- (set_attr "mode" "SF") -- (set_attr "length" "4")]) -- - (define_insn "fix_truncsfsi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:SF 1 "register_operand" "d")))] --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0039-Intial-commit-of-64-bit-Microblaze.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0039-Intial-commit-of-64-bit-Microblaze.patch deleted file mode 100644 index 88497a8ef..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0039-Intial-commit-of-64-bit-Microblaze.patch +++ /dev/null @@ -1,810 +0,0 @@ -From 6e8b37bf54646c38fb4071d542a60ea92715df9b Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 3 Apr 2018 16:48:39 +0530 -Subject: [PATCH 39/54] Intial commit of 64-bit Microblaze - ---- - gcc/config/microblaze/microblaze-protos.h | 1 + - gcc/config/microblaze/microblaze.c | 109 +++++++-- - gcc/config/microblaze/microblaze.h | 4 +- - gcc/config/microblaze/microblaze.md | 370 +++++++++++++++++++++++++++++- - gcc/config/microblaze/microblaze.opt | 9 +- - gcc/config/microblaze/t-microblaze | 7 +- - 6 files changed, 461 insertions(+), 39 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index c39e2e9..a5ed62e 100644 ---- a/gcc/config/microblaze/microblaze-protos.h -+++ b/gcc/config/microblaze/microblaze-protos.h -@@ -35,6 +35,7 @@ extern void microblaze_expand_divide (rtx *); - extern void microblaze_expand_conditional_branch (enum machine_mode, rtx *); - extern void microblaze_expand_conditional_branch_reg (machine_mode, rtx *); - extern void microblaze_expand_conditional_branch_sf (rtx *); -+extern void microblaze_expand_conditional_branch_df (rtx *); - extern int microblaze_can_use_return_insn (void); - extern void print_operand (FILE *, rtx, int); - extern void print_operand_address (FILE *, rtx); -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 2e3b4c9..2079ae9 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3457,11 +3457,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) - op0 = operands[0]; - op1 = operands[1]; - -- if (!register_operand (op0, SImode) -- && !register_operand (op1, SImode) -+ if (!register_operand (op0, mode) -+ && !register_operand (op1, mode) - && (GET_CODE (op1) != CONST_INT || INTVAL (op1) != 0)) - { -- rtx temp = force_reg (SImode, op1); -+ rtx temp = force_reg (mode, op1); - emit_move_insn (op0, temp); - return true; - } -@@ -3499,12 +3499,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) - && (flag_pic == 2 || microblaze_tls_symbol_p (p0) - || !SMALL_INT (p1))))) - { -- rtx temp = force_reg (SImode, p0); -+ rtx temp = force_reg (mode, p0); - rtx temp2 = p1; - - if (flag_pic && reload_in_progress) - df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); -- emit_move_insn (op0, gen_rtx_PLUS (SImode, temp, temp2)); -+ emit_move_insn (op0, gen_rtx_PLUS (mode, temp, temp2)); - return true; - } - } -@@ -3635,7 +3635,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) - rtx cmp_op0 = operands[1]; - rtx cmp_op1 = operands[2]; - rtx label1 = operands[3]; -- rtx comp_reg = gen_reg_rtx (SImode); -+ rtx comp_reg = gen_reg_rtx (mode); - rtx condition; - - gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); -@@ -3644,23 +3644,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) - if (cmp_op1 == const0_rtx) - { - comp_reg = cmp_op0; -- condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, label1)); -+ condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); -+ if (mode == SImode) -+ emit_jump_insn (gen_condjump (condition, label1)); -+ else -+ emit_jump_insn (gen_long_condjump (condition, label1)); -+ - } - - else if (code == EQ || code == NE) - { - /* Use xor for equal/not-equal comparison. */ -- emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1)); -- condition = gen_rtx_fmt_ee (signed_condition (code), SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, label1)); -+ if (mode == SImode) -+ emit_insn (gen_xorsi3 (comp_reg, cmp_op0, cmp_op1)); -+ else -+ emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1)); -+ condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); -+ if (mode == SImode) -+ emit_jump_insn (gen_condjump (condition, label1)); -+ else -+ emit_jump_insn (gen_long_condjump (condition, label1)); - } - else - { - /* Generate compare and branch in single instruction. */ - cmp_op1 = force_reg (mode, cmp_op1); - condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1); -- emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1)); -+ if (mode == SImode) -+ emit_jump_insn (gen_branch_compare(condition, cmp_op0, cmp_op1, label1)); -+ else -+ emit_jump_insn (gen_long_branch_compare(condition, cmp_op0, cmp_op1, label1)); - } - } - -@@ -3671,7 +3684,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) - rtx cmp_op0 = operands[1]; - rtx cmp_op1 = operands[2]; - rtx label1 = operands[3]; -- rtx comp_reg = gen_reg_rtx (SImode); -+ rtx comp_reg = gen_reg_rtx (mode); - rtx condition; - - gcc_assert ((GET_CODE (cmp_op0) == REG) -@@ -3682,30 +3695,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) - { - comp_reg = cmp_op0; - condition = gen_rtx_fmt_ee (signed_condition (code), -- SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, label1)); -+ mode, comp_reg, const0_rtx); -+ if (mode == SImode) -+ emit_jump_insn (gen_condjump (condition, label1)); -+ else -+ emit_jump_insn (gen_long_condjump (condition, label1)); - } - else if (code == EQ) - { -- emit_insn (gen_seq_internal_pat (comp_reg, -- cmp_op0, cmp_op1)); -- condition = gen_rtx_EQ (SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, label1)); -+ if (mode == SImode) -+ { -+ emit_insn (gen_seq_internal_pat (comp_reg, cmp_op0, -+ cmp_op1)); -+ } -+ else -+ { -+ emit_insn (gen_seq_internal_pat (comp_reg, cmp_op0, -+ cmp_op1)); -+ } -+ condition = gen_rtx_EQ (mode, comp_reg, const0_rtx); -+ if (mode == SImode) -+ emit_jump_insn (gen_condjump (condition, label1)); -+ else -+ emit_jump_insn (gen_long_condjump (condition, label1)); -+ - } - else if (code == NE) - { -- emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, -- cmp_op1)); -- condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, label1)); -+ if (mode == SImode) -+ { -+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, -+ cmp_op1)); -+ } -+ else -+ { -+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, -+ cmp_op1)); -+ } -+ condition = gen_rtx_NE (mode, comp_reg, const0_rtx); -+ if (mode == SImode) -+ emit_jump_insn (gen_condjump (condition, label1)); -+ else -+ emit_jump_insn (gen_long_condjump (condition, label1)); - } - else - { - /* Generate compare and branch in single instruction. */ - cmp_op1 = force_reg (mode, cmp_op1); - condition = gen_rtx_fmt_ee (code, mode, cmp_op0, cmp_op1); -- emit_jump_insn (gen_branch_compare (condition, cmp_op0, -- cmp_op1, label1)); -+ if (mode == SImode) -+ emit_jump_insn (gen_branch_compare (condition, cmp_op0, -+ cmp_op1, label1)); -+ else -+ { -+ emit_jump_insn (gen_long_branch_compare (condition, cmp_op0, -+ cmp_op1, label1)); -+ } -+ - } - } - -@@ -3722,6 +3768,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) - emit_jump_insn (gen_condjump (condition, operands[3])); - } - -+void -+microblaze_expand_conditional_branch_df (rtx operands[]) -+{ -+ rtx condition; -+ rtx cmp_op0 = XEXP (operands[0], 0); -+ rtx cmp_op1 = XEXP (operands[0], 1); -+ rtx comp_reg = gen_reg_rtx (DImode); -+ -+ emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); -+ condition = gen_rtx_NE (DImode, comp_reg, const0_rtx); -+ emit_jump_insn (gen_long_condjump (condition, operands[3])); -+} -+ - /* Implement TARGET_FRAME_POINTER_REQUIRED. */ - - static bool -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 991d0f7..72fbee5 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe; - #define ASM_SPEC "\ - %(target_asm_spec) \ - %{mbig-endian:-EB} \ -+%{m64:-m64} \ - %{mlittle-endian:-EL}" - - /* Extra switches sometimes passed to the linker. */ -@@ -110,6 +111,7 @@ extern enum pipeline_type microblaze_pipe; - #define LINK_SPEC "%{shared:-shared} -N -relax \ - %{mbig-endian:-EB --oformat=elf32-microblaze} \ - %{mlittle-endian:-EL --oformat=elf32-microblazeel} \ -+ %{m64:-EL --oformat=elf64-microblazeel} \ - %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ - %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ - %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \ -@@ -217,7 +219,7 @@ extern enum pipeline_type microblaze_pipe; - #define MIN_UNITS_PER_WORD 4 - #define INT_TYPE_SIZE 32 - #define SHORT_TYPE_SIZE 16 --#define LONG_TYPE_SIZE 32 -+#define LONG_TYPE_SIZE 64 - #define LONG_LONG_TYPE_SIZE 64 - #define FLOAT_TYPE_SIZE 32 - #define DOUBLE_TYPE_SIZE 64 -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index a93ddd0..6976b37 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -495,7 +495,6 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -- - (define_insn "divsf3" - [(set (match_operand:SF 0 "register_operand" "=d") - (div:SF (match_operand:SF 1 "register_operand" "d") -@@ -506,6 +505,7 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -+ - (define_insn "sqrtsf2" - [(set (match_operand:SF 0 "register_operand" "=d") - (sqrt:SF (match_operand:SF 1 "register_operand" "d")))] -@@ -560,6 +560,18 @@ - - ;; Adding 2 DI operands in register or reg/imm - -+(define_insn "adddi3_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%dJ,dJ") -+ (match_operand:DI 2 "arith_plus_operand" "d,K")))] -+ "TARGET_MB_64" -+ "@ -+ addlk\t%0,%z1,%2 -+ addlik\t%0,%z1,%2" -+ [(set_attr "type" "arith,arith") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")]) -+ - (define_insn "adddi3" - [(set (match_operand:DI 0 "register_operand" "=d,d") - (plus:DI (match_operand:DI 1 "register_operand" "%d,d") -@@ -604,6 +616,18 @@ - ;; Double Precision Subtraction - ;;---------------------------------------------------------------- - -+(define_insn "subdi3_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (minus:DI (match_operand:DI 1 "register_operand" "d,d") -+ (match_operand:DI 2 "register_operand" "d,n")))] -+ "TARGET_MB_64" -+ "@ -+ rsubl\t%0,%2,%1 -+ addlik\t%0,%z1,-%2" -+ [(set_attr "type" "darith") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")]) -+ - (define_insn "subdi3" - [(set (match_operand:DI 0 "register_operand" "=&d") - (minus:DI (match_operand:DI 1 "register_operand" "d") -@@ -793,6 +817,15 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - -+(define_insn "negdi2_long" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (neg:DI (match_operand:DI 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "rsubl\t%0,%1,r0" -+ [(set_attr "type" "darith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")]) -+ - (define_insn "negdi2" - [(set (match_operand:DI 0 "register_operand" "=d") - (neg:DI (match_operand:DI 1 "register_operand" "d")))] -@@ -812,6 +845,15 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - -+(define_insn "one_cmpldi2_long" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (not:DI (match_operand:DI 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "xorli\t%0,%1,-1" -+ [(set_attr "type" "arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")]) -+ - (define_insn "*one_cmpldi2" - [(set (match_operand:DI 0 "register_operand" "=d") - (not:DI (match_operand:DI 1 "register_operand" "d")))] -@@ -838,6 +880,20 @@ - ;; Logical - ;;---------------------------------------------------------------- - -+(define_insn "anddi3" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (and:DI (match_operand:DI 1 "arith_operand" "d,d") -+ (match_operand:DI 2 "arith_operand" "d,K")))] -+ "TARGET_MB_64" -+ "@ -+ andl\t%0,%1,%2 -+ andli\t%0,%1,%2 #andl1" -+ ;; andli\t%0,%1,%2 #andl3 -+ ;; andli\t%0,%1,%2 #andl2 -+ [(set_attr "type" "arith,arith") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")]) -+ - (define_insn "andsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d,d") - (and:SI (match_operand:SI 1 "arith_operand" "%d,d,d,d") -@@ -853,6 +909,18 @@ - (set_attr "length" "4,8,8,8")]) - - -+(define_insn "iordi3" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (ior:DI (match_operand:DI 1 "arith_operand" "d,d") -+ (match_operand:DI 2 "arith_operand" "d,K")))] -+ "TARGET_MB_64" -+ "@ -+ orl\t%0,%1,%2 -+ orli\t%0,%1,%2 #andl1" -+ [(set_attr "type" "arith,arith") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")]) -+ - (define_insn "iorsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d,d") - (ior:SI (match_operand:SI 1 "arith_operand" "%d,d,d,d") -@@ -867,6 +935,19 @@ - (set_attr "mode" "SI,SI,SI,SI") - (set_attr "length" "4,8,8,8")]) - -+(define_insn "xordi3" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") -+ (match_operand:DI 2 "arith_operand" "d,K")))] -+ "TARGET_MB_64" -+ "@ -+ xorl\t%0,%1,%2 -+ xorli\t%0,%1,%2 #andl1" -+ [(set_attr "type" "arith,arith") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")]) -+ -+ - (define_insn "xorsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d") - (xor:SI (match_operand:SI 1 "arith_operand" "%d,d,d") -@@ -935,6 +1016,26 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - -+;;(define_expand "extendqidi2" -+;; [(set (match_operand:DI 0 "register_operand" "=d") -+;; (sign_extend:DI (match_operand:QI 1 "general_operand" "d")))] -+;; "TARGET_MB_64" -+;; { -+;; if (GET_CODE (operands[1]) != REG) -+;; FAIL; -+;; } -+;;) -+ -+ -+;;(define_insn "extendqidi2" -+;; [(set (match_operand:DI 0 "register_operand" "=d") -+;; (sign_extend:DI (match_operand:QI 1 "register_operand" "d")))] -+;; "TARGET_MB_64" -+;; "sextl8\t%0,%1" -+;; [(set_attr "type" "arith") -+;; (set_attr "mode" "DI") -+;; (set_attr "length" "4")]) -+ - (define_insn "extendhisi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (sign_extend:SI (match_operand:HI 1 "register_operand" "d")))] -@@ -944,6 +1045,16 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - -+(define_insn "extendhidi2" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (sign_extend:DI (match_operand:HI 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "sextl16\t%0,%1" -+ [(set_attr "type" "arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")]) -+ -+ - ;; Those for integer source operand are ordered - ;; widest source type first. - -@@ -1009,7 +1120,6 @@ - ) - - -- - (define_insn "*movdi_internal" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") - (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))] -@@ -1421,6 +1531,36 @@ - (set_attr "length" "4,4")] - ) - -+;; Barrel shift left -+(define_expand "ashldi3" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashift:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "arith_operand" "")))] -+"TARGET_MB_64" -+{ -+;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+ { -+ emit_insn(gen_ashldi3_long (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else -+ FAIL; -+} -+) -+ -+(define_insn "ashldi3_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (ashift:DI (match_operand:DI 1 "register_operand" "d,d") -+ (match_operand:DI 2 "arith_operand" "I,d")))] -+ "TARGET_MB_64" -+ "@ -+ bsllli\t%0,%1,%2 -+ bslll\t%0,%1,%2" -+ [(set_attr "type" "bshift,bshift") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")] -+) - ;; The following patterns apply when there is no barrel shifter present - - (define_insn "*ashlsi3_with_mul_delay" -@@ -1546,6 +1686,36 @@ - ;;---------------------------------------------------------------- - ;; 32-bit right shifts - ;;---------------------------------------------------------------- -+;; Barrel shift left -+(define_expand "ashrdi3" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "arith_operand" "")))] -+"TARGET_MB_64" -+{ -+;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+ { -+ emit_insn(gen_ashrdi3_long (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else -+ FAIL; -+} -+) -+ -+(define_insn "ashrdi3_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") -+ (match_operand:DI 2 "arith_operand" "I,d")))] -+ "TARGET_MB_64" -+ "@ -+ bslrai\t%0,%1,%2 -+ bslra\t%0,%1,%2" -+ [(set_attr "type" "bshift,bshift") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")] -+ ) - (define_expand "ashrsi3" - [(set (match_operand:SI 0 "register_operand" "=&d") - (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -@@ -1655,6 +1825,36 @@ - ;;---------------------------------------------------------------- - ;; 32-bit right shifts (logical) - ;;---------------------------------------------------------------- -+;; Barrel shift left -+(define_expand "lshrdi3" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (lshiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "arith_operand" "")))] -+"TARGET_MB_64" -+{ -+;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+ { -+ emit_insn(gen_lshrdi3_long (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else -+ FAIL; -+} -+) -+ -+(define_insn "lshrdi3_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d") -+ (match_operand:DI 2 "arith_operand" "I,d")))] -+ "TARGET_MB_64" -+ "@ -+ bslrli\t%0,%1,%2 -+ bslrl\t%0,%1,%2" -+ [(set_attr "type" "bshift,bshift") -+ (set_attr "mode" "DI,DI") -+ (set_attr "length" "4,4")] -+ ) - - (define_expand "lshrsi3" - [(set (match_operand:SI 0 "register_operand" "=&d") -@@ -1801,6 +2001,8 @@ - (set_attr "length" "4")] - ) - -+ -+ - ;;---------------------------------------------------------------- - ;; Setting a register from an floating point comparison. - ;;---------------------------------------------------------------- -@@ -1816,6 +2018,18 @@ - (set_attr "length" "4")] - ) - -+(define_insn "cstoredf4" -+ [(set (match_operand:DI 0 "register_operand" "=r") -+ (match_operator:DI 1 "ordered_comparison_operator" -+ [(match_operand:DF 2 "register_operand" "r") -+ (match_operand:DF 3 "register_operand" "r")]))] -+ "TARGET_MB_64" -+ "dcmp.%C1\t%0,%3,%2" -+ [(set_attr "type" "fcmp") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")] -+) -+ - ;;---------------------------------------------------------------- - ;; Conditional branches - ;;---------------------------------------------------------------- -@@ -1928,6 +2142,115 @@ - (set_attr "length" "12")] - ) - -+ -+(define_expand "cbranchdi4" -+ [(set (pc) -+ (if_then_else (match_operator 0 "ordered_comparison_operator" -+ [(match_operand:DI 1 "register_operand") -+ (match_operand:DI 2 "arith_operand" "I,i")]) -+ (label_ref (match_operand 3 "")) -+ (pc)))] -+ "TARGET_MB_64" -+{ -+ microblaze_expand_conditional_branch (DImode, operands); -+ DONE; -+}) -+ -+(define_expand "cbranchdi4_reg" -+ [(set (pc) -+ (if_then_else (match_operator 0 "ordered_comparison_operator" -+ [(match_operand:DI 1 "register_operand") -+ (match_operand:DI 2 "register_operand")]) -+ (label_ref (match_operand 3 "")) -+ (pc)))] -+ "TARGET_MB_64" -+{ -+ microblaze_expand_conditional_branch_reg (DImode, operands); -+ DONE; -+}) -+ -+(define_expand "cbranchdf4" -+ [(set (pc) -+ (if_then_else (match_operator 0 "ordered_comparison_operator" -+ [(match_operand:DF 1 "register_operand") -+ (match_operand:DF 2 "register_operand")]) -+ (label_ref (match_operand 3 "")) -+ (pc)))] -+ "TARGET_MB_64" -+{ -+ microblaze_expand_conditional_branch_df (operands); -+ DONE; -+ -+}) -+ -+;; Used to implement comparison instructions -+(define_expand "long_condjump" -+ [(set (pc) -+ (if_then_else (match_operand 0) -+ (label_ref (match_operand 1)) -+ (pc)))]) -+ -+(define_insn "long_branch_zero" -+ [(set (pc) -+ (if_then_else (match_operator:DI 0 "ordered_comparison_operator" -+ [(match_operand:DI 1 "register_operand" "d") -+ (const_int 0)]) -+ (match_operand:DI 2 "pc_or_label_operand" "") -+ (match_operand:DI 3 "pc_or_label_operand" ""))) -+ ] -+ "TARGET_MB_64" -+ { -+ if (operands[3] == pc_rtx) -+ return "beal%C0i%?\t%z1,%2"; -+ else -+ return "beal%N0i%?\t%z1,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")] -+) -+ -+(define_insn "long_branch_compare" -+ [(set (pc) -+ (if_then_else (match_operator:DI 0 "cmp_op" -+ [(match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d") -+ ]) -+ (label_ref (match_operand 3)) -+ (pc))) -+ (clobber(reg:DI R_TMP))] -+ "TARGET_MB_64" -+ { -+ operands[4] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ enum rtx_code code = GET_CODE (operands[0]); -+ -+ if (code == GT || code == LE) -+ { -+ output_asm_insn ("cmpl\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GTU || code == LEU) -+ { -+ output_asm_insn ("cmplu\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GE || code == LT) -+ { -+ output_asm_insn ("cmpl\tr18,%z2,%z1", operands); -+ } -+ else if (code == GEU || code == LTU) -+ { -+ output_asm_insn ("cmplu\tr18,%z2,%z1", operands); -+ } -+ -+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), DImode, operands[4], const0_rtx); -+ return "beal%C0i%?\tr18,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "12")] -+) -+ - ;;---------------------------------------------------------------- - ;; Unconditional branches - ;;---------------------------------------------------------------- -@@ -2462,17 +2785,33 @@ - DONE; - }") - --(define_expand "extzvsi" -+(define_expand "extvsi" - [(set (match_operand:SI 0 "register_operand" "r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") - (match_operand:SI 3 "immediate_operand" "I")))] - "TARGET_HAS_BITFIELD" --"" --) -- -+" -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[2]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[3]); -+ -+ if ((len == 0) || (pos + len > 32) ) -+ FAIL; -+ -+ ;;if (!register_operand (operands[1], VOIDmode)) -+ ;; FAIL; -+ if (operands[0] == operands[1]) -+ FAIL; -+ if (GET_CODE (operands[1]) == ASHIFT) -+ FAIL; -+;; operands[2] = GEN_INT(INTVAL(operands[2])+1 ); -+ emit_insn (gen_extv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") - --(define_insn "extzv_32" -+(define_insn "extv_32" - [(set (match_operand:SI 0 "register_operand" "=r") - (zero_extract:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "immediate_operand" "I") -@@ -2489,8 +2828,21 @@ - (match_operand:SI 2 "immediate_operand" "I")) - (match_operand:SI 3 "register_operand" "r"))] - "TARGET_HAS_BITFIELD" --"" --) -+ " -+{ -+ unsigned HOST_WIDE_INT len = UINTVAL (operands[1]); -+ unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]); -+ -+ if (len <= 0 || pos + len > 32) -+ FAIL; -+ -+ ;;if (!register_operand (operands[0], VOIDmode)) -+ ;; FAIL; -+ -+ emit_insn (gen_insv_32 (operands[0], operands[1], -+ operands[2], operands[3])); -+ DONE; -+}") - - (define_insn "insv_32" - [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r") -diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt -index c8e6f00..cdcae00 100644 ---- a/gcc/config/microblaze/microblaze.opt -+++ b/gcc/config/microblaze/microblaze.opt -@@ -125,11 +125,16 @@ Description for mxl-mode-novectors. - - mxl-prefetch - Target Mask(PREFETCH) --Use hardware prefetch instruction -+Use hardware prefetch instruction. - - mxl-mode-xilkernel - Target - - mxl-frequency - Target Mask(AREA_OPTIMIZED_2) --Use 8 stage pipeline (frequency optimization) -+Use 8 stage pipeline (frequency optimization). -+ -+m64 -+Target Mask(MB_64) -+MicroBlaze 64-bit mode. -+ -diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze -index 41fa9a9..e9a1921 100644 ---- a/gcc/config/microblaze/t-microblaze -+++ b/gcc/config/microblaze/t-microblaze -@@ -1,8 +1,11 @@ --MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-endian --MULTILIB_DIRNAMES = bs m mh le -+MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-endian m64 -+MULTILIB_DIRNAMES = bs m mh le m64 - MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high - MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian -+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 - MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian -+MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 -+MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 - - # Extra files - microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch deleted file mode 100644 index 1157a82fc..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 5526d87787d61990be3187b230fae4d0591d0651 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Wed, 4 Apr 2018 16:41:41 +0530 -Subject: [PATCH 40/54] Added load store pattern movdi and also adding missing - files - ---- - gcc/config/microblaze/constraints.md | 5 +++++ - gcc/config/microblaze/microblaze.md | 26 ++++++++++++++++++++++++++ - gcc/config/microblaze/t-microblaze | 4 ++-- - 3 files changed, 33 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index ae14944..a06b4d8 100644 ---- a/gcc/config/microblaze/constraints.md -+++ b/gcc/config/microblaze/constraints.md -@@ -52,6 +52,11 @@ - (and (match_code "const_int") - (match_test "ival > 0 && ival < 0x10000"))) - -+(define_constraint "K" -+ "A constant in the range 0xffffff8000000000L to 0x0000007fffffffffL (inclusive)." -+ (and (match_code "const_int") -+ (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL"))) -+ - ;; Define floating point constraints - - (define_constraint "G" -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 6976b37..0cd0441 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1120,6 +1120,32 @@ - ) - - -+(define_insn "*movdi_internal_64" -+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") -+ (match_operand:DI 1 "general_operand" " d,K,J,R,o,d,d"))] -+ "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)" -+ { -+ switch (which_alternative) -+ { -+ case 0: -+ return "addlk\t%0,%1"; -+ case 1: -+ return "addlik\t%0,r0,%1"; -+ case 2: -+ return "addlk\t%0,r0,r0"; -+ case 3: -+ case 4: -+ return "lli\t%0,%1"; -+ case 5: -+ case 6: -+ return "sli\t%1,%0"; -+ } -+ return "unreachable"; -+ } -+ [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store") -+ (set_attr "mode" "DI") -+ (set_attr "length" "8,8,8,8,12,8,12")]) -+ - (define_insn "*movdi_internal" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") - (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))] -diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze -index e9a1921..7671f63 100644 ---- a/gcc/config/microblaze/t-microblaze -+++ b/gcc/config/microblaze/t-microblaze -@@ -4,8 +4,8 @@ MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high - MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian - MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 - MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian --MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 --MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 -+#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 -+#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 - - # Extra files - microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0041-Intial-commit-for-64bit-MB-sources.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0041-Intial-commit-for-64bit-MB-sources.patch deleted file mode 100644 index 411958e74..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0041-Intial-commit-for-64bit-MB-sources.patch +++ /dev/null @@ -1,2463 +0,0 @@ -From eee9b7f7423823b133d6a5e5382863502433bdc6 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 27 Jul 2018 15:23:41 +0530 -Subject: [PATCH 41/54] Intial commit for 64bit-MB sources. Need to cleanup the - code later. - ---- - gcc/config/microblaze/constraints.md | 2 +- - gcc/config/microblaze/microblaze-c.c | 6 + - gcc/config/microblaze/microblaze.c | 218 ++++++++---- - gcc/config/microblaze/microblaze.h | 63 ++-- - gcc/config/microblaze/microblaze.md | 606 ++++++++++++++++++++++++-------- - gcc/config/microblaze/t-microblaze | 7 +- - libgcc/config/microblaze/crti.S | 4 +- - libgcc/config/microblaze/crtn.S | 4 +- - libgcc/config/microblaze/divdi3.S | 98 ++++++ - libgcc/config/microblaze/divdi3_table.c | 62 ++++ - libgcc/config/microblaze/moddi3.S | 97 +++++ - libgcc/config/microblaze/muldi3.S | 73 ++++ - libgcc/config/microblaze/t-microblaze | 11 +- - libgcc/config/microblaze/udivdi3.S | 107 ++++++ - libgcc/config/microblaze/umoddi3.S | 110 ++++++ - 15 files changed, 1232 insertions(+), 236 deletions(-) - create mode 100644 libgcc/config/microblaze/divdi3.S - create mode 100644 libgcc/config/microblaze/divdi3_table.c - create mode 100644 libgcc/config/microblaze/moddi3.S - create mode 100644 libgcc/config/microblaze/muldi3.S - create mode 100644 libgcc/config/microblaze/udivdi3.S - create mode 100644 libgcc/config/microblaze/umoddi3.S - -diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index a06b4d8..867a7b5 100644 ---- a/gcc/config/microblaze/constraints.md -+++ b/gcc/config/microblaze/constraints.md -@@ -55,7 +55,7 @@ - (define_constraint "K" - "A constant in the range 0xffffff8000000000L to 0x0000007fffffffffL (inclusive)." - (and (match_code "const_int") -- (match_test "ival > (long)0xffffff8000000000L && ival < (long)0x0000007fffffffffL"))) -+ (match_test "ival > (long)-549755813888 && ival < (long)549755813887"))) - - ;; Define floating point constraints - -diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c -index 7b020b5..d8a1d13 100644 ---- a/gcc/config/microblaze/microblaze-c.c -+++ b/gcc/config/microblaze/microblaze-c.c -@@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile) - builtin_define ("HAVE_HW_FPU_SQRT"); - builtin_define ("__HAVE_HW_FPU_SQRT__"); - } -+ if (TARGET_MB_64) -+ { -+ builtin_define ("__arch64__"); -+ builtin_define ("__microblaze64__"); -+ builtin_define ("__MICROBLAZE64__"); -+ } - } -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 2079ae9..ba7ade4 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -382,10 +382,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) - { - return 1; - } -- else if (GET_CODE (plus0) == REG && GET_CODE (plus1) == REG) -+ /*else if (GET_CODE (plus0) == REG && GET_CODE (plus1) == REG) - { - return 1; -- } -+ }*/ - else - return 0; - -@@ -433,7 +433,7 @@ double_memory_operand (rtx op, machine_mode mode) - return 1; - - return memory_address_p ((GET_MODE_CLASS (mode) == MODE_INT -- ? E_SImode : E_SFmode), -+ ? Pmode : E_SFmode), - plus_constant (Pmode, addr, 4)); - } - -@@ -680,7 +680,7 @@ microblaze_legitimize_tls_address(rtx x, rtx reg) - /* Load the addend. */ - addend = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, x, GEN_INT (TLS_DTPREL)), - UNSPEC_TLS); -- addend = force_reg (SImode, gen_rtx_CONST (SImode, addend)); -+ addend = force_reg (Pmode, gen_rtx_CONST (Pmode, addend)); - dest = gen_rtx_PLUS (Pmode, dest, addend); - break; - -@@ -698,7 +698,7 @@ microblaze_classify_unspec (struct microblaze_address_info *info, rtx x) - - if (XINT (x, 1) == UNSPEC_GOTOFF) - { -- info->regA = gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM); -+ info->regA = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM); - info->type = ADDRESS_GOTOFF; - } - else if (XINT (x, 1) == UNSPEC_PLT) -@@ -1230,8 +1230,16 @@ microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length) - emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, MAX_MOVE_BYTES)); - - /* Emit the test & branch. */ -- emit_insn (gen_cbranchsi4 (gen_rtx_NE (SImode, src_reg, final_src), -+ -+ if (TARGET_MB_64) { -+ emit_insn (gen_cbranchdi4 (gen_rtx_NE (Pmode, src_reg, final_src), -+ src_reg, final_src, label)); -+ } -+ else { -+ emit_insn (gen_cbranchsi4 (gen_rtx_NE (Pmode, src_reg, final_src), - src_reg, final_src, label)); -+ -+ } - - /* Mop up any left-over bytes. */ - if (leftover) -@@ -1561,14 +1569,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, - break; - - case E_DFmode: -- cum->arg_words += 2; -+ if (TARGET_MB_64) -+ cum->arg_words++; -+ else -+ cum->arg_words += 2; - if (!cum->gp_reg_found && cum->arg_number <= 2) - cum->fp_code += 2 << ((cum->arg_number - 1) * 2); - break; - - case E_DImode: - cum->gp_reg_found = 1; -- cum->arg_words += 2; -+ if (TARGET_MB_64) -+ cum->arg_words++; -+ else -+ cum->arg_words += 2; - break; - - case E_QImode: -@@ -2219,7 +2233,7 @@ compute_frame_size (HOST_WIDE_INT size) - - if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM) - /* Don't account for link register. It is accounted specially below. */ -- gp_reg_size += GET_MODE_SIZE (SImode); -+ gp_reg_size += GET_MODE_SIZE (Pmode); - - mask |= (1L << (regno - GP_REG_FIRST)); - } -@@ -2487,7 +2501,7 @@ print_operand (FILE * file, rtx op, int letter) - - if ((letter == 'M' && !WORDS_BIG_ENDIAN) - || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D') -- regnum++; -+ regnum++; - - fprintf (file, "%s", reg_names[regnum]); - } -@@ -2513,6 +2527,7 @@ print_operand (FILE * file, rtx op, int letter) - else if (letter == 'h' || letter == 'j') - { - long val[2]; -+ int val1[2]; - long l[2]; - if (code == CONST_DOUBLE) - { -@@ -2525,12 +2540,12 @@ print_operand (FILE * file, rtx op, int letter) - val[0] = l[WORDS_BIG_ENDIAN != 0]; - } - } -- else if (code == CONST_INT) -+ else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF) - { -- val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; -- val[1] = INTVAL (op) & 0x00000000ffffffffLL; -+ val1[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; -+ val1[1] = INTVAL (op) & 0x00000000ffffffffLL; - } -- fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); -+ fprintf (file, "0x%8.8lx", (letter == 'h') ? val1[0] : val1[1]); - } - else if (code == CONST_DOUBLE) - { -@@ -2713,7 +2728,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) - - switch_to_section (get_section (section, 0, NULL)); - assemble_align (POINTER_SIZE); -- fputs ("\t.word\t", asm_out_file); -+ if (TARGET_MB_64) -+ fputs ("\t.dword\t", asm_out_file); -+ else -+ fputs ("\t.word\t", asm_out_file); - output_addr_const (asm_out_file, symbol); - fputs ("\n", asm_out_file); - } -@@ -2736,7 +2754,10 @@ microblaze_asm_destructor (rtx symbol, int priority) - - switch_to_section (get_section (section, 0, NULL)); - assemble_align (POINTER_SIZE); -- fputs ("\t.word\t", asm_out_file); -+ if (TARGET_MB_64) -+ fputs ("\t.dword\t", asm_out_file); -+ else -+ fputs ("\t.word\t", asm_out_file); - output_addr_const (asm_out_file, symbol); - fputs ("\n", asm_out_file); - } -@@ -2802,7 +2823,7 @@ save_restore_insns (int prologue) - /* For interrupt_handlers, need to save/restore the MSR. */ - if (microblaze_is_interrupt_variant ()) - { -- isr_mem_rtx = gen_rtx_MEM (SImode, -+ isr_mem_rtx = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, base_reg_rtx, - GEN_INT (current_frame_info. - gp_offset - -@@ -2810,8 +2831,8 @@ save_restore_insns (int prologue) - - /* Do not optimize in flow analysis. */ - MEM_VOLATILE_P (isr_mem_rtx) = 1; -- isr_reg_rtx = gen_rtx_REG (SImode, MB_ABI_MSR_SAVE_REG); -- isr_msr_rtx = gen_rtx_REG (SImode, ST_REG); -+ isr_reg_rtx = gen_rtx_REG (Pmode, MB_ABI_MSR_SAVE_REG); -+ isr_msr_rtx = gen_rtx_REG (Pmode, ST_REG); - } - - if (microblaze_is_interrupt_variant () && !prologue) -@@ -2819,8 +2840,8 @@ save_restore_insns (int prologue) - emit_move_insn (isr_reg_rtx, isr_mem_rtx); - emit_move_insn (isr_msr_rtx, isr_reg_rtx); - /* Do not optimize in flow analysis. */ -- emit_insn (gen_rtx_USE (SImode, isr_reg_rtx)); -- emit_insn (gen_rtx_USE (SImode, isr_msr_rtx)); -+ emit_insn (gen_rtx_USE (Pmode, isr_reg_rtx)); -+ emit_insn (gen_rtx_USE (Pmode, isr_msr_rtx)); - } - - for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) -@@ -2831,9 +2852,9 @@ save_restore_insns (int prologue) - /* Don't handle here. Already handled as the first register. */ - continue; - -- reg_rtx = gen_rtx_REG (SImode, regno); -+ reg_rtx = gen_rtx_REG (Pmode, regno); - insn = gen_rtx_PLUS (Pmode, base_reg_rtx, GEN_INT (gp_offset)); -- mem_rtx = gen_rtx_MEM (SImode, insn); -+ mem_rtx = gen_rtx_MEM (Pmode, insn); - if (microblaze_is_interrupt_variant () || save_volatiles) - /* Do not optimize in flow analysis. */ - MEM_VOLATILE_P (mem_rtx) = 1; -@@ -2848,7 +2869,7 @@ save_restore_insns (int prologue) - insn = emit_move_insn (reg_rtx, mem_rtx); - } - -- gp_offset += GET_MODE_SIZE (SImode); -+ gp_offset += GET_MODE_SIZE (Pmode); - } - } - -@@ -2858,8 +2879,8 @@ save_restore_insns (int prologue) - emit_move_insn (isr_mem_rtx, isr_reg_rtx); - - /* Do not optimize in flow analysis. */ -- emit_insn (gen_rtx_USE (SImode, isr_reg_rtx)); -- emit_insn (gen_rtx_USE (SImode, isr_msr_rtx)); -+ emit_insn (gen_rtx_USE (Pmode, isr_reg_rtx)); -+ emit_insn (gen_rtx_USE (Pmode, isr_msr_rtx)); - } - - /* Done saving and restoring */ -@@ -2949,7 +2970,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor) - - switch_to_section (s); - assemble_align (POINTER_SIZE); -- fputs ("\t.word\t", asm_out_file); -+ if (TARGET_MB_64) -+ fputs ("\t.dword\t", asm_out_file); -+ else -+ fputs ("\t.word\t", asm_out_file); - output_addr_const (asm_out_file, symbol); - fputs ("\n", asm_out_file); - } -@@ -3095,10 +3119,10 @@ microblaze_expand_prologue (void) - { - if (offset != 0) - ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); -- emit_move_insn (gen_rtx_MEM (SImode, ptr), -- gen_rtx_REG (SImode, regno)); -+ emit_move_insn (gen_rtx_MEM (Pmode, ptr), -+ gen_rtx_REG (Pmode, regno)); - -- offset += GET_MODE_SIZE (SImode); -+ offset += GET_MODE_SIZE (Pmode); - } - - } -@@ -3108,15 +3132,23 @@ microblaze_expand_prologue (void) - rtx fsiz_rtx = GEN_INT (fsiz); - - rtx_insn *insn = NULL; -- insn = emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, -+ if (TARGET_MB_64) -+ { -+ -+ insn = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx, - fsiz_rtx)); -+ } -+ else { -+ insn = emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, -+ fsiz_rtx)); -+ } - if (insn) - RTX_FRAME_RELATED_P (insn) = 1; - - /* Handle SUB_RETURN_ADDR_REGNUM specially at first. */ - if (!crtl->is_leaf || interrupt_handler) - { -- mem_rtx = gen_rtx_MEM (SImode, -+ mem_rtx = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, stack_pointer_rtx, - const0_rtx)); - -@@ -3124,7 +3156,7 @@ microblaze_expand_prologue (void) - /* Do not optimize in flow analysis. */ - MEM_VOLATILE_P (mem_rtx) = 1; - -- reg_rtx = gen_rtx_REG (SImode, MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ reg_rtx = gen_rtx_REG (Pmode, MB_ABI_SUB_RETURN_ADDR_REGNUM); - insn = emit_move_insn (mem_rtx, reg_rtx); - RTX_FRAME_RELATED_P (insn) = 1; - } -@@ -3224,12 +3256,12 @@ microblaze_expand_epilogue (void) - if (!crtl->is_leaf || interrupt_handler) - { - mem_rtx = -- gen_rtx_MEM (SImode, -+ gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, stack_pointer_rtx, const0_rtx)); - if (interrupt_handler) - /* Do not optimize in flow analysis. */ - MEM_VOLATILE_P (mem_rtx) = 1; -- reg_rtx = gen_rtx_REG (SImode, MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ reg_rtx = gen_rtx_REG (Pmode, MB_ABI_SUB_RETURN_ADDR_REGNUM); - emit_move_insn (reg_rtx, mem_rtx); - } - -@@ -3245,15 +3277,25 @@ microblaze_expand_epilogue (void) - /* _restore_ registers for epilogue. */ - save_restore_insns (0); - emit_insn (gen_blockage ()); -- emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx)); -+ if (TARGET_MB_64) -+ emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx)); -+ else -+ emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx)); - } - - if (crtl->calls_eh_return) -- emit_insn (gen_addsi3 (stack_pointer_rtx, -+ if (TARGET_MB_64) { -+ emit_insn (gen_adddi3 (stack_pointer_rtx, - stack_pointer_rtx, -- gen_raw_REG (SImode, -+ gen_raw_REG (Pmode, - MB_EH_STACKADJ_REGNUM))); -- -+ } -+ else { -+ emit_insn (gen_addsi3 (stack_pointer_rtx, -+ stack_pointer_rtx, -+ gen_raw_REG (Pmode, -+ MB_EH_STACKADJ_REGNUM))); -+ } - emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST + - MB_ABI_SUB_RETURN_ADDR_REGNUM))); - } -@@ -3402,9 +3444,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, - else - this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); - -- /* Apply the constant offset, if required. */ -+ /* Apply the constant offset, if required. */ - if (delta) -- emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta))); -+ { -+ if (TARGET_MB_64) -+ emit_insn (gen_adddi3 (this_rtx, this_rtx, GEN_INT (delta))); -+ else -+ emit_insn (gen_addsi3 (this_rtx, this_rtx, GEN_INT (delta))); -+ } - - /* Apply the offset from the vtable, if required. */ - if (vcall_offset) -@@ -3417,7 +3464,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, - rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); - emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); - -- emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1)); -+ if (TARGET_MB_64) -+ emit_insn (gen_adddi3 (this_rtx, this_rtx, temp1)); -+ else -+ emit_insn (gen_addsi3 (this_rtx, this_rtx, temp1)); - } - - /* Generate a tail call to the target function. */ -@@ -3564,7 +3614,7 @@ microblaze_eh_return (rtx op0) - /* Queue an .ident string in the queue of top-level asm statements. - If the string size is below the threshold, put it into .sdata2. - If the front-end is done, we must be being called from toplev.c. -- In that case, do nothing. */ -+ In that case, do nothing. */ - void - microblaze_asm_output_ident (const char *string) - { -@@ -3619,9 +3669,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) - emit_block_move (m_tramp, assemble_trampoline_template (), - GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL); - -- mem = adjust_address (m_tramp, SImode, 16); -+ mem = adjust_address (m_tramp, Pmode, 16); - emit_move_insn (mem, chain_value); -- mem = adjust_address (m_tramp, SImode, 20); -+ mem = adjust_address (m_tramp, Pmode, 20); - emit_move_insn (mem, fnaddr); - } - -@@ -3645,7 +3695,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) - { - comp_reg = cmp_op0; - condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); -- if (mode == SImode) -+ if (mode == Pmode) - emit_jump_insn (gen_condjump (condition, label1)); - else - emit_jump_insn (gen_long_condjump (condition, label1)); -@@ -3764,7 +3814,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) - rtx comp_reg = gen_reg_rtx (SImode); - - emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); -- condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); -+ condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); - emit_jump_insn (gen_condjump (condition, operands[3])); - } - -@@ -3774,10 +3824,10 @@ microblaze_expand_conditional_branch_df (rtx operands[]) - rtx condition; - rtx cmp_op0 = XEXP (operands[0], 0); - rtx cmp_op1 = XEXP (operands[0], 1); -- rtx comp_reg = gen_reg_rtx (DImode); -+ rtx comp_reg = gen_reg_rtx (Pmode); - - emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); -- condition = gen_rtx_NE (DImode, comp_reg, const0_rtx); -+ condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); - emit_jump_insn (gen_long_condjump (condition, operands[3])); - } - -@@ -3798,8 +3848,8 @@ microblaze_expand_divide (rtx operands[]) - { - /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */ - -- rtx regt1 = gen_reg_rtx (SImode); -- rtx reg18 = gen_rtx_REG (SImode, R_TMP); -+ rtx regt1 = gen_reg_rtx (Pmode); -+ rtx reg18 = gen_rtx_REG (Pmode, R_TMP); - rtx regqi = gen_reg_rtx (QImode); - rtx_code_label *div_label = gen_label_rtx (); - rtx_code_label *div_end_label = gen_label_rtx (); -@@ -3807,17 +3857,31 @@ microblaze_expand_divide (rtx operands[]) - rtx mem_rtx; - rtx ret; - rtx_insn *jump, *cjump, *insn; -- -- insn = emit_insn (gen_iorsi3 (regt1, operands[1], operands[2])); -- cjump = emit_jump_insn_after (gen_cbranchsi4 ( -- gen_rtx_GTU (SImode, regt1, GEN_INT (15)), -+ -+ if (TARGET_MB_64) { -+ insn = emit_insn (gen_iordi3 (regt1, operands[1], operands[2])); -+ cjump = emit_jump_insn_after (gen_cbranchdi4 ( -+ gen_rtx_GTU (Pmode, regt1, GEN_INT (15)), -+ regt1, GEN_INT (15), div_label), insn); -+ } -+ else { -+ insn = emit_insn (gen_iorsi3 (regt1, operands[1], operands[2])); -+ cjump = emit_jump_insn_after (gen_cbranchsi4 ( -+ gen_rtx_GTU (Pmode, regt1, GEN_INT (15)), - regt1, GEN_INT (15), div_label), insn); -+ } - LABEL_NUSES (div_label) = 1; - JUMP_LABEL (cjump) = div_label; -- emit_insn (gen_rtx_CLOBBER (SImode, reg18)); -+ emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); - -- emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); -- emit_insn (gen_addsi3 (regt1, regt1, operands[2])); -+ if (TARGET_MB_64) { -+ emit_insn (gen_ashldi3_long (regt1, operands[1], GEN_INT(4))); -+ emit_insn (gen_adddi3 (regt1, regt1, operands[2])); -+ } -+ else { -+ emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); -+ emit_insn (gen_addsi3 (regt1, regt1, operands[2])); -+ } - mem_rtx = gen_rtx_MEM (QImode, - gen_rtx_PLUS (QImode, regt1, div_table_rtx)); - -@@ -3964,7 +4028,7 @@ insert_wic_for_ilb_runout (rtx_insn *first) - { - insn = - emit_insn_before (gen_iprefetch -- (gen_int_mode (addr_offset, SImode)), -+ (gen_int_mode (addr_offset, Pmode)), - before_4); - recog_memoized (insn); - INSN_LOCATION (insn) = INSN_LOCATION (before_4); -@@ -3974,7 +4038,27 @@ insert_wic_for_ilb_runout (rtx_insn *first) - } - } - } -- -+ -+/* Set the names for various arithmetic operations according to the -+ * MICROBLAZE ABI. */ -+static void -+microblaze_init_libfuncs (void) -+{ -+ set_optab_libfunc (smod_optab, SImode, "__modsi3"); -+ set_optab_libfunc (sdiv_optab, SImode, "__divsi3"); -+ set_optab_libfunc (smul_optab, SImode, "__mulsi3"); -+ set_optab_libfunc (umod_optab, SImode, "__umodsi3"); -+ set_optab_libfunc (udiv_optab, SImode, "__udivsi3"); -+ -+ if (TARGET_MB_64) -+ { -+ set_optab_libfunc (smod_optab, DImode, "__moddi3"); -+ set_optab_libfunc (sdiv_optab, DImode, "__divdi3"); -+ set_optab_libfunc (smul_optab, DImode, "__muldi3"); -+ set_optab_libfunc (umod_optab, DImode, "__umoddi3"); -+ set_optab_libfunc (udiv_optab, DImode, "__udivdi3"); -+ } -+} - /* Insert instruction prefetch instruction at the fall - through path of the function call. */ - -@@ -4127,6 +4211,17 @@ microblaze_starting_frame_offset (void) - #undef TARGET_LRA_P - #define TARGET_LRA_P hook_bool_void_false - -+#ifdef TARGET_MB_64 -+#undef TARGET_ASM_ALIGNED_DI_OP -+#define TARGET_ASM_ALIGNED_DI_OP "\t.dword\t" -+ -+#undef TARGET_ASM_ALIGNED_HI_OP -+#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t" -+ -+#undef TARGET_ASM_ALIGNED_SI_OP -+#define TARGET_ASM_ALIGNED_SI_OP "\t.word\t" -+#endif -+ - #undef TARGET_FRAME_POINTER_REQUIRED - #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required - -@@ -4136,6 +4231,9 @@ microblaze_starting_frame_offset (void) - #undef TARGET_TRAMPOLINE_INIT - #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init - -+#undef TARGET_INIT_LIBFUNCS -+#define TARGET_INIT_LIBFUNCS microblaze_init_libfuncs -+ - #undef TARGET_PROMOTE_FUNCTION_MODE - #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 72fbee5..1e60513 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe; - - /* Generate DWARF exception handling info. */ - #define DWARF2_UNWIND_INFO 1 -- - /* Don't generate .loc operations. */ - #define DWARF2_ASM_LINE_DEBUG_INFO 0 - -@@ -206,38 +205,51 @@ extern enum pipeline_type microblaze_pipe; - ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr) - - /* Use DWARF 2 debugging information by default. */ --#define DWARF2_DEBUGGING_INFO -+#define DWARF2_DEBUGGING_INFO 1 - #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG -+#define DWARF2_ADDR_SIZE 4 - - /* Target machine storage layout */ - - #define BITS_BIG_ENDIAN 0 - #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) - #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) --#define BITS_PER_WORD 32 --#define UNITS_PER_WORD 4 -+//#define BITS_PER_WORD 64 -+//Revisit -+#define MAX_BITS_PER_WORD 64 -+#define UNITS_PER_WORD (TARGET_MB_64 ? 8 : 4) -+//#define MIN_UNITS_PER_WORD (TARGET_MB_64 ? 8 : 4) -+//#define UNITS_PER_WORD 4 - #define MIN_UNITS_PER_WORD 4 - #define INT_TYPE_SIZE 32 - #define SHORT_TYPE_SIZE 16 --#define LONG_TYPE_SIZE 64 -+#define LONG_TYPE_SIZE (TARGET_MB_64 ? 64 : 32) - #define LONG_LONG_TYPE_SIZE 64 - #define FLOAT_TYPE_SIZE 32 - #define DOUBLE_TYPE_SIZE 64 - #define LONG_DOUBLE_TYPE_SIZE 64 --#define POINTER_SIZE 32 --#define PARM_BOUNDARY 32 --#define FUNCTION_BOUNDARY 32 --#define EMPTY_FIELD_BOUNDARY 32 -+#define POINTER_SIZE (TARGET_MB_64 ? 64 : 32) -+//#define WIDEST_HARDWARE_FP_SIZE 64 -+//#define POINTERS_EXTEND_UNSIGNED 1 -+#define PARM_BOUNDARY (TARGET_MB_64 ? 64 : 32) -+#define FUNCTION_BOUNDARY (TARGET_MB_64 ? 64 : 32) -+#define EMPTY_FIELD_BOUNDARY (TARGET_MB_64 ? 64 : 32) - #define STRUCTURE_SIZE_BOUNDARY 8 --#define BIGGEST_ALIGNMENT 32 -+#define BIGGEST_ALIGNMENT (TARGET_MB_64 ? 64 : 32) - #define STRICT_ALIGNMENT 1 - #define PCC_BITFIELD_TYPE_MATTERS 1 - -+//#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_MB_64 ? TImode : DImode) - #undef SIZE_TYPE --#define SIZE_TYPE "unsigned int" -+#define SIZE_TYPE (TARGET_MB_64 ? "long unsigned int" : "unsigned int") - - #undef PTRDIFF_TYPE --#define PTRDIFF_TYPE "int" -+#define PTRDIFF_TYPE (TARGET_MB_64 ? "long int" : "int") -+ -+/*#undef INTPTR_TYPE -+#define INTPTR_TYPE (TARGET_MB_64 ? "long int" : "int")*/ -+#undef UINTPTR_TYPE -+#define UINTPTR_TYPE (TARGET_MB_64 ? "long unsigned int" : "unsigned int") - - #define DATA_ALIGNMENT(TYPE, ALIGN) \ - ((((ALIGN) < BITS_PER_WORD) \ -@@ -253,12 +265,12 @@ extern enum pipeline_type microblaze_pipe; - #define WORD_REGISTER_OPERATIONS 1 - - #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND -- -+/* - #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ - if (GET_MODE_CLASS (MODE) == MODE_INT \ -- && GET_MODE_SIZE (MODE) < 4) \ -- (MODE) = SImode; -- -+ && GET_MODE_SIZE (MODE) < (TARGET_MB_64 ? 8 : 4)) \ -+ (MODE) = TARGET_MB_64 ? DImode : SImode; -+*/ - /* Standard register usage. */ - - /* On the MicroBlaze, we have 32 integer registers */ -@@ -438,13 +450,16 @@ extern struct microblaze_frame_info current_frame_info; - #define FIRST_PARM_OFFSET(FNDECL) (UNITS_PER_WORD) - - #define ARG_POINTER_CFA_OFFSET(FNDECL) 0 -+#define DWARF_CIE_DATA_ALIGNMENT -1 - - #define REG_PARM_STACK_SPACE(FNDECL) microblaze_reg_parm_stack_space(FNDECL) - - #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 - --#define STACK_BOUNDARY 32 -+#define STACK_BOUNDARY (TARGET_MB_64 ? 64 : 32) - -+#define PREFERRED_STACK_BOUNDARY (TARGET_MB_64 ? 64 : 32) -+ - #define NUM_OF_ARGS 6 - - #define GP_RETURN (GP_REG_FIRST + MB_ABI_INT_RETURN_VAL_REGNUM) -@@ -455,12 +470,15 @@ extern struct microblaze_frame_info current_frame_info; - #define MAX_ARGS_IN_REGISTERS MB_ABI_MAX_ARG_REGS - - #define LIBCALL_VALUE(MODE) \ -+ gen_rtx_REG (MODE,GP_RETURN) -+ -+/*#define LIBCALL_VALUE(MODE) \ - gen_rtx_REG ( \ - ((GET_MODE_CLASS (MODE) != MODE_INT \ - || GET_MODE_SIZE (MODE) >= 4) \ - ? (MODE) \ - : SImode), GP_RETURN) -- -+*/ - /* 1 if N is a possible register number for a function value. - On the MicroBlaze, R2 R3 are the only register thus used. - Currently, R2 are only implemented here (C has no complex type) */ -@@ -500,7 +518,7 @@ typedef struct microblaze_args - /* 4 insns + 2 words of data. */ - #define TRAMPOLINE_SIZE (6 * 4) - --#define TRAMPOLINE_ALIGNMENT 32 -+#define TRAMPOLINE_ALIGNMENT 64 - - #define REGNO_OK_FOR_BASE_P(regno) microblaze_regno_ok_for_base_p ((regno), 1) - -@@ -533,13 +551,13 @@ typedef struct microblaze_args - addresses which require two reload registers. */ - #define LEGITIMATE_PIC_OPERAND_P(X) microblaze_legitimate_pic_operand (X) - --#define CASE_VECTOR_MODE (SImode) -+#define CASE_VECTOR_MODE (TARGET_MB_64? DImode:SImode) - - #ifndef DEFAULT_SIGNED_CHAR - #define DEFAULT_SIGNED_CHAR 1 - #endif - --#define MOVE_MAX 4 -+#define MOVE_MAX (TARGET_MB_64 ? 8 : 4) - #define MAX_MOVE_MAX 8 - - #define SLOW_BYTE_ACCESS 1 -@@ -549,7 +567,7 @@ typedef struct microblaze_args - - #define SHIFT_COUNT_TRUNCATED 1 - --#define Pmode SImode -+#define Pmode (TARGET_MB_64? DImode:SImode) - - #define FUNCTION_MODE SImode - -@@ -711,6 +729,7 @@ do { \ - - #undef TARGET_ASM_OUTPUT_IDENT - #define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident -+//#define TARGET_ASM_OUTPUT_IDENT default_asm_output_ident_directive - - /* Default to -G 8 */ - #ifndef MICROBLAZE_DEFAULT_GVALUE -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 0cd0441..0f41ac6 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -26,6 +26,7 @@ - ;; Constants - ;;---------------------------------------------------- - (define_constants [ -+ (R_Z 0) ;; For reg r0 - (R_SP 1) ;; Stack pointer reg - (R_SR 15) ;; Sub-routine return addr reg - (R_IR 14) ;; Interrupt return addr reg -@@ -539,6 +540,7 @@ - - ;; Add 2 SImode integers [ src1 = reg ; src2 = arith ; dest = reg ] - ;; Leave carry as is -+ - (define_insn "addsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d") - (plus:SI (match_operand:SI 1 "reg_or_0_operand" "%dJ,dJ,dJ") -@@ -560,23 +562,38 @@ - - ;; Adding 2 DI operands in register or reg/imm - --(define_insn "adddi3_long" -+(define_expand "adddi3" -+ [(set (match_operand:DI 0 "register_operand" "") -+ (plus:DI (match_operand:DI 1 "register_operand" "") -+ (match_operand:DI 2 "arith_plus_operand" "")))] -+"" -+{ -+ if (TARGET_MB_64) -+ { -+ if (GET_CODE (operands[2]) == CONST_INT && -+ INTVAL(operands[2]) < (long)-549755813888 && -+ INTVAL(operands[2]) > (long)549755813887) -+ FAIL; -+ } -+}) -+ -+(define_insn "*adddi3_long" - [(set (match_operand:DI 0 "register_operand" "=d,d") -- (plus:DI (match_operand:DI 1 "reg_or_0_operand" "%dJ,dJ") -+ (plus:DI (match_operand:DI 1 "register_operand" "%d,d") - (match_operand:DI 2 "arith_plus_operand" "d,K")))] - "TARGET_MB_64" - "@ -- addlk\t%0,%z1,%2 -- addlik\t%0,%z1,%2" -- [(set_attr "type" "arith,arith") -- (set_attr "mode" "DI,DI") -+ addlk\t%0,%1,%2 -+ addlik\t%0,%1,%2 #N10" -+ [(set_attr "type" "darith,no_delay_arith") -+ (set_attr "mode" "DI") - (set_attr "length" "4,4")]) - --(define_insn "adddi3" -+(define_insn "*adddi3_all" - [(set (match_operand:DI 0 "register_operand" "=d,d") - (plus:DI (match_operand:DI 1 "register_operand" "%d,d") - (match_operand:DI 2 "arith_operand" "d,i")))] -- "" -+ "!TARGET_MB_64" - "@ - add\t%L0,%L1,%L2\;addc\t%M0,%M1,%M2 - addi\t%L0,%L1,%j2\;addic\t%M0,%M1,%h2" -@@ -603,7 +620,7 @@ - (define_insn "iprefetch" - [(unspec [(match_operand:SI 0 "const_int_operand" "n")] UNSPEC_IPREFETCH) - (clobber (mem:BLK (scratch)))] -- "TARGET_PREFETCH" -+ "TARGET_PREFETCH && !TARGET_MB_64" - { - operands[2] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); - return "mfs\t%2,rpc\n\twic\t%2,r0"; -@@ -616,23 +633,33 @@ - ;; Double Precision Subtraction - ;;---------------------------------------------------------------- - --(define_insn "subdi3_long" -- [(set (match_operand:DI 0 "register_operand" "=d,d") -- (minus:DI (match_operand:DI 1 "register_operand" "d,d") -- (match_operand:DI 2 "register_operand" "d,n")))] -+(define_expand "subdi3" -+ [(set (match_operand:DI 0 "register_operand" "") -+ (minus:DI (match_operand:DI 1 "register_operand" "") -+ (match_operand:DI 2 "arith_operand" "")))] -+"" -+" -+{ -+}") -+ -+(define_insn "subsidi3" -+ [(set (match_operand:DI 0 "register_operand" "=d,d,d") -+ (minus:DI (match_operand:DI 1 "register_operand" "d,d,d") -+ (match_operand:DI 2 "arith_operand" "d,K,n")))] - "TARGET_MB_64" - "@ - rsubl\t%0,%2,%1 -- addlik\t%0,%z1,-%2" -- [(set_attr "type" "darith") -- (set_attr "mode" "DI,DI") -- (set_attr "length" "4,4")]) -+ addik\t%0,%z1,-%2 -+ addik\t%0,%z1,-%2" -+ [(set_attr "type" "arith,no_delay_arith,no_delay_arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4,4,4")]) - --(define_insn "subdi3" -+(define_insn "subdi3_small" - [(set (match_operand:DI 0 "register_operand" "=&d") - (minus:DI (match_operand:DI 1 "register_operand" "d") - (match_operand:DI 2 "register_operand" "d")))] -- "" -+ "!TARGET_MB_64" - "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" - [(set_attr "type" "darith") - (set_attr "mode" "DI") -@@ -661,7 +688,7 @@ - (mult:DI - (sign_extend:DI (match_operand:SI 1 "register_operand" "d")) - (sign_extend:DI (match_operand:SI 2 "register_operand" "d"))))] -- "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH" -+ "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH && !TARGET_MB_64" - "mul\t%L0,%1,%2\;mulh\t%M0,%1,%2" - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") -@@ -672,7 +699,7 @@ - (mult:DI - (zero_extend:DI (match_operand:SI 1 "register_operand" "d")) - (zero_extend:DI (match_operand:SI 2 "register_operand" "d"))))] -- "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH" -+ "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH && !TARGET_MB_64" - "mul\t%L0,%1,%2\;mulhu\t%M0,%1,%2" - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") -@@ -683,7 +710,7 @@ - (mult:DI - (zero_extend:DI (match_operand:SI 1 "register_operand" "d")) - (sign_extend:DI (match_operand:SI 2 "register_operand" "d"))))] -- "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH" -+ "!TARGET_SOFT_MUL && TARGET_MULTIPLY_HIGH && !TARGET_MB_64" - "mul\t%L0,%1,%2\;mulhsu\t%M0,%2,%1" - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") -@@ -787,7 +814,7 @@ - (match_operand:SI 4 "arith_operand")]) - (label_ref (match_operand 5)) - (pc)))] -- "TARGET_HARD_FLOAT" -+ "TARGET_HARD_FLOAT && !TARGET_MB_64" - [(set (match_dup 1) (match_dup 3))] - - { -@@ -817,6 +844,15 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - -+(define_insn "negsi_long" -+ [(set (match_operand:SI 0 "register_operand" "=d") -+ (neg:SI (match_operand:DI 1 "register_operand" "d")))] -+ "" -+ "rsubk\t%0,%1,r0" -+ [(set_attr "type" "arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "4")]) -+ - (define_insn "negdi2_long" - [(set (match_operand:DI 0 "register_operand" "=d") - (neg:DI (match_operand:DI 1 "register_operand" "d")))] -@@ -845,16 +881,24 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - --(define_insn "one_cmpldi2_long" -+(define_expand "one_cmpldi2" -+ [(set (match_operand:DI 0 "register_operand" "") -+ (not:DI (match_operand:DI 1 "register_operand" "")))] -+ "" -+ " -+{ -+}") -+ -+(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=d") -- (not:DI (match_operand:DI 1 "register_operand" "d")))] -+ (not:DI (match_operand:DI 1 "arith_operand" "d")))] - "TARGET_MB_64" - "xorli\t%0,%1,-1" -- [(set_attr "type" "arith") -+ [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") - (set_attr "length" "4")]) - --(define_insn "*one_cmpldi2" -+(define_insn "" - [(set (match_operand:DI 0 "register_operand" "=d") - (not:DI (match_operand:DI 1 "register_operand" "d")))] - "" -@@ -869,7 +913,8 @@ - (not:DI (match_operand:DI 1 "register_operand" "")))] - "reload_completed - && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) -- && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1]))" -+ && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) -+ && !TARGET_MB_64" - - [(set (subreg:SI (match_dup 0) 0) (not:SI (subreg:SI (match_dup 1) 0))) - (set (subreg:SI (match_dup 0) 4) (not:SI (subreg:SI (match_dup 1) 4)))] -@@ -881,18 +926,17 @@ - ;;---------------------------------------------------------------- - - (define_insn "anddi3" -- [(set (match_operand:DI 0 "register_operand" "=d,d") -- (and:DI (match_operand:DI 1 "arith_operand" "d,d") -- (match_operand:DI 2 "arith_operand" "d,K")))] -+ [(set (match_operand:DI 0 "register_operand" "=d,d,d") -+ (and:DI (match_operand:DI 1 "arith_operand" "d,d,d") -+ (match_operand:DI 2 "arith_operand" "d,K,I")))] - "TARGET_MB_64" - "@ - andl\t%0,%1,%2 -- andli\t%0,%1,%2 #andl1" -- ;; andli\t%0,%1,%2 #andl3 -- ;; andli\t%0,%1,%2 #andl2 -- [(set_attr "type" "arith,arith") -- (set_attr "mode" "DI,DI") -- (set_attr "length" "4,4")]) -+ andli\t%0,%1,%2 #andl2 -+ andli\t%0,%1,%2 #andl3" -+ [(set_attr "type" "arith,no_delay_arith,no_delay_arith") -+ (set_attr "mode" "DI,DI,DI") -+ (set_attr "length" "4,4,4")]) - - (define_insn "andsi3" - [(set (match_operand:SI 0 "register_operand" "=d,d,d,d") -@@ -917,7 +961,7 @@ - "@ - orl\t%0,%1,%2 - orli\t%0,%1,%2 #andl1" -- [(set_attr "type" "arith,arith") -+ [(set_attr "type" "arith,no_delay_arith") - (set_attr "mode" "DI,DI") - (set_attr "length" "4,4")]) - -@@ -943,7 +987,7 @@ - "@ - xorl\t%0,%1,%2 - xorli\t%0,%1,%2 #andl1" -- [(set_attr "type" "arith,arith") -+ [(set_attr "type" "arith,no_delay_arith") - (set_attr "mode" "DI,DI") - (set_attr "length" "4,4")]) - -@@ -1016,26 +1060,6 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - --;;(define_expand "extendqidi2" --;; [(set (match_operand:DI 0 "register_operand" "=d") --;; (sign_extend:DI (match_operand:QI 1 "general_operand" "d")))] --;; "TARGET_MB_64" --;; { --;; if (GET_CODE (operands[1]) != REG) --;; FAIL; --;; } --;;) -- -- --;;(define_insn "extendqidi2" --;; [(set (match_operand:DI 0 "register_operand" "=d") --;; (sign_extend:DI (match_operand:QI 1 "register_operand" "d")))] --;; "TARGET_MB_64" --;; "sextl8\t%0,%1" --;; [(set_attr "type" "arith") --;; (set_attr "mode" "DI") --;; (set_attr "length" "4")]) -- - (define_insn "extendhisi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (sign_extend:SI (match_operand:HI 1 "register_operand" "d")))] -@@ -1058,6 +1082,27 @@ - ;; Those for integer source operand are ordered - ;; widest source type first. - -+(define_insn "extendsidi2_long" -+ [(set (match_operand:DI 0 "register_operand" "=d,d,d") -+ (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,R,m")))] -+ "TARGET_MB_64" -+ { -+ switch (which_alternative) -+ { -+ case 0: -+ return "sextl32\t%0,%1"; -+ case 1: -+ case 2: -+ { -+ output_asm_insn ("ll%i1\t%0,%1", operands); -+ return "sextl32\t%0,%0"; -+ } -+ } -+ } -+ [(set_attr "type" "multi,multi,multi") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4,8,8")]) -+ - (define_insn "extendsidi2" - [(set (match_operand:DI 0 "register_operand" "=d,d,d") - (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "d,R,m")))] -@@ -1088,68 +1133,117 @@ - ;; Unlike most other insns, the move insns can't be split with - ;; different predicates, because register spilling and other parts of - ;; the compiler, have memoized the insn number already. -+;; //} - - (define_expand "movdi" - [(set (match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:DI 1 "general_operand" ""))] - "" - { -- /* If operands[1] is a constant address illegal for pic, then we need to -- handle it just like microblaze_legitimize_address does. */ -- if (flag_pic && pic_address_needs_scratch (operands[1])) -+ if (TARGET_MB_64) -+ { -+ if (microblaze_expand_move (DImode, operands)) DONE; -+ } -+ else - { -+ /* If operands[1] is a constant address illegal for pic, then we need to -+ handle it just like microblaze_legitimize_address does. */ -+ if (flag_pic && pic_address_needs_scratch (operands[1])) -+ { - rtx temp = force_reg (DImode, XEXP (XEXP (operands[1], 0), 0)); - rtx temp2 = XEXP (XEXP (operands[1], 0), 1); - emit_move_insn (operands[0], gen_rtx_PLUS (DImode, temp, temp2)); - DONE; -- } -- -- -- if ((reload_in_progress | reload_completed) == 0 -- && !register_operand (operands[0], DImode) -- && !register_operand (operands[1], DImode) -- && (((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0) -- && operands[1] != CONST0_RTX (DImode)))) -- { -+ } - -- rtx temp = force_reg (DImode, operands[1]); -- emit_move_insn (operands[0], temp); -- DONE; -+ if ((reload_in_progress | reload_completed) == 0 -+ && !register_operand (operands[0], DImode) -+ && !register_operand (operands[1], DImode) -+ && (((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0) -+ && operands[1] != CONST0_RTX (DImode)))) -+ { -+ rtx temp = force_reg (DImode, operands[1]); -+ emit_move_insn (operands[0], temp); -+ DONE; -+ } - } - } - ) - -+;; Added for status registers -+(define_insn "movdi_status" -+ [(set (match_operand:DI 0 "register_operand" "=d,d,z") -+ (match_operand:DI 1 "register_operand" "z,d,d"))] -+ "microblaze_is_interrupt_variant () && TARGET_MB_64" -+ "@ -+ mfs\t%0,%1 #mfs -+ addlk\t%0,%1,r0 #add movdi -+ mts\t%0,%1 #mts" -+ [(set_attr "type" "move") -+ (set_attr "mode" "DI") -+ (set_attr "length" "12")]) - --(define_insn "*movdi_internal_64" -- [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") -- (match_operand:DI 1 "general_operand" " d,K,J,R,o,d,d"))] -- "TARGET_MB_64 && (INTVAL(operands[1]) < 0x7fffffffff) && (INTVAL(operands[1]) > 0xffffff8000000000)" -+;; This move will be not be moved to delay slot. -+(define_insn "*movdi_internal3" -+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d") -+ (match_operand:DI 1 "immediate_operand" "J,I,Mnis"))] -+ "TARGET_MB_64 && (register_operand (operands[0], DImode) && -+ (GET_CODE (operands[1]) == CONST_INT && -+ (INTVAL (operands[1]) <= (long)549755813887 && INTVAL (operands[1]) >= (long)-549755813888)))" -+ "@ -+ addlk\t%0,r0,r0\t -+ addlik\t%0,r0,%1\t #N1 %X1 -+ addlik\t%0,r0,%1\t #N2 %X1" -+ [(set_attr "type" "arith,no_delay_arith,no_delay_arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")]) -+ -+;; This move may be used for PLT label operand -+(define_insn "*movdi_internal5_pltop" -+ [(set (match_operand:DI 0 "register_operand" "=d,d") -+ (match_operand:DI 1 "call_insn_operand" ""))] -+ "TARGET_MB_64 && (register_operand (operands[0], Pmode) && -+ PLT_ADDR_P (operands[1]))" -+ { -+ gcc_unreachable (); -+ } -+ [(set_attr "type" "load") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")]) -+ -+(define_insn "*movdi_internal2" -+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m") -+ (match_operand:DI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))] -+ "TARGET_MB_64" - { - switch (which_alternative) - { - case 0: -- return "addlk\t%0,%1"; -- case 1: -- return "addlik\t%0,r0,%1"; -- case 2: -- return "addlk\t%0,r0,r0"; -- case 3: -- case 4: -- return "lli\t%0,%1"; -- case 5: -- case 6: -- return "sli\t%1,%0"; -- } -- return "unreachable"; -- } -- [(set_attr "type" "no_delay_move,no_delay_arith,no_delay_arith,no_delay_load,no_delay_load,no_delay_store,no_delay_store") -+ return "addlk\t%0,%1,r0"; -+ case 1: -+ case 2: -+ if (GET_CODE (operands[1]) == CONST_INT && -+ (INTVAL (operands[1]) > (long)549755813887 || INTVAL (operands[1]) < (long)-549755813888)) -+ return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; -+ else -+ return "addlik\t%0,r0,%1"; -+ case 3: -+ case 4: -+ return "ll%i1\t%0,%1"; -+ case 5: -+ case 6: -+ return "sl%i0\t%z1,%0"; -+ } -+ } -+ [(set_attr "type" "load,no_delay_load,no_delay_load,no_delay_load,no_delay_load,no_delay_store,no_delay_store") - (set_attr "mode" "DI") -- (set_attr "length" "8,8,8,8,12,8,12")]) -+ (set_attr "length" "4,4,12,4,8,4,8")]) -+ - - (define_insn "*movdi_internal" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,R,o") - (match_operand:DI 1 "general_operand" " d,i,J,R,o,d,d"))] -- "" -+ "!TARGET_MB_64" - { - switch (which_alternative) - { -@@ -1181,7 +1275,8 @@ - "reload_completed - && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) -- && (REGNO(operands[0]) == (REGNO(operands[1]) + 1))" -+ && (REGNO(operands[0]) == (REGNO(operands[1]) + 1)) -+ && !(TARGET_MB_64)" - - [(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4)) - (set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))] -@@ -1193,12 +1288,22 @@ - "reload_completed - && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) -- && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))" -+ && (REGNO (operands[0]) != (REGNO (operands[1]) + 1)) -+ && !(TARGET_MB_64)" - - [(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0)) - (set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))] - "") - -+(define_insn "movdi_long_int" -+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d") -+ (match_operand:DI 1 "general_operand" "i"))] -+ "" -+ "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; -+ [(set_attr "type" "no_delay_arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "12")]) -+ - ;; Unlike most other insns, the move insns can't be split with - ;; different predicates, because register spilling and other parts of - ;; the compiler, have memoized the insn number already. -@@ -1270,6 +1375,8 @@ - (set_attr "length" "4,4,8,4,8,4,8")]) - - -+ -+ - ;; 16-bit Integer moves - - ;; Unlike most other insns, the move insns can't be split with -@@ -1302,8 +1409,8 @@ - "@ - addik\t%0,r0,%1\t# %X1 - addk\t%0,%1,r0 -- lhui\t%0,%1 -- lhui\t%0,%1 -+ lhu%i1\t%0,%1 -+ lhu%i1\t%0,%1 - sh%i0\t%z1,%0 - sh%i0\t%z1,%0" - [(set_attr "type" "arith,move,load,no_delay_load,store,no_delay_store") -@@ -1346,7 +1453,7 @@ - lbu%i1\t%0,%1 - lbu%i1\t%0,%1 - sb%i0\t%z1,%0 -- sbi\t%z1,%0" -+ sb%i0\t%z1,%0" - [(set_attr "type" "arith,arith,move,load,no_delay_load,store,no_delay_store") - (set_attr "mode" "QI") - (set_attr "length" "4,4,8,4,8,4,8")]) -@@ -1419,7 +1526,7 @@ - addik\t%0,r0,%F1 - lw%i1\t%0,%1 - sw%i0\t%z1,%0 -- swi\t%z1,%0" -+ sw%i0\t%z1,%0" - [(set_attr "type" "move,no_delay_load,load,no_delay_load,no_delay_load,store,no_delay_store") - (set_attr "mode" "SF") - (set_attr "length" "4,4,4,4,4,4,4")]) -@@ -1458,6 +1565,33 @@ - ;; movdf_internal - ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT - ;; -+(define_insn "*movdf_internal_64" -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m") -+ (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))] -+ "TARGET_MB_64" -+ { -+ switch (which_alternative) -+ { -+ case 0: -+ return "addlk\t%0,%1,r0"; -+ case 1: -+ return "addlk\t%0,r0,r0"; -+ case 2: -+ case 4: -+ return "ll%i1\t%0,%1"; -+ case 3: -+ { -+ return "addlik\t%0,r0,%h1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #Xfer Lo"; -+ } -+ case 5: -+ return "sl%i0\t%1,%0"; -+ } -+ gcc_unreachable (); -+ } -+ [(set_attr "type" "no_delay_move,no_delay_move,no_delay_load,no_delay_load,no_delay_load,no_delay_store") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4,4,4,16,4,4")]) -+ - (define_insn "*movdf_internal" - [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,o") - (match_operand:DF 1 "general_operand" "dG,o,F,T,d"))] -@@ -1492,7 +1626,8 @@ - "reload_completed - && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) -- && (REGNO (operands[0]) == (REGNO (operands[1]) + 1))" -+ && (REGNO (operands[0]) == (REGNO (operands[1]) + 1)) -+ && !TARGET_MB_64" - [(set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4)) - (set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0))] - "") -@@ -1503,7 +1638,8 @@ - "reload_completed - && GET_CODE (operands[0]) == REG && GP_REG_P (REGNO (operands[0])) - && GET_CODE (operands[1]) == REG && GP_REG_P (REGNO (operands[1])) -- && (REGNO (operands[0]) != (REGNO (operands[1]) + 1))" -+ && (REGNO (operands[0]) != (REGNO (operands[1]) + 1)) -+ && !TARGET_MB_64" - [(set (subreg:SI (match_dup 0) 0) (subreg:SI (match_dup 1) 0)) - (set (subreg:SI (match_dup 0) 4) (subreg:SI (match_dup 1) 4))] - "") -@@ -2003,6 +2139,31 @@ else - " - ) - -+ -+(define_insn "seq_internal_pat_long" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (eq:DI -+ (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "pcmpleq\t%0,%1,%2" -+ [(set_attr "type" "arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")] -+) -+ -+(define_insn "sne_internal_pat_long" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (ne:DI -+ (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "pcmplne\t%0,%1,%2" -+ [(set_attr "type" "arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4")] -+) -+ - (define_insn "seq_internal_pat" - [(set (match_operand:SI 0 "register_operand" "=d") - (eq:SI -@@ -2063,8 +2224,8 @@ else - (define_expand "cbranchsi4" - [(set (pc) - (if_then_else (match_operator 0 "ordered_comparison_operator" -- [(match_operand:SI 1 "register_operand") -- (match_operand:SI 2 "arith_operand" "I,i")]) -+ [(match_operand 1 "register_operand") -+ (match_operand 2 "arith_operand" "I,i")]) - (label_ref (match_operand 3 "")) - (pc)))] - "" -@@ -2076,13 +2237,13 @@ else - (define_expand "cbranchsi4_reg" - [(set (pc) - (if_then_else (match_operator 0 "ordered_comparison_operator" -- [(match_operand:SI 1 "register_operand") -- (match_operand:SI 2 "register_operand")]) -+ [(match_operand 1 "register_operand") -+ (match_operand 2 "register_operand")]) - (label_ref (match_operand 3 "")) - (pc)))] - "" - { -- microblaze_expand_conditional_branch_reg (SImode, operands); -+ microblaze_expand_conditional_branch_reg (Pmode, operands); - DONE; - }) - -@@ -2107,6 +2268,26 @@ else - (label_ref (match_operand 1)) - (pc)))]) - -+(define_insn "branch_zero64" -+ [(set (pc) -+ (if_then_else (match_operator 0 "ordered_comparison_operator" -+ [(match_operand 1 "register_operand" "d") -+ (const_int 0)]) -+ (match_operand 2 "pc_or_label_operand" "") -+ (match_operand 3 "pc_or_label_operand" ""))) -+ ] -+ "TARGET_MB_64" -+ { -+ if (operands[3] == pc_rtx) -+ return "bea%C0i%?\t%z1,%2"; -+ else -+ return "bea%N0i%?\t%z1,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")] -+) -+ - (define_insn "branch_zero" - [(set (pc) - (if_then_else (match_operator:SI 0 "ordered_comparison_operator" -@@ -2127,6 +2308,47 @@ else - (set_attr "length" "4")] - ) - -+(define_insn "branch_compare64" -+ [(set (pc) -+ (if_then_else (match_operator 0 "cmp_op" -+ [(match_operand 1 "register_operand" "d") -+ (match_operand 2 "register_operand" "d") -+ ]) -+ (label_ref (match_operand 3)) -+ (pc))) -+ (clobber(reg:SI R_TMP))] -+ "TARGET_MB_64" -+ { -+ operands[4] = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+ enum rtx_code code = GET_CODE (operands[0]); -+ -+ if (code == GT || code == LE) -+ { -+ output_asm_insn ("cmp\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GTU || code == LEU) -+ { -+ output_asm_insn ("cmpu\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GE || code == LT) -+ { -+ output_asm_insn ("cmp\tr18,%z2,%z1", operands); -+ } -+ else if (code == GEU || code == LTU) -+ { -+ output_asm_insn ("cmpu\tr18,%z2,%z1", operands); -+ } -+ -+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), SImode, operands[4], const0_rtx); -+ return "bea%C0i%?\tr18,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "12")] -+) -+ - (define_insn "branch_compare" - [(set (pc) - (if_then_else (match_operator:SI 0 "cmp_op" -@@ -2310,7 +2532,7 @@ else - ;; Indirect jumps. Jump to register values. Assuming absolute jumps - - (define_insn "indirect_jump_internal1" -- [(set (pc) (match_operand:SI 0 "register_operand" "d"))] -+ [(set (pc) (match_operand 0 "register_operand" "d"))] - "" - "bra%?\t%0" - [(set_attr "type" "jump") -@@ -2323,7 +2545,7 @@ else - (use (label_ref (match_operand 1 "" "")))] - "" - { -- gcc_assert (GET_MODE (operands[0]) == Pmode); -+ //gcc_assert (GET_MODE (operands[0]) == Pmode); - - if (!flag_pic) - emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1])); -@@ -2335,7 +2557,7 @@ else - - (define_insn "tablejump_internal1" - [(set (pc) -- (match_operand:SI 0 "register_operand" "d")) -+ (match_operand 0 "register_operand" "d")) - (use (label_ref (match_operand 1 "" "")))] - "" - "bra%?\t%0 " -@@ -2345,9 +2567,9 @@ else - - (define_expand "tablejump_internal3" - [(parallel [(set (pc) -- (plus:SI (match_operand:SI 0 "register_operand" "d") -- (label_ref:SI (match_operand:SI 1 "" "")))) -- (use (label_ref:SI (match_dup 1)))])] -+ (plus (match_operand 0 "register_operand" "d") -+ (label_ref (match_operand:SI 1 "" "")))) -+ (use (label_ref (match_dup 1)))])] - "" - "" - ) -@@ -2408,7 +2630,7 @@ else - (minus (reg 1) (match_operand 1 "register_operand" ""))) - (set (reg 1) - (minus (reg 1) (match_dup 1)))] -- "" -+ "!TARGET_MB_64" - { - rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx); - rtx reg = gen_reg_rtx (Pmode); -@@ -2433,7 +2655,7 @@ else - (define_expand "save_stack_block" - [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "")] -- "" -+ "!TARGET_MB_64" - { - emit_move_insn (operands[0], operands[1]); - DONE; -@@ -2443,7 +2665,7 @@ else - (define_expand "restore_stack_block" - [(match_operand 0 "register_operand" "") - (match_operand 1 "register_operand" "")] -- "" -+ "!TARGET_MB_64" - { - rtx retaddr = gen_rtx_MEM (Pmode, stack_pointer_rtx); - rtx rtmp = gen_rtx_REG (SImode, R_TMP); -@@ -2490,7 +2712,7 @@ else - - (define_insn "<optab>_internal" - [(any_return) -- (use (match_operand:SI 0 "register_operand" ""))] -+ (use (match_operand 0 "register_operand" ""))] - "" - { - if (microblaze_is_break_handler ()) -@@ -2523,7 +2745,7 @@ else - (define_expand "call" - [(parallel [(call (match_operand 0 "memory_operand" "m") - (match_operand 1 "" "i")) -- (clobber (reg:SI R_SR)) -+ (clobber (reg R_SR)) - (use (match_operand 2 "" "")) - (use (match_operand 3 "" ""))])] - "" -@@ -2543,12 +2765,12 @@ else - - if (GET_CODE (XEXP (operands[0], 0)) == UNSPEC) - emit_call_insn (gen_call_internal_plt0 (operands[0], operands[1], -- gen_rtx_REG (SImode, -+ gen_rtx_REG (Pmode, - GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM), - pic_offset_table_rtx)); - else - emit_call_insn (gen_call_internal0 (operands[0], operands[1], -- gen_rtx_REG (SImode, -+ gen_rtx_REG (Pmode, - GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM))); - - DONE; -@@ -2558,7 +2780,7 @@ else - (define_expand "call_internal0" - [(parallel [(call (match_operand 0 "" "") - (match_operand 1 "" "")) -- (clobber (match_operand:SI 2 "" ""))])] -+ (clobber (match_operand 2 "" ""))])] - "" - { - } -@@ -2567,18 +2789,34 @@ else - (define_expand "call_internal_plt0" - [(parallel [(call (match_operand 0 "" "") - (match_operand 1 "" "")) -- (clobber (match_operand:SI 2 "" "")) -- (use (match_operand:SI 3 "" ""))])] -+ (clobber (match_operand 2 "" "")) -+ (use (match_operand 3 "" ""))])] - "" - { - } - ) - -+(define_insn "call_internal_plt_64" -+ [(call (mem (match_operand 0 "call_insn_plt_operand" "")) -+ (match_operand 1 "" "i")) -+ (clobber (reg R_SR)) -+ (use (reg R_GOT))] -+ "flag_pic && TARGET_MB_64" -+ { -+ register rtx target2 = gen_rtx_REG (Pmode, -+ GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ gen_rtx_CLOBBER (VOIDmode, target2); -+ return "brealid\tr15,%0\;%#"; -+ } -+ [(set_attr "type" "call") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_insn "call_internal_plt" -- [(call (mem (match_operand:SI 0 "call_insn_plt_operand" "")) -- (match_operand:SI 1 "" "i")) -- (clobber (reg:SI R_SR)) -- (use (reg:SI R_GOT))] -+ [(call (mem (match_operand 0 "call_insn_plt_operand" "")) -+ (match_operand 1 "" "i")) -+ (clobber (reg R_SR)) -+ (use (reg R_GOT))] - "flag_pic" - { - register rtx target2 = gen_rtx_REG (Pmode, -@@ -2590,10 +2828,41 @@ else - (set_attr "mode" "none") - (set_attr "length" "4")]) - -+(define_insn "call_internal1_64" -+ [(call (mem (match_operand:VOID 0 "call_insn_simple_operand" "ri")) -+ (match_operand 1 "" "i")) -+ (clobber (reg R_SR))] -+ "TARGET_MB_64" -+ { -+ register rtx target = operands[0]; -+ register rtx target2 = gen_rtx_REG (Pmode, -+ GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ if (GET_CODE (target) == SYMBOL_REF) { -+ if (microblaze_break_function_p (SYMBOL_REF_DECL (target))) { -+ gen_rtx_CLOBBER (VOIDmode, target2); -+ return "breaki\tr16,%0\;%#"; -+ } -+ else { -+ gen_rtx_CLOBBER (VOIDmode, target2); -+ return "brealid\tr15,%0\;%#"; -+ } -+ } else if (GET_CODE (target) == CONST_INT) -+ return "la\t%@,r0,%0\;brald\tr15,%@\;%#"; -+ else if (GET_CODE (target) == REG) -+ return "brald\tr15,%0\;%#"; -+ else { -+ fprintf (stderr,"Unsupported call insn\n"); -+ return NULL; -+ } -+ } -+ [(set_attr "type" "call") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_insn "call_internal1" - [(call (mem (match_operand:VOID 0 "call_insn_simple_operand" "ri")) -- (match_operand:SI 1 "" "i")) -- (clobber (reg:SI R_SR))] -+ (match_operand 1 "" "i")) -+ (clobber (reg R_SR))] - "" - { - register rtx target = operands[0]; -@@ -2627,7 +2896,7 @@ else - [(parallel [(set (match_operand 0 "register_operand" "=d") - (call (match_operand 1 "memory_operand" "m") - (match_operand 2 "" "i"))) -- (clobber (reg:SI R_SR)) -+ (clobber (reg R_SR)) - (use (match_operand 3 "" ""))])] ;; next_arg_reg - "" - { -@@ -2647,13 +2916,13 @@ else - if (GET_CODE (XEXP (operands[1], 0)) == UNSPEC) - emit_call_insn (gen_call_value_intern_plt0 (operands[0], operands[1], - operands[2], -- gen_rtx_REG (SImode, -+ gen_rtx_REG (Pmode, - GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM), - pic_offset_table_rtx)); - else - emit_call_insn (gen_call_value_internal (operands[0], operands[1], - operands[2], -- gen_rtx_REG (SImode, -+ gen_rtx_REG (Pmode, - GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM))); - - DONE; -@@ -2665,7 +2934,7 @@ else - [(parallel [(set (match_operand 0 "" "") - (call (match_operand 1 "" "") - (match_operand 2 "" ""))) -- (clobber (match_operand:SI 3 "" "")) -+ (clobber (match_operand 3 "" "")) - ])] - "" - {} -@@ -2675,18 +2944,35 @@ else - [(parallel[(set (match_operand 0 "" "") - (call (match_operand 1 "" "") - (match_operand 2 "" ""))) -- (clobber (match_operand:SI 3 "" "")) -- (use (match_operand:SI 4 "" ""))])] -+ (clobber (match_operand 3 "" "")) -+ (use (match_operand 4 "" ""))])] - "flag_pic" - {} - ) - -+(define_insn "call_value_intern_plt_64" -+ [(set (match_operand:VOID 0 "register_operand" "=d") -+ (call (mem (match_operand 1 "call_insn_plt_operand" "")) -+ (match_operand 2 "" "i"))) -+ (clobber (match_operand 3 "register_operand" "=d")) -+ (use (match_operand 4 "register_operand"))] -+ "flag_pic && TARGET_MB_64" -+ { -+ register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ -+ gen_rtx_CLOBBER (VOIDmode,target2); -+ return "brealid\tr15,%1\;%#"; -+ } -+ [(set_attr "type" "call") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_insn "call_value_intern_plt" - [(set (match_operand:VOID 0 "register_operand" "=d") -- (call (mem (match_operand:SI 1 "call_insn_plt_operand" "")) -- (match_operand:SI 2 "" "i"))) -- (clobber (match_operand:SI 3 "register_operand" "=d")) -- (use (match_operand:SI 4 "register_operand"))] -+ (call (mem (match_operand 1 "call_insn_plt_operand" "")) -+ (match_operand 2 "" "i"))) -+ (clobber (match_operand 3 "register_operand" "=d")) -+ (use (match_operand 4 "register_operand"))] - "flag_pic" - { - register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM); -@@ -2698,11 +2984,46 @@ else - (set_attr "mode" "none") - (set_attr "length" "4")]) - -+(define_insn "call_value_intern_64" -+ [(set (match_operand:VOID 0 "register_operand" "=d") -+ (call (mem (match_operand:VOID 1 "call_insn_operand" "ri")) -+ (match_operand 2 "" "i"))) -+ (clobber (match_operand 3 "register_operand" "=d"))] -+ "TARGET_MB_64" -+ { -+ register rtx target = operands[1]; -+ register rtx target2=gen_rtx_REG (Pmode,GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM); -+ -+ if (GET_CODE (target) == SYMBOL_REF) -+ { -+ gen_rtx_CLOBBER (VOIDmode,target2); -+ if (microblaze_break_function_p (SYMBOL_REF_DECL (target))) -+ return "breaki\tr16,%1\;%#"; -+ else if (SYMBOL_REF_FLAGS (target) & SYMBOL_FLAG_FUNCTION) -+ { -+ return "brealid\tr15,%1\;%#"; -+ } -+ else -+ { -+ return "bralid\tr15,%1\;%#"; -+ } -+ } -+ else if (GET_CODE (target) == CONST_INT) -+ return "la\t%@,r0,%1\;brald\tr15,%@\;%#"; -+ else if (GET_CODE (target) == REG) -+ return "brald\tr15,%1\;%#"; -+ else -+ return "Unsupported call insn\n"; -+ } -+ [(set_attr "type" "call") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_insn "call_value_intern" - [(set (match_operand:VOID 0 "register_operand" "=d") - (call (mem (match_operand:VOID 1 "call_insn_operand" "ri")) -- (match_operand:SI 2 "" "i"))) -- (clobber (match_operand:SI 3 "register_operand" "=d"))] -+ (match_operand 2 "" "i"))) -+ (clobber (match_operand 3 "register_operand" "=d"))] - "" - { - register rtx target = operands[1]; -@@ -2864,7 +3185,6 @@ else - - ;;if (!register_operand (operands[0], VOIDmode)) - ;; FAIL; -- - emit_insn (gen_insv_32 (operands[0], operands[1], - operands[2], operands[3])); - DONE; -diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze -index 7671f63..9fc80b1 100644 ---- a/gcc/config/microblaze/t-microblaze -+++ b/gcc/config/microblaze/t-microblaze -@@ -2,10 +2,11 @@ MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-en - MULTILIB_DIRNAMES = bs m mh le m64 - MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high - MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian --MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 -+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian/m64 -+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 mxl-multiply-high - MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian --#MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 --#MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 -+MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 -+MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 - - # Extra files - microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ -diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S -index 2e15be4..3386520 100644 ---- a/libgcc/config/microblaze/crti.S -+++ b/libgcc/config/microblaze/crti.S -@@ -40,7 +40,7 @@ - - .align 2 - __init: -- addik r1, r1, -8 -+ addik r1, r1, -16 - sw r15, r0, r1 - la r11, r0, _stack - mts rshr, r11 -@@ -51,5 +51,5 @@ __init: - .global __fini - .align 2 - __fini: -- addik r1, r1, -8 -+ addik r1, r1, -16 - sw r15, r0, r1 -diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S -index cd5fd9e..04e73d7 100644 ---- a/libgcc/config/microblaze/crtn.S -+++ b/libgcc/config/microblaze/crtn.S -@@ -33,9 +33,9 @@ - .section .init, "ax" - lw r15, r0, r1 - rtsd r15, 8 -- addik r1, r1, 8 -+ addik r1, r1, 16 - - .section .fini, "ax" - lw r15, r0, r1 - rtsd r15, 8 -- addik r1, r1, 8 -+ addik r1, r1, 16 -diff --git a/libgcc/config/microblaze/divdi3.S b/libgcc/config/microblaze/divdi3.S -new file mode 100644 -index 0000000..d37bf51 ---- /dev/null -+++ b/libgcc/config/microblaze/divdi3.S -@@ -0,0 +1,98 @@ -+###################################- -+# -+# Copyright (C) 2009-2017 Free Software Foundation, Inc. -+# -+# Contributed by Michael Eager <eager@eagercon.com>. -+# -+# This file is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 3, or (at your option) any -+# later version. -+# -+# GCC is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+# License for more details. -+# -+# Under Section 7 of GPL version 3, you are granted additional -+# permissions described in the GCC Runtime Library Exception, version -+# 3.1, as published by the Free Software Foundation. -+# -+# You should have received a copy of the GNU General Public License and -+# a copy of the GCC Runtime Library Exception along with this program; -+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+# <http://www.gnu.org/licenses/>. -+# -+# divdi3.S -+# -+# Divide operation for 32 bit integers. -+# Input : Dividend in Reg r5 -+# Divisor in Reg r6 -+# Output: Result in Reg r3 -+# -+####################################### -+ -+#ifdef __arch64__ -+ .globl __divdi3 -+ .ent __divdi3 -+ .type __divdi3,@function -+__divdi3: -+ .frame r1,0,r15 -+ -+ ADDLIK r1,r1,-32 -+ SLI r28,r1,0 -+ SLI r29,r1,8 -+ SLI r30,r1,16 -+ SLI r31,r1,24 -+ -+ BEALEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEALEQI r5,$LaResult_Is_Zero # Result is Zero -+ XORL r28,r5,r6 # Get the sign of the result -+ BEALGEI r5,$LaR5_Pos -+ RSUBLI r5,r5,0 # Make r5 positive -+$LaR5_Pos: -+ BEALGEI r6,$LaR6_Pos -+ RSUBLI r6,r6,0 # Make r6 positive -+$LaR6_Pos: -+ ADDLIK r30,r0,0 # Clear mod -+ ADDLIK r3,r0,0 # clear div -+ ADDLIK r29,r0,64 # Initialize the loop count -+ -+ # First part try to find the first '1' in the r5 -+$LaDIV0: -+ BEALLTI r5,$LaDIV2 # This traps r5 == 0x80000000 -+$LaDIV1: -+ ADDL r5,r5,r5 # left shift logical r5 -+ ADDLIK r29,r29,-1 -+ BEALGTI r5,$LaDIV1 -+$LaDIV2: -+ ADDL r5,r5,r5 # left shift logical r5 get the '1' into the Carry -+ ADDLC r30,r30,r30 # Move that bit into the Mod register -+ RSUBL r31,r6,r30 # Try to subtract (r30 a r6) -+ BEALLTI r31,$LaMOD_TOO_SMALL -+ ORL r30,r0,r31 # Move the r31 to mod since the result was positive -+ ADDLIK r3,r3,1 -+$LaMOD_TOO_SMALL: -+ ADDLIK r29,r29,-1 -+ BEALEQi r29,$LaLOOP_END -+ ADDL r3,r3,r3 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BEALGEI r28,$LaRETURN_HERE -+ RSUBLI r3,r3,0 # Negate the result -+ BREAI $LaRETURN_HERE -+$LaDiv_By_Zero: -+$LaResult_Is_Zero: -+ ORL r3,r0,r0 # set result to 0 -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ LLI r28,r1,0 -+ LLI r29,r1,8 -+ LLI r30,r1,16 -+ LLI r31,r1,24 -+ ADDLIK r1,r1,32 -+ RTSD r15,8 -+ nop -+.end __divdi3 -+ .size __divdi3, . - __divdi3 -+#endif -diff --git a/libgcc/config/microblaze/divdi3_table.c b/libgcc/config/microblaze/divdi3_table.c -new file mode 100644 -index 0000000..8096259 ---- /dev/null -+++ b/libgcc/config/microblaze/divdi3_table.c -@@ -0,0 +1,62 @@ -+/* Table for software lookup divide for Xilinx MicroBlaze. -+ -+ Copyright (C) 2009-2017 Free Software Foundation, Inc. -+ -+ Contributed by Michael Eager <eager@eagercon.com>. -+ -+ This file is free software; you can redistribute it and/or modify it -+ under the terms of the GNU General Public License as published by the -+ Free Software Foundation; either version 3, or (at your option) any -+ later version. -+ -+ GCC is distributed in the hope that it will be useful, but WITHOUT -+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+ License for more details. -+ -+ Under Section 7 of GPL version 3, you are granted additional -+ permissions described in the GCC Runtime Library Exception, version -+ 3.1, as published by the Free Software Foundation. -+ -+ You should have received a copy of the GNU General Public License and -+ a copy of the GCC Runtime Library Exception along with this program; -+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+ <http://www.gnu.org/licenses/>. */ -+ -+ -+unsigned char _divdi3_table[] = -+{ -+ 0, 0/1, 0/2, 0/3, 0/4, 0/5, 0/6, 0/7, -+ 0/8, 0/9, 0/10, 0/11, 0/12, 0/13, 0/14, 0/15, -+ 0, 1/1, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7, -+ 1/8, 1/9, 1/10, 1/11, 1/12, 1/13, 1/14, 1/15, -+ 0, 2/1, 2/2, 2/3, 2/4, 2/5, 2/6, 2/7, -+ 2/8, 2/9, 2/10, 2/11, 2/12, 2/13, 2/14, 2/15, -+ 0, 3/1, 3/2, 3/3, 3/4, 3/5, 3/6, 3/7, -+ 3/8, 3/9, 3/10, 3/11, 3/12, 3/13, 3/14, 3/15, -+ 0, 4/1, 4/2, 4/3, 4/4, 4/5, 4/6, 4/7, -+ 4/8, 4/9, 4/10, 4/11, 4/12, 4/13, 4/14, 4/15, -+ 0, 5/1, 5/2, 5/3, 5/4, 5/5, 5/6, 5/7, -+ 5/8, 5/9, 5/10, 5/11, 5/12, 5/13, 5/14, 5/15, -+ 0, 6/1, 6/2, 6/3, 6/4, 6/5, 6/6, 6/7, -+ 6/8, 6/9, 6/10, 6/11, 6/12, 6/13, 6/14, 6/15, -+ 0, 7/1, 7/2, 7/3, 7/4, 7/5, 7/6, 7/7, -+ 7/8, 7/9, 7/10, 7/11, 7/12, 7/13, 7/14, 7/15, -+ 0, 8/1, 8/2, 8/3, 8/4, 8/5, 8/6, 8/7, -+ 8/8, 8/9, 8/10, 8/11, 8/12, 8/13, 8/14, 8/15, -+ 0, 9/1, 9/2, 9/3, 9/4, 9/5, 9/6, 9/7, -+ 9/8, 9/9, 9/10, 9/11, 9/12, 9/13, 9/14, 9/15, -+ 0, 10/1, 10/2, 10/3, 10/4, 10/5, 10/6, 10/7, -+ 10/8, 10/9, 10/10, 10/11, 10/12, 10/13, 10/14, 10/15, -+ 0, 11/1, 11/2, 11/3, 11/4, 11/5, 11/6, 11/7, -+ 11/8, 11/9, 11/10, 11/11, 11/12, 11/13, 11/14, 11/15, -+ 0, 12/1, 12/2, 12/3, 12/4, 12/5, 12/6, 12/7, -+ 12/8, 12/9, 12/10, 12/11, 12/12, 12/13, 12/14, 12/15, -+ 0, 13/1, 13/2, 13/3, 13/4, 13/5, 13/6, 13/7, -+ 13/8, 13/9, 13/10, 13/11, 13/12, 13/13, 13/14, 13/15, -+ 0, 14/1, 14/2, 14/3, 14/4, 14/5, 14/6, 14/7, -+ 14/8, 14/9, 14/10, 14/11, 14/12, 14/13, 14/14, 14/15, -+ 0, 15/1, 15/2, 15/3, 15/4, 15/5, 15/6, 15/7, -+ 15/8, 15/9, 15/10, 15/11, 15/12, 15/13, 15/14, 15/15, -+}; -+ -diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S -new file mode 100644 -index 0000000..5d3f7c0 ---- /dev/null -+++ b/libgcc/config/microblaze/moddi3.S -@@ -0,0 +1,97 @@ -+################################### -+# -+# Copyright (C) 2009-2017 Free Software Foundation, Inc. -+# -+# Contributed by Michael Eager <eager@eagercon.com>. -+# -+# This file is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 3, or (at your option) any -+# later version. -+# -+# GCC is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+# License for more details. -+# -+# Under Section 7 of GPL version 3, you are granted additional -+# permissions described in the GCC Runtime Library Exception, version -+# 3.1, as published by the Free Software Foundation. -+# -+# You should have received a copy of the GNU General Public License and -+# a copy of the GCC Runtime Library Exception along with this program; -+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+# <http://www.gnu.org/licenses/>. -+# -+# moddi3.S -+# -+# modulo operation for 32 bit integers. -+# Input : op1 in Reg r5 -+# op2 in Reg r6 -+# Output: op1 mod op2 in Reg r3 -+# -+####################################### -+ -+#ifdef __arch64__ -+ .globl __moddi3 -+ .ent __moddi3 -+ .type __moddi3,@function -+__moddi3: -+ .frame r1,0,r15 -+ -+ addlik r1,r1,-32 -+ sli r28,r1,0 -+ sli r29,r1,8 -+ sli r30,r1,16 -+ sli r31,r1,32 -+ -+ BEALEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEALEQI r5,$LaResult_Is_Zero # Result is Zero -+ ADDL r28,r5,r0 # Get the sign of the result [ Depends only on the first arg] -+ BEALGEI r5,$LaR5_Pos -+ RSUBLI r5,r5,0 # Make r5 positive -+$LaR5_Pos: -+ BEALGEI r6,$LaR6_Pos -+ RSUBLI r6,r6,0 # Make r6 positive -+$LaR6_Pos: -+ ADDLIK r3,r0,0 # Clear mod -+ ADDLIK r30,r0,0 # clear div -+ ADDLIK r29,r0,64 # Initialize the loop count -+ BEALLTI r5,$LaDIV2 # If r5 is still negative (0x80000000), skip -+ # the first bit search. -+ # First part try to find the first '1' in the r5 -+$LaDIV1: -+ ADDL r5,r5,r5 # left shift logical r5 -+ ADDLIK r29,r29,-1 -+ BEALGEI r5,$LaDIV1 # -+$LaDIV2: -+ ADDL r5,r5,r5 # left shift logical r5 get the '1' into the Carry -+ ADDLC r3,r3,r3 # Move that bit into the Mod register -+ rSUBL r31,r6,r3 # Try to subtract (r30 a r6) -+ BEALLTi r31,$LaMOD_TOO_SMALL -+ ORL r3,r0,r31 # Move the r31 to mod since the result was positive -+ ADDLIK r30,r30,1 -+$LaMOD_TOO_SMALL: -+ ADDLIK r29,r29,-1 -+ BEALEQi r29,$LaLOOP_END -+ ADDL r30,r30,r30 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BEALGEI r28,$LaRETURN_HERE -+ rsubli r3,r3,0 # Negate the result -+ BREAI $LaRETURN_HERE -+$LaDiv_By_Zero: -+$LaResult_Is_Zero: -+ orl r3,r0,r0 # set result to 0 [Both mod as well as div are 0] -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ lli r28,r1,0 -+ lli r29,r1,8 -+ lli r30,r1,16 -+ lli r31,r1,24 -+ addlik r1,r1,32 -+ rtsd r15,8 -+ nop -+ .end __moddi3 -+ .size __moddi3, . - __moddi3 -+#endif -diff --git a/libgcc/config/microblaze/muldi3.S b/libgcc/config/microblaze/muldi3.S -new file mode 100644 -index 0000000..5677841 ---- /dev/null -+++ b/libgcc/config/microblaze/muldi3.S -@@ -0,0 +1,73 @@ -+/*###################################-*-asm*- -+# -+# Copyright (C) 2009-2017 Free Software Foundation, Inc. -+# -+# Contributed by Michael Eager <eager@eagercon.com>. -+# -+# This file is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 3, or (at your option) any -+# later version. -+# -+# GCC is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+# License for more details. -+# -+# Under Section 7 of GPL version 3, you are granted additional -+# permissions described in the GCC Runtime Library Exception, version -+# 3.1, as published by the Free Software Foundation. -+# -+# You should have received a copy of the GNU General Public License and -+# a copy of the GCC Runtime Library Exception along with this program; -+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+# <http://www.gnu.org/licenses/>. -+# -+# muldi3.S -+# -+# Multiply operation for 32 bit integers. -+# Input : Operand1 in Reg r5 -+# Operand2 in Reg r6 -+# Output: Result [op1 * op2] in Reg r3 -+# -+#######################################*/ -+ -+#ifdef __arch64__ -+ .globl __muldi3 -+ .ent __muldi3 -+ .type __muldi3,@function -+__muldi3: -+ .frame r1,0,r15 -+ addl r3,r0,r0 -+ BEALEQI r5,$L_Result_Is_Zero # Multiply by Zero -+ BEALEQI r6,$L_Result_Is_Zero # Multiply by Zero -+ XORL r4,r5,r6 # Get the sign of the result -+ BEALGEI r5,$L_R5_Pos -+ RSUBLI r5,r5,0 # Make r5 positive -+$L_R5_Pos: -+ BEALGEI r6,$L_R6_Pos -+ RSUBLI r6,r6,0 # Make r6 positive -+$L_R6_Pos: -+ breai $L1 -+$L2: -+ addl r5,r5,r5 -+$L1: -+ srll r6,r6 -+ addlc r7,r0,r0 -+ bealeqi r7,$L2 -+ addl r3,r3,r5 -+ bealnei r6,$L2 -+ beallti r4,$L_NegateResult -+ rtsd r15,8 -+ nop -+$L_NegateResult: -+ rsubl r3,r3,r0 -+ rtsd r15,8 -+ nop -+$L_Result_Is_Zero: -+ addli r3,r0,0 -+ rtsd r15,8 -+ nop -+ .end __muldi3 -+ .size __muldi3, . - __muldi3 -+#endif -diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze -index 8d954a4..35021b2 100644 ---- a/libgcc/config/microblaze/t-microblaze -+++ b/libgcc/config/microblaze/t-microblaze -@@ -1,11 +1,16 @@ --LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 -+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 \ -+ _divdi3 _moddi3 _muldi3 _udivdi3 _umoddi3 - - LIB2ADD += \ - $(srcdir)/config/microblaze/divsi3.S \ -+ $(srcdir)/config/microblaze/divdi3.S \ - $(srcdir)/config/microblaze/modsi3.S \ -- $(srcdir)/config/microblaze/muldi3_hard.S \ -+ $(srcdir)/config/microblaze/moddi3.S \ - $(srcdir)/config/microblaze/mulsi3.S \ -+ $(srcdir)/config/microblaze/muldi3.S \ - $(srcdir)/config/microblaze/stack_overflow_exit.S \ - $(srcdir)/config/microblaze/udivsi3.S \ -+ $(srcdir)/config/microblaze/udivdi3.S \ - $(srcdir)/config/microblaze/umodsi3.S \ -- $(srcdir)/config/microblaze/divsi3_table.c -+ $(srcdir)/config/microblaze/umoddi3.S \ -+ $(srcdir)/config/microblaze/divsi3_table.c \ -diff --git a/libgcc/config/microblaze/udivdi3.S b/libgcc/config/microblaze/udivdi3.S -new file mode 100644 -index 0000000..c210fbc ---- /dev/null -+++ b/libgcc/config/microblaze/udivdi3.S -@@ -0,0 +1,107 @@ -+###################################- -+# -+# Copyright (C) 2009-2017 Free Software Foundation, Inc. -+# -+# Contributed by Michael Eager <eager@eagercon.com>. -+# -+# This file is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 3, or (at your option) any -+# later version. -+# -+# GCC is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+# License for more details. -+# -+# Under Section 7 of GPL version 3, you are granted additional -+# permissions described in the GCC Runtime Library Exception, version -+# 3.1, as published by the Free Software Foundation. -+# -+# You should have received a copy of the GNU General Public License and -+# a copy of the GCC Runtime Library Exception along with this program; -+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+# <http://www.gnu.org/licenses/>. -+# -+# udivdi3.S -+# -+# Unsigned divide operation. -+# Input : Divisor in Reg r5 -+# Dividend in Reg r6 -+# Output: Result in Reg r3 -+# -+####################################### -+ -+#ifdef __arch64__ -+ .globl __udivdi3 -+ .ent __udivdi3 -+ .type __udivdi3,@function -+__udivdi3: -+ .frame r1,0,r15 -+ -+ ADDlIK r1,r1,-24 -+ SLI r29,r1,0 -+ SLI r30,r1,8 -+ SLI r31,r1,16 -+ -+ BEALEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ ADDLIK r30,r0,0 # Clear mod -+ BEALEQI r5,$LaResult_Is_Zero # Result is Zero -+ ADDLIK r29,r0,64 # Initialize the loop count -+ -+ # Check if r6 and r5 are equal # if yes, return 1 -+ RSUBL r18,r5,r6 -+ ADDLIK r3,r0,1 -+ BEALEQI r18,$LaRETURN_HERE -+ -+ # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0 -+ XORL r18,r5,r6 -+ ADDL r3,r0,r0 # We would anyways clear r3 -+ BEALGEI r18,$LRSUBL -+ BEALLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater -+ BREAI $LCheckr6 -+$LRSUBL: -+ RSUBL r18,r6,r5 # MICROBLAZEcmp -+ BEALLTI r18,$LaRETURN_HERE -+ -+ # If r6 [bit 31] is set, then return result as 1 -+$LCheckr6: -+ BEALGTI r6,$LaDIV0 -+ ADDLIK r3,r0,1 -+ BREAI $LaRETURN_HERE -+ -+ # First part try to find the first '1' in the r5 -+$LaDIV0: -+ BEALLTI r5,$LaDIV2 -+$LaDIV1: -+ ADDL r5,r5,r5 # left shift logical r5 -+ ADDLIK r29,r29,-1 -+ BEALGTI r5,$LaDIV1 -+$LaDIV2: -+ ADDL r5,r5,r5 # left shift logical r5 get the '1' into the Carry -+ ADDLC r30,r30,r30 # Move that bit into the Mod register -+ RSUBL r31,r6,r30 # Try to subtract (r30 a r6) -+ BEALLTI r31,$LaMOD_TOO_SMALL -+ ORL r30,r0,r31 # Move the r31 to mod since the result was positive -+ ADDLIK r3,r3,1 -+$LaMOD_TOO_SMALL: -+ ADDLIK r29,r29,-1 -+ BEALEQi r29,$LaLOOP_END -+ ADDL r3,r3,r3 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BREAI $LaRETURN_HERE -+$LaDiv_By_Zero: -+$LaResult_Is_Zero: -+ ORL r3,r0,r0 # set result to 0 -+$LaRETURN_HERE: -+ # Restore values of CSRs and that of r3 and the divisor and the dividend -+ LLI r29,r1,0 -+ LLI r30,r1,8 -+ LLI r31,r1,16 -+ ADDLIK r1,r1,24 -+ RTSD r15,8 -+ NOP -+ .end __udivdi3 -+ .size __udivdi3, . - __udivdi3 -+#endif -diff --git a/libgcc/config/microblaze/umoddi3.S b/libgcc/config/microblaze/umoddi3.S -new file mode 100644 -index 0000000..7f5cd23 ---- /dev/null -+++ b/libgcc/config/microblaze/umoddi3.S -@@ -0,0 +1,110 @@ -+################################### -+# -+# Copyright (C) 2009-2017 Free Software Foundation, Inc. -+# -+# Contributed by Michael Eager <eager@eagercon.com>. -+# -+# This file is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 3, or (at your option) any -+# later version. -+# -+# GCC is distributed in the hope that it will be useful, but WITHOUT -+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public -+# License for more details. -+# -+# Under Section 7 of GPL version 3, you are granted additional -+# permissions described in the GCC Runtime Library Exception, version -+# 3.1, as published by the Free Software Foundation. -+# -+# You should have received a copy of the GNU General Public License and -+# a copy of the GCC Runtime Library Exception along with this program; -+# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -+# <http://www.gnu.org/licenses/>. -+# -+# umoddi3.S -+# -+# Unsigned modulo operation for 32 bit integers. -+# Input : op1 in Reg r5 -+# op2 in Reg r6 -+# Output: op1 mod op2 in Reg r3 -+# -+####################################### -+ -+#ifdef __arch64__ -+ .globl __umoddi3 -+ .ent __umoddi3 -+ .type __umoddi3,@function -+__umoddi3: -+ .frame r1,0,r15 -+ -+ addlik r1,r1,-24 -+ sli r29,r1,0 -+ sli r30,r1,8 -+ sli r31,r1,16 -+ -+ BEALEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ ADDLIK r3,r0,0 # Clear div -+ BEALEQI r5,$LaResult_Is_Zero # Result is Zero -+ ADDLIK r30,r0,0 # clear mod -+ ADDLIK r29,r0,64 # Initialize the loop count -+ -+# Check if r6 and r5 are equal # if yes, return 0 -+ rsubl r18,r5,r6 -+ bealeqi r18,$LaRETURN_HERE -+ -+# Check if (uns)r6 is greater than (uns)r5. In that case, just return r5 -+ xorl r18,r5,r6 -+ addlik r3,r5,0 -+ bealgei r18,$LRSUB -+ beallti r6,$LaRETURN_HERE -+ breai $LCheckr6 -+$LRSUB: -+ rsubl r18,r5,r6 # MICROBLAZEcmp -+ bealgti r18,$LaRETURN_HERE -+ -+# If r6 [bit 31] is set, then return result as r5-r6 -+$LCheckr6: -+ addlik r3,r0,0 -+ bealgti r6,$LaDIV0 -+ addlik r18,r0,0x7fffffff -+ andl r5,r5,r18 -+ andl r6,r6,r18 -+ breaid $LaRETURN_HERE -+ rsubl r3,r6,r5 -+# First part: try to find the first '1' in the r5 -+$LaDIV0: -+ BEALLTI r5,$LaDIV2 -+$LaDIV1: -+ ADDL r5,r5,r5 # left shift logical r5 -+ ADDLIK r29,r29,-1 -+ BEALGEI r5,$LaDIV1 # -+$LaDIV2: -+ ADDL r5,r5,r5 # left shift logical r5 get the '1' into the Carry -+ ADDLC r3,r3,r3 # Move that bit into the Mod register -+ rSUBL r31,r6,r3 # Try to subtract (r3 a r6) -+ BEALLTi r31,$LaMOD_TOO_SMALL -+ ORL r3,r0,r31 # Move the r31 to mod since the result was positive -+ ADDLIK r30,r30,1 -+$LaMOD_TOO_SMALL: -+ ADDLIK r29,r29,-1 -+ BEALEQi r29,$LaLOOP_END -+ ADDL r30,r30,r30 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BREAI $LaRETURN_HERE -+$LaDiv_By_Zero: -+$LaResult_Is_Zero: -+ orl r3,r0,r0 # set result to 0 -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ lli r29,r1,0 -+ lli r30,r1,8 -+ lli r31,r1,16 -+ addlik r1,r1,24 -+ rtsd r15,8 -+ nop -+.end __umoddi3 -+ .size __umoddi3, . - __umoddi3 -+#endif --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0042-re-arrangement-of-the-compare-branches.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0042-re-arrangement-of-the-compare-branches.patch deleted file mode 100644 index c33b247bf..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0042-re-arrangement-of-the-compare-branches.patch +++ /dev/null @@ -1,268 +0,0 @@ -From 9e45ca7bd65fe327e01e93d3c539c9d8cf049b79 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 3 Aug 2018 15:41:39 +0530 -Subject: [PATCH 42/54] re-arrangement of the compare branches - ---- - gcc/config/microblaze/microblaze.c | 28 ++----- - gcc/config/microblaze/microblaze.md | 141 +++++++++++++++++------------------- - 2 files changed, 73 insertions(+), 96 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index ba7ade4..fab79d9 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3695,11 +3695,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) - { - comp_reg = cmp_op0; - condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); -- if (mode == Pmode) -- emit_jump_insn (gen_condjump (condition, label1)); -- else -- emit_jump_insn (gen_long_condjump (condition, label1)); -- -+ emit_jump_insn (gen_condjump (condition, label1)); - } - - else if (code == EQ || code == NE) -@@ -3710,10 +3706,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) - else - emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1)); - condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); -- if (mode == SImode) -- emit_jump_insn (gen_condjump (condition, label1)); -- else -- emit_jump_insn (gen_long_condjump (condition, label1)); -+ emit_jump_insn (gen_condjump (condition, label1)); - } - else - { -@@ -3746,10 +3739,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) - comp_reg = cmp_op0; - condition = gen_rtx_fmt_ee (signed_condition (code), - mode, comp_reg, const0_rtx); -- if (mode == SImode) -- emit_jump_insn (gen_condjump (condition, label1)); -- else -- emit_jump_insn (gen_long_condjump (condition, label1)); -+ emit_jump_insn (gen_condjump (condition, label1)); - } - else if (code == EQ) - { -@@ -3764,10 +3754,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) - cmp_op1)); - } - condition = gen_rtx_EQ (mode, comp_reg, const0_rtx); -- if (mode == SImode) -- emit_jump_insn (gen_condjump (condition, label1)); -- else -- emit_jump_insn (gen_long_condjump (condition, label1)); -+ emit_jump_insn (gen_condjump (condition, label1)); - - } - else if (code == NE) -@@ -3783,10 +3770,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) - cmp_op1)); - } - condition = gen_rtx_NE (mode, comp_reg, const0_rtx); -- if (mode == SImode) -- emit_jump_insn (gen_condjump (condition, label1)); -- else -- emit_jump_insn (gen_long_condjump (condition, label1)); -+ emit_jump_insn (gen_condjump (condition, label1)); - } - else - { -@@ -3828,7 +3812,7 @@ microblaze_expand_conditional_branch_df (rtx operands[]) - - emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); - condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); -- emit_jump_insn (gen_long_condjump (condition, operands[3])); -+ emit_jump_insn (gen_condjump (condition, operands[3])); - } - - /* Implement TARGET_FRAME_POINTER_REQUIRED. */ -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 0f41ac6..2213d6e 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2268,7 +2268,27 @@ else - (label_ref (match_operand 1)) - (pc)))]) - --(define_insn "branch_zero64" -+(define_insn "branch_zero_64" -+ [(set (pc) -+ (if_then_else (match_operator:SI 0 "ordered_comparison_operator" -+ [(match_operand:SI 1 "register_operand" "d") -+ (const_int 0)]) -+ (match_operand:SI 2 "pc_or_label_operand" "") -+ (match_operand:SI 3 "pc_or_label_operand" ""))) -+ ] -+ "TARGET_MB_64" -+ { -+ if (operands[3] == pc_rtx) -+ return "bea%C0i%?\t%z1,%2"; -+ else -+ return "bea%N0i%?\t%z1,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")] -+) -+ -+(define_insn "long_branch_zero" - [(set (pc) - (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand 1 "register_operand" "d") -@@ -2279,9 +2299,9 @@ else - "TARGET_MB_64" - { - if (operands[3] == pc_rtx) -- return "bea%C0i%?\t%z1,%2"; -+ return "beal%C0i%?\t%z1,%2"; - else -- return "bea%N0i%?\t%z1,%3"; -+ return "beal%N0i%?\t%z1,%3"; - } - [(set_attr "type" "branch") - (set_attr "mode" "none") -@@ -2310,9 +2330,9 @@ else - - (define_insn "branch_compare64" - [(set (pc) -- (if_then_else (match_operator 0 "cmp_op" -- [(match_operand 1 "register_operand" "d") -- (match_operand 2 "register_operand" "d") -+ (if_then_else (match_operator:SI 0 "cmp_op" -+ [(match_operand:SI 1 "register_operand" "d") -+ (match_operand:SI 2 "register_operand" "d") - ]) - (label_ref (match_operand 3)) - (pc))) -@@ -2349,6 +2369,47 @@ else - (set_attr "length" "12")] - ) - -+(define_insn "long_branch_compare" -+ [(set (pc) -+ (if_then_else (match_operator 0 "cmp_op" -+ [(match_operand 1 "register_operand" "d") -+ (match_operand 2 "register_operand" "d") -+ ]) -+ (label_ref (match_operand 3)) -+ (pc))) -+ (clobber(reg:DI R_TMP))] -+ "TARGET_MB_64" -+ { -+ operands[4] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ enum rtx_code code = GET_CODE (operands[0]); -+ -+ if (code == GT || code == LE) -+ { -+ output_asm_insn ("cmpl\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GTU || code == LEU) -+ { -+ output_asm_insn ("cmplu\tr18,%z1,%z2", operands); -+ code = swap_condition (code); -+ } -+ else if (code == GE || code == LT) -+ { -+ output_asm_insn ("cmpl\tr18,%z2,%z1", operands); -+ } -+ else if (code == GEU || code == LTU) -+ { -+ output_asm_insn ("cmplu\tr18,%z2,%z1", operands); -+ } -+ -+ operands[0] = gen_rtx_fmt_ee (signed_condition (code), DImode, operands[4], const0_rtx); -+ return "beal%C0i%?\tr18,%3"; -+ } -+ [(set_attr "type" "branch") -+ (set_attr "mode" "none") -+ (set_attr "length" "12")] -+) -+ - (define_insn "branch_compare" - [(set (pc) - (if_then_else (match_operator:SI 0 "cmp_op" -@@ -2431,74 +2492,6 @@ else - - }) - --;; Used to implement comparison instructions --(define_expand "long_condjump" -- [(set (pc) -- (if_then_else (match_operand 0) -- (label_ref (match_operand 1)) -- (pc)))]) -- --(define_insn "long_branch_zero" -- [(set (pc) -- (if_then_else (match_operator:DI 0 "ordered_comparison_operator" -- [(match_operand:DI 1 "register_operand" "d") -- (const_int 0)]) -- (match_operand:DI 2 "pc_or_label_operand" "") -- (match_operand:DI 3 "pc_or_label_operand" ""))) -- ] -- "TARGET_MB_64" -- { -- if (operands[3] == pc_rtx) -- return "beal%C0i%?\t%z1,%2"; -- else -- return "beal%N0i%?\t%z1,%3"; -- } -- [(set_attr "type" "branch") -- (set_attr "mode" "none") -- (set_attr "length" "4")] --) -- --(define_insn "long_branch_compare" -- [(set (pc) -- (if_then_else (match_operator:DI 0 "cmp_op" -- [(match_operand:DI 1 "register_operand" "d") -- (match_operand:DI 2 "register_operand" "d") -- ]) -- (label_ref (match_operand 3)) -- (pc))) -- (clobber(reg:DI R_TMP))] -- "TARGET_MB_64" -- { -- operands[4] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -- enum rtx_code code = GET_CODE (operands[0]); -- -- if (code == GT || code == LE) -- { -- output_asm_insn ("cmpl\tr18,%z1,%z2", operands); -- code = swap_condition (code); -- } -- else if (code == GTU || code == LEU) -- { -- output_asm_insn ("cmplu\tr18,%z1,%z2", operands); -- code = swap_condition (code); -- } -- else if (code == GE || code == LT) -- { -- output_asm_insn ("cmpl\tr18,%z2,%z1", operands); -- } -- else if (code == GEU || code == LTU) -- { -- output_asm_insn ("cmplu\tr18,%z2,%z1", operands); -- } -- -- operands[0] = gen_rtx_fmt_ee (signed_condition (code), DImode, operands[4], const0_rtx); -- return "beal%C0i%?\tr18,%3"; -- } -- [(set_attr "type" "branch") -- (set_attr "mode" "none") -- (set_attr "length" "12")] --) -- - ;;---------------------------------------------------------------- - ;; Unconditional branches - ;;---------------------------------------------------------------- --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch deleted file mode 100644 index d1cf45798..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 0c132e74714d217108d65fca630ab497a0d8821a Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 8 Aug 2018 17:37:26 +0530 -Subject: [PATCH 43/54] [Patch,Microblaze] : previous commit broke the - handling of SI Branch compare for Microblaze 32-bit.. - ---- - gcc/config/microblaze/microblaze.md | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 2213d6e..53ea401 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2224,8 +2224,8 @@ else - (define_expand "cbranchsi4" - [(set (pc) - (if_then_else (match_operator 0 "ordered_comparison_operator" -- [(match_operand 1 "register_operand") -- (match_operand 2 "arith_operand" "I,i")]) -+ [(match_operand:SI 1 "register_operand") -+ (match_operand:SI 2 "arith_operand" "I,i")]) - (label_ref (match_operand 3 "")) - (pc)))] - "" --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch deleted file mode 100644 index 68791cb24..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 259ed1ee33625964f5bc394ae660103b6c35510f Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 11 Sep 2018 13:43:48 +0530 -Subject: [PATCH 44/54] [Patch, Microblaze] : Support of multilibs with m64 ... - ---- - gcc/config/microblaze/microblaze-c.c | 1 + - gcc/config/microblaze/t-microblaze | 15 ++++++--------- - libgcc/config/microblaze/t-microblaze | 11 +++-------- - 3 files changed, 10 insertions(+), 17 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze-c.c b/gcc/config/microblaze/microblaze-c.c -index d8a1d13..6586575 100644 ---- a/gcc/config/microblaze/microblaze-c.c -+++ b/gcc/config/microblaze/microblaze-c.c -@@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile) - } - if (TARGET_MB_64) - { -+ builtin_define ("__microblaze64"); - builtin_define ("__arch64__"); - builtin_define ("__microblaze64__"); - builtin_define ("__MICROBLAZE64__"); -diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze -index 9fc80b1..35ab965 100644 ---- a/gcc/config/microblaze/t-microblaze -+++ b/gcc/config/microblaze/t-microblaze -@@ -1,12 +1,9 @@ --MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high mlittle-endian m64 --MULTILIB_DIRNAMES = bs m mh le m64 --MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high --MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian --MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/mlittle-endian/m64 --MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high/m64 mxl-multiply-high --MULTILIB_EXCEPTIONS += mxl-multiply-high/mlittle-endian --MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 --MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 -+MULTILIB_OPTIONS = m64 mxl-barrel-shift mlittle-endian mno-xl-soft-mul mxl-multiply-high -+MULTILIB_DIRNAMES = m64 bs le m mh -+MULTILIB_EXCEPTIONS = *m64/mxl-multiply-high mxl-multiply-high -+MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high -+MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high -+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high - - # Extra files - microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.c \ -diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze -index 35021b2..8d954a4 100644 ---- a/libgcc/config/microblaze/t-microblaze -+++ b/libgcc/config/microblaze/t-microblaze -@@ -1,16 +1,11 @@ --LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 \ -- _divdi3 _moddi3 _muldi3 _udivdi3 _umoddi3 -+LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _mulsi3 _udivsi3 _umodsi3 - - LIB2ADD += \ - $(srcdir)/config/microblaze/divsi3.S \ -- $(srcdir)/config/microblaze/divdi3.S \ - $(srcdir)/config/microblaze/modsi3.S \ -- $(srcdir)/config/microblaze/moddi3.S \ -+ $(srcdir)/config/microblaze/muldi3_hard.S \ - $(srcdir)/config/microblaze/mulsi3.S \ -- $(srcdir)/config/microblaze/muldi3.S \ - $(srcdir)/config/microblaze/stack_overflow_exit.S \ - $(srcdir)/config/microblaze/udivsi3.S \ -- $(srcdir)/config/microblaze/udivdi3.S \ - $(srcdir)/config/microblaze/umodsi3.S \ -- $(srcdir)/config/microblaze/umoddi3.S \ -- $(srcdir)/config/microblaze/divsi3_table.c \ -+ $(srcdir)/config/microblaze/divsi3_table.c --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0045-Fixed-issues-like.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0045-Fixed-issues-like.patch deleted file mode 100644 index 8c0bde713..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0045-Fixed-issues-like.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 654582846ebf847b52e769eb6e015c8e486461d6 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 11 Sep 2018 14:58:00 +0530 -Subject: [PATCH 45/54] Fixed issues like: 1 Interrupt alignment issue 2 Sign - extension issue - ---- - gcc/config/microblaze/microblaze.c | 16 ++++++++++------ - gcc/config/microblaze/microblaze.md | 2 +- - 2 files changed, 11 insertions(+), 7 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index fab79d9..6b6ca61 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2241,9 +2241,14 @@ compute_frame_size (HOST_WIDE_INT size) - - total_size += gp_reg_size; - -- /* Add 4 bytes for MSR. */ -+ /* Add 4/8 bytes for MSR. */ - if (microblaze_is_interrupt_variant ()) -- total_size += 4; -+ { -+ if (TARGET_MB_64) -+ total_size += 8; -+ else -+ total_size += 4; -+ } - - /* No space to be allocated for link register in leaf functions with no other - stack requirements. */ -@@ -2527,7 +2532,6 @@ print_operand (FILE * file, rtx op, int letter) - else if (letter == 'h' || letter == 'j') - { - long val[2]; -- int val1[2]; - long l[2]; - if (code == CONST_DOUBLE) - { -@@ -2542,10 +2546,10 @@ print_operand (FILE * file, rtx op, int letter) - } - else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF) - { -- val1[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; -- val1[1] = INTVAL (op) & 0x00000000ffffffffLL; -+ val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; -+ val[1] = INTVAL (op) & 0x00000000ffffffffLL; - } -- fprintf (file, "0x%8.8lx", (letter == 'h') ? val1[0] : val1[1]); -+ fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); - } - else if (code == CONST_DOUBLE) - { -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 53ea401..3a6943b 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -1094,7 +1094,7 @@ - case 1: - case 2: - { -- output_asm_insn ("ll%i1\t%0,%1", operands); -+ output_asm_insn ("lw%i1\t%0,%1", operands); - return "sextl32\t%0,%0"; - } - } --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0046-Fixed-below-issues.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0046-Fixed-below-issues.patch deleted file mode 100644 index 22bb5b2f9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0046-Fixed-below-issues.patch +++ /dev/null @@ -1,306 +0,0 @@ -From 48f9f9a1c6809b14e7cfdd2343df92c0de18d730 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 28 Sep 2018 11:59:12 +0530 -Subject: [PATCH 46/54] Fixed below issues: - Floating point print issues in - 64bit mode - Dejagnu Jump related issues - Added dbl instruction - ---- - gcc/config/microblaze/microblaze.c | 12 ++++- - gcc/config/microblaze/microblaze.h | 7 +++ - gcc/config/microblaze/microblaze.md | 89 ++++++++++++++++++++++++++++++------- - libgcc/config/microblaze/crti.S | 24 +++++++++- - libgcc/config/microblaze/crtn.S | 13 ++++++ - 5 files changed, 127 insertions(+), 18 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 6b6ca61..33d183e 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -2536,7 +2536,12 @@ print_operand (FILE * file, rtx op, int letter) - if (code == CONST_DOUBLE) - { - if (GET_MODE (op) == DFmode) -- REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); -+ { -+ if (TARGET_MB_64) -+ REAL_VALUE_TO_TARGET_LONG_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); -+ else -+ REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), val); -+ } - else - { - REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); -@@ -3874,7 +3879,10 @@ microblaze_expand_divide (rtx operands[]) - gen_rtx_PLUS (QImode, regt1, div_table_rtx)); - - insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); -- jump = emit_jump_insn_after (gen_jump (div_end_label), insn); -+ if (TARGET_MB_64) -+ jump = emit_jump_insn_after (gen_jump_64 (div_end_label), insn); -+ else -+ jump = emit_jump_insn_after (gen_jump (div_end_label), insn); - JUMP_LABEL (jump) = div_end_label; - LABEL_NUSES (div_end_label) = 1; - emit_barrier (); -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 1e60513..e34f549 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -892,10 +892,17 @@ do { \ - /* We do this to save a few 10s of code space that would be taken up - by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION - definition in crtstuff.c. */ -+#ifdef __arch64__ -+#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ -+ asm ( SECTION_OP "\n" \ -+ "\tbrealid r15, " #FUNC "\n\t nop\n" \ -+ TEXT_SECTION_ASM_OP); -+#else - #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \ - asm ( SECTION_OP "\n" \ - "\tbrlid r15, " #FUNC "\n\t nop\n" \ - TEXT_SECTION_ASM_OP); -+#endif - - /* We need to group -lm as well, since some Newlib math functions - reference __errno! */ -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 3a6943b..2669a28 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -525,6 +525,15 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -+(define_insn "floatdidf2" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (float:DF (match_operand:DI 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "dbl\t%0,%1" -+ [(set_attr "type" "fcvt") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ - (define_insn "fix_truncsfsi2" - [(set (match_operand:SI 0 "register_operand" "=d") - (fix:SI (match_operand:SF 1 "register_operand" "d")))] -@@ -1298,7 +1307,7 @@ - (define_insn "movdi_long_int" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d") - (match_operand:DI 1 "general_operand" "i"))] -- "" -+ "TARGET_MB_64" - "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") -@@ -1581,7 +1590,7 @@ - return "ll%i1\t%0,%1"; - case 3: - { -- return "addlik\t%0,r0,%h1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #Xfer Lo"; -+ return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo"; - } - case 5: - return "sl%i0\t%1,%0"; -@@ -2371,9 +2380,9 @@ else - - (define_insn "long_branch_compare" - [(set (pc) -- (if_then_else (match_operator 0 "cmp_op" -- [(match_operand 1 "register_operand" "d") -- (match_operand 2 "register_operand" "d") -+ (if_then_else (match_operator:DI 0 "cmp_op" -+ [(match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d") - ]) - (label_ref (match_operand 3)) - (pc))) -@@ -2495,6 +2504,20 @@ else - ;;---------------------------------------------------------------- - ;; Unconditional branches - ;;---------------------------------------------------------------- -+(define_insn "jump_64" -+ [(set (pc) -+ (label_ref (match_operand 0 "" "")))] -+ "TARGET_MB_64" -+ { -+ if (GET_CODE (operands[0]) == REG) -+ return "brea%?\t%0"; -+ else -+ return "breai%?\t%l0"; -+ } -+ [(set_attr "type" "jump") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_insn "jump" - [(set (pc) - (label_ref (match_operand 0 "" "")))] -@@ -2538,19 +2561,28 @@ else - (use (label_ref (match_operand 1 "" "")))] - "" - { -- //gcc_assert (GET_MODE (operands[0]) == Pmode); -- -+ gcc_assert (GET_MODE (operands[0]) == Pmode); -+ - if (!flag_pic) -- emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1])); -- else -- emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1])); -+ { -+ if (!TARGET_MB_64) -+ emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1])); -+ else -+ emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1])); -+ } -+ else { -+ if (!TARGET_MB_64) -+ emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1])); -+ else -+ emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1])); -+ } - DONE; - } - ) - - (define_insn "tablejump_internal1" - [(set (pc) -- (match_operand 0 "register_operand" "d")) -+ (match_operand:SI 0 "register_operand" "d")) - (use (label_ref (match_operand 1 "" "")))] - "" - "bra%?\t%0 " -@@ -2558,11 +2590,21 @@ else - (set_attr "mode" "none") - (set_attr "length" "4")]) - -+(define_insn "tablejump_internal2" -+ [(set (pc) -+ (match_operand:DI 0 "register_operand" "d")) -+ (use (label_ref (match_operand 1 "" "")))] -+ "TARGET_MB_64" -+ "bra%?\t%0 " -+ [(set_attr "type" "jump") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ - (define_expand "tablejump_internal3" - [(parallel [(set (pc) -- (plus (match_operand 0 "register_operand" "d") -- (label_ref (match_operand:SI 1 "" "")))) -- (use (label_ref (match_dup 1)))])] -+ (plus:SI (match_operand:SI 0 "register_operand" "d") -+ (label_ref:SI (match_operand:SI 1 "" "")))) -+ (use (label_ref:SI (match_dup 1)))])] - "" - "" - ) -@@ -2593,6 +2635,23 @@ else - "" - ) - -+(define_insn "" -+ [(set (pc) -+ (plus:DI (match_operand:DI 0 "register_operand" "d") -+ (label_ref:DI (match_operand 1 "" "")))) -+ (use (label_ref:DI (match_dup 1)))] -+ "TARGET_MB_64 && NEXT_INSN (as_a <rtx_insn *> (operands[1])) != 0 -+ && GET_CODE (PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1])))) == ADDR_DIFF_VEC -+ && flag_pic" -+ { -+ output_asm_insn ("addlk\t%0,%0,r20",operands); -+ return "bra%?\t%0"; -+} -+ [(set_attr "type" "jump") -+ (set_attr "mode" "none") -+ (set_attr "length" "4")]) -+ -+ - ;;---------------------------------------------------------------- - ;; Function prologue/epilogue and stack allocation - ;;---------------------------------------------------------------- -@@ -3097,7 +3156,7 @@ else - ;; The insn to set GOT. The hardcoded number "8" accounts for $pc difference - ;; between "mfs" and "addik" instructions. - (define_insn "set_got" -- [(set (match_operand:SI 0 "register_operand" "=r") -+ [(set (match_operand 0 "register_operand" "=r") - (unspec:SI [(const_int 0)] UNSPEC_SET_GOT))] - "" - "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8" -diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S -index 3386520..3d4cde2 100644 ---- a/libgcc/config/microblaze/crti.S -+++ b/libgcc/config/microblaze/crti.S -@@ -33,11 +33,32 @@ - .section .init, "ax" - .global __init - -+#ifdef __arch64__ - .weak _stack -- .set _stack, 0xffffffff -+ .set _stack, 0xffffffffffffffff - .weak _stack_end - .set _stack_end, 0 - -+ .align 3 -+__init: -+ addlik r1, r1, -32 -+ sl r15, r0, r1 -+ addlik r11, r0, _stack -+ mts rshr, r11 -+ addlik r11, r0, _stack_end -+ mts rslr, r11 -+ -+ .section .fini, "ax" -+ .global __fini -+ .align 3 -+__fini: -+ addlik r1, r1, -32 -+ sl r15, r0, r1 -+#else -+ .weak _stack -+ .set _stack, 0xffffffff -+ .weak _stack_end -+ .set _stack_end, 0 - .align 2 - __init: - addik r1, r1, -16 -@@ -53,3 +74,4 @@ __init: - __fini: - addik r1, r1, -16 - sw r15, r0, r1 -+#endif -diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S -index 04e73d7..c262ce0 100644 ---- a/libgcc/config/microblaze/crtn.S -+++ b/libgcc/config/microblaze/crtn.S -@@ -29,7 +29,19 @@ - .section .note.GNU-stack,"",%progbits - .previous - #endif -+#ifdef __arch64__ -+ .section .init, "ax" -+ ll r15, r0, r1 -+ addlik r1, r1, 32 -+ rtsd r15, 8 -+ nop - -+ .section .fini, "ax" -+ ll r15, r0, r1 -+ addlik r1, r1, 32 -+ rtsd r15, 8 -+ nop -+#else - .section .init, "ax" - lw r15, r0, r1 - rtsd r15, 8 -@@ -39,3 +51,4 @@ - lw r15, r0, r1 - rtsd r15, 8 - addik r1, r1, 16 -+#endif --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0047-Added-double-arith-instructions.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0047-Added-double-arith-instructions.patch deleted file mode 100644 index f28d9f516..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0047-Added-double-arith-instructions.patch +++ /dev/null @@ -1,135 +0,0 @@ -From b09721c830dd0831f50084e2e64920f83618e3f4 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 9 Oct 2018 10:07:08 +0530 -Subject: [PATCH 47/54] -Added double arith instructions -Fixed prologue stack - pointer decrement issue - ---- - gcc/config/microblaze/microblaze.md | 78 ++++++++++++++++++++++++++++++++----- - gcc/config/microblaze/t-microblaze | 7 ++++ - 2 files changed, 76 insertions(+), 9 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 2669a28..dca61d6 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -525,6 +525,66 @@ - (set_attr "mode" "SF") - (set_attr "length" "4")]) - -+(define_insn "fix_truncsfsi2" -+ [(set (match_operand:SI 0 "register_operand" "=d") -+ (fix:SI (match_operand:SF 1 "register_operand" "d")))] -+ "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" -+ "fint\t%0,%1" -+ [(set_attr "type" "fint") -+ (set_attr "mode" "SF") -+ (set_attr "length" "4")]) -+ -+ -+(define_insn "adddf3" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (plus:DF (match_operand:DF 1 "register_operand" "d") -+ (match_operand:DF 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "dadd\t%0,%1,%2" -+ [(set_attr "type" "fadd") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ -+(define_insn "subdf3" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (minus:DF (match_operand:DF 1 "register_operand" "d") -+ (match_operand:DF 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "drsub\t%0,%2,%1" -+ [(set_attr "type" "frsub") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ -+(define_insn "muldf3" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (mult:DF (match_operand:DF 1 "register_operand" "d") -+ (match_operand:DF 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "dmul\t%0,%1,%2" -+ [(set_attr "type" "fmul") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ -+(define_insn "divdf3" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (div:DF (match_operand:DF 1 "register_operand" "d") -+ (match_operand:DF 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "ddiv\t%0,%2,%1" -+ [(set_attr "type" "fdiv") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ -+ -+(define_insn "sqrtdf2" -+ [(set (match_operand:DF 0 "register_operand" "=d") -+ (sqrt:DF (match_operand:DF 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "dsqrt\t%0,%1" -+ [(set_attr "type" "fsqrt") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4")]) -+ - (define_insn "floatdidf2" - [(set (match_operand:DF 0 "register_operand" "=d") - (float:DF (match_operand:DI 1 "register_operand" "d")))] -@@ -534,13 +594,13 @@ - (set_attr "mode" "DF") - (set_attr "length" "4")]) - --(define_insn "fix_truncsfsi2" -- [(set (match_operand:SI 0 "register_operand" "=d") -- (fix:SI (match_operand:SF 1 "register_operand" "d")))] -- "TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" -- "fint\t%0,%1" -- [(set_attr "type" "fint") -- (set_attr "mode" "SF") -+(define_insn "floatdfdi2" -+ [(set (match_operand:DI 0 "register_operand" "=d") -+ (float:DI (match_operand:DF 1 "register_operand" "d")))] -+ "TARGET_MB_64" -+ "dlong\t%0,%1" -+ [(set_attr "type" "fcvt") -+ (set_attr "mode" "DI") - (set_attr "length" "4")]) - - ;;---------------------------------------------------------------- -@@ -658,8 +718,8 @@ - "TARGET_MB_64" - "@ - rsubl\t%0,%2,%1 -- addik\t%0,%z1,-%2 -- addik\t%0,%z1,-%2" -+ addlik\t%0,%z1,-%2 -+ addlik\t%0,%z1,-%2" - [(set_attr "type" "arith,no_delay_arith,no_delay_arith") - (set_attr "mode" "DI") - (set_attr "length" "4,4,4")]) -diff --git a/gcc/config/microblaze/t-microblaze b/gcc/config/microblaze/t-microblaze -index 35ab965..dfef45c 100644 ---- a/gcc/config/microblaze/t-microblaze -+++ b/gcc/config/microblaze/t-microblaze -@@ -1,6 +1,13 @@ - MULTILIB_OPTIONS = m64 mxl-barrel-shift mlittle-endian mno-xl-soft-mul mxl-multiply-high - MULTILIB_DIRNAMES = m64 bs le m mh - MULTILIB_EXCEPTIONS = *m64/mxl-multiply-high mxl-multiply-high -+MULTILIB_EXCEPTIONS += *m64 -+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift -+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul -+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mno-xl-soft-mul -+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul -+MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mno-xl-soft-mul/mxl-multiply-high -+MULTILIB_EXCEPTIONS += *m64/mno-xl-soft-mul/mxl-multiply-high - MULTILIB_EXCEPTIONS += *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high - MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high - MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch deleted file mode 100644 index 9a214d55a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 1ed548dd5993b8c3e58ef393467bdeea49c437be Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 12 Oct 2018 16:07:36 +0530 -Subject: [PATCH 48/54] Fixed the issue in the delay slot with swap - instructions - ---- - gcc/config/microblaze/microblaze.md | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index dca61d6..d037843 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -441,6 +441,9 @@ - (bswap:SI (match_operand:SI 1 "register_operand" "r")))] - "TARGET_REORDER" - "swapb %0, %1" -+ [(set_attr "type" "no_delay_arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "4")] - ) - - (define_insn "bswaphi2" -@@ -449,6 +452,9 @@ - "TARGET_REORDER" - "swapb %0, %1 - swaph %0, %0" -+ [(set_attr "type" "no_delay_arith") -+ (set_attr "mode" "SI") -+ (set_attr "length" "8")] - ) - - ;;---------------------------------------------------------------- --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch deleted file mode 100644 index a682bc19d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch +++ /dev/null @@ -1,256 +0,0 @@ -From 1c889b64454f63f164f34d79d891d91b0bb4731f Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Sat, 13 Oct 2018 21:12:43 +0530 -Subject: [PATCH 49/54] Fixed the load store issue with the 32bit arith - libraries - ---- - libgcc/config/microblaze/divsi3.S | 25 ++++++++++++++++++++++++- - libgcc/config/microblaze/modsi3.S | 26 +++++++++++++++++++++++++- - libgcc/config/microblaze/mulsi3.S | 3 +++ - libgcc/config/microblaze/udivsi3.S | 24 +++++++++++++++++++++++- - libgcc/config/microblaze/umodsi3.S | 24 +++++++++++++++++++++++- - 5 files changed, 98 insertions(+), 4 deletions(-) - -diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S -index 663d398..7e7d875 100644 ---- a/libgcc/config/microblaze/divsi3.S -+++ b/libgcc/config/microblaze/divsi3.S -@@ -41,6 +41,17 @@ - .globl __divsi3 - .ent __divsi3 - .type __divsi3,@function -+#ifdef __arch64__ -+ .align 3 -+__divsi3: -+ .frame r1,0,r15 -+ -+ ADDIK r1,r1,-32 -+ SLI r28,r1,0 -+ SLI r29,r1,8 -+ SLI r30,r1,16 -+ SLI r31,r1,24 -+#else - __divsi3: - .frame r1,0,r15 - -@@ -49,7 +60,7 @@ __divsi3: - SWI r29,r1,4 - SWI r30,r1,8 - SWI r31,r1,12 -- -+#endif - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQI r5,$LaResult_Is_Zero # Result is Zero - BGEID r5,$LaR5_Pos -@@ -89,6 +100,17 @@ $LaLOOP_END: - $LaDiv_By_Zero: - $LaResult_Is_Zero: - OR r3,r0,r0 # set result to 0 -+#ifdef __arch64__ -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ LLI r28,r1,0 -+ LLI r29,r1,8 -+ LLI r30,r1,16 -+ LLI r31,r1,24 -+ ADDLIK r1,r1,32 -+ RTSD r15,8 -+ NOP -+#else - $LaRETURN_HERE: - # Restore values of CSRs and that of r3 and the divisor and the dividend - LWI r28,r1,0 -@@ -97,6 +119,7 @@ $LaRETURN_HERE: - LWI r31,r1,12 - RTSD r15,8 - ADDIK r1,r1,16 -+#endif - .end __divsi3 - .size __divsi3, . - __divsi3 - -diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index 71b56e30..7e85064 100644 ---- a/libgcc/config/microblaze/modsi3.S -+++ b/libgcc/config/microblaze/modsi3.S -@@ -41,6 +41,17 @@ - .globl __modsi3 - .ent __modsi3 - .type __modsi3,@function -+#ifdef __arch64__ -+ .align 3 -+__modsi3: -+ .frame r1,0,r15 -+ -+ addlik r1,r1,-32 -+ sli r28,r1,0 -+ sli r29,r1,8 -+ sli r30,r1,16 -+ sli r31,r1,24 -+#else - __modsi3: - .frame r1,0,r15 - -@@ -49,6 +60,7 @@ __modsi3: - swi r29,r1,4 - swi r30,r1,8 - swi r31,r1,12 -+#endif - - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQI r5,$LaResult_Is_Zero # Result is Zero -@@ -88,6 +100,18 @@ $LaLOOP_END: - $LaDiv_By_Zero: - $LaResult_Is_Zero: - or r3,r0,r0 # set result to 0 [Both mod as well as div are 0] -+ -+#ifdef __arch64__ -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ lli r28,r1,0 -+ lli r29,r1,8 -+ lli r30,r1,16 -+ lli r31,r1,24 -+ addik r1,r1,32 -+ rtsd r15,8 -+ nop -+#else - $LaRETURN_HERE: - # Restore values of CSRs and that of r3 and the divisor and the dividend - lwi r28,r1,0 -@@ -95,7 +119,7 @@ $LaRETURN_HERE: - lwi r30,r1,8 - lwi r31,r1,12 - rtsd r15,8 -- addik r1,r1,16 -+#endif - .end __modsi3 - .size __modsi3, . - __modsi3 - -diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S -index 40b0b15..31a73c2 100644 ---- a/libgcc/config/microblaze/mulsi3.S -+++ b/libgcc/config/microblaze/mulsi3.S -@@ -41,6 +41,9 @@ - .globl __mulsi3 - .ent __mulsi3 - .type __mulsi3,@function -+#ifdef __arch64__ -+ .align 3 -+#endif - __mulsi3: - .frame r1,0,r15 - add r3,r0,r0 -diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S -index 2aef8ed..94adb6a 100644 ---- a/libgcc/config/microblaze/udivsi3.S -+++ b/libgcc/config/microblaze/udivsi3.S -@@ -41,6 +41,16 @@ - .globl __udivsi3 - .ent __udivsi3 - .type __udivsi3,@function -+#ifdef __arch64__ -+ .align 3 -+__udivsi3: -+ .frame r1,0,r15 -+ -+ ADDLIK r1,r1,-24 -+ SLI r29,r1,0 -+ SLI r30,r1,8 -+ SLI r31,r1,16 -+#else - __udivsi3: - .frame r1,0,r15 - -@@ -48,7 +58,7 @@ __udivsi3: - SWI r29,r1,0 - SWI r30,r1,4 - SWI r31,r1,8 -- -+#endif - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQID r5,$LaResult_Is_Zero # Result is Zero - ADDIK r30,r0,0 # Clear mod -@@ -98,6 +108,17 @@ $LaLOOP_END: - $LaDiv_By_Zero: - $LaResult_Is_Zero: - OR r3,r0,r0 # set result to 0 -+ -+#ifdef __arch64__ -+$LaRETURN_HERE: -+ # Restore values of CSRs and that of r3 and the divisor and the dividend -+ LLI r29,r1,0 -+ LLI r30,r1,8 -+ LLI r31,r1,16 -+ ADDIK r1,r1,24 -+ RTSD r15,8 -+ NOP -+#else - $LaRETURN_HERE: - # Restore values of CSRs and that of r3 and the divisor and the dividend - LWI r29,r1,0 -@@ -105,5 +126,6 @@ $LaRETURN_HERE: - LWI r31,r1,8 - RTSD r15,8 - ADDIK r1,r1,12 -+#endif - .end __udivsi3 - .size __udivsi3, . - __udivsi3 -diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index a2582d0..00b3bdf 100644 ---- a/libgcc/config/microblaze/umodsi3.S -+++ b/libgcc/config/microblaze/umodsi3.S -@@ -41,6 +41,16 @@ - .globl __umodsi3 - .ent __umodsi3 - .type __umodsi3,@function -+#ifdef __arch64__ -+ .align 3 -+__umodsi3: -+ .frame r1,0,r15 -+ -+ addik r1,r1,-24 -+ swi r29,r1,0 -+ swi r30,r1,8 -+ swi r31,r1,16 -+#else - __umodsi3: - .frame r1,0,r15 - -@@ -48,7 +58,7 @@ __umodsi3: - swi r29,r1,0 - swi r30,r1,4 - swi r31,r1,8 -- -+#endif - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQId r5,$LaResult_Is_Zero # Result is Zero - ADDIK r3,r0,0 # Clear div -@@ -101,6 +111,17 @@ $LaLOOP_END: - $LaDiv_By_Zero: - $LaResult_Is_Zero: - or r3,r0,r0 # set result to 0 -+ -+#ifdef __arch64__ -+$LaRETURN_HERE: -+# Restore values of CSRs and that of r3 and the divisor and the dividend -+ lli r29,r1,0 -+ lli r30,r1,8 -+ lli r31,r1,16 -+ addlik r1,r1,24 -+ rtsd r15,8 -+ nop -+#else - $LaRETURN_HERE: - # Restore values of CSRs and that of r3 and the divisor and the dividend - lwi r29,r1,0 -@@ -108,5 +129,6 @@ $LaRETURN_HERE: - lwi r31,r1,8 - rtsd r15,8 - addik r1,r1,12 -+#endif - .end __umodsi3 - .size __umodsi3, . - __umodsi3 --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch deleted file mode 100644 index 95a26db2c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 751a01ce1eeaffcd41c504b9bf44868345b45da0 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Mon, 15 Oct 2018 12:00:10 +0530 -Subject: [PATCH 50/54] extending the Dwarf support to 64bit Microblaze - ---- - gcc/config/microblaze/microblaze.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index e34f549..0a5ff0a 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe; - /* Use DWARF 2 debugging information by default. */ - #define DWARF2_DEBUGGING_INFO 1 - #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG --#define DWARF2_ADDR_SIZE 4 -+#define DWARF2_ADDR_SIZE (TARGET_MB_64 ? 8 : 4) - - /* Target machine storage layout */ - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0051-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0051-fixing-the-typo-errors-in-umodsi3-file.patch deleted file mode 100644 index 574037ecf..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0051-fixing-the-typo-errors-in-umodsi3-file.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 295046d0a63148fb5a685ae2bd7a06489274c72a Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Tue, 16 Oct 2018 07:55:46 +0530 -Subject: [PATCH 51/54] fixing the typo errors in umodsi3 file - ---- - libgcc/config/microblaze/umodsi3.S | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index 00b3bdf..9bf65c3 100644 ---- a/libgcc/config/microblaze/umodsi3.S -+++ b/libgcc/config/microblaze/umodsi3.S -@@ -47,9 +47,9 @@ __umodsi3: - .frame r1,0,r15 - - addik r1,r1,-24 -- swi r29,r1,0 -- swi r30,r1,8 -- swi r31,r1,16 -+ sli r29,r1,0 -+ sli r30,r1,8 -+ sli r31,r1,16 - #else - __umodsi3: - .frame r1,0,r15 --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch deleted file mode 100644 index 95d39bb28..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0052-fixing-the-32bit-LTO-related-issue9-1014024.patch +++ /dev/null @@ -1,68 +0,0 @@ -From d55eff09f175ddbc66e4e800fa5650ce9e2f599e Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Wed, 17 Oct 2018 16:56:14 +0530 -Subject: [PATCH 52/54] fixing the 32bit LTO related issue9(1014024) - ---- - gcc/config/microblaze/microblaze.h | 24 ++++++++++++++---------- - 1 file changed, 14 insertions(+), 10 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 0a5ff0a..740b8d9 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe; - #define WORD_REGISTER_OPERATIONS 1 - - #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND --/* --#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ -- if (GET_MODE_CLASS (MODE) == MODE_INT \ -- && GET_MODE_SIZE (MODE) < (TARGET_MB_64 ? 8 : 4)) \ -- (MODE) = TARGET_MB_64 ? DImode : SImode; --*/ -+ -+#ifndef __arch64__ -+#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ -+ if (GET_MODE_CLASS (MODE) == MODE_INT \ -+ && GET_MODE_SIZE (MODE) < 4) \ -+ (MODE) = SImode; -+#endif -+ - /* Standard register usage. */ - - /* On the MicroBlaze, we have 32 integer registers */ -@@ -469,16 +471,18 @@ extern struct microblaze_frame_info current_frame_info; - - #define MAX_ARGS_IN_REGISTERS MB_ABI_MAX_ARG_REGS - -+#ifdef __aarch64__ - #define LIBCALL_VALUE(MODE) \ - gen_rtx_REG (MODE,GP_RETURN) -- --/*#define LIBCALL_VALUE(MODE) \ -+#else -+#define LIBCALL_VALUE(MODE) \ - gen_rtx_REG ( \ - ((GET_MODE_CLASS (MODE) != MODE_INT \ - || GET_MODE_SIZE (MODE) >= 4) \ - ? (MODE) \ - : SImode), GP_RETURN) --*/ -+#endif -+ - /* 1 if N is a possible register number for a function value. - On the MicroBlaze, R2 R3 are the only register thus used. - Currently, R2 are only implemented here (C has no complex type) */ -@@ -518,7 +522,7 @@ typedef struct microblaze_args - /* 4 insns + 2 words of data. */ - #define TRAMPOLINE_SIZE (6 * 4) - --#define TRAMPOLINE_ALIGNMENT 64 -+#define TRAMPOLINE_ALIGNMENT (TARGET_MB_64 ? 64 : 32) - - #define REGNO_OK_FOR_BASE_P(regno) microblaze_regno_ok_for_base_p ((regno), 1) - --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch deleted file mode 100644 index e992075b9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 3e7161218dc8b4dd84ad8d31f6dbaa7c256e7a82 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Fri, 19 Oct 2018 14:26:25 +0530 -Subject: [PATCH 53/54] Fixed the missing stack adjustment in prologue of - modsi3 function - ---- - libgcc/config/microblaze/modsi3.S | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index 7e85064..46ff34a 100644 ---- a/libgcc/config/microblaze/modsi3.S -+++ b/libgcc/config/microblaze/modsi3.S -@@ -119,6 +119,7 @@ $LaRETURN_HERE: - lwi r30,r1,8 - lwi r31,r1,12 - rtsd r15,8 -+ addik r1,r1,16 - #endif - .end __modsi3 - .size __modsi3, . - __modsi3 --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch deleted file mode 100644 index afb88d350..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a89b3e6902d7835129ad178f6af896eba15c5d5e Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 24 Oct 2018 18:31:04 +0530 -Subject: [PATCH 54/54] [Patch,Microblaze] : corrected SPN for dlong - instruction mapping. - ---- - gcc/config/microblaze/microblaze.md | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index d037843..cbd7e77 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -600,9 +600,9 @@ - (set_attr "mode" "DF") - (set_attr "length" "4")]) - --(define_insn "floatdfdi2" -+(define_insn "fix_truncdfdi2" - [(set (match_operand:DI 0 "register_operand" "=d") -- (float:DI (match_operand:DF 1 "register_operand" "d")))] -+ (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "d"))))] - "TARGET_MB_64" - "dlong\t%0,%1" - [(set_attr "type" "fcvt") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch deleted file mode 100644 index 4c694723d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 76e231f92afd8fda13d6ae18ef3aef0ea6096489 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala <nmekala@xilix.com> -Date: Thu, 29 Nov 2018 17:55:08 +0530 -Subject: [PATCH 55/57] fixing the long & long long mingw toolchain issue - ---- - gcc/config/microblaze/constraints.md | 2 +- - gcc/config/microblaze/microblaze.md | 8 ++++---- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index 867a7b5..27c6bfc 100644 ---- a/gcc/config/microblaze/constraints.md -+++ b/gcc/config/microblaze/constraints.md -@@ -55,7 +55,7 @@ - (define_constraint "K" - "A constant in the range 0xffffff8000000000L to 0x0000007fffffffffL (inclusive)." - (and (match_code "const_int") -- (match_test "ival > (long)-549755813888 && ival < (long)549755813887"))) -+ (match_test "ival > (long long)-549755813888 && ival < (long long)549755813887"))) - - ;; Define floating point constraints - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index cbd7e77..e03b835 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -646,8 +646,8 @@ - if (TARGET_MB_64) - { - if (GET_CODE (operands[2]) == CONST_INT && -- INTVAL(operands[2]) < (long)-549755813888 && -- INTVAL(operands[2]) > (long)549755813887) -+ INTVAL(operands[2]) < (long long)-549755813888 && -+ INTVAL(operands[2]) > (long long)549755813887) - FAIL; - } - }) -@@ -1264,7 +1264,7 @@ - (match_operand:DI 1 "immediate_operand" "J,I,Mnis"))] - "TARGET_MB_64 && (register_operand (operands[0], DImode) && - (GET_CODE (operands[1]) == CONST_INT && -- (INTVAL (operands[1]) <= (long)549755813887 && INTVAL (operands[1]) >= (long)-549755813888)))" -+ (INTVAL (operands[1]) <= (long long)549755813887 && INTVAL (operands[1]) >= (long long)-549755813888)))" - "@ - addlk\t%0,r0,r0\t - addlik\t%0,r0,%1\t #N1 %X1 -@@ -1298,7 +1298,7 @@ - case 1: - case 2: - if (GET_CODE (operands[1]) == CONST_INT && -- (INTVAL (operands[1]) > (long)549755813887 || INTVAL (operands[1]) < (long)-549755813888)) -+ (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888)) - return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; - else - return "addlik\t%0,r0,%1"; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-microblaze_linker_script_xilinx_ld.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-microblaze_linker_script_xilinx_ld.patch deleted file mode 100644 index c009c92d2..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0055-microblaze_linker_script_xilinx_ld.patch +++ /dev/null @@ -1,16 +0,0 @@ -diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 740b8d9..4bda9c2 100644 ---- a/gcc/config/microblaze/microblaze.h -+++ b/gcc/config/microblaze/microblaze.h -@@ -114,8 +114,9 @@ extern enum pipeline_type microblaze_pipe; - %{m64:-EL --oformat=elf64-microblazeel} \ - %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ - %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \ -- %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \ -- %{!T*: -dT xilinx.ld%s}" -+ %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0}" -+ -+// %{!T*: -dT xilinx.ld%s}" - - /* Specs for the compiler proper */ - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch deleted file mode 100644 index a5a2039d9..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 6c58973f1cc1e37773aeab583aa3ac6331489106 Mon Sep 17 00:00:00 2001 -From: Nagaraju <nmekala@xilinx.com> -Date: Thu, 14 Mar 2019 18:11:04 +0530 -Subject: [PATCH 57/57] Fix the MB-64 bug of handling QI objects - ---- - gcc/config/microblaze/microblaze.md | 14 +++++++------- - 1 file changed, 7 insertions(+), 7 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index e03b835..88aee9e 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -2345,11 +2345,11 @@ else - - (define_insn "branch_zero_64" - [(set (pc) -- (if_then_else (match_operator:SI 0 "ordered_comparison_operator" -+ (if_then_else (match_operator 0 "ordered_comparison_operator" - [(match_operand:SI 1 "register_operand" "d") - (const_int 0)]) -- (match_operand:SI 2 "pc_or_label_operand" "") -- (match_operand:SI 3 "pc_or_label_operand" ""))) -+ (match_operand 2 "pc_or_label_operand" "") -+ (match_operand 3 "pc_or_label_operand" ""))) - ] - "TARGET_MB_64" - { -@@ -2365,11 +2365,11 @@ else - - (define_insn "long_branch_zero" - [(set (pc) -- (if_then_else (match_operator 0 "ordered_comparison_operator" -- [(match_operand 1 "register_operand" "d") -+ (if_then_else (match_operator:DI 0 "ordered_comparison_operator" -+ [(match_operand:DI 1 "register_operand" "d") - (const_int 0)]) -- (match_operand 2 "pc_or_label_operand" "") -- (match_operand 3 "pc_or_label_operand" ""))) -+ (match_operand:DI 2 "pc_or_label_operand" "") -+ (match_operand:DI 3 "pc_or_label_operand" ""))) - ] - "TARGET_MB_64" - { --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch deleted file mode 100644 index 8bc47a430..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch +++ /dev/null @@ -1,87 +0,0 @@ -From bcbfd9f69d858306a080aa7213e96ca6eca66106 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Fri, 29 Mar 2019 12:08:39 +0530 -Subject: [PATCH 58/61] [Patch,Microblaze] : We will check the possibility of - peephole2 optimization,if we can then we will fix the compiler issue. - ---- - gcc/config/microblaze/microblaze.md | 63 ++++++++++++++++++++++--------------- - 1 file changed, 38 insertions(+), 25 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 88aee9e..8bd175f 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -880,31 +880,44 @@ - (set_attr "mode" "SI") - (set_attr "length" "4")]) - --(define_peephole2 -- [(set (match_operand:SI 0 "register_operand") -- (fix:SI (match_operand:SF 1 "register_operand"))) -- (set (pc) -- (if_then_else (match_operator 2 "ordered_comparison_operator" -- [(match_operand:SI 3 "register_operand") -- (match_operand:SI 4 "arith_operand")]) -- (label_ref (match_operand 5)) -- (pc)))] -- "TARGET_HARD_FLOAT && !TARGET_MB_64" -- [(set (match_dup 1) (match_dup 3))] -- -- { -- rtx condition; -- rtx cmp_op0 = operands[3]; -- rtx cmp_op1 = operands[4]; -- rtx comp_reg = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -- -- emit_insn (gen_cstoresf4 (comp_reg, operands[2], -- gen_rtx_REG (SFmode, REGNO (cmp_op0)), -- gen_rtx_REG (SFmode, REGNO (cmp_op1)))); -- condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); -- emit_jump_insn (gen_condjump (condition, operands[5])); -- } --) -+;; peephole2 optimization will be done only if fint and if-then-else -+;; are dependent.added condition for the same. -+;; if they are dependent then gcc is giving "flow control insn inside a basic block" -+;; testcase: -+;; volatile float vec = 1.0; -+;; volatile int ci = 2; -+;; register int cj = (int)(vec); -+;;// ci=cj; -+;;// if (ci <0) { -+;; if (cj < 0) { -+;; ci = 0; -+;; } -+;; commenting for now.we will check the possibility of this optimization later -+ -+;;(define_peephole2 -+;; [(set (match_operand:SI 0 "register_operand") -+;; (fix:SI (match_operand:SF 1 "register_operand"))) -+;; (set (pc) -+;; (if_then_else (match_operator 2 "ordered_comparison_operator" -+;; [(match_operand:SI 3 "register_operand") -+;; (match_operand:SI 4 "arith_operand")]) -+;; (label_ref (match_operand 5)) -+;; (pc)))] -+;; "TARGET_HARD_FLOAT && !TARGET_MB_64 && ((REGNO (operands[0])) == (REGNO (operands[3])))" -+;; [(set (match_dup 1) (match_dup 3))] -+;; { -+;; rtx condition; -+;; rtx cmp_op0 = operands[3]; -+;; rtx cmp_op1 = operands[4]; -+;; rtx comp_reg = gen_rtx_REG (SImode, MB_ABI_ASM_TEMP_REGNUM); -+;; -+;; emit_insn (gen_cstoresf4 (comp_reg, operands[2], -+;; gen_rtx_REG (SFmode, REGNO (cmp_op0)), -+;; gen_rtx_REG (SFmode, REGNO (cmp_op1)))); -+;; condition = gen_rtx_NE (SImode, comp_reg, const0_rtx); -+;; emit_jump_insn (gen_condjump (condition, operands[5])); -+;; } -+;;) - - ;;---------------------------------------------------------------- - ;; Negation and one's complement --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch deleted file mode 100644 index be4dfad5c..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 2f22090a7e8216f7a9f7e958b77ac83006a7ce89 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Tue, 16 Apr 2019 17:20:24 +0530 -Subject: [PATCH 59/61] Reverting the patch as kernel boot is not working with - this patch CR-1026413 Revert "[Patch,Microblaze]:reverting the cost check - before propagating constants." - -This reverts commit 7156e379a67fa47a5fb9ede1448c0d528dbda65b. ---- - gcc/cprop.c | 4 ---- - 1 file changed, 4 deletions(-) - -diff --git a/gcc/cprop.c b/gcc/cprop.c -index deb706b..e4df509 100644 ---- a/gcc/cprop.c -+++ b/gcc/cprop.c -@@ -733,7 +733,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - int success = 0; - rtx set = single_set (insn); - --#if 0 - bool check_rtx_costs = true; - bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); - int old_cost = set ? set_rtx_cost (set, speed) : 0; -@@ -745,7 +744,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - && (GET_CODE (XEXP (note, 0)) == CONST - || CONSTANT_P (XEXP (note, 0))))) - check_rtx_costs = false; --#endif - - /* Usually we substitute easy stuff, so we won't copy everything. - We however need to take care to not duplicate non-trivial CONST -@@ -754,7 +752,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - - validate_replace_src_group (from, to, insn); - --#if 0 - /* If TO is a constant, check the cost of the set after propagation - to the cost of the set before the propagation. If the cost is - higher, then do not replace FROM with TO. */ -@@ -767,7 +764,6 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn) - return false; - } - --#endif - - if (num_changes_pending () && apply_change_group ()) - success = 1; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch deleted file mode 100644 index 1548faada..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch +++ /dev/null @@ -1,466 +0,0 @@ -From 80919b0f43b275e70521e4f85cd28bcd0ece3b80 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati <mbodapat@xilinx.com> -Date: Wed, 17 Apr 2019 12:36:16 +0530 -Subject: [PATCH 60/61] [Patch,MicroBlaze]: fixed typos in mul,div and mod - assembly files. - ---- - libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++++++++---- - libgcc/config/microblaze/modsi3.S | 40 +++++++++++++++++++++++--- - libgcc/config/microblaze/mulsi3.S | 33 +++++++++++++++++++++- - libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++++++++---- - libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++++++++++--- - 5 files changed, 212 insertions(+), 20 deletions(-) - -diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S -index 7e7d875..cfb4c05 100644 ---- a/libgcc/config/microblaze/divsi3.S -+++ b/libgcc/config/microblaze/divsi3.S -@@ -46,7 +46,7 @@ - __divsi3: - .frame r1,0,r15 - -- ADDIK r1,r1,-32 -+ ADDLIK r1,r1,-32 - SLI r28,r1,0 - SLI r29,r1,8 - SLI r30,r1,16 -@@ -61,13 +61,23 @@ __divsi3: - SWI r30,r1,8 - SWI r31,r1,12 - #endif -- BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -- BEQI r5,$LaResult_Is_Zero # Result is Zero -- BGEID r5,$LaR5_Pos -+#ifdef __arch64__ -+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero -+ BEAGEID r5,$LaR5_Pos -+#else -+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEQI r5,$LaResult_Is_Zero # Result is Zero -+ BGEID r5,$LaR5_Pos -+#endif - XOR r28,r5,r6 # Get the sign of the result - RSUBI r5,r5,0 # Make r5 positive - $LaR5_Pos: -- BGEI r6,$LaR6_Pos -+#ifdef __arch64__ -+ BEAGEI r6,$LaR6_Pos -+#else -+ BGEI r6,$LaR6_Pos -+#endif - RSUBI r6,r6,0 # Make r6 positive - $LaR6_Pos: - ADDIK r30,r0,0 # Clear mod -@@ -76,26 +86,51 @@ $LaR6_Pos: - - # First part try to find the first '1' in the r5 - $LaDIV0: -- BLTI r5,$LaDIV2 # This traps r5 == 0x80000000 -+#ifdef __arch64__ -+ BEALTI r5,$LaDIV2 # This traps r5 == 0x80000000 -+#else -+ BLTI r5,$LaDIV2 # This traps r5 == 0x80000000 -+#endif - $LaDIV1: - ADD r5,r5,r5 # left shift logical r5 -+#ifdef __arch64__ -+ BEAGTID r5,$LaDIV1 -+#else - BGTID r5,$LaDIV1 -+#endif - ADDIK r29,r29,-1 - $LaDIV2: - ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry - ADDC r30,r30,r30 # Move that bit into the Mod register - RSUB r31,r6,r30 # Try to subtract (r30 a r6) -+#ifdef __arch64__ -+ BEALTI r31,$LaMOD_TOO_SMALL -+#else - BLTI r31,$LaMOD_TOO_SMALL -+#endif - OR r30,r0,r31 # Move the r31 to mod since the result was positive - ADDIK r3,r3,1 - $LaMOD_TOO_SMALL: - ADDIK r29,r29,-1 -+#ifdef __arch64__ -+ BEAEQi r29,$LaLOOP_END -+#else - BEQi r29,$LaLOOP_END -+#endif - ADD r3,r3,r3 # Shift in the '1' into div -+#ifdef __arch64__ -+ BREAI $LaDIV2 # Div2 -+#else - BRI $LaDIV2 # Div2 -+#endif - $LaLOOP_END: -+#ifdef __arch64__ -+ BEAGEI r28,$LaRETURN_HERE -+ BREAID $LaRETURN_HERE -+#else - BGEI r28,$LaRETURN_HERE - BRID $LaRETURN_HERE -+#endif - RSUBI r3,r3,0 # Negate the result - $LaDiv_By_Zero: - $LaResult_Is_Zero: -diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index 46ff34a..49618dd 100644 ---- a/libgcc/config/microblaze/modsi3.S -+++ b/libgcc/config/microblaze/modsi3.S -@@ -62,40 +62,72 @@ __modsi3: - swi r31,r1,12 - #endif - -+#ifdef __arch64__ -+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero -+ BEAGEId r5,$LaR5_Pos -+#else - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQI r5,$LaResult_Is_Zero # Result is Zero - BGEId r5,$LaR5_Pos -+#endif - ADD r28,r5,r0 # Get the sign of the result [ Depends only on the first arg] - RSUBI r5,r5,0 # Make r5 positive - $LaR5_Pos: -- BGEI r6,$LaR6_Pos -+#ifdef __arch64__ -+ BEAGEI r6,$LaR6_Pos -+#else -+ BGEI r6,$LaR6_Pos -+#endif - RSUBI r6,r6,0 # Make r6 positive - $LaR6_Pos: - ADDIK r3,r0,0 # Clear mod - ADDIK r30,r0,0 # clear div -- BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip -+#ifdef __arch64__ -+ BEALTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip - # the first bit search. -+#else -+ BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip -+ # the first bit search. -+#endif - ADDIK r29,r0,32 # Initialize the loop count - # First part try to find the first '1' in the r5 - $LaDIV1: - ADD r5,r5,r5 # left shift logical r5 -- BGEID r5,$LaDIV1 # -+#ifdef __arch64__ -+ BEAGEID r5,$LaDIV1 # -+#else -+ BGEID r5,$LaDIV1 # -+#endif - ADDIK r29,r29,-1 - $LaDIV2: - ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry - ADDC r3,r3,r3 # Move that bit into the Mod register - rSUB r31,r6,r3 # Try to subtract (r30 a r6) -+#ifdef __arch64__ -+ BEALTi r31,$LaMOD_TOO_SMALL -+#else - BLTi r31,$LaMOD_TOO_SMALL -+#endif - OR r3,r0,r31 # Move the r31 to mod since the result was positive - ADDIK r30,r30,1 - $LaMOD_TOO_SMALL: - ADDIK r29,r29,-1 -+#ifdef __arch64__ -+ BEAEQi r29,$LaLOOP_END -+ ADD r30,r30,r30 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BEAGEI r28,$LaRETURN_HERE -+ BREAId $LaRETURN_HERE -+#else - BEQi r29,$LaLOOP_END - ADD r30,r30,r30 # Shift in the '1' into div - BRI $LaDIV2 # Div2 - $LaLOOP_END: - BGEI r28,$LaRETURN_HERE - BRId $LaRETURN_HERE -+#endif - rsubi r3,r3,0 # Negate the result - $LaDiv_By_Zero: - $LaResult_Is_Zero: -@@ -108,7 +140,7 @@ $LaRETURN_HERE: - lli r29,r1,8 - lli r30,r1,16 - lli r31,r1,24 -- addik r1,r1,32 -+ addlik r1,r1,32 - rtsd r15,8 - nop - #else -diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S -index 31a73c2..39951be 100644 ---- a/libgcc/config/microblaze/mulsi3.S -+++ b/libgcc/config/microblaze/mulsi3.S -@@ -43,7 +43,37 @@ - .type __mulsi3,@function - #ifdef __arch64__ - .align 3 --#endif -+__mulsi3: -+ .frame r1,0,r15 -+ add r3,r0,r0 -+ BEAEQI r5,$L_Result_Is_Zero # Multiply by Zero -+ BEAEQI r6,$L_Result_Is_Zero # Multiply by Zero -+ BEAGEId r5,$L_R5_Pos -+ XOR r4,r5,r6 # Get the sign of the result -+ RSUBI r5,r5,0 # Make r5 positive -+$L_R5_Pos: -+ BEAGEI r6,$L_R6_Pos -+ RSUBI r6,r6,0 # Make r6 positive -+$L_R6_Pos: -+ breai $L1 -+$L2: -+ add r5,r5,r5 -+$L1: -+ srl r6,r6 -+ addc r7,r0,r0 -+ beaeqi r7,$L2 -+ beaneid r6,$L2 -+ add r3,r3,r5 -+ bealti r4,$L_NegateResult -+ rtsd r15,8 -+ nop -+$L_NegateResult: -+ rtsd r15,8 -+ rsub r3,r3,r0 -+$L_Result_Is_Zero: -+ rtsd r15,8 -+ addi r3,r0,0 -+#else - __mulsi3: - .frame r1,0,r15 - add r3,r0,r0 -@@ -74,5 +104,6 @@ $L_NegateResult: - $L_Result_Is_Zero: - rtsd r15,8 - addi r3,r0,0 -+#endif - .end __mulsi3 - .size __mulsi3, . - __mulsi3 -diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S -index 94adb6a..d4fe285 100644 ---- a/libgcc/config/microblaze/udivsi3.S -+++ b/libgcc/config/microblaze/udivsi3.S -@@ -59,52 +59,96 @@ __udivsi3: - SWI r30,r1,4 - SWI r31,r1,8 - #endif -+#ifdef __arch64__ -+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEAEQID r5,$LaResult_Is_Zero # Result is Zero -+#else - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQID r5,$LaResult_Is_Zero # Result is Zero -+#endif - ADDIK r30,r0,0 # Clear mod - ADDIK r29,r0,32 # Initialize the loop count - - # Check if r6 and r5 are equal # if yes, return 1 - RSUB r18,r5,r6 -+#ifdef __arch64__ -+ BEAEQID r18,$LaRETURN_HERE -+#else - BEQID r18,$LaRETURN_HERE -+#endif - ADDIK r3,r0,1 - - # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0 - XOR r18,r5,r6 -- BGEID r18,16 -+#ifdef __arch64__ -+ BEAGEID r18,16 -+#else -+ BGEID r18,16 -+#endif - ADD r3,r0,r0 # We would anyways clear r3 -+#ifdef __arch64__ -+ BEALTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater -+ BREAI $LCheckr6 -+ RSUB r18,r6,r5 # MICROBLAZEcmp -+ BEALTI r18,$LaRETURN_HERE -+#else - BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater - BRI $LCheckr6 - RSUB r18,r6,r5 # MICROBLAZEcmp - BLTI r18,$LaRETURN_HERE -- -+#endif - # If r6 [bit 31] is set, then return result as 1 - $LCheckr6: -- BGTI r6,$LaDIV0 -- BRID $LaRETURN_HERE -+#ifdef __arch64__ -+ BEAGTI r6,$LaDIV0 -+ BREAID $LaRETURN_HERE -+#else -+ BGTI r6,$LaDIV0 -+ BRID $LaRETURN_HERE -+#endif - ADDIK r3,r0,1 - - # First part try to find the first '1' in the r5 - $LaDIV0: -+#ifdef __arch64__ -+ BEALTI r5,$LaDIV2 -+#else - BLTI r5,$LaDIV2 -+#endif - $LaDIV1: - ADD r5,r5,r5 # left shift logical r5 -+#ifdef __arch64__ -+ BEAGTID r5,$LaDIV1 -+#else - BGTID r5,$LaDIV1 -+#endif - ADDIK r29,r29,-1 - $LaDIV2: - ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry - ADDC r30,r30,r30 # Move that bit into the Mod register - RSUB r31,r6,r30 # Try to subtract (r30 a r6) -+#ifdef __arch64__ -+ BEALTI r31,$LaMOD_TOO_SMALL -+#else - BLTI r31,$LaMOD_TOO_SMALL -+#endif - OR r30,r0,r31 # Move the r31 to mod since the result was positive - ADDIK r3,r3,1 - $LaMOD_TOO_SMALL: - ADDIK r29,r29,-1 -+#ifdef __arch64__ -+ BEAEQi r29,$LaLOOP_END -+ ADD r3,r3,r3 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BREAI $LaRETURN_HERE -+#else - BEQi r29,$LaLOOP_END - ADD r3,r3,r3 # Shift in the '1' into div - BRI $LaDIV2 # Div2 - $LaLOOP_END: - BRI $LaRETURN_HERE -+#endif - $LaDiv_By_Zero: - $LaResult_Is_Zero: - OR r3,r0,r0 # set result to 0 -@@ -115,7 +159,7 @@ $LaRETURN_HERE: - LLI r29,r1,0 - LLI r30,r1,8 - LLI r31,r1,16 -- ADDIK r1,r1,24 -+ ADDLIK r1,r1,24 - RTSD r15,8 - NOP - #else -diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index 9bf65c3..3bd5d48 100644 ---- a/libgcc/config/microblaze/umodsi3.S -+++ b/libgcc/config/microblaze/umodsi3.S -@@ -46,7 +46,7 @@ - __umodsi3: - .frame r1,0,r15 - -- addik r1,r1,-24 -+ addlik r1,r1,-24 - sli r29,r1,0 - sli r30,r1,8 - sli r31,r1,16 -@@ -59,27 +59,77 @@ __umodsi3: - swi r30,r1,4 - swi r31,r1,8 - #endif -+#ifdef __arch64__ -+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error -+ BEAEQId r5,$LaResult_Is_Zero # Result is Zero -+#else - BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error - BEQId r5,$LaResult_Is_Zero # Result is Zero -+#endif - ADDIK r3,r0,0 # Clear div - ADDIK r30,r0,0 # clear mod - ADDIK r29,r0,32 # Initialize the loop count - - # Check if r6 and r5 are equal # if yes, return 0 - rsub r18,r5,r6 -- beqi r18,$LaRETURN_HERE - -+#ifdef __arch64__ -+ beaeqi r18,$LaRETURN_HERE -+#else -+ beqi r18,$LaRETURN_HERE -+#endif - # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5 - xor r18,r5,r6 -+#ifdef __arch64__ -+ beageid r18,16 -+ addik r3,r5,0 -+ bealti r6,$LaRETURN_HERE -+ breai $LCheckr6 -+ rsub r18,r5,r6 # MICROBLAZEcmp -+ beagti r18,$LaRETURN_HERE -+#else - bgeid r18,16 - addik r3,r5,0 - blti r6,$LaRETURN_HERE - bri $LCheckr6 - rsub r18,r5,r6 # MICROBLAZEcmp - bgti r18,$LaRETURN_HERE -- -+#endif - # If r6 [bit 31] is set, then return result as r5-r6 - $LCheckr6: -+#ifdef __arch64__ -+ beagtid r6,$LaDIV0 -+ addik r3,r0,0 -+ addik r18,r0,0x7fffffff -+ and r5,r5,r18 -+ and r6,r6,r18 -+ breaid $LaRETURN_HERE -+ rsub r3,r6,r5 -+# First part: try to find the first '1' in the r5 -+$LaDIV0: -+ BEALTI r5,$LaDIV2 -+$LaDIV1: -+ ADD r5,r5,r5 # left shift logical r5 -+ BEAGEID r5,$LaDIV1 # -+ ADDIK r29,r29,-1 -+$LaDIV2: -+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry -+ ADDC r3,r3,r3 # Move that bit into the Mod register -+ rSUB r31,r6,r3 # Try to subtract (r3 a r6) -+ BEALTi r31,$LaMOD_TOO_SMALL -+ OR r3,r0,r31 # Move the r31 to mod since the result was positive -+ ADDIK r30,r30,1 -+$LaMOD_TOO_SMALL: -+ ADDIK r29,r29,-1 -+ BEAEQi r29,$LaLOOP_END -+ ADD r30,r30,r30 # Shift in the '1' into div -+ BREAI $LaDIV2 # Div2 -+$LaLOOP_END: -+ BREAI $LaRETURN_HERE -+$LaDiv_By_Zero: -+$LaResult_Is_Zero: -+ or r3,r0,r0 # set result to 0 -+#else - bgtid r6,$LaDIV0 - addik r3,r0,0 - addik r18,r0,0x7fffffff -@@ -111,7 +161,7 @@ $LaLOOP_END: - $LaDiv_By_Zero: - $LaResult_Is_Zero: - or r3,r0,r0 # set result to 0 -- -+#endif - #ifdef __arch64__ - $LaRETURN_HERE: - # Restore values of CSRs and that of r3 and the divisor and the dividend --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0061-Author-Nagaraju-nmekala-xilinx.com.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0061-Author-Nagaraju-nmekala-xilinx.com.patch deleted file mode 100644 index 690bc7273..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0061-Author-Nagaraju-nmekala-xilinx.com.patch +++ /dev/null @@ -1,479 +0,0 @@ -From e1b8cfe6c0b4a0bd90ecbd3e85ae7114df21b6cc Mon Sep 17 00:00:00 2001 -From: Nagaraju <nmekala@xilinx.com> -Date: Thu, 18 Apr 2019 16:00:37 +0530 -Subject: [PATCH 61/62] Author: Nagaraju <nmekala@xilinx.com> Date: Wed Apr - 17 14:11:00 2019 +0530 - - [Patch, microblaze]: MB-64 removal of barrel-shift instructions from default - By default MB-64 is generatting barrel-shift instructions. It has been - removed from default. Barrel-shift instructions will be generated only if - barrel-shifter is enabled. Similarly to double instructions as well. - - Signed-off-by :Nagaraju Mekala <nmekala@xilix.com> ---- - gcc/config/microblaze/microblaze.c | 2 +- - gcc/config/microblaze/microblaze.md | 269 +++++++++++++++++++++++++++++++++--- - 2 files changed, 252 insertions(+), 19 deletions(-) - -diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c -index 33d183e..c321b03 100644 ---- a/gcc/config/microblaze/microblaze.c -+++ b/gcc/config/microblaze/microblaze.c -@@ -3868,7 +3868,7 @@ microblaze_expand_divide (rtx operands[]) - emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); - - if (TARGET_MB_64) { -- emit_insn (gen_ashldi3_long (regt1, operands[1], GEN_INT(4))); -+ emit_insn (gen_ashldi3 (regt1, operands[1], GEN_INT(4))); - emit_insn (gen_adddi3 (regt1, regt1, operands[2])); - } - else { -diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 8bd175f..b5b60fb 100644 ---- a/gcc/config/microblaze/microblaze.md -+++ b/gcc/config/microblaze/microblaze.md -@@ -545,7 +545,7 @@ - [(set (match_operand:DF 0 "register_operand" "=d") - (plus:DF (match_operand:DF 1 "register_operand" "d") - (match_operand:DF 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "dadd\t%0,%1,%2" - [(set_attr "type" "fadd") - (set_attr "mode" "DF") -@@ -555,7 +555,7 @@ - [(set (match_operand:DF 0 "register_operand" "=d") - (minus:DF (match_operand:DF 1 "register_operand" "d") - (match_operand:DF 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "drsub\t%0,%2,%1" - [(set_attr "type" "frsub") - (set_attr "mode" "DF") -@@ -565,7 +565,7 @@ - [(set (match_operand:DF 0 "register_operand" "=d") - (mult:DF (match_operand:DF 1 "register_operand" "d") - (match_operand:DF 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "dmul\t%0,%1,%2" - [(set_attr "type" "fmul") - (set_attr "mode" "DF") -@@ -575,7 +575,7 @@ - [(set (match_operand:DF 0 "register_operand" "=d") - (div:DF (match_operand:DF 1 "register_operand" "d") - (match_operand:DF 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "ddiv\t%0,%2,%1" - [(set_attr "type" "fdiv") - (set_attr "mode" "DF") -@@ -585,7 +585,7 @@ - (define_insn "sqrtdf2" - [(set (match_operand:DF 0 "register_operand" "=d") - (sqrt:DF (match_operand:DF 1 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "dsqrt\t%0,%1" - [(set_attr "type" "fsqrt") - (set_attr "mode" "DF") -@@ -594,7 +594,7 @@ - (define_insn "floatdidf2" - [(set (match_operand:DF 0 "register_operand" "=d") - (float:DF (match_operand:DI 1 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "dbl\t%0,%1" - [(set_attr "type" "fcvt") - (set_attr "mode" "DF") -@@ -603,7 +603,7 @@ - (define_insn "fix_truncdfdi2" - [(set (match_operand:DI 0 "register_operand" "=d") - (fix:DI (fix:DF (match_operand:DF 1 "register_operand" "d"))))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_HARD_FLOAT && TARGET_FLOAT_CONVERT" - "dlong\t%0,%1" - [(set_attr "type" "fcvt") - (set_attr "mode" "DI") -@@ -1299,6 +1299,34 @@ - (set_attr "mode" "DI") - (set_attr "length" "4")]) - -+(define_insn "*movdi_internal2_bshift" -+ [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m") -+ (match_operand:DI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))] -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" -+ { -+ switch (which_alternative) -+ { -+ case 0: -+ return "addlk\t%0,%1,r0"; -+ case 1: -+ case 2: -+ if (GET_CODE (operands[1]) == CONST_INT && -+ (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888)) -+ return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; -+ else -+ return "addlik\t%0,r0,%1"; -+ case 3: -+ case 4: -+ return "ll%i1\t%0,%1"; -+ case 5: -+ case 6: -+ return "sl%i0\t%z1,%0"; -+ } -+ } -+ [(set_attr "type" "load,no_delay_load,no_delay_load,no_delay_load,no_delay_load,no_delay_store,no_delay_store") -+ (set_attr "mode" "DI") -+ (set_attr "length" "4,4,12,4,8,4,8")]) -+ - (define_insn "*movdi_internal2" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d, d,d,R,m") - (match_operand:DI 1 "move_src_operand" " d,I,Mnis,R,m,dJ,dJ"))] -@@ -1312,7 +1340,15 @@ - case 2: - if (GET_CODE (operands[1]) == CONST_INT && - (INTVAL (operands[1]) > (long long)549755813887 || INTVAL (operands[1]) < (long long)-549755813888)) -- return "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; -+ { -+ operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ output_asm_insn ("addlik\t%0,r0,%h1", operands); -+ output_asm_insn ("addlik\t%2,r0,32", operands); -+ output_asm_insn ("addlik\t%2,%2,-1", operands); -+ output_asm_insn ("beaneid\t%2,.-8", operands); -+ output_asm_insn ("addlk\t%0,%0,%0", operands); -+ return "addlik\t%0,%0,%j1 #li => la"; -+ } - else - return "addlik\t%0,r0,%1"; - case 3: -@@ -1386,7 +1422,7 @@ - (define_insn "movdi_long_int" - [(set (match_operand:DI 0 "nonimmediate_operand" "=d") - (match_operand:DI 1 "general_operand" "i"))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" - "addlik\t%0,r0,%h1\n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%j1 #li => la"; - [(set_attr "type" "no_delay_arith") - (set_attr "mode" "DI") -@@ -1653,6 +1689,33 @@ - ;; movdf_internal - ;; Applies to both TARGET_SOFT_FLOAT and TARGET_HARD_FLOAT - ;; -+(define_insn "*movdf_internal_64_bshift" -+ [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m") -+ (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))] -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" -+ { -+ switch (which_alternative) -+ { -+ case 0: -+ return "addlk\t%0,%1,r0"; -+ case 1: -+ return "addlk\t%0,r0,r0"; -+ case 2: -+ case 4: -+ return "ll%i1\t%0,%1"; -+ case 3: -+ { -+ return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo"; -+ } -+ case 5: -+ return "sl%i0\t%1,%0"; -+ } -+ gcc_unreachable (); -+ } -+ [(set_attr "type" "no_delay_move,no_delay_move,no_delay_load,no_delay_load,no_delay_load,no_delay_store") -+ (set_attr "mode" "DF") -+ (set_attr "length" "4,4,4,16,4,4")]) -+ - (define_insn "*movdf_internal_64" - [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,d,d,m") - (match_operand:DF 1 "general_operand" "d,dG,m,F,T,d"))] -@@ -1669,7 +1732,13 @@ - return "ll%i1\t%0,%1"; - case 3: - { -- return "addlik\t%0,r0,%j1 \n\tbsllli\t%0,%0,32\n\taddlik\t%0,%0,%h1 #Xfer Lo"; -+ operands[2] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ output_asm_insn ("addlik\t%0,r0,%h1", operands); -+ output_asm_insn ("addlik\t%2,r0,32", operands); -+ output_asm_insn ("addlik\t%2,%2,-1", operands); -+ output_asm_insn ("beaneid\t%2,.-8", operands); -+ output_asm_insn ("addlk\t%0,%0,%0", operands); -+ return "addlik\t%0,%0,%j1 #li => la"; - } - case 5: - return "sl%i0\t%1,%0"; -@@ -1789,11 +1858,21 @@ - "TARGET_MB_64" - { - ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) --if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) - { - emit_insn(gen_ashldi3_long (operands[0], operands[1],operands[2])); - DONE; - } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) -+ { -+ emit_insn(gen_ashldi3_const (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) -+ { -+ emit_insn(gen_ashldi3_reg (operands[0], operands[1],operands[2])); -+ DONE; -+ } - else - FAIL; - } -@@ -1803,7 +1882,7 @@ else - [(set (match_operand:DI 0 "register_operand" "=d,d") - (ashift:DI (match_operand:DI 1 "register_operand" "d,d") - (match_operand:DI 2 "arith_operand" "I,d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" - "@ - bsllli\t%0,%1,%2 - bslll\t%0,%1,%2" -@@ -1811,6 +1890,51 @@ else - (set_attr "mode" "DI,DI") - (set_attr "length" "4,4")] - ) -+ -+(define_insn "ashldi3_const" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashift:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "immediate_operand" "I")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("orli\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "addlk\t%0,%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "DI") -+ (set_attr "length" "20")] -+) -+ -+(define_insn "ashldi3_reg" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashift:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ output_asm_insn ("andli\t%3,%2,31", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,r0,%1", operands); -+ /* Exit the loop if zero shift. */ -+ output_asm_insn ("beaeqid\t%3,.+24", operands); -+ /* Emit the loop. */ -+ output_asm_insn ("addlk\t%0,%0,r0", operands); -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "addlk\t%0,%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "DI") -+ (set_attr "length" "28")] -+) -+ - ;; The following patterns apply when there is no barrel shifter present - - (define_insn "*ashlsi3_with_mul_delay" -@@ -1944,11 +2068,21 @@ else - "TARGET_MB_64" - { - ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) --if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) - { - emit_insn(gen_ashrdi3_long (operands[0], operands[1],operands[2])); - DONE; - } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) -+ { -+ emit_insn(gen_ashrdi3_const (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) -+ { -+ emit_insn(gen_ashrdi3_reg (operands[0], operands[1],operands[2])); -+ DONE; -+ } - else - FAIL; - } -@@ -1958,7 +2092,7 @@ else - [(set (match_operand:DI 0 "register_operand" "=d,d") - (ashiftrt:DI (match_operand:DI 1 "register_operand" "d,d") - (match_operand:DI 2 "arith_operand" "I,d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" - "@ - bslrai\t%0,%1,%2 - bslra\t%0,%1,%2" -@@ -1966,6 +2100,51 @@ else - (set_attr "mode" "DI,DI") - (set_attr "length" "4,4")] - ) -+ -+(define_insn "ashrdi3_const" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "immediate_operand" "I")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("orli\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "srla\t%0,%0"; -+ } -+ [(set_attr "type" "arith") -+ (set_attr "mode" "DI") -+ (set_attr "length" "20")] -+) -+ -+(define_insn "ashrdi3_reg" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (ashiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ output_asm_insn ("andli\t%3,%2,31", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,r0,%1", operands); -+ /* Exit the loop if zero shift. */ -+ output_asm_insn ("beaeqid\t%3,.+24", operands); -+ /* Emit the loop. */ -+ output_asm_insn ("addlk\t%0,%0,r0", operands); -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "srla\t%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "DI") -+ (set_attr "length" "28")] -+) -+ - (define_expand "ashrsi3" - [(set (match_operand:SI 0 "register_operand" "=&d") - (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -@@ -2083,11 +2262,21 @@ else - "TARGET_MB_64" - { - ;;if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) --if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65) -+if (INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && TARGET_BARREL_SHIFT) - { - emit_insn(gen_lshrdi3_long (operands[0], operands[1],operands[2])); - DONE; - } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && CONST_INT_P (operands[2])) -+ { -+ emit_insn(gen_lshrdi3_const (operands[0], operands[1],operands[2])); -+ DONE; -+ } -+else if(INTVAL (operands[2]) > 0 && INTVAL (operands[2]) < 65 && GET_CODE (operands[2]) == REG) -+ { -+ emit_insn(gen_lshrdi3_reg (operands[0], operands[1],operands[2])); -+ DONE; -+ } - else - FAIL; - } -@@ -2097,7 +2286,7 @@ else - [(set (match_operand:DI 0 "register_operand" "=d,d") - (lshiftrt:DI (match_operand:DI 1 "register_operand" "d,d") - (match_operand:DI 2 "arith_operand" "I,d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_BARREL_SHIFT" - "@ - bslrli\t%0,%1,%2 - bslrl\t%0,%1,%2" -@@ -2106,6 +2295,50 @@ else - (set_attr "length" "4,4")] - ) - -+(define_insn "lshrdi3_const" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (lshiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "immediate_operand" "I")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ -+ output_asm_insn ("orli\t%3,r0,%2", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,%1,r0", operands); -+ -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "srll\t%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "DI") -+ (set_attr "length" "20")] -+) -+ -+(define_insn "lshrdi3_reg" -+ [(set (match_operand:DI 0 "register_operand" "=&d") -+ (lshiftrt:DI (match_operand:DI 1 "register_operand" "d") -+ (match_operand:DI 2 "register_operand" "d")))] -+ "TARGET_MB_64" -+ { -+ operands[3] = gen_rtx_REG (DImode, MB_ABI_ASM_TEMP_REGNUM); -+ output_asm_insn ("andli\t%3,%2,31", operands); -+ if (REGNO (operands[0]) != REGNO (operands[1])) -+ output_asm_insn ("addlk\t%0,r0,%1", operands); -+ /* Exit the loop if zero shift. */ -+ output_asm_insn ("beaeqid\t%3,.+24", operands); -+ /* Emit the loop. */ -+ output_asm_insn ("addlk\t%0,%0,r0", operands); -+ output_asm_insn ("addlik\t%3,%3,-1", operands); -+ output_asm_insn ("beaneid\t%3,.-8", operands); -+ return "srll\t%0,%0"; -+ } -+ [(set_attr "type" "multi") -+ (set_attr "mode" "SI") -+ (set_attr "length" "28")] -+) -+ - (define_expand "lshrsi3" - [(set (match_operand:SI 0 "register_operand" "=&d") - (lshiftrt:SI (match_operand:SI 1 "register_operand" "d") -@@ -2233,7 +2466,7 @@ else - (eq:DI - (match_operand:DI 1 "register_operand" "d") - (match_operand:DI 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_PATTERN_COMPARE" - "pcmpleq\t%0,%1,%2" - [(set_attr "type" "arith") - (set_attr "mode" "DI") -@@ -2245,7 +2478,7 @@ else - (ne:DI - (match_operand:DI 1 "register_operand" "d") - (match_operand:DI 2 "register_operand" "d")))] -- "TARGET_MB_64" -+ "TARGET_MB_64 && TARGET_PATTERN_COMPARE" - "pcmplne\t%0,%1,%2" - [(set_attr "type" "arith") - (set_attr "mode" "DI") --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch deleted file mode 100644 index e7dfa89c1..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-8/0062-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 612e6579116e6714417ea21e6c13b0968bb6aac2 Mon Sep 17 00:00:00 2001 -From: Nagaraju <nmekala@xilinx.com> -Date: Wed, 8 May 2019 14:12:03 +0530 -Subject: [PATCH 62/62] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and - disable fivopts by default - -Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default. - - * gcc/common/config/microblaze/microblaze-common.c - (microblaze_option_optimization_table): Disable fivopts by default. - -Signed-off-by: Nagaraju Mekala <nmekala@xilinx.com> ---- - gcc/common/config/microblaze/microblaze-common.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c -index fe45f2e..2873d4b 100644 ---- a/gcc/common/config/microblaze/microblaze-common.c -+++ b/gcc/common/config/microblaze/microblaze-common.c -@@ -27,13 +27,15 @@ - /* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */ - static const struct default_options microblaze_option_optimization_table[] = - { -- /* Turn off ivopts by default. It messes up cse. */ -+ /* Turn off ivopts by default. It messes up cse. -+ { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, */ - { OPT_LEVELS_ALL, OPT_fivopts, NULL, 0 }, -- { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, - { OPT_LEVELS_NONE, 0, NULL, 0 } - }; - - #undef TARGET_DEFAULT_TARGET_FLAGS - #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT - -+#undef TARGET_OPTION_OPTIMIZATION_TABLE -+#define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table - struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; --- -2.7.4 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0065-microblaze-multilib-hack.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0065-microblaze-multilib-hack.patch new file mode 100644 index 000000000..af8ebf3be --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-9/0065-microblaze-multilib-hack.patch @@ -0,0 +1,58 @@ +Microblaze Mulitlib hack + +Based on the patch: + +From c2081c51db589471ea713870c72f13999abda815 Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Fri, 29 Mar 2013 09:10:06 +0400 +Subject: [PATCH 04/36] 64-bit multilib hack. + +GCC has internal multilib handling code but it assumes a very specific rigid directory +layout. The build system implementation of multilib layout is very generic and allows +complete customisation of the library directories. + +This patch is a partial solution to allow any custom directories to be passed into gcc +and handled correctly. It forces gcc to use the base_libdir (which is the current +directory, "."). We need to do this for each multilib that is configured as we don't +know which compiler options may be being passed into the compiler. Since we have a compiler +per mulitlib at this point that isn't an issue. + +The one problem is the target compiler is only going to work for the default multlilib at +this point. Ideally we'd figure out which multilibs were being enabled with which paths +and be able to patch these entries with a complete set of correct paths but this we +don't have such code at this point. This is something the target gcc recipe should do +and override these platform defaults in its build config. + +Do same for riscv64 and aarch64 + +RP 15/8/11 + +Upstream-Status: Inappropriate[OE-Specific] + +Signed-off-by: Khem Raj <raj.khem@gmail.com> +Signed-off-by: Elvis Dowson <elvis.dowson@gmail.com> +Signed-off-by: Mark Hatle <mark.hatle@windriver.com> +Signed-off-by: Mark Hatle <mark.hatle@xilinx.com> + +Index: gcc-9.2.0/gcc/config/microblaze/t-microblaze +=================================================================== +--- gcc-9.2.0.orig/gcc/config/microblaze/t-microblaze ++++ gcc-9.2.0/gcc/config/microblaze/t-microblaze +@@ -1,5 +1,6 @@ + MULTILIB_OPTIONS = m64 mxl-barrel-shift mlittle-endian mno-xl-soft-mul mxl-multiply-high +-MULTILIB_DIRNAMES = m64 bs le m mh ++#MULTILIB_DIRNAMES = m64 bs le m mh ++MULTILIB_DIRNAMES = . . . . . + MULTILIB_EXCEPTIONS = *m64/mxl-multiply-high mxl-multiply-high + MULTILIB_EXCEPTIONS += *m64 + MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift +Index: gcc-9.2.0/gcc/config/microblaze/t-microblaze-linux +=================================================================== +--- gcc-9.2.0.orig/gcc/config/microblaze/t-microblaze-linux ++++ gcc-9.2.0/gcc/config/microblaze/t-microblaze-linux +@@ -1,3 +1,4 @@ + MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high +-MULTILIB_DIRNAMES = bs m mh ++#MULTILIB_DIRNAMES = bs m mh ++MULTILIB_DIRNAMES = . . . + MULTILIB_EXCEPTIONS = *mxl-barrel-shift/mxl-multiply-high mxl-multiply-high diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_8.%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_8.%.bbappend deleted file mode 100644 index d6a819126..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gcc/gcc-source_8.%.bbappend +++ /dev/null @@ -1,65 +0,0 @@ -# Add MicroBlaze Patches (only when using MicroBlaze) -FILESEXTRAPATHS_append_microblaze := "${THISDIR}/gcc-8:" -SRC_URI_append_microblaze = " \ -file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \ - file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \ - file://0003-LOCAL-Testsuite-explicitly-add-fivopts-for-tests-tha.patch \ - file://0004-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \ - file://0005-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \ - file://0006-Patch-testsuite-Update-MicroBlaze-strings-test.patch \ - file://0007-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \ - file://0008-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \ - file://0009-Patch-microblaze-Fix-atomic-side-effects.patch \ - file://0010-Patch-microblaze-Fix-atomic-boolean-return-value.patch \ - file://0011-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \ - file://0012-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \ - file://0013-Patch-microblaze-Fixed-missing-save-of-r18-in-fast_i.patch \ - file://0014-Patch-microblaze-Use-bralid-for-profiler-calls.patch \ - file://0015-Patch-microblaze-Disable-fivopts-by-default.patch \ - file://0016-Patch-microblaze-Removed-moddi3-routinue.patch \ - file://0017-Patch-microblaze-Add-INIT_PRIORITY-support.patch \ - file://0018-Patch-microblaze-Add-optimized-lshrsi3.patch \ - file://0019-Patch-microblaze-Modified-trap-instruction.patch \ - file://0020-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \ - file://0021-Patch-microblaze-Add-cbranchsi4_reg.patch \ - file://0022-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \ - file://0023-Patch-OPT-Update-heuristics-for-loop-invariant-for-a.patch \ - file://0024-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \ - file://0025-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \ - file://0026-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \ - file://0027-Patch-rtl-Optimization-Better-register-pressure-esti.patch \ - file://0028-Patch-microblaze-Correct-the-const-high-double-immed.patch \ - file://0029-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \ - file://0030-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \ - file://0031-Patch-microblaze-Add-new-bit-field-instructions.patch \ - file://0032-Patch-microblaze-Fix-bug-in-MB-version-calculation.patch \ - file://0033-Fixing-the-bug-in-the-bit-field-instruction.patch \ - file://0034-Patch-microblaze-Macros-used-in-Xilinx-internal-patc.patch \ - file://0035-Fixing-the-issue-with-the-builtin_alloc.patch \ - file://0036-Patch-Microblaze-reverting-the-cost-check-before-pro.patch \ - file://0037-Patch-Microblaze-update-in-constraints-for-bitfield-.patch \ - file://0038-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \ - file://0039-Intial-commit-of-64-bit-Microblaze.patch \ - file://0040-Added-load-store-pattern-movdi-and-also-adding-missi.patch \ - file://0041-Intial-commit-for-64bit-MB-sources.patch \ - file://0042-re-arrangement-of-the-compare-branches.patch \ - file://0043-Patch-Microblaze-previous-commit-broke-the-handling-.patch \ - file://0044-Patch-Microblaze-Support-of-multilibs-with-m64.patch \ - file://0045-Fixed-issues-like.patch \ - file://0046-Fixed-below-issues.patch \ - file://0047-Added-double-arith-instructions.patch \ - file://0048-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \ - file://0049-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \ - file://0050-extending-the-Dwarf-support-to-64bit-Microblaze.patch \ - file://0051-fixing-the-typo-errors-in-umodsi3-file.patch \ - file://0052-fixing-the-32bit-LTO-related-issue9-1014024.patch \ - file://0053-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \ - file://0054-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \ - file://0055-fixing-the-long-long-long-mingw-toolchain-issue.patch \ - file://0057-Fix-the-MB-64-bug-of-handling-QI-objects.patch \ - file://0058-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \ - file://0059-Reverting-the-patch-as-kernel-boot-is-not-working-wi.patch \ - file://0060-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \ - file://0061-Author-Nagaraju-nmekala-xilinx.com.patch \ - file://0055-microblaze_linker_script_xilinx_ld.patch \ -" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0001-Patch-microblaze-Add-wdc.ext.clear-and-wdc.ext.flush.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0001-Patch-microblaze-Add-wdc.ext.clear-and-wdc.ext.flush.patch deleted file mode 100644 index 3575cd7e0..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0001-Patch-microblaze-Add-wdc.ext.clear-and-wdc.ext.flush.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 8ab9a20c73acedbb636a41842a681872af8ae1d6 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Wed, 8 May 2013 11:03:36 +1000 -Subject: [PATCH 01/16] [Patch, microblaze]: Add wdc.ext.clear and - wdc.ext.flush insns - -Added two new instructions, wdc.ext.clear and wdc.ext.flush, -to enable MicroBlaze to flush an external cache, which is -used with the new coherency support for multiprocessing. - -Signed-off-by:nagaraju <nmekala@xilix.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - opcodes/microblaze-opc.h | 5 ++++- - opcodes/microblaze-opcm.h | 6 +++--- - 2 files changed, 7 insertions(+), 4 deletions(-) - -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index e3cc1d9..f453097 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -91,6 +91,7 @@ - #define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ - #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ - #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ -+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ - #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ - - /* New Mask for msrset, msrclr insns. */ -@@ -101,7 +102,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 289 -+#define MAX_OPCODES 291 - - struct op_code_struct - { -@@ -174,7 +175,9 @@ struct op_code_struct - {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst }, - {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst }, - {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst }, -+ {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, - {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, -+ {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst }, - {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst }, - {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, - {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 6868389..8f5c1cb 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -31,9 +31,9 @@ enum microblaze_instr - idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, - ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -- wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd, -- brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, -- bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, -+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, mts, mfs, mbar, -+ br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, -+ blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, - imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, - brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, - bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0003-Patch-microblaze-Initial-port-of-microblaze-core-rea.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0003-Patch-microblaze-Initial-port-of-microblaze-core-rea.patch deleted file mode 100644 index 5d8564085..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0003-Patch-microblaze-Initial-port-of-microblaze-core-rea.patch +++ /dev/null @@ -1,384 +0,0 @@ -From da27c7161c676550f5fe8a4e0f7f395e5e0d4770 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@petalogix.com> -Date: Fri, 18 May 2012 11:49:50 +1000 -Subject: [PATCH 03/16] [Patch, microblaze]: Initial port of microblaze core - reading support - -Added support for reading notes in linux core dumps -Support for reading of PRSTATUS and PSINFO information for rebuilding -".reg" sections of core dumps at run time. - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> -Upstream-Status: Pending ---- - bfd/elf32-microblaze.c | 64 ++++++++++++++++++++++++++++++++ - gdb/configure.tgt | 2 +- - gdb/microblaze-linux-tdep.c | 61 +++++++++++++++++++++++++++++++ - gdb/microblaze-tdep.c | 89 +++++++++++++++++++++++++++++++++++++++++++++ - gdb/microblaze-tdep.h | 28 ++++++++++++++ - 5 files changed, 243 insertions(+), 1 deletion(-) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index 9837b18..cbd18f0 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -668,6 +668,67 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) - return _bfd_elf_is_local_label_name (abfd, name); - } - -+/* Support for core dump NOTE sections. */ -+static bfd_boolean -+microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) -+{ -+ int offset; -+ unsigned int size; -+ -+ switch (note->descsz) -+ { -+ default: -+ return FALSE; -+ -+ case 228: /* Linux/MicroBlaze */ -+ /* pr_cursig */ -+ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); -+ -+ /* pr_pid */ -+ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); -+ -+ /* pr_reg */ -+ offset = 72; -+ size = 50 * 4; -+ -+ break; -+ } -+ -+ /* Make a ".reg/999" section. */ -+ return _bfd_elfcore_make_pseudosection (abfd, ".reg", -+ size, note->descpos + offset); -+} -+ -+static bfd_boolean -+microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) -+{ -+ switch (note->descsz) -+ { -+ default: -+ return FALSE; -+ -+ case 128: /* Linux/MicroBlaze elf_prpsinfo */ -+ elf_tdata (abfd)->core->program -+ = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); -+ elf_tdata (abfd)->core->command -+ = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); -+ } -+ -+ /* Note that for some reason, a spurious space is tacked -+ onto the end of the args in some (at least one anyway) -+ implementations, so strip it off if it exists. */ -+ -+ { -+ char *command = elf_tdata (abfd)->core->command; -+ int n = strlen (command); -+ -+ if (0 < n && command[n - 1] == ' ') -+ command[n - 1] = '\0'; -+ } -+ -+ return TRUE; -+} -+ - /* The microblaze linker (like many others) needs to keep track of - the number of relocs that it decides to copy as dynamic relocs in - check_relocs for each symbol. This is so that it can later discard -@@ -3506,4 +3567,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, - #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections - #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook - -+#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus -+#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo -+ - #include "elf32-target.h" -diff --git a/gdb/configure.tgt b/gdb/configure.tgt -index 01311b2..9297c56 100644 ---- a/gdb/configure.tgt -+++ b/gdb/configure.tgt -@@ -340,7 +340,7 @@ mep-*-*) - - microblaze*-linux-*|microblaze*-*-linux*) - # Target: Xilinx MicroBlaze running Linux -- gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o microblaze-rom.o \ -+ gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o microblaze-rom.o glibc-tdep.o \ - monitor.o dsrec.o solib-svr4.o symfile-mem.o linux-tdep.o" - gdb_sim=../sim/microblaze/libsim.a - ;; -diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index 8d360eb..7e6b61b 100644 ---- a/gdb/microblaze-linux-tdep.c -+++ b/gdb/microblaze-linux-tdep.c -@@ -32,6 +32,7 @@ - #include "regset.h" - #include "solib-svr4.h" - #include "microblaze-tdep.h" -+#include "glibc-tdep.h" - #include "trad-frame.h" - #include "frame-unwind.h" - #include "tramp-frame.h" -@@ -116,6 +117,43 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = - microblaze_linux_sighandler_cache_init - }; - -+const struct microblaze_gregset microblaze_linux_core_gregset; -+ -+static void -+microblaze_linux_supply_core_gregset (const struct regset *regset, -+ struct regcache *regcache, -+ int regnum, const void *gregs, size_t len) -+{ -+ microblaze_supply_gregset (µblaze_linux_core_gregset, regcache, -+ regnum, gregs); -+} -+ -+static void -+microblaze_linux_collect_core_gregset (const struct regset *regset, -+ const struct regcache *regcache, -+ int regnum, void *gregs, size_t len) -+{ -+ microblaze_collect_gregset (µblaze_linux_core_gregset, regcache, -+ regnum, gregs); -+} -+ -+static void -+microblaze_linux_supply_core_fpregset (const struct regset *regset, -+ struct regcache *regcache, -+ int regnum, const void *fpregs, size_t len) -+{ -+ /* FIXME. */ -+ microblaze_supply_fpregset (regcache, regnum, fpregs); -+} -+ -+static void -+microblaze_linux_collect_core_fpregset (const struct regset *regset, -+ const struct regcache *regcache, -+ int regnum, void *fpregs, size_t len) -+{ -+ /* FIXME. */ -+ microblaze_collect_fpregset (regcache, regnum, fpregs); -+} - - static void - microblaze_linux_init_abi (struct gdbarch_info info, -@@ -123,6 +161,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, - { - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - -+ tdep->gregset = regset_alloc (gdbarch, microblaze_linux_supply_core_gregset, -+ microblaze_linux_collect_core_gregset); -+ tdep->sizeof_gregset = 200; -+ - linux_init_abi (info, gdbarch); - - set_gdbarch_memory_remove_breakpoint (gdbarch, -@@ -135,6 +177,25 @@ microblaze_linux_init_abi (struct gdbarch_info info, - /* Trampolines. */ - tramp_frame_prepend_unwinder (gdbarch, - µblaze_linux_sighandler_tramp_frame); -+ -+ /* BFD target for core files. */ -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); -+ else -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); -+ -+ -+ /* Shared library handling. */ -+ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); -+ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); -+ -+ set_gdbarch_regset_from_core_section (gdbarch, -+ microblaze_regset_from_core_section); -+ -+ /* Enable TLS support. */ -+ set_gdbarch_fetch_tls_load_module_address (gdbarch, -+ svr4_fetch_objfile_link_map); -+ - } - - /* -Wmissing-prototypes */ -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 14c1b52..36cf1ca 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -145,6 +145,14 @@ microblaze_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, - return sp; - } - -+static CORE_ADDR -+microblaze_store_arguments (struct regcache *regcache, int nargs, -+ struct value **args, CORE_ADDR sp, -+ int struct_return, CORE_ADDR struct_addr) -+{ -+ error (_("store_arguments not implemented")); -+ return sp; -+} - - static CORE_ADDR - microblaze_push_dummy_call (struct gdbarch *gdbarch, struct value *function, -@@ -536,6 +544,12 @@ microblaze_frame_base_address (struct frame_info *next_frame, - return cache->base; - } - -+static const struct frame_unwind * -+microblaze_frame_sniffer (struct frame_info *next_frame) -+{ -+ return µblaze_frame_unwind; -+} -+ - static const struct frame_base microblaze_frame_base = - { - µblaze_frame_unwind, -@@ -664,6 +678,70 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) - return dwarf2_to_reg_map[reg]; - } - -+ -+void -+microblaze_supply_gregset (const struct microblaze_gregset *gregset, -+ struct regcache *regcache, -+ int regnum, const void *gregs) -+{ -+ unsigned int *regs = gregs; -+ if (regnum >= 0) -+ regcache_raw_supply (regcache, regnum, regs + regnum); -+ -+ if (regnum == -1) { -+ int i; -+ -+ for (i = 0; i < 50; i++) { -+ regcache_raw_supply (regcache, i, regs + i); -+ } -+ } -+} -+ -+ -+void -+microblaze_collect_gregset (const struct microblaze_gregset *gregset, -+ const struct regcache *regcache, -+ int regnum, void *gregs) -+{ -+ /* FIXME. */ -+} -+ -+void -+microblaze_supply_fpregset (struct regcache *regcache, -+ int regnum, const void *fpregs) -+{ -+ /* FIXME. */ -+} -+ -+void -+microblaze_collect_fpregset (const struct regcache *regcache, -+ int regnum, void *fpregs) -+{ -+ /* FIXME. */ -+} -+ -+ -+/* Return the appropriate register set for the core section identified -+ by SECT_NAME and SECT_SIZE. */ -+ -+const struct regset * -+microblaze_regset_from_core_section (struct gdbarch *gdbarch, -+ const char *sect_name, size_t sect_size) -+{ -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ -+ microblaze_debug ("microblaze_regset_from_core_section, sect_name = %s\n", sect_name); -+ -+ if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) -+ return tdep->gregset; -+ -+ if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) -+ return tdep->fpregset; -+ -+ microblaze_debug ("microblaze_regset_from_core_section returning null :-( \n"); -+ return NULL; -+} -+ - static struct gdbarch * - microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - { -@@ -679,6 +757,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - tdep = XNEW (struct gdbarch_tdep); - gdbarch = gdbarch_alloc (&info, tdep); - -+ tdep->gregset = NULL; -+ tdep->sizeof_gregset = 0; -+ tdep->fpregset = NULL; -+ tdep->sizeof_fpregset = 0; -+ - set_gdbarch_long_double_bit (gdbarch, 128); - - set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); -@@ -726,6 +809,12 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - frame_unwind_append_unwinder (gdbarch, µblaze_frame_unwind); - frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); - -+ /* If we have register sets, enable the generic core file support. */ -+ if (tdep->gregset) { -+ set_gdbarch_regset_from_core_section (gdbarch, -+ microblaze_regset_from_core_section); -+ } -+ - return gdbarch; - } - -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index a532092..fec24b9 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -22,8 +22,22 @@ - - - /* Microblaze architecture-specific information. */ -+struct microblaze_gregset -+{ -+ unsigned int gregs[32]; -+ unsigned int fpregs[32]; -+ unsigned int pregs[16]; -+}; -+ - struct gdbarch_tdep - { -+ int dummy; // declare something. -+ -+ /* Register sets. */ -+ struct regset *gregset; -+ size_t sizeof_gregset; -+ struct regset *fpregset; -+ size_t sizeof_fpregset; - }; - - struct microblaze_frame_cache -@@ -117,4 +131,18 @@ enum microblaze_regnum - Only used for native debugging. */ - #define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60} - -+extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset, -+ struct regcache *regcache, -+ int regnum, const void *gregs); -+extern void microblaze_collect_gregset (const struct microblaze_gregset *gregset, -+ const struct regcache *regcache, -+ int regnum, void *gregs); -+extern void microblaze_supply_fpregset (struct regcache *regcache, -+ int regnum, const void *fpregs); -+extern void microblaze_collect_fpregset (const struct regcache *regcache, -+ int regnum, void *fpregs); -+ -+extern const struct regset * microblaze_regset_from_core_section (struct gdbarch *gdbarch, -+ const char *sect_name, size_t sect_size); -+ - #endif /* microblaze-tdep.h */ --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0004-Patch-microblaze-Communicate-in-larger-blocks-with-t.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0004-Patch-microblaze-Communicate-in-larger-blocks-with-t.patch deleted file mode 100644 index b14e4092a..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0004-Patch-microblaze-Communicate-in-larger-blocks-with-t.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 26e124f0d78233b1d976bd4b787f6a7866bcb7e7 Mon Sep 17 00:00:00 2001 -From: nagaraju <nmekala@xilix.com> -Date: Wed, 4 Jan 2012 16:59:33 +0530 -Subject: [PATCH 04/16] [Patch, microblaze]: Communicate in larger blocks with - the target - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Upstream-Status: Pending ---- - gdb/microblaze-tdep.c | 25 ++++++++++++++++++++++--- - 1 file changed, 22 insertions(+), 3 deletions(-) - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 36cf1ca..76e87b3 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -242,6 +242,10 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - int flags = 0; - int save_hidden_pointer_found = 0; - int non_stack_instruction_found = 0; -+ int n_insns; -+ unsigned long *insn_block; -+ gdb_byte *buf_block; -+ int ti, tj; - - /* Find the start of this function. */ - find_pc_partial_function (pc, &name, &func_addr, &func_end); -@@ -281,9 +285,23 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - name, paddress (gdbarch, func_addr), - paddress (gdbarch, stop)); - -+/* Do a block read to minimize the transaction with the Debug Agent */ -+ n_insns = (stop == func_addr) ? 1 : ((stop - func_addr) / INST_WORD_SIZE); -+ insn_block = (unsigned long *)calloc(n_insns, sizeof(unsigned long)); -+ buf_block = (gdb_byte *)calloc(n_insns * INST_WORD_SIZE, sizeof(gdb_byte)); -+ -+ target_read_memory (func_addr, buf_block, n_insns * INST_WORD_SIZE ); -+ -+ for(ti = 0; ti < n_insns; ti++){ -+ insn_block[ti] = 0; -+ for( tj = ti * INST_WORD_SIZE; tj < (ti + 1) * INST_WORD_SIZE; tj++ ) -+ insn_block[ti] = (insn_block[ti] << 8) | buf_block[tj]; -+ } -+ - for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE) - { -- insn = microblaze_fetch_instruction (addr); -+ //insn = microblaze_fetch_instruction (addr); -+ insn = insn_block[(addr - func_addr) / INST_WORD_SIZE]; - op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); - microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn); - -@@ -409,8 +427,9 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - part of the prologue. */ - if (save_hidden_pointer_found) - prologue_end_addr -= INST_WORD_SIZE; -- -- return prologue_end_addr; -+ free(insn_block); -+ free(buf_block); -+ return prologue_end_addr; - } - - static CORE_ADDR --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0005-Patch-microblaze-Add-mb-singlestepping.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0005-Patch-microblaze-Add-mb-singlestepping.patch deleted file mode 100644 index e490f02a0..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0005-Patch-microblaze-Add-mb-singlestepping.patch +++ /dev/null @@ -1,200 +0,0 @@ -From 5c3a08f407e1cbee5b0a4ca6092165b97acddda5 Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar@axis.com> -Date: Fri, 24 Feb 2012 11:52:30 +0100 -Subject: [PATCH 05/16] [Patch, microblaze]: Add mb singlestepping. - -Fix prologue analysis for little-endian. -Always provide a frame base. - -Signed-off-by: Edgar E. Iglesias <edgar@axis.com> -Upstream-Status: Pending ---- - gdb/microblaze-tdep.c | 123 ++++++++++++++++++++++++++++++++++++++++++++------ - 1 file changed, 108 insertions(+), 15 deletions(-) - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 76e87b3..50b68d2 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -243,9 +243,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - int save_hidden_pointer_found = 0; - int non_stack_instruction_found = 0; - int n_insns; -- unsigned long *insn_block; -- gdb_byte *buf_block; -- int ti, tj; -+ unsigned int *insn_block; - - /* Find the start of this function. */ - find_pc_partial_function (pc, &name, &func_addr, &func_end); -@@ -287,23 +285,16 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - - /* Do a block read to minimize the transaction with the Debug Agent */ - n_insns = (stop == func_addr) ? 1 : ((stop - func_addr) / INST_WORD_SIZE); -- insn_block = (unsigned long *)calloc(n_insns, sizeof(unsigned long)); -- buf_block = (gdb_byte *)calloc(n_insns * INST_WORD_SIZE, sizeof(gdb_byte)); -+ insn_block = calloc(n_insns, sizeof(unsigned long)); - -- target_read_memory (func_addr, buf_block, n_insns * INST_WORD_SIZE ); -- -- for(ti = 0; ti < n_insns; ti++){ -- insn_block[ti] = 0; -- for( tj = ti * INST_WORD_SIZE; tj < (ti + 1) * INST_WORD_SIZE; tj++ ) -- insn_block[ti] = (insn_block[ti] << 8) | buf_block[tj]; -- } -+ target_read_memory (func_addr, (void*) insn_block, n_insns * INST_WORD_SIZE ); - - for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE) - { - //insn = microblaze_fetch_instruction (addr); - insn = insn_block[(addr - func_addr) / INST_WORD_SIZE]; - op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); -- microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn); -+ microblaze_debug ("%s %08lx op=%x r%d r%d imm=%d\n", paddress (gdbarch, addr), insn, op, rd, ra, imm); - - /* This code is very sensitive to what functions are present in the - prologue. It assumes that the (addi, addik, swi, sw) can be the -@@ -428,7 +419,6 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - if (save_hidden_pointer_found) - prologue_end_addr -= INST_WORD_SIZE; - free(insn_block); -- free(buf_block); - return prologue_end_addr; - } - -@@ -502,6 +492,7 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) - - func = get_frame_func (next_frame); - -+ cache->base = get_frame_register_unsigned (next_frame, gdbarch_sp_regnum (gdbarch)); - cache->pc = get_frame_address_in_block (next_frame); - - return cache; -@@ -518,7 +509,7 @@ microblaze_frame_this_id (struct frame_info *next_frame, void **this_cache, - if (cache->base == 0) - return; - -- (*this_id) = frame_id_build (cache->base, cache->pc); -+ (*this_id) = frame_id_build (cache->base, get_frame_pc (next_frame)); - } - - static struct value * -@@ -661,6 +652,107 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) - return (TYPE_LENGTH (type) == 16); - } - -+int -+microblaze_software_single_step (struct frame_info *frame) -+{ -+ struct gdbarch *arch = get_frame_arch (frame); -+ struct address_space *aspace = get_frame_address_space (frame); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (arch); -+ static char le_breakp[] = MICROBLAZE_BREAKPOINT_LE; -+ static char be_breakp[] = MICROBLAZE_BREAKPOINT; -+ enum bfd_endian byte_order = gdbarch_byte_order (arch); -+ char *breakp = byte_order == BFD_ENDIAN_BIG ? be_breakp : le_breakp; -+ int ret = 0; -+ -+ /* Save the address and the values of the next_pc and the target */ -+ static struct sstep_breaks -+ { -+ CORE_ADDR address; -+ bfd_boolean valid; -+ /* Shadow contents. */ -+ char data[INST_WORD_SIZE]; -+ } stepbreaks[2]; -+ int ii; -+ -+ if (1) -+ { -+ CORE_ADDR pc; -+ long insn; -+ enum microblaze_instr minstr; -+ bfd_boolean isunsignednum; -+ enum microblaze_instr_type insn_type; -+ short delay_slots; -+ int imm; -+ bfd_boolean immfound = FALSE; -+ -+ /* Set a breakpoint at the next instruction */ -+ /* If the current instruction is an imm, set it at the inst after */ -+ /* If the instruction has a delay slot, skip the delay slot */ -+ pc = get_frame_pc (frame); -+ insn = microblaze_fetch_instruction (pc); -+ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); -+ if (insn_type == immediate_inst) -+ { -+ int rd, ra, rb; -+ immfound = TRUE; -+ minstr = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); -+ pc = pc + INST_WORD_SIZE; -+ insn = microblaze_fetch_instruction (pc); -+ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); -+ } -+ stepbreaks[0].address = pc + (delay_slots * INST_WORD_SIZE) + INST_WORD_SIZE; -+ if (insn_type != return_inst) { -+ stepbreaks[0].valid = TRUE; -+ } else { -+ stepbreaks[0].valid = FALSE; -+ } -+ -+ microblaze_debug ("single-step insn_type=%x insn=%x\n", insn_type, insn); -+ /* Now check for branch or return instructions */ -+ if (insn_type == branch_inst || insn_type == return_inst) { -+ int limm; -+ int lrd, lra, lrb; -+ int ra, rb; -+ bfd_boolean targetvalid; -+ bfd_boolean unconditionalbranch; -+ microblaze_decode_insn(insn, &lrd, &lra, &lrb, &limm); -+ if (lra >= 0 && lra < MICROBLAZE_NUM_REGS) -+ ra = get_frame_register_unsigned (frame, lra); -+ else -+ ra = 0; -+ if (lrb >= 0 && lrb < MICROBLAZE_NUM_REGS) -+ rb = get_frame_register_unsigned (frame, lrb); -+ else -+ rb = 0; -+ stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); -+ microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); -+ if (unconditionalbranch) -+ stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ -+ if (targetvalid && (stepbreaks[0].valid == FALSE || -+ (stepbreaks[0].address != stepbreaks[1].address)) -+ && (stepbreaks[1].address != pc)) { -+ stepbreaks[1].valid = TRUE; -+ } else { -+ stepbreaks[1].valid = FALSE; -+ } -+ } else { -+ stepbreaks[1].valid = FALSE; -+ } -+ -+ /* Insert the breakpoints */ -+ for (ii = 0; ii < 2; ++ii) -+ { -+ -+ /* ignore invalid breakpoint. */ -+ if (stepbreaks[ii].valid) { -+ insert_single_step_breakpoint (arch, aspace, stepbreaks[ii].address); -+ ret = 1; -+ } -+ } -+ } -+ return ret; -+} -+ - static void - microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) - { -@@ -809,6 +901,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - set_gdbarch_inner_than (gdbarch, core_addr_lessthan); - - set_gdbarch_breakpoint_from_pc (gdbarch, microblaze_breakpoint_from_pc); -+ set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); - - set_gdbarch_frame_args_skip (gdbarch, 8); - --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0006-Patch-microblaze-Add-initial-port-of-linux-gdbserver.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0006-Patch-microblaze-Add-initial-port-of-linux-gdbserver.patch deleted file mode 100644 index cb2eec180..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0006-Patch-microblaze-Add-initial-port-of-linux-gdbserver.patch +++ /dev/null @@ -1,553 +0,0 @@ -From 2112c9ded01ddd08f0e31e5ce23eecac6c04e8c4 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@petalogix.com> -Date: Mon, 6 Feb 2012 10:28:29 +1000 -Subject: [PATCH 06/16] [Patch, microblaze]: Add initial port of linux - gdbserver - -add gdb_proc_service_h to gdbserver microblaze-linux - -gdbserver needs to initialise the microblaze registers - -other archs use this step to run a *_arch_setup() to carry out all -architecture specific setup - may need to add in future - - * add linux-ptrace.o to gdbserver configure - * gdb/configure.tgt: Set build_gdbserver=yes - * Update breakpoint opcode - * fix segfault on connecting gdbserver - * add microblaze_linux_memory_remove_breakpoint - * add set_solib_svr4_fetch_link_map_offsets - * add set_gdbarch_fetch_tls_load_module_address - * Force reading of r0 as 0, prevent stores - -Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> -Signed-off-by: Nathan Rossi <nathan.rossi@petalogix.com> -Upstream-Status: Pending ---- - gdb/configure.host | 3 + - gdb/configure.tgt | 1 + - gdb/gdbserver/Makefile.in | 4 + - gdb/gdbserver/configure.srv | 6 + - gdb/gdbserver/linux-microblaze-low.c | 228 +++++++++++++++++++++++++++++++++++ - gdb/microblaze-linux-tdep.c | 25 +++- - gdb/microblaze-tdep.c | 45 ++++++- - gdb/microblaze-tdep.h | 3 +- - gdb/regformats/reg-microblaze.dat | 39 ++++++ - 9 files changed, 348 insertions(+), 6 deletions(-) - create mode 100644 gdb/gdbserver/linux-microblaze-low.c - create mode 100644 gdb/regformats/reg-microblaze.dat - -diff --git a/gdb/configure.host b/gdb/configure.host -index 15a8288..76cc5fe 100644 ---- a/gdb/configure.host -+++ b/gdb/configure.host -@@ -59,6 +59,7 @@ i[34567]86*) gdb_host_cpu=i386 ;; - m68*) gdb_host_cpu=m68k ;; - m88*) gdb_host_cpu=m88k ;; - mips*) gdb_host_cpu=mips ;; -+microblaze*) gdb_host_cpu=microblaze ;; - powerpc* | rs6000) gdb_host_cpu=powerpc ;; - sparcv9 | sparc64) gdb_host_cpu=sparc ;; - s390*) gdb_host_cpu=s390 ;; -@@ -133,6 +134,8 @@ mips*-*-netbsd* | mips*-*-knetbsd*-gnu) - gdb_host=nbsd ;; - mips64*-*-openbsd*) gdb_host=obsd64 ;; - -+microblaze*-*linux*) gdb_host=linux ;; -+ - powerpc-*-aix* | rs6000-*-* | powerpc64-*-aix*) - gdb_host=aix ;; - powerpc*-*-freebsd*) gdb_host=fbsd ;; -diff --git a/gdb/configure.tgt b/gdb/configure.tgt -index 9297c56..3a7951a 100644 ---- a/gdb/configure.tgt -+++ b/gdb/configure.tgt -@@ -343,6 +343,7 @@ microblaze*-linux-*|microblaze*-*-linux*) - gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o microblaze-rom.o glibc-tdep.o \ - monitor.o dsrec.o solib-svr4.o symfile-mem.o linux-tdep.o" - gdb_sim=../sim/microblaze/libsim.a -+ build_gdbserver=yes - ;; - microblaze*-*-*) - # Target: Xilinx MicroBlaze running standalone -diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in -index f773fa2..a11ace1 100644 ---- a/gdb/gdbserver/Makefile.in -+++ b/gdb/gdbserver/Makefile.in -@@ -148,6 +148,7 @@ SFILES= $(srcdir)/gdbreplay.c $(srcdir)/inferiors.c $(srcdir)/dll.c \ - $(srcdir)/linux-ia64-low.c $(srcdir)/linux-low.c \ - $(srcdir)/linux-m32r-low.c \ - $(srcdir)/linux-m68k-low.c $(srcdir)/linux-mips-low.c \ -+ $(srcdir)/linux-microblaze-low.c \ - $(srcdir)/linux-nios2-low.c \ - $(srcdir)/linux-ppc-low.c \ - $(srcdir)/linux-s390-low.c \ -@@ -329,6 +330,7 @@ clean: - rm -f arm-with-iwmmxt.c - rm -f arm-with-vfpv2.c arm-with-vfpv3.c arm-with-neon.c - rm -f mips-linux.c mips64-linux.c -+ rm -f microblaze-linux.c - rm -f nios2-linux.c - rm -f powerpc-32.c powerpc-32l.c powerpc-64l.c powerpc-e500l.c - rm -f powerpc-altivec32l.c powerpc-cell32l.c powerpc-vsx32l.c -@@ -612,6 +614,8 @@ reg-m68k.c : $(srcdir)/../regformats/reg-m68k.dat $(regdat_sh) - $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-m68k.dat reg-m68k.c - reg-cf.c : $(srcdir)/../regformats/reg-cf.dat $(regdat_sh) - $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-cf.dat reg-cf.c -+microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) -+ $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c - mips-linux.c : $(srcdir)/../regformats/mips-linux.dat $(regdat_sh) - $(SHELL) $(regdat_sh) $(srcdir)/../regformats/mips-linux.dat mips-linux.c - mips-dsp-linux.c : $(srcdir)/../regformats/mips-dsp-linux.dat $(regdat_sh) -diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv -index cc4f53d..359c756 100644 ---- a/gdb/gdbserver/configure.srv -+++ b/gdb/gdbserver/configure.srv -@@ -198,6 +198,12 @@ case "${target}" in - srv_linux_usrregs=yes - srv_linux_thread_db=yes - ;; -+ microblaze*-*-linux*) srv_regobj=microblaze-linux.o -+ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o" -+ srv_linux_usrregs=yes -+ srv_linux_regsets=yes -+ srv_linux_thread_db=yes -+ ;; - nios2*-*-linux*) srv_regobj="nios2-linux.o" - srv_tgtobj="$srv_linux_obj linux-nios2-low.o" - srv_xmlfiles="nios2-linux.xml" -diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c -new file mode 100644 -index 0000000..279df9f ---- /dev/null -+++ b/gdb/gdbserver/linux-microblaze-low.c -@@ -0,0 +1,228 @@ -+/* GNU/Linux/Microblaze specific low level interface, for the remote server for -+ GDB. -+ Copyright (C) 1995-2013 Free Software Foundation, Inc. -+ -+ This file is part of GDB. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program. If not, see <http://www.gnu.org/licenses/>. */ -+ -+#include "server.h" -+#include "linux-low.h" -+ -+#include <asm/ptrace.h> -+#include <sys/procfs.h> -+#include <sys/ptrace.h> -+ -+#include "gdb_proc_service.h" -+ -+static int microblaze_regmap[] = -+ {PT_GPR(0), PT_GPR(1), PT_GPR(2), PT_GPR(3), -+ PT_GPR(4), PT_GPR(5), PT_GPR(6), PT_GPR(7), -+ PT_GPR(8), PT_GPR(9), PT_GPR(10), PT_GPR(11), -+ PT_GPR(12), PT_GPR(13), PT_GPR(14), PT_GPR(15), -+ PT_GPR(16), PT_GPR(17), PT_GPR(18), PT_GPR(19), -+ PT_GPR(20), PT_GPR(21), PT_GPR(22), PT_GPR(23), -+ PT_GPR(24), PT_GPR(25), PT_GPR(26), PT_GPR(27), -+ PT_GPR(28), PT_GPR(29), PT_GPR(30), PT_GPR(31), -+ PT_PC, PT_MSR, PT_EAR, PT_ESR, -+ PT_FSR -+ }; -+ -+#define microblaze_num_regs (sizeof microblaze_regmap / sizeof microblaze_regmap[0]) -+ -+/* Defined in auto-generated file microblaze-linux.c. */ -+void init_registers_microblaze (void); -+extern const struct target_desc *tdesc_microblaze; -+ -+static int -+microblaze_cannot_store_register (int regno) -+{ -+ if (microblaze_regmap[regno] == -1 || regno == 0) -+ return 1; -+ -+ return 0; -+} -+ -+static int -+microblaze_cannot_fetch_register (int regno) -+{ -+ return 0; -+} -+ -+static CORE_ADDR -+microblaze_get_pc (struct regcache *regcache) -+{ -+ unsigned long pc; -+ -+ collect_register_by_name (regcache, "pc", &pc); -+ return (CORE_ADDR) pc; -+} -+ -+static void -+microblaze_set_pc (struct regcache *regcache, CORE_ADDR pc) -+{ -+ unsigned long newpc = pc; -+ -+ supply_register_by_name (regcache, "pc", &newpc); -+} -+ -+/* dbtrap insn */ -+/* brki r16, 0x18; */ -+static const unsigned long microblaze_breakpoint = 0xba0c0018; -+#define microblaze_breakpoint_len 4 -+ -+static int -+microblaze_breakpoint_at (CORE_ADDR where) -+{ -+ unsigned long insn; -+ -+ (*the_target->read_memory) (where, (unsigned char *) &insn, 4); -+ if (insn == microblaze_breakpoint) -+ return 1; -+ /* If necessary, recognize more trap instructions here. GDB only uses the -+ one. */ -+ return 0; -+} -+ -+static CORE_ADDR -+microblaze_reinsert_addr (struct regcache *regcache) -+{ -+ unsigned long pc; -+ collect_register_by_name (regcache, "r15", &pc); -+ return pc; -+} -+ -+#ifdef HAVE_PTRACE_GETREGS -+ -+static void -+microblaze_collect_ptrace_register (struct regcache *regcache, int regno, char *buf) -+{ -+ int size = register_size (regcache->tdesc, regno); -+ -+ memset (buf, 0, sizeof (long)); -+ -+ if (size < sizeof (long)) -+ collect_register (regcache, regno, buf + sizeof (long) - size); -+ else -+ collect_register (regcache, regno, buf); -+} -+ -+static void -+microblaze_supply_ptrace_register (struct regcache *regcache, -+ int regno, const char *buf) -+{ -+ int size = register_size (regcache->tdesc, regno); -+ -+ if (regno == 0) { -+ unsigned long regbuf_0 = 0; -+ /* clobbering r0 so that it is always 0 as enforced by hardware */ -+ supply_register (regcache, regno, (const char*)®buf_0); -+ } else { -+ if (size < sizeof (long)) -+ supply_register (regcache, regno, buf + sizeof (long) - size); -+ else -+ supply_register (regcache, regno, buf); -+ } -+} -+ -+/* Provide only a fill function for the general register set. ps_lgetregs -+ will use this for NPTL support. */ -+ -+static void microblaze_fill_gregset (struct regcache *regcache, void *buf) -+{ -+ int i; -+ -+ for (i = 0; i < 32; i++) -+ microblaze_collect_ptrace_register (regcache, i, (char *) buf + microblaze_regmap[i]); -+} -+ -+static void -+microblaze_store_gregset (struct regcache *regcache, const void *buf) -+{ -+ int i; -+ -+ for (i = 0; i < 32; i++) -+ supply_register (regcache, i, (char *) buf + microblaze_regmap[i]); -+} -+ -+#endif /* HAVE_PTRACE_GETREGS */ -+ -+static struct regset_info microblaze_regsets[] = { -+#ifdef HAVE_PTRACE_GETREGS -+ { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), GENERAL_REGS, microblaze_fill_gregset, microblaze_store_gregset }, -+ { 0, 0, 0, -1, -1, NULL, NULL }, -+#endif /* HAVE_PTRACE_GETREGS */ -+ { 0, 0, 0, -1, -1, NULL, NULL } -+}; -+ -+static struct regsets_info microblaze_regsets_info = -+ { -+ microblaze_regsets, /* regsets */ -+ 0, /* num_regsets */ -+ NULL, /* disabled_regsets */ -+ }; -+ -+static struct usrregs_info microblaze_usrregs_info = -+ { -+ microblaze_num_regs, -+ microblaze_regmap, -+ }; -+ -+static struct regs_info regs_info = -+ { -+ NULL, /* regset_bitmap */ -+ µblaze_usrregs_info, -+ µblaze_regsets_info -+ }; -+ -+static const struct regs_info * -+microblaze_regs_info (void) -+{ -+ return ®s_info; -+} -+ -+static void -+microblaze_arch_setup (void) -+{ -+ current_process ()->tdesc = tdesc_microblaze; -+} -+ -+struct linux_target_ops the_low_target = { -+ microblaze_arch_setup, -+ microblaze_regs_info, -+ microblaze_cannot_fetch_register, -+ microblaze_cannot_store_register, -+ NULL, /* fetch_register */ -+ microblaze_get_pc, -+ microblaze_set_pc, -+ (const unsigned char *) µblaze_breakpoint, -+ microblaze_breakpoint_len, -+ microblaze_reinsert_addr, -+ 0, -+ microblaze_breakpoint_at, -+ NULL, -+ NULL, -+ NULL, -+ NULL, -+ microblaze_collect_ptrace_register, -+ microblaze_supply_ptrace_register, -+}; -+ -+void -+initialize_low_arch (void) -+{ -+ init_registers_microblaze (); -+ -+ initialize_regsets_info (µblaze_regsets_info); -+} -\ No newline at end of file -diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index 7e6b61b..cf58e21 100644 ---- a/gdb/microblaze-linux-tdep.c -+++ b/gdb/microblaze-linux-tdep.c -@@ -38,6 +38,22 @@ - #include "tramp-frame.h" - #include "linux-tdep.h" - -+static int microblaze_debug_flag = 0; -+ -+static void -+microblaze_debug (const char *fmt, ...) -+{ -+ if (microblaze_debug_flag) -+ { -+ va_list args; -+ -+ va_start (args, fmt); -+ printf_unfiltered ("MICROBLAZE LINUX: "); -+ vprintf_unfiltered (fmt, args); -+ va_end (args); -+ } -+} -+ - static int - microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - struct bp_target_info *bp_tgt) -@@ -47,20 +63,27 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - int val; - int bplen; - gdb_byte old_contents[BREAKPOINT_MAX]; -+ struct cleanup *cleanup; - - /* Determine appropriate breakpoint contents and size for this address. */ - bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); - if (bp == NULL) - error (_("Software breakpoints not implemented for this target.")); - -+ /* Make sure we see the memory breakpoints. */ -+ cleanup = make_show_memory_breakpoints_cleanup (1); - val = target_read_memory (addr, old_contents, bplen); - - /* If our breakpoint is no longer at the address, this means that the - program modified the code on us, so it is wrong to put back the - old value. */ - if (val == 0 && memcmp (bp, old_contents, bplen) == 0) -- val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); -+ { -+ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); -+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); -+ } - -+ do_cleanups (cleanup); - return val; - } - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 50b68d2..1c6dbfe 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -164,6 +164,39 @@ microblaze_push_dummy_call (struct gdbarch *gdbarch, struct value *function, - return sp; - } - -+static int -+microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, -+ struct bp_target_info *bp_tgt) -+{ -+ CORE_ADDR addr = bp_tgt->placed_address; -+ const unsigned char *bp; -+ int val; -+ int bplen; -+ gdb_byte old_contents[BREAKPOINT_MAX]; -+ struct cleanup *cleanup; -+ -+ /* Determine appropriate breakpoint contents and size for this address. */ -+ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); -+ if (bp == NULL) -+ error (_("Software breakpoints not implemented for this target.")); -+ -+ /* Make sure we see the memory breakpoints. */ -+ cleanup = make_show_memory_breakpoints_cleanup (1); -+ val = target_read_memory (addr, old_contents, bplen); -+ -+ /* If our breakpoint is no longer at the address, this means that the -+ program modified the code on us, so it is wrong to put back the -+ old value. */ -+ if (val == 0 && memcmp (bp, old_contents, bplen) == 0) -+ { -+ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); -+ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); -+ } -+ -+ do_cleanups (cleanup); -+ return val; -+} -+ - static const gdb_byte * - microblaze_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, - int *len) -@@ -291,8 +324,8 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - - for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE) - { -- //insn = microblaze_fetch_instruction (addr); -- insn = insn_block[(addr - func_addr) / INST_WORD_SIZE]; -+ insn = microblaze_fetch_instruction (addr); -+ //insn = insn_block[(addr - func_addr) / INST_WORD_SIZE]; - op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); - microblaze_debug ("%s %08lx op=%x r%d r%d imm=%d\n", paddress (gdbarch, addr), insn, op, rd, ra, imm); - -@@ -724,13 +757,15 @@ microblaze_software_single_step (struct frame_info *frame) - rb = get_frame_register_unsigned (frame, lrb); - else - rb = 0; -+ - stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); -- microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); -+ microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); -+ - if (unconditionalbranch) - stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ - if (targetvalid && (stepbreaks[0].valid == FALSE || - (stepbreaks[0].address != stepbreaks[1].address)) -- && (stepbreaks[1].address != pc)) { -+ && (stepbreaks[1].address != pc)) { - stepbreaks[1].valid = TRUE; - } else { - stepbreaks[1].valid = FALSE; -@@ -900,6 +935,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - /* Stack grows downward. */ - set_gdbarch_inner_than (gdbarch, core_addr_lessthan); - -+ set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); -+ - set_gdbarch_breakpoint_from_pc (gdbarch, microblaze_breakpoint_from_pc); - set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); - -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index fec24b9..98aa0f5 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -129,7 +129,8 @@ enum microblaze_regnum - - /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. - Only used for native debugging. */ --#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60} -+#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} -+#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} - - extern void microblaze_supply_gregset (const struct microblaze_gregset *gregset, - struct regcache *regcache, -diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat -new file mode 100644 -index 0000000..a5dd0a0 ---- /dev/null -+++ b/gdb/regformats/reg-microblaze.dat -@@ -0,0 +1,39 @@ -+name:microblaze -+expedite:r1,pc -+32:r0 -+32:r1 -+32:r2 -+32:r3 -+32:r4 -+32:r5 -+32:r6 -+32:r7 -+32:r8 -+32:r9 -+32:r10 -+32:r11 -+32:r12 -+32:r13 -+32:r14 -+32:r15 -+32:r16 -+32:r17 -+32:r18 -+32:r19 -+32:r20 -+32:r21 -+32:r22 -+32:r23 -+32:r24 -+32:r25 -+32:r26 -+32:r27 -+32:r28 -+32:r29 -+32:r30 -+32:r31 -+32:pc -+32:msr -+32:ear -+32:esr -+32:fsr --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0007-Patch-microblaze-Add-slr-and-shr-regs-and-little-end.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0007-Patch-microblaze-Add-slr-and-shr-regs-and-little-end.patch deleted file mode 100644 index 7cd119054..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0007-Patch-microblaze-Add-slr-and-shr-regs-and-little-end.patch +++ /dev/null @@ -1,82 +0,0 @@ -From fb2af2fffb673dbb14d743c8da94c4a83b71c792 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Mon, 26 Nov 2012 17:39:17 +1000 -Subject: [PATCH 07/16] [Patch, microblaze]: Add slr and shr regs and - little-endian breakpoint - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - gdb/microblaze-tdep.c | 10 ++++++++-- - gdb/microblaze-tdep.h | 6 ++++-- - gdb/regformats/reg-microblaze.dat | 2 ++ - 3 files changed, 14 insertions(+), 4 deletions(-) - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 1c6dbfe..0ce4947 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -73,7 +73,8 @@ static const char *microblaze_register_names[] = - "rpc", "rmsr", "rear", "resr", "rfsr", "rbtr", - "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", - "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", -- "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi" -+ "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", -+ "rslr", "rshr" - }; - - #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) -@@ -201,10 +202,15 @@ static const gdb_byte * - microblaze_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, - int *len) - { -+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - static gdb_byte break_insn[] = MICROBLAZE_BREAKPOINT; -+ static gdb_byte break_insn_le[] = MICROBLAZE_BREAKPOINT_LE; - - *len = sizeof (break_insn); -- return break_insn; -+ if (byte_order == BFD_ENDIAN_BIG) -+ return break_insn; -+ else -+ return break_insn_le; - } - - /* Allocate and initialize a frame cache. */ -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 98aa0f5..cd32e9f 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -56,7 +56,7 @@ struct microblaze_frame_cache - int fp_regnum; - - /* Offsets to saved registers. */ -- int register_offsets[57]; /* Must match MICROBLAZE_NUM_REGS. */ -+ int register_offsets[59]; /* Must match MICROBLAZE_NUM_REGS. */ - - /* Table of saved registers. */ - struct trad_frame_saved_reg *saved_regs; -@@ -121,7 +121,9 @@ enum microblaze_regnum - MICROBLAZE_RTLBX_REGNUM, - MICROBLAZE_RTLBSX_REGNUM, - MICROBLAZE_RTLBLO_REGNUM, -- MICROBLAZE_RTLBHI_REGNUM -+ MICROBLAZE_RTLBHI_REGNUM, -+ MICROBLAZE_SLR_REGNUM, -+ MICROBLAZE_SHR_REGNUM - }; - - /* All registers are 32 bits. */ -diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat -index a5dd0a0..bd8a438 100644 ---- a/gdb/regformats/reg-microblaze.dat -+++ b/gdb/regformats/reg-microblaze.dat -@@ -37,3 +37,5 @@ expedite:r1,pc - 32:ear - 32:esr - 32:fsr -+32:slr -+32:shr --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0008-Patch-microblaze-Added-Backtrace-support-to-GDB.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0008-Patch-microblaze-Added-Backtrace-support-to-GDB.patch deleted file mode 100644 index 7f075d55e..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0008-Patch-microblaze-Added-Backtrace-support-to-GDB.patch +++ /dev/null @@ -1,156 +0,0 @@ -From 7944750e435100e72913f01aa0a43b7d7cffd421 Mon Sep 17 00:00:00 2001 -From: nagaraju <nmekala@xilix.com> -Date: Tue, 3 Sep 2013 12:09:47 +0530 -Subject: [PATCH 08/16] [Patch, microblaze]: Added Backtrace support to GDB - -Added backtrace support without debugging information. - -Earlier backtrace used to work only when debug information is available. -Previous pc & sp values are calculated incorrectly due to which backtrace -was failing. - -In this patch, previous frame sp & pc values are calculated correctly -in microblaze_frame_cache function and supplied them to -microblaze_frame_prev_register function - -Signed-off-by:nagaraju <nmekala@xilix.com> -Upstream-Status: Pending ---- - gdb/microblaze-tdep.c | 42 ++++++++++++++++++++++++++++++++++-------- - gdb/microblaze-tdep.h | 5 +++-- - 2 files changed, 37 insertions(+), 10 deletions(-) - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 0ce4947..247740e 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -225,6 +225,7 @@ microblaze_alloc_frame_cache (void) - /* Base address. */ - cache->base = 0; - cache->pc = 0; -+ cache->saved_sp = 0; - - /* Frameless until proven otherwise. */ - cache->frameless_p = 1; -@@ -347,6 +348,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, - cache->frameless_p = 0; /* Frame found. */ - save_hidden_pointer_found = 0; - non_stack_instruction_found = 0; -+ cache->register_offsets[rd] = -imm; - continue; - } - else if (IS_SPILL_SP(op, rd, ra)) -@@ -508,6 +510,7 @@ microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) - return start_pc; - } - -+enum { REG_UNAVAIL = (CORE_ADDR) -1 }; - /* Normal frames. */ - - static struct microblaze_frame_cache * -@@ -515,7 +518,7 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) - { - struct microblaze_frame_cache *cache; - struct gdbarch *gdbarch = get_frame_arch (next_frame); -- CORE_ADDR func; -+ CORE_ADDR current_pc; - int rn; - - if (*this_cache) -@@ -529,10 +532,18 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) - for (rn = 0; rn < gdbarch_num_regs (gdbarch); rn++) - cache->register_offsets[rn] = -1; - -- func = get_frame_func (next_frame); -+ cache->pc = get_frame_func (next_frame); -+ current_pc = get_frame_pc (next_frame); -+ -+ if (cache->pc) -+ microblaze_analyze_prologue (gdbarch, cache->pc, current_pc, -+ cache); - - cache->base = get_frame_register_unsigned (next_frame, gdbarch_sp_regnum (gdbarch)); -- cache->pc = get_frame_address_in_block (next_frame); -+ cache->saved_sp = cache->base + cache->framesize; -+ -+ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM] = cache->base; -+ cache->register_offsets[MICROBLAZE_SP_REGNUM] = cache->saved_sp; - - return cache; - } -@@ -548,7 +559,7 @@ microblaze_frame_this_id (struct frame_info *next_frame, void **this_cache, - if (cache->base == 0) - return; - -- (*this_id) = frame_id_build (cache->base, get_frame_pc (next_frame)); -+ (*this_id) = frame_id_build (cache->base, cache->pc); - } - - static struct value * -@@ -558,6 +569,14 @@ microblaze_frame_prev_register (struct frame_info *this_frame, - struct microblaze_frame_cache *cache = - microblaze_frame_cache (this_frame, this_cache); - -+ if ((regnum == MICROBLAZE_SP_REGNUM && -+ cache->register_offsets[MICROBLAZE_SP_REGNUM]) -+ || (regnum == MICROBLAZE_FP_REGNUM && -+ cache->register_offsets[MICROBLAZE_SP_REGNUM])) -+ -+ return frame_unwind_got_constant (this_frame, regnum, -+ cache->register_offsets[MICROBLAZE_SP_REGNUM]); -+ - if (cache->frameless_p) - { - if (regnum == MICROBLAZE_PC_REGNUM) -@@ -565,11 +584,18 @@ microblaze_frame_prev_register (struct frame_info *this_frame, - if (regnum == MICROBLAZE_SP_REGNUM) - regnum = 1; - return trad_frame_get_prev_register (this_frame, -- cache->saved_regs, regnum); -+ cache->saved_regs, regnum); - } -- else -- return trad_frame_get_prev_register (this_frame, cache->saved_regs, -- regnum); -+ -+ if (regnum == MICROBLAZE_PC_REGNUM) -+ { -+ regnum = 15; -+ return frame_unwind_got_memory (this_frame, regnum, -+ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM]); -+ } -+ -+ return trad_frame_get_prev_register (this_frame, cache->saved_regs, -+ regnum); - - } - -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index cd32e9f..14eb3ab 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -57,6 +57,7 @@ struct microblaze_frame_cache - - /* Offsets to saved registers. */ - int register_offsets[59]; /* Must match MICROBLAZE_NUM_REGS. */ -+ CORE_ADDR saved_sp; - - /* Table of saved registers. */ - struct trad_frame_saved_reg *saved_regs; -@@ -80,11 +81,11 @@ enum microblaze_regnum - MICROBLAZE_R12_REGNUM, - MICROBLAZE_R13_REGNUM, - MICROBLAZE_R14_REGNUM, -- MICROBLAZE_R15_REGNUM, -+ MICROBLAZE_R15_REGNUM, MICROBLAZE_PREV_PC_REGNUM = MICROBLAZE_R15_REGNUM, - MICROBLAZE_R16_REGNUM, - MICROBLAZE_R17_REGNUM, - MICROBLAZE_R18_REGNUM, -- MICROBLAZE_R19_REGNUM, -+ MICROBLAZE_R19_REGNUM, MICROBLAZE_FP_REGNUM = MICROBLAZE_R19_REGNUM, - MICROBLAZE_R20_REGNUM, - MICROBLAZE_R21_REGNUM, - MICROBLAZE_R22_REGNUM, --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0009-Patch-microblaze-Initial-support-for-native-gdb.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0009-Patch-microblaze-Initial-support-for-native-gdb.patch deleted file mode 100644 index 1ad6b89ca..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0009-Patch-microblaze-Initial-support-for-native-gdb.patch +++ /dev/null @@ -1,495 +0,0 @@ -From c7b918283f2e438deef78aae84f6b748a7a1bb54 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@petalogix.com> -Date: Fri, 20 Jul 2012 15:18:35 +1000 -Subject: [PATCH 09/16] [Patch, microblaze]: Initial support for native gdb - -microblaze: Follow PPC method of getting setting registers -using PTRACE PEEK/POKE - -Signed-off-by: David Holsgrove <david.holsgrove@petalogix.com> -Upstream-Status: Pending ---- - gdb/Makefile.in | 4 +- - gdb/config/microblaze/linux.mh | 10 + - gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 443 insertions(+), 2 deletions(-) - create mode 100644 gdb/config/microblaze/linux.mh - create mode 100644 gdb/microblaze-linux-nat.c - -diff --git a/gdb/Makefile.in b/gdb/Makefile.in -index f2c16ec..12870a4 100644 ---- a/gdb/Makefile.in -+++ b/gdb/Makefile.in -@@ -904,7 +904,7 @@ top.h bsd-kvm.h gdb-stabs.h reggroups.h \ - annotate.h sim-regno.h dictionary.h dfp.h main.h frame-unwind.h \ - remote-fileio.h i386-linux-tdep.h vax-tdep.h objc-lang.h \ - sentinel-frame.h bcache.h symfile.h windows-tdep.h linux-tdep.h \ --gdb_usleep.h jit.h xml-syscall.h microblaze-tdep.h \ -+gdb_usleep.h jit.h xml-syscall.h microblaze-tdep.h microblaze-linux-tdep.h \ - psymtab.h psympriv.h progspace.h bfin-tdep.h ia64-hpux-tdep.h \ - amd64-darwin-tdep.h charset-list.h \ - config/djgpp/langinfo.h config/djgpp/nl_types.h darwin-nat.h \ -@@ -1631,7 +1631,7 @@ ALLDEPFILES = \ - m68kbsd-nat.c m68kbsd-tdep.c \ - m68klinux-nat.c m68klinux-tdep.c \ - m88k-tdep.c m88kbsd-nat.c \ -- microblaze-tdep.c microblaze-linux-tdep.c \ -+ microblaze-tdep.c microblaze-linux-nat.c microblaze-linux-tdep.c \ - mingw-hdep.c \ - mips-linux-nat.c mips-linux-tdep.c \ - mips-irix-tdep.c \ -diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh -new file mode 100644 -index 0000000..547d103 ---- /dev/null -+++ b/gdb/config/microblaze/linux.mh -@@ -0,0 +1,10 @@ -+# Host: Microblaze, running Linux -+ -+NAT_FILE= config/nm-linux.h -+NATDEPFILES= inf-ptrace.o fork-child.o \ -+ microblaze-linux-nat.o proc-service.o linux-thread-db.o \ -+ linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o \ -+ linux-waitpid.o -+NAT_CDEPS = $(srcdir)/proc-service.list -+ -+LOADLIBES = -ldl $(RDYNAMIC) -diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c -new file mode 100644 -index 0000000..81f8346 ---- /dev/null -+++ b/gdb/microblaze-linux-nat.c -@@ -0,0 +1,431 @@ -+/* Microblaze GNU/Linux native support. -+ -+ Copyright (C) 1988-1989, 1991-1992, 1994, 1996, 2000-2012 Free -+ Software Foundation, Inc. -+ -+ This file is part of GDB. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program. If not, see <http://www.gnu.org/licenses/>. */ -+ -+#include "defs.h" -+#include "arch-utils.h" -+#include "dis-asm.h" -+#include "frame.h" -+#include "trad-frame.h" -+#include "symtab.h" -+#include "value.h" -+#include "gdbcmd.h" -+#include "breakpoint.h" -+#include "inferior.h" -+#include "regcache.h" -+#include "target.h" -+#include "frame.h" -+#include "frame-base.h" -+#include "frame-unwind.h" -+#include "dwarf2-frame.h" -+#include "osabi.h" -+ -+#include "gdb_assert.h" -+#include <string.h> -+#include "target-descriptions.h" -+#include "opcodes/microblaze-opcm.h" -+#include "opcodes/microblaze-dis.h" -+ -+#include "linux-nat.h" -+#include "target-descriptions.h" -+ -+#include <sys/user.h> -+#include <sys/utsname.h> -+#include <sys/procfs.h> -+#include <sys/ptrace.h> -+ -+/* Prototypes for supply_gregset etc. */ -+#include "gregset.h" -+ -+#include "microblaze-tdep.h" -+ -+#include <elf/common.h> -+#include "auxv.h" -+ -+/* Defines ps_err_e, struct ps_prochandle. */ -+#include "gdb_proc_service.h" -+ -+/* On GNU/Linux, threads are implemented as pseudo-processes, in which -+ case we may be tracing more than one process at a time. In that -+ case, inferior_ptid will contain the main process ID and the -+ individual thread (process) ID. get_thread_id () is used to get -+ the thread id if it's available, and the process id otherwise. */ -+ -+int -+get_thread_id (ptid_t ptid) -+{ -+ int tid = ptid_get_lwp (ptid); -+ if (0 == tid) -+ tid = ptid_get_pid (ptid); -+ return tid; -+} -+ -+#define GET_THREAD_ID(PTID) get_thread_id (PTID) -+ -+/* Non-zero if our kernel may support the PTRACE_GETREGS and -+ PTRACE_SETREGS requests, for reading and writing the -+ general-purpose registers. Zero if we've tried one of -+ them and gotten an error. */ -+int have_ptrace_getsetregs = 1; -+ -+static int -+microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) -+{ -+ int u_addr = -1; -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace -+ interface, and not the wordsize of the program's ABI. */ -+ int wordsize = sizeof (long); -+ -+ /* General purpose registers occupy 1 slot each in the buffer. */ -+ if (regno >= MICROBLAZE_R0_REGNUM -+ && regno <= MICROBLAZE_FSR_REGNUM) -+ u_addr = (regno * wordsize); -+ -+ return u_addr; -+} -+ -+ -+static void -+fetch_register (struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int bytes_transferred; -+ unsigned int offset; /* Offset of registers within the u area. */ -+ char buf[MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ { -+ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ -+ regcache_raw_supply (regcache, regno, buf); -+ return; -+ } -+ -+ /* Read the raw register using sizeof(long) sized chunks. On a -+ 32-bit platform, 64-bit floating-point registers will require two -+ transfers. */ -+ for (bytes_transferred = 0; -+ bytes_transferred < register_size (gdbarch, regno); -+ bytes_transferred += sizeof (long)) -+ { -+ long l; -+ -+ errno = 0; -+ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); -+ regaddr += sizeof (long); -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "reading register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ memcpy (&buf[bytes_transferred], &l, sizeof (l)); -+ } -+ -+ /* Now supply the register. Keep in mind that the regcache's idea -+ of the register's size may not be a multiple of sizeof -+ (long). */ -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values are always found at the left end of the -+ bytes transferred. */ -+ regcache_raw_supply (regcache, regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values are found at the right end of the bytes -+ transferred. */ -+ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); -+ regcache_raw_supply (regcache, regno, buf + padding); -+ } -+ else -+ internal_error (__FILE__, __LINE__, -+ _("fetch_register: unexpected byte order: %d"), -+ gdbarch_byte_order (gdbarch)); -+} -+ -+/* This function actually issues the request to ptrace, telling -+ it to get all general-purpose registers and put them into the -+ specified regset. -+ -+ If the ptrace request does not exist, this function returns 0 -+ and properly sets the have_ptrace_* flag. If the request fails, -+ this function calls perror_with_name. Otherwise, if the request -+ succeeds, then the regcache gets filled and 1 is returned. */ -+static int -+fetch_all_gp_regs (struct regcache *regcache, int tid) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ gdb_gregset_t gregset; -+ -+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't get general-purpose registers.")); -+ } -+ -+ supply_gregset (regcache, (const gdb_gregset_t *) &gregset); -+ -+ return 1; -+} -+ -+ -+/* This is a wrapper for the fetch_all_gp_regs function. It is -+ responsible for verifying if this target has the ptrace request -+ that can be used to fetch all general-purpose registers at one -+ shot. If it doesn't, then we should fetch them using the -+ old-fashioned way, which is to iterate over the registers and -+ request them one by one. */ -+static void -+fetch_gp_regs (struct regcache *regcache, int tid) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ int i; -+ -+ if (have_ptrace_getsetregs) -+ if (fetch_all_gp_regs (regcache, tid)) -+ return; -+ -+ /* If we've hit this point, it doesn't really matter which -+ architecture we are using. We just need to read the -+ registers in the "old-fashioned way". */ -+ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) -+ fetch_register (regcache, tid, i); -+} -+ -+ -+static void -+store_register (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int i; -+ size_t bytes_to_transfer; -+ char buf[MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ return; -+ -+ /* First collect the register. Keep in mind that the regcache's -+ idea of the register's size may not be a multiple of sizeof -+ (long). */ -+ memset (buf, 0, sizeof buf); -+ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values always sit at the left end of the buffer. */ -+ regcache_raw_collect (regcache, regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values sit at the right end of the buffer. */ -+ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); -+ regcache_raw_collect (regcache, regno, buf + padding); -+ } -+ -+ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) -+ { -+ long l; -+ -+ memcpy (&l, &buf[i], sizeof (l)); -+ errno = 0; -+ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); -+ regaddr += sizeof (long); -+ -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "writing register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ } -+} -+ -+/* This function actually issues the request to ptrace, telling -+ it to store all general-purpose registers present in the specified -+ regset. -+ -+ If the ptrace request does not exist, this function returns 0 -+ and properly sets the have_ptrace_* flag. If the request fails, -+ this function calls perror_with_name. Otherwise, if the request -+ succeeds, then the regcache is stored and 1 is returned. */ -+static int -+store_all_gp_regs (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ gdb_gregset_t gregset; -+ -+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't get general-purpose registers.")); -+ } -+ -+ fill_gregset (regcache, &gregset, regno); -+ -+ if (ptrace (PTRACE_SETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't set general-purpose registers.")); -+ } -+ -+ return 1; -+} -+ -+/* This is a wrapper for the store_all_gp_regs function. It is -+ responsible for verifying if this target has the ptrace request -+ that can be used to store all general-purpose registers at one -+ shot. If it doesn't, then we should store them using the -+ old-fashioned way, which is to iterate over the registers and -+ store them one by one. */ -+static void -+store_gp_regs (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ int i; -+ -+ if (have_ptrace_getsetregs) -+ if (store_all_gp_regs (regcache, tid, regno)) -+ return; -+ -+ /* If we hit this point, it doesn't really matter which -+ architecture we are using. We just need to store the -+ registers in the "old-fashioned way". */ -+ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) -+ store_register (regcache, tid, i); -+} -+ -+ -+/* Fetch registers from the child process. Fetch all registers if -+ regno == -1, otherwise fetch all general registers or all floating -+ point registers depending upon the value of regno. */ -+ -+static void -+microblaze_linux_fetch_inferior_registers (struct target_ops *ops, -+ struct regcache *regcache, int regno) -+{ -+ /* Get the thread id for the ptrace call. */ -+ int tid = GET_THREAD_ID (inferior_ptid); -+ -+ if (regno == -1) -+ fetch_gp_regs (regcache, tid); -+ else -+ fetch_register (regcache, tid, regno); -+} -+ -+/* Store registers back into the inferior. Store all registers if -+ regno == -1, otherwise store all general registers or all floating -+ point registers depending upon the value of regno. */ -+ -+static void -+microblaze_linux_store_inferior_registers (struct target_ops *ops, -+ struct regcache *regcache, int regno) -+{ -+ /* Get the thread id for the ptrace call. */ -+ int tid = GET_THREAD_ID (inferior_ptid); -+ -+ if (regno >= 0) -+ store_register (regcache, tid, regno); -+ else -+ store_gp_regs (regcache, tid, -1); -+} -+ -+/* Wrapper functions for the standard regset handling, used by -+ thread debugging. */ -+ -+void -+fill_gregset (const struct regcache *regcache, -+ gdb_gregset_t *gregsetp, int regno) -+{ -+ microblaze_collect_gregset (NULL, regcache, regno, gregsetp); -+} -+ -+void -+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) -+{ -+ microblaze_supply_gregset (NULL, regcache, -1, gregsetp); -+} -+ -+void -+fill_fpregset (const struct regcache *regcache, -+ gdb_fpregset_t *fpregsetp, int regno) -+{ -+ /* FIXME. */ -+} -+ -+void -+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) -+{ -+ /* FIXME. */ -+} -+ -+static const struct target_desc * -+microblaze_linux_read_description (struct target_ops *ops) -+{ -+ CORE_ADDR microblaze_hwcap = 0; -+ -+ if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1) -+ return NULL; -+ -+ return NULL; -+} -+ -+ -+void _initialize_microblaze_linux_nat (void); -+ -+void -+_initialize_microblaze_linux_nat (void) -+{ -+ struct target_ops *t; -+ -+ /* Fill in the generic GNU/Linux methods. */ -+ t = linux_target (); -+ -+ /* Add our register access methods. */ -+ t->to_fetch_registers = microblaze_linux_fetch_inferior_registers; -+ t->to_store_registers = microblaze_linux_store_inferior_registers; -+ -+ t->to_read_description = microblaze_linux_read_description; -+ -+ /* Register the target. */ -+ linux_nat_add_target (t); -+} --- -1.9.0 diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0010-Patch-gdb-Robustify-inline-function-support.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0010-Patch-gdb-Robustify-inline-function-support.patch deleted file mode 100644 index 3912ca575..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0010-Patch-gdb-Robustify-inline-function-support.patch +++ /dev/null @@ -1,43 +0,0 @@ -From a02963a97d7ce38b0af205f9e3e6dd7e0e06d9be Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar@axis.com> -Date: Mon, 27 Feb 2012 06:28:00 +0100 -Subject: [PATCH 10/16] [Patch, gdb]: Robustify inline function support - -Signed-off-by: Edgar E. Iglesias <edgar@axis.com> -Upstream-Status: Pending ---- - gdb/blockframe.c | 3 ++- - gdb/inline-frame.c | 3 +++ - 2 files changed, 5 insertions(+), 1 deletion(-) - -diff --git a/gdb/blockframe.c b/gdb/blockframe.c -index 0a9381e..ba41d85 100644 ---- a/gdb/blockframe.c -+++ b/gdb/blockframe.c -@@ -77,7 +77,8 @@ get_frame_block (struct frame_info *frame, CORE_ADDR *addr_in_block) - inline_count--; - - bl = BLOCK_SUPERBLOCK (bl); -- gdb_assert (bl != NULL); -+ if (!bl) -+ return NULL; - } - - return bl; -diff --git a/gdb/inline-frame.c b/gdb/inline-frame.c -index eb82143..a793390 100644 ---- a/gdb/inline-frame.c -+++ b/gdb/inline-frame.c -@@ -231,6 +231,9 @@ inline_frame_sniffer (const struct frame_unwind *self, - cur_block = BLOCK_SUPERBLOCK (cur_block); - } - -+ if (depth == 0) -+ return 0; -+ - /* Check how many inlined functions already have frames. */ - for (next_frame = get_next_frame (this_frame); - next_frame && get_frame_type (next_frame) == INLINE_FRAME; --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0011-Patch-gdb-Fix-debug-message-when-register-is-unavail.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0011-Patch-gdb-Fix-debug-message-when-register-is-unavail.patch deleted file mode 100644 index bdec77c51..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0011-Patch-gdb-Fix-debug-message-when-register-is-unavail.patch +++ /dev/null @@ -1,43 +0,0 @@ -From a05fb34192727fc1b63c827ed006ddde846ce6b8 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi <nathan.rossi@petalogix.com> -Date: Tue, 8 May 2012 18:11:17 +1000 -Subject: [PATCH 11/16] [Patch, gdb]: Fix debug message when register is - unavailable - -Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - gdb/frame.c | 13 ++++++++++--- - 1 file changed, 10 insertions(+), 3 deletions(-) - -diff --git a/gdb/frame.c b/gdb/frame.c -index 013d602..4d0766f 100644 ---- a/gdb/frame.c -+++ b/gdb/frame.c -@@ -1134,12 +1134,19 @@ frame_unwind_register_value (struct frame_info *frame, int regnum) - else - { - int i; -- const gdb_byte *buf = value_contents (value); -+ const gdb_byte *buf = NULL; -+ if (value_entirely_available(value)) { -+ buf = value_contents (value); -+ } - - fprintf_unfiltered (gdb_stdlog, " bytes="); - fprintf_unfiltered (gdb_stdlog, "["); -- for (i = 0; i < register_size (gdbarch, regnum); i++) -- fprintf_unfiltered (gdb_stdlog, "%02x", buf[i]); -+ if (buf != NULL) { -+ for (i = 0; i < register_size (gdbarch, regnum); i++) -+ fprintf_unfiltered (gdb_stdlog, "%02x", buf[i]); -+ } else { -+ fprintf_unfiltered (gdb_stdlog, "unavailable"); -+ } - fprintf_unfiltered (gdb_stdlog, "]"); - } - } --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0012-LOCAL-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0012-LOCAL-Disable-the-warning-message-for-eh_frame_hdr.patch deleted file mode 100644 index 819cd1799..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0012-LOCAL-Disable-the-warning-message-for-eh_frame_hdr.patch +++ /dev/null @@ -1,34 +0,0 @@ -From f54d5334afe799e15ca21c5d83097a4c81bbab7e Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> -Date: Fri, 22 Jun 2012 01:20:20 +0200 -Subject: [PATCH 12/16] [LOCAL]: Disable the warning message for eh_frame_hdr - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Upstream-Status: Pending ---- - bfd/elf-eh-frame.c | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - -diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c -index 0f0a563..7d8e047 100644 ---- a/bfd/elf-eh-frame.c -+++ b/bfd/elf-eh-frame.c -@@ -919,9 +919,12 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, - goto success; - - free_no_table: -- (*info->callbacks->einfo) -- (_("%P: error in %B(%A); no .eh_frame_hdr table will be created.\n"), -- abfd, sec); -+ /* FIXME: Remove the microblaze specifics when relaxing gets fixed. */ -+ if (bfd_get_arch(abfd) != bfd_arch_microblaze) { -+ (*info->callbacks->einfo) -+ (_("%P: error in %B(%A); no .eh_frame_hdr table will be created.\n"), -+ abfd, sec); -+ } - hdr_info->table = FALSE; - if (sec_info) - free (sec_info); --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0013-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0013-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch deleted file mode 100644 index 3a0eae833..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0013-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch +++ /dev/null @@ -1,64 +0,0 @@ -From c9f1f07e5b0756069e3d4b04eb9505027f09677f Mon Sep 17 00:00:00 2001 -From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> -Date: Tue, 14 Feb 2012 01:00:22 +0100 -Subject: [PATCH 13/16] [LOCAL]: Fix relaxation of assembler resolved - references - -Upstream-Status: Pending ---- - bfd/elf32-microblaze.c | 39 +++++++++++++++++++++++++++++++++++++++ - 1 file changed, 39 insertions(+) - -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index cbd18f0..f90df47 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -1968,6 +1968,45 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) -+ { -+ unsigned int val; -+ -+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -+ -+ /* This was a PC-relative instruction that was completely resolved. */ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend -+ + isym->st_value, sec); -+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, -+ irelscan->r_addend); -+ } -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { -+ fprintf(stderr, "Unhandled NONE 64\n"); -+ } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0014-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0014-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch deleted file mode 100644 index 85cee9d5d..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0014-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch +++ /dev/null @@ -1,192 +0,0 @@ -From aca2758cff1f8fdc5ad7b6076ef985ba9ec5f857 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Mon, 4 Feb 2013 12:15:22 +1000 -Subject: [PATCH 14/16] [LOCAL]: Fixup debug_loc sections after linker - relaxation - -Adds a new reloctype R_MICROBLAZE_32_NONE, used for passing -reloc info from the assembler to the linker when the linker -manages to fully resolve a local symbol reference. - -This is a workaround for design flaws in the assembler to -linker interface with regards to linker relaxation. - -Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - bfd/bfd-in2.h | 5 +++++ - bfd/elf32-microblaze.c | 45 +++++++++++++++++++++++++++++++++++++-------- - bfd/libbfd.h | 1 + - bfd/reloc.c | 6 ++++++ - include/elf/microblaze.h | 1 + - 5 files changed, 50 insertions(+), 8 deletions(-) - -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index 8b7f2ee..de38907 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -5449,6 +5449,11 @@ value relative to the read-write small data area anchor */ - expressions of the form "Symbol Op Symbol" */ - BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, - -+/* This is a 32 bit reloc that stores the 32 bit pc relative -+value in two words (with an imm instruction). No relocation is -+done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_32_NONE, -+ - /* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). No relocation is - done here - only used for relaxing */ -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index f90df47..a3f89b9 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -177,6 +177,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - FALSE), /* PC relative offset? */ - - /* This reloc does nothing. Used for relaxation. */ -+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ TRUE, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_32_NONE",/* Name. */ -+ FALSE, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ FALSE), /* PC relative offset? */ -+ - HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ - 0, /* Rightshift. */ - 2, /* Size (0 = byte, 1 = short, 2 = long). */ -@@ -532,7 +546,10 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_NONE: - microblaze_reloc = R_MICROBLAZE_NONE; - break; -- case BFD_RELOC_MICROBLAZE_64_NONE: -+ case BFD_RELOC_MICROBLAZE_32_NONE: -+ microblaze_reloc = R_MICROBLAZE_32_NONE; -+ break; -+ case BFD_RELOC_MICROBLAZE_64_NONE: - microblaze_reloc = R_MICROBLAZE_64_NONE; - break; - case BFD_RELOC_32: -@@ -1913,14 +1930,22 @@ microblaze_elf_relax_section (bfd *abfd, - } - break; - case R_MICROBLAZE_NONE: -+ case R_MICROBLAZE_32_NONE: - { - /* This was a PC-relative instruction that was - completely resolved. */ - int sfix, efix; -+ unsigned int val; - bfd_vma target_address; - target_address = irel->r_addend + irel->r_offset; - sfix = calc_fixup (irel->r_offset, 0, sec); - efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } - irel->r_addend -= (efix - sfix); - /* Should use HOWTO. */ - microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, -@@ -1968,12 +1993,16 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_NONE) -+ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) - { - unsigned int val; - - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); - -+ /* hax: We only do the following fixup for debug location lists. */ -+ if (strcmp(".debug_loc", o->name)) -+ continue; -+ - /* This was a PC-relative instruction that was completely resolved. */ - if (ocontents == NULL) - { -@@ -1998,15 +2027,15 @@ microblaze_elf_relax_section (bfd *abfd, - } - } - -- irelscan->r_addend -= calc_fixup (irelscan->r_addend -- + isym->st_value, sec); - val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ if (val != irelscan->r_addend) { -+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); -+ } -+ -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); - microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, - irelscan->r_addend); - } -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_NONE) { -- fprintf(stderr, "Unhandled NONE 64\n"); -- } - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) - { - isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -@@ -2066,7 +2095,7 @@ microblaze_elf_relax_section (bfd *abfd, - elf_section_data (o)->this_hdr.contents = ocontents; - } - } -- irelscan->r_addend -= calc_fixup (irel->r_addend -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend - + isym->st_value, - 0, - sec); -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 09f307f..840c662 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2644,6 +2644,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_32_ROSDA", - "BFD_RELOC_MICROBLAZE_32_RWSDA", - "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", -+ "BFD_RELOC_MICROBLAZE_32_NONE", - "BFD_RELOC_MICROBLAZE_64_NONE", - "BFD_RELOC_MICROBLAZE_64_GOTPC", - "BFD_RELOC_MICROBLAZE_64_GOT", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index 7f46c58..5bcd52d 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6396,6 +6396,12 @@ ENUMDOC - This is a 32 bit reloc for the microblaze to handle - expressions of the form "Symbol Op Symbol" - ENUM -+ BFD_RELOC_MICROBLAZE_32_NONE -+ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imm instruction). No relocation is -+ done here - only used for relaxing -+ENUM - BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC - This is a 64 bit reloc that stores the 32 bit pc relative -diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index effca20..f8420dc 100644 ---- a/include/elf/microblaze.h -+++ b/include/elf/microblaze.h -@@ -58,6 +58,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) - RELOC_NUMBER (R_MICROBLAZE_TLSDTPREL64, 27) /* TLS Offset Within TLS Block */ - RELOC_NUMBER (R_MICROBLAZE_TLSGOTTPREL32, 28) /* TLS Offset From Thread Pointer */ - RELOC_NUMBER (R_MICROBLAZE_TLSTPREL32, 29) /* TLS Offset From Thread Pointer */ -+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 30) - - END_RELOC_NUMBERS (R_MICROBLAZE_max) - --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0015-LOCAL-upstream-change-to-garbage-collection-sweep-ca.patch b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0015-LOCAL-upstream-change-to-garbage-collection-sweep-ca.patch deleted file mode 100644 index 0bb66a940..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/files/0015-LOCAL-upstream-change-to-garbage-collection-sweep-ca.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 22c63d4d79ac488403340470c14c73bad4984fa3 Mon Sep 17 00:00:00 2001 -From: David Holsgrove <david.holsgrove@xilinx.com> -Date: Wed, 27 Feb 2013 13:56:11 +1000 -Subject: [PATCH 15/16] [LOCAL]: upstream change to garbage collection sweep - causes mb regression - -Upstream change for PR13177 now clears the def_regular during gc_sweep of a -section. (All other archs in binutils/bfd/elf32-*.c received an update -to a warning about unresolvable relocations - this warning is not present -in binutils/bfd/elf32-microblaze.c, but this warning check would not -prevent the error being seen) - -The visible issue with this change is when running a c++ application -in Petalinux which links libstdc++.so for exception handling it segfaults -on execution. - -This does not occur if static linking libstdc++.a, so its during the -relocations for a shared lib with garbage collection this occurs - -Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> -Upstream-Status: Pending ---- - bfd/elflink.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/bfd/elflink.c b/bfd/elflink.c -index 6756fb1..f21dc06 100644 ---- a/bfd/elflink.c -+++ b/bfd/elflink.c -@@ -11932,7 +11932,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) - - inf = (struct elf_gc_sweep_symbol_info *) data; - (*inf->hide_symbol) (inf->info, h, TRUE); -- h->def_regular = 0; - h->ref_regular = 0; - h->ref_regular_nonweak = 0; - } --- -1.9.0 - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-7.7.1.inc b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-7.7.1.inc deleted file mode 100644 index 396f0fc1b..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-7.7.1.inc +++ /dev/null @@ -1,12 +0,0 @@ -LICENSE = "GPLv2 & GPLv3 & LGPLv2 & LGPLv3" -LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \ - file://COPYING3;md5=d32239bcb673463ab874e80d47fae504 \ - file://COPYING3.LIB;md5=6a6a8e020838b23406c81b19c1d46df6 \ - file://COPYING.LIB;md5=9f604d8a4f8e74f4f5140845a21b6674" - -S = "${WORKDIR}/${BPN}-${PV}" - -SRC_URI = "${GNU_MIRROR}/gdb/gdb-${PV}.tar.gz" -SRC_URI[md5sum] = "45b07b53d81832d32ccd4829465d4886" -SRC_URI[sha256sum] = "eefadb9831e3695d1eaef34e98b8f1fb441df6fe5071317ea49c6bd6ba213eff" - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross-canadian_7.7.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross-canadian_7.7.1.bb deleted file mode 100644 index c349ebbb7..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross-canadian_7.7.1.bb +++ /dev/null @@ -1,4 +0,0 @@ -require recipes-devtools/gdb/gdb-common.inc -require recipes-devtools/gdb/gdb-cross-canadian.inc -require gdb-${PV}.inc -require gdb-microblaze-7.7.inc diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross_7.7.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross_7.7.1.bb deleted file mode 100644 index 98b3359c3..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-cross_7.7.1.bb +++ /dev/null @@ -1,3 +0,0 @@ -require recipes-devtools/gdb/gdb-cross.inc -require gdb-${PV}.inc -require gdb-microblaze-7.7.inc diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-microblaze-7.7.inc b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-microblaze-7.7.inc deleted file mode 100644 index d1aba8220..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb-microblaze-7.7.inc +++ /dev/null @@ -1,22 +0,0 @@ - -# MicroBlaze does not support LTTng UST -LTTNGUST_microblaze = "" - -# Add MicroBlaze Patches -FILESEXTRAPATHS_append := "${THISDIR}/files:" -SRC_URI_append = " \ - file://0001-Patch-microblaze-Add-wdc.ext.clear-and-wdc.ext.flush.patch \ - file://0003-Patch-microblaze-Initial-port-of-microblaze-core-rea.patch \ - file://0004-Patch-microblaze-Communicate-in-larger-blocks-with-t.patch \ - file://0005-Patch-microblaze-Add-mb-singlestepping.patch \ - file://0006-Patch-microblaze-Add-initial-port-of-linux-gdbserver.patch \ - file://0007-Patch-microblaze-Add-slr-and-shr-regs-and-little-end.patch \ - file://0008-Patch-microblaze-Added-Backtrace-support-to-GDB.patch \ - file://0009-Patch-microblaze-Initial-support-for-native-gdb.patch \ - file://0010-Patch-gdb-Robustify-inline-function-support.patch \ - file://0011-Patch-gdb-Fix-debug-message-when-register-is-unavail.patch \ - file://0012-LOCAL-Disable-the-warning-message-for-eh_frame_hdr.patch \ - file://0013-LOCAL-Fix-relaxation-of-assembler-resolved-reference.patch \ - file://0014-LOCAL-Fixup-debug_loc-sections-after-linker-relaxati.patch \ - file://0015-LOCAL-upstream-change-to-garbage-collection-sweep-ca.patch \ - " diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb_7.7.1.bb b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb_7.7.1.bb deleted file mode 100644 index 80b589a1f..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/gdb/gdb_7.7.1.bb +++ /dev/null @@ -1,29 +0,0 @@ -require recipes-devtools/gdb/gdb-common.inc -require gdb-${PV}.inc -require gdb-microblaze-7.7.inc - -inherit gettext -inherit python-dir - -PACKAGECONFIG ??= "" -PACKAGECONFIG[python] = "--with-python=${WORKDIR}/python,--without-python,python" -PACKAGECONFIG[babeltrace] = "--with-babeltrace,--without-babeltrace,babeltrace" - -do_configure_prepend() { - if [ -n "${@bb.utils.contains('PACKAGECONFIG', 'python', 'python', '', d)}" ]; then - cat > ${WORKDIR}/python << EOF -#!/bin/sh -case "\$2" in - --includes) echo "-I${STAGING_INCDIR}/${PYTHON_DIR}/" ;; - --ldflags) echo "-Wl,-rpath-link,${STAGING_LIBDIR}/.. -Wl,-rpath,${libdir}/.. -lpthread -ldl -lutil -lm -lpython${PYTHON_BASEVERSION}" ;; - --exec-prefix) echo "${exec_prefix}" ;; - *) exit 1 ;; -esac -exit 0 -EOF - chmod +x ${WORKDIR}/python - fi -} - -PACKAGES =+ "gdbserver" -FILES_gdbserver = "${bindir}/gdbserver" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/qemu/qemu_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/qemu/qemu_%.bbappend deleted file mode 100644 index 3d3a54fec..000000000 --- a/meta-xilinx/meta-xilinx-bsp/recipes-microblaze/qemu/qemu_%.bbappend +++ /dev/null @@ -1,2 +0,0 @@ -QEMU_TARGETS += "microblazeel microblaze" - diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/kernel-module-vcu.bb b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/kernel-module-vcu.bb index 3c13c6973..d72082571 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/kernel-module-vcu.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/kernel-module-vcu.bb @@ -5,14 +5,13 @@ LICENSE = "GPLv2" LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" XILINX_VCU_VERSION = "1.0.0" -XILINX_RELEASE_VERSION = "v2019.1" PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" S = "${WORKDIR}/git" -BRANCH ?= "master-rel-2019.1" +BRANCH ?= "release-2020.1" REPO ?= "git://github.com/xilinx/vcu-modules.git;protocol=https" -SRCREV ?= "13a8e5b3f614d94081481a808aa8d4bd00b26d76" +SRCREV ?= "38827a9172cfb1f0243547c04b2babc045d411ee" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" @@ -26,4 +25,6 @@ RDEPENDS_${PN} = "vcu-firmware" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmp = "zynqmp" -PACKAGE_ARCH = "${SOC_FAMILY}" +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" + +KERNEL_MODULE_AUTOLOAD += "dmaproxy" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libomxil-xlnx.bb b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libomxil-xlnx.bb index 25bbffe94..49b8ef6fd 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libomxil-xlnx.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libomxil-xlnx.bb @@ -4,12 +4,11 @@ LICENSE = "Proprietary" LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493" XILINX_VCU_VERSION = "1.0.0" -XILINX_RELEASE_VERSION = "v2019.1" PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" -BRANCH ?= "master-rel-2019.1" +BRANCH ?= "release-2020.1" REPO ?= "git://github.com/xilinx/vcu-omx-il.git;protocol=https" -SRCREV ?= "b93cec02cd5da223fa965073dce130a08ffd6419" +SRCREV ?= "b5ffa7ec36814cb52c1616dffea2c4ced51fee19" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" @@ -19,7 +18,7 @@ S = "${WORKDIR}/git" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmp = "zynqmp" -PACKAGE_ARCH = "${SOC_FAMILY}" +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" DEPENDS = "libvcu-xlnx" RDEPENDS_${PN} = "kernel-module-vcu libvcu-xlnx" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libvcu-xlnx.bb b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libvcu-xlnx.bb index 8f8c0ef2d..54fe19a92 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libvcu-xlnx.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/libvcu-xlnx.bb @@ -4,12 +4,11 @@ LICENSE = "Proprietary" LIC_FILES_CHKSUM = "file://LICENSE.md;md5=03a7aef7e6f6a76a59fd9b8ba450b493" XILINX_VCU_VERSION = "1.0.0" -XILINX_RELEASE_VERSION = "v2019.1" PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" -BRANCH ?= "master-rel-2019.1" +BRANCH ?= "release-2020.1" REPO ?= "git://github.com/xilinx/vcu-ctrl-sw.git;protocol=https" -SRCREV ?= "32b7be620987283f62e4469185da81dddad1071c" +SRCREV ?= "8ad2b1323bdc98d580360e1a01006d70625c4e65" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" @@ -19,7 +18,7 @@ S = "${WORKDIR}/git" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmp = "zynqmp" -PACKAGE_ARCH = "${SOC_FAMILY}" +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" RDEPENDS_${PN} = "kernel-module-vcu" diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/vcu-firmware.bb b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/vcu-firmware.bb index 28bd0d37a..e29bfb794 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/vcu-firmware.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-multimedia/vcu/vcu-firmware.bb @@ -4,14 +4,13 @@ LICENSE = "Proprietary" LIC_FILES_CHKSUM = "file://LICENSE;md5=63b45903a9a50120df488435f03cf498" XILINX_VCU_VERSION = "1.0.0" -XILINX_RELEASE_VERSION = "v2019.1" PV = "${XILINX_VCU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}" S = "${WORKDIR}/git" -BRANCH ?= "master-rel-2019.1" +BRANCH ?= "release-2020.1" REPO ?= "git://github.com/xilinx/vcu-firmware.git;protocol=https" -SRCREV ?= "4078b74d16e5eccca5ae3132c3877d3aff7fb168" +SRCREV ?= "7ecfd476deb054f354791cc1300ccba069e234f5" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" @@ -19,7 +18,7 @@ SRC_URI = "${REPO};${BRANCHARG}" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE_zynqmp = "zynqmp" -PACKAGE_ARCH = "${SOC_FAMILY}" +PACKAGE_ARCH = "${SOC_FAMILY_ARCH}" do_install() { install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d_b.fw ${D}/lib/firmware/al5d_b.fw diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/files/lock-obj-pub.microblazeel-unknown-linux-gnu.h b/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/files/lock-obj-pub.microblazeel-unknown-linux-gnu.h new file mode 100644 index 000000000..9843f4d91 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/files/lock-obj-pub.microblazeel-unknown-linux-gnu.h @@ -0,0 +1,23 @@ +## lock-obj-pub.microblazeel-xilinx-linux-gnu.h +## File created by gen-posix-lock-obj - DO NOT EDIT +## To be included by mkheader into gpg-error.h + +typedef struct +{ + long _vers; + union { + volatile char _priv[24]; + long _x_align; + long *_xp_align; + } u; +} gpgrt_lock_t; + +#define GPGRT_LOCK_INITIALIZER {1,{{0,0,0,0,0,0,0,0, \ + 0,0,0,0,0,0,0,0, \ + 0,0,0,0,0,0,0,0}}} +## +## Local Variables: +## mode: c +## buffer-read-only: t +## End: +## diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/libgpg-error_%.bbappend b/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/libgpg-error_%.bbappend new file mode 100644 index 000000000..7a4d11429 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/libgpg-error/libgpg-error_%.bbappend @@ -0,0 +1,8 @@ +FILESEXTRAPATHS_prepend := "${THISDIR}/files:" + +SRC_URI_append_microblaze = " file://lock-obj-pub.microblazeel-unknown-linux-gnu.h" + +do_configure_append_microblaze () { + cp ${WORKDIR}/lock-obj-pub.microblazeel-unknown-linux-gnu.h ${S}/src/syscfg/ +} + diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3.bb b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3.bb new file mode 100644 index 000000000..e5d83706c --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3.bb @@ -0,0 +1,188 @@ +SUMMARY = "Opencv : The Open Computer Vision Library"
+HOMEPAGE = "http://opencv.org/"
+SECTION = "libs"
+
+FILESEXTRAPATHS_prepend := "${THISDIR}/opencv_3.4.3:"
+
+LICENSE = "BSD-3-Clause"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=62d89c5dcb0583609ea919c56be0ee76"
+
+ARM_INSTRUCTION_SET_armv4 = "arm"
+ARM_INSTRUCTION_SET_armv5 = "arm"
+
+DEPENDS = "libtool swig-native bzip2 zlib glib-2.0 libwebp"
+
+SRCREV_opencv = "b38c50b3d0c31e82294315ec44b54b7ef559ef12"
+SRCREV_contrib = "1f6d6f06266e1ef336437ae5404bee1c65d42cda"
+SRCREV_ipp = "bdb7bb85f34a8cb0d35e40a81f58da431aa1557a"
+SRCREV_boostdesc = "34e4206aef44d50e6bbcd0ab06354b52e7466d26"
+SRCREV_vgg = "fccf7cd6a4b12079f73bbfb21745f9babcd4eb1d"
+
+def ipp_filename(d):
+ import re
+ arch = d.getVar('TARGET_ARCH', True)
+ if re.match("i.86$", arch):
+ return "ippicv_2017u3_lnx_ia32_general_20180518.tgz"
+ else:
+ return "ippicv_2017u3_lnx_intel64_general_20180518.tgz"
+
+def ipp_md5sum(d):
+ import re
+ arch = d.getVar('TARGET_ARCH', True)
+ if re.match("i.86$", arch):
+ return "ea72de74dae3c604eb6348395366e78e"
+ else:
+ return "b7cc351267db2d34b9efa1cd22ff0572"
+
+IPP_FILENAME = "${@ipp_filename(d)}"
+IPP_MD5 = "${@ipp_md5sum(d)}"
+
+SRCREV_FORMAT = "opencv_contrib_ipp_boostdesc_vgg"
+SRC_URI = "git://github.com/opencv/opencv.git;name=opencv \
+ git://github.com/opencv/opencv_contrib.git;destsuffix=contrib;name=contrib \
+ git://github.com/opencv/opencv_3rdparty.git;branch=ippicv/master_20180518;destsuffix=ipp;name=ipp \
+ git://github.com/opencv/opencv_3rdparty.git;branch=contrib_xfeatures2d_boostdesc_20161012;destsuffix=boostdesc;name=boostdesc \
+ git://github.com/opencv/opencv_3rdparty.git;branch=contrib_xfeatures2d_vgg_20160317;destsuffix=vgg;name=vgg \
+ file://0001-3rdparty-ippicv-Use-pre-downloaded-ipp.patch \
+ file://uselocalxfeatures.patch;patchdir=../contrib/ \
+ file://0001-Add-missing-multi-line-separator.patch;patchdir=../contrib/ \
+ file://0002-Make-opencv-ts-create-share-library-intead-of-static.patch \
+ file://0003-To-fix-errors-as-following.patch \
+ file://fixpkgconfig.patch \
+ file://0001-Temporarliy-work-around-deprecated-ffmpeg-RAW-functi.patch \
+ file://0001-Dont-use-isystem.patch \
+ file://0001-Check-for-clang-before-using-isystem.patch \
+"
+PV = "3.4.3+git${SRCPV}"
+
+S = "${WORKDIR}/git"
+
+do_unpack_extra() {
+ tar xzf ${WORKDIR}/ipp/ippicv/${IPP_FILENAME} -C ${WORKDIR}
+ cp ${WORKDIR}/vgg/*.i ${WORKDIR}/contrib/modules/xfeatures2d/src
+ cp ${WORKDIR}/boostdesc/*.i ${WORKDIR}/contrib/modules/xfeatures2d/src
+}
+addtask unpack_extra after do_unpack before do_patch
+
+EXTRA_OECMAKE = "-DOPENCV_EXTRA_MODULES_PATH=${WORKDIR}/contrib/modules \
+ -DWITH_1394=OFF \
+ -DENABLE_PRECOMPILED_HEADERS=OFF \
+ -DCMAKE_SKIP_RPATH=ON \
+ -DOPENCV_ICV_HASH=${IPP_MD5} \
+ -DIPPROOT=${WORKDIR}/ippicv_lnx \
+ ${@bb.utils.contains("TARGET_CC_ARCH", "-msse3", "-DENABLE_SSE=1 -DENABLE_SSE2=1 -DENABLE_SSE3=1 -DENABLE_SSSE3=1", "", d)} \
+ ${@bb.utils.contains("TARGET_CC_ARCH", "-msse4.1", "-DENABLE_SSE=1 -DENABLE_SSE2=1 -DENABLE_SSE3=1 -DENABLE_SSSE3=1 -DENABLE_SSE41=1", "", d)} \
+ ${@bb.utils.contains("TARGET_CC_ARCH", "-msse4.2", "-DENABLE_SSE=1 -DENABLE_SSE2=1 -DENABLE_SSE3=1 -DENABLE_SSSE3=1 -DENABLE_SSE41=1 -DENABLE_SSE42=1", "", d)} \
+ ${@oe.utils.conditional("libdir", "/usr/lib64", "-DLIB_SUFFIX=64", "", d)} \
+ ${@oe.utils.conditional("libdir", "/usr/lib32", "-DLIB_SUFFIX=32", "", d)} \
+"
+EXTRA_OECMAKE_append_x86 = " -DX86=ON"
+
+PACKAGECONFIG ??= "python3 eigen jpeg png tiff v4l libv4l gstreamer samples tbb gphoto2 \
+ ${@bb.utils.contains("DISTRO_FEATURES", "x11", "gtk", "", d)} \
+ ${@bb.utils.contains("LICENSE_FLAGS_WHITELIST", "commercial", "libav", "", d)}"
+
+PACKAGECONFIG[amdblas] = "-DWITH_OPENCLAMDBLAS=ON,-DWITH_OPENCLAMDBLAS=OFF,libclamdblas,"
+PACKAGECONFIG[amdfft] = "-DWITH_OPENCLAMDFFT=ON,-DWITH_OPENCLAMDFFT=OFF,libclamdfft,"
+PACKAGECONFIG[eigen] = "-DWITH_EIGEN=ON,-DWITH_EIGEN=OFF,libeigen gflags glog,"
+PACKAGECONFIG[freetype] = "-DBUILD_opencv_freetype=ON,-DBUILD_opencv_freetype=OFF,freetype,"
+PACKAGECONFIG[gphoto2] = "-DWITH_GPHOTO2=ON,-DWITH_GPHOTO2=OFF,libgphoto2,"
+PACKAGECONFIG[gstreamer] = "-DWITH_GSTREAMER=ON,-DWITH_GSTREAMER=OFF,gstreamer1.0 gstreamer1.0-plugins-base,"
+PACKAGECONFIG[gtk] = "-DWITH_GTK=ON,-DWITH_GTK=OFF,gtk+3,"
+PACKAGECONFIG[jasper] = "-DWITH_JASPER=ON,-DWITH_JASPER=OFF,jasper,"
+PACKAGECONFIG[java] = "-DJAVA_INCLUDE_PATH=${JAVA_HOME}/include -DJAVA_INCLUDE_PATH2=${JAVA_HOME}/include/linux -DJAVA_AWT_INCLUDE_PATH=${JAVA_HOME}/include -DJAVA_AWT_LIBRARY=${JAVA_HOME}/lib/amd64/libjawt.so -DJAVA_JVM_LIBRARY=${JAVA_HOME}/lib/amd64/server/libjvm.so,,ant-native fastjar-native openjdk-8-native,"
+PACKAGECONFIG[jpeg] = "-DWITH_JPEG=ON,-DWITH_JPEG=OFF,jpeg,"
+PACKAGECONFIG[libav] = "-DWITH_FFMPEG=ON,-DWITH_FFMPEG=OFF,libav,"
+PACKAGECONFIG[libv4l] = "-DWITH_LIBV4L=ON,-DWITH_LIBV4L=OFF,v4l-utils,"
+PACKAGECONFIG[opencl] = "-DWITH_OPENCL=ON,-DWITH_OPENCL=OFF,opencl-headers virtual/opencl-icd,"
+PACKAGECONFIG[oracle-java] = "-DJAVA_INCLUDE_PATH=${ORACLE_JAVA_HOME}/include -DJAVA_INCLUDE_PATH2=${ORACLE_JAVA_HOME}/include/linux -DJAVA_AWT_INCLUDE_PATH=${ORACLE_JAVA_HOME}/include -DJAVA_AWT_LIBRARY=${ORACLE_JAVA_HOME}/lib/amd64/libjawt.so -DJAVA_JVM_LIBRARY=${ORACLE_JAVA_HOME}/lib/amd64/server/libjvm.so,,ant-native oracle-jse-jdk oracle-jse-jdk-native,"
+PACKAGECONFIG[png] = "-DWITH_PNG=ON,-DWITH_PNG=OFF,libpng,"
+PACKAGECONFIG[python2] = "-DPYTHON2_NUMPY_INCLUDE_DIRS:PATH=${STAGING_LIBDIR}/${PYTHON_DIR}/site-packages/numpy/core/include,,python-numpy,"
+PACKAGECONFIG[python3] = "-DPYTHON3_NUMPY_INCLUDE_DIRS:PATH=${STAGING_LIBDIR}/${PYTHON_DIR}/site-packages/numpy/core/include,,python3-numpy,"
+PACKAGECONFIG[samples] = "-DBUILD_EXAMPLES=ON -DINSTALL_PYTHON_EXAMPLES=ON,-DBUILD_EXAMPLES=OFF,,"
+PACKAGECONFIG[tbb] = "-DWITH_TBB=ON,-DWITH_TBB=OFF,tbb,"
+PACKAGECONFIG[text] = "-DBUILD_opencv_text=ON,-DBUILD_opencv_text=OFF,tesseract,"
+PACKAGECONFIG[tiff] = "-DWITH_TIFF=ON,-DWITH_TIFF=OFF,tiff,"
+PACKAGECONFIG[v4l] = "-DWITH_V4L=ON,-DWITH_V4L=OFF,v4l-utils,"
+
+inherit pkgconfig cmake
+
+inherit ${@bb.utils.contains('PACKAGECONFIG', 'python3', 'distutils3-base', '', d)}
+inherit ${@bb.utils.contains('PACKAGECONFIG', 'python2', 'distutils-base', '', d)}
+
+export PYTHON_CSPEC="-I${STAGING_INCDIR}/${PYTHON_DIR}"
+export PYTHON="${STAGING_BINDIR_NATIVE}/${@bb.utils.contains('PACKAGECONFIG', 'python3', 'python3', 'python', d)}"
+export ORACLE_JAVA_HOME="${STAGING_DIR_NATIVE}/usr/bin/java"
+export JAVA_HOME="${STAGING_DIR_NATIVE}/usr/lib/jvm/openjdk-8-native"
+export ANT_DIR="${STAGING_DIR_NATIVE}/usr/share/ant/"
+
+TARGET_CC_ARCH += "-I${S}/include "
+
+PACKAGES += "${@bb.utils.contains('PACKAGECONFIG', 'samples', '${PN}-samples', '', d)} \
+ ${@bb.utils.contains('PACKAGECONFIG', 'oracle-java', '${PN}-java', '', d)} \
+ ${@bb.utils.contains('PACKAGECONFIG', 'java', '${PN}-java', '', d)} \
+ ${@bb.utils.contains('PACKAGECONFIG', 'python2', 'python-${BPN}', '', d)} \
+ ${@bb.utils.contains('PACKAGECONFIG', 'python3', 'python3-${BPN}', '', d)} \
+ ${PN}-apps"
+
+python populate_packages_prepend () {
+ cv_libdir = d.expand('${libdir}')
+ do_split_packages(d, cv_libdir, '^lib(.*)\.so$', 'lib%s-dev', 'OpenCV %s development package', extra_depends='${PN}-dev', allow_links=True)
+ do_split_packages(d, cv_libdir, '^lib(.*)\.la$', 'lib%s-dev', 'OpenCV %s development package', extra_depends='${PN}-dev')
+ do_split_packages(d, cv_libdir, '^lib(.*)\.a$', 'lib%s-dev', 'OpenCV %s development package', extra_depends='${PN}-dev')
+ do_split_packages(d, cv_libdir, '^lib(.*)\.so\.*', 'lib%s', 'OpenCV %s library', extra_depends='', allow_links=True)
+
+ pn = d.getVar('PN')
+ metapkg = pn + '-dev'
+ d.setVar('ALLOW_EMPTY_' + metapkg, "1")
+ blacklist = [ metapkg ]
+ metapkg_rdepends = [ ]
+ packages = d.getVar('PACKAGES').split()
+ for pkg in packages[1:]:
+ if not pkg in blacklist and not pkg in metapkg_rdepends and pkg.endswith('-dev'):
+ metapkg_rdepends.append(pkg)
+ d.setVar('RRECOMMENDS_' + metapkg, ' '.join(metapkg_rdepends))
+
+ metapkg = pn
+ d.setVar('ALLOW_EMPTY_' + metapkg, "1")
+ blacklist = [ metapkg, "libopencv-ts" ]
+ metapkg_rdepends = [ ]
+ for pkg in packages[1:]:
+ if not pkg in blacklist and not pkg in metapkg_rdepends and not pkg.endswith('-dev') and not pkg.endswith('-dbg') and not pkg.endswith('-doc') and not pkg.endswith('-locale') and not pkg.endswith('-staticdev'):
+ metapkg_rdepends.append(pkg)
+ d.setVar('RDEPENDS_' + metapkg, ' '.join(metapkg_rdepends))
+}
+
+PACKAGES_DYNAMIC += "^libopencv-.*"
+
+FILES_${PN} = ""
+FILES_${PN}-dbg += "${datadir}/OpenCV/java/.debug/* ${datadir}/OpenCV/samples/bin/.debug/*"
+FILES_${PN}-dev = "${includedir} ${libdir}/pkgconfig ${datadir}/OpenCV/*.cmake"
+FILES_${PN}-staticdev += "${datadir}/OpenCV/3rdparty/lib/*.a"
+FILES_${PN}-apps = "${bindir}/* ${datadir}/OpenCV"
+FILES_${PN}-java = "${datadir}/OpenCV/java"
+FILES_${PN}-samples = "${datadir}/OpenCV/samples/"
+
+INSANE_SKIP_${PN}-java = "libdir"
+INSANE_SKIP_${PN}-dbg = "libdir"
+
+ALLOW_EMPTY_${PN} = "1"
+
+SUMMARY_python-opencv = "Python bindings to opencv"
+FILES_python-opencv = "${PYTHON_SITEPACKAGES_DIR}/*"
+RDEPENDS_python-opencv = "python-core python-numpy"
+
+SUMMARY_python3-opencv = "Python bindings to opencv"
+FILES_python3-opencv = "${PYTHON_SITEPACKAGES_DIR}/*"
+RDEPENDS_python3-opencv = "python3-core python3-numpy"
+
+do_install_append() {
+ cp ${S}/include/opencv/*.h ${D}${includedir}/opencv/
+ sed -i '/blobtrack/d' ${D}${includedir}/opencv/cvaux.h
+
+ # Move Python files into correct library folder (for multilib build)
+ if [ "$libdir" != "/usr/lib" -a -d ${D}/usr/lib ]; then
+ mv ${D}/usr/lib/* ${D}/${libdir}/
+ rm -rf ${D}/usr/lib
+ fi
+}
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-3rdparty-ippicv-Use-pre-downloaded-ipp.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-3rdparty-ippicv-Use-pre-downloaded-ipp.patch new file mode 100644 index 000000000..5f909c1a8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-3rdparty-ippicv-Use-pre-downloaded-ipp.patch @@ -0,0 +1,36 @@ +From 85b882b4ceb57fe6538f47af58d0a970923fde0e Mon Sep 17 00:00:00 2001 +From: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> +Date: Thu, 31 Mar 2016 00:20:15 +0200 +Subject: [PATCH] 3rdparty/ippicv: Use pre-downloaded ipp + +Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> +Signed-off-by: Ismo Puustinen <ismo.puustinen@intel.com> + +--- + 3rdparty/ippicv/ippicv.cmake | 15 +-------------- + 1 file changed, 1 insertion(+), 14 deletions(-) + +diff --git a/3rdparty/ippicv/ippicv.cmake b/3rdparty/ippicv/ippicv.cmake +index ae8748c..305abdb 100644 +--- a/3rdparty/ippicv/ippicv.cmake ++++ b/3rdparty/ippicv/ippicv.cmake +@@ -39,18 +39,5 @@ function(download_ippicv root_var) + endif() + + set(THE_ROOT "${OpenCV_BINARY_DIR}/3rdparty/ippicv") +- ocv_download(FILENAME ${OPENCV_ICV_NAME} +- HASH ${OPENCV_ICV_HASH} +- URL +- "${OPENCV_IPPICV_URL}" +- "$ENV{OPENCV_IPPICV_URL}" +- "https://raw.githubusercontent.com/opencv/opencv_3rdparty/${IPPICV_COMMIT}/ippicv/" +- DESTINATION_DIR "${THE_ROOT}" +- ID IPPICV +- STATUS res +- UNPACK RELATIVE_URL) +- +- if(res) +- set(${root_var} "${THE_ROOT}/${OPENCV_ICV_PACKAGE_SUBDIR}" PARENT_SCOPE) +- endif() ++ set(${root_var} "${THE_ROOT}/${OPENCV_ICV_PACKAGE_SUBDIR}" PARENT_SCOPE) + endfunction() diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Add-missing-multi-line-separator.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Add-missing-multi-line-separator.patch new file mode 100644 index 000000000..aa196a5fe --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Add-missing-multi-line-separator.patch @@ -0,0 +1,36 @@ +From 60857229aab13ccc426572a43ab891409bb76ea4 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Sun, 9 Sep 2018 22:52:55 -0700
+Subject: [PATCH] Add missing multi-line separator
+
+Otherwise this fails to build ( found on mips )
+
+Fixes
+contrib/modules/surface_matching/src/hash_murmur86.hpp:97:15: error:
+expected constructor, destructor, or type conversion before '(' token
+ && defined(__GNUC__) && (__GNUC__>4 || (__GNUC__==4 &&
+__GNUC_MINOR__>=3))
+ ^
+
+Upstream-Status: Submitted [https://github.com/opencv/opencv_contrib/pull/1764]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ modules/surface_matching/src/hash_murmur86.hpp | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/modules/surface_matching/src/hash_murmur86.hpp b/modules/surface_matching/src/hash_murmur86.hpp
+index 1edf6bf4..0477d37e 100644
+--- a/modules/surface_matching/src/hash_murmur86.hpp
++++ b/modules/surface_matching/src/hash_murmur86.hpp
+@@ -93,7 +93,7 @@ void hashMurmurx86 ( const void * key, const int len, const uint seed, void * ou
+ /* Now find best way we can to READ_UINT32 */
+ #ifndef WORDS_BIGENDIAN
+ # define READ_UINT32(ptr) (*((uint32_t*)(ptr)))
+-#elif defined(WORDS_BIGENDIAN)
++#elif defined(WORDS_BIGENDIAN) \
+ && defined(__GNUC__) && (__GNUC__>4 || (__GNUC__==4 && __GNUC_MINOR__>=3))
+ # define READ_UINT32(ptr) (__builtin_bswap32(*((uint32_t*)(ptr))))
+ #endif
+--
+2.18.0
+
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Check-for-clang-before-using-isystem.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Check-for-clang-before-using-isystem.patch new file mode 100644 index 000000000..fe7843304 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Check-for-clang-before-using-isystem.patch @@ -0,0 +1,32 @@ +From fa76d8646bb2b9b514728eeef41afed7c43a36f2 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Tue, 11 Sep 2018 18:18:33 -0700
+Subject: [PATCH] Check for clang before using -isystem
+
+When cross compiling with clang, the internal C++ headers are not found
+when adding sysroot to -isystem, that is redundant anyway because it
+will look for headers insider --sysroot path with same quality as it
+would do with -isystem otherwise
+
+Upstream-Status: Submitted [https://github.com/opencv/opencv/pull/12504]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ cmake/OpenCVUtils.cmake | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/cmake/OpenCVUtils.cmake b/cmake/OpenCVUtils.cmake
+index fae91c165f..60c20192dc 100644
+--- a/cmake/OpenCVUtils.cmake
++++ b/cmake/OpenCVUtils.cmake
+@@ -259,7 +259,7 @@ function(ocv_include_directories)
+ ocv_is_opencv_directory(__is_opencv_dir "${dir}")
+ if(__is_opencv_dir)
+ list(APPEND __add_before "${dir}")
+- elseif(CV_GCC AND NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS "6.0" AND
++ elseif(((CV_GCC AND NOT CMAKE_CXX_COMPILER_VERSION VERSION_LESS "6.0") OR CV_CLANG) AND
+ dir MATCHES "/usr/include$")
+ # workaround for GCC 6.x bug
+ else()
+--
+2.18.0
+
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Dont-use-isystem.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Dont-use-isystem.patch new file mode 100644 index 000000000..40d3f53e1 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Dont-use-isystem.patch @@ -0,0 +1,28 @@ +From 9659f5a1e75fc29c9879c301767bba72ecf9042a Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Tue, 11 Sep 2018 00:21:18 -0700 +Subject: [PATCH] Dont use isystem + +clang really does not like it + +Upstream-Status: Pending + +Signed-off-by: Khem Raj <raj.khem@gmail.com> + +--- + cmake/OpenCVPCHSupport.cmake | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/cmake/OpenCVPCHSupport.cmake b/cmake/OpenCVPCHSupport.cmake +index 59bc826..055dfce 100644 +--- a/cmake/OpenCVPCHSupport.cmake ++++ b/cmake/OpenCVPCHSupport.cmake +@@ -18,6 +18,8 @@ IF(CV_GCC) + SET(PCHSupport_FOUND TRUE) + ENDIF() + ++ SET(CMAKE_INCLUDE_SYSTEM_FLAG_C "-I") ++ SET(CMAKE_INCLUDE_SYSTEM_FLAG_CXX "-I") + SET(_PCH_include_prefix "-I") + SET(_PCH_isystem_prefix "-isystem") + SET(_PCH_define_prefix "-D") diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Temporarliy-work-around-deprecated-ffmpeg-RAW-functi.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Temporarliy-work-around-deprecated-ffmpeg-RAW-functi.patch new file mode 100644 index 000000000..f8ccd1d55 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0001-Temporarliy-work-around-deprecated-ffmpeg-RAW-functi.patch @@ -0,0 +1,31 @@ +From fe27d0e2341683606704115949d16250e4cacbfa Mon Sep 17 00:00:00 2001 +From: Jason Wessel <jason.wessel@windriver.com> +Date: Wed, 9 May 2018 13:33:59 -0700 +Subject: [PATCH] Temporarliy work around deprecated ffmpeg RAW function + compile failure until next uprev + +Signed-off-by: Jason Wessel <jason.wessel@windriver.com> + +--- + modules/videoio/src/cap_ffmpeg_impl.hpp | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/modules/videoio/src/cap_ffmpeg_impl.hpp b/modules/videoio/src/cap_ffmpeg_impl.hpp +index 0d360ad..566df66 100644 +--- a/modules/videoio/src/cap_ffmpeg_impl.hpp ++++ b/modules/videoio/src/cap_ffmpeg_impl.hpp +@@ -736,6 +736,14 @@ struct ImplMutex::Impl + + #endif + ++/* NOTE This is deprecated in ffmpeg and the code should be removed */ ++#ifndef AVFMT_RAWPICTURE ++#define AVFMT_RAWPICTURE 0x0020 ++#endif /* AVFMT_RAWPICTURE */ ++#ifndef CODEC_FLAG_GLOBAL_HEADER ++#define CODEC_FLAG_GLOBAL_HEADER AV_CODEC_FLAG_GLOBAL_HEADER ++#endif ++ + void ImplMutex::init() + { + impl = new Impl(); diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0002-Make-opencv-ts-create-share-library-intead-of-static.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0002-Make-opencv-ts-create-share-library-intead-of-static.patch new file mode 100644 index 000000000..46198fb7b --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0002-Make-opencv-ts-create-share-library-intead-of-static.patch @@ -0,0 +1,24 @@ +From 46ffa1f8f443b71673774fcb864eb741bbc26200 Mon Sep 17 00:00:00 2001 +From: Bian Naimeng <biannm@cn.fujitsu.com> +Date: Wed, 19 Apr 2017 03:11:37 +0900 +Subject: [PATCH] Make opencv-ts create share library intead of static. + +Signed-off-by: Lei Maohui <leimaohui@cn.fujitsu.com> + +--- + modules/ts/CMakeLists.txt | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/modules/ts/CMakeLists.txt b/modules/ts/CMakeLists.txt +index f95bed0..ee67858 100644 +--- a/modules/ts/CMakeLists.txt ++++ b/modules/ts/CMakeLists.txt +@@ -4,7 +4,7 @@ if(NOT BUILD_opencv_ts AND NOT BUILD_TESTS AND NOT BUILD_PERF_TESTS) + ocv_module_disable(ts) + endif() + +-set(OPENCV_MODULE_TYPE STATIC) ++#set(OPENCV_MODULE_TYPE STATIC) + set(OPENCV_MODULE_IS_PART_OF_WORLD FALSE) + + if(WINRT) diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0003-To-fix-errors-as-following.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0003-To-fix-errors-as-following.patch new file mode 100644 index 000000000..336c2e08e --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/0003-To-fix-errors-as-following.patch @@ -0,0 +1,70 @@ +From 867caccc358266f7021f076fc8c8e41bf048782c Mon Sep 17 00:00:00 2001 +From: Huang Qiyu <huangqy.fnst@cn.fujitsu.com> +Date: Fri, 19 May 2017 04:27:50 +0900 +Subject: [PATCH] To fix errors as following: + +"test_main.cpp:45: undefined reference to `parseCustomOptions(int, char**)'" +"perf_abs.cpp:13: undefined reference to `cvtest::param_seed'" +"test_superres.cpp:270: undefined reference to `checkIppStatus()'" + +Signed-off-by: Huang Qiyu <huangqy.fnst@cn.fujitsu.com> + +Also add the visibility changes for certain OpenCL-related functions in +ts module. + +Signed-off-by: Ismo Puustinen <ismo.puustinen@intel.com> + +--- + modules/ts/include/opencv2/ts.hpp | 4 ++-- + modules/ts/include/opencv2/ts/ocl_test.hpp | 2 +- + modules/ts/include/opencv2/ts/ts_ext.hpp | 2 +- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/modules/ts/include/opencv2/ts.hpp b/modules/ts/include/opencv2/ts.hpp +index b9d6b74..f1ee7ee 100644 +--- a/modules/ts/include/opencv2/ts.hpp ++++ b/modules/ts/include/opencv2/ts.hpp +@@ -622,7 +622,7 @@ protected: + } + }; + +-extern uint64 param_seed; ++CV_EXPORTS extern uint64 param_seed; + + struct DefaultRngAuto + { +@@ -685,7 +685,7 @@ private: + #endif + #endif + +-void parseCustomOptions(int argc, char **argv); ++CV_EXPORTS void parseCustomOptions(int argc, char **argv); + + #define CV_TEST_INIT0_NOOP (void)0 + +diff --git a/modules/ts/include/opencv2/ts/ocl_test.hpp b/modules/ts/include/opencv2/ts/ocl_test.hpp +index 11572e9..438112e 100644 +--- a/modules/ts/include/opencv2/ts/ocl_test.hpp ++++ b/modules/ts/include/opencv2/ts/ocl_test.hpp +@@ -82,7 +82,7 @@ inline UMat ToUMat(InputArray src) + return dst; + } + +-extern int test_loop_times; ++CV_EXPORTS extern int test_loop_times; + + #define MAX_VALUE 357 + +diff --git a/modules/ts/include/opencv2/ts/ts_ext.hpp b/modules/ts/include/opencv2/ts/ts_ext.hpp +index b5cea3e..e5b0b4b 100644 +--- a/modules/ts/include/opencv2/ts/ts_ext.hpp ++++ b/modules/ts/include/opencv2/ts/ts_ext.hpp +@@ -9,7 +9,7 @@ + #define OPENCV_TS_EXT_HPP + + namespace cvtest { +-void checkIppStatus(); ++CV_EXPORTS void checkIppStatus(); + extern bool skipUnstableTests; + extern bool runBigDataTests; + extern int testThreads; diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/fixpkgconfig.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/fixpkgconfig.patch new file mode 100644 index 000000000..df20aabc8 --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/fixpkgconfig.patch @@ -0,0 +1,30 @@ +Index: git/cmake/OpenCVGenPkgconfig.cmake
+===================================================================
+--- git.orig/cmake/OpenCVGenPkgconfig.cmake
++++ git/cmake/OpenCVGenPkgconfig.cmake
+@@ -31,7 +31,7 @@ macro(fix_prefix lst isown)
+ get_filename_component(libdir "${item}" PATH)
+ get_filename_component(_libname "${item}" NAME)
+ ocv_get_libname(libname "${_libname}")
+- list(APPEND _lst "-L${libdir}" "-l${libname}")
++ list(APPEND _lst "-l${libname}")
+ else()
+ list(APPEND _lst "-l${item}")
+ endif()
+@@ -124,11 +124,14 @@ ocv_list_unique(_extra)
+ ocv_list_unique(_3rdparty)
+
+ set(OPENCV_PC_LIBS
+- "-L\${exec_prefix}/${OPENCV_LIB_INSTALL_PATH}"
++ "-L\${exec_prefix}/${OPENCV_3P_LIB_INSTALL_PATH}"
+ "${_modules}"
+ )
+ if(BUILD_SHARED_LIBS)
+- set(OPENCV_PC_LIBS_PRIVATE "${_extra}")
++ set(OPENCV_PC_LIBS_PRIVATE
++ "-L\${exec_prefix}/${OPENCV_LIB_INSTALL_PATH}"
++ "${_extra}"
++ )
+ else()
+ set(OPENCV_PC_LIBS_PRIVATE
+ "-L\${exec_prefix}/${OPENCV_3P_LIB_INSTALL_PATH}"
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/uselocalxfeatures.patch b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/uselocalxfeatures.patch new file mode 100644 index 000000000..2605562ee --- /dev/null +++ b/meta-xilinx/meta-xilinx-bsp/recipes-support/opencv/opencv_3.4.3/uselocalxfeatures.patch @@ -0,0 +1,20 @@ +diff --git a/modules/xfeatures2d/CMakeLists.txt b/modules/xfeatures2d/CMakeLists.txt
+index e1755595..c7009c47 100644
+--- a/modules/xfeatures2d/CMakeLists.txt
++++ b/modules/xfeatures2d/CMakeLists.txt
+@@ -5,10 +5,10 @@ ocv_define_module(xfeatures2d opencv_core opencv_imgproc opencv_features2d openc
+ include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/download_vgg.cmake)
+ include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/download_boostdesc.cmake)
+ set(DOWNLOAD_DIR "${OpenCV_BINARY_DIR}/downloads/xfeatures2d")
+-download_boost_descriptors("${DOWNLOAD_DIR}" boost_status)
+-download_vgg_descriptors("${DOWNLOAD_DIR}" vgg_status)
+-if(NOT boost_status OR NOT vgg_status)
+- ocv_module_disable(xfeatures2d)
+-endif()
++#download_boost_descriptors("${DOWNLOAD_DIR}" boost_status)
++#download_vgg_descriptors("${DOWNLOAD_DIR}" vgg_status)
++#if(NOT boost_status OR NOT vgg_status)
++# ocv_module_disable(xfeatures2d)
++#endif()
+
+ ocv_module_include_directories("${DOWNLOAD_DIR}")
diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-xrt/xrt/xrt_git.bb b/meta-xilinx/meta-xilinx-bsp/recipes-xrt/xrt/xrt_git.bb index 4bb41b7d7..71725d0b7 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-xrt/xrt/xrt_git.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-xrt/xrt/xrt_git.bb @@ -2,15 +2,20 @@ SUMMARY = "Xilinx Runtime(XRT) libraries" DESCRIPTION = "Xilinx Runtime User Space Libraries and headers" LICENSE = "GPLv2 & Apache-2.0" -LIC_FILES_CHKSUM = "file://${WORKDIR}/git/LICENSE;md5=fa343562af4b9b922b8d7fe7b0b6d000 \ - file://runtime_src/driver/xclng/drm/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ - file://runtime_src/driver/xclng/xrt/user_gem/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ - file://runtime_src/driver/xclng/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87" +LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \ + file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \ + file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ + file://runtime_src/core/pcie/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 \ + file://runtime_src/core/edge/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 " -SRC_URI = "git://github.com/Xilinx/XRT.git;protocol=https;nobranch=1" +BRANCH ?= "2020.1_PU1" +REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" -PV = "2.2.0+git${SRCPV}" -SRCREV = "da87ac894a037d7e11c0496361458efed4bab438" +PV = "202010.2.7.0" +SRCREV ?= "8a4c6eb5012c57423fba468e1af8df53a293dcd5" S = "${WORKDIR}/git/src" @@ -19,10 +24,26 @@ inherit cmake BBCLASSEXTEND = "native nativesdk" # util-linux is for libuuid-dev. -DEPENDS = "libdrm opencl-headers ocl-icd opencl-clhpp boost util-linux git-replacement-native" +DEPENDS = "libdrm opencl-headers ocl-icd opencl-clhpp boost util-linux git-replacement-native protobuf-native protobuf" RDEPENDS_${PN} = "bash ocl-icd boost-system boost-filesystem" EXTRA_OECMAKE += " \ -DCMAKE_BUILD_TYPE=Release \ -DCMAKE_EXPORT_COMPILE_COMANDS=ON \ " + +PACKAGE_ARCH_versal-ai-core = "${SOC_VARIANT_ARCH}" +EXTRA_OECMAKE_append_versal-ai-core += "-DXRT_AIE_BUILD=true" +TARGET_CXXFLAGS_append_versal-ai-core += "-DXRT_ENABLE_AIE" +DEPENDS_append_versal-ai-core += " libmetal libxaiengine" +RDEPENDS_${PN}_append_versal-ai-core += " libxaiengine" + +pkg_postinst_ontarget_${PN}() { + #!/bin/sh + if [ ! -e /etc/OpenCL/vendors/xilinx.icd ]; then + echo "INFO: Creating ICD entry for Xilinx Platform" + mkdir -p /etc/OpenCL/vendors + echo "libxilinxopencl.so" > /etc/OpenCL/vendors/xilinx.icd + chmod -R 755 /etc/OpenCL + fi +} diff --git a/meta-xilinx/meta-xilinx-bsp/recipes-xrt/zocl/zocl_git.bb b/meta-xilinx/meta-xilinx-bsp/recipes-xrt/zocl/zocl_git.bb index b47f45fde..f7a078880 100644 --- a/meta-xilinx/meta-xilinx-bsp/recipes-xrt/zocl/zocl_git.bb +++ b/meta-xilinx/meta-xilinx-bsp/recipes-xrt/zocl/zocl_git.bb @@ -1,14 +1,25 @@ SUMMARY = "Xilinx Runtime(XRT) driver module" DESCRIPTION = "Xilinx Runtime driver module provides memory management and compute unit schedule" -LICENSE = "GPLv2" -LIC_FILES_CHKSUM = "file://LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263" +LICENSE = "GPLv2 & Apache-2.0" +LIC_FILES_CHKSUM = "file://LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8" -SRC_URI = "git://github.com/Xilinx/XRT.git;protocol=https" +BRANCH ?= "2020.1_PU1" +REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" -PV = "2.2.0+git${SRCPV}" -SRCREV = "da87ac894a037d7e11c0496361458efed4bab438" +PV = "202010.2.7.0" +SRCREV ?= "8a4c6eb5012c57423fba468e1af8df53a293dcd5" -S = "${WORKDIR}/git/src/runtime_src/driver/zynq/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module + +pkg_postinst_ontarget_${PN}() { + #!/bin/sh + echo "Unloading old XRT Linux kernel modules" + ( rmmod zocl || true ) > /dev/null 2>&1 + echo "Loading new XRT Linux kernel modules" + modprobe zocl +} |