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Signing the SPL when secure-boot is disabled has no impact, the SoC will
continue to bootstrap as normal.
Change-Id: I05c1db80cb4bec44ca315190f5b3c1d97168d1d5
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: I8135871ae0e3b360aff7d878f7cf04a2504f2dd0
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Currently, machine evb-ast2600 frozed during u-boot booting.
This patchset has been tested with AST2600-A1 and AST2600-A3 EVB:
AST2600-A1:
```
U-Boot SPL 2019.04 (Jun 16 2021 - 05:59:38 +0000)
already initialized, Trying to boot from RAM
U-Boot 2019.04 (Jun 16 2021 - 05:59:38 +0000)
SOC: AST2600-A1
RST: WDT1 SOC
PCI RST: #2
LPC Mode: SIO:Enable : SuperIO-2e
Eth: MAC0: RGMII, MAC1: RGMII, MAC2: RGMII, MAC3: RGMII
Model: AST2600 EVB
DRAM: already initialized, 1008 MiB (capacity:1024 MiB, VGA:16 MiB), ECC off
MMC:
sdhci_slot0@100: 1, sdhci_slot1@200: 2, emmc_slot0@100: 0
Loading Environment from SPI Flash... SF: Detected w25q512jv with page size 256 Bytes, erase size 4 KiB, total 64 MiB OK
In: serial@1e784000
```
AST2600-A3:
```
BP0c00
U-Boot SPL 2019.04 (Jun 16 2021 - 05:59:38 +0000)
already initialized, Trying to boot from RAM
U-Boot 2019.04 (Jun 16 2021 - 05:59:38 +0000)
SOC: AST2600-A3
RST: WDT1 SOC
PCI RST: #2
eSPI Mode: SIO:Enable : SuperIO-2e
Eth: MAC0: RGMII, MAC1: RGMII, MAC2: RGMII, MAC3: RGMII
Model: AST2600 EVB
DRAM: already initialized, 960 MiB (capacity:1024 MiB, VGA:64 MiB), ECC
off
MMC:
sdhci_slot0@100: 1, sdhci_slot1@200: 2, emmc_slot0@100: 0
Loading Environment from SPI Flash... SF: Detected w25q512jv with page size 256 Bytes, erase size 4 KiB, total 64 MiB OK
In: serial@1e784000
```
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Change-Id: I77ec3c2928ca96ee3f51290fd3435fca08bb058a
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AST2600 evb has 64 MiB flash by default, so machine config could
provide a default value for FLASH_SIZE.
Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Change-Id: Idca8734f950a16966a5a7322c0c50d6e63d9106e
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Change Iee340ffd294c4f40ba3360acd3f750d886865608 introduced a
machine feature which communicates to recipes if a hw random
number generator is present. Since the Aspeed chips have a
supported RNG, enable this MACHINE_FEATURE.
(From meta-aspeed rev: 57caacd62ae6037119be32c608be6ae4e548e639)
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: I275ca0fc1445c782ea6b10e3807e3b339fead53b
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Populate the hostfw partition by specifying the directory to be
used as source for the filesystem. This directory is populated
by a bbappend to the hostfw recipe.
(From meta-aspeed rev: 37f30af4e377a6bc2d3c47ca435798969321f566)
Change-Id: Id64e0ac6a5082be2b3ad689a6b323da8eb094e69
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Generate a default environment to boot an eMMC based on a txt
file. Populate the generated environment image into the eMMC.
(From meta-aspeed rev: fdc603c73b2dc8851ce2d1684e9c71a5ce51a5b8)
Change-Id: I93944b183b7907202b02854e931593d62603ae77
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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The U-Boot SPL and U-Boot proper would be programmed to the
Boot Area Hardware Partitions of the eMMC. The kernel and user
space would go into the User Data Area. This commit creates an
image that can be programmed into that User Data Area. Layout:
--- - ----- -------- -------- ----- ------- ------ -------- -------
|GPT| | env | boot-a | boot-b | fs-a | fs-b | rwfs | hostfw |GPT-sec|
--- - ----- -------- -------- ------ ------ ------ -------- -------
^ 1MB 64MB 64MB 1GB 1GB 7GB 5GB
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0x5000
Primary GPT size (Beginning of image):
512B (Protective MBR) + 512B (Primary Header) + 16KB (Primary Table)
First partition (u-boot-env) is 4K-aligned, which puts it at offset 0x5000
Secondary GPT size (End of image):
16KB (Secondary Table) + 512B (Secondary Header)
Since the secondary GPT is expected to be at the end of the device,
the initramfs can issue a "sgdisk -e /dev/mmcblk0" on first boot
to move it to the end.
The first partition holds the U-Boot environment. The following two
partitions hold a filesystem with the fitImage file. Code update
would reflash the full filesystem with the fitImage during an update.
U-Boot can then be programmed to look for the kernel in partitions
boot-a or boot-b.
The remaining is a set of ext4 filesystems for user space, read-write,
and host firmware.
The size for the host firmware partition is configurable to be able
to build an image of different size. The reason is that the tacoma
system is has a User Data area just 1GB smaller than rainier.
Design doc: https://gerrit.openbmc-project.xyz/c/openbmc/docs/+/28443
Tested: Adding "WKS_HOSTFW_SIZE = "4G"" to the tacoma.conf file
created a 14GB wic file:
$ ls -lh *wic
-rw-r--r-- 1 anoo 532919 15G Jul 14 08:18 obmc-phosphor-image-rainier.wic
-rw-r--r-- 1 anoo 532919 14G Jul 14 08:36 obmc-phosphor-image-witherspoon-tacoma.wi
$ wic ls obmc-phosphor-image-rainier.wic
Num Start End Size Fstype
...
7 9798963200 15167672319 5368709120 ext4
$ wic ls obmc-phosphor-image-witherspoon-tacoma.wic
Num Start End Size Fstype
...
7 9798963200 14093930495 4294967296 ext4
(From meta-aspeed rev: b8a647297e3f9fe724f8ee1736bb9da3806d788e)
Change-Id: I18b8a15ac8eddb6abfbc7b70429ef45ffc170d9a
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This is a fork that is based on ASPEED's 2019.04 SDK fork. The goal is
to move to a mainline based tree, but while that work is underway, this
allows ast2600 support to move forward.
This gains support for NC-SI, and uses kconfig for the default
boot command allowing us to drop the patch to aspeed-common.h.
Machines will need to indicate which device tree to use. If possible we
should look to having a few common device trees, but for now they are
machine specific. The AST2600 is configured to use the ast2600a1-evb
device tree, which will also work on the a0 variant.
(From meta-aspeed rev: 22ccf4648a776c458300c97a6d001a843b2b5c9b)
Change-Id: Ib21dc9962761aac3f3148fe4908439b975545e1e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Before this change, the ast2600 binaries were built with the soft float
call convention, which allows them to run on systems that don't have
hard float FPUs.
Internally, this changes yocto to build like this:
CXX="arm-openbmc-linux-gnueabi-g++ \
-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard ...
CPP="arm-openbmc-linux-gnueabi-gcc \
-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard ...
Tested: Builds and boots on ast2600-EVB
(From meta-aspeed rev: 53e322518fe6f471663746934e38bf5d8143a501)
Change-Id: If8037c66301ca4a3588d10270fe8d2fc610bb195
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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These udev rules are useful outside of fw_printenv, which is how we
currently include them, so bring them in with the common machine type.
(From meta-aspeed rev: 1a7cc4767eb0393bb615ae67e4b388163aa5dc48)
Signed-off-by: Joel Stanley <joel@jms.id.au>
Change-Id: I0779fc4c2efd0e18d7729cef4548238e56c39a47
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Anyone using OE-core after 95823b7eab is using the OE-core provided tune
and not ours. Drop our redundant tune file.
(From meta-aspeed rev: 5894fc514daad03f70ada285a6b37947e1fb116e)
Change-Id: Ice99855d7655f926832943f6944279a0d21de5a7
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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A typo in the UBOOT_LOADADDRESS line for g6 prevented the FIT image from
properly be loaded by U-Boot. This change makes sure that the FIT image
is properly generated so U-Boot can load it to the right address.
Tested: Build, inspected, and booted the FIT image.
(From meta-aspeed rev: 12cd1d2b96db78ca4a34751c92d63cb6212228be)
Change-Id: Idad7ff047c29699a7cfb80c186e418183ca126f3
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Switch g6 to the same kernel as the other supported chips (g4 and g5).
(From meta-aspeed rev: f28c73a9f2e0296c1730b88afdc6cf0c836d08fa)
Change-Id: I659e535ccb4642438b9c10c48a4850d67b28982b
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The u-boot config is a property of the board and not the SOC. Don't set
a default in the g4 and g5 include files. This ensures that BSP users
explicitly select a uboot config capable of booting the board.
(From meta-aspeed rev: 6203fbdba652e2f7943b55b067b2e91247c795e1)
Change-Id: I7b07019eb7428d8c38268e8dbed0ff5d05f3a7a2
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Instead of setting MACHINE_EXTRA_RDEPENDS in each SOC specific include
file, just set it once in aspeed.inc.
Use MACHINE_EXTRA_RRECOMMENDS as the udev rule is definitely not
required and should be removable via BAD_RECOMMENDATIONS.
(From meta-aspeed rev: 672366760cccfe5bf2e734939ec21c90482e298f)
Change-Id: I42091a522b346fe07511e16439438a73d0c9be6c
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Move most settings from the ast2xxx.inc files to aspeed.inc. This seems
to be how other BSPs do it (e.g. meta-freescale) and it keeps everying
in one consolidated location for easy perusal, comparison, etc. bitbake
will take a different path through it's code while parsing but we wind
up with the exact same variable settings in the end.
Remove worthless comments from ast2xxx.inc file headers.
(From meta-aspeed rev: 456a28202671507ca91b35103a13d3a1dac695db)
Change-Id: Id8ed034350761770f5dae4d1a0adecc9bcfea3b5
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Use the correct tune for the g6 arm core: vfpv4d16
(From meta-aspeed rev: 8f80491f1d58fbe94ef1d32aba45789aee549cec)
Change-Id: I06b7b982c9064edd7369e947cc9e41e2e39a50ed
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Provide a default setting for SERIAL_CONSOLES for all Aspeed SOCs.
Set the SERIAL_CONSOLE for the g5 and g6 evb explicitly, in case the
default changes.
(From meta-aspeed rev: b539e873a7731bad9eee83e17838a78f281d7b4b)
Change-Id: I1ee9f44535cd009de25baccacada36cd58ad4f10
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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oe-core has these defaults:
KERNEL_IMAGETYPE: "zimage"
KERNEL_CLASSES: "kernel-uimage"
INITRAMFS_IMAGE: ""
INITRAMFS_FSTYPES: "cpio.gz"
Override those defaults with Aspeed specific defaults that are more
appropriate to the current state of typical usage (FIT) of Aspeed chips:
KERNEL_IMAGETYPE: "fitImage"
KERNEL_CLASSES: "kernel-fitimage"
INITRAMFS_IMAGE: "aspeed-image-initramfs"
INITRAMFS_FSTYPES: "cpio.xz"
By default use aspeed-image-initramfs in the FIT image.
aspeed-image-initramfs is just an alias to core-image-minimal. The
alias is required because vanilla core-image-minimal is not an initramfs
image recipe...in oe, in general, the usage of the image recipe
(initramfs or not) is baked into the recipe itself with a line like:
IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}"
The same behavior *could* be obtained with a bbappend but that then
prevents users from using the original image recipe as a real root
filesystem image in their setups.
Perhaps at a later time a replacement image with an Aspeed hardware
evaluation kit theme would be a more suitable default.
(From meta-aspeed rev: 7639df3650f6d91c9b533e0287142fdcfbc0b2ea)
Change-Id: I51def69bcfd786f4c8aad2ae68376da335aad039
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Add base configuration metadata for the Aspeed AST2600 and its
evaluation board.
Initially point at the Aspeed SDK until kernel and u-boot support is
added upstream.
(From meta-aspeed rev: 2f128068bc3b7705071868176624ef19a9000750)
Change-Id: Id8636520815a2cf98f8a801f6a2241387e4a8231
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Leave KMACHINE at the OE-core default. It is only used by the
kernel-yocto bitbake class when dealing with kernel source trees like
the Yocto kernel fork that include KERNEL_FEATURES metadata right in the
source tree. None of the Aspeed trees do that.
Don't set FLASH_SIZE. It isn't an OE-core variable and it isn't used
anywhere.
(From meta-aspeed rev: 798e4360c387b12e6bd190c5e526edc1cd75521d)
Change-Id: I4a68fa98108014b8517d0417357060a8fc4e7aae
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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There currently aren't any usable targets provided with meta-aspeed.
Typical OE BSP layers provide reference metadata for evaluation boards.
Provide one for the AST2500 evaluation board.
Typical BSPs also provide an image class that produces images usable on
the target hardware. meta-aspeed doesn't have one (yet), so although
baking an image (e.g. core-image-minimal) will now work, it will not
produce images usable with actual Aspeed hardware.
(From meta-aspeed rev: 720fcee6f9dc78ed46b4641de6f2fb0054a6da44)
Change-Id: I3419d448b05aa7c72b77224e44050ca63ec20f12
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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OE-Core adds the value of SOC_FAMILY to MACHINEOVERRIDES, so explicitly
setting a MACHINEOVERRIDES is redundant. Drop the explicit
ast2400/ast2500 MACHINEOVERRIDES and use the OE-Core provided aspeed-g4
and aspeed-g5 instead.
After the redundant ast2400/ast2500 overrides are dropped, the ordering
of the values in MACHINEOVERRIDES is wrong:
MACHINEOVERRIDES="aspeed-g5:aspeed"
This means that:
FOO_aspeed = "bar"
will override:
FOO_aspeed-g5 = "baz"
which is the opposite of expectation. The ordering is a function of
config file include order and choice of the predot vs postdot operator.
Use the same include ordering and dot operators as meta-fsl-arm to get
the overrides to appear in MACHINEOVERRIDES in the correct order such
that the expected semantics are provided and:
FOO_aspeed-g5 = "bar"
will override:
FOO_aspeed = "baz"
Drop explicit setting for FILESPATH as OE-Core adds OVERRIDES to
FILESPATH and bitbake will find the appropriate defconfig without them.
Move defconfigs to aspeed-g4 and aspeed-g5 since the ast2400 and ast2500
are being removed.
(From meta-aspeed rev: 85d614a69c1e752fb4d5917499500c37c4f745ac)
Change-Id: I63c0f71f14bf9145e7e769902be87bb267a78a30
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The new subtree paradigm has moved the meta-bsp layers to the top level
Change-Id: Ic4f64c39465be699bed3649e125e027d17daf938
Signed-off-by: Dave Cobbley <david.j.cobbley@linux.intel.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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