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This includes security and bug fixes from the 5.8.9, 5.8.10, 5.8.11 and
5.8.12 stable releases.
(From meta-aspeed rev: 20431851af835631f4cbe479d958f565ebef781b)
Change-Id: Ib6965a9176d578cbc5eda2384928f17584c6cddc
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Joel Stanley (1):
net/ncsi: Disable DEBUG
(From meta-aspeed rev: 59eb0deec79fa1939a450e74b416b75591b47788)
Change-Id: Ib3f7695606a936b86a8ff885ab2a5c9598eae736
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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As ASPEED develop their ast2600 u-boot features, we've had a need to
integrate changes from their tree into the openbmc tree. In the past
we lined this up with a major version bump (as with the kernel),
meaning we could create a new branch with our "out of tree" changes
applied on top. However, in this case their SDK is still based on the
2019.04 release, so there's not a clear way forward.
I've chosen to rebase the openbmc changes on top of their branch. The
old branch is still accessible at archive/v2019.04-aspeed-openbmc-1.
The bitbake recipe will continue to work as it uses the nobranch=1
flag, and specifies the version based on the SHA.
The new branch contains their aspeed-master-v2019.04 tree as of today,
with the OpenBMC changes applied on top.
The ASPEED changes include:
- support for the ast2400
- Disable of buggy AXI prefetch feature
- SPL, OTP and secure boot fixes
- SPI flash updates and calibration changes
- eMMC, Ethernet, fixes
I've boot tested it running from SPI NOR on AST2600 A1 hardware, as
well as QEMU, and it reached userspace. I will bump the bitbake recipe
to integrate the changes into openbmc.
Andreas Dannenberg (1):
spl: Make image loader infrastructure more universal
Chia-Wei, Wang (18):
config: ast2600: Enable board early initialization
ARM: dts: ast2600: Revert dm-pre-reloc property from eMMC
configs: ast2600-slt: Change DRAM speed to 1600Mbps
spl: fit: Separate FIT image load and processing
spl: ast2600: Fix the load buffer address
Revert "spl: fit: Separate FIT image load and processing"
Revert "add LPC/eSPI storngest Driving Strength"
configs: ast2600-slt: Add ENV default configuration
aspeed: Fix compile warning
ast2600: Remove AXI-prefetch support
wdt: ast2600: Fix reset mask setting
spl: ast2600: Add secure boot flow support
update bootflow
fix boots address
configs: ast2600-fpga: Fix defconfig and header
ARM: spl: Add SPL relocation support
spl: ast2600: Add relocation support
ARM: timer: ast2600: Add dynamic frequency detection
Chin-Ting Kuo (22):
spi: timing: Change timing calibration method
spi-flash: w25q01jv flash model support
spi-flash: aspeed: Remove unused variable
spi: Add w25q512jvfm flash model
boot: emmc: Boot from eMMC feature early porting
emmc: Move "u-boot,dm-pre-reloc" flag to evb.dts
spi-nor: Add flash model w25q01jvfim and fix typo
mmc: SD: Add property for timing phase and drive type
mmc: slt: Add timing phase and drive type for MMC
spi: cpuinfo: Add ABR, spi_aux_pin info
spi: crypress: Set 4B mode to controller when address width is 4
spi: AST2500: Modify ABR boot source log
spi: scu_info: Simplify scu info log related to fmc/spi
spi: ast2500: Porting spi1 setting
spi-flash: Set FMC04/SPIR04[6:4] when enter 4B mode
spi-flash: Use user mode under specific condition
spi-flash: Modify SPI/FMC CE1 default decode address
fpga: fixbug: Remove CONFIG_BOARD_EARLY_INIT_F
dp: Update dp base address
spi: bugfix: Do not change read command until flash probe
fmc: Set FMC50[1] for waiting WIP idle
eMMC: Do not fill FMC50[1] when boot from eMMC
Dylan Hung (18):
add rmii rclk oe control
add rmii rclk pin control
add board_ram_info for ast2600 series
move borad_add_ram_info to borad_common.c
fix FPGA RGMII pin setting
revise fpga mac device
fix typo
don't print message in sdramphy_init
write scu config back if vga config is "0"
refactor code: add macro for ECC setup
trim tailing whitespaces
don't re-init ecc if dram has been initialized
fix ncsi build
don't reserve VGA memory if efuse bit is set
fix fpga booting
add ast2650 fpga config
remove dram initialization from platfrom.S
remove mac init from platform.S
Joel Stanley (7):
dts: ast2600-evb: Enable FSI masters
aspeed: Add machine names
tools: Add script for generating recovery image
configs: Add OpenBMC spl defconfig for AST2600 boards
clk: ast2600: Add divisor settings for 100MHz PLL
ram: ast2600: Enable device tree based DDR config
ast2600: tacoma: Run DDR at 1333
Johnny Huang (37):
otp: remove print process
otp: ignore data region last 2 dw when program
otp: program 2 dw then verify 2 dw when program data region
otp: skip print data info when no key
otp: set default value for otp strap programming
rng: add aspeed rng cmd
spl: fix duplicate define CONFIG_SYS_MONITOR_LEN
defconfig: cot: reduce spl code size
config: remove tftpput
secure boot: fix hace reset and compile warning
clk: rsa clock source set to hpll
update otp patch code
otp update
otp: udpate program
otp: udpate strap
otp: update strap program bit
otp: udpate strap read
otp: reduce the code
spl: ast2600: update secure boot flow
defconfig: ast2600: update spl config
spl: aspeed: fix ecc build
secure: update bl2 verify
secureboot: update bl3 verify
aspeed: emmc: support emmc boot
defconfig: support new boot flow
defconfig: rename ast2600a1 as defaut config
fix merge error
defconfig: aspeed: update ecc config for new boot flow
Revert "defconfig: aspeed: update ecc config for new boot flow"
defconfig: aspeed: update ecc config for new boot flow
otp: fix ast2600a1 info
defconfig: enable position independent to support boot from uart
config: enable CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK as default for ast2600
boot0: aspeed: add image size header for boot form sram
cmd: otp: udpate for ast2600a2
update ast2600a2 otp register setup
otp: fix compile warning and add strap info
Peter Robinson (1):
Remove redundant YYLOC global declaration
ryan_chen (40):
add link status
update gpio driver
fix i2c pinctrl
update sd/emmc controller source
update
add ibm platform
add kconfig for env
add ast2600 openbmc defconfig
fix env compile error
update pcie driver
mv to cmd/aspeed folder
update for mv cmd/aspeed folder
add pll test
update full test
update clk
add display port driver
add ast2600 defconfig
update mac info
update dp driver
update hclk setting
update axi ahb div cal
update dp firmwire
add more desciption about eMMC clk source
update file mode
update ast2400 have 32kbyte
add ast2400 ompatible
add ast2400
add reset for ast2400
add ast2400 include file
add ast2400 board
add ast2400 defconfig
add ast2400 pinctrl
update ast2400 reset
add ast2400 clk
add ast2400 defconfig
update ast2500
add mac for ast2400
add for ast2400
add ast2400 clk
Video format look-up table is updated for 640x480@85Hz
(From meta-aspeed rev: 9d5ae052312dc45a645dc5e7ab8a9daf4ef686d6)
Change-Id: I50a06ca91d86f4548d47e85e215ace4498c0c9a8
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Andrew Jeffery (5):
hwmon: (pmbus) Expose PEC debugfs attribute
pinctrl: aspeed: Format pinconf debug consistent with pinmux
pinctrl: aspeed: Use the right pinconf mask
pinctrl: aspeed-g6: Add bias controls for 1.8V GPIO banks
ARM: dts: rainier: Disable internal pull-downs on eMMC pins
(From meta-aspeed rev: c6a057b489fc7087f00abdbda682489e7a2e3318)
Change-Id: Ie4d9c5d6519e340fcd7cbca9a32d733f934a271f
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Change Iee340ffd294c4f40ba3360acd3f750d886865608 introduced a
machine feature which communicates to recipes if a hw random
number generator is present. Since the Aspeed chips have a
supported RNG, enable this MACHINE_FEATURE.
(From meta-aspeed rev: 57caacd62ae6037119be32c608be6ae4e548e639)
Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: I275ca0fc1445c782ea6b10e3807e3b339fead53b
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This includes security and bug fixes from the 5.8.6, 5.8.7 and 5.8.8
stable releases.
(From meta-aspeed rev: 3bad2091835b6054b7ba1a2f016b9c125a1ce440)
Change-Id: I4a1c370c1760ab0a273a88c836289b83e5ee44ca
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Enable I2C slave mode in ast2500 and ast2600 kernel config.
Eddie James (5):
dt-bindings: input: Add documentation for IBM Operation Panel
input: misc: Add IBM Operation Panel driver
i2c: aspeed: Mask IRQ status to relevant bits
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
(From meta-aspeed rev: 6204d930bc5b9df98192843227abac29946f75df)
Change-Id: I2b66eb5192fabb8562af2327ef5afe3ef3fc33d9
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This includes security and bug fixes from the 5.8.1, 5.8.2, 5.8.3,
5.8.4 and 5.8.5 stable releases.
(From meta-aspeed rev: d70b397ee265c7cd3d6e4678b86009e9d7127446)
Change-Id: Ieb305bf268a1044f1682992c3e1e0153aac08747
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Eddie James (1):
ARM: dts: Aspeed: Rainier: Enable XDMA engine
Vishwanatha Subbanna (2):
ARM: dts: aspeed: rainier: Add Operator Panel LEDs
ARM: dts: aspeed: rainier: Add directly controlled LEDs
(From meta-aspeed rev: f4c4262172c24e2727f51e6bc0518173fd45c0e4)
Change-Id: Iacca07cde2dceff014997ebcab980b7e65bce60a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Brad Bishop (4):
spi: fsi: Handle 9 to 15 byte transfers lengths
spi: fsi: Fix clock running too fast
spi: fsi: Fix use of the bneq+ sequencer instruction
eeprom: at25: Split reads into chunks and cap write size
Eddie James (3):
dt-bindings: fsi: fsi2spi: Document new restricted property
spi: fsi: Implement restricted size for certain controllers
spi: fsi: Check mux status before transfers
(From meta-aspeed rev: f4b7c1c8227d54a4b805479132b32227113c77d7)
Change-Id: I501829de26fba8d2bfd7440483015380192d2c50
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This updates the OpenBMC kernel tree to a 5.8 base. It has beent two
weeks since the kernel was last updated, making it the quickest bump in
OpenBMC history.
There are 93 out of tree kernel patches carried in the OpenBMC tree.
The defconfigs were updated to fix selection of video device. An
upstream reorganisation of the V4L kconfig resulted in a large number of
extra drivers enabled when all we required was VIDEO_ASPEED.
Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Andrew Geissler (1):
ARM: dts: tacoma: Add KCS node for LPC MCTP
Andrew Jeffery (13):
dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
pmbus (max31785): Add support for devicetree configuration
pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
pmbus (core): One-shot retries for failure to set page
pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
soc: aspeed: Miscellaneous control interfaces
ARM: dts: aspeed: witherspoon: Update max31785 node
ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
pinctrl: aspeed: Improve debug output
soc: aspeed: Fail probe of lpc-ctrl if reserved memory is not aligned
misc: Add ASPEED KCS driver for MCTP purposes
ARM: dts: witherspoon: Add KCS node for LPC MCTP
pinctrl: aspeed: Describe the heartbeat function on ball Y23
Ben Tyner (1):
ARM: dts: aspeed: witherspoon-128: Remove checkstop GPIO from gpio-keys definitions
Brad Bishop (4):
ARM: dts: aspeed-g6: Expose SuperIO scratch registers
soc: aspeed: lpc: Add G6 compatible strings
ipmi: aspeed-g6: Add compatible strings
reset: simple: Add AST2600 compatibility string
Cédric Le Goater (22):
mtd: spi-nor: aspeed: use command mode for reads
mtd: spi-nor: aspeed: add support for SPI dual IO read mode
mtd: spi-nor: aspeed: link controller with the ahb clock
mtd: spi-nor: aspeed: optimize read mode
mtd: spi-nor: aspeed: limit the maximum SPI frequency
mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
mtd: spi-nor: aspeed: add support for the 4B opcodes
mtd: spi-nor: Add support for w25q512jv
mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
mtd: spi-nor: aspeed: Introduce segment operations
mtd: spi-nor: aspeed: add initial support for ast2600
mtd: spi-nor: aspeed: Check for disabled segments on the AST2600
mtd: spi-nor: aspeed: Introduce training operations per platform
mtd: spi-nor: aspeed: Introduce a HCLK mask for training
mtd: spi-nor: aspeed: check upper freq limit when doing training
mtd: spi-nor: aspeed: add support for AST2600 training
mtd: spi-nor: aspeed: fix training of multiple CS on the AST2600
mtd: spi-nor: aspeed: Disable zero size segments on the AST2600
spi-nor: aspeed-smc: Detect 4b opcodes differently
/dev/mem: add a devmem kernel parameter to activate the device
Eddie James (11):
ARM: dts: rainier: Add KCS node for LPC MCTP
ARM: dts: aspeed: Add witherspoon-128 machine
dt-bindings: fsi: Add P10 OCC device documentation
fsi: occ: Add support for P10
hwmon: (occ) Add new temperature sensor type
i2c: fsi: Prevent adding adapters for ports without dts nodes
dt-bindings: soc: Add Aspeed XDMA Engine
soc: aspeed: Add XDMA Engine Driver
soc: aspeed: xdma: Add user interface
soc: aspeed: xdma: Add reset ioctl
leds: pca955x: Add an IBM software implementation of the PCA9552 chip
Fran Hsu (3):
ARM: dts: nuvoton: Add NPCM730 common device tree
ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
ARM: dts: nuvoton: Add Quanta GSJ BMC
George Hung (2):
dt-binding: edac: add NPCM ECC documentation
edac: npcm: Add Nuvoton NPCM7xx EDAC driver
Jae Hyun Yoo (12):
clk: ast2600: enable BCLK for PCI/PCIe bus always
dt-bindings: Add PECI subsystem document
Documentation: ioctl: Add ioctl numbers for PECI subsystem
peci: Add support for PECI bus driver core
dt-bindings: Add bindings document of Aspeed PECI adapter
ARM: dts: aspeed: Add PECI node
peci: Add Aspeed PECI adapter driver
dt-bindings: mfd: Add Intel PECI client bindings document
mfd: intel-peci-client: Add Intel PECI client driver
Documentation: hwmon: Add documents for PECI hwmon drivers
hwmon: Add PECI cputemp driver
hwmon: Add PECI dimmtemp driver
Joel Stanley (10):
ARM: dts: aspeed-g4: Expose SuperIO scratch registers
ARM: dts: nuvoton: Fix warnings in NPCM7xx common device tree
ARM: dts: nuvoton: Update EVB for new PECI layout
ARM: dts: nuvoton: evb: Rework enabling of nodes
soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600
ARM: dts: aspeed: ast2600evb: Add MAC0
soc: aspeed-lpc-ctrl: Fix printf warning
ARM: configs: aspeed: Update defconfigs
ARM: config: aspeed-g5: Enable I2C GPIO mux driver
ARM: config: aspeed: Fix selection of video device
mtd: spi-nor: sfdp: Revert "default to addr_width of 3 for configurable widths"
ARM: aspeed: g5: Do not set sirq polarity
Tomer Maimon (11):
dt-binding: bmc: Add NPCM7xx LPC BPC documentation
misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
dt-binding: bmc: add npcm7xx pci mailbox document
misc: mbox: add npcm7xx pci mailbox driver
dt-binding: net: document NPCM7xx EMC DT bindings
net: npcm: add NPCM7xx Ethernet MAC controller
ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
ARM: dts: npcm7xx: Update device tree
arm: dts: Add NPCM7xx RunBMC Olympus Quanta machine.
dt-bindings: peci: add NPCM PECI documentation
peci: npcm: add NPCM PECI driver
(From meta-aspeed rev: 3c9616235643263beea47ef5db5cecafa3349c2e)
Change-Id: I4616f47026e00e49bda0abb1fc586dd2faabee30
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Somehow this was not enabled. It is required for Witherspoon 128, Tacoma
and Rainier.
(From meta-aspeed rev: a7bbd475453768037877c820caed02f39055eb6e)
Change-Id: Ie80479aa455c18c921387b23586cff3e7bc79204
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Zane reported that gcc 10 will fail to build the branch. This is the
upstream fix.
Peter Robinson (1):
Remove redundant YYLOC global declaration
(From meta-aspeed rev: 6630a1310fd9b17abdd8fca73f5c22fc346f9c8a)
Change-Id: Ie72bb58c5c7684e42951e80ce6f80e98ef4f15fe
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This includes security and bug fixes from the 5.7.11 and
5.7.12 stable releases.
(From meta-aspeed rev: ea33f9ced2354a75d8918a3c7e61ca56f67e21df)
Change-Id: Iaa9bd005a8897ab5e9a1148145c02d6fbb8603fa
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Populate the hostfw partition by specifying the directory to be
used as source for the filesystem. This directory is populated
by a bbappend to the hostfw recipe.
(From meta-aspeed rev: 37f30af4e377a6bc2d3c47ca435798969321f566)
Change-Id: Id64e0ac6a5082be2b3ad689a6b323da8eb094e69
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Ben Tyner (1):
Remove checkstop GPIO from gpio-keys definitions
Eddie James (9):
mmc: sdhci-of-aspeed: Fix clock divider calculation
fsi: master: Add boolean parameter to link_enable function
fsi: core: Disable link when slave init fails
fsi: core: Set slave local bus ownership during init
ARM: dts: aspeed: rainier: Switch OCCs to P10
ARM: dts: aspeed: rainier: Enable EHCI controller
ARM: dts: Aspeed: tacoma: Enable EHCI controller
fsi: master: Remove link enable read-back
ARM: dts: aspeed: rainier: Add CFAM SPI controllers
Joel Stanley (2):
mmc: sdhci-of-aspeed: Revert "Prevent clock divider of zero"
ARM: dts: aspeed: rainier: Add FSI I2C masters
(From meta-aspeed rev: 4171a5eaa18f59cd4eef7d5dd1e7c8e548e2f78e)
Change-Id: I9aaf5fd3cbf6ba1ab7acf6dbc66588b6367f1049
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Some platforms make use of it.
(From meta-aspeed rev: 132487e2ee60e4b167c07fb63093e0ac493a3fbb)
Change-Id: I8752df5f9b4b195e605676a398cfdf1510b11008
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Andrew Jeffery (1):
ARM: dts: rainier: Describe GPIO mux on I2C3
Joachim Fenkes (2):
fsi/sbefifo: Clean up correct FIFO when receiving reset request from SBE
fsi/sbefifo: Fix reset timeout
Joel Stanley (4):
ARM: config: aspeed-g5: Enable I2C GPIO mux driver
fsi: aspeed: Support CFAM reset GPIO
ARM: dts: aspeed: rainier: Add CFAM reset GPIO
ARM: dts: aspeed: tacoma: Add CFAM reset GPIO
(From meta-aspeed rev: ee96b77b00dbbc7cbf598dde0008c2ba96eb8d28)
Change-Id: Ie73ef89d795e49a8f9bbef11261ae78d2b986e4a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This includes security and bug fixes from the 5.7.10 stable release.
(From meta-aspeed rev: 69ec802b7b04b61203c81778f695a9dad7a2d0d4)
Change-Id: I63b8b9773b0d49114e892bd0d57b95e6ad8cc516
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Joel Stanley (1):
spi-nor: Remove unused file
(From meta-aspeed rev: 7e2a5cd6ae49c669168c18e897d87e29a9b9244b)
Change-Id: I7489f4a9bc3e8018830956a019b0ad24c1cc2a7f
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This updates the OpenBMC kernel tree to a 5.7 base. It has been three
releases since the kernel was updated, making it over 9 months of
development time. The stable releses up to v5.7.9 are integrated in this
bump.
There are 106 out of tree kernel patches carried in the OpenBMC tree.
The defconfigs are regenerated with one change made to enable debugfs,
as it will default to off with the new kernel without explicitly
enabling it, and some platforms (eg Witherspoon) reply on it being
enabled.
Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Andrew Geissler (1):
ARM: dts: tacoma: Add KCS node for LPC MCTP
Andrew Jeffery (14):
dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
pmbus (max31785): Add support for devicetree configuration
pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
pmbus (core): One-shot retries for failure to set page
pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
soc: aspeed: Miscellaneous control interfaces
ARM: dts: aspeed: witherspoon: Update max31785 node
ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
pinctrl: aspeed: Improve debug output
soc: aspeed: Fail probe of lpc-ctrl if reserved memory is not aligned
misc: Add ASPEED KCS driver for MCTP purposes
ARM: dts: witherspoon: Add KCS node for LPC MCTP
pinctrl: aspeed: Describe the heartbeat function on ball Y23
ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP
Ben Tyner (2):
ARM: dts: aspeed: rainier: Add line-name checkstop
ARM: dts: aspeed: tacoma: Remove checkstop gpio-key
Brad Bishop (4):
ARM: dts: aspeed-g6: Expose SuperIO scratch registers
soc: aspeed: lpc: Add G6 compatible strings
ipmi: aspeed-g6: Add compatible strings
reset: simple: Add AST2600 compatibility string
Cédric Le Goater (22):
mtd: spi-nor: aspeed: use command mode for reads
mtd: spi-nor: aspeed: add support for SPI dual IO read mode
mtd: spi-nor: aspeed: link controller with the ahb clock
mtd: spi-nor: aspeed: optimize read mode
mtd: spi-nor: aspeed: limit the maximum SPI frequency
mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
mtd: spi-nor: aspeed: add support for the 4B opcodes
mtd: spi-nor: Add support for w25q512jv
mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
mtd: spi-nor: aspeed: Introduce segment operations
mtd: spi-nor: aspeed: add initial support for ast2600
mtd: spi-nor: aspeed: Check for disabled segments on the AST2600
mtd: spi-nor: aspeed: Introduce training operations per platform
mtd: spi-nor: aspeed: Introduce a HCLK mask for training
mtd: spi-nor: aspeed: check upper freq limit when doing training
mtd: spi-nor: aspeed: add support for AST2600 training
mtd: spi-nor: aspeed: fix training of multiple CS on the AST2600
mtd: spi-nor: aspeed: Disable zero size segments on the AST2600
spi-nor: aspeed-smc: Detect 4b opcodes differently
/dev/mem: add a devmem kernel parameter to activate the device
Eddie James (21):
ARM: dts: rainier: Add KCS node for LPC MCTP
ARM: dts: aspeed: Add witherspoon-128 machine
fsi: aspeed: Enable 23-bit addressing
clk: ast2600: Fix AHB clock divider for A1
dt-bindings: fsi: Add P10 OCC device documentation
fsi: occ: Add support for P10
hwmon: (occ) Add new temperature sensor type
i2c: fsi: Fix the port number field in status register
i2c: fsi: Prevent adding adapters for ports without dts nodes
ARM: dts: aspeed: rainier: Add second cfam on the hub
dt-bindings: soc: Add Aspeed XDMA Engine
soc: aspeed: Add XDMA Engine Driver
soc: aspeed: xdma: Add user interface
soc: aspeed: xdma: Add reset ioctl
ARM: dts: aspeed: ast2600: Update XDMA engine node
ARM: dts: aspeed: ast2500: Update XDMA engine node
ARM: dts: aspeed: witherspoon: Enable XDMA engine
ARM: dts: aspeed: tacoma: Enable XDMA engine
clk: AST2600: Add mux for EMMC clock
mmc: sdhci-of-aspeed: Prevent clock divider of zero
leds: pca955x: Add an IBM software implementation of the PCA9552 chip
Fran Hsu (3):
ARM: dts: nuvoton: Add NPCM730 common device tree
ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
ARM: dts: nuvoton: Add Quanta GSJ BMC
George Hung (2):
dt-binding: edac: add NPCM ECC documentation
edac: npcm: Add Nuvoton NPCM7xx EDAC driver
Jae Hyun Yoo (12):
clk: ast2600: enable BCLK for PCI/PCIe bus always
dt-bindings: Add PECI subsystem document
Documentation: ioctl: Add ioctl numbers for PECI subsystem
peci: Add support for PECI bus driver core
dt-bindings: Add bindings document of Aspeed PECI adapter
ARM: dts: aspeed: Add PECI node
peci: Add Aspeed PECI adapter driver
dt-bindings: mfd: Add Intel PECI client bindings document
mfd: intel-peci-client: Add Intel PECI client driver
Documentation: hwmon: Add documents for PECI hwmon drivers
hwmon: Add PECI cputemp driver
hwmon: Add PECI dimmtemp driver
Joel Stanley (13):
ARM: dts: aspeed-g4: Expose SuperIO scratch registers
ARM: dts: nuvoton: Fix warnings in NPCM7xx common device tree
ARM: dts: nuvoton: Update EVB for new PECI layout
ARM: dts: nuvoton: evb: Rework enabling of nodes
soc: aspeed-lpc-ctrl: LPC to AHB mapping on ast2600
fsi: aspeed: Support cabled FSI
fsi: aspeed: Run the bus at maximum speed
fsi: aspeed: Add module param for bus divisor
ARM: dts: aspeed: ast2600evb: Add MAC0
ARM: configs: aspeed: Update defconfigs
hwmon (peci-dmmtemp): Fix 'sizeof' warning
soc: aspeed-lpc-ctrl: Fix printf warning
Revert "ARM: dts: aspeed: tacoma: Add gpio-key definitions"
Tomer Maimon (11):
dt-binding: bmc: Add NPCM7xx LPC BPC documentation
misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
dt-binding: bmc: add npcm7xx pci mailbox document
misc: mbox: add npcm7xx pci mailbox driver
dt-binding: net: document NPCM7xx EMC DT bindings
net: npcm: add NPCM7xx Ethernet MAC controller
ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
ARM: dts: npcm7xx: Update device tree
arm: dts: Add NPCM7xx RunBMC Olympus Quanta machine.
dt-bindings: peci: add NPCM PECI documentation
peci: npcm: add NPCM PECI driver
(From meta-aspeed rev: a1d8d7791b8257b85eb85d73f08c2961c8c94f16)
Change-Id: I84ae1a28349144db398b7a43e0a2951c1eee434d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Generate a default environment to boot an eMMC based on a txt
file. Populate the generated environment image into the eMMC.
(From meta-aspeed rev: fdc603c73b2dc8851ce2d1684e9c71a5ce51a5b8)
Change-Id: I93944b183b7907202b02854e931593d62603ae77
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Create a fw_env.config for eMMC with a redundant environment
based on the mmc distro feature. The environment is located in
the first eMMC partition in the User Data area.
(From meta-aspeed rev: 3aa2db46e8097aa0a9627684686ca56b5d6b9872)
Change-Id: I6e768e308f03513c6cf394a0adc7110d17322d49
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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|
The U-Boot SPL and U-Boot proper would be programmed to the
Boot Area Hardware Partitions of the eMMC. The kernel and user
space would go into the User Data Area. This commit creates an
image that can be programmed into that User Data Area. Layout:
--- - ----- -------- -------- ----- ------- ------ -------- -------
|GPT| | env | boot-a | boot-b | fs-a | fs-b | rwfs | hostfw |GPT-sec|
--- - ----- -------- -------- ------ ------ ------ -------- -------
^ 1MB 64MB 64MB 1GB 1GB 7GB 5GB
|
0x5000
Primary GPT size (Beginning of image):
512B (Protective MBR) + 512B (Primary Header) + 16KB (Primary Table)
First partition (u-boot-env) is 4K-aligned, which puts it at offset 0x5000
Secondary GPT size (End of image):
16KB (Secondary Table) + 512B (Secondary Header)
Since the secondary GPT is expected to be at the end of the device,
the initramfs can issue a "sgdisk -e /dev/mmcblk0" on first boot
to move it to the end.
The first partition holds the U-Boot environment. The following two
partitions hold a filesystem with the fitImage file. Code update
would reflash the full filesystem with the fitImage during an update.
U-Boot can then be programmed to look for the kernel in partitions
boot-a or boot-b.
The remaining is a set of ext4 filesystems for user space, read-write,
and host firmware.
The size for the host firmware partition is configurable to be able
to build an image of different size. The reason is that the tacoma
system is has a User Data area just 1GB smaller than rainier.
Design doc: https://gerrit.openbmc-project.xyz/c/openbmc/docs/+/28443
Tested: Adding "WKS_HOSTFW_SIZE = "4G"" to the tacoma.conf file
created a 14GB wic file:
$ ls -lh *wic
-rw-r--r-- 1 anoo 532919 15G Jul 14 08:18 obmc-phosphor-image-rainier.wic
-rw-r--r-- 1 anoo 532919 14G Jul 14 08:36 obmc-phosphor-image-witherspoon-tacoma.wi
$ wic ls obmc-phosphor-image-rainier.wic
Num Start End Size Fstype
...
7 9798963200 15167672319 5368709120 ext4
$ wic ls obmc-phosphor-image-witherspoon-tacoma.wic
Num Start End Size Fstype
...
7 9798963200 14093930495 4294967296 ext4
(From meta-aspeed rev: b8a647297e3f9fe724f8ee1736bb9da3806d788e)
Change-Id: I18b8a15ac8eddb6abfbc7b70429ef45ffc170d9a
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Needed for SPI-attached eeproms.
(From meta-aspeed rev: b64781c123543c5cbfecb81d974e82716545b099)
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Change-Id: I5a931b742661d62790199afdd20dac5ef5935ad3
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.45, 5.4.46, 5.4.47 and
5.4.48 stable releases.
(From meta-aspeed rev: c3bc610a79d6b35f6b3c1707c86ca89922a4fad5)
Change-Id: I2839dcb68dbb1ed011adf236352add86e7e50d09
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Eddie James (1):
ARM: dts: aspeed: rainier: Add second cfam on the hub
Joel Stanley (1):
ARM: dts: aspeed: ast2600evb: Add MAC0
(From meta-aspeed rev: d13ebb3c7ca5dabd083bfa4d7dfa1897e9b77048)
Change-Id: I9b4b1e70b67f6017f736cac85f010c8f3a4ba69e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Alejandro Enedino Hernandez Samaniego (1):
libfdt: Make it compatible with newer dtc
(From meta-aspeed rev: 724b95b0ed5b41f28b2f5926c209dace73a9b336)
Change-Id: I9ca8614fe5127e6875386745780ca3c3c607d168
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.44 stable release.
(From meta-aspeed rev: ec813222ab8916603ce96d76f99c967d6d67110b)
Change-Id: I911e44daeee1c8c507b744a002979cd82c5a114b
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Ben Pai (1):
ARM: dts: aspeed: mihawk: Add aliases for i2c and add thermal sensor
Ben Tyner (2):
ARM: dts: aspeed: rainier: Add line-name checkstop
ARM: dts: aspeed: tacoma: Remove checkstop gpio-key
Eddie James (5):
i2c: fsi: Fix the port number field in status register
i2c: fsi: Prevent adding adapters for ports without dts nodes
dt-bindings: soc: aspeed: xdma: Update to v11 upstream
soc: aspeed: xdma: Update to v11 upstream
ARM: dts: aspeed: Update XDMA to v11 upstream properties
(From meta-aspeed rev: 6b226ab7f77c76db68e3d9e70b0f1a5c1dde514d)
Change-Id: I272058c5e0dd5ca12b17379d1bf4f94f5a7ba290
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.40, 5.4.41, 5.4.42,
and 5.4.43 stable releases.
(From meta-aspeed rev: e491b87b48ae956b3b40cc93a1a4102a0841f8b1)
Change-Id: I23cc7318d2d28e6dff73ebf2fd4707702fe3c382
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.39 stable release.
It also includes a revert of the inital workaround for interrupt
behaviour on AST2600's I2C master as 5.4.39 contains an upstream fix.
Joel Stanley (1):
i2c: aspeed: Revert initial IRQ workaround
(From meta-aspeed rev: ac403399d5fbed4eba4a1587c9cfc2bb30cfd07a)
Change-Id: I84376e84e55ce22498442f3d24877805ec22c8d6
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Joel Stanley (1):
ARM: dts: aspeed: rainier: System has one SPI NOR
(From meta-aspeed rev: 963da65de5c17145cf34c5bc82376cf3a67f4ae0)
Change-Id: I5e465b08a33cdecaf40cde0f024e88a7856b9728
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.33, 5.4.34, 5.4.35,
5.4.36, 5.4.37 and 5.4.38 stable releases.
(From meta-aspeed rev: 60604033e4584eee4958a8b025a4b51e13a99638)
Change-Id: I64558ff2aca67b1b9c75df026a496fb5a7308d67
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Andrew Jeffery (2):
pinctrl: aspeed: Describe the heartbeat function on ball Y23
ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPP
Eddie James (3):
dt-bindings: fsi: Add P10 OCC device documentation
fsi: occ: Add support for P10
hwmon: (occ) Add new temperature sensor type
(From meta-aspeed rev: 8b46bfecbdc8b22b1cb4b9441666b1345fc8dadf)
Change-Id: I86124c57eb821cc2bf268c110802946bac5d043e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
The u-boot.inc from upstream has been moved into this repository as
its upstream version is no longer compatible with openbmc/u-boot.
See commit 9052e5b for more details.
Some notes on attempting to get upstream to work. Got to issue 3 and
decided that instead of trying to cherry-pick in specific fixes from
upstream, we're going to need a full rebase. Until this is possible, I
think our best option is to just use the .inc from the working version
of poky which is what u-boot-aspeed.inc is.
1) Build directory (B) def moved to common .inc
Define BUILD directory in u-boot-common-aspeed-sdk_2019.04.inc
recipes-bsp/u-boot/u-boot-common-aspeed-sdk_2019.04.inc
+B = "${WORKDIR}/build"
2) Support in Makefile for new u-boot-initial-env file
Pull in the following commit:
https://github.com/u-boot/u-boot/commit/bdaa73a5b3923257add182b4ab8058dbfa33421b
Available in my fork:
https://github.com/geissonator/u-boot/tree/v2019.04-aspeed-openbmc-u-boot-initial-env-fix
3) CONFIG_DEFAULT_DEVICE_TREE needed
| arm-openbmc-linux-gnueabi-objcopy --gap-fill=0xff -j .text -j .secure_text -j .secure_data -j .rodata -j .hash -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn -j .binman_sym_table -j .text_rest -j .dtb.init.rodata -j .efi_runtime -j .efi_runtime_rel -O binary u-boot u-boot-nodtb.bin
| make -f /home/andrewg/Code/openbmc/build/tmp/work/witherspoon_tacoma-openbmc-linux-gnueabi/u-boot-aspeed-sdk/1_v2019.04+gitAUTOINC+58583dd97d-r0/git/scripts/Makefile.build obj=arch/arm/dts dtbs
| test -e arch/arm/dts/unset.dtb || ( \
| echo >&2; \
| echo >&2 "Device Tree Source is not correctly specified."; \
| echo >&2 "Please define 'CONFIG_DEFAULT_DEVICE_TREE'"; \
| echo >&2 "or build with 'DEVICE_TREE=<device_tree>' argument"; \
| echo >&2; \
(From meta-aspeed rev: cd159fccefe991336e798da35ed5a2b0abf27e62)
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I1d28bd1125fe5acb1e644a751e44c65772892d0c
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Changbin Du (1):
perf: Make perf able to build with latest libbfd
Eddie James (2):
dt-bindings: fsi: Add FSI2SPI bindings
spi: Add FSI-attached SPI controller driver
Joel Stanley (1):
ARM: confisgs: aspeed_g5: Sync with OpenBMC
(From meta-aspeed rev: 29b354d091e668d00598d0ef05f070f73c91c0df)
Change-Id: I6fe69e32f460d0aeb41fe14b4e87ef95f6cb436e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
(From meta-aspeed rev: 31cde1a9933517f545e23e6a539349eaa92e903f)
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: Ic1e0aa287e911953764b4356ebfed0d400b987b9
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
The latest upstream of oe-core has diverged to the point where the
meta-aspeed layer can no longer utilize the shared u-boot.inc
In particular it has introduced a new, buildable config file,
u-boot-initial-env, which is referenced throughout the u-boot.inc file
now.
The best solution is that OpenBMC upstream the changes it requires for
u-boot but resource constraints have prevented that.
The current hybrid approach of using a 2016 version of u-boot, pointing
to source code in openbmc/u-boot but continuing to use the upstream
u-boot.inc really doesn't buy much and causes maintenance issues like
we're seeing here. Best to just pull the working version into
meta-aspeed and just cherry pick in the one change OpenBMC needs which
is the move to python3. The python3 move will be in the next commit in
this series.
The u-boot.inc used here was from poky with this sha:
9052e5b32a0dbc810782be4963e775609b8dcc04
Resolves openbmc/u-boot#24
(From meta-aspeed rev: 8b3d81d7cd9dd0254c3b03dddad18b9e74d2975d)
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I8af2eddfa6690b840af9fc411814fb551cc25230
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This works around an intermittent boot failure seen on Tacoma1z.
Joel Stanley (6):
aspeed: Add machine names
tools: Add script for generating recovery image
configs: Add OpenBMC spl defconfig for AST2600 boards
clk: ast2600: Add divisor settings for 100MHz PLL
ram: ast2600: Enable device tree based DDR config
ast2600: tacoma: Run DDR at 1333
(From meta-aspeed rev: e63dd680abed78dc2b2126c6fcbf3497c35ae18b)
Change-Id: I0a2f17d242f3312592fb975fa4231237102ea517
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Andrew Geissler (1):
ARM: dts: aspeed: rainier: Add gpio line names
Eddie James (1):
clk: ast2600: Fix AHB clock divider for A1
Joel Stanley (2):
fsi: aspeed: Run the bus at maximum speed
fsi: aspeed: Add module param for bus divisor
(From meta-aspeed rev: ae8c8b5c2c8db832831ad9291faf0b6ed8224379)
Change-Id: I5dd7d6a233969cb4bcb69ba65ce2ca7b334f8f5b
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
The recipe was first created with the make target set to
u-boot.bin because there were some compilation errors.
These errors are not seeing anymore. By removing the u-boot.bin
target and allowing it to be the default (all), other targets
like u-boot-spl.bin can be automatically built based on the
defconfig.
(From meta-aspeed rev: 08e8e7430606d712d8ab3630cbdc650f71caf280)
Change-Id: If643afcfe6a9cdea63dd0d8011f6f2af8e287079
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.28, 5.4.29, 5.4.30,
5.4.31 and 5.4.32 stable releases.
(From meta-aspeed rev: 03423fdeee77ec940bbafd7b049d4067e6fea80c)
Change-Id: I095a9fab81a0cad09f20324e27db12a690ca9b1a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
The TPM TIS driver for I2C comes from v6 of the patchset on the
linux-integrity list[1], plus additional backports to support it on 5.4.
https://lore.kernel.org/linux-integrity/20200407162044.168890-1-amirmizi6@gmail.com/T/
Amir Mizinski (7):
tpm: tpm_tis: Make implementation of read16 read32 write32 optional
tpm: tpm_tis: Add check_data handle to tpm_tis_phy_ops
tpm: tpm_tis: rewrite "tpm_tis_req_canceled()"
tpm: tpm_tis: Fix expected bit handling and send all bytes in one shot without last byte in exception
tpm: Handle an exception for TPM Firmware Update mode.
dt-bindings: tpm: Add YAML schema for TPM TIS I2C options
tpm: tpm_tis: add tpm_tis_i2c driver
Andrew Jeffery (1):
ARM: dts: tacoma: Enable the second VUART
Eddie James (1):
ARM: dts: aspeed: tacoma: Add tpm
Sumit Garg (1):
tpm: Move tpm_buf code to include/linux/
(From meta-aspeed rev: 1aaea9d85026a6eda21dc9f817d4d0afa703d39e)
Change-Id: I294e61124bccd0a62a5f61d7d8624044fbf74b75
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
(From meta-aspeed rev: cc14885f5d983ff0e3f5ad65e17790e3359fa778)
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Change-Id: I9a507f1acaf3edad59ddf100f79fb3652788b3f5
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This option is considered a security enhancement[1].
[1] https://lore.kernel.org/lkml/20200324153643.15527-11-will@kernel.org/
(From meta-aspeed rev: bc75bf104e650e38907265cb7d9396dfe3f599c0)
Change-Id: I35a4f9b63ac053dcfc3d22eb1b12b11019196f00
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
Eddie James (5):
fsi: aspeed: Enable 23-bit addressing
ARM: dts: aspeed: tacoma: Add iio-hwmon nodes for IIO devices
hwmon: (pmbus/ibm-cffps) Add another PSU CCIN to version detection
hwmon: (pmbus/ibm-cffps) Fix LED behavior again
soc: aspeed: xdma: Fix command buffer overrun
Joel Stanley (2):
ARM: dts: aspeed: rainier: Add VGA reserved memory region
ARM: dts: aspeed: raininer: Enable XDMA
(From meta-aspeed rev: 6e60548f439e07806f3089a611f801ac85238f0b)
Change-Id: I848095fb60f8a2e364e6ba939466cf834d3a31e3
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
|
|
This includes security and bug fixes from the 5.4.27 and 5.4.28 stable
releases.
(From meta-aspeed rev: 048aaa997f7ade428154f4457cdf5b25e16f5f65)
Change-Id: I5abb494b6ab7acb5edf2060e568c7c580bf3ca24
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Andrew Geissler (3):
ARM: dts: tacoma: Add KCS node for LPC MCTP
ARM: dts: aspeed: romulus: Add gpio line names
ARM: dts: aspeed: zaius: Add gpio line names
Andrew Jeffery (2):
misc: Add ASPEED KCS driver for MCTP purposes
ARM: dts: witherspoon: Add KCS node for LPC MCTP
Eddie James (7):
ARM: dts: rainier: Add KCS node for LPC MCTP
soc: aspeed: xdma: Switch to reserved memory
dt-bindings: soc: xdma: Switch to reserved memory node
ARM: dts: aspeed: tacoma: Add reserved memory for XDMA
ARM: dts: aspeed: witherspoon: Add reserved memory for XDMA
ARM: dts: aspeed: ast2600: Set arch timer always-on
ARM: dts: Aspeed: Add witherspoon-128 machine
Joel Stanley (3):
ARM: dts: aspeed: tacoma: Add GPIOs for FSI
fsi: aspeed: Support cabled FSI
ARM: dts: aspeed: tacoma: Add line names
(From meta-aspeed rev: 22600b6fc6d6bdcf33407b7cf8d32b8c09a713e7)
Change-Id: I9251473c0a5b4601845d3c0d588b5a3bdb1d4f40
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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CONFIG_CRYPTO_ECHAINIV is default n so we don't need it in our config.
CONFIG_EDAC_ASPEED is not supported on AST2600.
(From meta-aspeed rev: 337c8064630d95aa7d7cc5d948bd99e72cfa3af8)
Change-Id: Ief0ebacbd2b9ed2d8f8dce7eb4c4828da0ae58d3
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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