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ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into update
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This includes security and bug fixes from the 5.3.11 stable release.
(From meta-aspeed rev: 600115a9ea0f149133aa57fb74e1df85de5f539a)
Change-Id: I2c77fd292ed926f040fd84b3f4185a4745ba18e0
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Eddie James (4):
hwmon: (pmbus/ibm-cffps) Switch LEDs to blocking brightness call
hwmon: (pmbus/ibm-cffps) Fix LED blink behavior
hwmon: (pmbus/ibm-cffps) Add version detection capability
ARM: dts: aspeed: rainier: Switch PSUs to unknown version
(From meta-aspeed rev: 550a844a351d7ea7839be2694183494704135ac0)
Change-Id: I993055b81988301100f6caf4ec4807a08d56f07a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.3.9 and 5.3.10 stable
releases.
(From meta-aspeed rev: f9f133f38f91fa0dec84231d3adb218107ca95b9)
Change-Id: Ida28b36e9f23c4499396f5c71024590823d556d5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Joel Stanley (2):
ARM: dts: aspeed: ast2600evb: Enable i2c buses
watchdog: aspeed: Fix clock behaviour for ast2600
(From meta-aspeed rev: 66f4afb68e1d595e5d9ed71d2a117c9997875273)
Change-Id: If5a825dcb180c47271f77e14a8752923f4dd2507
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Joel Stanley (4):
ARM: dts: aspeed-g6: Add timer description
clocksource: fttmr010: Parametrise shutdown
clocksource: fttmr010: Set interrupt and shutdown
clocksource: fttmr010: Add support for ast2600
(From meta-aspeed rev: 1ceef9cd25228b5a24999ba0219450c6dce9b094)
Change-Id: I3c7c2ea9e48a732241a1123b1b86bb7ef1b6c669
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (2):
fsi: aspeed: Fix OPB0 byte order register values
trace: fsi: Print transfer size unsigned
Joel Stanley (8):
fsi: aspeed: Implement byte and half word writes
fsi: aspeed: Implement byte and half word reads
fsi: move defines to common header
fsi: aspeed: Fix types in debugfs
fsi: aspeed: Fix link enable
fsi: aspeed: Fix whitespace in check_errors
fsi: aspeed: Use defines for port reset
fsi: aspeed: Clean up defines and documentation
(From meta-aspeed rev: 0ee4f43eb4d886802161e70891b44093376c3985)
Change-Id: I999c1c0437ee501a0c38808763a7137b67af7c2a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Benjamin Herrenschmidt (1):
net: ethernet: ftgmac100: Fix DMA coherency issue with SW checksum
Brandon Wyman (1):
ARM: dts: aspeed: rainier: gpio-keys for PSU presence
Jinu Thomas (1):
ARM: dts: aspeed: rainier: Fix i2c eeprom size
(From meta-aspeed rev: a630d667ca26dc6e851062e94ac9690e40b21c17)
Change-Id: Iad580235e816ef5ed989f9940e789a02b591a8e7
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.3.8 stable release.
(From meta-aspeed rev: 31ca43512e524cc22b7b4bfb23c5307839043207)
Change-Id: I1c8099434f960384782339a5a6f5ace48e95d6b1
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Jeremy Kerr (1):
fsi: aspeed: Add clock debugfs file
Joel Stanley (8):
fsi: aspeed: Give read longer before timeout
fsi: aspeed: Add more registers to debug
fsi: aspeed: Busy loop in the write case
fsi: master: Change default divisor to 14
fsi: aspeed: Enable relative addressing
fsi: aspeed: Only select OPB0 once
fsi: aspeed: Avoid copying read data twice
fsi: aspeed: Pass fsi_master_aspeed insead of base
(From meta-aspeed rev: 0bf3d3a2b28adf528c45b4a04398b1ab16c4b286)
Change-Id: Ic35fee641adee65f7259ff190906cd4e68ac9205
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into update
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Andrew Jeffery (4):
pinctrl: aspeed-g6: Make SIG_DESC_CLEAR() behave intuitively
pinctrl: aspeed-g6: Fix LPC/eSPI mux configuration
ARM: dts: tacoma: Hog LPC pinmux
pinctrl: aspeed: Improve debug output
(From meta-aspeed rev: 64725b11caff553e1677dc90d8a630d07d04eaaa)
Change-Id: Ib3e405b0a3aebe7501b3505a86266201fe3219b0
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Add words to the layer README. The existing README is somewhat terse.
Expand it some, adopting some of the conventions from other well-known
OE BSP layers (used meta-freescale as a template).
Drop references to specific products. This reduces maintainence burden.
Added layer dependencies. meta-aspeed depends on oe-core only.
Add contributing guidelines and style guide.
(From meta-aspeed rev: 5e3e6fb63cbc700214fb3354363d93a5fa4246df)
Change-Id: Ib4ec545c7fe5069893090516232fc2d9c666c2c8
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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ssh://git-amr-1.devtools.intel.com:29418/openbmc-openbmc into HEAD
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This includes security and bug fixes from the 5.3.7 stable release.
(From meta-aspeed rev: 1a069d304738df04abb81cdc53661c67abf0581d)
Change-Id: If7b4410ba297fbf63c3f4aa861f138fb79cf449a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (1):
soc: aspeed: Fail probe of lpc-ctrl if reserved memory is not aligned
Joel Stanley (6):
ARM: dts: aspeed-g6: Add remaining UARTs
ARM: dts: aspeed: tacoma: Add UART1 and workaround
ARM: dts: ast2600evb: Enable UART workaround
ARM: dts: aspeed: tacoma: Add host FSI description
ARM: dts: aspeed: tacoma: Use 64MB for firmware memory
fsi: aspeed: Disable IPOLL
(From meta-aspeed rev: 0605807409ed3324931aca468e82abea3d163dec)
Change-Id: I43be15fa831dfcbdba77c66ac03eff8e7050bdc7
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Joel Stanley (3):
fsi: aspeed: Remove base from trace
fsi: aspeed: Add trace when error occurs
ARM: dts: aspeed-g6: Fix i2c clock source
(From meta-aspeed rev: 7db0a3de8d889fd0addfb6ed35d595ffda646c67)
Change-Id: I9bb353f263bea3168097cdb0ea16961e2d0bcb47
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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These udev rules are useful outside of fw_printenv, which is how we
currently include them, so bring them in with the common machine type.
(From meta-aspeed rev: 1a7cc4767eb0393bb615ae67e4b388163aa5dc48)
Signed-off-by: Joel Stanley <joel@jms.id.au>
Change-Id: I0779fc4c2efd0e18d7729cef4548238e56c39a47
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.3.5 stable release.
(From meta-aspeed rev: e12735058c5043a9b635b8ec4a102e66b1fccc99)
Change-Id: I0f7710cffcf6957927ca0e01e7cb11d008b0cd40
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Userspace has not yet adapted to the new layout. This should be
re-enabled in the future when pdbg has gained support for the /dev/fsi/
layout in a release.
(From meta-aspeed rev: 6d2917deee778a66dc4c7fb06b869197430b7664)
Change-Id: Ib9a0fb6ca18c50ec7dae9c7d482b385ed5f6af44
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Alexander Filippov (1):
ARM: dts: vesnin: Add power_green led
Andrew Jeffery (1):
ARM: dts: aspeed: Migrate away from aspeed, g[45].* compatibles
Eddie James (1):
fsi: aspeed: Add debugfs entries
(From meta-aspeed rev: 1711ea82efc783620a5f00720a8a8bf88494ceea)
Change-Id: I31d72a616ee0180353edd037241f42f1bfc4cb8e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Eddie James (2):
ARM: dts: Aspeed: Tacoma: Add gpio-key definitions
ARM: dts: Aspeed: Tacoma: Add watchdog definitions
(From meta-aspeed rev: feb281f50d1867549272667deb56208e6eac8c35)
Change-Id: I3c32d038801413e11b71d326b61cb7c4e2737834
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.3.2, 5.3.3, 5.3.4 and
5.3.5 stable releases.
(From meta-aspeed rev: 050d1393f2b8254958a069e20ac135e93ce03a19)
Change-Id: Idbde30a1ed0cd57e7abd7906095e9ab5f8a080e4
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Joel Stanley (5):
clk: ast2600: Fix enabling of clocks
ARM: dts: aspeed-g6: Add VUART descriptions
ARM: dts: aspeed: tacoma: Enable VUART1
ARM: dts: tacoma: Remove incorrect i2c buses
ARM: dts: tacoma: Enable LPC Firmware region
(From meta-aspeed rev: 5463a8aefd99c9302d6bf40380265c2822a3b9e1)
Change-Id: If912f33a59f4d4c65fbd82421ce268803972790c
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (1):
ARM: dts: aspeed: tacoma: Enable iBT device
Joel Stanley (1):
usb: gadget: Quieten gadget config message
(From meta-aspeed rev: 5d1af51495b016e385a6a2164d38770939226f11)
Change-Id: I78a4267d9a974b640acd07f5388e5885194cadf9
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Cédric Le Goater (3):
mtd: spi-nor: aspeed: fix training of multiple CS on the AST2600
mtd: spi-nor: aspeed: Disable zero size segments on the AST2600
ARM: dts: aspeed: tacoma: Re-enable CS1
Ivan Mikhaylov (1):
watchdog: aspeed: add support for dual boot
(From meta-aspeed rev: 3369549492bf6b40f90cf14381ffc35e66250639)
Change-Id: Ia95b3ba3f1ba8a12d99660a458eb54cd2b1ddf73
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The OpenBMC kernel g5 defconfig supports both g5 and g6. Use the g5
defconfig from the OpenBMC kernel unmodified, to enable kernels with
support for a variety of the devices found on the AST2600.
(From meta-aspeed rev: b456abfbb3ad8ccb3cad3f100d05f2764f7477cc)
Change-Id: I9b9e7f52a5e3d0c042b0e705a3c19228d78f8919
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Add a config snippet that sets CONFIG_BOOTCOMMAND to the correct address
on 128MiB flashes.
This requires a refresh of the u-boot sdk patch we've been carrying such
that CONFIG_BOOTCOMMAND is set conditionally if not set previously.
(From meta-aspeed rev: 4c8b1d729b5b21c93685cd1b1bdde05afa81f9e8)
Change-Id: I7dece4bcee6d68a0367fcf4eafb78f0db3e4e4f8
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (6):
pinctrl: aspeed-g6: Sort pins for sanity
pinctrl: aspeed-g6: Fix I2C14 SDA description
ARM: dts: aspeed-g6: Fix EMMC function in pinctrl dtsi
ARM: dts: aspeed-g6: Add pinctrl properties to MDIO nodes
ARM: dts: ast2600-evb: Add pinmux properties for enabled MACs
ARM: dts: aspeed-g6: Add missing pinctrl-names property to I2C nodes
Johnny Huang (9):
pinctrl: aspeed-g6: Fix I3C3/I3C4 pinmux configuration
pinctrl: aspeed-g6: Fix UART13 group pinmux
pinctrl: aspeed-g6: Rename SD3 to EMMC and rework pin groups
pinctrl: aspeed-g6: Add AST2600 I3C1 and I3C2 pinmux config
pinctrl: aspeed-g6: Add support for the AST2600 USB pinmux
pinctrl: aspeed: Add ASPEED_SB_PINCONF() helper
pinctrl: aspeed: Move aspeed_pin_config_map to separate source file
pinctrl: aspeed: Use masks to describe pinconf bitfields
pinctrl: aspeed-g6: Add AST2600 pinconf support
(From meta-aspeed rev: 804acc0d24767e150f25b56379c9664cafdd4b37)
Change-Id: I8255855478addca2b659d318e7e6e8eb970608b4
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (6):
dt-bindings: clock: Add AST2500 RMII RCLK definitions
dt-bindings: clock: Add AST2600 RMII RCLK gate definitions
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
clk: ast2600: Add RMII RCLK gates for all four MACs
net: ftgmac100: Ungate RCLK for RMII on ASPEED MACs
ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfaces
Brad Bishop (9):
soc: aspeed: lpc: Add G6 compatible strings
ipmi: aspeed-g6: Add compatible strings
reset: simple: Add AST2600 compatibility string
ARM: dts: aspeed-g6: Add lpc devices
ARM: dts: aspeed-g6: Expose SuperIO scratch registers
ARM: dts: Add 128MiB OpenBMC flash layout
ARM: dts: aspeed: Add Rainier system
ARM: dts: aspeed: rainier: Add mac devices
ARM: dts: aspeed: rainier: Add i2c devices
Cédric Le Goater (12):
mtd: spi-nor: Add support for w25q512jv
mtd: spi-nor: aspeed: Introduce a field for the AHB physical address
mtd: spi-nor: aspeed: Introduce segment operations
mtd: spi-nor: aspeed: add initial support for ast2600
mtd: spi-nor: aspeed: Check for disabled segments on the AST2600
mtd: spi-nor: aspeed: Introduce training operations per platform
mtd: spi-nor: aspeed: Introduce a HCLK mask for training
mtd: spi-nor: aspeed: check upper freq limit when doing training
mtd: spi-nor: aspeed: add support for AST2600 training
ARM: dts: aspeed-g6: Add FMC and SPI devices
ARM: dts: aspeed: rainier: Enable FMC and SPI devices
ARM: dts: ast2600-evb: Enable FMC and SPI devices
Joel Stanley (3):
ARM: dts: aspeed: tacoma: Enable FMC and SPI devices
ARM: dts: aspeed: ast2600evb: Use custom flash layout
ARM: dts: aspeed: tacoma: Disable CS1 as it is broken
(From meta-aspeed rev: 6f2dd84f3f30c9777ce956d5ad56de7d04bb227c)
Change-Id: I774fa833665c5d84cf58df5cd7315cadaf56754b
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Anyone using OE-core after 95823b7eab is using the OE-core provided tune
and not ours. Drop our redundant tune file.
(From meta-aspeed rev: 5894fc514daad03f70ada285a6b37947e1fb116e)
Change-Id: Ice99855d7655f926832943f6944279a0d21de5a7
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.3.1 stable release.
(From meta-aspeed rev: 601bad88ec3dd368bd48ffd16dc1a19519d50365)
Change-Id: Ifd55c6d0f6cbb8f7c992023856fb5975ac86bb0f
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Arnd Bergmann (1):
ARM: aspeed: ast2500 is ARMv6K
Chicago Duan (1):
ARM: dts: aspeed: fp5280g2: Add LED configuration
Jeremy Kerr (3):
fsi: Add fsi-master class
fsi: Move master attributes to fsi-master class
fsi: Add temporary compatibility symlink
(From meta-aspeed rev: c42949991735030039a12243ec8f4e04f4704184)
Change-Id: I3ff25be7aadce0b52d5a3824f36ae4ecccaefc85
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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OE-core master will be dropping warrior soon; zeus is the next release.
(From meta-aspeed rev: 2ff14968cab1d67e3ddc7519034c8ba1c54d5bb7)
Change-Id: Ide7752551ef7babd833d70ea8f2be465d14520b8
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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5b6780e981 changed the u-boot+env size and thus the same fit image
address (512KiB) can be used on g6 as on the other aspeed SoCs.
Refresh the initial u-boot patch rather than a new one because the
original has not yet been accepted upstream.
(From meta-aspeed rev: 6aa4aaf66f96acaf84a6c434ddfb3e142c087bf4)
Change-Id: I5bcd6468f1578f7f820e3eeeec23d5b3756dca60
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This moves the OpenBMC kernel to a Linux v5.3 base.
There are 120 patches in dev-5.3. Of these, 56 are backported from
upstream, leaving 64 out of tree patches.
Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Andrew Jeffery (26):
ARM: dts: aspeed: Describe SD controllers
ARM: dts: aspeed: Enable first MMC slot on AST2500 EVB
ARM: dts: aspeed: Add AST2600 pinmux nodes
net: phy: Add mdio-aspeed
net: ftgmac100: Add support for DT phy-handle property
net: ftgmac100: Select ASPEED MDIO driver for the AST2600
pinctrl: aspeed: Rename pin declaration macros
pinctrl: aspeed: Add PIN_DECL_3() helper
pinctrl: aspeed: Add multiple pin group support for functions
pinctrl: aspeed: Add SIG_DESC_CLEAR() helper
pinctrl: aspeed: Add AST2600 pinmux support
pinctrl: aspeed: Document existence of deprecated compatibles
mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller
mmc: sdhci-of-aspeed: Drop redundant assignment to host->clock
mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()
mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESS
dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
pmbus (max31785): Add support for devicetree configuration
pmbus (core): One-shot retries for failure to set page
pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
soc: aspeed: Miscellaneous control interfaces
ARM: dts: aspeed: witherspoon: Update max31785 node
ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
ARM: dts: ast2600-evb: eMMC configuration
Andrew Peng (1):
ARM: dts: aspeed: Add Lenovo Hr855xg2 BMC
Ben Pai (1):
ARM: dts: aspeed: Add Mihawk BMC platform
Cédric Le Goater (11):
mtd: spi-nor: aspeed: use command mode for reads
mtd: spi-nor: aspeed: add support for SPI dual IO read mode
mtd: spi-nor: aspeed: link controller with the ahb clock
mtd: spi-nor: aspeed: optimize read mode
mtd: spi-nor: aspeed: limit the maximum SPI frequency
/dev/mem: add a devmem kernel parameter to activate the device
ARM: dts: aspeed: Add "spi-max-frequency" property
mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
mtd: spi-nor: aspeed: add support for the 4B opcodes
David S. Miller (1):
ftgmac100: Fix build.
Eddie James (4):
ARM: dts: aspeed: swift: Change power supplies to version 2
pmbus: (ibm-cffps) Add support for version 2 of the PSU
i2c: aspeed: Add AST2600 compatible
ARM: dts: aspeed: tacoma: Enable I2C busses
Fran Hsu (4):
ARM: dts: nuvoton: Add NPCM730 common device tree
ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree.
ARM: dts: nuvoton: Add GPIOs and LEDs to GSJ device tree
George Hung (2):
dt-binding: edac: add NPCM ECC documentation
edac: npcm: Add Nuvoton NPCM7xx EDAC driver
Hongwei Zhang (1):
ARM: dts: aspeed: Add SGPM pinmux
Ivan Mikhaylov (2):
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
Jae Hyun Yoo (11):
dt-bindings: Add a document of PECI subsystem
peci: Add support for PECI bus driver core
dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
dt-bindings: mfd: Add a document for PECI client MFD
mfd: intel-peci-client: Add PECI client MFD driver
Documentation: hwmon: Add documents for PECI hwmon client drivers
hwmon: Add PECI cputemp driver
hwmon: Add PECI dimmtemp driver
Add maintainers for the PECI subsystem
ARM: dts: aspeed: peci: Add PECI node
Joel Stanley (19):
ARM: aspeed: Select timer in each SoC
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Enable SMP boot
ARM: configs: aspeed: Refresh defconfigs
ARM: configs: aspeed_g5: Enable AST2600
ARM: dts: aspeed: swift: Add eMMC device
ARM: dts: aspeed-g4: Add all flash chips
ARM; dts: aspeed: mihawk: File should not be executable
clk: aspeed: Add SDIO gate
clk: aspeed: Move structures to header
clk: Add support for AST2600 SoC
ARM: dts: aspeed: Add AST2600 and EVB
ARM: dts: aspeed-g4: Expose SuperIO scratch registers
fsi: Add ast2600 master driver
ARM: dts: aspeed-g6: Describe FSI masters
ARM: dts: aspeed: ast2600evb: Enable FSI master
ARM: dts: aspeed: Add Tacoma machine
ARM: config: aspeed: Update defconfigs
ARM: dts: aspeed-g6: Add i2c buses
John Wang (1):
ARM: dts: aspeed: fp5280g2: Fix power supply address
Linus Walleij (3):
gpio: aspeed: Pass irqchip when adding gpiochip
gpio: tqmx86: Pass irqchip when adding gpiochip
gpio: Initialize the irqchip valid_mask with a callback
Matt Spinler (1):
ARM: dts: aspeed: swift: Fix FSI GPIOs
Nathan Chancellor (1):
pinctrl: aspeed: g6: Remove const specifier from aspeed_g6_sig_expr_set's ctx parameter
Oscar A Perez (1):
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
Rashmica Gupta (5):
gpio/aspeed: Fix incorrect number of banks
gpio: aspeed: Setup irqchip dynamically
gpio: aspeed: Use ngpio property from device tree if available
gpio: aspeed: Add in ast2600 details to Aspeed driver
ARM: dts: aspeed-g6: Add gpio devices
Ryan Chen (1):
watchdog: aspeed: Add support for AST2600
Tao Ren (3):
ARM: dts: aspeed: Add Facebook Minipack BMC
ARM: dts: aspeed: Add Facebook Wedge40 BMC
ARM: dts: aspeed: Add Facebook Wedge100 BMC
Tomer Maimon (15):
dt-binding: spi: add NPCM FIU controller
spi: npcm-fiu: add NPCM FIU controller driver
clk: nuvoton: add npcm750 clock function prototype initialization
dt-bindings: i2c: npcm7xx: add binding for i2c controller
i2c: npcm: driver for Poleg i2c controller
dt-binding: bmc: Add NPCM7xx LPC BPC documentation
misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
dt-binding: bmc: add npcm7xx pci mailbox document
misc: mbox: add npcm7xx pci mailbox driver
dt-binding: net: document NPCM7xx EMC DT bindings
net: npcm: add NPCM7xx Ethernet MAC controller
dt-binding: peci: add NPCM PECI documentation
peci: npcm: add NPCM PECI driver
ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
ARM: dts: npcm7xx: Update device tree
Vijay Khemka (3):
ARM: dts: aspeed: tiogapass: Add VR devices
ARM: dts: aspeed: tiogapass: Move battery sensor
ARM: dts: aspeed: tiogapass: Add Riser card
Wei Yongjun (1):
mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()
William A. Kennington III (1):
ARM: configs: aspeed: Enable commonly used network functionality
(From meta-aspeed rev: cacd5220e022dbe97ce6679838407565ed5f5df5)
Change-Id: Ic30ef008a68198c0e0c5a3764b356b7f7c59b2db
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Chia-Wei, Wang (3):
ast2600: add CA7 cache and SRAM parity check
ast2600: revise the boot initialization flow
wdt: aspeed: fix compile warning
Dylan Hung (7):
[update] revise memory reservation
[debug] apply DDR4 100M setting
[update] add config for DDR-400
[update] slower HPLL
[update] adjust cpu timer according to the HPLL
[update] fine tune DDR-PHY param
[fix] fix DDR-PHY training hangup
ryan_chen (6):
update pcie driver
add pcie rc pinctrl
add two pcie rc
add support two
add default pcie at ast2600-evb dts
update ast2600 fmc interrupt #no
(From meta-aspeed rev: 7daf7145abdd5499da5ebb25f4f214712b596562)
Change-Id: I0cf2c21a605683472f9dcdc4516d7c4f5d7858e5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The Aspeed u-boot tree has the g6 environment at 640KiB. Move to 512KiB
for easy OpenBMC compatibility.
(From meta-aspeed rev: 5b6780e9810f79b352db7ae8c6a352d978ef2cd3)
Change-Id: I65a8c799eb1db8756516a4f46098c75ee18751d1
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Linus Walleij (1):
gpio: aspeed: Pass irqchip when adding gpiochip
Rashmica Gupta (6):
gpio/aspeed: Fix incorrect number of banks
dt-bindings: gpio: aspeed: Update documentation with ast2600 controllers
gpio/aspeed: Setup irqchip dynamically
gpio/aspeed: Use ngpio property from device tree if available
gpio: Add in ast2600 details to Aspeed driver
ARM: dts: aspeed-g6: Add gpio devices
(From meta-aspeed rev: 3b101c7f2c10b43576e2770bc2eceb860d0f5660)
Change-Id: I56b71ef33fc6c941fedc8823cd1c9a3ea135e82c
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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A typo in the UBOOT_LOADADDRESS line for g6 prevented the FIT image from
properly be loaded by U-Boot. This change makes sure that the FIT image
is properly generated so U-Boot can load it to the right address.
Tested: Build, inspected, and booted the FIT image.
(From meta-aspeed rev: 12cd1d2b96db78ca4a34751c92d63cb6212228be)
Change-Id: Idad7ff047c29699a7cfb80c186e418183ca126f3
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.12, 5.2.13 and 5.2.14
stable releases.
(From meta-aspeed rev: 00d55503b465963ef43b7a52dc05c93ce1cec078)
Change-Id: I03164c88f5fe1da9c4ea2bc0b12a3245f74cdab0
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Eddie James (2):
ARM: dts: aspeed: swift: Change power supplies to version 2
pmbus: (ibm-cffps) Add support for version 2 of the PSU
Ivan Mikhaylov (2):
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
Joel Stanley (2):
ARM: dts: aspeed-g4: Add all flash chips
ARM; dts: aspeed: mihawk: File should not be executable
Oscar A Perez (1):
ARM: dts: aspeed-g5: Fix gpio-ranges upper limit
(From meta-aspeed rev: ad85989273a1e9f934f17433959d04f7f13b354f)
Change-Id: I3759b4fff70cc45f46eaf0c023888ac9bbfe0316
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.9, 5.2.10 and 5.2.11
stable releases.
(From meta-aspeed rev: 796411974f82c42b7af53b15bc99a7c27cf7605c)
Change-Id: Iddbea8fd2def7ccb4fc9bd1520c3b67d63f8b7eb
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Chia-Wei, Wang (1):
aspeed: ast2600: add CPU clock initialization
Dylan Hung (9):
[add] add ECC setting
[update] correct the ecc range
[fix] fix build error when ASPEED_ECC is off
[update] ecc off by default
[update] add ECC enable message
target margin 0 is legal arg.
[fix] fix incorrect DMA base calculation
[update] fix 2600 fpga issue.
[update] update ast2600 fpga config
ryan_chen (8):
add otp strap bspi size info
add pcie support for evb
add for spi aux information
disable h2x pcie at default
add for h2x
add i2c pinctrl
add i2c pinctrl
update enable ast2600 evb i2c
(From meta-aspeed rev: af1e9221445c4932ead0722287873686fe86b399)
Change-Id: I1bfcad52dbd0a27f0e753c8c14d22584156f02b5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (6):
pinctrl: aspeed: Fix spurious mux failures on the AST2500
mmc: sdhci-of-aspeed: Drop redundant assignment to host->clock
mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()
mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
ARM: dts: ast2600-evb: eMMC configuration
mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESS
Joel Stanley (1):
ARM: dts: aspeed: Add Tacoma machine
Wei Yongjun (1):
mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()
(From meta-aspeed rev: 02f7b82e4a48b109d49633358a7d306d9f9efaf8)
Change-Id: I31d6b9b91c8845ffb15fbb43d7503d3ee5ac54da
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The SDK kernel recipe is no longer used. Drop.
(From meta-aspeed rev: ebcb70ef8ca1aaf74dbd13c6c1cba9591e889f39)
Change-Id: I9a41eb3302bfcce9618036d4ed1ebf1525e1afa3
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Switch g6 to the same kernel as the other supported chips (g4 and g5).
(From meta-aspeed rev: f28c73a9f2e0296c1730b88afdc6cf0c836d08fa)
Change-Id: I659e535ccb4642438b9c10c48a4850d67b28982b
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This variable is unused. Drop.
(From meta-aspeed rev: 283c6db2d5b4dfcfa2c1635f7f4180b2ca07bf9a)
Change-Id: I20f37964971717aaa8f79bfb5a7fe381dff5b7e6
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (3):
net: phy: Add mdio-aspeed
net: ftgmac100: Add support for DT phy-handle property
net: ftgmac100: Select ASPEED MDIO driver for the AST2600
(From meta-aspeed rev: d43a9b7ca84706b6b62d287a9bbe1f64f956317a)
Change-Id: Ief9b513bbbadc0e868673c7d3b4595d64120939d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (13):
dt-bindings: mmc: Document Aspeed SD controller
mmc: Add support for the ASPEED SD controller
ARM: dts: aspeed: Describe SD controllers
pinctrl: aspeed-g5: Delay acquisition of regmaps
pinctrl: aspeed: Rename pin declaration macros
pinctrl: aspeed: Add PIN_DECL_3() helper
pinctrl: aspeed: Add multiple pin group support for functions
pinctrl: aspeed: Add SIG_DESC_CLEAR() helper
pinctrl: aspeed: Add AST2600 pinmux support
pinctrl: aspeed-g6: Fix I2C14 function name typo
pinctrl: aspeed-g6: Fix mislabeled PWM groups and functions
pinctrl: aspeed-g6: Add EMMC pin group
ARM: dts: aspeed: Add AST2600 pinmux nodes
Joel Stanley (12):
ARM: dts: aspeed: swift: Add eMMC device
dt-bindings: watchdog: Add ast2600 compatible
clk: aspeed: Move structures to header
clk: Add support for AST2600 SoC
ARM: aspeed: Select timer in each SoC
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Enable SMP boot
ARM: dts: aspeed: Add AST2600 and EVB
ARM: configs: aspeed_g5: Enable AST2600
fsi: Add ast2600 master driver
ARM: dts: aspeed-g6: Describe FSI masters
ARM: dts: aspeed: ast2600evb: Enable FSI master
Ryan Chen (1):
watchdog: aspeed: Add support for AST2600
YueHaibing (1):
pinctrl: aspeed: Make aspeed_pinmux_ips static
(From meta-aspeed rev: 40df7ebc32ddecc28126c3726c79b25fe1b0feb2)
Change-Id: I005c90c8106f3857e45ada4ac93456b3665b20b3
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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