From d76c413d1c8430cb26a5365988521815112e45f5 Mon Sep 17 00:00:00 2001 From: "Thang Q. Nguyen" Date: Wed, 23 Dec 2020 04:45:53 +0000 Subject: meta-ampere: u-boot: Disable internal PD resistors for GPIOs Configure SCU8C - Multi-function pin control 4 to disable internal pull down resistors for GPIOJ, GPIOG/GPIOAB, GPIOD/GPIOY, GPIOC/GPIOS as external resistors are already installed. Tested: scan I2C4 and check devices on the bus are detected Signed-off-by: Thinh Pham Signed-off-by: Thang Q. Nguyen Change-Id: I5a4b682310b5243830bd9c7a66889b0a52c4770c --- meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend | 1 + 1 file changed, 1 insertion(+) (limited to 'meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend') diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend index 983dc2400..c40bfcd02 100644 --- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend +++ b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend @@ -2,4 +2,5 @@ FILESEXTRAPATHS_append_mtjade := "${THISDIR}/${PN}:" SRC_URI += " \ file://0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch \ + file://0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch \ " -- cgit v1.2.3