From d0f63ef62c76c932a2003eaa42c0b250065ae06f Mon Sep 17 00:00:00 2001 From: Ed Tanous Date: Wed, 31 Jul 2019 10:43:37 -0700 Subject: Update to internal 7-31-19 Signed-off-by: Ed Tanous --- .../recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch') diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch index bdf3d2ddd..6949856db 100644 --- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch +++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Enable-PCIe-L1-support.patch @@ -1,4 +1,4 @@ -From 22c61ba094d8ebdbdcb44f848eef1f5d87a4be87 Mon Sep 17 00:00:00 2001 +From 647cc2538ed6b64054c742b4668386fda9394221 Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo Date: Tue, 8 Jan 2019 13:33:15 -0800 Subject: [PATCH] Enable PCIe L1 support @@ -6,12 +6,13 @@ Subject: [PATCH] Enable PCIe L1 support This commit enables PCIe L1 support using magic registers. Signed-off-by: Jae Hyun Yoo + --- arch/arm/mach-aspeed/platform_g5.S | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S -index 66427b6f33e7..b4043534b083 100644 +index 66427b6..b404353 100644 --- a/arch/arm/mach-aspeed/platform_g5.S +++ b/arch/arm/mach-aspeed/platform_g5.S @@ -2432,6 +2432,18 @@ spi_cbr_end: @@ -33,6 +34,3 @@ index 66427b6f33e7..b4043534b083 100644 /****************************************************************************** Configure MAC timing ******************************************************************************/ --- -2.7.4 - -- cgit v1.2.3