From 10fa14942b9cb27780f9496382107516639208b4 Mon Sep 17 00:00:00 2001 From: Andrew Geissler Date: Fri, 11 Dec 2020 16:25:29 -0600 Subject: meta-xilinx: subtree update:569f52f275..b3e37df5d9 Mark Hatle (11): meta-microblaze: Move gcc patch that was missed in the prior work Uprev standalone toolchain bbappends pmu-firmware: Latest toolchain always treats 'assert' as a macro binutils: update to early gatesgarth version gdb: update to early gatesgarth version gcc: update to early gatesgarth version newlib: update to early gatesgarth version machine/aarch64-tc.conf: Fix incorrect ilp32 pkgarch libgcc.bbappend: Clear empty lib directory newlib: Upstream now disabled builtin symbols gdb: Fix on-target GDB compilation Sai Hari Chandana Kalluri (5): linux-xlnx_2020.2: Fix previous git cherry-pick xrt: Remove stale patch to fix endian issues with latest version of boost opencl-clhpp, ocl-icd: Remove recipes from meta-xilinx esw.bbclass: Remove trailing / after S Remove recipe bbappends pointing to older versions Signed-off-by: Andrew Geissler Change-Id: I18b028388a5b55a49ef135b98290228fa797e38d --- ...blaze-Fix-Compiler-crash-with-freg-struct.patch | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch (limited to 'meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch') diff --git a/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch new file mode 100644 index 000000000..3e0c483b7 --- /dev/null +++ b/meta-xilinx/meta-microblaze/recipes-devtools/gcc/gcc-10/0051-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch @@ -0,0 +1,86 @@ +From 697db2e2c2519f27011fbd1960cd8860133aaa84 Mon Sep 17 00:00:00 2001 +From: Nagaraju +Date: Thu, 9 Jan 2020 12:30:41 +0530 +Subject: [PATCH 51/54] [Patch, microblaze]: Fix Compiler crash with + -freg-struct-return This patch fixes a bug in MB GCC regarding the passing + struct values in registers. Currently we are only handling SImode With this + patch all other modes are handled properly + +Signed-off-by :Nagaraju Mekala + +ChangeLog: +2020-01-09 Nagaraju Mekala + + * gcc/config/microblaze/microblaze.h + (LIBCALL_Value): Remove macro + (PROMOTE_MODE): Remove macro + * gcc/config/microblaze/microblaze.c + (TARGET_LIBCALL_Value): Added new macro + (microblaze_function_value): Updated the return Value +--- + gcc/config/microblaze/microblaze.c | 11 ++++++++++- + gcc/config/microblaze/microblaze.h | 19 ------------------- + 2 files changed, 10 insertions(+), 20 deletions(-) + +diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c +index 7b48c011550..1bba77dab6d 100644 +--- a/gcc/config/microblaze/microblaze.c ++++ b/gcc/config/microblaze/microblaze.c +@@ -3908,7 +3908,16 @@ microblaze_function_value (const_tree valtype, + const_tree func ATTRIBUTE_UNUSED, + bool outgoing ATTRIBUTE_UNUSED) + { +- return LIBCALL_VALUE (TYPE_MODE (valtype)); ++ return gen_rtx_REG (TYPE_MODE (valtype), GP_RETURN); ++} ++ ++#undef TARGET_LIBCALL_VALUE ++#define TARGET_LIBCALL_VALUE microblaze_libcall_value ++ ++rtx ++microblaze_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) ++{ ++ return gen_rtx_REG (mode, GP_RETURN); + } + + /* Implement TARGET_SCHED_ADJUST_COST. */ +diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h +index bfa7bc9a01c..d467a7ee65d 100644 +--- a/gcc/config/microblaze/microblaze.h ++++ b/gcc/config/microblaze/microblaze.h +@@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe; + + #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND + +-#ifndef __arch64__ +-#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ +- if (GET_MODE_CLASS (MODE) == MODE_INT \ +- && GET_MODE_SIZE (MODE) < 4) \ +- (MODE) = SImode; +-#endif +- + /* Standard register usage. */ + + /* On the MicroBlaze, we have 32 integer registers */ +@@ -471,18 +464,6 @@ extern struct microblaze_frame_info current_frame_info; + + #define MAX_ARGS_IN_REGISTERS MB_ABI_MAX_ARG_REGS + +-#ifdef __aarch64__ +-#define LIBCALL_VALUE(MODE) \ +- gen_rtx_REG (MODE,GP_RETURN) +-#else +-#define LIBCALL_VALUE(MODE) \ +- gen_rtx_REG ( \ +- ((GET_MODE_CLASS (MODE) != MODE_INT \ +- || GET_MODE_SIZE (MODE) >= 4) \ +- ? (MODE) \ +- : SImode), GP_RETURN) +-#endif +- + /* 1 if N is a possible register number for a function value. + On the MicroBlaze, R2 R3 are the only register thus used. + Currently, R2 are only implemented here (C has no complex type) */ +-- +2.17.1 + -- cgit v1.2.3