From 58d4715d6ac08a20f68044875fdc3afaf75ee2a1 Mon Sep 17 00:00:00 2001 From: Vernon Mauery Date: Thu, 12 Sep 2019 15:55:39 +0800 Subject: [PATCH] arm: dts: base aspeed g6 dtsi fixups Additions to the base g6 dtsi file for Aspeed ast2600 systems. This mostly includes entries for the drivers that are not upstream. Signed-off-by: Vernon Mauery --- arch/arm/boot/dts/aspeed-g6.dtsi | 207 +++++++++++++++++++++- include/dt-bindings/clock/ast2600-clock.h | 8 + 2 files changed, 213 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 8ac435b3dbde..5de3af52830d 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -28,6 +28,13 @@ i2c13 = &i2c13; i2c14 = &i2c14; i2c15 = &i2c15; + i3c0 = &i3c0; + i3c1 = &i3c1; + i3c2 = &i3c2; + i3c3 = &i3c3; + i3c4 = &i3c4; + i3c5 = &i3c5; + peci0 = &peci0; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -273,11 +284,21 @@ quality = <100>; }; + adc: adc@1e6e9000 { + compatible = "aspeed,ast2500-adc"; + reg = <0x1e6e9000 0x100>; + clocks = <&syscon ASPEED_CLK_APB2>; + interrupts = ; + resets = <&syscon ASPEED_RESET_ADC>; + #io-channel-cells = <1>; + status = "disabled"; + }; + gpio0: gpio@1e780000 { #gpio-cells = <2>; gpio-controller; compatible = "aspeed,ast2600-gpio"; - reg = <0x1e780000 0x800>; + reg = <0x1e780000 0x200>; interrupts = ; gpio-ranges = <&pinctrl 0 0 208>; ngpios = <208>; @@ -290,7 +311,7 @@ #gpio-cells = <2>; gpio-controller; compatible = "aspeed,ast2600-gpio"; - reg = <0x1e780800 0x800>; + reg = <0x1e780800 0x200>; interrupts = ; gpio-ranges = <&pinctrl 0 208 36>; ngpios = <36>; @@ -338,6 +407,20 @@ status = "disabled"; }; + peci: bus@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + }; + + i3c: bus@1e7a0000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e7a0000 0x8000>; + }; + lpc: lpc@1e789000 { compatible = "aspeed,ast2600-lpc", "simple-mfd"; reg = <0x1e789000 0x1000>; @@ -426,6 +509,20 @@ sio_regs: regs { compatible = "aspeed,bmc-misc"; }; + + lpc_sio: lpc-sio@100 { + compatible = "aspeed,ast2500-lpc-sio"; + reg = <0x100 0x20>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; + status = "disabled"; + }; + + mbox: mbox@180 { + compatible = "aspeed,ast2600-mbox"; + reg = <0x180 0x5c>; + interrupts = ; + #mbox-cells = <1>; + }; }; }; @@ -529,6 +626,24 @@ #include "aspeed-g6-pinctrl.dtsi" +&peci { + peci0: peci-bus@0 { + compatible = "aspeed,ast2500-peci"; + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>, <&syscon ASPEED_CLK_AHB>; + resets = <&syscon ASPEED_RESET_PECI>; + clock-frequency = <24000000>; + msg-timing = <1>; + addr-timing = <1>; + rd-sampling-point = <8>; + cmd-timeout-ms = <1000>; + status = "disabled"; + }; +}; + &i2c { i2c0: i2c-bus@40 { #address-cells = <1>; @@ -770,3 +885,91 @@ status = "disabled"; }; }; + +&i3c { + i3c0: i3c0@2000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x2000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C0>; + bus-frequency = <100000>; + interrupts = ; + status = "disabled"; + }; + + i3c1: i3c1@3000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x3000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C1>; + bus-frequency = <100000>; + interrupts = ; + status = "disabled"; + }; + + i3c2: i3c2@4000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x4000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C2>; + bus-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c3_default>; + status = "disabled"; + }; + + i3c3: i3c3@5000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x5000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C3>; + bus-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c4_default>; + status = "disabled"; + }; + + i3c4: i3c4@6000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x6000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C4>; + bus-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c5_default>; + status = "disabled"; + }; + + i3c5: i3c5@7000 { + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + reg = <0x7000 0x1000>; + compatible = "snps,dw-i3c-master-1.00a"; + clocks = <&syscon ASPEED_CLK_APB2>; + resets = <&syscon ASPEED_RESET_I3C5>; + bus-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c6_default>; + status = "disabled"; + }; +}; diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h index ac567fc84a87..94350356cfb1 100644 --- a/include/dt-bindings/clock/ast2600-clock.h +++ b/include/dt-bindings/clock/ast2600-clock.h @@ -92,6 +92,14 @@ /* Only list resets here that are not part of a gate */ #define ASPEED_RESET_ADC 55 #define ASPEED_RESET_JTAG_MASTER2 54 +#define ASPEED_RESET_I3C7 47 +#define ASPEED_RESET_I3C6 46 +#define ASPEED_RESET_I3C5 45 +#define ASPEED_RESET_I3C4 44 +#define ASPEED_RESET_I3C3 43 +#define ASPEED_RESET_I3C2 42 +#define ASPEED_RESET_I3C1 41 +#define ASPEED_RESET_I3C0 40 #define ASPEED_RESET_I3C_DMA 39 #define ASPEED_RESET_PWM 37 #define ASPEED_RESET_PECI 36 -- 2.17.1