From 5f984831a3f451e299ecaf42d65dee36ff0ffeee Mon Sep 17 00:00:00 2001 From: "Jason M. Bills" Date: Fri, 24 May 2019 12:42:59 -0700 Subject: [PATCH] Allow monitoring of power control input GPIOs The pass-through input GPIOs cannot be monitored because when requested, pass-through is disabled which causes a change on the pass-through output. The SIO GPIOs cannot be monitored because when requested, the request is rejected based on the value of the ACPI strap. This change removes the register check condition from the pass- through and desired SIO GPIOs so they can be requsted and monitored from power control. Tested: For pass-through, I used gpioset to hold a request on the input GPIOs and confirmed that pass-through remained enabled. For SIO, I used gpioget to confirm that I can successfully request and read the GPIO value. Signed-off-by: Jason M. Bills --- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 10 +++++----- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 10 +++++----- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c index c5406e2da320..fde74c23ca7f 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c @@ -279,7 +279,7 @@ FUNC_GROUP_DECL(SD2, F19, E21, F20, D20, D21, E20, G18, C21); #define B20 32 SIG_EXPR_LIST_DECL_SINGLE(B20, NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16)); -SIG_EXPR_DECL_SINGLE(GPIE0IN, GPIE0, GPIE0_DESC); +SIG_EXPR_DECL_SINGLE(GPIE0IN, GPIE0); SIG_EXPR_DECL_SINGLE(GPIE0IN, GPIE, GPIE_DESC); SIG_EXPR_LIST_DECL_DUAL(B20, GPIE0IN, GPIE0, GPIE); PIN_DECL_2(B20, GPIOE0, NCTS3, GPIE0IN); @@ -299,7 +299,7 @@ FUNC_GROUP_DECL(GPIE0, B20, C20); #define F18 34 SIG_EXPR_LIST_DECL_SINGLE(F18, NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18)); -SIG_EXPR_DECL_SINGLE(GPIE2IN, GPIE2, GPIE2_DESC); +SIG_EXPR_DECL_SINGLE(GPIE2IN, GPIE2); SIG_EXPR_DECL_SINGLE(GPIE2IN, GPIE, GPIE_DESC); SIG_EXPR_LIST_DECL_DUAL(F18, GPIE2IN, GPIE2, GPIE); PIN_DECL_2(F18, GPIOE2, NDSR3, GPIE2IN); @@ -1412,7 +1412,7 @@ FUNC_GROUP_DECL(ADC15, H4); #define R22 192 SIG_EXPR_DECL_SINGLE(SIOS3, SIOS3, SIG_DESC_SET(SCUA4, 8)); -SIG_EXPR_DECL_SINGLE(SIOS3, ACPI, ACPI_DESC); +SIG_EXPR_DECL_SINGLE(SIOS3, ACPI); SIG_EXPR_LIST_DECL_DUAL(R22, SIOS3, SIOS3, ACPI); SIG_EXPR_LIST_DECL_SINGLE(R22, DASHR22, DASHR22, SIG_DESC_SET(SCU94, 10)); PIN_DECL_2(R22, GPIOY0, SIOS3, DASHR22); @@ -1420,7 +1420,7 @@ FUNC_GROUP_DECL(SIOS3, R22); #define R21 193 SIG_EXPR_DECL_SINGLE(SIOS5, SIOS5, SIG_DESC_SET(SCUA4, 9)); -SIG_EXPR_DECL_SINGLE(SIOS5, ACPI, ACPI_DESC); +SIG_EXPR_DECL_SINGLE(SIOS5, ACPI); SIG_EXPR_LIST_DECL_DUAL(R21, SIOS5, SIOS5, ACPI); SIG_EXPR_LIST_DECL_SINGLE(R21, DASHR21, DASHR21, SIG_DESC_SET(SCU94, 10)); PIN_DECL_2(R21, GPIOY1, SIOS5, DASHR21); @@ -1436,7 +1436,7 @@ FUNC_GROUP_DECL(SIOPWREQ, P22); #define P21 195 SIG_EXPR_DECL_SINGLE(SIOONCTRL, SIOONCTRL, SIG_DESC_SET(SCUA4, 11)); -SIG_EXPR_DECL_SINGLE(SIOONCTRL, ACPI, ACPI_DESC); +SIG_EXPR_DECL_SINGLE(SIOONCTRL, ACPI); SIG_EXPR_LIST_DECL_DUAL(P21, SIOONCTRL, SIOONCTRL, ACPI); SIG_EXPR_LIST_DECL_SINGLE(P21, DASHP21, DASHP21, SIG_DESC_SET(SCU94, 11)); PIN_DECL_2(P21, GPIOY3, SIOONCTRL, DASHP21); diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c index bcd8c5656265..c18ceb52c289 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c @@ -762,7 +762,7 @@ SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23)); #define AB22 120 SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24)); -SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24)); +SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0); PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0); GROUP_DECL(PWM8G1, AB22); FUNC_DECL_2(PWM8, PWM8G0, PWM8G1); @@ -779,7 +779,7 @@ FUNC_DECL_2(PWM9, PWM9G0, PWM9G1); #define AA23 122 SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26)); -SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26)); +SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1); PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1); GROUP_DECL(PWM10G1, AA23); FUNC_DECL_2(PWM10, PWM10G0, PWM10G1); @@ -1070,16 +1070,16 @@ FUNC_GROUP_DECL(GPIU7, AC17); FUNC_GROUP_DECL(ADC15, AC17); #define AB15 168 -SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8)); +SSSF_PIN_DECL(AB15, GPIOV0, SIOS3); #define AF14 169 -SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9)); +SSSF_PIN_DECL(AF14, GPIOV1, SIOS5); #define AD14 170 SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10)); #define AC15 171 -SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11)); +SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL); #define AE15 172 SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12)); -- 2.7.4