From f631d7dc034be1de17213b1498651ad37f3ce98b Mon Sep 17 00:00:00 2001 From: Yuan Li Date: Tue, 19 Sep 2017 15:55:39 +0800 Subject: [PATCH] ARM: dts: purley: Merge all dts node in the unified patch. The below changes to the dts file are merged together: * 0006: the original one for purley * 0008: sgpio * 0009: peci * 0015: leds_gpio * 0018: kcs3 & kcs4 * i2c4 for HSBP access * i2c3 for PCH access * LPC SIO device * i2c0 for IPMB * 12c5 bus-freq * vuart * uart1/serial0 * uart2/serial1 * uart3/serial2 * uart4/serail3 * enable high speed uart clock * timer pwm * cpu0/1fault LEDs Signed-off-by: Yuan Li Signed-off-by: Yong Li Signed-off-by: James Feist Signed-off-by: Jae Hyun Yoo --- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 346 ++++++++++++++++++++++++++ 1 file changed, 346 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-intel-purley.dts diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts new file mode 100644 index 000000000000..144d59642a71 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts @@ -0,0 +1,346 @@ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include +#include + +/ { + model = "Purley BMC"; + compatible = "intel,purley-bmc", "aspeed,ast2500"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vga_memory: framebuffer@7f000000 { + no-map; + reg = <0x7f000000 0x01000000>; + }; + + gfx_memory: framebuffer { + size = <0x04000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + vga-shared-memory { + compatible = "aspeed,ast2500-vga-sharedmem"; + reg = <0x9ff00000 0x100000>; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; + }; + + leds { + compatible = "gpio-leds"; + + identify { + default-state = "off"; + gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; + }; + + status_amber { + default-state = "off"; + gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>; + }; + + status_green { + default-state = "keep"; + gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>; + }; + + cpu0fault { + gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>; + }; + + cpu1fault { + gpios = <&gpio ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>; + }; + }; + + beeper { + compatible = "pwm-beeper"; + pwms = <&timer 5 1000000 0>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; +#include "openbmc-flash-layout-intel-64MB.dtsi" + }; +}; + +&espi { + status = "okay"; +}; + +&jtag { + status = "okay"; +}; + +&peci0 { + status = "okay"; +}; + +&syscon { + uart-clock-high-speed; + status = "okay"; +}; + +&adc { + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&kcs3 { + kcs_addr = <0xCA2>; + status = "okay"; +}; + +&kcs4 { + kcs_addr = <0xCA4>; + status = "okay"; +}; + +&lpc_sio { + status = "okay"; +}; + +&lpc_snoop { + snoop-ports = <0x80>; + status = "okay"; +}; + +&mbox { + status = "okay"; +}; + +/** + * SAFS through SPI1 is available only on Wilson Point. + * These pins are used as fan presence checking gpios in WFP + * so commenting it out for now. + * &spi1 { + * status = "okay"; + * + * flash@0 { + * m25p,fast-read; + * status = "okay"; + * }; + *}; + */ + +&sgpio { + status = "okay"; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ndtr1_default + &pinctrl_ndsr1_default + &pinctrl_ncts1_default + &pinctrl_ndcd1_default + &pinctrl_nri1_default>; +}; + +&uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd2_default + &pinctrl_rxd2_default + &pinctrl_nrts2_default + &pinctrl_ndtr2_default + &pinctrl_ndsr2_default + &pinctrl_ncts2_default + &pinctrl_ndcd2_default + &pinctrl_nri2_default>; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&mac1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&mac0 { + status = "okay"; + use-ncsi; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; +}; + +&i2c0 { + multi-master; + status = "okay"; + + ipmb0@10 { + compatible = "slave-mqueue"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; +}; + +&i2c1 { + multi-master; + status = "okay"; +}; + +&i2c2 { + multi-master; + status = "okay"; +}; + +&i2c3 { + multi-master; + status = "okay"; +}; + +&i2c4 { + multi-master; + status = "okay"; + + hsbp0@10 { + compatible = "slave-mqueue"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; +}; + +&i2c5 { + bus-frequency = <1000000>; + multi-master; + status = "okay"; + + smlink0@10 { + compatible = "slave-mqueue"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; +}; + +&i2c6 { + multi-master; + status = "okay"; +}; + +&i2c7 { + multi-master; + #retries = <3>; + status = "okay"; +}; + +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; +}; + +&vuart { + status = "okay"; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default + &pinctrl_pwm4_default &pinctrl_pwm5_default + &pinctrl_pwm6_default &pinctrl_pwm7_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; + }; + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; + }; + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; + }; + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; + }; + fan@4 { + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; + }; + fan@5 { + reg = <0x05>; + aspeed,fan-tach-ch = /bits/ 8 <0x0A 0x0B>; + }; + fan@6 { + reg = <0x06>; + aspeed,fan-tach-ch = /bits/ 8 <0x0C 0x0D>; + }; + fan@7 { + reg = <0x07>; + aspeed,fan-tach-ch = /bits/ 8 <0x0E 0x0F>; + }; + +}; + +&timer { +/* + * Available settings: + * fttmr010,pwm-outputs = <5>, <6>, <7>, <8>; + * pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default + * &pinctrl_timer7_default &pinctrl_timer8_default>; + */ + fttmr010,pwm-outputs = <5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_timer5_default>; + #pwm-cells = <3>; + status = "okay"; +}; + +&video { + status = "okay"; + memory-region = <&gfx_memory>; +}; + +&vhub { + status = "okay"; +}; -- 2.7.4