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From aae3bab86f19784cbe0767ea0973527ce217bf89 Mon Sep 17 00:00:00 2001
From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Date: Fri, 3 Jan 2020 15:14:09 -0800
Subject: [PATCH] Disable crashdump trigger gpio
This commit disables crashdump trigger gpio (GPIOC3) to prevent
unexpected host failures.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
---
board/aspeed/ast2600_intel/intel.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/board/aspeed/ast2600_intel/intel.c b/board/aspeed/ast2600_intel/intel.c
index eb6fbaf77e66..7daf1b83305a 100644
--- a/board/aspeed/ast2600_intel/intel.c
+++ b/board/aspeed/ast2600_intel/intel.c
@@ -146,6 +146,27 @@ static void sgpio_init(void)
writel(value, AST_GPIO_BASE + GPIO254);
}
+static void disable_crashlog_trigger(void)
+{
+#define SCU_410 0x410 /* Multi-function Pin Control #4 */
+#define SCU_410_RGMII3TXD1 BIT(19)
+#define GPIO_004 0x004 /* GPIO A/B/C/D Direction */
+#define GPIO_000 0x000 /* GPIO A/B/C/D Value */
+#define GPIO_C3 BIT(19)
+
+ /*
+ * Set FM_BMC_CRASHLOG_TRIG_N (GPIOC3) as an output with value high
+ * explicitly since it doesn't have an external pull up. It uses direct
+ * register access because it's called from board_early_init_f().
+ */
+ writel(readl(SCU_BASE | SCU_410) & ~SCU_410_RGMII3TXD1,
+ SCU_BASE | SCU_410);
+ writel(readl(AST_GPIO_BASE | GPIO_004) | GPIO_C3,
+ AST_GPIO_BASE | GPIO_004);
+ writel(readl(AST_GPIO_BASE | GPIO_000) | GPIO_C3,
+ AST_GPIO_BASE | GPIO_000);
+}
+
void espi_init(void);
int arch_interrupt_init_early(void);
@@ -162,6 +183,8 @@ int board_early_init_f(void)
* I am not sure if it actually does anything... */
arch_interrupt_init_early();
+ disable_crashlog_trigger();
+
gpio_passthru_init();
port80h_snoop_init();
--
2.7.4
|