summaryrefslogtreecommitdiff
path: root/libpeci/peci.h
diff options
context:
space:
mode:
authorKenny L. Ku <kenny.k.ku@intel.com>2019-11-23 01:27:01 +0300
committerKu, Kenny K <kenny.k.ku@intel.com>2019-11-26 03:27:15 +0300
commite1a147f6fddf3ef7fd35278fd187a1575c79a75f (patch)
treebf2c56ed97bdeafc2646bafd3dc53166d85bb9c8 /libpeci/peci.h
parenta980a67c483738ca63aab52dcb0fb8c3044d9e52 (diff)
downloadprovingground-e1a147f6fddf3ef7fd35278fd187a1575c79a75f.tar.xz
Add peci_WrEndPointConfig_seq for sequential write
Tested: Verified with peci_cmds. Signed-off-by: Kenny K. Ku <kenny.k.ku@intel.com> Change-Id: I72ff9de2a765b5f98ec287783764f71a226cb9cf
Diffstat (limited to 'libpeci/peci.h')
-rw-r--r--libpeci/peci.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/libpeci/peci.h b/libpeci/peci.h
index 81fba95..33b664d 100644
--- a/libpeci/peci.h
+++ b/libpeci/peci.h
@@ -209,6 +209,14 @@ EPECIStatus peci_WrEndPointPCIConfig(uint8_t target, uint8_t u8Seg,
uint8_t DataLen, uint32_t DataVal,
uint8_t* cc);
+// Allows sequential write access to the EP PCI Configuration space
+EPECIStatus peci_WrEndPointConfig_seq(uint8_t target, uint8_t u8MsgType,
+ uint8_t u8Seg, uint8_t u8Bus,
+ uint8_t u8Device, uint8_t u8Fcn,
+ uint16_t u16Reg, uint8_t DataLen,
+ uint32_t DataVal, int peci_fd,
+ uint8_t* cc);
+
// Provides access to the Crashdump Discovery API
EPECIStatus peci_CrashDump_Discovery(uint8_t target, uint8_t subopcode,
uint8_t param0, uint16_t param1,