diff options
| author | Andrew Geissler <geissonator@yahoo.com> | 2023-09-11 15:24:07 +0300 |
|---|---|---|
| committer | Andrew Geissler <geissonator@yahoo.com> | 2023-09-11 15:24:17 +0300 |
| commit | fc7e7973f3119e2bad511209aa336537dc5ffbed (patch) | |
| tree | 17f710baf630d26af09b667744e0381ac0967c50 | |
| parent | 566b706ac11162bf6311c2885e9772473e25c7bc (diff) | |
| download | openbmc-fc7e7973f3119e2bad511209aa336537dc5ffbed.tar.xz | |
subtree updates
meta-security: b9bc938785..1856a7cf43:
Armin Kuster (1):
scap-security-guide: update to 0.1.69+
Lei Maohui (2):
paxctl: Fix do_package QA Issue.
ccs-tools: Fix do_package QA Issue.
Martin Jansa (1):
layer.conf: update LAYERSERIES_COMPAT for nanbield
Yi Zhao (1):
scap-security-guide: pass the correct cpe/schemas/xsl paths to oscap
meta-arm: 992c07f7c0..bd0953cc60:
Abdellatif El Khlifi (1):
arm-bsp/u-boot: corstone1000: detect the kernel size automatically
Anusmita Dutta Mazumder (5):
arm-bsp/u-boot: corstone1000: add unique firmware GUID
arm-bsp/trusted-firmware-m: corstone1000: add unique firmware GUID
arm-bsp/scp-firmware: Update N1SDP scp-firmware version
arm-bsp/n1sdp: Enable tests with pseudo trusted application
CI: Build custom image for N1SDP optee-xtest
Delane Brandy (1):
arm-bsp/corstone1000: mmc2-enablement
Emekcan Aras (2):
arm-bsp/trusted-firmware-a: corstone1000: Update TF-A v2.9
arm-bsp/optee-os: corstone1000: Update optee-os v3.22
Javier Tia (1):
optee-client: Add path condition to tee-supplicant.service
Jon Mason (14):
arm/trusted-firmware-a: update to 2.9.0
arm-bsp/juno: update kernel to 6.4
arm/linux-yocto: change defconfig patch for 6.4
arm/hafnium: update to v2.8
arm/linux-yocto: update kernel patches
arm/trusted-services: add SRCREV_FORMAT
arm-bsp/tc1: update optee
arm-bsp/fvp-baser-aemv8r64: update u-boot to 2023.01
arm-bsp/corstone500: upgrade u-boot to the latest
arm-bsp/corstone500: removal of support
arm: patch clean-ups
arm/edk2: update to 202305 version
arm/sbsa-acs: update to v7.1.2
arm-bsp/trusted-firmware-a: remove unneeded patches
Mariam Elshakfy (2):
arm-bsp/trusted-firmware-a: Update TF-A version for N1SDP
arm-bsp/n1sdp: Update edk2-firmware version for N1SDP to 202305
Ross Burton (3):
kas/: pass through DISPLAY from environment
Remove explicit SRCPV
arm-bsp/external-system: set PACKAGE_ARCH as this is machine-specific
meta-raspberrypi: 5e2f79a6fa..6501ec892c:
Andrei Gherzan (2):
ci: Add usrmerge to distro features
docs: Fix documentation theme
Sangmo Kang (1):
omxplayer: fix an error caused by new srcrev fetcher API
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
142 files changed, 693 insertions, 3070 deletions
diff --git a/meta-arm/.gitlab-ci.yml b/meta-arm/.gitlab-ci.yml index 4a786f633b..a2af871687 100644 --- a/meta-arm/.gitlab-ci.yml +++ b/meta-arm/.gitlab-ci.yml @@ -104,14 +104,6 @@ update-repos: # VIRT: [none, xen] # TESTING: testimage -corstone500: - extends: .build - parallel: - matrix: - - TESTING: testimage - tags: - - x86_64 - corstone1000-fvp: extends: .build parallel: @@ -162,6 +154,7 @@ n1sdp: parallel: matrix: - TS: [none, n1sdp-ts] + - OPTEE: [none, n1sdp-optee] qemu-generic-arm64: extends: .build diff --git a/meta-arm/ci/corstone500.yml b/meta-arm/ci/corstone500.yml deleted file mode 100644 index 2172bc1f55..0000000000 --- a/meta-arm/ci/corstone500.yml +++ /dev/null @@ -1,12 +0,0 @@ -header: - version: 14 - includes: - - ci/base.yml - - ci/fvp.yml - - ci/poky-tiny.yml - -local_conf_header: - fvp-config: | - IMAGE_FEATURES:remove = " ssh-server-dropbear" - -machine: corstone500 diff --git a/meta-arm/ci/fvps.yml b/meta-arm/ci/fvps.yml index cf4103edb1..1bced2994e 100644 --- a/meta-arm/ci/fvps.yml +++ b/meta-arm/ci/fvps.yml @@ -15,7 +15,6 @@ local_conf_header: target: - nativesdk-fvp-base-a-aem - - nativesdk-fvp-corstone500 - nativesdk-fvp-corstone1000 - nativesdk-fvp-n1-edge - nativesdk-fvp-sgi575 diff --git a/meta-arm/ci/jobs-to-kas b/meta-arm/ci/jobs-to-kas index b8615a5ff5..eea6e4635b 100755 --- a/meta-arm/ci/jobs-to-kas +++ b/meta-arm/ci/jobs-to-kas @@ -3,7 +3,7 @@ # This script is expecting an input of machine name, optionally followed by a # colon and a list of one or more parameters separated by commas between # brackets. For example, the following are acceptable: -# corstone500 +# corstone1000-mps3 # fvp-base: [testimage] # qemuarm64-secureboot: [clang, glibc, testimage] # diff --git a/meta-arm/ci/n1sdp-optee.yml b/meta-arm/ci/n1sdp-optee.yml new file mode 100644 index 0000000000..f2b50abf49 --- /dev/null +++ b/meta-arm/ci/n1sdp-optee.yml @@ -0,0 +1,12 @@ +header: + version: 14 + +# Config specific for the optee-xtests +local_conf_header: + optee-test: | + # Include ARM FFA + MACHINE_FEATURES:append = " arm-ffa" + # Include trusted services + TEST_SUITES:append = " trusted_services" + # Include Optee xtests + IMAGE_INSTALL:append = " optee-test" diff --git a/meta-arm/kas/corstone1000-base.yml b/meta-arm/kas/corstone1000-base.yml index 85706dc0f4..161312fbcc 100644 --- a/meta-arm/kas/corstone1000-base.yml +++ b/meta-arm/kas/corstone1000-base.yml @@ -1,6 +1,9 @@ header: version: 11 +env: + DISPLAY: "" + distro: poky-tiny defaults: diff --git a/meta-arm/kas/corstone500.yml b/meta-arm/kas/corstone500.yml deleted file mode 100644 index d40b59df3a..0000000000 --- a/meta-arm/kas/corstone500.yml +++ /dev/null @@ -1,47 +0,0 @@ -header: - version: 11 - includes: - - kas/fvp-eula.yml - -distro: poky-tiny - -defaults: - repos: - refspec: master - -repos: - meta-arm: - layers: - meta-arm: - meta-arm-bsp: - meta-arm-toolchain: - - poky: - url: https://git.yoctoproject.org/git/poky - refspec: master - layers: - meta: - meta-poky: - meta-yocto-bsp: - - meta-openembedded: - url: https://git.openembedded.org/meta-openembedded - refspec: master - layers: - meta-oe: - meta-python: - -local_conf_header: - base: | - CONF_VERSION = "2" - PACKAGE_CLASSES = "package_ipk" - BB_NUMBER_THREADS ?= "16" - PARALLEL_MAKE ?= "-j16" - PACKAGECONFIG:append:pn-perf = " coresight" - fvp-config: | - IMAGE_CLASSES:append = " ${@bb.utils.contains('BUILD_ARCH', 'x86_64', 'fvpboot', '', d)}" - -machine: corstone500 - -target: - - core-image-minimal diff --git a/meta-arm/kas/fvp-baser-aemv8r64-bsp.yml b/meta-arm/kas/fvp-baser-aemv8r64-bsp.yml index 9f16a3f959..366ab87eb7 100644 --- a/meta-arm/kas/fvp-baser-aemv8r64-bsp.yml +++ b/meta-arm/kas/fvp-baser-aemv8r64-bsp.yml @@ -3,6 +3,9 @@ header: includes: - kas/fvp-eula.yml +env: + DISPLAY: "" + distro: poky machine: fvp-baser-aemv8r64 diff --git a/meta-arm/meta-arm-bsp/conf/machine/corstone1000-fvp.conf b/meta-arm/meta-arm-bsp/conf/machine/corstone1000-fvp.conf index 9636ffe4a0..ebfba5b93f 100644 --- a/meta-arm/meta-arm-bsp/conf/machine/corstone1000-fvp.conf +++ b/meta-arm/meta-arm-bsp/conf/machine/corstone1000-fvp.conf @@ -49,3 +49,10 @@ FVP_CONFIG[board.msd_mmc.p_fast_access] ?= "0" FVP_CONFIG[board.msd_mmc.diagnostics] ?= "2" FVP_CONFIG[board.msd_mmc.p_max_block_count] ?= "0xFFFF" FVP_CONFIG[board.msd_config.pl180_fifo_depth] ?= "16" + +# MMC2 card configuration +FVP_CONFIG[board.msd_mmc_2.card_type] ?= "SDHC" +FVP_CONFIG[board.msd_mmc_2.p_fast_access] ?= "0" +FVP_CONFIG[board.msd_mmc_2.diagnostics] ?= "2" +FVP_CONFIG[board.msd_mmc_2.p_max_block_count] ?= "0xFFFF" +FVP_CONFIG[board.msd_config_2.pl180_fifo_depth] ?= "16"
\ No newline at end of file diff --git a/meta-arm/meta-arm-bsp/conf/machine/corstone500.conf b/meta-arm/meta-arm-bsp/conf/machine/corstone500.conf deleted file mode 100644 index 6d2294c273..0000000000 --- a/meta-arm/meta-arm-bsp/conf/machine/corstone500.conf +++ /dev/null @@ -1,49 +0,0 @@ -#@TYPE: Machine -#@NAME: Corstone-500 machine -#@DESCRIPTION: Machine configuration for the Corstone-500 platform - -require conf/machine/include/arm/armv7a/tune-cortexa5.inc - -# Corstone-500 is built against poky-tiny distro. -# poky-tiny sets PREFERRED_PROVIDER_virtual/kernel to linux-yocto-tiny. -# Since distro config is evaluated after the machine config, we need to -# use the strongest override possible (forcevariable) so the -# PREFERRED_PROVIDER_virtual/kernel specified in the machine config will -# apply. -# -PREFERRED_PROVIDER_virtual/kernel:forcevariable = "linux-yocto" -PREFERRED_VERSION_linux-yocto ?= "6.1%" - -EXTRA_IMAGEDEPENDS += "trusted-firmware-a u-boot" - -IMAGE_CLASSES += "wic_nopt" -IMAGE_FSTYPES:forcevariable = "cpio.gz squashfs wic wic.nopt" - -SERIAL_CONSOLES = "115200;ttyAMA0" - -# Corstone-500 u-boot configuration -UBOOT_MACHINE = "corstone500_defconfig" -UBOOT_IMAGE_ENTRYPOINT = "0x84000000" -UBOOT_IMAGE_LOADADDRESS = "0x84000000" -PREFERRED_VERSION_u-boot ?= "2023.01" - -# making sure EXTRA_IMAGEDEPENDS will be used while creating the image -WKS_FILE_DEPENDS:append = " ${EXTRA_IMAGEDEPENDS}" - -WKS_FILE ?= "core-image-minimal.corstone500.wks" - -TEST_TARGET = "OEFVPTarget" -TEST_SUITES = "fvp_boot" - -FVP_PROVIDER ?= "fvp-corstone500-native" -FVP_EXE ?= "FVP_Corstone-500" -FVP_CONFIG[board.flashloader0.fname] ?= "bl1.bin" -FVP_DATA ?= "css.cluster.cpu0=${IMAGE_NAME}.wic.nopt@0x80000000" -FVP_CONSOLE ?= "terminal_0" -FVP_TERMINALS[css.terminal_0] ?= "console" -FVP_TERMINALS[css.terminal_1] ?= "" - -# Disable openssl in kmod to shink the initramfs size -PACKAGECONFIG:remove:pn-kmod = "openssl" - -IMAGE_NAME_SUFFIX = "" diff --git a/meta-arm/meta-arm-bsp/conf/machine/fvp-baser-aemv8r64.conf b/meta-arm/meta-arm-bsp/conf/machine/fvp-baser-aemv8r64.conf index 25ba3c840f..7d2eaf9b94 100644 --- a/meta-arm/meta-arm-bsp/conf/machine/fvp-baser-aemv8r64.conf +++ b/meta-arm/meta-arm-bsp/conf/machine/fvp-baser-aemv8r64.conf @@ -9,7 +9,7 @@ require conf/machine/include/arm/armv8r/arch-armv8r64.inc EXTRA_IMAGEDEPENDS += "boot-wrapper-aarch64" PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto" -PREFERRED_VERSION_u-boot ?= "2022.10" +PREFERRED_VERSION_u-boot ?= "2023.01" KERNEL_IMAGETYPE = "Image" KERNEL_DEVICETREE = "arm/fvp-baser-aemv8r64.dtb" diff --git a/meta-arm/meta-arm-bsp/conf/machine/include/corstone1000.inc b/meta-arm/meta-arm-bsp/conf/machine/include/corstone1000.inc index aeb1411ab9..72c0af518d 100644 --- a/meta-arm/meta-arm-bsp/conf/machine/include/corstone1000.inc +++ b/meta-arm/meta-arm-bsp/conf/machine/include/corstone1000.inc @@ -5,6 +5,8 @@ MACHINEOVERRIDES =. "corstone1000:" # TF-A TFA_PLATFORM = "corstone1000" EXTRA_IMAGEDEPENDS += "trusted-firmware-a" +PREFERRED_VERSION_trusted-firmware-a ?= "2.9.%" +PREFERRED_VERSION_tf-a-tests ?= "2.8.%" TFA_BL2_BINARY = "bl2-corstone1000.bin" TFA_FIP_BINARY = "fip-corstone1000.bin" @@ -34,8 +36,8 @@ UBOOT_ARCH = "arm" UBOOT_EXTLINUX = "0" #optee -PREFERRED_VERSION_optee-os ?= "3.20.%" -PREFERRED_VERSION_optee-client ?= "3.18.%" +PREFERRED_VERSION_optee-os ?= "3.22%" +PREFERRED_VERSION_optee-client ?= "3.22%" EXTRA_IMAGEDEPENDS += "optee-os" OPTEE_ARCH = "arm64" OPTEE_BINARY = "tee-pager_v2.bin" diff --git a/meta-arm/meta-arm-bsp/conf/machine/include/tc.inc b/meta-arm/meta-arm-bsp/conf/machine/include/tc.inc index f6674ba481..872f58cbfe 100644 --- a/meta-arm/meta-arm-bsp/conf/machine/include/tc.inc +++ b/meta-arm/meta-arm-bsp/conf/machine/include/tc.inc @@ -14,9 +14,9 @@ UBOOT_ENTRYPOINT = "0x80080000" PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto" # OP-TEE -PREFERRED_VERSION_optee-os ?= "3.18%" -PREFERRED_VERSION_optee-client ?= "3.18%" -PREFERRED_VERSION_optee-test ?= "3.18%" +PREFERRED_VERSION_optee-os ?= "3.20%" +PREFERRED_VERSION_optee-client ?= "3.20%" +PREFERRED_VERSION_optee-test ?= "3.20%" # Cannot use the default zImage on arm64 KERNEL_IMAGETYPE = "Image" @@ -30,6 +30,7 @@ IMAGE_NAME_SUFFIX = "" SERIAL_CONSOLES = "115200;ttyAMA0" EXTRA_IMAGEDEPENDS += "trusted-firmware-a optee-os" +PREFERRED_VERSION_trusted-firmware-a ?= "2.8.%" # FIXME - there is signed image dependency/race with testimage. # This should be fixed in oe-core TESTIMAGEDEPENDS:append = " virtual/kernel:do_deploy" diff --git a/meta-arm/meta-arm-bsp/conf/machine/n1sdp.conf b/meta-arm/meta-arm-bsp/conf/machine/n1sdp.conf index 16b409861b..c25a32dcff 100644 --- a/meta-arm/meta-arm-bsp/conf/machine/n1sdp.conf +++ b/meta-arm/meta-arm-bsp/conf/machine/n1sdp.conf @@ -29,7 +29,7 @@ EXTRA_IMAGEDEPENDS += "virtual/control-processor-firmware" #UEFI EDK2 firmware EXTRA_IMAGEDEPENDS += "edk2-firmware" -PREFERRED_VERSION_edk2-firmware ?= "202211" +PREFERRED_VERSION_edk2-firmware ?= "202305" #optee PREFERRED_VERSION_optee-os ?= "3.20.%" diff --git a/meta-arm/meta-arm-bsp/documentation/corstone500.md b/meta-arm/meta-arm-bsp/documentation/corstone500.md deleted file mode 100644 index 0f019611b7..0000000000 --- a/meta-arm/meta-arm-bsp/documentation/corstone500.md +++ /dev/null @@ -1,28 +0,0 @@ -# Corstone-500 Platform Support in meta-arm-bsp - -## Howto Build and Run - -### Configuration: - -Use the kas - -### Build: - -``bash$ kas build kas/corstone500.yml - -### Run: - -Building using kas should have fetch the Fixed Virtual Platform for this -platform and installed at: - -build/tmp/sysroots-components/x86_64/fvp-corstone500-native/usr/bin/./FVP_Corstone-500 - -with this in place is possible to launch the FVP using the runfvp inside the -scripts directory: - -cd scripts - -./runfvp ../build/tmp/deploy/images/corstone500/core-image-minimal-corstone500.fvpconf --console - -this will output the console in the launching terminal - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb index 8b09ab0d07..18649ceeaf 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/external-system_0.1.0.bb @@ -9,11 +9,12 @@ LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0 \ file://cmsis/LICENSE.txt;md5=e3fc50a88d0a364313df4b21ef20c29e" SRC_URI = "gitsm://git.gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx.git;protocol=https;branch=master \ - file://race.patch" + file://0001-tools-gen_module_code-atomically-rewrite-the-generat.patch" SRCREV = "8c9dca74b104ff6c9722fb0738ba93dd3719c080" -PV .= "+git${SRCPV}" +PV .= "+git" COMPATIBLE_MACHINE = "(corstone1000)" +PACKAGE_ARCH = "${MACHINE_ARCH}" # PRODUCT is passed to the Makefile to specify the platform to be used. PRODUCT = "corstone-1000" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/race.patch b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/0001-tools-gen_module_code-atomically-rewrite-the-generat.patch index c6bc4f2234..70087ff2e2 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/race.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/external-system/files/0001-tools-gen_module_code-atomically-rewrite-the-generat.patch @@ -1,11 +1,11 @@ -Upstream-Status: Submitted [https://gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx/-/issues/1] -Signed-off-by: Ross Burton <ross.burton@arm.com> - -From 34e1c04534607f5605255f39fb46e26261fc9c4e Mon Sep 17 00:00:00 2001 +From fa5ed6204f9188134a87ac9dd569e1496759a7f6 Mon Sep 17 00:00:00 2001 From: Ross Burton <ross.burton@arm.com> Date: Tue, 8 Sep 2020 11:49:08 +0100 Subject: [PATCH] tools/gen_module_code: atomically rewrite the generated files +Upstream-Status: Submitted [https://gitlab.arm.com/arm-reference-solutions/corstone1000/external_system/rtx/-/issues/1] +Signed-off-by: Ross Burton <ross.burton@arm.com> + The gen_module rule in rules.mk is marked as .PHONY, so make will execute it whenever it is mentioned. This results in gen_module_code being executed 64 times for a Juno build. @@ -21,12 +21,13 @@ writing the generated files. Change-Id: I82d44f9ea6537a91002e1f80de8861d208571630 Signed-off-by: Ross Burton <ross.burton@arm.com> + --- tools/gen_module_code.py | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/tools/gen_module_code.py b/tools/gen_module_code.py -index 7b3953845..ee099b713 100755 +index 6bf50e0..92623a7 100755 --- a/tools/gen_module_code.py +++ b/tools/gen_module_code.py @@ -17,6 +17,7 @@ @@ -37,7 +38,7 @@ index 7b3953845..ee099b713 100755 DEFAULT_PATH = 'build/' -@@ -53,13 +54,21 @@ +@@ -55,13 +56,21 @@ TEMPLATE_C = "/* This file was auto generated using {} */\n" \ def generate_file(path, filename, content): full_filename = os.path.join(path, filename) diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch index a9a839ea8d..9ae4b39f85 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch @@ -1,4 +1,4 @@ -From f526797b83113cc64e3e658c22d8a5d269896a2a Mon Sep 17 00:00:00 2001 +From 3bc797e097ef2b29acf36560e4d2bfeec31f8d81 Mon Sep 17 00:00:00 2001 From: Ben Horgan <ben.horgan@arm.com> Date: Fri, 4 Mar 2022 16:48:14 +0000 Subject: [PATCH] feat: emulate cntp timer register accesses using cnthps @@ -19,7 +19,7 @@ Change-Id: I67508203273baf3bd8e6be2d99717028db945715 create mode 100644 src/arch/aarch64/hypervisor/timer_el1.h diff --git a/Makefile b/Makefile -index 95cab9a5..21cca938 100644 +index 95cab9a56bfd..21cca938531d 100644 --- a/Makefile +++ b/Makefile @@ -60,7 +60,8 @@ CHECKPATCH := $(CURDIR)/third_party/linux/scripts/checkpatch.pl \ @@ -33,7 +33,7 @@ index 95cab9a5..21cca938 100644 OUT ?= out/$(PROJECT) OUT_DIR = out/$(PROJECT) diff --git a/src/arch/aarch64/hypervisor/BUILD.gn b/src/arch/aarch64/hypervisor/BUILD.gn -index 6068d1e8..de1a414d 100644 +index 6068d1e8f075..de1a414dac68 100644 --- a/src/arch/aarch64/hypervisor/BUILD.gn +++ b/src/arch/aarch64/hypervisor/BUILD.gn @@ -45,6 +45,7 @@ source_set("hypervisor") { @@ -45,7 +45,7 @@ index 6068d1e8..de1a414d 100644 ] diff --git a/src/arch/aarch64/hypervisor/cpu.c b/src/arch/aarch64/hypervisor/cpu.c -index bcf5ffce..d2df77d8 100644 +index 5e025b596674..edd5df134cfc 100644 --- a/src/arch/aarch64/hypervisor/cpu.c +++ b/src/arch/aarch64/hypervisor/cpu.c @@ -98,13 +98,20 @@ void arch_regs_reset(struct vcpu *vcpu) @@ -72,7 +72,7 @@ index bcf5ffce..d2df77d8 100644 } diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c -index 4bd8a3b4..4c1b6e48 100644 +index 3422ff7b8265..c495df40f3f5 100644 --- a/src/arch/aarch64/hypervisor/handler.c +++ b/src/arch/aarch64/hypervisor/handler.c @@ -34,6 +34,7 @@ @@ -83,8 +83,8 @@ index 4bd8a3b4..4c1b6e48 100644 /** * Hypervisor Fault Address Register Non-Secure. -@@ -1277,6 +1278,11 @@ void handle_system_register_access(uintreg_t esr_el2) - inject_el1_unknown_exception(vcpu, esr_el2); +@@ -1295,6 +1296,11 @@ void handle_system_register_access(uintreg_t esr_el2) + inject_el1_sysreg_trap_exception(vcpu, esr_el2); return; } + } else if (timer_el1_is_register_access(esr_el2)) { @@ -93,11 +93,11 @@ index 4bd8a3b4..4c1b6e48 100644 + return; + } } else { - inject_el1_unknown_exception(vcpu, esr_el2); + inject_el1_sysreg_trap_exception(vcpu, esr_el2); return; diff --git a/src/arch/aarch64/hypervisor/timer_el1.c b/src/arch/aarch64/hypervisor/timer_el1.c new file mode 100644 -index 00000000..c30e5543 +index 000000000000..c30e5543f436 --- /dev/null +++ b/src/arch/aarch64/hypervisor/timer_el1.c @@ -0,0 +1,104 @@ @@ -207,7 +207,7 @@ index 00000000..c30e5543 +} diff --git a/src/arch/aarch64/hypervisor/timer_el1.h b/src/arch/aarch64/hypervisor/timer_el1.h new file mode 100644 -index 00000000..04a43b6c +index 000000000000..04a43b6ca335 --- /dev/null +++ b/src/arch/aarch64/hypervisor/timer_el1.h @@ -0,0 +1,20 @@ @@ -232,10 +232,10 @@ index 00000000..04a43b6c +bool timer_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id, + uintreg_t esr); diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h -index cd6778b4..55e78330 100644 +index 6edc39f2af48..bf1a66d1d4c5 100644 --- a/src/arch/aarch64/msr.h +++ b/src/arch/aarch64/msr.h -@@ -126,3 +126,11 @@ +@@ -131,3 +131,11 @@ #define MSR_ELR_EL12 S3_5_C4_C0_1 #endif @@ -247,4 +247,3 @@ index cd6778b4..55e78330 100644 +#define MSR_CNTHPS_CTL_EL2 S3_4_C14_C5_1 +#define MSR_CNTHPS_CVAL_EL2 S3_4_C14_C5_2 +#define MSR_CNTHPS_TVAL_EL2 S3_4_C14_C5_0 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch index 9960f65dcf..9627a765f1 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch @@ -11,21 +11,22 @@ Upstream-Status: Pending [Not submitted to upstream yet] 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BUILD.gn b/BUILD.gn -index 62ba763..f26ce03 100644 +index cc6a78f4fdb8..acd1f9d1634b 100644 --- a/BUILD.gn +++ b/BUILD.gn -@@ -238,7 +238,6 @@ aarch64_toolchains("secure_tc") { - heap_pages = 120 +@@ -245,7 +245,6 @@ aarch64_toolchains("secure_tc") { + heap_pages = 180 max_cpus = 8 max_vms = 16 - branch_protection = "standard" toolchain_args = { plat_ffa = "//src/arch/aarch64/plat/ffa:spmc" plat_psci = "//src/arch/aarch64/plat/psci:spmc" -@@ -247,5 +246,6 @@ aarch64_toolchains("secure_tc") { +@@ -254,6 +253,7 @@ aarch64_toolchains("secure_tc") { secure_world = "1" pl011_base_address = "0x7ff80000" enable_mte = "1" + enable_vhe = "1" + plat_log_level = "LOG_LEVEL_INFO" } } diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-tc-increase-heap-pages.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-tc-increase-heap-pages.patch deleted file mode 100644 index fa35efc112..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0001-tc-increase-heap-pages.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 613dea068fa546956717ce0b60328e39d451f661 Mon Sep 17 00:00:00 2001 -From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> -Date: Fri, 29 Apr 2022 20:07:50 +0100 -Subject: [PATCH] tc: increase heap pages - -Upstream-Status: Pending -Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> ---- - BUILD.gn | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/BUILD.gn b/BUILD.gn -index 6b9b383..62ba763 100644 ---- a/BUILD.gn -+++ b/BUILD.gn -@@ -235,7 +235,7 @@ aarch64_toolchains("secure_tc") { - gicd_base_address = "0x30000000" - gicr_base_address = "0x30080000" - gicr_frames = 8 -- heap_pages = 60 -+ heap_pages = 120 - max_cpus = 8 - max_vms = 16 - branch_protection = "standard" --- -2.30.2 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch index d9ec6e2a99..3e6761519a 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0002-feat-emulate-interrupt-controller-register-access.patch @@ -1,4 +1,4 @@ -From 97a8ca1835f5d9512dacda497540d5523e56c7dd Mon Sep 17 00:00:00 2001 +From 9f5b07e30c82713b9598ea60d9f802bd419b560f Mon Sep 17 00:00:00 2001 From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Date: Tue, 26 Apr 2022 14:43:58 +0100 Subject: [PATCH] feat: emulate interrupt controller register access @@ -16,10 +16,10 @@ Upstream-Status: Inappropriate [Experimental feature] 4 files changed, 97 insertions(+) diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c -index 4c1b6e48..cd5146bd 100644 +index c495df40f3f5..13578fc99670 100644 --- a/src/arch/aarch64/hypervisor/handler.c +++ b/src/arch/aarch64/hypervisor/handler.c -@@ -1283,6 +1283,11 @@ void handle_system_register_access(uintreg_t esr_el2) +@@ -1301,6 +1301,11 @@ void handle_system_register_access(uintreg_t esr_el2) inject_el1_unknown_exception(vcpu, esr_el2); return; } @@ -29,10 +29,10 @@ index 4c1b6e48..cd5146bd 100644 + return; + } } else { - inject_el1_unknown_exception(vcpu, esr_el2); + inject_el1_sysreg_trap_exception(vcpu, esr_el2); return; diff --git a/src/arch/aarch64/hypervisor/perfmon.c b/src/arch/aarch64/hypervisor/perfmon.c -index f13b0354..05e216c8 100644 +index f13b035480d8..05e216c84c2e 100644 --- a/src/arch/aarch64/hypervisor/perfmon.c +++ b/src/arch/aarch64/hypervisor/perfmon.c @@ -116,6 +116,10 @@ @@ -131,7 +131,7 @@ index f13b0354..05e216c8 100644 + return true; +} diff --git a/src/arch/aarch64/hypervisor/perfmon.h b/src/arch/aarch64/hypervisor/perfmon.h -index 81669ba1..c90d45bf 100644 +index 81669ba1c401..c90d45bfc239 100644 --- a/src/arch/aarch64/hypervisor/perfmon.h +++ b/src/arch/aarch64/hypervisor/perfmon.h @@ -70,3 +70,8 @@ bool perfmon_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id, @@ -144,14 +144,13 @@ index 81669ba1..c90d45bf 100644 +bool intr_ctrl_el1_process_access(struct vcpu *vcpu, ffa_vm_id_t vm_id, + uintreg_t esr); diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h -index 55e78330..82aa8846 100644 +index bf1a66d1d4c5..b88a14b52f68 100644 --- a/src/arch/aarch64/msr.h +++ b/src/arch/aarch64/msr.h -@@ -134,3 +134,6 @@ +@@ -139,3 +139,6 @@ #define MSR_CNTHPS_CTL_EL2 S3_4_C14_C5_1 #define MSR_CNTHPS_CVAL_EL2 S3_4_C14_C5_2 #define MSR_CNTHPS_TVAL_EL2 S3_4_C14_C5_0 + +#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7 +#define ICC_SGI1R_EL1 S3_0_C12_C11_5 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-disable-alignment-check-for-EL0-partitions.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-disable-alignment-check-for-EL0-partitions.patch deleted file mode 100644 index 5e620cf318..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-disable-alignment-check-for-EL0-partitions.patch +++ /dev/null @@ -1,318 +0,0 @@ -From 1c4d28493faed6cf189c75fa91d19131e6a34e04 Mon Sep 17 00:00:00 2001 -From: Olivier Deprez <olivier.deprez@arm.com> -Date: Mon, 8 Aug 2022 19:14:23 +0200 -Subject: [PATCH] feat: disable alignment check for EL0 partitions - -Relax hw alignment check specifically for (S-)EL0 partitions when -Hafnium runs with VHE enabled. EL1 partitions have a specific control -for EL1 and EL0 with respect to alignment check. -Create a hyp_state structure (from already defined flying registers) -within the vCPU context to hold the Hypervisor EL2 static configuration -applied when a vCPU runs. This state is switched back and forth when -running the Hypervisor or the VM. -Add SCTLR_EL2 to this context. An EL0 partition context is initialized -with SCTLR_EL2.A=0 such that alignment check is disabled when EL0 runs -in the EL2&0 translation regime. SCTLR_EL2.A is set back when returning -to the Hypervisor such that Hypervisor execution runs with aligment -check enabled at EL2. -Remove HCR_EL2 saving from vCPU exit path provided this register state -is static and doesn't change while a vCPU runs. -The rationale for such change is to permit running upstream SW stacks -such as the EDKII/StandaloneMm [1] for which default build assumes -unaligned accesses are permitted. Similar query exists for running -Trusted Services on top of Hafnium [2]. - -[1] https://github.com/tianocore/edk2/tree/master/StandaloneMmPkg -[2] https://trusted-services.readthedocs.io/en/integration/ - -Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> -Change-Id: I2906f4c712425fcfb31adbf89e2e3b9ca293f181 -Upstream-Status: Submitted [https://review.trustedfirmware.org/c/hafnium/hafnium/+/16195] ---- - src/arch/aarch64/hypervisor/cpu.c | 9 ++++--- - src/arch/aarch64/hypervisor/exceptions.S | 32 ++++++++++++++++-------- - src/arch/aarch64/hypervisor/feature_id.c | 6 ++--- - src/arch/aarch64/hypervisor/handler.c | 18 +++++++------ - src/arch/aarch64/inc/hf/arch/types.h | 9 +++++-- - src/arch/aarch64/mm.c | 2 +- - src/arch/aarch64/sysregs.c | 11 ++++++-- - src/arch/aarch64/sysregs.h | 2 +- - 8 files changed, 59 insertions(+), 30 deletions(-) - -diff --git a/src/arch/aarch64/hypervisor/cpu.c b/src/arch/aarch64/hypervisor/cpu.c -index d2df77d8..a000159b 100644 ---- a/src/arch/aarch64/hypervisor/cpu.c -+++ b/src/arch/aarch64/hypervisor/cpu.c -@@ -115,7 +115,9 @@ void arch_regs_reset(struct vcpu *vcpu) - } - } - -- r->hcr_el2 = get_hcr_el2_value(vm_id, vcpu->vm->el0_partition); -+ r->hyp_state.hcr_el2 = -+ get_hcr_el2_value(vm_id, vcpu->vm->el0_partition); -+ r->hyp_state.sctlr_el2 = get_sctlr_el2_value(vcpu->vm->el0_partition); - r->lazy.cnthctl_el2 = cnthctl; - if (vcpu->vm->el0_partition) { - CHECK(has_vhe_support()); -@@ -125,10 +127,11 @@ void arch_regs_reset(struct vcpu *vcpu) - * are ignored and treated as 0. There is no need to mask the - * VMID (used as asid) to only 8 bits. - */ -- r->ttbr0_el2 = pa_addr(table) | ((uint64_t)vm_id << 48); -+ r->hyp_state.ttbr0_el2 = -+ pa_addr(table) | ((uint64_t)vm_id << 48); - r->spsr = PSR_PE_MODE_EL0T; - } else { -- r->ttbr0_el2 = read_msr(ttbr0_el2); -+ r->hyp_state.ttbr0_el2 = read_msr(ttbr0_el2); - r->lazy.vtcr_el2 = arch_mm_get_vtcr_el2(); - r->lazy.vttbr_el2 = pa_addr(table) | ((uint64_t)vm_id << 48); - #if SECURE_WORLD == 1 -diff --git a/src/arch/aarch64/hypervisor/exceptions.S b/src/arch/aarch64/hypervisor/exceptions.S -index 539e196d..d3732f86 100644 ---- a/src/arch/aarch64/hypervisor/exceptions.S -+++ b/src/arch/aarch64/hypervisor/exceptions.S -@@ -20,6 +20,9 @@ - #define ID_AA64PFR0_SVE_SHIFT (32) - #define ID_AA64PFR0_SVE_LENGTH (4) - -+#define SCTLR_EL2_A_SHIFT (1) -+#define HCR_EL2_TGE_SHIFT (27) -+ - /** - * Saves the volatile registers into the register buffer of the current vCPU. - */ -@@ -51,8 +54,6 @@ - mrs x1, elr_el2 - mrs x2, spsr_el2 - stp x1, x2, [x18, #VCPU_REGS + 8 * 31] -- mrs x1, hcr_el2 -- str x1, [x18, #VCPU_REGS + 8 * 33] - .endm - - /** -@@ -871,12 +872,13 @@ vcpu_restore_volatile_and_run: - msr elr_el2, x1 - msr spsr_el2, x2 - -- ldr x1, [x0, #VCPU_REGS + 8 * 33] -+ ldp x1, x2, [x0, #VCPU_REGS + 8 * 33] - msr hcr_el2, x1 -+ msr ttbr0_el2, x2 - isb - -- ldr x1, [x0, #VCPU_REGS + 8 * 34] -- msr ttbr0_el2, x1 -+ ldr x1, [x0, #VCPU_REGS + 8 * 35] -+ msr sctlr_el2, x1 - isb - - /* Restore x0..x3, which we have used as scratch before. */ -@@ -886,15 +888,17 @@ vcpu_restore_volatile_and_run: - - #if ENABLE_VHE - enable_vhe_tge: -+ mrs x0, id_aa64mmfr1_el1 -+ tst x0, #0xf00 -+ b.eq 1f -+ - /** - * Switch to host mode ({E2H, TGE} = {1,1}) when VHE is enabled. - * Note that E2H is always set when VHE is enabled. - */ -- mrs x0, id_aa64mmfr1_el1 -- tst x0, #0xf00 -- b.eq 1f -- orr x1, x1, #(1 << 27) -- msr hcr_el2, x1 -+ mrs x0, hcr_el2 -+ orr x0, x0, #(1 << HCR_EL2_TGE_SHIFT) -+ msr hcr_el2, x0 - isb - - /** -@@ -905,6 +909,14 @@ enable_vhe_tge: - ldr x0, [x0] - msr ttbr0_el2, x0 - isb -+ -+ /** -+ * Enable alignment check while Hypervisor runs. -+ */ -+ mrs x0, sctlr_el2 -+ orr x0, x0, #(1 << SCTLR_EL2_A_SHIFT) -+ msr sctlr_el2, x0 -+ isb - 1: - ret - #endif -diff --git a/src/arch/aarch64/hypervisor/feature_id.c b/src/arch/aarch64/hypervisor/feature_id.c -index ed3bf8f1..57f32627 100644 ---- a/src/arch/aarch64/hypervisor/feature_id.c -+++ b/src/arch/aarch64/hypervisor/feature_id.c -@@ -175,7 +175,7 @@ void feature_set_traps(struct vm *vm, struct arch_regs *regs) - ~(ID_AA64MMFR1_EL1_VH_MASK << ID_AA64MMFR1_EL1_VH_SHIFT); - - if (features & HF_FEATURE_RAS) { -- regs->hcr_el2 |= HCR_EL2_TERR; -+ regs->hyp_state.hcr_el2 |= HCR_EL2_TERR; - vm->arch.tid3_masks.id_aa64mmfr1_el1 &= - ~ID_AA64MMFR1_EL1_SPEC_SEI; - vm->arch.tid3_masks.id_aa64pfr0_el1 &= ~ID_AA64PFR0_EL1_RAS; -@@ -221,14 +221,14 @@ void feature_set_traps(struct vm *vm, struct arch_regs *regs) - } - - if (features & HF_FEATURE_LOR) { -- regs->hcr_el2 |= HCR_EL2_TLOR; -+ regs->hyp_state.hcr_el2 |= HCR_EL2_TLOR; - - vm->arch.tid3_masks.id_aa64mmfr1_el1 &= ~ID_AA64MMFR1_EL1_LO; - } - - if (features & HF_FEATURE_PAUTH) { - /* APK and API bits *enable* trapping when cleared. */ -- regs->hcr_el2 &= ~(HCR_EL2_APK | HCR_EL2_API); -+ regs->hyp_state.hcr_el2 &= ~(HCR_EL2_APK | HCR_EL2_API); - - vm->arch.tid3_masks.id_aa64isar1_el1 &= ~ID_AA64ISAR1_EL1_GPI; - vm->arch.tid3_masks.id_aa64isar1_el1 &= ~ID_AA64ISAR1_EL1_GPA; -diff --git a/src/arch/aarch64/hypervisor/handler.c b/src/arch/aarch64/hypervisor/handler.c -index cd5146bd..8a3d6289 100644 ---- a/src/arch/aarch64/hypervisor/handler.c -+++ b/src/arch/aarch64/hypervisor/handler.c -@@ -272,9 +272,9 @@ noreturn void sync_current_exception_noreturn(uintreg_t elr, uintreg_t spsr) - static void set_virtual_irq(struct arch_regs *r, bool enable) - { - if (enable) { -- r->hcr_el2 |= HCR_EL2_VI; -+ r->hyp_state.hcr_el2 |= HCR_EL2_VI; - } else { -- r->hcr_el2 &= ~HCR_EL2_VI; -+ r->hyp_state.hcr_el2 &= ~HCR_EL2_VI; - } - } - -@@ -283,14 +283,15 @@ static void set_virtual_irq(struct arch_regs *r, bool enable) - */ - static void set_virtual_irq_current(bool enable) - { -- uintreg_t hcr_el2 = current()->regs.hcr_el2; -+ struct vcpu *vcpu = current(); -+ uintreg_t hcr_el2 = vcpu->regs.hyp_state.hcr_el2; - - if (enable) { - hcr_el2 |= HCR_EL2_VI; - } else { - hcr_el2 &= ~HCR_EL2_VI; - } -- current()->regs.hcr_el2 = hcr_el2; -+ vcpu->regs.hyp_state.hcr_el2 = hcr_el2; - } - - /** -@@ -300,9 +301,9 @@ static void set_virtual_irq_current(bool enable) - static void set_virtual_fiq(struct arch_regs *r, bool enable) - { - if (enable) { -- r->hcr_el2 |= HCR_EL2_VF; -+ r->hyp_state.hcr_el2 |= HCR_EL2_VF; - } else { -- r->hcr_el2 &= ~HCR_EL2_VF; -+ r->hyp_state.hcr_el2 &= ~HCR_EL2_VF; - } - } - -@@ -311,14 +312,15 @@ static void set_virtual_fiq(struct arch_regs *r, bool enable) - */ - static void set_virtual_fiq_current(bool enable) - { -- uintreg_t hcr_el2 = current()->regs.hcr_el2; -+ struct vcpu *vcpu = current(); -+ uintreg_t hcr_el2 = vcpu->regs.hyp_state.hcr_el2; - - if (enable) { - hcr_el2 |= HCR_EL2_VF; - } else { - hcr_el2 &= ~HCR_EL2_VF; - } -- current()->regs.hcr_el2 = hcr_el2; -+ vcpu->regs.hyp_state.hcr_el2 = hcr_el2; - } - - #if SECURE_WORLD == 1 -diff --git a/src/arch/aarch64/inc/hf/arch/types.h b/src/arch/aarch64/inc/hf/arch/types.h -index 6379d73e..6b8b24f1 100644 ---- a/src/arch/aarch64/inc/hf/arch/types.h -+++ b/src/arch/aarch64/inc/hf/arch/types.h -@@ -79,8 +79,13 @@ struct arch_regs { - uintreg_t r[NUM_GP_REGS]; - uintreg_t pc; - uintreg_t spsr; -- uintreg_t hcr_el2; -- uintreg_t ttbr0_el2; -+ -+ /* Hypervisor configuration while a vCPU runs. */ -+ struct { -+ uintreg_t hcr_el2; -+ uintreg_t ttbr0_el2; -+ uintreg_t sctlr_el2; -+ } hyp_state; - - /* - * System registers. -diff --git a/src/arch/aarch64/mm.c b/src/arch/aarch64/mm.c -index 8ee65ca0..487ae353 100644 ---- a/src/arch/aarch64/mm.c -+++ b/src/arch/aarch64/mm.c -@@ -886,7 +886,7 @@ bool arch_mm_init(paddr_t table) - #endif - (0xff << (8 * STAGE1_NORMALINDX)), - -- .sctlr_el2 = get_sctlr_el2_value(), -+ .sctlr_el2 = get_sctlr_el2_value(false), - .vstcr_el2 = (1U << 31) | /* RES1. */ - (0 << 30) | /* SA. */ - (0 << 29) | /* SW. */ -diff --git a/src/arch/aarch64/sysregs.c b/src/arch/aarch64/sysregs.c -index e8c154b1..087ba4ed 100644 ---- a/src/arch/aarch64/sysregs.c -+++ b/src/arch/aarch64/sysregs.c -@@ -159,7 +159,7 @@ uintreg_t get_cptr_el2_value(void) - /** - * Returns the value for SCTLR_EL2 for the CPU. - */ --uintreg_t get_sctlr_el2_value(void) -+uintreg_t get_sctlr_el2_value(bool is_el0_partition) - { - uintreg_t sctlr_el2_value = 0; - -@@ -173,7 +173,14 @@ uintreg_t get_sctlr_el2_value(void) - - /* MMU-related bits. */ - sctlr_el2_value |= SCTLR_EL2_M; -- sctlr_el2_value |= SCTLR_EL2_A; -+ -+ /* -+ * Alignment check enabled, but in the case of an EL0 partition -+ * with VHE enabled. -+ */ -+ if (!(has_vhe_support() && is_el0_partition)) { -+ sctlr_el2_value |= SCTLR_EL2_A; -+ } - sctlr_el2_value |= SCTLR_EL2_C; - sctlr_el2_value |= SCTLR_EL2_SA; - sctlr_el2_value |= SCTLR_EL2_I; -diff --git a/src/arch/aarch64/sysregs.h b/src/arch/aarch64/sysregs.h -index babd2375..6fdab58e 100644 ---- a/src/arch/aarch64/sysregs.h -+++ b/src/arch/aarch64/sysregs.h -@@ -668,7 +668,7 @@ uintreg_t get_mdcr_el2_value(void); - - uintreg_t get_cptr_el2_value(void); - --uintreg_t get_sctlr_el2_value(void); -+uintreg_t get_sctlr_el2_value(bool is_el0_partition); - - /** - * Branch Target Identification mechanism support in AArch64 state. - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0004-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch index cfa7cfb73d..cd19f632c5 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0004-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/files/tc/0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch @@ -1,4 +1,4 @@ -From 4b59905d2fec01cc17038b1c167b4e57e7835adf Mon Sep 17 00:00:00 2001 +From 41f3ff2f011da69ff81234769353955e51c7e588 Mon Sep 17 00:00:00 2001 From: Davidson K <davidson.kumaresan@arm.com> Date: Thu, 7 Oct 2021 12:20:08 +0530 Subject: [PATCH] feat(vhe): set STAGE1_NS while mapping memory from NWd to SWd @@ -17,10 +17,10 @@ Upstream-Status: Pending [Not submitted to upstream yet] 1 file changed, 12 insertions(+) diff --git a/src/ffa_memory.c b/src/ffa_memory.c -index 048cca9c..8910cc79 100644 +index 5826cb2fdd4b..bae677633dea 100644 --- a/src/ffa_memory.c +++ b/src/ffa_memory.c -@@ -2483,6 +2483,18 @@ struct ffa_value ffa_memory_retrieve(struct vm_locked to_locked, +@@ -2618,6 +2618,18 @@ struct ffa_value ffa_memory_retrieve(struct vm_locked to_locked, memory_to_attributes = ffa_memory_permissions_to_mode( permissions, share_state->sender_orig_mode); diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc index 433d56129e..09de6f1e5a 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/hafnium/hafnium-tc.inc @@ -3,21 +3,13 @@ COMPATIBLE_MACHINE = "(tc?)" HAFNIUM_PLATFORM = "secure_tc" -# Intermediate SHA with 2.7 baseline version -SRCREV = "dd0561820946fe23bcd57cc129140437f72102a5" -PV = "2.7+git${SRCPV}" - FILESEXTRAPATHS:prepend:tc := "${THISDIR}/files/tc:" -SRC_URI:remove = "file://0003-Fix-build-with-clang-15.patch" - SRC_URI:append = " \ file://0001-feat-emulate-cntp-timer-register-accesses-using-cnth.patch \ file://0002-feat-emulate-interrupt-controller-register-access.patch \ - file://0003-feat-disable-alignment-check-for-EL0-partitions.patch \ - file://0004-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch \ - file://0001-tc-increase-heap-pages.patch;patchdir=project/reference \ - file://0002-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch;patchdir=project/reference \ + file://0003-feat-vhe-set-STAGE1_NS-while-mapping-memory-from-NWd.patch \ + file://0001-feat-vhe-enable-vhe-and-disable-branch-protection-fo.patch;patchdir=project/reference \ " do_compile() { diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/images/n1sdp-board-firmware_2022.06.22.bb b/meta-arm/meta-arm-bsp/recipes-bsp/images/n1sdp-board-firmware_2022.06.22.bb index 6a27f02ef0..1b502e5297 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/images/n1sdp-board-firmware_2022.06.22.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/images/n1sdp-board-firmware_2022.06.22.bb @@ -14,7 +14,7 @@ COMPATIBLE_MACHINE = "n1sdp" SRC_URI = "git://git.gitlab.arm.com/arm-reference-solutions/board-firmware.git;protocol=https;branch=n1sdp" SRCREV = "70ba494265eee76747faff38264860c19e214540" -PV .= "+git${SRCPV}" +PV .= "+git" S = "${WORKDIR}/git" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc index c89b132ce4..41d8f4484e 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-n1sdp.inc @@ -13,6 +13,9 @@ DEPENDS += "n1sdp-board-firmware" EXTRA_OECMAKE:append = " \ -DSCP_N1SDP_SENSOR_LIB_PATH=${RECIPE_SYSROOT}/n1sdp-board-firmware_source/LIB/sensor.a \ " +# scp-firmware version aligning to Arm Reference Solutions N1SDP-2023.06.22 Release +SRCREV = "543ae8ca3c9e38da3058311118fa3ceef1da47f7" +PV .= "+git" do_install:append() { fiptool \ diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch index 016de8d3de..6d5114e1c1 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch @@ -1,7 +1,4 @@ -Upstream-Status: Inappropriate -Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> - -From a31aee0988ef64724ec5866f10709f51f8cb3237 Mon Sep 17 00:00:00 2001 +From adaa22bc2f529bb34e9d4fe89ff5c65f0c83ca0c Mon Sep 17 00:00:00 2001 From: emeara01 <emekcan.aras@arm.com> Date: Wed, 11 May 2022 14:37:06 +0100 Subject: [PATCH] Fix FF-A version in SPMC manifest @@ -11,13 +8,14 @@ This commit corrects the FF-A version in corstone1000_spmc_manifest.dts. This patch will not be upstreamed and will be dropped once OPTEE version is updated for Corstone1000. +Upstream-Status: Inappropriate Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> --- .../corstone1000/common/fdts/corstone1000_spmc_manifest.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts b/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts -index 8e49ab83f..5baa1b115 100644 +index 8e49ab83f76a..5baa1b115b2e 100644 --- a/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts +++ b/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts @@ -20,7 +20,7 @@ @@ -29,6 +27,3 @@ index 8e49ab83f..5baa1b115 100644 exec_state = <0x0>; load_address = <0x0 0x2002000>; entrypoint = <0x0 0x2002000>; --- -2.17.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch index d834e95bd7..e26fd34e86 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch @@ -1,4 +1,4 @@ -From 360aa32846a97e775750e06865d462c6258179fa Mon Sep 17 00:00:00 2001 +From fa7ab9b40babee29d2aadb267dfce7a96f8989d4 Mon Sep 17 00:00:00 2001 From: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> Date: Mon, 9 Jan 2023 13:59:06 +0000 Subject: [PATCH] feat(corstone1000): bl2 loads fip based on metadata @@ -15,7 +15,6 @@ image starts at fip partition + fip signature area size. Upstream-Status: Pending Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> - --- bl2/bl2_main.c | 4 +++ .../corstone1000/common/corstone1000_plat.c | 32 ++++++------------- @@ -25,10 +24,10 @@ Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com> 5 files changed, 24 insertions(+), 32 deletions(-) diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c -index 5da803795..f25dc3029 100644 +index ce83692e0ebc..1a9febc007b2 100644 --- a/bl2/bl2_main.c +++ b/bl2/bl2_main.c -@@ -86,6 +86,10 @@ void bl2_main(void) +@@ -87,6 +87,10 @@ void bl2_main(void) /* Perform remaining generic architectural setup in S-EL1 */ bl2_arch_setup(); @@ -40,7 +39,7 @@ index 5da803795..f25dc3029 100644 fwu_init(); #endif /* PSA_FWU_SUPPORT */ diff --git a/plat/arm/board/corstone1000/common/corstone1000_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c -index 0235f8b84..7f9708a82 100644 +index 0235f8b8474c..7f9708a82489 100644 --- a/plat/arm/board/corstone1000/common/corstone1000_plat.c +++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c @@ -33,36 +33,17 @@ const mmap_region_t plat_arm_mmap[] = { @@ -98,7 +97,7 @@ index 0235f8b84..7f9708a82 100644 * is no power control present */ diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h -index 584d485f3..0bfab05a4 100644 +index 584d485f3ea7..0bfab05a482b 100644 --- a/plat/arm/board/corstone1000/common/include/platform_def.h +++ b/plat/arm/board/corstone1000/common/include/platform_def.h @@ -173,16 +173,16 @@ @@ -125,10 +124,10 @@ index 584d485f3..0bfab05a4 100644 /* * Some data must be aligned on the biggest cache line size in the platform. diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile -index ca548b836..32b5486a0 100644 +index 042e844626bd..45b76a022f91 100644 --- a/tools/cert_create/Makefile +++ b/tools/cert_create/Makefile -@@ -69,8 +69,8 @@ INC_DIR += -I ./include -I ${PLAT_INCLUDE} -I ${OPENSSL_DIR}/include +@@ -78,8 +78,8 @@ INC_DIR += -I ./include -I ${PLAT_INCLUDE} -I ${OPENSSL_DIR}/include # directory. However, for a local build of OpenSSL, the built binaries are # located under the main project directory (i.e.: ${OPENSSL_DIR}, not # ${OPENSSL_DIR}/lib/). @@ -140,10 +139,10 @@ index ca548b836..32b5486a0 100644 HOSTCC ?= gcc diff --git a/tools/fiptool/Makefile b/tools/fiptool/Makefile -index e6aeba95b..7c047479e 100644 +index 2ebee33931ba..dcfd314bee89 100644 --- a/tools/fiptool/Makefile +++ b/tools/fiptool/Makefile -@@ -29,7 +29,7 @@ endif +@@ -39,7 +39,7 @@ HOSTCCFLAGS += -DUSING_OPENSSL3=$(USING_OPENSSL3) # directory. However, for a local build of OpenSSL, the built binaries are # located under the main project directory (i.e.: ${OPENSSL_DIR}, not # ${OPENSSL_DIR}/lib/). @@ -152,7 +151,7 @@ index e6aeba95b..7c047479e 100644 ifeq (${V},0) Q := @ -@@ -37,7 +37,7 @@ else +@@ -47,7 +47,7 @@ else Q := endif @@ -161,6 +160,3 @@ index e6aeba95b..7c047479e 100644 HOSTCC ?= gcc --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-add-cpuhelper-to-makefile.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-add-cpuhelper-to-makefile.patch new file mode 100644 index 0000000000..6ddde10e4f --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0004-fix-corstone1000-add-cpuhelper-to-makefile.patch @@ -0,0 +1,28 @@ +From 33078d8ef143e8c79f06399de46dd26e1d53a220 Mon Sep 17 00:00:00 2001 +From: Gauri Sahnan <Gauri.Sahnan@arm.com> +Date: Tue, 8 Aug 2023 17:16:51 +0100 +Subject: fix(corstone1000): add cpuhelpers to makefile + +Adds cpu_helpers.S to the Makefile to align with the changes in new +trusted-firmware-a version. + +Signed-off-by: Gauri Sahnan <Gauri.Sahnan@arm.com> +Upstream-Status: Pending [Not submitted to upstream yet] +--- + plat/arm/board/corstone1000/platform.mk | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/plat/arm/board/corstone1000/platform.mk b/plat/arm/board/corstone1000/platform.mk +index 3edffe087..079e9d6c1 100644 +--- a/plat/arm/board/corstone1000/platform.mk ++++ b/plat/arm/board/corstone1000/platform.mk +@@ -43,6 +43,7 @@ BL2_SOURCES += plat/arm/board/corstone1000/common/corstone1000_security.c \ + plat/arm/board/corstone1000/common/corstone1000_err.c \ + plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c \ + lib/utils/mem_region.c \ ++ lib/cpus/aarch64/cpu_helpers.S \ + plat/arm/board/corstone1000/common/corstone1000_helpers.S \ + plat/arm/board/corstone1000/common/corstone1000_plat.c \ + plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c \ +-- +2.25.1 diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/rwx-segments.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/rwx-segments.patch index a4518ec6b0..a4518ec6b0 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/rwx-segments.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/rwx-segments.patch diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/tf-a-tests-no-warn-rwx-segments.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tf-a-tests-no-warn-rwx-segments.patch index 5d02e35317..5d02e35317 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/tf-a-tests-no-warn-rwx-segments.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tf-a-tests-no-warn-rwx-segments.patch diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.6.bb b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.6.bb index 02f3387396..02f3387396 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.6.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/fiptool-native_2.8.6.bb diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend index 392c6090e1..392c6090e1 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb index ed3b349950..ed3b349950 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc index 06be28ee62..3f66bed55a 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc @@ -3,16 +3,12 @@ COMPATIBLE_MACHINE = "(corstone1000)" FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:" - -SRC_URI:append = " \ +SRC_URI:append = " \ file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \ - file://0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch \ - file://0003-psci-SMCCC_ARCH_FEATURES-discovery-through-PSCI_FEATURES.patch \ - " - -#Sets TF-A version to 2.8.0 -SRCREV_tfa = "9881bb93a3bc0a3ea37e9f093e09ab4b360a9e48" -PV = "2.8.0" + file://0002-feat-corstone1000-bl2-loads-fip-based-on-metadata.patch \ + file://0003-psci-SMCCC_ARCH_FEATURES-discovery-through-PSCI_FEATURES.patch \ + file://0004-fix-corstone1000-add-cpuhelper-to-makefile.patch \ + " TFA_DEBUG = "1" TFA_UBOOT ?= "1" @@ -33,7 +29,7 @@ EXTRA_OEMAKE:append = " \ TARGET_PLATFORM=${TFA_TARGET_PLATFORM} \ ENABLE_STACK_PROTECTOR=strong \ ENABLE_PIE=1 \ - BL2_AT_EL3=1 \ + RESET_TO_BL2=1 \ CREATE_KEYS=1 \ GENERATE_COT=1 \ TRUSTED_BOARD_BOOT=1 \ diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc deleted file mode 100644 index acd9e3dbfb..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc +++ /dev/null @@ -1,17 +0,0 @@ -# Corstone-500 specific TFA support - -COMPATIBLE_MACHINE = "corstone500" -TFA_PLATFORM = "a5ds" -TFA_DEBUG = "1" -TFA_UBOOT = "1" -TFA_BUILD_TARGET = "all fip" -TFA_INSTALL_TARGET = "bl1.bin fip.bin" - -EXTRA_OEMAKE:append = " \ - ARCH=aarch32 \ - FVP_HW_CONFIG_DTS=fdts/a5ds.dts \ - ARM_ARCH_MAJOR=7 \ - AARCH32_SP=sp_min \ - ARM_CORTEX_A5=yes \ - ARM_XLAT_TABLES_LIB_V1=1 \ - " diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc index 654e43270f..c2fa223cf5 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc @@ -1,5 +1,9 @@ # N1SDP specific TFA support +# Align with N1SDP-2023.06.22 Manifest +SRCREV_tfa = "31f60a968347497562b0129134928d7ac4767710" +PV .= "+git" + COMPATIBLE_MACHINE = "n1sdp" TFA_PLATFORM = "n1sdp" TFA_BUILD_TARGET = "all fip" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend index 220dd6e33e..7fbcd3aba0 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.%.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_%.bbappend @@ -3,7 +3,6 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" # Machine specific TFAs MACHINE_TFA_REQUIRE ?= "" -MACHINE_TFA_REQUIRE:corstone500 = "trusted-firmware-a-corstone500.inc" MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc" MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp.inc" MACHINE_TFA_REQUIRE:juno = "trusted-firmware-a-juno.inc" diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.6.bb b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.6.bb index 140faf5335..cffc6db17c 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.6.bb +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.8.6.bb @@ -1,4 +1,4 @@ -require trusted-firmware-a.inc +require recipes-bsp/trusted-firmware-a/trusted-firmware-a.inc # TF-A v2.8.6 SRCREV_tfa = "ff0bd5f9bb2ba2f31fb9cec96df917747af9e92d" @@ -6,12 +6,6 @@ SRCBRANCH = "lts-v2.8" SRC_URI += "file://rwx-segments.patch" -# Enable passing TOS_FW_CONFIG from FIP package to Trusted OS. -SRC_URI:append:qemuarm64-secureboot = " \ - file://add-spmc_manifest-for-qemu.patch \ - file://feat-qemu-update-abi-between-spmd-and-spmc.patch \ - " - LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" # mbed TLS v2.28.2 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch new file mode 100644 index 0000000000..2f5ba04b42 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/0005-Platform-corstone1000-add-unique-firmware-GUID.patch @@ -0,0 +1,35 @@ +From 3004fda909079ebebd62c495a4e49e64d6c8a85f Mon Sep 17 00:00:00 2001 +From: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com> +Date: Tue, 8 Aug 2023 10:58:01 +0000 +Subject: [PATCH] Platform corstone1000 add unique firmware GUID + +Add unique Corstone-1000 firmware GUID + +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com> +--- + .../target/arm/corstone1000/fw_update_agent/fwu_agent.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c +index f564f2902c..9c31aeee9d 100644 +--- a/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c ++++ b/platform/ext/target/arm/corstone1000/fw_update_agent/fwu_agent.c +@@ -113,10 +113,10 @@ enum fwu_agent_state_t { + }; + + struct efi_guid full_capsule_image_guid = { +- .time_low = 0xe2bb9c06, +- .time_mid = 0x70e9, +- .time_hi_and_version = 0x4b14, +- .clock_seq_and_node = {0x97, 0xa3, 0x5a, 0x79, 0x13, 0x17, 0x6e, 0x3f} ++ .time_low = 0x989f3a4e, ++ .time_mid = 0x46e0, ++ .time_hi_and_version = 0x4cd0, ++ .clock_seq_and_node = {0x98, 0x77, 0xa2, 0x5c, 0x70, 0xc0, 0x13, 0x29} + }; + + +-- +2.38.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc index 0831ed0e9b..a259390a52 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/trusted-firmware-m-corstone1000.inc @@ -32,6 +32,7 @@ SRC_URI:append:corstone1000 = " \ file://0002-Platform-Corstone1000-Increase-BL2_DATA_SIZE.patch \ file://0003-Platform-Corstone1000-Calculate-the-new-CRC32-value-.patch \ file://0004-arm-trusted-firmware-m-disable-fatal-warnings.patch \ + file://0005-Platform-corstone1000-add-unique-firmware-GUID.patch \ " # TF-M ships patches for external dependencies that needs to be applied diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-Increase-the-unzipped-Kernel-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-corstone1000-detect-inflated-kernel-size.patch index 63c42c70b7..9fd5b33b70 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-Increase-the-unzipped-Kernel-size.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0033-corstone1000-detect-inflated-kernel-size.patch @@ -1,29 +1,29 @@ -From df23489adcba1cdcbcb4fefbed0896fc1f408700 Mon Sep 17 00:00:00 2001 -From: Emekcan Aras <emekcan.aras@arm.com> -Date: Wed, 2 Aug 2023 17:07:05 +0100 -Subject: [PATCH] Increase the unzipped Kernel size +From b57e05e95735b9b58e81b7a67f483b645c56811e Mon Sep 17 00:00:00 2001 +From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> +Date: Fri, 11 Aug 2023 10:41:19 +0100 +Subject: [PATCH] corstone1000: detect inflated kernel size -Increases the unzipped kernel size for corstone1000. +use filesize variable set by unzip command Upstream-Status: Pending [Not submitted to upstream yet] -Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> +Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> --- configs/corstone1000_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig -index a0af413de8..54a5bca354 100644 +index b6b1ccdd78..8a10bca069 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig -@@ -15,7 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y +@@ -17,7 +17,7 @@ CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk" -CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; unzip $kernel_addr 0x90000000; loadm 0x90000000 $kernel_addr_r 0xf00000; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" -+CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; unzip $kernel_addr 0x90000000; loadm 0x90000000 $kernel_addr_r 0xfb0000; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" ++CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; unzip $kernel_addr 0x90000000; loadm 0x90000000 $kernel_addr_r $filesize; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" CONFIG_CONSOLE_RECORD=y CONFIG_LOGLEVEL=7 # CONFIG_DISPLAY_CPUINFO is not set -- -2.17.1 +2.25.1 diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch new file mode 100644 index 0000000000..197a06950a --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0034-corstone1000-ESRT-add-unique-firmware-GUID.patch @@ -0,0 +1,47 @@ +From 98b33cc6b3a56f56224e0a6fe6c3564de7b1341a Mon Sep 17 00:00:00 2001 +From: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com> +Date: Tue, 8 Aug 2023 10:24:39 +0000 +Subject: [PATCH] corstone1000: ESRT: add unique firmware GUID + +Add unique Corstone-1000 firmware GUID + +Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Anusmita Dutta Mazumder <anusmita.duttamazumder@arm.com> +--- + lib/efi_loader/efi_firmware.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c +index 6135f8ed1c..c9117ae2b2 100644 +--- a/lib/efi_loader/efi_firmware.c ++++ b/lib/efi_loader/efi_firmware.c +@@ -20,12 +20,12 @@ + #define FMP_PAYLOAD_HDR_SIGNATURE SIGNATURE_32('M', 'S', 'S', '1') + + #if CONFIG_IS_ENABLED(TARGET_CORSTONE1000) +-#define EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID \ +- EFI_GUID(0xe2bb9c06, 0x70e9, 0x4b14, 0x97, 0xa3, \ +- 0x5a, 0x79, 0x13, 0x17, 0x6e, 0x3f) ++/* Firmware GUID */ ++#define EFI_CORSTONE1000_FIRMWARE_GUID \ ++ EFI_GUID(0x989f3a4e, 0x46e0, 0x4cd0, 0x98, 0x77, \ ++ 0xa2, 0x5c, 0x70, 0xc0, 0x13, 0x29) + +- const efi_guid_t efi_firmware_image_type_uboot_raw = +- EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID; ++efi_guid_t corstone1000_firmware_guid = EFI_CORSTONE1000_FIRMWARE_GUID; + + static efi_status_t efi_corstone1000_img_info_get ( + efi_uintn_t *image_info_size, +@@ -353,7 +353,7 @@ efi_status_t EFIAPI efi_firmware_get_image_info( + descriptor_version, descriptor_count, + descriptor_size, + package_version, package_version_name, +- &efi_firmware_image_type_uboot_raw); ++ &corstone1000_firmware_guid); + #else + ret = efi_fill_image_desc_array(image_info_size, image_info, + descriptor_version, descriptor_count, +-- +2.38.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0001-armv7-adding-generic-timer-access-through-MMIO.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0001-armv7-adding-generic-timer-access-through-MMIO.patch deleted file mode 100644 index 1d28631a21..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0001-armv7-adding-generic-timer-access-through-MMIO.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 2bb9fb8414b8ad35ed5fc6c91a34c21cef285a01 Mon Sep 17 00:00:00 2001 -From: Rui Miguel Silva <rui.silva@linaro.org> -Date: Wed, 18 Dec 2019 21:52:34 +0000 -Subject: [PATCH 1/2] armv7: adding generic timer access through MMIO - -Upstream-Status: Pending [Not submitted to upstream yet] -Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> - -This driver enables the ARMv7 generic timer. - -The access to the timer registers is through memory mapping (MMIO). - -This driver can be used by u-boot to access to the timer through MMIO -when arch_timer is not available in the core (access using system -instructions not possible), for example, in case of Cortex-A5. - -This driver configures and enables the generic timer at -the u-boot initcall level (timer_init) before u-boot relocation. - -Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> -Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> - - -Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> ---- - arch/arm/cpu/armv7/Makefile | 1 + - arch/arm/cpu/armv7/mmio_timer.c | 75 +++++++++++++++++++++++++++++++++ - scripts/config_whitelist.txt | 1 + - 3 files changed, 77 insertions(+) - create mode 100644 arch/arm/cpu/armv7/mmio_timer.c - -diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile -index bfbd85ae64ef..1a0a24e53110 100644 ---- a/arch/arm/cpu/armv7/Makefile -+++ b/arch/arm/cpu/armv7/Makefile -@@ -28,6 +28,7 @@ obj-$(CONFIG_ARMV7_PSCI) += psci.o psci-common.o - obj-$(CONFIG_IPROC) += iproc-common/ - obj-$(CONFIG_KONA) += kona-common/ - obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o -+obj-$(CONFIG_SYS_MMIO_TIMER) += mmio_timer.o - - ifneq (,$(filter s5pc1xx exynos,$(SOC))) - obj-y += s5p-common/ -diff --git a/arch/arm/cpu/armv7/mmio_timer.c b/arch/arm/cpu/armv7/mmio_timer.c -new file mode 100644 -index 000000000000..edd806e06e42 ---- /dev/null -+++ b/arch/arm/cpu/armv7/mmio_timer.c -@@ -0,0 +1,75 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2019, Arm Limited. All rights reserved. -+ * -+ */ -+ -+#include <common.h> -+#include <asm/io.h> -+#include <div64.h> -+#include <bootstage.h> -+#include <asm/global_data.h> -+ -+DECLARE_GLOBAL_DATA_PTR; -+ -+#define CNTCTLBASE 0x1a020000UL -+#define CNTREADBASE 0x1a030000UL -+#define CNTEN (1 << 0) -+#define CNTFCREQ (1 << 8) -+ -+static inline uint32_t mmio_read32(uintptr_t addr) -+{ -+ return *(volatile uint32_t*)addr; -+} -+ -+static inline void mmio_write32(uintptr_t addr, uint32_t data) -+{ -+ *(volatile uint32_t*)addr = data; -+} -+ -+int timer_init(void) -+{ -+ /* calculate the frequency in ms */ -+ gd->arch.timer_rate_hz = COUNTER_FREQUENCY / CONFIG_SYS_HZ; -+ -+ /* configure CNTFID0 register: set the base frequency */ -+ mmio_write32(CNTCTLBASE + 0x20, COUNTER_FREQUENCY); -+ -+ /* -+ * configure CNTCR register: -+ * enable the generic counter and; -+ * select the first frequency entry -+ */ -+ mmio_write32(CNTCTLBASE, CNTFCREQ | CNTEN); -+ -+ return 0; -+} -+ -+unsigned long long get_ticks(void) -+{ -+ return (((u64)(mmio_read32(CNTREADBASE + 0x4)) << 32) | -+ mmio_read32(CNTREADBASE)); -+} -+ -+ulong get_timer(ulong base) -+{ -+ return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base; -+} -+ -+void __udelay(unsigned long usec) -+{ -+ unsigned long endtime; -+ -+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz, -+ 1000UL); -+ -+ endtime += get_ticks(); -+ -+ while (get_ticks() < endtime) -+ ; -+} -+ -+ulong get_tbclk(void) -+{ -+ return gd->arch.timer_rate_hz; -+} -diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt -index ea71f9d23449..1496d9b88233 100644 ---- a/scripts/config_whitelist.txt -+++ b/scripts/config_whitelist.txt -@@ -610,6 +610,7 @@ CONFIG_SYS_MMC_U_BOOT_DST - CONFIG_SYS_MMC_U_BOOT_OFFS - CONFIG_SYS_MMC_U_BOOT_SIZE - CONFIG_SYS_MMC_U_BOOT_START -+CONFIG_SYS_MMIO_TIMER - CONFIG_SYS_MOR_VAL - CONFIG_SYS_MRAM_BASE - CONFIG_SYS_NAND_AMASK --- -2.39.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0002-board-arm-add-corstone500-board.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0002-board-arm-add-corstone500-board.patch deleted file mode 100644 index 5aec24cc47..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone500/0002-board-arm-add-corstone500-board.patch +++ /dev/null @@ -1,299 +0,0 @@ -From 376e7cc533e27f943191d44c112e3812885b8fd1 Mon Sep 17 00:00:00 2001 -From: Rui Miguel Silva <rui.silva@linaro.org> -Date: Wed, 8 Jan 2020 09:48:11 +0000 -Subject: [PATCH 2/2] board: arm: add corstone500 board - -Upstream-Status: Pending [Not submitted to upstream yet] -Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> - -Add support for the Arm corstone500 platform, with a cortex-a5 -chip, add the default configuration, initialization and -makefile for this system. - -Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> ---- - arch/arm/Kconfig | 10 +++ - board/armltd/corstone500/Kconfig | 12 +++ - board/armltd/corstone500/Makefile | 8 ++ - board/armltd/corstone500/corstone500.c | 48 ++++++++++++ - configs/corstone500_defconfig | 41 ++++++++++ - include/configs/corstone500.h | 102 +++++++++++++++++++++++++ - 6 files changed, 221 insertions(+) - create mode 100644 board/armltd/corstone500/Kconfig - create mode 100644 board/armltd/corstone500/Makefile - create mode 100644 board/armltd/corstone500/corstone500.c - create mode 100644 configs/corstone500_defconfig - create mode 100644 include/configs/corstone500.h - -diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig -index cac4fa09fd32..b875c1ef3d32 100644 ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1309,6 +1309,15 @@ config TARGET_CORSTONE1000 - select PL01X_SERIAL - select DM - -+config TARGET_CORSTONE500 -+ bool "Support Corstone500" -+ select CPU_V7A -+ select SEMIHOSTING -+ select PL01X_SERIAL -+ help -+ This enables support for Corstone500 ARM which is a -+ Cortex-A5 system -+ - config TARGET_TOTAL_COMPUTE - bool "Support Total Compute Platform" - select ARM64 -@@ -2264,6 +2273,7 @@ source "board/bosch/shc/Kconfig" - source "board/bosch/guardian/Kconfig" - source "board/Marvell/octeontx/Kconfig" - source "board/Marvell/octeontx2/Kconfig" -+source "board/armltd/corstone500/Kconfig" - source "board/armltd/vexpress/Kconfig" - source "board/armltd/vexpress64/Kconfig" - source "board/cortina/presidio-asic/Kconfig" -diff --git a/board/armltd/corstone500/Kconfig b/board/armltd/corstone500/Kconfig -new file mode 100644 -index 000000000000..8e689bd1fdc8 ---- /dev/null -+++ b/board/armltd/corstone500/Kconfig -@@ -0,0 +1,12 @@ -+if TARGET_CORSTONE500 -+ -+config SYS_BOARD -+ default "corstone500" -+ -+config SYS_VENDOR -+ default "armltd" -+ -+config SYS_CONFIG_NAME -+ default "corstone500" -+ -+endif -diff --git a/board/armltd/corstone500/Makefile b/board/armltd/corstone500/Makefile -new file mode 100644 -index 000000000000..6598fdd3ae0d ---- /dev/null -+++ b/board/armltd/corstone500/Makefile -@@ -0,0 +1,8 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# (C) Copyright 2022 ARM Limited -+# (C) Copyright 2022 Linaro -+# Rui Miguel Silva <rui.silva@linaro.org> -+# -+ -+obj-y := corstone500.o -diff --git a/board/armltd/corstone500/corstone500.c b/board/armltd/corstone500/corstone500.c -new file mode 100644 -index 000000000000..e878f5c6a521 ---- /dev/null -+++ b/board/armltd/corstone500/corstone500.c -@@ -0,0 +1,48 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * (C) Copyright 2022 ARM Limited -+ * (C) Copyright 2022 Linaro -+ * Rui Miguel Silva <rui.silva@linaro.org> -+ */ -+ -+#include <common.h> -+#include <dm.h> -+#include <dm/platform_data/serial_pl01x.h> -+#include <malloc.h> -+#include <asm/global_data.h> -+ -+static const struct pl01x_serial_plat serial_platdata = { -+ .base = V2M_UART0, -+ .type = TYPE_PL011, -+ .clock = CONFIG_PL011_CLOCK, -+}; -+ -+U_BOOT_DRVINFO(corstone500_serials) = { -+ .name = "serial_pl01x", -+ .plat = &serial_platdata, -+}; -+ -+int board_init(void) -+{ -+ return 0; -+} -+ -+int dram_init(void) -+{ -+ gd->ram_size = PHYS_SDRAM_1_SIZE; -+ -+ return 0; -+} -+ -+int dram_init_banksize(void) -+{ -+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; -+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -+ -+ return 0; -+} -+ -+void reset_cpu(ulong addr) -+{ -+} -+ -diff --git a/configs/corstone500_defconfig b/configs/corstone500_defconfig -new file mode 100644 -index 000000000000..91661beb8d8d ---- /dev/null -+++ b/configs/corstone500_defconfig -@@ -0,0 +1,41 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_TARGET_CORSTONE500=y -+CONFIG_TEXT_BASE=0x88000000 -+CONFIG_SYS_MALLOC_LEN=0x840000 -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x40000 -+CONFIG_SYS_PROMPT="corstone500# " -+CONFIG_IDENT_STRING=" corstone500 aarch32" -+CONFIG_SYS_LOAD_ADDR=0x90000000 -+CONFIG_SYS_MEMTEST_START=0x80000000 -+CONFIG_SYS_MEMTEST_END=0xff000000 -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x83f00000 -+CONFIG_SUPPORT_RAW_INITRD=y -+CONFIG_BOOTDELAY=1 -+CONFIG_USE_BOOTARGS=y -+CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1a200000 root=/dev/ram0 rw loglevel=9" -+# CONFIG_DISPLAY_CPUINFO is not set -+# CONFIG_DISPLAY_BOARDINFO is not set -+CONFIG_HUSH_PARSER=y -+# CONFIG_CMD_CONSOLE is not set -+CONFIG_CMD_BOOTZ=y -+# CONFIG_CMD_XIMG is not set -+# CONFIG_CMD_EDITENV is not set -+# CONFIG_CMD_ENV_EXISTS is not set -+CONFIG_CMD_MEMTEST=y -+CONFIG_CMD_ARMFLASH=y -+# CONFIG_CMD_LOADS is not set -+# CONFIG_CMD_ITEST is not set -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_DHCP=y -+# CONFIG_CMD_NFS is not set -+CONFIG_CMD_MII=y -+CONFIG_CMD_PING=y -+CONFIG_CMD_CACHE=y -+CONFIG_CMD_FAT=y -+CONFIG_DM=y -+CONFIG_MTD_NOR_FLASH=y -+CONFIG_DM_SERIAL=y -+CONFIG_OF_LIBFDT=y -diff --git a/include/configs/corstone500.h b/include/configs/corstone500.h -new file mode 100644 -index 000000000000..416f5fa4399d ---- /dev/null -+++ b/include/configs/corstone500.h -@@ -0,0 +1,102 @@ -+/* SPDX-License-Identifier: GPL-2.0+ */ -+/* -+ * (C) Copyright 2022 ARM Limited -+ * (C) Copyright 2022 Linaro -+ * Rui Miguel Silva <rui.silva@linaro.org> -+ * -+ * Configuration for Cortex-A5 Corstone500. Parts were derived from other ARM -+ * configurations. -+ */ -+ -+#ifndef __CORSTONE500_H -+#define __CORSTONE500_H -+ -+/* Generic Timer Definitions */ -+#define CONFIG_SYS_HZ_CLOCK 7500000 -+#define CONFIG_SYS_HZ 1000 -+#define COUNTER_FREQUENCY CONFIG_SYS_HZ_CLOCK -+ -+#ifdef CONFIG_CORSTONE500_MEMORY_MAP_EXTENDED -+#define V2M_SRAM0 0x00010000 -+#define V2M_SRAM1 0x02200000 -+#define V2M_QSPI 0x0a800000 -+#else -+#define V2M_SRAM0 0x00000000 -+#define V2M_SRAM1 0x02000000 -+#define V2M_QSPI 0x08000000 -+#endif -+ -+#define V2M_DEBUG 0x10000000 -+#define V2M_BASE_PERIPH 0x1a000000 -+#define V2M_A5_PERIPH 0x1c000000 -+#define V2M_L2CC_PERIPH 0x1c010000 -+ -+#define V2M_MASTER_EXPANSION0 0x40000000 -+#define V2M_MASTER_EXPANSION1 0x60000000 -+ -+#define V2M_BASE 0x80000000 -+ -+#define V2M_PERIPH_OFFSET(x) (x << 16) -+ -+#define V2M_SYSID (V2M_BASE_PERIPH) -+#define V2M_SYCTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(1)) -+#define V2M_COUNTER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(2)) -+#define V2M_COUNTER_READ (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(3)) -+#define V2M_TIMER_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(4)) -+#define V2M_TIMER0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(5)) -+ -+#define V2M_WATCHDOG_CTL (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(16)) -+#define V2M_WATCHDOG_REFRESH (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(17)) -+ -+#define V2M_UART0 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(32)) -+#define V2M_UART1 (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(33)) -+ -+#define V2M_RTC (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(34)) -+#define V2M_TRNG (V2M_BASE_PERIPH + V2M_PERIPH_OFFSET(35)) -+ -+/* PL011 Serial Configuration */ -+#define CONFIG_CONS_INDEX 0 -+#define CONFIG_PL011_CLOCK 7500000 -+ -+/* Physical Memory Map */ -+#define PHYS_SDRAM_1 (V2M_BASE) -+ -+/* Top 16MB reserved for secure world use */ -+#define DRAM_SEC_SIZE 0x01000000 -+#define PHYS_SDRAM_1_SIZE (0x80000000 - DRAM_SEC_SIZE) -+ -+/* Miscellaneous configurable options */ -+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -+ -+#define CONFIG_SYS_MMIO_TIMER -+ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "kernel_name=Image\0" \ -+ "kernel_addr=0x80f00000\0" \ -+ "initrd_name=ramdisk.img\0" \ -+ "initrd_addr=0x84000000\0" \ -+ "fdt_name=devtree.dtb\0" \ -+ "fdt_addr=0x83000000\0" \ -+ "fdt_high=0xffffffff\0" \ -+ "initrd_high=0xffffffff\0" -+ -+#define CONFIG_BOOTCOMMAND "echo copy to RAM...; " \ -+ "cp.b 0x80100000 $kernel_addr 0xb00000; " \ -+ "cp.b 0x80d00000 $initrd_addr 0x800000; " \ -+ "bootz $kernel_addr $initrd_addr:0x800000 $fdt_addr" -+ -+/* Monitor Command Prompt */ -+#define CONFIG_SYS_FLASH_BASE 0x80000000 -+/* Store environment at top of flash */ -+#define CONFIG_ENV_ADDR 0x0a7c0000 -+#define CONFIG_ENV_SECT_SIZE 0x0040000 -+ -+#define CONFIG_SYS_FLASH_CFI 1 -+#define CONFIG_FLASH_CFI_DRIVER 1 -+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -+#define CONFIG_SYS_MAX_FLASH_BANKS 1 -+ -+#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ -+#define FLASH_MAX_SECTOR_SI 0x00040000 -+#define CONFIG_ENV_IS_IN_FLASH 1 -+#endif --- -2.39.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0001-armv8-Add-ARMv8-MPU-configuration-logic.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0001-armv8-Add-ARMv8-MPU-configuration-logic.patch index dd6b77d3a5..45db74e133 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0001-armv8-Add-ARMv8-MPU-configuration-logic.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0001-armv8-Add-ARMv8-MPU-configuration-logic.patch @@ -1,7 +1,7 @@ -From e90aa7853ae32cb03c86249a6c572ec88cdebaa2 Mon Sep 17 00:00:00 2001 +From 401a88bf6019941d4095476de76af5893686d6f6 Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Wed, 26 May 2021 17:41:10 +0100 -Subject: [PATCH 1/9] armv8: Add ARMv8 MPU configuration logic +Subject: [PATCH] armv8: Add ARMv8 MPU configuration logic Detect whether an MMU is present at the current exception level. If not, initialize the MPU instead of the MMU during init, and clear the @@ -19,6 +19,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Change-Id: I0ee3879f9d7f03fe940664b3551c68eeaa458d17 + --- arch/arm/cpu/armv8/cache_v8.c | 101 ++++++++++++++++++++++++++++++- arch/arm/include/asm/armv8/mpu.h | 59 ++++++++++++++++++ @@ -27,7 +28,7 @@ Change-Id: I0ee3879f9d7f03fe940664b3551c68eeaa458d17 create mode 100644 arch/arm/include/asm/armv8/mpu.h diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c -index e4736e5643..798aed8058 100644 +index 2a226fd063..8611a35eb3 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -15,6 +15,7 @@ @@ -145,8 +146,8 @@ index e4736e5643..798aed8058 100644 + } } - set_sctlr(get_sctlr() | CR_C); -@@ -519,7 +610,11 @@ void dcache_disable(void) + /* Set up page tables only once (it is done also by mmu_setup()) */ +@@ -523,7 +614,11 @@ void dcache_disable(void) set_sctlr(sctlr & ~(CR_C|CR_M)); flush_dcache_all(); @@ -254,6 +255,3 @@ index 87d1c77e8b..4510db98a2 100644 /* * ID_AA64PFR0_EL1 bits definitions */ --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0002-vexpress64-add-MPU-memory-map-for-the-BASER_FVP.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0002-vexpress64-add-MPU-memory-map-for-the-BASER_FVP.patch index b8cab45e40..103e48479c 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0002-vexpress64-add-MPU-memory-map-for-the-BASER_FVP.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0002-vexpress64-add-MPU-memory-map-for-the-BASER_FVP.patch @@ -1,7 +1,7 @@ -From 181f5efb401ffaa5ab0898b07a976796f75e502a Mon Sep 17 00:00:00 2001 +From 5b42322cb57692dbea7d2c39fd8769b6f0f6b7af Mon Sep 17 00:00:00 2001 From: Qi Feng <qi.feng@arm.com> Date: Tue, 26 Jul 2022 18:13:23 +0800 -Subject: [PATCH 2/9] vexpress64: add MPU memory map for the BASER_FVP +Subject: [PATCH] vexpress64: add MPU memory map for the BASER_FVP The previous patch added support for initializing an Armv8 MPU. There is only an MPU at S-EL2 on the BASER_FVP, so add a platform-specific MPU memory map. @@ -12,6 +12,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Signed-off-by: Qi Feng <qi.feng@arm.com> + --- board/armltd/vexpress64/vexpress64.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) @@ -56,6 +57,3 @@ index af326dc6f4..2310d18eb7 100644 static struct mm_region vexpress64_mem_map[] = { { .virt = V2M_PA_BASE, --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0003-armv8-Allow-disabling-exception-vectors-on-non-SPL-b.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0003-armv8-Allow-disabling-exception-vectors-on-non-SPL-b.patch index caabf804b2..5953abc652 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0003-armv8-Allow-disabling-exception-vectors-on-non-SPL-b.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0003-armv8-Allow-disabling-exception-vectors-on-non-SPL-b.patch @@ -1,8 +1,7 @@ -From 07cc3e4af3def76d92faf39712d4fd8717b21d2b Mon Sep 17 00:00:00 2001 +From ffb0f72a67926c3053308cf03420bc0c36675d42 Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Fri, 10 Dec 2021 11:41:19 +0000 -Subject: [PATCH 3/9] armv8: Allow disabling exception vectors on non-SPL - builds +Subject: [PATCH] armv8: Allow disabling exception vectors on non-SPL builds On the BASER_FVP, U-Boot shares EL2 with another bootloader, so we do not wish to overide the exception vector, but we are also not using an @@ -19,6 +18,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Change-Id: I0cf0fc6d7ef4d45791411cf1f67c65e198cc8b2b + --- arch/arm/cpu/armv8/Kconfig | 10 ++++++++-- arch/arm/cpu/armv8/Makefile | 6 ++---- @@ -72,7 +72,7 @@ index 2e4bf9e038..001a31cae7 100644 endif obj-y += tlb.o diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S -index 28f0df13f0..f831e77af3 100644 +index f3ea858577..7fad901336 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -104,7 +104,7 @@ pie_skip_reloc: @@ -102,6 +102,3 @@ index 495eb1dee3..683d983c36 100644 # CONFIG_MMC is not set CONFIG_VIRTIO_MMIO=y +CONFIG_ARMV8_EXCEPTION_VECTORS=n --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0004-armv8-ARMV8_SWITCH_TO_EL1-improvements.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0004-armv8-ARMV8_SWITCH_TO_EL1-improvements.patch index 81758fce71..157a15d7df 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0004-armv8-ARMV8_SWITCH_TO_EL1-improvements.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0004-armv8-ARMV8_SWITCH_TO_EL1-improvements.patch @@ -1,7 +1,7 @@ -From 30405f59881c73946b6b0ffdbf25804f9fbf1585 Mon Sep 17 00:00:00 2001 +From 14e204ffca5870d6bfd238627937a2028c88589d Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Wed, 14 Jul 2021 12:44:27 +0100 -Subject: [PATCH 4/9] armv8: ARMV8_SWITCH_TO_EL1 improvements +Subject: [PATCH] armv8: ARMV8_SWITCH_TO_EL1 improvements Convert CONFIG_ARMV8_SWITCH_TO_EL1 to a Kconfig variable. @@ -16,6 +16,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Change-Id: If98478148d6d8d1f732acac5439276700614815f + --- arch/arm/cpu/armv8/exception_level.c | 21 ++++++++++++++-- arch/arm/lib/bootm.c | 36 ++++++++++++++++------------ @@ -66,7 +67,7 @@ index b11936548f..4aad1550f4 100644 } } diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c -index 9f086f3b90..b044aeca88 100644 +index e414ef8267..9a86c17d2a 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -270,7 +270,6 @@ __weak void update_os_arch_secondary_cores(uint8_t os_arch) @@ -84,8 +85,8 @@ index 9f086f3b90..b044aeca88 100644 -#endif /* Subcommand: GO */ - static void boot_jump_linux(bootm_headers_t *images, int flag) -@@ -312,21 +310,29 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) + static void boot_jump_linux(struct bootm_headers *images, int flag) +@@ -312,21 +310,29 @@ static void boot_jump_linux(struct bootm_headers *images, int flag) update_os_arch_secondary_cores(images->os.arch); @@ -137,6 +138,3 @@ index 683d983c36..6044f82b00 100644 CONFIG_VIRTIO_MMIO=y CONFIG_ARMV8_EXCEPTION_VECTORS=n +CONFIG_ARMV8_SWITCH_TO_EL1=y --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0005-armv8-Make-disabling-HVC-configurable-when-switching.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0005-armv8-Make-disabling-HVC-configurable-when-switching.patch index f64db3bf46..82926cc36e 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0005-armv8-Make-disabling-HVC-configurable-when-switching.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0005-armv8-Make-disabling-HVC-configurable-when-switching.patch @@ -1,8 +1,7 @@ -From a6daca56b77d7f1b26483f10eb33ebdd6e157d3e Mon Sep 17 00:00:00 2001 +From e3d24bc1fd0b09915b5181de1282f7008bbf776f Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Fri, 10 Dec 2021 16:37:26 +0000 -Subject: [PATCH 5/9] armv8: Make disabling HVC configurable when switching to - EL1 +Subject: [PATCH] armv8: Make disabling HVC configurable when switching to EL1 On the BASER_FVP there is no EL3, so HVC is used to provide PSCI services. Therefore we cannot disable hypercalls. @@ -15,6 +14,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Change-Id: I463d82f1db8a3cafcab40a9c0c208753569cc300 + --- arch/arm/cpu/armv8/Kconfig | 9 +++++++++ arch/arm/include/asm/macro.h | 10 ++++++++-- @@ -78,6 +78,3 @@ index 6044f82b00..6226f6b2c1 100644 CONFIG_ARMV8_EXCEPTION_VECTORS=n CONFIG_ARMV8_SWITCH_TO_EL1=y +CONFIG_ARMV8_DISABLE_HVC=n --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0006-vexpress64-Do-not-set-COUNTER_FREQUENCY.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0006-vexpress64-Do-not-set-COUNTER_FREQUENCY.patch index ebbc939c05..eb2273e565 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0006-vexpress64-Do-not-set-COUNTER_FREQUENCY.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0006-vexpress64-Do-not-set-COUNTER_FREQUENCY.patch @@ -1,7 +1,7 @@ -From 862d3f1ac66a75cdf48adbdebd8adbaf671a9366 Mon Sep 17 00:00:00 2001 +From 571f44d5292cfead6f68bf4c6c9519872337bfd0 Mon Sep 17 00:00:00 2001 From: Qi Feng <qi.feng@arm.com> Date: Thu, 28 Jul 2022 17:47:18 +0800 -Subject: [PATCH 6/9] vexpress64: Do not set COUNTER_FREQUENCY +Subject: [PATCH] vexpress64: Do not set COUNTER_FREQUENCY VExpress boards normally run as a second-stage bootloader so should not need to modify CNTFRQ_EL0. On the BASER_FVP, U-Boot can modify it if @@ -13,6 +13,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Signed-off-by: Qi Feng <qi.feng@arm.com> + --- configs/vexpress_aemv8r_defconfig | 1 - 1 file changed, 1 deletion(-) @@ -27,6 +28,3 @@ index 6226f6b2c1..b902a6a7d9 100644 CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="arm_fvp" --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0007-vexpress64-Enable-LIBFDT_OVERLAY-in-the-vexpress_aem.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0007-vexpress64-Enable-LIBFDT_OVERLAY-in-the-vexpress_aem.patch index 8c09ed2b74..6f5bfa38c4 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0007-vexpress64-Enable-LIBFDT_OVERLAY-in-the-vexpress_aem.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0007-vexpress64-Enable-LIBFDT_OVERLAY-in-the-vexpress_aem.patch @@ -1,7 +1,7 @@ -From 32beea722c1167c9b33f1ecfdc28d360cabd6823 Mon Sep 17 00:00:00 2001 +From df01346bb63c821cf8e73202e2894ceda9cb692b Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Tue, 22 Feb 2022 15:32:51 +0000 -Subject: [PATCH 7/9] vexpress64: Enable LIBFDT_OVERLAY in the vexpress_aemv8r +Subject: [PATCH] vexpress64: Enable LIBFDT_OVERLAY in the vexpress_aemv8r defconfig Issue-Id: SCM-3874 @@ -9,6 +9,7 @@ Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Change-Id: Ide0532cf2de89f1bca9c8d4bd2ed0c1a1c57599f + --- configs/vexpress_aemv8r_defconfig | 1 + 1 file changed, 1 insertion(+) @@ -22,6 +23,3 @@ index b902a6a7d9..a58a9db385 100644 CONFIG_ARMV8_SWITCH_TO_EL1=y CONFIG_ARMV8_DISABLE_HVC=n +CONFIG_OF_LIBFDT_OVERLAY=y --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0008-armv8-Allow-PRBAR-MPU-attributes-to-be-configured.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0008-armv8-Allow-PRBAR-MPU-attributes-to-be-configured.patch index 8be14ee85a..61bdf928f4 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0008-armv8-Allow-PRBAR-MPU-attributes-to-be-configured.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0008-armv8-Allow-PRBAR-MPU-attributes-to-be-configured.patch @@ -1,7 +1,7 @@ -From 01490ab8deb0f0b61eeb55a02ee5ea430cfe7eee Mon Sep 17 00:00:00 2001 +From 665ab8253a0e3e17db54a1682bbee0f5659939a2 Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Wed, 18 May 2022 15:24:19 +0100 -Subject: [PATCH 8/9] armv8: Allow PRBAR MPU attributes to be configured +Subject: [PATCH] armv8: Allow PRBAR MPU attributes to be configured In a previous patch, support was added to initialize an S-EL2 MPU on armv8r64 machines. This implementation allowed the PRLAR attribute @@ -21,6 +21,7 @@ Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Upstream-Status: Inappropriate [other] Implementation pending further discussion Change-Id: I6b72aead91ad12412262aa32c61a53e12eab3984 + --- arch/arm/cpu/armv8/cache_v8.c | 12 ++++++++---- arch/arm/include/asm/armv8/mpu.h | 3 ++- @@ -28,7 +29,7 @@ Change-Id: I6b72aead91ad12412262aa32c61a53e12eab3984 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c -index 798aed8058..e336339281 100644 +index 8611a35eb3..f7de952187 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -390,7 +390,9 @@ static void mpu_clear_regions(void) @@ -100,6 +101,3 @@ index 2310d18eb7..531fa4d618 100644 }, { /* List terminator */ 0, --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0009-armv8-Enable-icache-when-switching-exception-levels-.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0009-armv8-Enable-icache-when-switching-exception-levels-.patch index 0e0a248136..a4bc746e30 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0009-armv8-Enable-icache-when-switching-exception-levels-.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/fvp-baser-aemv8r64/0009-armv8-Enable-icache-when-switching-exception-levels-.patch @@ -1,7 +1,7 @@ -From 0f15f6b02825b042ddc1d753f62cf87f30b1fe12 Mon Sep 17 00:00:00 2001 +From c7301588a3aec9ebf36749da601d0d6e3d807bfc Mon Sep 17 00:00:00 2001 From: Peter Hoyes <Peter.Hoyes@arm.com> Date: Thu, 19 May 2022 09:02:32 +0100 -Subject: [PATCH 9/9] armv8: Enable icache when switching exception levels in +Subject: [PATCH] armv8: Enable icache when switching exception levels in bootefi bootefi calls the function switch_to_non_secure_mode before calling the @@ -26,6 +26,7 @@ Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Upstream-Status: Inappropriate [other] Implementation pending further discussion Change-Id: I678cd5ba39b56e124ab7854608289cd14651ce65 + --- arch/arm/cpu/armv8/exception_level.c | 3 +++ 1 file changed, 3 insertions(+) @@ -58,6 +59,3 @@ index 4aad1550f4..0a3e5428e7 100644 /* Move into EL1 and keep running there */ armv8_switch_to_el1((uintptr_t)&non_secure_jmp, 0, 0, 0, (uintptr_t)entry_non_secure, ES_TO_AARCH64); --- -2.25.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend index 6c0d49046a..d1dcd74557 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend @@ -1,13 +1,6 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" # -# Corstone-500 MACHINE -# -SRC_URI:append:corstone500 = " \ - file://0001-armv7-adding-generic-timer-access-through-MMIO.patch \ - file://0002-board-arm-add-corstone500-board.patch" - -# # Corstone1000 64-bit machines # DEPENDS:append:corstone1000 = " gnutls-native" @@ -50,7 +43,8 @@ SRC_URI:append:corstone1000 = " \ file://0030-corstone1000-boot-index-from-active.patch \ file://0031-corstone1000-enable-PSCI-reset.patch \ file://0032-Enable-EFI-set-get-time-services.patch \ - file://0033-Increase-the-unzipped-Kernel-size.patch \ + file://0033-corstone1000-detect-inflated-kernel-size.patch \ + file://0034-corstone1000-ESRT-add-unique-firmware-GUID.patch \ " # diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2022.10.bb b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2022.10.bb deleted file mode 100644 index 905ae552a7..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot_2022.10.bb +++ /dev/null @@ -1,26 +0,0 @@ -HOMEPAGE = "http://www.denx.de/wiki/U-Boot/WebHome" -DESCRIPTION = "U-Boot, a boot loader for Embedded boards based on PowerPC, \ -ARM, MIPS and several other processors, which can be installed in a boot \ -ROM and used to initialize and test the hardware or to download and run \ -application code." -SECTION = "bootloaders" -DEPENDS += "flex-native bison-native" - -LICENSE = "GPL-2.0-or-later" -LIC_FILES_CHKSUM = "file://Licenses/README;md5=2ca5f2c35c8cc335f0a19756634782f1" -PE = "1" - -# We use the revision in order to avoid having to fetch it from the -# repo during parse -SRCREV = "4debc57a3da6c3f4d3f89a637e99206f4cea0a96" - -SRC_URI = "git://git.denx.de/u-boot.git;branch=master \ - " - -S = "${WORKDIR}/git" -B = "${WORKDIR}/build" -do_configure[cleandirs] = "${B}" - -require recipes-bsp/u-boot/u-boot.inc - -DEPENDS += "bc-native dtc-native gnutls-native" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc index 0d557f3cb1..fcdedf8004 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/edk2-firmware-n1sdp.inc @@ -11,18 +11,16 @@ COMPATIBLE_MACHINE = "n1sdp" EFIDIR = "/EFI/BOOT" EFI_BOOT_IMAGE = "bootaa64.efi" -FILESEXTRAPATHS:prepend := "${THISDIR}/files/edk2-platforms:" - +FILESEXTRAPATHS:prepend := "${THISDIR}/files/n1sdp:" SRC_URI:append = "\ file://0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch;patchdir=edk2-platforms \ - file://0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch;patchdir=edk2-platforms \ - file://0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch;patchdir=edk2-platforms \ - file://0004-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch;patchdir=edk2-platforms \ - file://0005-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch;patchdir=edk2-platforms \ - file://0006-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch;patchdir=edk2-platforms \ - file://0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch;patchdir=edk2-platforms \ - file://0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch;patchdir=edk2-platforms \ - file://0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch;patchdir=edk2-platforms \ + file://0002-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch;patchdir=edk2-platforms \ + file://0003-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch;patchdir=edk2-platforms \ + file://0004-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch;patchdir=edk2-platforms \ + file://0005-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch;patchdir=edk2-platforms \ + file://0006-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch;patchdir=edk2-platforms \ + file://0007-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch;patchdir=edk2-platforms \ + file://0008-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch;patchdir=edk2-platforms \ " do_deploy:append() { diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch deleted file mode 100644 index 5e634175d5..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch +++ /dev/null @@ -1,44 +0,0 @@ -From ba3ed154863d1acd0996178beaf3a2bc693b938c Mon Sep 17 00:00:00 2001 -From: sahil <sahil@arm.com> -Date: Wed, 20 Apr 2022 12:24:41 +0530 -Subject: [PATCH] Platform/ARM/N1Sdp: Fix RemoteDdrSize cast - -RemoteDdrSize calculation wraps around when booting N1Sdp in -multichip mode. Casting it to UINT64 to fix the issue. - -Upstream-Status: Pending -Signed-off-by: Adam Johnston <adam.johnston@arm.com> -Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com> -Signed-off-by: sahil <sahil@arm.com> -Change-Id: Ic51269a8d67669684a5f056701cfbef6beb23da2 ---- - .../ConfigurationManagerDxe/ConfigurationManager.c | 2 +- - Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c -index c15020f5..b11c0425 100644 ---- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c -+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c -@@ -1254,7 +1254,7 @@ InitializePlatformRepository ( - PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length = Dram2Size;
-
- if (PlatInfo->MultichipMode == 1) {
-- RemoteDdrSize = ((PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
-+ RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
-
- // Update Remote DDR Region1
- PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain = 1;
-diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c -index 1d53ec75..5cacd437 100644 ---- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c -+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c -@@ -157,7 +157,7 @@ ArmPlatformGetVirtualMemoryMap ( - DramBlock2Size);
-
- if (PlatInfo->MultichipMode == 1) {
-- RemoteDdrSize = ((PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
-+ RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
-
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch index c7f163b40b..c7f163b40b 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0002-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch index cafc299096..cafc299096 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0002-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0004-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0003-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch index 264d262b22..264d262b22 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0004-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0003-Silicon-ARM-NeoverseN1Soc-Enable-SCP-QSPI-flash-regi.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0005-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0004-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch index eabbaf9976..eabbaf9976 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0005-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0004-Platform-ARM-N1Sdp-NOR-flash-library-for-N1Sdp.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0006-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0005-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch index 1db94e4948..1db94e4948 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0006-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0005-Platform-ARM-N1Sdp-NOR-flash-Dxe-Driver-for-N1Sdp.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0006-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch index 197a6eca48..197a6eca48 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0007-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0006-Platform-ARM-N1Sdp-Persistent-storage-for-N1Sdp.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0007-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch index 3951b48be4..3951b48be4 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0008-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0007-Platform-ARM-N1Sdp-Enable-FaultTolerantWrite-Dxe-dri.patch diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0008-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch index 8e14699585..8e14699585 100644 --- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0009-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch +++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/n1sdp/0008-Platform-ARM-N1Sdp-manually-poll-QSPI-status-bit-aft.patch diff --git a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0001-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch b/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0001-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch deleted file mode 100644 index 329c939fb6..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0001-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch +++ /dev/null @@ -1,138 +0,0 @@ -From dc250cab31c6611cc7fa76bc8b2027dbd56dd65d Mon Sep 17 00:00:00 2001 -From: Pierre Gondois <pierre.gondois@arm.com> -Date: Mon, 7 Nov 2022 16:56:58 +0100 -Subject: [PATCH] arm64: dts: Update cache properties for Arm Ltd platforms - -The DeviceTree Specification v0.3 specifies that the cache node -"compatible" and "cache-level" properties are required. - -Cf. s3.8 Multi-level and Shared Cache Nodes -The 'cache-unified' property should be present if one of the properties -for unified cache is present ('cache-size', ...). - -Update the relevant device trees nodes accordingly. - -Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> -Link: https://lore.kernel.org/r/20221107155825.1644604-6-pierre.gondois@arm.com -Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> - -Signed-off-by: Jon Mason <jon.mason@arm.com> -Upstream-Status: Backport ---- - arch/arm64/boot/dts/arm/corstone1000.dtsi | 1 + - arch/arm64/boot/dts/arm/foundation-v8.dtsi | 1 + - arch/arm64/boot/dts/arm/juno-r1.dts | 2 ++ - arch/arm64/boot/dts/arm/juno-r2.dts | 2 ++ - arch/arm64/boot/dts/arm/juno.dts | 2 ++ - arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 1 + - arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 1 + - 7 files changed, 10 insertions(+) - -diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi -index 4e46826f883a..21f1f952e985 100644 ---- a/arch/arm64/boot/dts/arm/corstone1000.dtsi -+++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi -@@ -53,6 +53,7 @@ gic: interrupt-controller@1c000000 { - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-unified; - cache-level = <2>; - cache-size = <0x80000>; - cache-line-size = <64>; -diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi -index 83e3e7e3984f..c8bd23b1a7ba 100644 ---- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi -+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi -@@ -58,6 +58,7 @@ cpu3: cpu@3 { - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - -diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts -index 6451c62146fd..1d90eeebb37d 100644 ---- a/arch/arm64/boot/dts/arm/juno-r1.dts -+++ b/arch/arm64/boot/dts/arm/juno-r1.dts -@@ -189,6 +189,7 @@ A53_3: cpu@103 { - - A57_L2: l2-cache0 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x200000>; - cache-line-size = <64>; - cache-sets = <2048>; -@@ -197,6 +198,7 @@ A57_L2: l2-cache0 { - - A53_L2: l2-cache1 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x100000>; - cache-line-size = <64>; - cache-sets = <1024>; -diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts -index 438cd1ff4bd0..d2ada69b0a43 100644 ---- a/arch/arm64/boot/dts/arm/juno-r2.dts -+++ b/arch/arm64/boot/dts/arm/juno-r2.dts -@@ -195,6 +195,7 @@ A53_3: cpu@103 { - - A72_L2: l2-cache0 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x200000>; - cache-line-size = <64>; - cache-sets = <2048>; -@@ -203,6 +204,7 @@ A72_L2: l2-cache0 { - - A53_L2: l2-cache1 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x100000>; - cache-line-size = <64>; - cache-sets = <1024>; -diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts -index cf4a58211399..5e48a01a5b9f 100644 ---- a/arch/arm64/boot/dts/arm/juno.dts -+++ b/arch/arm64/boot/dts/arm/juno.dts -@@ -194,6 +194,7 @@ A53_3: cpu@103 { - - A57_L2: l2-cache0 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x200000>; - cache-line-size = <64>; - cache-sets = <2048>; -@@ -202,6 +203,7 @@ A57_L2: l2-cache0 { - - A53_L2: l2-cache1 { - compatible = "cache"; -+ cache-unified; - cache-size = <0x100000>; - cache-line-size = <64>; - cache-sets = <1024>; -diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts -index 258991ad7cc0..ef68f5aae7dd 100644 ---- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts -+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts -@@ -71,6 +71,7 @@ cpu@3 { - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - -diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts -index 5b6d9d8e934d..796cd7d02eb5 100644 ---- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts -+++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts -@@ -57,6 +57,7 @@ cpu@1 { - - L2_0: l2-cache0 { - compatible = "cache"; -+ cache-level = <2>; - }; - }; - diff --git a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0002-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch b/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0002-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch deleted file mode 100644 index 4495f397bd..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0002-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch +++ /dev/null @@ -1,35 +0,0 @@ -From bd354219987dddbf8ab6fd11450b4046547aca1b Mon Sep 17 00:00:00 2001 -From: James Clark <james.clark@arm.com> -Date: Thu, 17 Nov 2022 10:25:36 +0000 -Subject: [PATCH] arm64: dts: fvp: Add SPE to Foundation FVP - -Add SPE DT node to FVP model. If the model doesn't support SPE (e.g., -turned off via parameter), the driver will skip the initialisation -accordingly and thus is safe. - -Signed-off-by: James Clark <james.clark@arm.com> -Link: https://lore.kernel.org/r/20221117102536.237515-1-james.clark@arm.com -Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> - -Signed-off-by: Jon Mason <jon.mason@arm.com> -Upstream-Status: Backport ---- - arch/arm64/boot/dts/arm/foundation-v8.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi -index c8bd23b1a7ba..029578072d8f 100644 ---- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi -+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi -@@ -85,6 +85,11 @@ pmu { - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - }; - -+ spe-pmu { -+ compatible = "arm,statistical-profiling-extension-v1"; -+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; -+ }; -+ - watchdog@2a440000 { - compatible = "arm,sbsa-gwdt"; - reg = <0x0 0x2a440000 0 0x1000>, diff --git a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0003-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch b/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0003-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch deleted file mode 100644 index fc02751004..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0003-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 22e740d069e14875a64864bf86e0826a96560b44 Mon Sep 17 00:00:00 2001 -From: Sudeep Holla <sudeep.holla@arm.com> -Date: Fri, 18 Nov 2022 15:10:17 +0000 -Subject: [PATCH] arm64: dts: fvp: Add information about L1 and L2 caches - -Add the information about L1 and L2 caches on FVP RevC platform. -Though the cache size is configurable through the model parameters, -having default values in the device tree helps to exercise and debug -any code utilising the cache information without the need of real -hardware. - -Link: https://lore.kernel.org/r/20221118151017.704716-1-sudeep.holla@arm.com -Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> - -Signed-off-by: Jon Mason <jon.mason@arm.com> -Upstream-Status: Backport ---- - arch/arm64/boot/dts/arm/fvp-base-revc.dts | 73 +++++++++++++++++++++++ - 1 file changed, 73 insertions(+) - -diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts -index 5f6f30c801a7..60472d65a355 100644 ---- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts -+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts -@@ -47,48 +47,121 @@ cpu0: cpu@0 { - compatible = "arm,armv8"; - reg = <0x0 0x000>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C0_L2>; - }; - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x100>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C0_L2>; - }; - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x200>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C0_L2>; - }; - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x300>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C0_L2>; - }; - cpu4: cpu@10000 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x10000>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C1_L2>; - }; - cpu5: cpu@10100 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x10100>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C1_L2>; - }; - cpu6: cpu@10200 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x10200>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C1_L2>; - }; - cpu7: cpu@10300 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x10300>; - enable-method = "psci"; -+ i-cache-size = <0x8000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&C1_L2>; -+ }; -+ C0_L2: l2-cache0 { -+ compatible = "cache"; -+ cache-size = <0x80000>; -+ cache-line-size = <64>; -+ cache-sets = <512>; -+ cache-level = <2>; -+ cache-unified; -+ }; -+ -+ C1_L2: l2-cache1 { -+ compatible = "cache"; -+ cache-size = <0x80000>; -+ cache-line-size = <64>; -+ cache-sets = <512>; -+ cache-level = <2>; -+ cache-unified; - }; - }; - diff --git a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0004-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch b/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0004-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch deleted file mode 100644 index e3828ec96a..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/juno/0004-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 4edb625e2256d5761312110e34cbc0164915d772 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> -Date: Fri, 25 Nov 2022 15:41:12 +0100 -Subject: [PATCH] ARM: dts: vexpress: align LED node names with dtschema - -The node names should be generic and DT schema expects certain pattern. - - vexpress-v2p-ca9.dtb: leds: 'user1', 'user2', 'user3', 'user4', 'user5', 'user6', 'user7', 'user8' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' - -Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> -Link: https://lore.kernel.org/r/20221125144112.476817-1-krzysztof.kozlowski@linaro.org -Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> - -Signed-off-by: Jon Mason <jon.mason@arm.com> -Upstream-Status: Backport ---- - arch/arm/boot/dts/vexpress-v2m.dtsi | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi -index f434fe5cf4a1..def538ce8769 100644 ---- a/arch/arm/boot/dts/vexpress-v2m.dtsi -+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi -@@ -383,49 +383,49 @@ v2m_refclk32khz: refclk32khz { - leds { - compatible = "gpio-leds"; - -- user1 { -+ led-user1 { - label = "v2m:green:user1"; - gpios = <&v2m_led_gpios 0 0>; - linux,default-trigger = "heartbeat"; - }; - -- user2 { -+ led-user2 { - label = "v2m:green:user2"; - gpios = <&v2m_led_gpios 1 0>; - linux,default-trigger = "mmc0"; - }; - -- user3 { -+ led-user3 { - label = "v2m:green:user3"; - gpios = <&v2m_led_gpios 2 0>; - linux,default-trigger = "cpu0"; - }; - -- user4 { -+ led-user4 { - label = "v2m:green:user4"; - gpios = <&v2m_led_gpios 3 0>; - linux,default-trigger = "cpu1"; - }; - -- user5 { -+ led-user5 { - label = "v2m:green:user5"; - gpios = <&v2m_led_gpios 4 0>; - linux,default-trigger = "cpu2"; - }; - -- user6 { -+ led-user6 { - label = "v2m:green:user6"; - gpios = <&v2m_led_gpios 5 0>; - linux,default-trigger = "cpu3"; - }; - -- user7 { -+ led-user7 { - label = "v2m:green:user7"; - gpios = <&v2m_led_gpios 6 0>; - linux,default-trigger = "cpu4"; - }; - -- user8 { -+ led-user8 { - label = "v2m:green:user8"; - gpios = <&v2m_led_gpios 7 0>; - linux,default-trigger = "cpu5"; diff --git a/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc b/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc index 64b1e41e60..b49ac800a2 100644 --- a/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc +++ b/meta-arm/meta-arm-bsp/recipes-kernel/linux/linux-arm-platforms.inc @@ -20,13 +20,6 @@ SRC_URI:append:n1sdp = " ${SRC_URI_KMETA}" SRCREV:arm-platforms-kmeta = "6147e82375aa9df8f2a162d42ea6406c79c854c5" # -# Corstone-500 KMACHINE -# -COMPATIBLE_MACHINE:corstone500 = "corstone500" -KBUILD_DEFCONFIG:corstone500 = "multi_v7_defconfig" -KCONFIG_MODE:corstone500 = "--alldefconfig" - -# # Corstone1000 KMACHINE # FILESEXTRAPATHS:prepend:corstone1000 := "${ARMBSPFILESPATHS}" @@ -77,12 +70,6 @@ SRC_URI:append:fvp-baser-aemv8r64 = " file://fvp-baser-aemv8r64.dts;subdir=git/a # COMPATIBLE_MACHINE:juno = "juno" FILESEXTRAPATHS:prepend:juno := "${ARMBSPFILESPATHS}" -SRC_URI:append:juno = " \ - file://0001-arm64-dts-Update-cache-properties-for-Arm-Ltd-platfo.patch \ - file://0002-arm64-dts-fvp-Add-SPE-to-Foundation-FVP.patch \ - file://0003-arm64-dts-fvp-Add-information-about-L1-and-L2-caches.patch \ - file://0004-ARM-dts-vexpress-align-LED-node-names-with-dtschema.patch \ - " # # Musca B1/S2 can't run Linux diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch index 0f0a76e4f1..4571409bc6 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0001-WIP-Enable-managed-exit.patch @@ -1,7 +1,7 @@ -From 34db1357ab3192f18629ceadf4ea33b948513fec Mon Sep 17 00:00:00 2001 +From f449f6fdcbd987e18a26f0daeccfa447fe76821a Mon Sep 17 00:00:00 2001 From: Olivier Deprez <olivier.deprez@arm.com> Date: Mon, 16 Nov 2020 10:14:02 +0100 -Subject: [PATCH 1/2] WIP: Enable managed exit +Subject: [PATCH] WIP: Enable managed exit This change declares OP-TEE SP as supporting managed exit in response to a NS interrupt triggering while the SWd runs. @@ -23,6 +23,7 @@ Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Upstream-Status: Pending [Not submitted to upstream yet] Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> + --- core/arch/arm/kernel/boot.c | 12 ++++++++++++ core/arch/arm/kernel/thread_a64.S | 11 ++++++++++- @@ -31,10 +32,10 @@ Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> 4 files changed, 34 insertions(+), 1 deletion(-) diff --git a/core/arch/arm/kernel/boot.c b/core/arch/arm/kernel/boot.c -index f173384d..466c042e 100644 +index dd34173e8..7d2ac74e8 100644 --- a/core/arch/arm/kernel/boot.c +++ b/core/arch/arm/kernel/boot.c -@@ -1350,6 +1350,18 @@ static void init_secondary_helper(unsigned long nsec_entry) +@@ -1424,6 +1424,18 @@ static void init_secondary_helper(unsigned long nsec_entry) init_vfp_sec(); init_vfp_nsec(); @@ -54,10 +55,10 @@ index f173384d..466c042e 100644 } diff --git a/core/arch/arm/kernel/thread_a64.S b/core/arch/arm/kernel/thread_a64.S -index d6baee4d..1b0c8f37 100644 +index 4fa97de24..4facc7631 100644 --- a/core/arch/arm/kernel/thread_a64.S +++ b/core/arch/arm/kernel/thread_a64.S -@@ -1087,6 +1087,14 @@ END_FUNC el0_sync_abort +@@ -1162,6 +1162,14 @@ END_FUNC el0_sync_abort bl dcache_op_louis ic iallu #endif @@ -72,7 +73,7 @@ index d6baee4d..1b0c8f37 100644 /* * Mark current thread as suspended */ -@@ -1204,8 +1212,9 @@ LOCAL_FUNC elx_irq , : +@@ -1318,8 +1326,9 @@ LOCAL_FUNC elx_irq , : #endif END_FUNC elx_irq @@ -84,10 +85,10 @@ index d6baee4d..1b0c8f37 100644 #else native_intr_handler fiq diff --git a/core/arch/arm/kernel/thread_spmc.c b/core/arch/arm/kernel/thread_spmc.c -index ea9e8f03..15577e7e 100644 +index 3b4ac0b4e..8f7c18dfa 100644 --- a/core/arch/arm/kernel/thread_spmc.c +++ b/core/arch/arm/kernel/thread_spmc.c -@@ -1518,6 +1518,17 @@ static TEE_Result spmc_init(void) +@@ -1517,6 +1517,17 @@ static TEE_Result spmc_init(void) my_endpoint_id = spmc_get_id(); DMSG("My endpoint ID %#x", my_endpoint_id); @@ -106,7 +107,7 @@ index ea9e8f03..15577e7e 100644 } #endif /* !defined(CFG_CORE_SEL1_SPMC) */ diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts -index 0bfe33f3..00cfa5b2 100644 +index 3ebbaddc8..56e69f372 100644 --- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts +++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts @@ -24,6 +24,7 @@ @@ -117,6 +118,3 @@ index 0bfe33f3..00cfa5b2 100644 device-regions { compatible = "arm,ffa-manifest-device-regions"; --- -2.34.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch index ff7f513357..c516be4638 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/files/optee-os/tc/0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch @@ -1,23 +1,23 @@ -From 35dba075593cb32c62b881e7763fcf0ea37908f7 Mon Sep 17 00:00:00 2001 -From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> -Date: Mon, 23 May 2022 11:32:41 +0100 -Subject: [PATCH 2/2] plat-totalcompute: fix TZDRAM start and size +From 5ddda749c60dce834bcd79e8b8d904858319adc0 Mon Sep 17 00:00:00 2001 +From: Rupinderjit Singh <rupinderjit.singh@arm.com> +Date: Tue, 7 Feb 2023 09:45:02 +0000 +Subject: [PATCH] plat-totalcompute: update TZDRAM_SIZE -- Fix TZDRAM_SIZE in TC platform -- For CFG_CORE_SEL2_SPMC, manifest size is increased from 0x1000 to - 0x4000 for boot protocol support. +For CFG_CORE_SEL2_SPMC, manifest size is increased from 0x1000 to +0x4000 for boot protocol support. -Upstream-Status: Pending [Not submitted to upstream yet] +Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com> +Acked-by: Jens Wiklander <jens.wiklander@linaro.org> + +Upstream-Status: Backport +Signed-off-by: Jon Mason <jon.mason@arm.com> -Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> -Change-Id: Iff19c498e9edae961f469604d69419c1a32145f5 --- - core/arch/arm/plat-totalcompute/conf.mk | 5 +++-- - core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts | 2 +- - 2 files changed, 4 insertions(+), 3 deletions(-) + core/arch/arm/plat-totalcompute/conf.mk | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/core/arch/arm/plat-totalcompute/conf.mk b/core/arch/arm/plat-totalcompute/conf.mk -index b39ac0f0..2f6c0ee1 100644 +index b39ac0f0667f..2f6c0ee1460a 100644 --- a/core/arch/arm/plat-totalcompute/conf.mk +++ b/core/arch/arm/plat-totalcompute/conf.mk @@ -32,8 +32,9 @@ ifeq ($(CFG_CORE_SEL1_SPMC),y) @@ -32,19 +32,3 @@ index b39ac0f0..2f6c0ee1 100644 else CFG_TZDRAM_START ?= 0xff000000 CFG_TZDRAM_SIZE ?= 0x01000000 -diff --git a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts -index 00cfa5b2..56e69f37 100644 ---- a/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts -+++ b/core/arch/arm/plat-totalcompute/fdts/optee_sp_manifest.dts -@@ -20,7 +20,7 @@ - exception-level = <2>; /* S-EL1 */ - execution-state = <0>; /* AARCH64 */ - load-address = <0xfd280000>; -- entrypoint-offset = <0x1000>; -+ entrypoint-offset = <0x4000>; - xlat-granule = <0>; /* 4KiB */ - boot-order = <0>; - messaging-method = <0x3>; /* Direct request/response supported */ --- -2.34.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-client/tee-supplicant.service b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-client/tee-supplicant.service index c273832d72..6b00df7421 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-client/tee-supplicant.service +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-client/tee-supplicant.service @@ -1,5 +1,6 @@ [Unit] Description=TEE Supplicant +ConditionPathExistsGlob=/dev/teepriv[0-9]* [Service] User=root diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc index 1f028ffa37..eaee7ae91c 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-corstone1000-common.inc @@ -1,9 +1,3 @@ -SRC_URI:remove = " \ - file://0003-core-link-add-no-warn-rwx-segments.patch \ - file://0007-core-spmc-handle-non-secure-interrupts.patch \ - file://0008-core-spmc-configure-SP-s-NS-interrupt-action-based-o.patch \ - " - COMPATIBLE_MACHINE = "corstone1000" OPTEEMACHINE = "corstone1000" diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-generic-tc.inc b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-generic-tc.inc deleted file mode 100644 index 31f1915868..0000000000 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-generic-tc.inc +++ /dev/null @@ -1,14 +0,0 @@ -# Total Compute (tc) specific configuration for optee-os and optee-os-tadevkit - -FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/tc:" -SRC_URI:append:tc = " \ - file://sp_layout.json \ - file://0001-WIP-Enable-managed-exit.patch \ - file://0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch \ - " - -COMPATIBLE_MACHINE = "(tc?)" - -OPTEEMACHINE:tc0 = "totalcompute-tc0" -OPTEEMACHINE:tc1 = "totalcompute-tc1" - diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc index a40c93dcba..80a11b5330 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-n1sdp.inc @@ -27,3 +27,5 @@ EXTRA_OEMAKE += " CFG_DT=y" EXTRA_OEMAKE += " CFG_SECURE_PARTITION=y" EXTRA_OEMAKE += " CFG_MAP_EXT_DT_SECURE=y" + +EXTRA_OEMAKE += " CFG_ENABLE_EMBEDDED_TESTS=y" diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tadevkit_3.18.0.bbappend b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tadevkit_3.18.0.bbappend index 6a22d47ef1..0cb9b05e0b 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tadevkit_3.18.0.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tadevkit_3.18.0.bbappend @@ -1,6 +1,6 @@ # Machine specific configurations MACHINE_OPTEE_OS_TADEVKIT_REQUIRE ?= "" -MACHINE_OPTEE_OS_TADEVKIT_REQUIRE:tc = "optee-os-generic-tc.inc" +MACHINE_OPTEE_OS_TADEVKIT_REQUIRE:tc = "optee-os-tc.inc" require ${MACHINE_OPTEE_OS_TADEVKIT_REQUIRE} diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tc.inc b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tc.inc index 793665222b..c4049f5afb 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tc.inc +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os-tc.inc @@ -1,6 +1,16 @@ # TC0 specific configuration -require optee-os-generic-tc.inc +# Total Compute (tc) specific configuration for optee-os and optee-os-tadevkit + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/optee-os/tc:" +SRC_URI:append:tc = " file://sp_layout.json \ + file://0001-WIP-Enable-managed-exit.patch \ + file://0002-plat-totalcompute-fix-TZDRAM-start-and-size.patch \ + " + +COMPATIBLE_MACHINE = "(tc?)" + +OPTEEMACHINE:tc1 = "totalcompute-tc1" # Enable optee memory layout and boot logs EXTRA_OEMAKE += " CFG_TEE_CORE_LOG_LEVEL=3" diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.20.0.bbappend b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.20.0.bbappend index b5493e5e2a..bc933dd54c 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.20.0.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.20.0.bbappend @@ -1,7 +1,7 @@ # Machine specific configurations MACHINE_OPTEE_OS_REQUIRE ?= "" -MACHINE_OPTEE_OS_REQUIRE:corstone1000 = "optee-os-corstone1000-common.inc" MACHINE_OPTEE_OS_REQUIRE:n1sdp = "optee-os-n1sdp.inc" +MACHINE_OPTEE_OS_REQUIRE:tc = "optee-os-tc.inc" require ${MACHINE_OPTEE_OS_REQUIRE} diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.22.0.bbappend b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.22.0.bbappend new file mode 100644 index 0000000000..e732c80f88 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-os_3.22.0.bbappend @@ -0,0 +1,6 @@ +# Machine specific configurations + +MACHINE_OPTEE_OS_REQUIRE ?= "" +MACHINE_OPTEE_OS_REQUIRE:corstone1000 = "optee-os-corstone1000-common.inc" + +require ${MACHINE_OPTEE_OS_REQUIRE} diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/musl-workaround.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0001-xtest-regression_1000-remove-unneeded-stat.h-include.patch index eed1bd4be1..98c49a2087 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/musl-workaround.patch +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0001-xtest-regression_1000-remove-unneeded-stat.h-include.patch @@ -1,3 +1,8 @@ +From 53642dc98630b9c725977ab935c5bdd9c401e1aa Mon Sep 17 00:00:00 2001 +From: Jon Mason <jon.mason@arm.com> +Date: Sat, 15 Jul 2023 15:08:43 -0400 +Subject: [PATCH] xtest: regression_1000: remove unneeded stat.h include + Hack to work around musl compile error: In file included from optee-test/3.17.0-r0/recipe-sysroot/usr/include/sys/stat.h:23, from optee-test/3.17.0-r0/git/host/xtest/regression_1000.c:25: @@ -7,11 +12,16 @@ Hack to work around musl compile error: stat.h is not needed, since it is not being used in this file. So removing it. -Upstream-Status: Pending [Not submitted to upstream yet] +Upstream-Status: Backport Signed-off-by: Jon Mason <jon.mason@arm.com> +Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> +Acked-by: Jens Wiklander <jens.wiklander@linaro.org> +--- + host/xtest/regression_1000.c | 1 - + 1 file changed, 1 deletion(-) diff --git a/host/xtest/regression_1000.c b/host/xtest/regression_1000.c -index 4264884..7f1baca 100644 +index de32c4184fd8..25b4721cdc45 100644 --- a/host/xtest/regression_1000.c +++ b/host/xtest/regression_1000.c @@ -22,7 +22,6 @@ diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0002-ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch index d333e860a7..24cdf0ad1a 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0002-ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch @@ -1,7 +1,7 @@ -From 6734d14cc249af37705129de7874533df9535cd3 Mon Sep 17 00:00:00 2001 +From 717ff43f0d58e5f5a87893bd0cf3274a1e0164dc Mon Sep 17 00:00:00 2001 From: Gabor Toth <gabor.toth2@arm.com> Date: Fri, 3 Mar 2023 12:25:58 +0100 -Subject: [PATCH 2/2] ffa_spmc: Add arm_ffa_user driver compatibility check +Subject: [PATCH] ffa_spmc: Add arm_ffa_user driver compatibility check Check the version of the arm_ffa_user Kernel Driver and fail with a meaningful message if incompatible driver is detected. @@ -15,7 +15,7 @@ Acked-by: Jens Wiklander <jens.wiklander@linaro.org> 1 file changed, 61 insertions(+), 7 deletions(-) diff --git a/host/xtest/ffa_spmc_1000.c b/host/xtest/ffa_spmc_1000.c -index 15f4a46..1839d03 100644 +index 15f4a468a775..1839d03f29be 100644 --- a/host/xtest/ffa_spmc_1000.c +++ b/host/xtest/ffa_spmc_1000.c @@ -1,11 +1,12 @@ @@ -158,6 +158,3 @@ index 15f4a46..1839d03 100644 ADBG_EXPECT_COMPARE_SIGNED(c, rc, ==, 0); ADBG_EXPECT_COMPARE_UNSIGNED(c, args.args[0], ==, SPMC_TEST_OK); --- -2.39.1.windows.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/Update-arm_ffa_user-driver-dependency.patch b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0003-Update-arm_ffa_user-driver-dependency.patch index e889f74051..44d9f9477d 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/Update-arm_ffa_user-driver-dependency.patch +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test/0003-Update-arm_ffa_user-driver-dependency.patch @@ -1,7 +1,7 @@ -From 7e15470f3dd45c844f0e0901f0c85c46a0882b8b Mon Sep 17 00:00:00 2001 +From 3de910a19f01a2a9e1c9a6bd6feee1aef547f676 Mon Sep 17 00:00:00 2001 From: Gabor Toth <gabor.toth2@arm.com> Date: Fri, 3 Mar 2023 12:23:45 +0100 -Subject: [PATCH 1/2] Update arm_ffa_user driver dependency +Subject: [PATCH] Update arm_ffa_user driver dependency Updating arm-ffa-user to v5.0.1 to get the following changes: - move to 64 bit direct messages @@ -22,7 +22,7 @@ Acked-by: Jens Wiklander <jens.wiklander@linaro.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/host/xtest/include/uapi/linux/arm_ffa_user.h b/host/xtest/include/uapi/linux/arm_ffa_user.h -index 9ef0be3..0acde4f 100644 +index 9ef0be3e1664..0acde4fb2020 100644 --- a/host/xtest/include/uapi/linux/arm_ffa_user.h +++ b/host/xtest/include/uapi/linux/arm_ffa_user.h @@ -33,7 +33,7 @@ struct ffa_ioctl_ep_desc { @@ -34,6 +34,3 @@ index 9ef0be3..0acde4f 100644 __u16 dst_id; }; #define FFA_IOC_MSG_SEND _IOWR(FFA_IOC_MAGIC, FFA_IOC_BASE + 1, \ --- -2.39.1.windows.1 - diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bb b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bb index 436733ea09..cf8ea01baa 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bb @@ -1,7 +1,7 @@ require recipes-security/optee/optee-test.inc SRC_URI += " \ - file://musl-workaround.patch \ + file://0001-xtest-regression_1000-remove-unneeded-stat.h-include.patch \ " SRCREV = "da5282a011b40621a2cf7a296c11a35c833ed91b" diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bbappend b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bbappend index 9318a07e0a..05e2abca63 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bbappend +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.18.0.bbappend @@ -1,7 +1,6 @@ # Machine specific configurations MACHINE_OPTEE_TEST_REQUIRE ?= "" -MACHINE_OPTEE_TEST_REQUIRE:tc = "optee-test-tc.inc" MACHINE_OPTEE_TEST_REQUIRE:n1sdp = "optee-os-generic-n1sdp.inc" require ${MACHINE_OPTEE_TEST_REQUIRE} diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bb b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bb index 03ea9116c5..5f73d41405 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bb @@ -1,9 +1,9 @@ require recipes-security/optee/optee-test.inc SRC_URI += " \ - file://Update-arm_ffa_user-driver-dependency.patch \ - file://ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch \ - file://musl-workaround.patch \ + file://0001-xtest-regression_1000-remove-unneeded-stat.h-include.patch \ + file://0002-ffa_spmc-Add-arm_ffa_user-driver-compatibility-check.patch \ + file://0003-Update-arm_ffa_user-driver-dependency.patch \ " SRCREV = "5db8ab4c733d5b2f4afac3e9aef0a26634c4b444" diff --git a/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bbappend b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bbappend new file mode 100644 index 0000000000..490b350049 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-security/optee/optee-test_3.20.0.bbappend @@ -0,0 +1,6 @@ +# Machine specific configurations + +MACHINE_OPTEE_TEST_REQUIRE ?= "" +MACHINE_OPTEE_TEST_REQUIRE:tc = "optee-test-tc.inc" + +require ${MACHINE_OPTEE_TEST_REQUIRE} diff --git a/meta-arm/meta-arm-bsp/recipes-security/trusted-services/corstone1000/0008-plat-corstone1000-change-ns-interrupt-action.patch b/meta-arm/meta-arm-bsp/recipes-security/trusted-services/corstone1000/0008-plat-corstone1000-change-ns-interrupt-action.patch new file mode 100644 index 0000000000..c50f2866bb --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-security/trusted-services/corstone1000/0008-plat-corstone1000-change-ns-interrupt-action.patch @@ -0,0 +1,31 @@ +From 7f51fa5f848b77b5aadfc553e1aeca52f4bcc5a1 Mon Sep 17 00:00:00 2001 +From: Emekcan Aras <emekcan.aras@arm.com> +Date: Tue, 22 Aug 2023 17:18:26 +0100 +Subject: [PATCH] platform: corstone1000: change ns-interrupt-action + +Changes ns-interrupt-action for corstone1000. The interrupts are queued as +in the previous optee release. Currently, enabling preemption (settig this field +to 2) will halt psa-test from linux-userspace in corstone1000. + +Signed-off-by: Emekcan Aras <emekcan.aras@arm.com> +Upstream-Status: Pending [Not submitted to upstream yet] +--- + .../config/corstone1000-opteesp/default_se-proxy.dts.in | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/deployments/se-proxy/config/corstone1000-opteesp/default_se-proxy.dts.in b/deployments/se-proxy/config/corstone1000-opteesp/default_se-proxy.dts.in +index cc42929d..839f7464 100644 +--- a/deployments/se-proxy/config/corstone1000-opteesp/default_se-proxy.dts.in ++++ b/deployments/se-proxy/config/corstone1000-opteesp/default_se-proxy.dts.in +@@ -16,7 +16,7 @@ + execution-state = <0>; /* AArch64 */ + xlat-granule = <0>; /* 4KiB */ + messaging-method = <3>; /* Direct messaging only */ +- ns-interrupts-action = <2>; /* Non-secure interrupts are signaled */ ++ ns-interrupts-action = <0>; /* Non-secure interrupts are signaled */ + elf-format = <1>; + + device-regions { +-- +2.17.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-security/trusted-services/ts-arm-platforms.inc b/meta-arm/meta-arm-bsp/recipes-security/trusted-services/ts-arm-platforms.inc index 3535ddb60e..29e33ffed0 100644 --- a/meta-arm/meta-arm-bsp/recipes-security/trusted-services/ts-arm-platforms.inc +++ b/meta-arm/meta-arm-bsp/recipes-security/trusted-services/ts-arm-platforms.inc @@ -9,6 +9,7 @@ SRC_URI:append:corstone1000 = " \ file://0005-plat-corstone1000-add-compile-definitions-for-ECP_DP.patch;patchdir=../trusted-services \ file://0006-plat-corstone1000-Use-the-stateless-platform-service.patch;patchdir=../trusted-services \ file://0007-plat-corstone1000-Initialize-capsule-update-provider.patch;patchdir=../trusted-services \ + file://0008-plat-corstone1000-change-ns-interrupt-action.patch;patchdir=../trusted-services \ " diff --git a/meta-arm/meta-arm-bsp/recipes-test/corstone1000-external-sys-tests/corstone1000-external-sys-tests_1.0.bb b/meta-arm/meta-arm-bsp/recipes-test/corstone1000-external-sys-tests/corstone1000-external-sys-tests_1.0.bb index 474342040e..0fa01b58b9 100644 --- a/meta-arm/meta-arm-bsp/recipes-test/corstone1000-external-sys-tests/corstone1000-external-sys-tests_1.0.bb +++ b/meta-arm/meta-arm-bsp/recipes-test/corstone1000-external-sys-tests/corstone1000-external-sys-tests_1.0.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://license.md;md5=e44b2531cd6ffe9dece394dbe988d9a0" SRC_URI = "git://git.gitlab.arm.com/arm-reference-solutions/corstone1000/applications.git;protocol=https;branch=master" SRCREV = "2945cd92f7c6dbe4999ee72cd5cf1e2615eedba7" -PV .= "+git${SRCPV}" +PV .= "+git" COMPATIBLE_MACHINE = "corstone1000" diff --git a/meta-arm/meta-arm-bsp/wic/core-image-minimal.corstone500.wks b/meta-arm/meta-arm-bsp/wic/core-image-minimal.corstone500.wks deleted file mode 100644 index 0ab359c40a..0000000000 --- a/meta-arm/meta-arm-bsp/wic/core-image-minimal.corstone500.wks +++ /dev/null @@ -1,12 +0,0 @@ -# WIC partitioning for corstone500 -# Layout and maximum sizes (to be defined): -# - -# Rawcopy of the FIP binary -part --source rawcopy --sourceparams="file=fip.bin" --no-table --align 1 --fixed-size 1 - -# Rawcopy of the kernel binary -part --source rawcopy --sourceparams="file=zImage" --no-table --fixed-size 12 - -# Rawcopy of the rootfs -part --source rawcopy --sourceparams="file=${IMGDEPLOYDIR}/core-image-minimal-corstone500.squashfs" --no-table diff --git a/meta-arm/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb b/meta-arm/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb index cb79069bcf..775f406457 100644 --- a/meta-arm/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb +++ b/meta-arm/meta-arm/recipes-bsp/boot-wrapper-aarch64/boot-wrapper-aarch64_git.bb @@ -9,7 +9,7 @@ SRCREV = "d3b1a15d18542b2086e72bfdc3fc43f454772a3b" # boot-wrapper doesn't make releases UPSTREAM_CHECK_COMMITS = "1" -PV = "git${SRCPV}" +PV = "0+git" S = "${WORKDIR}/git" diff --git a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0002-arm-hafnium-fix-kernel-tool-linking.patch b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0001-arm-hafnium-fix-kernel-tool-linking.patch index 5c69b78838..d4fe49ae6e 100644 --- a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0002-arm-hafnium-fix-kernel-tool-linking.patch +++ b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0001-arm-hafnium-fix-kernel-tool-linking.patch @@ -1,4 +1,4 @@ -From b54c7b4d325b7effbebe5bdd86d0cfceedb66b9d Mon Sep 17 00:00:00 2001 +From ef156578c1f7100b339ddfe956ff2cd89d61e0d4 Mon Sep 17 00:00:00 2001 From: Ross Burton <ross.burton@arm.com> Date: Tue, 9 Nov 2021 23:31:22 +0000 Subject: [PATCH] arm/hafnium: fix kernel tool linking @@ -11,16 +11,15 @@ ld: .../recipe-sysroot-native/usr/lib/pkgconfig/../../../usr/lib/libcrypto.so: u Upstream-Status: Inappropriate Signed-off-by: Ross Burton <ross.burton@arm.com> - --- build/linux/linux.gni | 1 + 1 file changed, 1 insertion(+) diff --git a/build/linux/linux.gni b/build/linux/linux.gni -index 45860fab..b0102544 100644 +index 497915290106..0e0167d5f485 100644 --- a/build/linux/linux.gni +++ b/build/linux/linux.gni -@@ -60,6 +60,7 @@ template("linux_kernel") { +@@ -54,6 +54,7 @@ template("linux_kernel") { "LLVM=1", "LLVM_IAS=1", "CROSS_COMPILE=aarch64-linux-gnu-", diff --git a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0001-define-_Noreturn-if-needed.patch b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0001-define-_Noreturn-if-needed.patch deleted file mode 100644 index 8353fc1223..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0001-define-_Noreturn-if-needed.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 3da6c62e6f56facf9c6a8d7d46fa9509e76f482e Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Tue, 19 Apr 2022 22:32:56 -0700 -Subject: [PATCH] define _Noreturn if needed - -The new _Noreturn function specifier is not recognized by the parser and shows as a syntax error: - -Fixes -../git/inc/hf/panic.h:13:1: error: '_Noreturn' is a C11 extension [-Werror,-Wc11-extensions] -noreturn void panic(const char *fmt, ...); -^ - -Upstream-Status: Pending -Signed-off-by: Khem Raj <raj.khem@gmail.com> - ---- - inc/hf/panic.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/inc/hf/panic.h b/inc/hf/panic.h -index ec864e4f..588f1193 100644 ---- a/inc/hf/panic.h -+++ b/inc/hf/panic.h -@@ -10,4 +10,8 @@ - - #include <stdnoreturn.h> - -+#ifndef _Noreturn -+#define _Noreturn __attribute__ ((noreturn)) -+#endif -+ - noreturn void panic(const char *fmt, ...); - diff --git a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0003-Fix-build-with-clang-15.patch b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0002-Fix-build-with-clang-15.patch index f037d2b58f..c305e97bfd 100644 --- a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0003-Fix-build-with-clang-15.patch +++ b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium/0002-Fix-build-with-clang-15.patch @@ -1,4 +1,4 @@ -From d96f696244e0869654004f49586b53811037db30 Mon Sep 17 00:00:00 2001 +From 960d022fa69568752a58b6f5d78e9759b54cff68 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Thu, 22 Sep 2022 19:13:49 -0700 Subject: [PATCH] Fix build with clang-15 @@ -8,19 +8,17 @@ Remove unused variable suites_in_image Upstream-Status: Pending Signed-off-by: Khem Raj <raj.khem@gmail.com> - --- test/hftest/common.c | 2 -- - test/vmapi/arch/aarch64/gicv3/gicv3.c | 2 +- test/vmapi/arch/aarch64/gicv3/inc/gicv3.h | 2 +- test/vmapi/arch/aarch64/gicv3/timer_secondary.c | 2 +- test/vmapi/el0_partitions/services/interruptible.c | 2 +- test/vmapi/el0_partitions/services/interruptible_echo.c | 2 +- test/vmapi/primary_with_secondaries/services/interruptible.c | 2 +- - 7 files changed, 6 insertions(+), 8 deletions(-) + 6 files changed, 5 insertions(+), 7 deletions(-) diff --git a/test/hftest/common.c b/test/hftest/common.c -index 344ff24..175230a 100644 +index 344ff2452c36..175230a7cfa7 100644 --- a/test/hftest/common.c +++ b/test/hftest/common.c @@ -67,7 +67,6 @@ void hftest_json(void) @@ -39,31 +37,18 @@ index 344ff24..175230a 100644 suite = test->suite; tests_in_suite = 0; HFTEST_LOG(" {"); -diff --git a/test/vmapi/arch/aarch64/gicv3/gicv3.c b/test/vmapi/arch/aarch64/gicv3/gicv3.c -index 682bc4e..82582f0 100644 ---- a/test/vmapi/arch/aarch64/gicv3/gicv3.c -+++ b/test/vmapi/arch/aarch64/gicv3/gicv3.c -@@ -42,7 +42,7 @@ static void irq(void) - dlog("primary IRQ %d ended\n", interrupt_id); - } - --void system_setup() -+void system_setup(void) - { - const uint32_t mode = MM_MODE_R | MM_MODE_W | MM_MODE_D; - hftest_mm_identity_map((void *)GICD_BASE, PAGE_SIZE, mode); diff --git a/test/vmapi/arch/aarch64/gicv3/inc/gicv3.h b/test/vmapi/arch/aarch64/gicv3/inc/gicv3.h -index 5faf3a8..f681e58 100644 +index 28bf29d412f4..dede047a381a 100644 --- a/test/vmapi/arch/aarch64/gicv3/inc/gicv3.h +++ b/test/vmapi/arch/aarch64/gicv3/inc/gicv3.h @@ -30,4 +30,4 @@ extern void *recv_buffer; extern volatile uint32_t last_interrupt_id; --void system_setup(); -+void system_setup(void); +-void gicv3_system_setup(); ++void gicv3_system_setup(void); diff --git a/test/vmapi/arch/aarch64/gicv3/timer_secondary.c b/test/vmapi/arch/aarch64/gicv3/timer_secondary.c -index ebc4db3..8260e10 100644 +index 0ac07f4411df..6264a5864721 100644 --- a/test/vmapi/arch/aarch64/gicv3/timer_secondary.c +++ b/test/vmapi/arch/aarch64/gicv3/timer_secondary.c @@ -55,7 +55,7 @@ TEAR_DOWN(timer_secondary_ffa) @@ -76,10 +61,10 @@ index ebc4db3..8260e10 100644 const char message[] = "loop 0099999"; const char expected_response[] = "Got IRQ 03."; diff --git a/test/vmapi/el0_partitions/services/interruptible.c b/test/vmapi/el0_partitions/services/interruptible.c -index 0d00b16..3c3250d 100644 +index 85c97dc7a857..80fc61b2e5a9 100644 --- a/test/vmapi/el0_partitions/services/interruptible.c +++ b/test/vmapi/el0_partitions/services/interruptible.c -@@ -43,7 +43,7 @@ static void irq(void) +@@ -44,7 +44,7 @@ static void irq(void) * Try to receive a message from the mailbox, blocking if necessary, and * retrying if interrupted. */ @@ -89,10 +74,10 @@ index 0d00b16..3c3250d 100644 struct ffa_value received; diff --git a/test/vmapi/el0_partitions/services/interruptible_echo.c b/test/vmapi/el0_partitions/services/interruptible_echo.c -index b618cf2..636ebc9 100644 +index 958d75090cce..55511d6a2bce 100644 --- a/test/vmapi/el0_partitions/services/interruptible_echo.c +++ b/test/vmapi/el0_partitions/services/interruptible_echo.c -@@ -32,7 +32,7 @@ static void irq(void) +@@ -33,7 +33,7 @@ static void irq(void) * Try to receive a message from the mailbox, blocking if necessary, and * retrying if interrupted. */ @@ -102,10 +87,10 @@ index b618cf2..636ebc9 100644 struct ffa_value received; diff --git a/test/vmapi/primary_with_secondaries/services/interruptible.c b/test/vmapi/primary_with_secondaries/services/interruptible.c -index cc1c1f9..c94093b 100644 +index 594f28ac8bc8..3888bf8b0b6e 100644 --- a/test/vmapi/primary_with_secondaries/services/interruptible.c +++ b/test/vmapi/primary_with_secondaries/services/interruptible.c -@@ -40,7 +40,7 @@ static void irq(void) +@@ -41,7 +41,7 @@ static void irq(void) * Try to receive a message from the mailbox, blocking if necessary, and * retrying if interrupted. */ diff --git a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium_2.7.bb b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium_2.8.bb index 564c203f1f..5302725638 100644 --- a/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium_2.7.bb +++ b/meta-arm/meta-arm/recipes-bsp/hafnium/hafnium_2.8.bb @@ -14,13 +14,12 @@ CLANGNATIVE:runtime-llvm = "clang-native" inherit deploy python3native pkgconfig ${CLANGNATIVE} SRC_URI = "gitsm://git.trustedfirmware.org/hafnium/hafnium.git;protocol=https;branch=master \ - file://0001-define-_Noreturn-if-needed.patch \ - file://0002-arm-hafnium-fix-kernel-tool-linking.patch \ - file://0003-Fix-build-with-clang-15.patch \ + file://0001-arm-hafnium-fix-kernel-tool-linking.patch \ + file://0002-Fix-build-with-clang-15.patch \ file://0001-Use-pkg-config-native-to-find-the-libssl-headers.patch;patchdir=third_party/linux \ file://0001-work-around-visibility-issue.patch;patchdir=third_party/dtc \ " -SRCREV = "79e9522d26fc2a88a44af149034acc27312b73a1" +SRCREV = "b7d27acb9c63a52f8bd8a37d1eee335d4ccfbe93" S = "${WORKDIR}/git" B = "${WORKDIR}/build" diff --git a/meta-arm/meta-arm/recipes-bsp/scp-firmware/files/optee-private-includes.patch b/meta-arm/meta-arm/recipes-bsp/scp-firmware/files/0001-OPTEE-Private-Includes.patch index c2d860228e..f3063a957e 100644 --- a/meta-arm/meta-arm/recipes-bsp/scp-firmware/files/optee-private-includes.patch +++ b/meta-arm/meta-arm/recipes-bsp/scp-firmware/files/0001-OPTEE-Private-Includes.patch @@ -1,3 +1,8 @@ +From b298400a5783453f64d8bebbd92db2c84c4a49fd Mon Sep 17 00:00:00 2001 +From: Ross Burton <ross.burton@arm.com> +Date: Mon, 10 Jul 2023 14:09:16 +0100 +Subject: [PATCH] OPTEE Private Includes + Change the optee module includes to be private instead of public, so they don't get used in every build, which can result in compile failures as /core/include/ doesn't exit. @@ -5,9 +10,13 @@ For some reason this behaviour isn't deterministic, a ticket has been filed with Upstream-Status: Pending Signed-off-by: Ross Burton <ross.burton@arm.com> +--- + module/optee/console/CMakeLists.txt | 2 +- + module/optee/mbx/CMakeLists.txt | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/module/optee/console/CMakeLists.txt b/module/optee/console/CMakeLists.txt -index aebb7cc79..942aa98c8 100644 +index aebb7cc79766..942aa98c85ff 100644 --- a/module/optee/console/CMakeLists.txt +++ b/module/optee/console/CMakeLists.txt @@ -14,7 +14,7 @@ target_include_directories(${SCP_MODULE_TARGET} @@ -20,7 +29,7 @@ index aebb7cc79..942aa98c8 100644 "${SCP_OPTEE_DIR}/lib/libutils/ext/include/" "${SCP_OPTEE_DIR}/lib/libutee/include/") diff --git a/module/optee/mbx/CMakeLists.txt b/module/optee/mbx/CMakeLists.txt -index 305fa42b7..783a7970c 100644 +index 305fa42b7370..783a7970c2d5 100644 --- a/module/optee/mbx/CMakeLists.txt +++ b/module/optee/mbx/CMakeLists.txt @@ -15,7 +15,7 @@ target_include_directories(${SCP_MODULE_TARGET} diff --git a/meta-arm/meta-arm/recipes-bsp/scp-firmware/scp-firmware_2.12.0.bb b/meta-arm/meta-arm/recipes-bsp/scp-firmware/scp-firmware_2.12.0.bb index 58482cd37b..9a16de7b92 100644 --- a/meta-arm/meta-arm/recipes-bsp/scp-firmware/scp-firmware_2.12.0.bb +++ b/meta-arm/meta-arm/recipes-bsp/scp-firmware/scp-firmware_2.12.0.bb @@ -8,7 +8,8 @@ LIC_FILES_CHKSUM = "file://license.md;beginline=5;md5=9db9e3d2fb8d9300a6c3d15101 SRC_URI_SCP_FIRMWARE ?= "gitsm://github.com/ARM-software/SCP-firmware.git;protocol=https" SRC_URI = "${SRC_URI_SCP_FIRMWARE};branch=${SRCBRANCH} \ - file://optee-private-includes.patch" + file://0001-OPTEE-Private-Includes.patch \ + " SRCBRANCH = "master" SRCREV = "0c7236b1851d90124210a0414fd982dc55322c7c" diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/add-spmc_manifest-for-qemu.patch b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/0001-Add-spmc_manifest-for-qemu.patch index 50a57d6179..8ddf353b18 100644 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/add-spmc_manifest-for-qemu.patch +++ b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/0001-Add-spmc_manifest-for-qemu.patch @@ -1,7 +1,7 @@ -From e1cbb35ad4655fe13ccb89247c81e850f6392c92 Mon Sep 17 00:00:00 2001 +From 56874ab381b0f0beade2d200147245e157b4aff6 Mon Sep 17 00:00:00 2001 From: Gyorgy Szing <Gyorgy.Szing@arm.com> Date: Mon, 13 Mar 2023 21:15:59 +0100 -Subject: Add spmc_manifest for qemu +Subject: [PATCH] Add spmc_manifest for qemu This version only supports embedded packaging. @@ -18,7 +18,7 @@ Signed-off-by: Gyorgy Szing <Gyorgy.Szing@arm.com> diff --git a/plat/qemu/fdts/optee_spmc_manifest.dts b/plat/qemu/fdts/optee_spmc_manifest.dts new file mode 100644 -index 000000000..ae2ae3d95 +index 000000000000..ae2ae3d951de --- /dev/null +++ b/plat/qemu/fdts/optee_spmc_manifest.dts @@ -0,0 +1,40 @@ @@ -62,6 +62,3 @@ index 000000000..ae2ae3d95 + #error "FIP SP load addresses configuration is missing. +#endif +}; --- -2.39.1.windows.1 - diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/feat-qemu-update-abi-between-spmd-and-spmc.patch b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/feat-qemu-update-abi-between-spmd-and-spmc.patch deleted file mode 100644 index 7c851fd041..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/files/feat-qemu-update-abi-between-spmd-and-spmc.patch +++ /dev/null @@ -1,263 +0,0 @@ -From d215b0c08e51192baab96d75beaeacf3abf8724e Mon Sep 17 00:00:00 2001 -From: Jens Wiklander <jens.wiklander@linaro.org> -Date: Fri, 18 Nov 2022 15:40:04 +0100 -Subject: feat(qemu): update abi between spmd and spmc - -Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard -coded SPMC manifest can be replaced by a proper manifest via TOS FW -Config. TOS FW Config is provided via QEMU_TOS_FW_CONFIG_DTS as a DTS -file when building. The DTS is turned into a DTB which is added to the -FIP. - -Note that this is an incompatible change and requires corresponding -change in OP-TEE ("core: sel1 spmc: boot abi update"). - -Upstream-Status: Accepted - -Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> -Change-Id: Ibabe78ef50a24f775492854ce5ac54e4d471e369 ---- - plat/qemu/common/qemu_bl2_mem_params_desc.c | 18 +++++++++++- - plat/qemu/common/qemu_bl2_setup.c | 32 +++++++++++++-------- - plat/qemu/common/qemu_io_storage.c | 16 ++++++++++- - plat/qemu/common/qemu_spmd_manifest.c | 31 -------------------- - plat/qemu/qemu/include/platform_def.h | 3 ++ - plat/qemu/qemu/platform.mk | 12 +++++++- - 6 files changed, 66 insertions(+), 46 deletions(-) - delete mode 100644 plat/qemu/common/qemu_spmd_manifest.c - -diff --git a/plat/qemu/common/qemu_bl2_mem_params_desc.c b/plat/qemu/common/qemu_bl2_mem_params_desc.c -index 5af3a2264..8d8047c92 100644 ---- a/plat/qemu/common/qemu_bl2_mem_params_desc.c -+++ b/plat/qemu/common/qemu_bl2_mem_params_desc.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved. -+ * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -@@ -122,6 +122,22 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = { - #endif - .next_handoff_image_id = INVALID_IMAGE_ID, - }, -+ -+#if defined(SPD_spmd) -+ /* Fill TOS_FW_CONFIG related information */ -+ { -+ .image_id = TOS_FW_CONFIG_ID, -+ SET_STATIC_PARAM_HEAD(ep_info, PARAM_IMAGE_BINARY, -+ VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE), -+ SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY, -+ VERSION_2, image_info_t, 0), -+ .image_info.image_base = TOS_FW_CONFIG_BASE, -+ .image_info.image_max_size = TOS_FW_CONFIG_LIMIT - -+ TOS_FW_CONFIG_BASE, -+ .next_handoff_image_id = INVALID_IMAGE_ID, -+ }, -+#endif -+ - # endif /* QEMU_LOAD_BL32 */ - - /* Fill BL33 related information */ -diff --git a/plat/qemu/common/qemu_bl2_setup.c b/plat/qemu/common/qemu_bl2_setup.c -index 2c0da15b9..6afa3a44d 100644 ---- a/plat/qemu/common/qemu_bl2_setup.c -+++ b/plat/qemu/common/qemu_bl2_setup.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved. -+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -@@ -149,8 +149,7 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id) - bl_mem_params_node_t *paged_mem_params = NULL; - #endif - #if defined(SPD_spmd) -- unsigned int mode_rw = MODE_RW_64; -- uint64_t pagable_part = 0; -+ bl_mem_params_node_t *bl32_mem_params = NULL; - #endif - - assert(bl_mem_params); -@@ -170,17 +169,18 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id) - if (err != 0) { - WARN("OPTEE header parse error.\n"); - } --#if defined(SPD_spmd) -- mode_rw = bl_mem_params->ep_info.args.arg0; -- pagable_part = bl_mem_params->ep_info.args.arg1; --#endif - #endif - --#if defined(SPD_spmd) -- bl_mem_params->ep_info.args.arg0 = ARM_PRELOADED_DTB_BASE; -- bl_mem_params->ep_info.args.arg1 = pagable_part; -- bl_mem_params->ep_info.args.arg2 = mode_rw; -- bl_mem_params->ep_info.args.arg3 = 0; -+#if defined(SPMC_OPTEE) -+ /* -+ * Explicit zeroes to unused registers since they may have -+ * been populated by parse_optee_header() above. -+ * -+ * OP-TEE expects system DTB in x2 and TOS_FW_CONFIG in x0, -+ * the latter is filled in below for TOS_FW_CONFIG_ID and -+ * applies to any other SPMC too. -+ */ -+ bl_mem_params->ep_info.args.arg2 = ARM_PRELOADED_DTB_BASE; - #elif defined(SPD_opteed) - /* - * OP-TEE expect to receive DTB address in x2. -@@ -224,6 +224,14 @@ static int qemu_bl2_handle_post_image_load(unsigned int image_id) - - bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry(); - break; -+#if defined(SPD_spmd) -+ case TOS_FW_CONFIG_ID: -+ /* An SPMC expects TOS_FW_CONFIG in x0/r0 */ -+ bl32_mem_params = get_bl_mem_params_node(BL32_IMAGE_ID); -+ bl32_mem_params->ep_info.args.arg0 = -+ bl_mem_params->image_info.image_base; -+ break; -+#endif - default: - /* Do nothing in default case */ - break; -diff --git a/plat/qemu/common/qemu_io_storage.c b/plat/qemu/common/qemu_io_storage.c -index 1107e443f..e2d4932c0 100644 ---- a/plat/qemu/common/qemu_io_storage.c -+++ b/plat/qemu/common/qemu_io_storage.c -@@ -1,5 +1,5 @@ - /* -- * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. -+ * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ -@@ -24,6 +24,7 @@ - #define BL2_IMAGE_NAME "bl2.bin" - #define BL31_IMAGE_NAME "bl31.bin" - #define BL32_IMAGE_NAME "bl32.bin" -+#define TOS_FW_CONFIG_NAME "tos_fw_config.dtb" - #define BL32_EXTRA1_IMAGE_NAME "bl32_extra1.bin" - #define BL32_EXTRA2_IMAGE_NAME "bl32_extra2.bin" - #define BL33_IMAGE_NAME "bl33.bin" -@@ -78,6 +79,10 @@ static const io_uuid_spec_t bl32_extra2_uuid_spec = { - .uuid = UUID_SECURE_PAYLOAD_BL32_EXTRA2, - }; - -+static const io_uuid_spec_t tos_fw_config_uuid_spec = { -+ .uuid = UUID_TOS_FW_CONFIG, -+}; -+ - static const io_uuid_spec_t bl33_uuid_spec = { - .uuid = UUID_NON_TRUSTED_FIRMWARE_BL33, - }; -@@ -137,6 +142,10 @@ static const io_file_spec_t sh_file_spec[] = { - .path = BL32_EXTRA2_IMAGE_NAME, - .mode = FOPEN_MODE_RB - }, -+ [TOS_FW_CONFIG_ID] = { -+ .path = TOS_FW_CONFIG_NAME, -+ .mode = FOPEN_MODE_RB -+ }, - [BL33_IMAGE_ID] = { - .path = BL33_IMAGE_NAME, - .mode = FOPEN_MODE_RB -@@ -252,6 +261,11 @@ static const struct plat_io_policy policies[] = { - open_fip - }, - #endif -+ [TOS_FW_CONFIG_ID] = { -+ &fip_dev_handle, -+ (uintptr_t)&tos_fw_config_uuid_spec, -+ open_fip -+ }, - [BL33_IMAGE_ID] = { - &fip_dev_handle, - (uintptr_t)&bl33_uuid_spec, -diff --git a/plat/qemu/common/qemu_spmd_manifest.c b/plat/qemu/common/qemu_spmd_manifest.c -deleted file mode 100644 -index fd46e2675..000000000 ---- a/plat/qemu/common/qemu_spmd_manifest.c -+++ /dev/null -@@ -1,31 +0,0 @@ --/* -- * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. -- * -- * SPDX-License-Identifier: BSD-3-Clause -- */ -- --#include <assert.h> -- --#include <services/spm_core_manifest.h> -- --#include <plat/common/platform.h> --#include <platform_def.h> -- --int plat_spm_core_manifest_load(spmc_manifest_attribute_t *manifest, -- const void *pm_addr) --{ -- entry_point_info_t *ep_info = bl31_plat_get_next_image_ep_info(SECURE); -- -- assert(ep_info != NULL); -- assert(manifest != NULL); -- -- manifest->major_version = 1; -- manifest->minor_version = 0; -- manifest->exec_state = ep_info->args.arg2; -- manifest->load_address = BL32_BASE; -- manifest->entrypoint = BL32_BASE; -- manifest->binary_size = BL32_LIMIT - BL32_BASE; -- manifest->spmc_id = 0x8000; -- -- return 0; --} -diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h -index c9ed6409f..5c3239cb8 100644 ---- a/plat/qemu/qemu/include/platform_def.h -+++ b/plat/qemu/qemu/include/platform_def.h -@@ -118,6 +118,9 @@ - #define BL_RAM_BASE (SHARED_RAM_BASE + SHARED_RAM_SIZE) - #define BL_RAM_SIZE (SEC_SRAM_SIZE - SHARED_RAM_SIZE) - -+#define TOS_FW_CONFIG_BASE BL_RAM_BASE -+#define TOS_FW_CONFIG_LIMIT (TOS_FW_CONFIG_BASE + PAGE_SIZE) -+ - /* - * BL1 specific defines. - * -diff --git a/plat/qemu/qemu/platform.mk b/plat/qemu/qemu/platform.mk -index 6becc32fa..02493025a 100644 ---- a/plat/qemu/qemu/platform.mk -+++ b/plat/qemu/qemu/platform.mk -@@ -212,7 +212,10 @@ BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ - ${QEMU_GIC_SOURCES} - - ifeq (${SPD},spmd) --BL31_SOURCES += plat/qemu/common/qemu_spmd_manifest.c -+BL31_SOURCES += plat/common/plat_spmd_manifest.c \ -+ common/uuid.c \ -+ ${LIBFDT_SRCS} \ -+ ${FDT_WRAPPERS_SOURCES} - endif - endif - -@@ -233,6 +236,13 @@ $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) - endif - endif - -+ifneq ($(QEMU_TOS_FW_CONFIG_DTS),) -+FDT_SOURCES += ${QEMU_TOS_FW_CONFIG_DTS} -+QEMU_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${QEMU_TOS_FW_CONFIG_DTS})).dtb -+# Add the TOS_FW_CONFIG to FIP -+$(eval $(call TOOL_ADD_PAYLOAD,${QEMU_TOS_FW_CONFIG},--tos-fw-config,${QEMU_TOS_FW_CONFIG})) -+endif -+ - SEPARATE_CODE_AND_RODATA := 1 - ENABLE_STACK_PROTECTOR := 0 - ifneq ($(ENABLE_STACK_PROTECTOR), 0) --- -2.39.1.windows.1 - diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.9.0.bb b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.9.0.bb new file mode 100644 index 0000000000..58ee1dcac0 --- /dev/null +++ b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/fiptool-native_2.9.0.bb @@ -0,0 +1,33 @@ +# Firmware Image Package (FIP) +# It is a packaging format used by TF-A to package the +# firmware images in a single binary. + +DESCRIPTION = "fiptool - Trusted Firmware tool for packaging" +LICENSE = "BSD-3-Clause" + +SRC_URI_TRUSTED_FIRMWARE_A ?= "git://git.trustedfirmware.org/TF-A/trusted-firmware-a.git;protocol=https" +SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A};destsuffix=fiptool-${PV};branch=${SRCBRANCH}" +LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" + +# Use fiptool from TF-A v2.9.0 +SRCREV = "d3e71ead6ea5bc3555ac90a446efec84ef6c6122" +SRCBRANCH = "master" + +DEPENDS += "openssl-native" + +inherit native + +EXTRA_OEMAKE = "V=1 HOSTCC='${BUILD_CC}' OPENSSL_DIR=${STAGING_DIR_NATIVE}/${prefix_native}" + +do_compile () { + # This is still needed to have the native fiptool executing properly by + # setting the RPATH + sed -i '/^LDLIBS/ s,$, \$\{BUILD_LDFLAGS},' ${S}/tools/fiptool/Makefile + sed -i '/^INCLUDE_PATHS/ s,$, \$\{BUILD_CFLAGS},' ${S}/tools/fiptool/Makefile + + oe_runmake fiptool +} + +do_install () { + install -D -p -m 0755 tools/fiptool/fiptool ${D}${bindir}/fiptool +} diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.9.0.bb b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.9.0.bb new file mode 100644 index 0000000000..72a3e7911b --- /dev/null +++ b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/tf-a-tests_2.9.0.bb @@ -0,0 +1,54 @@ +DESCRIPTION = "Trusted Firmware-A tests(aka TFTF)" +LICENSE = "BSD-3-Clause & NCSA" + +LIC_FILES_CHKSUM += "file://docs/license.rst;md5=6175cc0aa2e63b6d21a32aa0ee7d1b4a" + +inherit deploy + +COMPATIBLE_MACHINE ?= "invalid" + +SRC_URI_TRUSTED_FIRMWARE_A_TESTS ?= "git://git.trustedfirmware.org/TF-A/tf-a-tests.git;protocol=https" +SRC_URI = "${SRC_URI_TRUSTED_FIRMWARE_A_TESTS};branch=${SRCBRANCH} \ + " +SRCBRANCH = "master" +SRCREV = "df6783437cdc98dabf4f49568312b86460f72efa" + +DEPENDS += "optee-os" + +EXTRA_OEMAKE += "USE_NVM=0" +EXTRA_OEMAKE += "SHELL_COLOR=1" +EXTRA_OEMAKE += "DEBUG=1" + +# Platform must be set for each machine +TFA_PLATFORM ?= "invalid" + +EXTRA_OEMAKE += "ARCH=aarch64" +EXTRA_OEMAKE += "LOG_LEVEL=50" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +# Add platform parameter +EXTRA_OEMAKE += "BUILD_BASE=${B} PLAT=${TFA_PLATFORM}" + +# Requires CROSS_COMPILE set by hand as there is no configure script +export CROSS_COMPILE="${TARGET_PREFIX}" + +do_compile() { + oe_runmake -C ${S} tftf +} + +do_compile[cleandirs] = "${B}" + +FILES:${PN} = "/firmware/tftf.bin" +SYSROOT_DIRS += "/firmware" + +do_install() { + install -d -m 755 ${D}/firmware + install -m 0644 ${B}/${TFA_PLATFORM}/debug/tftf.bin ${D}/firmware/tftf.bin +} + +do_deploy() { + cp -rf ${D}/firmware/* ${DEPLOYDIR}/ +} +addtask deploy after do_install diff --git a/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.9.0.bb b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.9.0.bb new file mode 100644 index 0000000000..8f78b5e70f --- /dev/null +++ b/meta-arm/meta-arm/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.9.0.bb @@ -0,0 +1,17 @@ +require trusted-firmware-a.inc + +# TF-A v2.9.0 +SRCREV_tfa = "d3e71ead6ea5bc3555ac90a446efec84ef6c6122" + +# Enable passing TOS_FW_CONFIG from FIP package to Trusted OS. +SRC_URI:append:qemuarm64-secureboot = " \ + file://0001-Add-spmc_manifest-for-qemu.patch \ + " + +LIC_FILES_CHKSUM += "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" + +# mbed TLS v2.28.4 +SRC_URI_MBEDTLS = "git://github.com/ARMmbed/mbedtls.git;name=mbedtls;protocol=https;destsuffix=git/mbedtls;branch=mbedtls-2.28" +SRCREV_mbedtls = "aeb97a18913a86f051afab11b2c92c6be0c2eb83" + +LIC_FILES_CHKSUM_MBEDTLS = "file://mbedtls/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57" diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-basetools-native_202302.bb b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-basetools-native_202305.bb index b331c361e3..3a48ea5e2f 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-basetools-native_202302.bb +++ b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-basetools-native_202305.bb @@ -10,7 +10,7 @@ LICENSE = "BSD-2-Clause-Patent" SRC_URI = "git://github.com/tianocore/edk2.git;branch=master;protocol=https" LIC_FILES_CHKSUM = "file://License.txt;md5=2b415520383f7964e96700ae12b4570a" -SRCREV = "f80f052277c88a67c55e107b550f504eeea947d3" +SRCREV = "ba91d0292e593df8528b66f99c1b0b14fadc8e16" S = "${WORKDIR}/git" diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware.inc b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware.inc index 20eea36bbd..274852e26d 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware.inc +++ b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware.inc @@ -76,6 +76,17 @@ EDK_COMPILER:toolchain-clang = "CLANG38" export CLANG38_AARCH64_PREFIX = "${TARGET_PREFIX}" export CLANG38_ARM_PREFIX = "${TARGET_PREFIX}" +# These variables were changed in edk2 commit +# 206168e83f0901cbc1815ef5df4ac6598ad9721b, which was part of edk2-202305 +export CC = "${BUILD_CC}" +export CXX = "${BUILD_CXX}" +export AS = "${BUILD_AS}" +export AR = "${BUILD_AR}" +export LD = "${BUILD_LD}" +export CFLAGS = "${BUILD_CFLAGS}" +export CPPFLAGS = "${BUILD_CPPFLAGS}" +export LDFLAGS = "${BUILD_LFLAGS}" + #FIXME - arm32 doesn't work with clang due to a linker issue TOOLCHAIN:arm = "gcc" diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_2023%.bbappend b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_%.bbappend index 19b335417c..7a39bb0319 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_2023%.bbappend +++ b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_%.bbappend @@ -7,10 +7,6 @@ COMPATIBLE_MACHINE:qemuarm64 = "qemuarm64" EDK2_PLATFORM:qemuarm64 = "ArmVirtQemu-AARCH64" EDK2_PLATFORM_DSC:qemuarm64 = "ArmVirtPkg/ArmVirtQemu.dsc" EDK2_BIN_NAME:qemuarm64 = "QEMU_EFI.fd" -SRC_URI:append:qemuarm64 = " \ - file://0001-Revert-ArmVirtPkg-QemuVirtMemInfoLib-use-HOB-not-PCD.patch \ - file://0002-Revert-ArmVirtPkg-ArmVirtQemu-omit-PCD-PEIM-unless-T.patch \ - " COMPATIBLE_MACHINE:qemuarm = "qemuarm" EDK2_PLATFORM:qemuarm = "ArmVirtQemu-ARM" diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202302.bb b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202302.bb deleted file mode 100644 index 02738d318b..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202302.bb +++ /dev/null @@ -1,6 +0,0 @@ -SRCREV_edk2 ?= "f80f052277c88a67c55e107b550f504eeea947d3" -SRCREV_edk2-platforms ?= "65e001a7f2abedf7799cfb36b057326c1540bd47" - -SRC_URI:append = " file://default.patch;patchdir=edk2-platforms" - -require edk2-firmware.inc diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202305.bb b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202305.bb new file mode 100644 index 0000000000..fe153f47ce --- /dev/null +++ b/meta-arm/meta-arm/recipes-bsp/uefi/edk2-firmware_202305.bb @@ -0,0 +1,7 @@ +SRCREV_edk2 ?= "ba91d0292e593df8528b66f99c1b0b14fadc8e16" +SRCREV_edk2-platforms ?= "be2af02a3fb202756ed9855173e0d0ed878ab6be" + +# FIXME - clang is having issues with antlr +TOOLCHAIN:aarch64 = "gcc" + +require edk2-firmware.inc diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/files/0001-Revert-ArmVirtPkg-QemuVirtMemInfoLib-use-HOB-not-PCD.patch b/meta-arm/meta-arm/recipes-bsp/uefi/files/0001-Revert-ArmVirtPkg-QemuVirtMemInfoLib-use-HOB-not-PCD.patch deleted file mode 100644 index 824c6ccb87..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/files/0001-Revert-ArmVirtPkg-QemuVirtMemInfoLib-use-HOB-not-PCD.patch +++ /dev/null @@ -1,290 +0,0 @@ -From 44b69c8d7c8ed665b4f8d8a9953ea23a731d221f Mon Sep 17 00:00:00 2001 -From: Your Name <you@example.com> -Date: Fri, 10 Mar 2023 18:46:49 +0000 -Subject: [PATCH] Revert "ArmVirtPkg/QemuVirtMemInfoLib: use HOB not PCD to - record the memory size" - -This reverts commit 7136d5491e225c57f1d73e4a1b7ac27ed656ff72. - -Upstream-Status: Inappropriate [other] -Signed-off-by: Jon Mason <jon.mason@arm.com> - ---- - ArmVirtPkg/ArmVirtPkg.dec | 1 - - ArmVirtPkg/ArmVirtQemu.dsc | 6 ++-- - .../ArmVirtMemoryInitPeiLib.c | 14 ++------ - .../ArmVirtMemoryInitPeiLib.inf | 1 - - .../QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 35 ++----------------- - .../QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf | 5 +-- - .../QemuVirtMemInfoPeiLib.inf | 8 ++--- - .../QemuVirtMemInfoPeiLibConstructor.c | 30 +++++++--------- - 8 files changed, 25 insertions(+), 75 deletions(-) - -diff --git a/ArmVirtPkg/ArmVirtPkg.dec b/ArmVirtPkg/ArmVirtPkg.dec -index 4645c91a83..d2d325d71e 100644 ---- a/ArmVirtPkg/ArmVirtPkg.dec -+++ b/ArmVirtPkg/ArmVirtPkg.dec -@@ -32,7 +32,6 @@ - gArmVirtTokenSpaceGuid = { 0x0B6F5CA7, 0x4F53, 0x445A, { 0xB7, 0x6E, 0x2E, 0x36, 0x5B, 0x80, 0x63, 0x66 } }
- gEarlyPL011BaseAddressGuid = { 0xB199DEA9, 0xFD5C, 0x4A84, { 0x80, 0x82, 0x2F, 0x41, 0x70, 0x78, 0x03, 0x05 } }
- gEarly16550UartBaseAddressGuid = { 0xea67ca3e, 0x1f54, 0x436b, { 0x97, 0x88, 0xd4, 0xeb, 0x29, 0xc3, 0x42, 0x67 } }
-- gArmVirtSystemMemorySizeGuid = { 0x504eccb9, 0x1bf0, 0x4420, { 0x86, 0x5d, 0xdc, 0x66, 0x06, 0xd4, 0x13, 0xbf } }
-
- [PcdsFeatureFlag]
- #
-diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc -index 72a0cacab4..2e786dad12 100644 ---- a/ArmVirtPkg/ArmVirtQemu.dsc -+++ b/ArmVirtPkg/ArmVirtQemu.dsc -@@ -226,9 +226,6 @@ - # Shadowing PEI modules is absolutely pointless when the NOR flash is emulated
- gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnBoot|FALSE
-
-- # System Memory Size -- 128 MB initially, actual size will be fetched from DT
-- gArmTokenSpaceGuid.PcdSystemMemorySize|0x8000000
--
- [PcdsFixedAtBuild.AARCH64]
- # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point,
- # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the
-@@ -245,6 +242,9 @@ - # enumeration to complete before installing ACPI tables.
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
-
-+ # System Memory Size -- 1 MB initially, actual size will be fetched from DT
-+ gArmTokenSpaceGuid.PcdSystemMemorySize|0x00100000
-+
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0
- gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|0x0
- gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|0x0
-diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c -index 72e5c65af7..98d90ad420 100644 ---- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c -+++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c -@@ -52,19 +52,10 @@ MemoryPeim ( - {
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
- UINT64 SystemMemoryTop;
-- UINT64 SystemMemorySize;
-- VOID *Hob;
-
- // Ensure PcdSystemMemorySize has been set
- ASSERT (PcdGet64 (PcdSystemMemorySize) != 0);
-
-- SystemMemorySize = PcdGet64 (PcdSystemMemorySize);
--
-- Hob = GetFirstGuidHob (&gArmVirtSystemMemorySizeGuid);
-- if (Hob != NULL) {
-- SystemMemorySize = *(UINT64 *)GET_GUID_HOB_DATA (Hob);
-- }
--
- //
- // Now, the permanent memory has been installed, we can call AllocatePages()
- //
-@@ -75,7 +66,8 @@ MemoryPeim ( - EFI_RESOURCE_ATTRIBUTE_TESTED
- );
-
-- SystemMemoryTop = PcdGet64 (PcdSystemMemoryBase) + SystemMemorySize;
-+ SystemMemoryTop = PcdGet64 (PcdSystemMemoryBase) +
-+ PcdGet64 (PcdSystemMemorySize);
-
- if (SystemMemoryTop - 1 > MAX_ALLOC_ADDRESS) {
- BuildResourceDescriptorHob (
-@@ -95,7 +87,7 @@ MemoryPeim ( - EFI_RESOURCE_SYSTEM_MEMORY,
- ResourceAttributes,
- PcdGet64 (PcdSystemMemoryBase),
-- SystemMemorySize
-+ PcdGet64 (PcdSystemMemorySize)
- );
- }
-
-diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf -index 48d9c66b22..21327f79f4 100644 ---- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf -+++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf -@@ -34,7 +34,6 @@ - CacheMaintenanceLib
-
- [Guids]
-- gArmVirtSystemMemorySizeGuid
- gEfiMemoryTypeInformationGuid
-
- [FeaturePcd]
-diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c -index 9cf43f06c0..cf569bed99 100644 ---- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c -+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c -@@ -6,12 +6,10 @@ -
- **/
-
--#include <Uefi.h>
--#include <Pi/PiMultiPhase.h>
-+#include <Base.h>
- #include <Library/ArmLib.h>
- #include <Library/BaseMemoryLib.h>
- #include <Library/DebugLib.h>
--#include <Library/HobLib.h>
- #include <Library/MemoryAllocationLib.h>
-
- // Number of Virtual Memory Map Descriptors
-@@ -26,28 +24,6 @@ - #define MACH_VIRT_PERIPH_BASE 0x08000000
- #define MACH_VIRT_PERIPH_SIZE SIZE_128MB
-
--/**
-- Default library constructur that obtains the memory size from a PCD.
--
-- @return Always returns RETURN_SUCCESS
--
--**/
--RETURN_STATUS
--EFIAPI
--QemuVirtMemInfoLibConstructor (
-- VOID
-- )
--{
-- UINT64 Size;
-- VOID *Hob;
--
-- Size = PcdGet64 (PcdSystemMemorySize);
-- Hob = BuildGuidDataHob (&gArmVirtSystemMemorySizeGuid, &Size, sizeof Size);
-- ASSERT (Hob != NULL);
--
-- return RETURN_SUCCESS;
--}
--
- /**
- Return the Virtual Memory Map of your platform
-
-@@ -67,16 +43,9 @@ ArmVirtGetMemoryMap ( - )
- {
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
-- VOID *MemorySizeHob;
-
- ASSERT (VirtualMemoryMap != NULL);
-
-- MemorySizeHob = GetFirstGuidHob (&gArmVirtSystemMemorySizeGuid);
-- ASSERT (MemorySizeHob != NULL);
-- if (MemorySizeHob == NULL) {
-- return;
-- }
--
- VirtualMemoryTable = AllocatePool (
- sizeof (ARM_MEMORY_REGION_DESCRIPTOR) *
- MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS
-@@ -90,7 +59,7 @@ ArmVirtGetMemoryMap ( - // System DRAM
- VirtualMemoryTable[0].PhysicalBase = PcdGet64 (PcdSystemMemoryBase);
- VirtualMemoryTable[0].VirtualBase = VirtualMemoryTable[0].PhysicalBase;
-- VirtualMemoryTable[0].Length = *(UINT64 *)GET_GUID_HOB_DATA (MemorySizeHob);
-+ VirtualMemoryTable[0].Length = PcdGet64 (PcdSystemMemorySize);
- VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
-
- DEBUG ((
-diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf -index 6acad8bbd7..7150de6c10 100644 ---- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf -+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf -@@ -14,7 +14,6 @@ - MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = ArmVirtMemInfoLib
-- CONSTRUCTOR = QemuVirtMemInfoLibConstructor
-
- [Sources]
- QemuVirtMemInfoLib.c
-@@ -31,9 +30,7 @@ - BaseMemoryLib
- DebugLib
- MemoryAllocationLib
--
--[Guids]
-- gArmVirtSystemMemorySizeGuid
-+ PcdLib
-
- [Pcd]
- gArmTokenSpaceGuid.PcdFvBaseAddress
-diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf -index f045e39a41..7ecf6dfbb7 100644 ---- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf -+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf -@@ -32,16 +32,16 @@ - BaseMemoryLib
- DebugLib
- FdtLib
-+ PcdLib
- MemoryAllocationLib
-
--[Guids]
-- gArmVirtSystemMemorySizeGuid
--
--[FixedPcd]
-+[Pcd]
- gArmTokenSpaceGuid.PcdFdBaseAddress
- gArmTokenSpaceGuid.PcdFvBaseAddress
- gArmTokenSpaceGuid.PcdSystemMemoryBase
- gArmTokenSpaceGuid.PcdSystemMemorySize
-+
-+[FixedPcd]
- gArmTokenSpaceGuid.PcdFdSize
- gArmTokenSpaceGuid.PcdFvSize
- gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress
-diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c -index c47ab82966..33d3597d57 100644 ---- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c -+++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLibConstructor.c -@@ -6,10 +6,9 @@ -
- **/
-
--#include <Uefi.h>
--#include <Pi/PiMultiPhase.h>
-+#include <Base.h>
- #include <Library/DebugLib.h>
--#include <Library/HobLib.h>
-+#include <Library/PcdLib.h>
- #include <libfdt.h>
-
- RETURN_STATUS
-@@ -18,14 +17,14 @@ QemuVirtMemInfoPeiLibConstructor ( - VOID
- )
- {
-- VOID *DeviceTreeBase;
-- INT32 Node, Prev;
-- UINT64 NewBase, CurBase;
-- UINT64 NewSize, CurSize;
-- CONST CHAR8 *Type;
-- INT32 Len;
-- CONST UINT64 *RegProp;
-- VOID *Hob;
-+ VOID *DeviceTreeBase;
-+ INT32 Node, Prev;
-+ UINT64 NewBase, CurBase;
-+ UINT64 NewSize, CurSize;
-+ CONST CHAR8 *Type;
-+ INT32 Len;
-+ CONST UINT64 *RegProp;
-+ RETURN_STATUS PcdStatus;
-
- NewBase = 0;
- NewSize = 0;
-@@ -87,13 +86,8 @@ QemuVirtMemInfoPeiLibConstructor ( - // Make sure the start of DRAM matches our expectation
- //
- ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
--
-- Hob = BuildGuidDataHob (
-- &gArmVirtSystemMemorySizeGuid,
-- &NewSize,
-- sizeof NewSize
-- );
-- ASSERT (Hob != NULL);
-+ PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize);
-+ ASSERT_RETURN_ERROR (PcdStatus);
-
- //
- // We need to make sure that the machine we are running on has at least
diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/files/0002-Revert-ArmVirtPkg-ArmVirtQemu-omit-PCD-PEIM-unless-T.patch b/meta-arm/meta-arm/recipes-bsp/uefi/files/0002-Revert-ArmVirtPkg-ArmVirtQemu-omit-PCD-PEIM-unless-T.patch deleted file mode 100644 index 64e85ab1bf..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/files/0002-Revert-ArmVirtPkg-ArmVirtQemu-omit-PCD-PEIM-unless-T.patch +++ /dev/null @@ -1,89 +0,0 @@ -From caef501f2c05ba2170d0a449856900919021d6f6 Mon Sep 17 00:00:00 2001 -From: Your Name <you@example.com> -Date: Fri, 10 Mar 2023 18:47:09 +0000 -Subject: [PATCH] Revert "ArmVirtPkg/ArmVirtQemu: omit PCD PEIM unless TPM - support is enabled" - -This reverts commit b6efc505e4d6eb2055a39afd0a1ee67846a1e5f9. - -Upstream-Status: Inappropriate [other] -Signed-off-by: Jon Mason <jon.mason@arm.com> - ---- - ArmVirtPkg/ArmVirtQemu.dsc | 22 +++++----------------- - ArmVirtPkg/ArmVirtQemu.fdf | 2 +- - 2 files changed, 6 insertions(+), 18 deletions(-) - -diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc -index 2e786dad12..0f8157a032 100644 ---- a/ArmVirtPkg/ArmVirtQemu.dsc -+++ b/ArmVirtPkg/ArmVirtQemu.dsc -@@ -293,15 +293,10 @@ - #
- # TPM2 support
- #
--!if $(TPM2_ENABLE) == TRUE
- gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0
-+!if $(TPM2_ENABLE) == TRUE
- gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
- gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0
--!else
--[PcdsPatchableInModule]
-- # make this PCD patchable instead of dynamic when TPM support is not enabled
-- # this permits setting the PCD in unreachable code without pulling in dynamic PCD support
-- gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress|0x0
- !endif
-
- [PcdsDynamicHii]
-@@ -314,13 +309,6 @@ -
- gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
-
--[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM]
--!if $(TPM2_ENABLE) == TRUE
-- PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
--!else
-- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
--!endif
--
- ################################################################################
- #
- # Components Section - list of all EDK II Modules needed by this Platform
-@@ -332,6 +320,10 @@ - #
- ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
- MdeModulePkg/Core/Pei/PeiMain.inf
-+ MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
-+ <LibraryClasses>
-+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-+ }
- ArmPlatformPkg/PlatformPei/PlatformPeim.inf
- ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf {
- <LibraryClasses>
-@@ -342,10 +334,6 @@ - ArmPkg/Drivers/CpuPei/CpuPei.inf
-
- !if $(TPM2_ENABLE) == TRUE
-- MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
-- <LibraryClasses>
-- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-- }
- MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf {
- <LibraryClasses>
- ResetSystemLib|ArmVirtPkg/Library/ArmVirtPsciResetSystemPeiLib/ArmVirtPsciResetSystemPeiLib.inf
-diff --git a/ArmVirtPkg/ArmVirtQemu.fdf b/ArmVirtPkg/ArmVirtQemu.fdf -index 764f652afd..c85e36b185 100644 ---- a/ArmVirtPkg/ArmVirtQemu.fdf -+++ b/ArmVirtPkg/ArmVirtQemu.fdf -@@ -109,10 +109,10 @@ READ_LOCK_STATUS = TRUE - INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
- INF ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf
- INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
- INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-
- !if $(TPM2_ENABLE) == TRUE
-- INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
- INF MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf
- INF OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
- INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/files/default.patch b/meta-arm/meta-arm/recipes-bsp/uefi/files/default.patch deleted file mode 100644 index fca232f02b..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/files/default.patch +++ /dev/null @@ -1,23 +0,0 @@ -Platform/ARM: fix uninitialized variable FileSize in RunAxf - -Clang 14 detects a potentially uninitialized variable FileSize: - -RunAxf.c:216:11: error: variable 'FileSize' is used uninitialized - whenever 'if' condition is false -RunAxf.c:281:38: note: uninitialized use occurs here -WriteBackDataCacheRange (FileData, FileSize); - ^~~~~~~~ - -Reading the code it doesn't look like this can actually happen, but we -can keep clang happy by initialising FileSize to 0. - -Upstream-Status: Pending -Signed-off-by: Ross Burton <ross.burton@arm.com> - -diff --git a/Platform/ARM/Library/ArmShellCmdRunAxf/RunAxf.c b/Platform/ARM/Library/ArmShellCmdRunAxf/RunAxf.c -index d23739ad38..fba5e0ba30 100644 ---- a/Platform/ARM/Library/ArmShellCmdRunAxf/RunAxf.c -+++ b/Platform/ARM/Library/ArmShellCmdRunAxf/RunAxf.c -@@ -136,1 +136,1 @@ ShellDynCmdRunAxfHandler ( -- UINTN FileSize;
-+ UINTN FileSize = 0;
diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch deleted file mode 100644 index 42bdf7d40e..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-issue-245.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 096150fa19014b397a5d8f8d774bb8236ac37679 Mon Sep 17 00:00:00 2001 -From: Shyamanth RH <shyamanth.rh@arm.com> -Date: Wed, 4 Jan 2023 13:08:35 +0530 -Subject: [PATCH] Fix for issue #245 - -* The change fixes the build issue observed in GCC 12.XX. -* Looks like GCC is confusing label to a local variable and hence triggers dangling-pointer error when a label addres is assigned to a pointer. -* Changed branch_to_test from void * pointer to uint64_t datatype since we just need the retrun address of the label while updating the ELR. This should suppress the dangling-pinter warning thrown by GCC 12.XX - -Signed-off-by: Shyamanth RH <shyamanth.rh@arm.com> -Upstream-Status: Backport ---- - test_pool/peripherals/test_d003.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/test_pool/peripherals/test_d003.c b/test_pool/peripherals/test_d003.c -index 9f36e1f..0658a45 100755 ---- a/test_pool/peripherals/test_d003.c -+++ b/test_pool/peripherals/test_d003.c -@@ -30,7 +30,7 @@ - - static uint64_t l_uart_base; - static uint32_t int_id; --static void *branch_to_test; -+static uint64_t branch_to_test; - static uint32_t test_fail; - - static -@@ -40,7 +40,7 @@ esr(uint64_t interrupt_type, void *context) - uint32_t index = val_pe_get_index_mpid(val_pe_get_mpid()); - - /* Update the ELR to point to next instrcution */ -- val_pe_update_elr(context, (uint64_t)branch_to_test); -+ val_pe_update_elr(context, branch_to_test); - - val_print(AVS_PRINT_ERR, "\n Error : Received Sync Exception type %d", interrupt_type); - val_set_status(index, RESULT_FAIL(g_sbsa_level, TEST_NUM, 01)); -@@ -150,7 +150,7 @@ payload(void) - val_pe_install_esr(EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, esr); - val_pe_install_esr(EXCEPT_AARCH64_SERROR, esr); - -- branch_to_test = &&exception_taken; -+ branch_to_test = (uint64_t)&&exception_taken; - - if (count == 0) { - val_print(AVS_PRINT_WARN, "\n No UART defined by Platform ", 0); diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-mismatch-in-function-prototype.patch b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-mismatch-in-function-prototype.patch new file mode 100644 index 0000000000..0babf2fc01 --- /dev/null +++ b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-for-mismatch-in-function-prototype.patch @@ -0,0 +1,31 @@ +From 42cc39fdea21177e82b6cec138c06726242673f7 Mon Sep 17 00:00:00 2001 +From: Srikar Josyula <srikar.josyula@arm.com> +Date: Tue, 25 Jul 2023 12:55:04 +0530 +Subject: [PATCH] Fix for mismatch in function prototype + + - Mismatch between function prototype and definition + causing build failure with GCC 13.1.1 + - Fixed the function prototype for val_get_exerciser_err_info + +Signed-off-by: Srikar Josyula <srikar.josyula@arm.com> + +Upstream-Status: Backport +Signed-off-by: Jon Mason <jon.mason@arm.com> + +--- + val/include/sbsa_avs_exerciser.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/val/include/sbsa_avs_exerciser.h b/val/include/sbsa_avs_exerciser.h +index 4b2c62b089f5..7c0e3d0fb58f 100644 +--- a/val/include/sbsa_avs_exerciser.h ++++ b/val/include/sbsa_avs_exerciser.h +@@ -118,7 +118,7 @@ uint32_t val_exerciser_ops(EXERCISER_OPS ops, uint64_t param, uint32_t instance) + uint32_t val_exerciser_get_data(EXERCISER_DATA_TYPE type, exerciser_data_t *data, uint32_t instance); + uint32_t val_exerciser_execute_tests(uint32_t level); + uint32_t val_exerciser_get_bdf(uint32_t instance); +-uint32_t val_get_exerciser_err_info(uint32_t type); ++uint32_t val_get_exerciser_err_info(EXERCISER_ERROR_CODE type); + + uint32_t e001_entry(void); + uint32_t e002_entry(void); diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch deleted file mode 100644 index f60391447d..0000000000 --- a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Fix-function-protype-mismatches.patch +++ /dev/null @@ -1,43 +0,0 @@ -From df6006190f112a4ecc54ed0a35d3ea83a2350c73 Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Thu, 2 Feb 2023 17:37:52 -0800 -Subject: [PATCH] Fix function protype mismatches - -These are flagged by gcc13 -avs_gic.c:241:1: error: conflicting types for 'val_gic_get_info' due to enum/integer mismatch; have 'uint32_t(uint32_t)' {aka 'unsigned int(unsigned int)'} [-Werror=enum-int-mismatch] -| 241 | val_gic_get_info(uint32_t type) -| | ^~~~~~~~~~~~~~~~ - -Signed-off-by: Khem Raj <raj.khem@gmail.com> -Upstream-Status: Backport ---- - val/include/val_interface.h | 2 +- - val/src/avs_gic.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/val/include/val_interface.h b/val/include/val_interface.h -index 053fdfa..8814b41 100644 ---- a/val/include/val_interface.h -+++ b/val/include/val_interface.h -@@ -181,7 +181,7 @@ typedef enum { - void val_wd_create_info_table(uint64_t *wd_info_table); - void val_wd_free_info_table(void); - uint32_t val_wd_execute_tests(uint32_t level, uint32_t num_pe); --uint64_t val_wd_get_info(uint32_t index, uint32_t info_type); -+uint64_t val_wd_get_info(uint32_t index, WD_INFO_TYPE_e info_type); - uint32_t val_wd_set_ws0(uint32_t index, uint32_t timeout); - uint64_t val_get_counter_frequency(void); - -diff --git a/val/src/avs_gic.c b/val/src/avs_gic.c -index b37f106..1146a01 100644 ---- a/val/src/avs_gic.c -+++ b/val/src/avs_gic.c -@@ -249,7 +249,7 @@ val_get_cpuif_base(void) - @return 32-bit data - **/ - uint32_t --val_gic_get_info(uint32_t type) -+val_gic_get_info(GIC_INFO_e type) - { - uint32_t rdbase_len; - diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0002-Patch-in-the-paths-to-the-SBSA-test-suite.patch b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Patch-in-the-paths-to-the-SBSA-test-suite.patch index 0c784c6fb5..7b0b9b3880 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0002-Patch-in-the-paths-to-the-SBSA-test-suite.patch +++ b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0001-Patch-in-the-paths-to-the-SBSA-test-suite.patch @@ -1,4 +1,4 @@ -From 90d705333521dd85720a17a29abf1aff1612c917 Mon Sep 17 00:00:00 2001 +From 97eb384fcc66326f93813ff14b998bb7336a4422 Mon Sep 17 00:00:00 2001 From: Ross Burton <ross.burton@arm.com> Date: Thu, 16 Feb 2023 21:53:25 +0000 Subject: [PATCH] Patch in the paths to the SBSA test suite diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0003-Enforce-using-good-old-BFD-linker.patch b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0002-Enforce-using-good-old-BFD-linker.patch index a921481837..154ff0ec04 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0003-Enforce-using-good-old-BFD-linker.patch +++ b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/0002-Enforce-using-good-old-BFD-linker.patch @@ -1,4 +1,4 @@ -From 6673fb1de490575a414de7e4dd9442c921383019 Mon Sep 17 00:00:00 2001 +From 8ce56a02fd722833931d356c372d374845f4c626 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Wed, 7 Apr 2021 00:16:07 -0700 Subject: [PATCH] Enforce using good old BFD linker @@ -18,10 +18,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template -index bca09e4648..b775391675 100755 +index 503a6687c1..5cbc5c92a5 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template -@@ -1858,7 +1858,7 @@ DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access +@@ -746,7 +746,7 @@ DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS) -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char -ffunction-sections -fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie -ffixed-x18
DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
DEFINE GCC_DLINK_FLAGS_COMMON = -nostdlib --pie
diff --git a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs_6.1.0.bb b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs_7.1.2.bb index 7a29f55626..b6c6468518 100644 --- a/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs_6.1.0.bb +++ b/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs_7.1.2.bb @@ -1,4 +1,4 @@ -require recipes-bsp/uefi/edk2-firmware_202302.bb +require recipes-bsp/uefi/edk2-firmware_202305.bb PROVIDES:remove = "virtual/bootloader" LICENSE += "& Apache-2.0" @@ -6,15 +6,14 @@ LIC_FILES_CHKSUM += "file://ShellPkg/Application/sbsa-acs/LICENSE.md;md5=2a94494 SRC_URI += "git://github.com/ARM-software/sbsa-acs;destsuffix=edk2/ShellPkg/Application/sbsa-acs;protocol=https;branch=master;name=acs \ git://github.com/tianocore/edk2-libc;destsuffix=edk2/edk2-libc;protocol=https;branch=master;name=libc \ - file://0002-Patch-in-the-paths-to-the-SBSA-test-suite.patch \ - file://0003-Enforce-using-good-old-BFD-linker.patch \ - file://0001-Fix-function-protype-mismatches.patch;patchdir=ShellPkg/Application/sbsa-acs \ - file://0001-Fix-for-issue-245.patch;patchdir=ShellPkg/Application/sbsa-acs \ + file://0001-Patch-in-the-paths-to-the-SBSA-test-suite.patch \ + file://0002-Enforce-using-good-old-BFD-linker.patch \ + file://0001-Fix-for-mismatch-in-function-prototype.patch;patchdir=ShellPkg/Application/sbsa-acs \ " -SRCREV_acs = "7d7a3fe81ad7e6f05143ba17db50107f1ab6c9cd" -SRCREV_libc = "a806ea1062c254bd6e09db7d0f7beb4d14bc3ed0" +SRCREV_acs = "23253befbed2aee7304470fd83b78672488a7fc2" +SRCREV_libc = "d3dea661da9ae4a3421a80905e75a8dc77aa980e" # GCC12 trips on it #see https://src.fedoraproject.org/rpms/edk2/blob/rawhide/f/0032-Basetools-turn-off-gcc12-warning.patch diff --git a/meta-arm/meta-arm/recipes-devtools/fvp/fvp-corstone500.bb b/meta-arm/meta-arm/recipes-devtools/fvp/fvp-corstone500.bb deleted file mode 100644 index c80b94c4c5..0000000000 --- a/meta-arm/meta-arm/recipes-devtools/fvp/fvp-corstone500.bb +++ /dev/null @@ -1,10 +0,0 @@ -require fvp-ecosystem.inc - -MODEL = "Corstone-500" -MODEL_CODE = "FVP_Corstone_500" -PV = "11.12.59" - -SRC_URI[sha256sum] = "26f0fbb52de2ccdb4c7b40b6f4ddb5eabdcb8173775fdd11c9a12173326f8614" - -LIC_FILES_CHKSUM = "file://license_terms/license_agreement.txt;md5=1a33828e132ba71861c11688dbb0bd16 \ - file://license_terms/third_party_licenses.txt;md5=47473b1e04b70938cf0a7ffea8ea4cc3" diff --git a/meta-arm/meta-arm/recipes-devtools/gn/gn_git.bb b/meta-arm/meta-arm/recipes-devtools/gn/gn_git.bb index 4b021bbe4e..5a6f19dbab 100644 --- a/meta-arm/meta-arm/recipes-devtools/gn/gn_git.bb +++ b/meta-arm/meta-arm/recipes-devtools/gn/gn_git.bb @@ -7,7 +7,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=0fca02217a5d49a14dfe2d11837bb34d" SRC_URI = "git://gn.googlesource.com/gn;protocol=https;branch=main \ file://0001-Replace-lstat64-stat64-functions-on-linux.patch" SRCREV = "4bd1a77e67958fb7f6739bd4542641646f264e5d" -PV = "0+git${SRCPV}" +PV = "0+git" S = "${WORKDIR}/git" B = "${WORKDIR}/build" diff --git a/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-arm64-defconfig-remove-CONFIG_COMMON_CLK_NPCM8XX-y.patch b/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-arm64-defconfig-remove-CONFIG_COMMON_CLK_NPCM8XX-y.patch new file mode 100644 index 0000000000..bff81dfcc6 --- /dev/null +++ b/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-arm64-defconfig-remove-CONFIG_COMMON_CLK_NPCM8XX-y.patch @@ -0,0 +1,50 @@ +From 94a5e7ffe5855272708a94190820534c4f51bdd8 Mon Sep 17 00:00:00 2001 +From: Mikko Rapeli <mikko.rapeli@linaro.org> +Date: Tue, 15 Aug 2023 10:36:56 +0300 +Subject: [PATCH] arm64: defconfig: remove CONFIG_COMMON_CLK_NPCM8XX=y + +There is no code for this config option and enabling it in defconfig +causes warnings from tools which are detecting unused and obsolete +kernel config flags since the flag will be completely missing from +effective build config after "make olddefconfig". + +Fixes yocto kernel recipe build time warning: + +WARNING: [kernel config]: This BSP contains fragments with warnings: +... +[INFO]: the following symbols were not found in the active +configuration: + - CONFIG_COMMON_CLK_NPCM8XX + +The flag was added with commit 45472f1e5348c7b755b4912f2f529ec81cea044b +v5.19-rc4-15-g45472f1e5348 so 6.1 and 6.4 stable kernel trees are +affected. + +Fixes: 45472f1e5348c7b755b4912f2f529ec81cea044b ("arm64: defconfig: Add Nuvoton NPCM family support") +Cc: stable@kernel.org +Cc: Bruce Ashfield <bruce.ashfield@gmail.com> +Cc: Jon Mason <jon.mason@arm.com> +Cc: Jon Mason <jdmason@kudzu.us> +Cc: Ross Burton <ross@burtonini.com> +Cc: Arnd Bergmann <arnd@arndb.de> +Signed-off-by: Mikko Rapeli <mikko.rapeli@linaro.org> + +Signed-off-by: Jon Mason <jon.mason@arm.com> +Upstream-Status: Submitted [https://lists.infradead.org/pipermail/linux-arm-kernel/2023-August/859760.html] + +--- + arch/arm64/configs/defconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 0777bcae9104..1cf24537fda2 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -1146,7 +1146,6 @@ CONFIG_COMMON_CLK_S2MPS11=y + CONFIG_COMMON_CLK_PWM=y + CONFIG_COMMON_CLK_RS9_PCIE=y + CONFIG_COMMON_CLK_VC5=y +-CONFIG_COMMON_CLK_NPCM8XX=y + CONFIG_COMMON_CLK_BD718XX=m + CONFIG_CLK_RASPBERRYPI=m + CONFIG_CLK_IMX8MM=y diff --git a/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-gcc-plugins-Reorganize-gimple-includes-for-GCC-13.patch b/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-gcc-plugins-Reorganize-gimple-includes-for-GCC-13.patch deleted file mode 100644 index e4d8936fd7..0000000000 --- a/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0001-gcc-plugins-Reorganize-gimple-includes-for-GCC-13.patch +++ /dev/null @@ -1,47 +0,0 @@ -From e6a71160cc145e18ab45195abf89884112e02dfb Mon Sep 17 00:00:00 2001 -From: Kees Cook <keescook@chromium.org> -Date: Wed, 18 Jan 2023 12:21:35 -0800 -Subject: [PATCH] gcc-plugins: Reorganize gimple includes for GCC 13 - -The gimple-iterator.h header must be included before gimple-fold.h -starting with GCC 13. Reorganize gimple headers to work for all GCC -versions. - -Reported-by: Palmer Dabbelt <palmer@rivosinc.com> -Acked-by: Palmer Dabbelt <palmer@rivosinc.com> -Link: https://lore.kernel.org/all/20230113173033.4380-1-palmer@rivosinc.com/ -Cc: linux-hardening@vger.kernel.org -Signed-off-by: Kees Cook <keescook@chromium.org> - -Upstream-Status: Backport -Signed-off-by: Jon Mason <jon.mason@arm.com> - ---- - scripts/gcc-plugins/gcc-common.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/scripts/gcc-plugins/gcc-common.h b/scripts/gcc-plugins/gcc-common.h -index 9a1895747b15..84c730da36dd 100644 ---- a/scripts/gcc-plugins/gcc-common.h -+++ b/scripts/gcc-plugins/gcc-common.h -@@ -71,7 +71,9 @@ - #include "varasm.h" - #include "stor-layout.h" - #include "internal-fn.h" -+#include "gimple.h" - #include "gimple-expr.h" -+#include "gimple-iterator.h" - #include "gimple-fold.h" - #include "context.h" - #include "tree-ssa-alias.h" -@@ -85,10 +87,8 @@ - #include "tree-eh.h" - #include "stmt.h" - #include "gimplify.h" --#include "gimple.h" - #include "tree-phinodes.h" - #include "tree-cfg.h" --#include "gimple-iterator.h" - #include "gimple-ssa.h" - #include "ssa-iterators.h" - diff --git a/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0002-Revert-arm64-defconfig-Add-Nuvoton-NPCM-family-suppo.patch b/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0002-Revert-arm64-defconfig-Add-Nuvoton-NPCM-family-suppo.patch deleted file mode 100644 index d5b5363a69..0000000000 --- a/meta-arm/meta-arm/recipes-kernel/linux/files/aarch64/0002-Revert-arm64-defconfig-Add-Nuvoton-NPCM-family-suppo.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 891eeb87cddb0d52bc9eac39afcca5027a660be6 Mon Sep 17 00:00:00 2001 -From: Jon Mason <jdmason@kudzu.us> -Date: Fri, 3 Feb 2023 05:21:07 -0500 -Subject: [PATCH 2/2] Revert "arm64: defconfig: Add Nuvoton NPCM family - support" - -This reverts commit 45472f1e5348c7b755b4912f2f529ec81cea044b - -Signed-off-by: Jon Mason <jon.mason@arm.com> -Upstream-Status: Inappropriate ---- - arch/arm64/configs/defconfig | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index 70919b241469..4f09b80a1b96 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -51,7 +51,6 @@ CONFIG_ARCH_MESON=y - CONFIG_ARCH_MVEBU=y - CONFIG_ARCH_NXP=y - CONFIG_ARCH_MXC=y --CONFIG_ARCH_NPCM=y - CONFIG_ARCH_QCOM=y - CONFIG_ARCH_RENESAS=y - CONFIG_ARCH_ROCKCHIP=y -@@ -637,7 +636,6 @@ CONFIG_UNIPHIER_WATCHDOG=y - CONFIG_PM8916_WATCHDOG=m - CONFIG_BCM2835_WDT=y - CONFIG_BCM7038_WDT=m --CONFIG_NPCM7XX_WATCHDOG=y - CONFIG_MFD_ALTERA_SYSMGR=y - CONFIG_MFD_BD9571MWV=y - CONFIG_MFD_AXP20X_I2C=y -@@ -1049,7 +1047,6 @@ CONFIG_COMMON_CLK_FSL_SAI=y - CONFIG_COMMON_CLK_S2MPS11=y - CONFIG_COMMON_CLK_PWM=y - CONFIG_COMMON_CLK_VC5=y --CONFIG_COMMON_CLK_NPCM8XX=y - CONFIG_COMMON_CLK_BD718XX=m - CONFIG_CLK_RASPBERRYPI=m - CONFIG_CLK_IMX8MM=y --- -2.30.2 - diff --git a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto%.bbappend b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto%.bbappend index 0a42ce4a5d..9d5266ba22 100644 --- a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto%.bbappend +++ b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto%.bbappend @@ -1,5 +1,10 @@ ARMFILESPATHS := "${THISDIR}/files:" +FILESEXTRAPATHS:prepend:aarch64 = "${ARMFILESPATHS}" +SRC_URI:append:aarch64 = " \ + file://0001-arm64-defconfig-remove-CONFIG_COMMON_CLK_NPCM8XX-y.patch \ + " + COMPATIBLE_MACHINE:generic-arm64 = "generic-arm64" FILESEXTRAPATHS:prepend:generic-arm64 = "${ARMFILESPATHS}" SRC_URI:append:generic-arm64 = " \ diff --git a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto-rt_6.1%.bbappend b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto-rt_6.1%.bbappend index d0a0ff0e68..94d3398c65 100644 --- a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto-rt_6.1%.bbappend +++ b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto-rt_6.1%.bbappend @@ -2,6 +2,4 @@ FILESEXTRAPATHS:prepend:aarch64 = "${ARMFILESPATHS}" SRC_URI:append:aarch64 = " \ file://0001-Revert-arm64-defconfig-Enable-Tegra-MGBE-driver.patch \ - file://0002-Revert-arm64-defconfig-Add-Nuvoton-NPCM-family-suppo.patch \ - file://0001-gcc-plugins-Reorganize-gimple-includes-for-GCC-13.patch \ " diff --git a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto_6.1%.bbappend b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto_6.1%.bbappend index d0a0ff0e68..bb9581712b 100644 --- a/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto_6.1%.bbappend +++ b/meta-arm/meta-arm/recipes-kernel/linux/linux-yocto_6.1%.bbappend @@ -1,7 +1,4 @@ - FILESEXTRAPATHS:prepend:aarch64 = "${ARMFILESPATHS}" SRC_URI:append:aarch64 = " \ file://0001-Revert-arm64-defconfig-Enable-Tegra-MGBE-driver.patch \ - file://0002-Revert-arm64-defconfig-Add-Nuvoton-NPCM-family-suppo.patch \ - file://0001-gcc-plugins-Reorganize-gimple-includes-for-GCC-13.patch \ " diff --git a/meta-arm/meta-arm/recipes-security/optee/optee-client/tee-supplicant.service b/meta-arm/meta-arm/recipes-security/optee/optee-client/tee-supplicant.service index c273832d72..6b00df7421 100644 --- a/meta-arm/meta-arm/recipes-security/optee/optee-client/tee-supplicant.service +++ b/meta-arm/meta-arm/recipes-security/optee/optee-client/tee-supplicant.service @@ -1,5 +1,6 @@ [Unit] Description=TEE Supplicant +ConditionPathExistsGlob=/dev/teepriv[0-9]* [Service] User=root diff --git a/meta-arm/meta-arm/recipes-security/trusted-services/trusted-services-src.inc b/meta-arm/meta-arm/recipes-security/trusted-services/trusted-services-src.inc index 2bb4a8a11f..86eb50835f 100644 --- a/meta-arm/meta-arm/recipes-security/trusted-services/trusted-services-src.inc +++ b/meta-arm/meta-arm/recipes-security/trusted-services/trusted-services-src.inc @@ -12,11 +12,11 @@ SRC_URI:append = "\ " #Latest on 2023 April 28 -SRCREV="08b3d39471f4914186bd23793dc920e83b0e3197" +SRCREV_trusted-services = "08b3d39471f4914186bd23793dc920e83b0e3197" LIC_FILES_CHKSUM = "file://${S}/license.rst;md5=ea160bac7f690a069c608516b17997f4" S = "${WORKDIR}/git/trusted-services" -PV ?= "0.0+git${SRCPV}" +PV ?= "0.0+git" # DTC, tag "v1.6.1" SRC_URI += "git://github.com/dgibson/dtc;name=dtc;protocol=https;branch=main;destsuffix=git/dtc" @@ -58,6 +58,8 @@ SRC_URI += "git://github.com/OpenAMP/open-amp.git;name=openamp;protocol=https;br SRCREV_openamp = "347397decaa43372fc4d00f965640ebde042966d" LIC_FILES_CHKSUM += "file://../openamp/LICENSE.md;md5=a8d8cf662ef6bf9936a1e1413585ecbf" +SRCREV_FORMAT = "trusted-services_dtc_mbedtls_nanopb_qcbor_tcose_cpputest_libmetal_openamp" + # TS ships patches for external dependencies that needs to be applied apply_ts_patches() { ( cd ${WORKDIR}/git/qcbor; git stash; git branch -f bf_am; git am ${S}/external/qcbor/*.patch; git reset bf_am ) diff --git a/meta-raspberrypi/.github/workflows/docker-images/yocto-builder/entrypoint-build.sh b/meta-raspberrypi/.github/workflows/docker-images/yocto-builder/entrypoint-build.sh index d2c6dc0ea7..65999d0cf7 100755 --- a/meta-raspberrypi/.github/workflows/docker-images/yocto-builder/entrypoint-build.sh +++ b/meta-raspberrypi/.github/workflows/docker-images/yocto-builder/entrypoint-build.sh @@ -42,7 +42,9 @@ printf "\n# ------ ci ------\n" >> conf/local.conf cat <<EOCONF >>conf/local.conf BB_NUMBER_THREADS = "6" PARALLEL_MAKE = "-j 6" -DISTRO_FEATURES:append = " systemd" +# unmerged-usr is deprecated +# https://lore.kernel.org/all/3f2f03085301d22854e5429019fb010f27d98bc7.camel@linuxfoundation.org/t/ +DISTRO_FEATURES:append = " systemd usrmerge" VIRTUAL-RUNTIME_init_manager = "systemd" DISTRO_FEATURES_BACKFILL_CONSIDERED:append = " sysvinit" VIRTUAL-RUNTIME_initscripts = "systemd-compat-units" diff --git a/meta-raspberrypi/docs/conf.py b/meta-raspberrypi/docs/conf.py index e7a2491dde..39e7223443 100644 --- a/meta-raspberrypi/docs/conf.py +++ b/meta-raspberrypi/docs/conf.py @@ -30,7 +30,10 @@ # Add any Sphinx extension module names here, as strings. They can be # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom # ones. -extensions = ['myst_parser'] +extensions = [ + 'myst_parser', + 'sphinx_rtd_theme' +] # Add any paths that contain templates here, relative to this directory. templates_path = ['_templates'] @@ -121,6 +124,7 @@ todo_include_todos = False # a list of builtin themes. # # html_theme = 'alabaster' +html_theme = "sphinx_rtd_theme" # Theme options are theme-specific and customize the look and feel of a theme # further. For a list of options available for each theme, see the diff --git a/meta-raspberrypi/docs/requirements.txt b/meta-raspberrypi/docs/requirements.txt index 9e4694f906..51eebd03e2 100644 --- a/meta-raspberrypi/docs/requirements.txt +++ b/meta-raspberrypi/docs/requirements.txt @@ -1 +1,2 @@ myst_parser +sphinx_rtd_theme diff --git a/meta-raspberrypi/recipes-multimedia/omxplayer/omxplayer_git.bb b/meta-raspberrypi/recipes-multimedia/omxplayer/omxplayer_git.bb index b43a41fb8d..b7eaf40802 100644 --- a/meta-raspberrypi/recipes-multimedia/omxplayer/omxplayer_git.bb +++ b/meta-raspberrypi/recipes-multimedia/omxplayer/omxplayer_git.bb @@ -11,6 +11,8 @@ DEPENDS = "alsa-lib libpcre virtual/egl boost freetype dbus openssl libssh virtu PR = "r6" +SRCREV_FORMAT = "_ffmpeg" + SRCREV_default = "1f1d0ccd65d3a1caa86dc79d2863a8f067c8e3f8" # omxplayer builds its own copy of ffmpeg from source instead of using the diff --git a/meta-security/conf/layer.conf b/meta-security/conf/layer.conf index a436f97e87..3e8db1f17c 100644 --- a/meta-security/conf/layer.conf +++ b/meta-security/conf/layer.conf @@ -9,7 +9,7 @@ BBFILE_COLLECTIONS += "security" BBFILE_PATTERN_security = "^${LAYERDIR}/" BBFILE_PRIORITY_security = "8" -LAYERSERIES_COMPAT_security = "mickledore" +LAYERSERIES_COMPAT_security = "nanbield" LAYERDEPENDS_security = "core openembedded-layer" diff --git a/meta-security/meta-hardening/conf/layer.conf b/meta-security/meta-hardening/conf/layer.conf index 4bc1cac2f0..c499e60a2b 100644 --- a/meta-security/meta-hardening/conf/layer.conf +++ b/meta-security/meta-hardening/conf/layer.conf @@ -8,7 +8,7 @@ BBFILE_COLLECTIONS += "harden-layer" BBFILE_PATTERN_harden-layer = "^${LAYERDIR}/" BBFILE_PRIORITY_harden-layer = "6" -LAYERSERIES_COMPAT_harden-layer = "mickledore" +LAYERSERIES_COMPAT_harden-layer = "nanbield" LAYERDEPENDS_harden-layer = "core openembedded-layer" diff --git a/meta-security/meta-integrity/conf/layer.conf b/meta-security/meta-integrity/conf/layer.conf index 7a9c1d188c..d00298ac8b 100644 --- a/meta-security/meta-integrity/conf/layer.conf +++ b/meta-security/meta-integrity/conf/layer.conf @@ -20,7 +20,7 @@ INTEGRITY_BASE := '${LAYERDIR}' # interactive shell is enough. OE_TERMINAL_EXPORTS += "INTEGRITY_BASE" -LAYERSERIES_COMPAT_integrity = "mickledore" +LAYERSERIES_COMPAT_integrity = "nanbield" # ima-evm-utils depends on keyutils from meta-oe LAYERDEPENDS_integrity = "core openembedded-layer" diff --git a/meta-security/meta-parsec/conf/layer.conf b/meta-security/meta-parsec/conf/layer.conf index b162289748..503953a881 100644 --- a/meta-security/meta-parsec/conf/layer.conf +++ b/meta-security/meta-parsec/conf/layer.conf @@ -8,7 +8,7 @@ BBFILE_COLLECTIONS += "parsec-layer" BBFILE_PATTERN_parsec-layer = "^${LAYERDIR}/" BBFILE_PRIORITY_parsec-layer = "5" -LAYERSERIES_COMPAT_parsec-layer = "mickledore" +LAYERSERIES_COMPAT_parsec-layer = "nanbield" LAYERDEPENDS_parsec-layer = "core clang-layer" BBLAYERS_LAYERINDEX_NAME_parsec-layer = "meta-parsec" diff --git a/meta-security/meta-tpm/conf/layer.conf b/meta-security/meta-tpm/conf/layer.conf index 1f270317cc..8075706269 100644 --- a/meta-security/meta-tpm/conf/layer.conf +++ b/meta-security/meta-tpm/conf/layer.conf @@ -8,7 +8,7 @@ BBFILE_COLLECTIONS += "tpm-layer" BBFILE_PATTERN_tpm-layer = "^${LAYERDIR}/" BBFILE_PRIORITY_tpm-layer = "6" -LAYERSERIES_COMPAT_tpm-layer = "mickledore" +LAYERSERIES_COMPAT_tpm-layer = "nanbield" LAYERDEPENDS_tpm-layer = " \ core \ diff --git a/meta-security/recipes-compliance/scap-security-guide/files/0001-scap-security-guide-add-openembedded-distro-support.patch b/meta-security/recipes-compliance/scap-security-guide/files/0001-scap-security-guide-add-openembedded-distro-support.patch deleted file mode 100644 index 0db2b1203c..0000000000 --- a/meta-security/recipes-compliance/scap-security-guide/files/0001-scap-security-guide-add-openembedded-distro-support.patch +++ /dev/null @@ -1,388 +0,0 @@ -From 826dd5b109f79270819703a23cc8066895d68042 Mon Sep 17 00:00:00 2001 -From: Armin Kuster <akuster808@gmail.com> -Date: Wed, 14 Jun 2023 07:46:55 -0400 -Subject: [PATCH 1/2] scap-security-guide: add openembedded distro support - -includes a standard profile for out-of-the-box checks - -Signed-off-by: Armin Kuster <akuster808@gmail.com> - -Upstream-Status: Pending -https://github.com/ComplianceAsCode/content/pull/10793 -Signed-off-by: Armin Kuster <akuster808@gmail.com> - ---- - CMakeLists.txt | 5 + - build_product | 1 + - products/openembedded/CMakeLists.txt | 6 + - products/openembedded/product.yml | 19 ++ - .../openembedded/profiles/standard.profile | 166 ++++++++++++++++++ - .../openembedded/transforms/constants.xslt | 10 ++ - .../oval/installed_OS_is_openembedded.xml | 33 ++++ - .../oval/sysctl_kernel_ipv6_disable.xml | 1 + - ssg/constants.py | 5 +- - 9 files changed, 245 insertions(+), 1 deletion(-) - create mode 100644 products/openembedded/CMakeLists.txt - create mode 100644 products/openembedded/product.yml - create mode 100644 products/openembedded/profiles/standard.profile - create mode 100644 products/openembedded/transforms/constants.xslt - create mode 100644 shared/checks/oval/installed_OS_is_openembedded.xml - -diff --git a/CMakeLists.txt b/CMakeLists.txt -index 6b1ac00ff9..e4191f2cef 100644 ---- a/CMakeLists.txt -+++ b/CMakeLists.txt -@@ -97,6 +97,7 @@ option(SSG_PRODUCT_UBUNTU1804 "If enabled, the Ubuntu 18.04 SCAP content will be - option(SSG_PRODUCT_UBUNTU2004 "If enabled, the Ubuntu 20.04 SCAP content will be built" ${SSG_PRODUCT_DEFAULT}) - option(SSG_PRODUCT_UBUNTU2204 "If enabled, the Ubuntu 22.04 SCAP content will be built" ${SSG_PRODUCT_DEFAULT}) - option(SSG_PRODUCT_UOS20 "If enabled, the Uos 20 SCAP content will be built" ${SSG_PRODUCT_DEFAULT}) -+option(SSG_PRODUCT_OE "If enabled, the OpenEmbedded SCAP content will be built" ${SSG_PRODUCT_DEFAULT}) - - - option(SSG_CENTOS_DERIVATIVES_ENABLED "If enabled, CentOS derivative content will be built from the RHEL content" TRUE) -@@ -291,6 +292,7 @@ message(STATUS "Ubuntu 18.04: ${SSG_PRODUCT_UBUNTU1804}") - message(STATUS "Ubuntu 20.04: ${SSG_PRODUCT_UBUNTU2004}") - message(STATUS "Ubuntu 22.04: ${SSG_PRODUCT_UBUNTU2204}") - message(STATUS "Uos 20: ${SSG_PRODUCT_UOS20}") -+message(STATUS "OpenEmbedded: ${SSG_PRODUCT_OE}") - - - message(STATUS " ") -@@ -409,6 +411,9 @@ endif() - if(SSG_PRODUCT_UOS20) - add_subdirectory("products/uos20" "uos20") - endif() -+if (SSG_PRODUCT_OE) -+ add_subdirectory("products/openembedded" "openembedded") -+endif() - - # ZIP only contains source datastreams and kickstarts, people who - # want sources to build from should get the tarball instead. -diff --git a/build_product b/build_product -index fc793cbe70..7bdc03edfe 100755 ---- a/build_product -+++ b/build_product -@@ -333,6 +333,7 @@ all_cmake_products=( - UBUNTU2204 - UOS20 - MACOS1015 -+ OPENEMBEDDED - ) - - DEFAULT_OVAL_MAJOR_VERSION=5 -diff --git a/products/openembedded/CMakeLists.txt b/products/openembedded/CMakeLists.txt -new file mode 100644 -index 0000000000..1981adf53e ---- /dev/null -+++ b/products/openembedded/CMakeLists.txt -@@ -0,0 +1,6 @@ -+# Sometimes our users will try to do: "cd openembedded; cmake ." That needs to error in a nice way. -+if ("${CMAKE_SOURCE_DIR}" STREQUAL "${CMAKE_CURRENT_SOURCE_DIR}") -+ message(FATAL_ERROR "cmake has to be used on the root CMakeLists.txt, see the Building ComplianceAsCode section in the Developer Guide!") -+endif() -+ -+ssg_build_product("openembedded") -diff --git a/products/openembedded/product.yml b/products/openembedded/product.yml -new file mode 100644 -index 0000000000..debf6870ef ---- /dev/null -+++ b/products/openembedded/product.yml -@@ -0,0 +1,19 @@ -+product: openembedded -+full_name: OpemEmbedded -+type: platform -+ -+benchmark_id: OPENEMBEDDED -+benchmark_root: "../../linux_os/guide" -+ -+profiles_root: "./profiles" -+ -+pkg_manager: "dnf" -+ -+init_system: "systemd" -+ -+cpes_root: "../../shared/applicability" -+cpes: -+ - openembedded: -+ name: "cpe:/o:openembedded:nodistro:" -+ title: "OpenEmbedded nodistro" -+ check_id: installed_OS_is_openembedded -diff --git a/products/openembedded/profiles/standard.profile b/products/openembedded/profiles/standard.profile -new file mode 100644 -index 0000000000..fcb9e0e5c2 ---- /dev/null -+++ b/products/openembedded/profiles/standard.profile -@@ -0,0 +1,166 @@ -+documentation_complete: true -+ -+title: 'Sample Security Profile for OpenEmbedded Distros' -+ -+description: |- -+ This profile is an sample for use in documentation and example content. -+ The selected rules are standard and should pass quickly on most systems. -+ -+selections: -+ - file_owner_etc_passwd -+ - file_groupowner_etc_passwd -+ - service_crond_enabled -+ - file_groupowner_crontab -+ - file_owner_crontab -+ - file_permissions_crontab -+ - file_groupowner_cron_hourly -+ - file_owner_cron_hourly -+ - file_permissions_cron_hourly -+ - file_groupowner_cron_daily -+ - file_owner_cron_daily -+ - file_permissions_cron_daily -+ - file_groupowner_cron_weekly -+ - file_owner_cron_weekly -+ - file_permissions_cron_weekly -+ - file_groupowner_cron_monthly -+ - file_owner_cron_monthly -+ - file_permissions_cron_monthly -+ - file_groupowner_cron_d -+ - file_owner_cron_d -+ - file_permissions_cron_d -+ - file_groupowner_cron_allow -+ - file_owner_cron_allow -+ - file_cron_deny_not_exist -+ - file_groupowner_at_allow -+ - file_owner_at_allow -+ - file_at_deny_not_exist -+ - file_permissions_at_allow -+ - file_permissions_cron_allow -+ - file_groupowner_sshd_config -+ - file_owner_sshd_config -+ - file_permissions_sshd_config -+ - file_permissions_sshd_private_key -+ - file_permissions_sshd_pub_key -+ - sshd_set_loglevel_verbose -+ - sshd_set_loglevel_info -+ - sshd_max_auth_tries_value=4 -+ - sshd_set_max_auth_tries -+ - sshd_disable_rhosts -+ - disable_host_auth -+ - sshd_disable_root_login -+ - sshd_disable_empty_passwords -+ - sshd_do_not_permit_user_env -+ - sshd_idle_timeout_value=15_minutes -+ - sshd_set_idle_timeout -+ - sshd_set_keepalive -+ - var_sshd_set_keepalive=0 -+ - sshd_set_login_grace_time -+ - var_sshd_set_login_grace_time=60 -+ - sshd_enable_warning_banner -+ - sshd_enable_pam -+ - sshd_set_maxstartups -+ - var_sshd_set_maxstartups=10:30:60 -+ - sshd_set_max_sessions -+ - var_sshd_max_sessions=10 -+ - accounts_password_pam_minclass -+ - accounts_password_pam_minlen -+ - accounts_password_pam_retry -+ - var_password_pam_minclass=4 -+ - var_password_pam_minlen=14 -+ - locking_out_password_attempts -+ - accounts_password_pam_pwhistory_remember_password_auth -+ - accounts_password_pam_pwhistory_remember_system_auth -+ - var_password_pam_remember_control_flag=required -+ - var_password_pam_remember=5 -+ - set_password_hashing_algorithm_systemauth -+ - var_accounts_maximum_age_login_defs=365 -+ - accounts_password_set_max_life_existing -+ - var_accounts_minimum_age_login_defs=7 -+ - accounts_password_set_min_life_existing -+ - var_accounts_password_warn_age_login_defs=7 -+ - account_disable_post_pw_expiration -+ - var_account_disable_post_pw_expiration=30 -+ - no_shelllogin_for_systemaccounts -+ - accounts_tmout -+ - var_accounts_tmout=15_min -+ - accounts_root_gid_zero -+ - accounts_umask_etc_bashrc -+ - use_pam_wheel_for_su -+ - sshd_allow_only_protocol2 -+ - journald_forward_to_syslog -+ - journald_compress -+ - journald_storage -+ - service_auditd_enabled -+ - service_httpd_disabled -+ - service_vsftpd_disabled -+ - service_named_disabled -+ - service_nfs_disabled -+ - service_rpcbind_disabled -+ - service_slapd_disabled -+ - service_dhcpd_disabled -+ - service_cups_disabled -+ - service_ypserv_disabled -+ - service_rsyncd_disabled -+ - service_avahi-daemon_disabled -+ - service_snmpd_disabled -+ - service_squid_disabled -+ - service_smb_disabled -+ - service_dovecot_disabled -+ - banner_etc_motd -+ - login_banner_text=cis_banners -+ - banner_etc_issue -+ - login_banner_text=cis_banners -+ - file_groupowner_etc_motd -+ - file_owner_etc_motd -+ - file_permissions_etc_motd -+ - file_groupowner_etc_issue -+ - file_owner_etc_issue -+ - file_permissions_etc_issue -+ - ensure_gpgcheck_globally_activated -+ - package_aide_installed -+ - aide_periodic_cron_checking -+ - grub2_password -+ - file_groupowner_grub2_cfg -+ - file_owner_grub2_cfg -+ - file_permissions_grub2_cfg -+ - require_singleuser_auth -+ - require_emergency_target_auth -+ - disable_users_coredumps -+ - configure_crypto_policy -+ - var_system_crypto_policy=default_policy -+ - dir_perms_world_writable_sticky_bits -+ - file_permissions_etc_passwd -+ - file_owner_etc_shadow -+ - file_groupowner_etc_shadow -+ - file_groupowner_etc_group -+ - file_owner_etc_group -+ - file_permissions_etc_group -+ - file_groupowner_etc_gshadow -+ - file_owner_etc_gshadow -+ - file_groupowner_backup_etc_passwd -+ - file_owner_backup_etc_passwd -+ - file_permissions_backup_etc_passwd -+ - file_groupowner_backup_etc_shadow -+ - file_owner_backup_etc_shadow -+ - file_permissions_backup_etc_shadow -+ - file_groupowner_backup_etc_group -+ - file_owner_backup_etc_group -+ - file_permissions_backup_etc_group -+ - file_groupowner_backup_etc_gshadow -+ - file_owner_backup_etc_gshadow -+ - file_permissions_unauthorized_world_writable -+ - file_permissions_ungroupowned -+ - accounts_root_path_dirs_no_write -+ - root_path_no_dot -+ - accounts_no_uid_except_zero -+ - file_ownership_home_directories -+ - file_groupownership_home_directories -+ - no_netrc_files -+ - no_rsh_trust_files -+ - account_unique_id -+ - group_unique_id -+ - group_unique_name -+ - wireless_disable_interfaces -+ - package_firewalld_installed -+ - service_firewalld_enabled -+ - package_iptables_installed -diff --git a/products/openembedded/transforms/constants.xslt b/products/openembedded/transforms/constants.xslt -new file mode 100644 -index 0000000000..152571e8bb ---- /dev/null -+++ b/products/openembedded/transforms/constants.xslt -@@ -0,0 +1,10 @@ -+<xsl:stylesheet version="1.0" xmlns:xsl="http://www.w3.org/1999/XSL/Transform"> -+ -+<xsl:include href="../../../shared/transforms/shared_constants.xslt"/> -+ -+<xsl:variable name="product_long_name">OpenEmbedded</xsl:variable> -+<xsl:variable name="product_short_name">openembedded</xsl:variable> -+<xsl:variable name="product_stig_id_name">empty</xsl:variable> -+<xsl:variable name="prod_type">openembedded</xsl:variable> -+ -+</xsl:stylesheet> -diff --git a/shared/checks/oval/installed_OS_is_openembedded.xml b/shared/checks/oval/installed_OS_is_openembedded.xml -new file mode 100644 -index 0000000000..11ebdca913 ---- /dev/null -+++ b/shared/checks/oval/installed_OS_is_openembedded.xml -@@ -0,0 +1,33 @@ -+<def-group> -+ <definition class="inventory" id="installed_OS_is_openembedded" version="1"> -+ <metadata> -+ <title>OpenEmbedded</title> -+ <affected family="unix"> -+ <platform>multi_platform_all</platform> -+ </affected> -+ <description>The operating system installed is an OpenEmbedded based system</description> -+ </metadata> -+ <criteria comment="System is OpenEmbedded based" operator="AND"> -+ <extend_definition comment="Installed OS is part of the Unix family" definition_ref="installed_OS_is_part_of_Unix_family" /> -+ <criterion comment="OpenEmbedded distro" test_ref="test_os_openembedded" /> -+ <criterion comment="OpenEmbedded is installed" test_ref="test_openembedded" /> -+ </criteria> -+ </definition> -+ -+ <unix:file_test check="all" check_existence="all_exist" comment="/etc/os-release exists" id="test_os_openembedded" version="1"> -+ <unix:object object_ref="obj_os_openembedded" /> -+ </unix:file_test> -+ <unix:file_object comment="check /etc/os-release file" id="obj_os_openembedded" version="1"> -+ <unix:filepath>/etc/os-release</unix:filepath> -+ </unix:file_object> -+ -+ <ind:textfilecontent54_test check="all" check_existence="at_least_one_exists" comment="Check OpenEmbedded" id="test_openembedded" version="1"> -+ <ind:object object_ref="obj_openembedded" /> -+ </ind:textfilecontent54_test> -+ <ind:textfilecontent54_object id="obj_openembedded" version="1" comment="Check OpenEmbedded"> -+ <ind:filepath>/etc/os-release</ind:filepath> -+ <ind:pattern operation="pattern match">^ID=nodistro$</ind:pattern> -+ <ind:instance datatype="int">1</ind:instance> -+ </ind:textfilecontent54_object> -+ -+</def-group> -diff --git a/shared/checks/oval/sysctl_kernel_ipv6_disable.xml b/shared/checks/oval/sysctl_kernel_ipv6_disable.xml -index affb9770cb..4f22df262c 100644 ---- a/shared/checks/oval/sysctl_kernel_ipv6_disable.xml -+++ b/shared/checks/oval/sysctl_kernel_ipv6_disable.xml -@@ -8,6 +8,7 @@ - <platform>multi_platform_debian</platform> - <platform>multi_platform_example</platform> - <platform>multi_platform_fedora</platform> -+ <platform>multi_platform_openembedded</platform> - <platform>multi_platform_opensuse</platform> - <platform>multi_platform_ol</platform> - <platform>multi_platform_rhcos</platform> -diff --git a/ssg/constants.py b/ssg/constants.py -index f66ba008fa..630fbdfcb9 100644 ---- a/ssg/constants.py -+++ b/ssg/constants.py -@@ -219,6 +219,7 @@ FULL_NAME_TO_PRODUCT_MAPPING = { - "Ubuntu 20.04": "ubuntu2004", - "Ubuntu 22.04": "ubuntu2204", - "UnionTech OS Server 20": "uos20", -+ "OpenEmbedded": "openembedded", - "Not Applicable" : "example" - } - -@@ -267,7 +268,7 @@ REFERENCES = dict( - - MULTI_PLATFORM_LIST = ["rhel", "fedora", "rhv", "debian", "ubuntu", - "opensuse", "sle", "ol", "ocp", "rhcos", -- "example", "eks", "alinux", "uos", "anolis"] -+ "example", "eks", "alinux", "uos", "anolis", "openembedded"] - - MULTI_PLATFORM_MAPPING = { - "multi_platform_alinux": ["alinux2", "alinux3"], -@@ -285,6 +286,7 @@ MULTI_PLATFORM_MAPPING = { - "multi_platform_sle": ["sle12", "sle15"], - "multi_platform_ubuntu": ["ubuntu1604", "ubuntu1804", "ubuntu2004", "ubuntu2204"], - "multi_platform_uos": ["uos20"], -+ "multi_platform_openembedded": ["openembedded"], - } - - RHEL_CENTOS_CPE_MAPPING = { -@@ -454,6 +456,7 @@ MAKEFILE_ID_TO_PRODUCT_MAP = { - 'ocp': 'Red Hat OpenShift Container Platform', - 'rhcos': 'Red Hat Enterprise Linux CoreOS', - 'eks': 'Amazon Elastic Kubernetes Service', -+ 'openembedded': 'OpenEmbedded', - } - - # References that can not be used with product-qualifiers --- -2.34.1 - diff --git a/meta-security/recipes-compliance/scap-security-guide/scap-security-guide_0.1.67.bb b/meta-security/recipes-compliance/scap-security-guide/scap-security-guide_0.1.69.bb index 988e48bd81..ac839dee44 100644 --- a/meta-security/recipes-compliance/scap-security-guide/scap-security-guide_0.1.67.bb +++ b/meta-security/recipes-compliance/scap-security-guide/scap-security-guide_0.1.69.bb @@ -6,11 +6,10 @@ HOME_URL = "https://www.open-scap.org/security-policies/scap-security-guide/" LIC_FILES_CHKSUM = "file://LICENSE;md5=9bfa86579213cb4c6adaffface6b2820" LICENSE = "BSD-3-Clause" -SRCREV = "3a1012bc9ec2b01b3b71c6feefd3cff0f52bd64d" +SRCREV = "d09e81ae00509a9be4b01359166cfbece06e47f4" SRC_URI = "git://github.com/ComplianceAsCode/content.git;branch=master;protocol=https \ file://run_eval.sh \ file://run-ptest \ - file://0001-scap-security-guide-add-openembedded-distro-support.patch \ file://0002-scap-security-guide-Add-Poky-support.patch \ " @@ -22,9 +21,14 @@ B = "${S}/build" inherit cmake pkgconfig python3native python3targetconfig ptest +STAGING_OSCAP_BUILDDIR = "${TMPDIR}/work-shared/openscap/oscap-build-artifacts" +export OSCAP_CPE_PATH="${STAGING_OSCAP_BUILDDIR}${datadir_native}/openscap/cpe" +export OSCAP_SCHEMA_PATH="${STAGING_OSCAP_BUILDDIR}${datadir_native}/openscap/schemas" +export OSCAP_XSLT_PATH="${STAGING_OSCAP_BUILDDIR}${datadir_native}/openscap/xsl" + OECMAKE_GENERATOR = "Unix Makefiles" -EXTRA_OECMAKE += "-DENABLE_PYTHON_COVERAGE=OFF -DSSG_PRODUCT_DEFAULT=OFF -DSSG_PRODUCT_OE=ON" +EXTRA_OECMAKE += "-DENABLE_PYTHON_COVERAGE=OFF -DSSG_PRODUCT_DEFAULT=OFF -DSSG_PRODUCT_OPENEMBEDDED=ON" do_configure[depends] += "openscap-native:do_install" diff --git a/meta-security/recipes-mac/ccs-tools/ccs-tools_1.8.9.bb b/meta-security/recipes-mac/ccs-tools/ccs-tools_1.8.9.bb index ff800ce9ef..8185e51047 100644 --- a/meta-security/recipes-mac/ccs-tools/ccs-tools_1.8.9.bb +++ b/meta-security/recipes-mac/ccs-tools/ccs-tools_1.8.9.bb @@ -23,7 +23,7 @@ do_make(){ } do_install(){ - oe_runmake INSTALLDIR=${D} USRLIBDIR=${libdir} install + oe_runmake INSTALLDIR=${D} USRLIBDIR=${libdir} SBINDIR=${sbindir} install } PACKAGE="${PN} ${PN}-dbg ${PN}-doc" diff --git a/meta-security/recipes-security/paxctl/paxctl/0001-To-fix-package-error-if-DESTDIR-is-set-to-usr.patch b/meta-security/recipes-security/paxctl/paxctl/0001-To-fix-package-error-if-DESTDIR-is-set-to-usr.patch new file mode 100644 index 0000000000..451cb7f96f --- /dev/null +++ b/meta-security/recipes-security/paxctl/paxctl/0001-To-fix-package-error-if-DESTDIR-is-set-to-usr.patch @@ -0,0 +1,26 @@ +From 824c5d7b96aeef1b4e182f657ac002bed6e14cd5 Mon Sep 17 00:00:00 2001 +From: Lei Maohui <leimaohui@fujitsu.com> +Date: Thu, 31 Aug 2023 08:20:56 +0000 +Subject: [PATCH] To fix package error if DESTDIR is set to /usr. + +Upstream-Status: Inappropriate +Signed-off-by: Lei Maohui <leimaohui@fujitsu.com> +--- + Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 0d7bc0c..46fd664 100644 +--- a/Makefile ++++ b/Makefile +@@ -19,7 +19,7 @@ $(PROG).o: $(PROG).c $(PROG).h $(PROG)-elf.c + + install: $(PROG) + # $(MKDIR) $(DESTDIR)/sbin $(DESTDIR)$(MANDIR) +- $(INSTALL) -D --owner 0 --group 0 --mode a=rx $(PROG) $(DESTDIR)/sbin/$(PROG) ++ $(INSTALL) -D --owner 0 --group 0 --mode a=rx $(PROG) $(DESTDIR)/usr/sbin/$(PROG) + $(INSTALL) -D --owner 0 --group 0 --mode a=r $(PROG).1 $(DESTDIR)/$(MANDIR)/$(PROG).1 + + clean: +-- +2.34.1 diff --git a/meta-security/recipes-security/paxctl/paxctl_0.9.bb b/meta-security/recipes-security/paxctl/paxctl_0.9.bb index 5c9aff1558..3d2f2a36c4 100644 --- a/meta-security/recipes-security/paxctl/paxctl_0.9.bb +++ b/meta-security/recipes-security/paxctl/paxctl_0.9.bb @@ -8,7 +8,9 @@ LIC_FILES_CHKSUM = "file://paxctl.c;beginline=1;endline=5;md5=0ddd065c61020dda79 file://paxctl-elf.c;beginline=1;endline=5;md5=99f453ce7f6d1687ee808982e2924813 \ " -SRC_URI = "http://pax.grsecurity.net/${BP}.tar.gz" +SRC_URI = "http://pax.grsecurity.net/${BP}.tar.gz \ + file://0001-To-fix-package-error-if-DESTDIR-is-set-to-usr.patch \ +" SRC_URI[md5sum] = "9bea59b1987dc4e16c2d22d745374e64" SRC_URI[sha256sum] = "a330ddd812688169802a3ba29e5e3b19956376b8f6f73b8d7e9586eb04423c2e" |