diff options
author | Tim Lee <timlee660101@gmail.com> | 2023-06-29 18:02:37 +0300 |
---|---|---|
committer | Tim Lee <chli30@nuvoton.com> | 2023-07-04 06:51:17 +0300 |
commit | 8d47600281d1f12330cddbca2dba6dfc0b6b1f67 (patch) | |
tree | 3c793e8edc120f9f8262339be7f19ee746bcac88 /meta-nuvoton/dynamic-layers | |
parent | 4afada13c3138b8024653c2f3f5e48e9995a55d0 (diff) | |
download | openbmc-8d47600281d1f12330cddbca2dba6dfc0b6b1f67.tar.xz |
meta-nuvoton: optee-os: change optee-os load address
For compatible with the newest IGPS 3.9.1 design for new memory map.
We need to change optee-os load address from 0x00100000 to 0x02100000.
Tested: build pass and boot successfully.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ia7fd3184da13daf084fbfa171528a8e953dcc98a
Diffstat (limited to 'meta-nuvoton/dynamic-layers')
-rw-r--r-- | meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/optee-os_3.18.0.bbappend | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/optee-os_3.18.0.bbappend b/meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/optee-os_3.18.0.bbappend index cbcf9512a1..5bc864cf03 100644 --- a/meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/optee-os_3.18.0.bbappend +++ b/meta-nuvoton/dynamic-layers/arm-layer/recipes-security/optee/optee-os_3.18.0.bbappend @@ -1,12 +1,23 @@ SRC_URI:remove:npcm8xx = "git://github.com/OP-TEE/optee_os.git;branch=master;protocol=https" -SRC_URI:remove:npcm8xx = " \ - file://0001-allow-setting-sysroot-for-libgcc-lookup.patch \ - " +SRC_URI:remove:npcm8xx = "file://0003-core-link-add-no-warn-rwx-segments.patch" +SRC_URI:remove:npcm8xx = "file://0004-core-Define-section-attributes-for-clang.patch" +SRC_URI:remove:npcm8xx = "file://0005-core-ldelf-link-add-z-execstack.patch" +SRC_URI:remove:npcm8xx = "file://0006-arm32-libutils-libutee-ta-add-.note.GNU-stack-sectio.patch" SRC_URI:append:npcm8xx = "git://github.com/Nuvoton-Israel/optee_os.git;branch=npcm_3_18;protocol=https" -SRCREV:npcm8xx = "485dc7ac4e4a3f51d86c5b6562e3720a338441c7" +SRCREV:npcm8xx = "57e44ae6b3d6de756da8652ec132ffd7005439b7" + +EXTRA_OEMAKE:append:npcm8xx = " \ + CFG_REE_FS=n \ + CFG_REE_FS_TA=n \ + CFG_RPMB_FS=y \ + CFG_RPMB_TESTKEY=y \ + CFG_RPMB_WRITE_KEY=y \ + CFG_CORE_HEAP_SIZE=524288 \ + CFG_TEE_RAM_VA_SIZE=3145728 \ + " do_deploy:npcm8xx() { install -d ${DEPLOYDIR}/ |