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authorTim Lee <timlee660101@gmail.com>2022-10-28 11:57:26 +0300
committerPatrick Williams <patrick@stwcx.xyz>2022-11-01 19:01:31 +0300
commit9d9d9e37a145014dd6f4ebf5733062f56f9b3c86 (patch)
tree7576eabcfb41a7cd86781d988ef745bd75fee2d8 /meta-nuvoton
parentd9981bf7ca301fa61f2a9a665baddde0ca86cef0 (diff)
downloadopenbmc-9d9d9e37a145014dd6f4ebf5733062f56f9b3c86.tar.xz
meta-phosphor: npcm8xx.bbclass: adjust each image alignment by its definition
Tested: buid pass and boot up successful when loading BB at 0x80000 for example Verified by bootblock log as below: ========== Load bootblock ========== tip_firmware_image_init fiu0 cs0 BOOTBLOCK tag U. scan from 0x80000000 to 0x88000000 tip_firmware_image_scan_flash BOOTBLOCK found addr 0x80080000 dst 0xfffd0000 Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I62eced6d80b48d488348d43468f8f01edf83d79a
Diffstat (limited to 'meta-nuvoton')
-rw-r--r--meta-nuvoton/conf/machine/include/npcm8xx.inc6
1 files changed, 6 insertions, 0 deletions
diff --git a/meta-nuvoton/conf/machine/include/npcm8xx.inc b/meta-nuvoton/conf/machine/include/npcm8xx.inc
index fafa92d9b6..a40e8fb65c 100644
--- a/meta-nuvoton/conf/machine/include/npcm8xx.inc
+++ b/meta-nuvoton/conf/machine/include/npcm8xx.inc
@@ -23,6 +23,12 @@ FLASH_UBI_RWFS_TXT_SIZE ?= "6MiB"
SERIAL_CONSOLES ?= "115200;ttyS0"
+BB_ALIGN ?= "4096"
+ATF_ALIGN ?= "4096"
+OPTEE_ALIGN ?= "4096"
+UBOOT_ALIGN ?= "4096"
+ALIGN_END ?= "4096"
+
SOC_FAMILY = "npcm8xx"
include conf/machine/include/soc-family.inc
MACHINEOVERRIDES .= ":npcm8xx"