diff options
Diffstat (limited to 'meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-sandbox64-add-support-for-NVMXIP-QSPI.patch')
| -rw-r--r-- | meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-sandbox64-add-support-for-NVMXIP-QSPI.patch | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-sandbox64-add-support-for-NVMXIP-QSPI.patch b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-sandbox64-add-support-for-NVMXIP-QSPI.patch new file mode 100644 index 0000000000..941e9d10b8 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/0030-sandbox64-add-support-for-NVMXIP-QSPI.patch @@ -0,0 +1,161 @@ +From 25467e433f02f40f5999ed6e6b0d3adb4c9cf16d Mon Sep 17 00:00:00 2001 +From: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> +Date: Fri, 9 Jun 2023 13:08:37 +0100 +Subject: [PATCH 30/42] sandbox64: add support for NVMXIP QSPI + +enable NVMXIP QSPI for sandbox 64-bit + +Adding two NVM XIP QSPI storage devices. + +Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> +Reviewed-by: Simon Glass <sjg@chromium.org> +Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/c9c2c95d4cd27fe0cd41fe13a863899d268f973c] + +Changelog: +=============== + +v2: + +* address nits +--- + arch/sandbox/dts/sandbox64.dts | 13 +++++++++++++ + arch/sandbox/dts/test.dts | 14 ++++++++++++++ + configs/sandbox64_defconfig | 3 ++- + doc/develop/driver-model/nvmxip.rst | 2 +- + doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt | 6 +++--- + drivers/mtd/nvmxip/nvmxip-uclass.c | 7 +++++++ + 6 files changed, 40 insertions(+), 5 deletions(-) + +diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts +index 3eb0457089..c9a2f4b4a4 100644 +--- a/arch/sandbox/dts/sandbox64.dts ++++ b/arch/sandbox/dts/sandbox64.dts +@@ -89,6 +89,19 @@ + cs-gpios = <0>, <&gpio_a 0>; + }; + ++ nvmxip-qspi1@08000000 { ++ compatible = "nvmxip,qspi"; ++ reg = /bits/ 64 <0x08000000 0x00200000>; ++ lba_shift = <9>; ++ lba = <4096>; ++ }; ++ ++ nvmxip-qspi2@08200000 { ++ compatible = "nvmxip,qspi"; ++ reg = /bits/ 64 <0x08200000 0x00100000>; ++ lba_shift = <9>; ++ lba = <2048>; ++ }; + }; + + #include "sandbox.dtsi" +diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts +index dffe10adbf..c3ba0a225e 100644 +--- a/arch/sandbox/dts/test.dts ++++ b/arch/sandbox/dts/test.dts +@@ -1745,6 +1745,20 @@ + compatible = "u-boot,fwu-mdata-gpt"; + fwu-mdata-store = <&mmc0>; + }; ++ ++ nvmxip-qspi1@08000000 { ++ compatible = "nvmxip,qspi"; ++ reg = <0x08000000 0x00200000>; ++ lba_shift = <9>; ++ lba = <4096>; ++ }; ++ ++ nvmxip-qspi2@08200000 { ++ compatible = "nvmxip,qspi"; ++ reg = <0x08200000 0x00100000>; ++ lba_shift = <9>; ++ lba = <2048>; ++ }; + }; + + #include "sandbox_pmic.dtsi" +diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig +index 4b8a1ec42b..2dca176ae3 100644 +--- a/configs/sandbox64_defconfig ++++ b/configs/sandbox64_defconfig +@@ -260,4 +260,5 @@ CONFIG_UNIT_TEST=y + CONFIG_UT_TIME=y + CONFIG_UT_DM=y + CONFIG_ARM_FFA_TRANSPORT=y +-CONFIG_SANDBOX_FFA=y +\ No newline at end of file ++CONFIG_SANDBOX_FFA=y ++CONFIG_NVMXIP_QSPI=y +\ No newline at end of file +diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst +index 09afdbcccf..e85dc220b9 100644 +--- a/doc/develop/driver-model/nvmxip.rst ++++ b/doc/develop/driver-model/nvmxip.rst +@@ -56,7 +56,7 @@ The implementation is generic and can be used by different platforms. + Supported hardware + -------------------------------- + +-Any 64-bit plaform. ++Any plaform supporting readq(). + + Configuration + ---------------------- +diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt +index cc60e9efdc..882728d541 100644 +--- a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt ++++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt +@@ -16,7 +16,7 @@ If a platform has its own driver, please provide your own compatible + string. + + 2) +- reg = <0x0 0x08000000 0x0 0x00200000>; ++ reg = /bits/ 64 <0x08000000 0x00200000>; + + The start address and size of the flash device. The values give here are an + example (when the cell size is 2). +@@ -43,14 +43,14 @@ Example of multiple flash devices + + nvmxip-qspi1@08000000 { + compatible = "nvmxip,qspi"; +- reg = <0x0 0x08000000 0x0 0x00200000>; ++ reg = /bits/ 64 <0x08000000 0x00200000>; + lba_shift = <9>; + lba = <4096>; + }; + + nvmxip-qspi2@08200000 { + compatible = "nvmxip,qspi"; +- reg = <0x0 0x08200000 0x0 0x00100000>; ++ reg = /bits/ 64 <0x08200000 0x00100000>; + lba_shift = <9>; + lba = <2048>; + }; +diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c +index 9f96041e3d..6d8eb177b5 100644 +--- a/drivers/mtd/nvmxip/nvmxip-uclass.c ++++ b/drivers/mtd/nvmxip/nvmxip-uclass.c +@@ -9,6 +9,9 @@ + #include <common.h> + #include <dm.h> + #include <log.h> ++#if CONFIG_IS_ENABLED(SANDBOX64) ++#include <asm/test.h> ++#endif + #include <linux/bitops.h> + #include "nvmxip.h" + +@@ -36,6 +39,10 @@ static int nvmxip_post_bind(struct udevice *udev) + char bdev_name[NVMXIP_BLKDEV_NAME_SZ + 1]; + int devnum; + ++#if CONFIG_IS_ENABLED(SANDBOX64) ++ sandbox_set_enable_memio(true); ++#endif ++ + devnum = uclass_id_count(UCLASS_NVMXIP); + snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "blk#%d", devnum); + +-- +2.25.1 + |