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This moves the OpenBMC kernel to a Linux v5.3 base.
There are 120 patches in dev-5.3. Of these, 56 are backported from
upstream, leaving 64 out of tree patches.
Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Andrew Jeffery (26):
ARM: dts: aspeed: Describe SD controllers
ARM: dts: aspeed: Enable first MMC slot on AST2500 EVB
ARM: dts: aspeed: Add AST2600 pinmux nodes
net: phy: Add mdio-aspeed
net: ftgmac100: Add support for DT phy-handle property
net: ftgmac100: Select ASPEED MDIO driver for the AST2600
pinctrl: aspeed: Rename pin declaration macros
pinctrl: aspeed: Add PIN_DECL_3() helper
pinctrl: aspeed: Add multiple pin group support for functions
pinctrl: aspeed: Add SIG_DESC_CLEAR() helper
pinctrl: aspeed: Add AST2600 pinmux support
pinctrl: aspeed: Document existence of deprecated compatibles
mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller
mmc: sdhci-of-aspeed: Drop redundant assignment to host->clock
mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()
mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESS
dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
pmbus (max31785): Add support for devicetree configuration
pmbus (core): One-shot retries for failure to set page
pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
soc: aspeed: Miscellaneous control interfaces
ARM: dts: aspeed: witherspoon: Update max31785 node
ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
ARM: dts: ast2600-evb: eMMC configuration
Andrew Peng (1):
ARM: dts: aspeed: Add Lenovo Hr855xg2 BMC
Ben Pai (1):
ARM: dts: aspeed: Add Mihawk BMC platform
Cédric Le Goater (11):
mtd: spi-nor: aspeed: use command mode for reads
mtd: spi-nor: aspeed: add support for SPI dual IO read mode
mtd: spi-nor: aspeed: link controller with the ahb clock
mtd: spi-nor: aspeed: optimize read mode
mtd: spi-nor: aspeed: limit the maximum SPI frequency
/dev/mem: add a devmem kernel parameter to activate the device
ARM: dts: aspeed: Add "spi-max-frequency" property
mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
mtd: spi-nor: aspeed: add support for the 4B opcodes
David S. Miller (1):
ftgmac100: Fix build.
Eddie James (4):
ARM: dts: aspeed: swift: Change power supplies to version 2
pmbus: (ibm-cffps) Add support for version 2 of the PSU
i2c: aspeed: Add AST2600 compatible
ARM: dts: aspeed: tacoma: Enable I2C busses
Fran Hsu (4):
ARM: dts: nuvoton: Add NPCM730 common device tree
ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree.
ARM: dts: nuvoton: Add GPIOs and LEDs to GSJ device tree
George Hung (2):
dt-binding: edac: add NPCM ECC documentation
edac: npcm: Add Nuvoton NPCM7xx EDAC driver
Hongwei Zhang (1):
ARM: dts: aspeed: Add SGPM pinmux
Ivan Mikhaylov (2):
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
Jae Hyun Yoo (11):
dt-bindings: Add a document of PECI subsystem
peci: Add support for PECI bus driver core
dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
dt-bindings: mfd: Add a document for PECI client MFD
mfd: intel-peci-client: Add PECI client MFD driver
Documentation: hwmon: Add documents for PECI hwmon client drivers
hwmon: Add PECI cputemp driver
hwmon: Add PECI dimmtemp driver
Add maintainers for the PECI subsystem
ARM: dts: aspeed: peci: Add PECI node
Joel Stanley (19):
ARM: aspeed: Select timer in each SoC
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Enable SMP boot
ARM: configs: aspeed: Refresh defconfigs
ARM: configs: aspeed_g5: Enable AST2600
ARM: dts: aspeed: swift: Add eMMC device
ARM: dts: aspeed-g4: Add all flash chips
ARM; dts: aspeed: mihawk: File should not be executable
clk: aspeed: Add SDIO gate
clk: aspeed: Move structures to header
clk: Add support for AST2600 SoC
ARM: dts: aspeed: Add AST2600 and EVB
ARM: dts: aspeed-g4: Expose SuperIO scratch registers
fsi: Add ast2600 master driver
ARM: dts: aspeed-g6: Describe FSI masters
ARM: dts: aspeed: ast2600evb: Enable FSI master
ARM: dts: aspeed: Add Tacoma machine
ARM: config: aspeed: Update defconfigs
ARM: dts: aspeed-g6: Add i2c buses
John Wang (1):
ARM: dts: aspeed: fp5280g2: Fix power supply address
Linus Walleij (3):
gpio: aspeed: Pass irqchip when adding gpiochip
gpio: tqmx86: Pass irqchip when adding gpiochip
gpio: Initialize the irqchip valid_mask with a callback
Matt Spinler (1):
ARM: dts: aspeed: swift: Fix FSI GPIOs
Nathan Chancellor (1):
pinctrl: aspeed: g6: Remove const specifier from aspeed_g6_sig_expr_set's ctx parameter
Oscar A Perez (1):
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
Rashmica Gupta (5):
gpio/aspeed: Fix incorrect number of banks
gpio: aspeed: Setup irqchip dynamically
gpio: aspeed: Use ngpio property from device tree if available
gpio: aspeed: Add in ast2600 details to Aspeed driver
ARM: dts: aspeed-g6: Add gpio devices
Ryan Chen (1):
watchdog: aspeed: Add support for AST2600
Tao Ren (3):
ARM: dts: aspeed: Add Facebook Minipack BMC
ARM: dts: aspeed: Add Facebook Wedge40 BMC
ARM: dts: aspeed: Add Facebook Wedge100 BMC
Tomer Maimon (15):
dt-binding: spi: add NPCM FIU controller
spi: npcm-fiu: add NPCM FIU controller driver
clk: nuvoton: add npcm750 clock function prototype initialization
dt-bindings: i2c: npcm7xx: add binding for i2c controller
i2c: npcm: driver for Poleg i2c controller
dt-binding: bmc: Add NPCM7xx LPC BPC documentation
misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
dt-binding: bmc: add npcm7xx pci mailbox document
misc: mbox: add npcm7xx pci mailbox driver
dt-binding: net: document NPCM7xx EMC DT bindings
net: npcm: add NPCM7xx Ethernet MAC controller
dt-binding: peci: add NPCM PECI documentation
peci: npcm: add NPCM PECI driver
ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
ARM: dts: npcm7xx: Update device tree
Vijay Khemka (3):
ARM: dts: aspeed: tiogapass: Add VR devices
ARM: dts: aspeed: tiogapass: Move battery sensor
ARM: dts: aspeed: tiogapass: Add Riser card
Wei Yongjun (1):
mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()
William A. Kennington III (1):
ARM: configs: aspeed: Enable commonly used network functionality
(From meta-aspeed rev: cacd5220e022dbe97ce6679838407565ed5f5df5)
Change-Id: Ic30ef008a68198c0e0c5a3764b356b7f7c59b2db
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Chia-Wei, Wang (3):
ast2600: add CA7 cache and SRAM parity check
ast2600: revise the boot initialization flow
wdt: aspeed: fix compile warning
Dylan Hung (7):
[update] revise memory reservation
[debug] apply DDR4 100M setting
[update] add config for DDR-400
[update] slower HPLL
[update] adjust cpu timer according to the HPLL
[update] fine tune DDR-PHY param
[fix] fix DDR-PHY training hangup
ryan_chen (6):
update pcie driver
add pcie rc pinctrl
add two pcie rc
add support two
add default pcie at ast2600-evb dts
update ast2600 fmc interrupt #no
(From meta-aspeed rev: 7daf7145abdd5499da5ebb25f4f214712b596562)
Change-Id: I0cf2c21a605683472f9dcdc4516d7c4f5d7858e5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The Aspeed u-boot tree has the g6 environment at 640KiB. Move to 512KiB
for easy OpenBMC compatibility.
(From meta-aspeed rev: 5b6780e9810f79b352db7ae8c6a352d978ef2cd3)
Change-Id: I65a8c799eb1db8756516a4f46098c75ee18751d1
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Linus Walleij (1):
gpio: aspeed: Pass irqchip when adding gpiochip
Rashmica Gupta (6):
gpio/aspeed: Fix incorrect number of banks
dt-bindings: gpio: aspeed: Update documentation with ast2600 controllers
gpio/aspeed: Setup irqchip dynamically
gpio/aspeed: Use ngpio property from device tree if available
gpio: Add in ast2600 details to Aspeed driver
ARM: dts: aspeed-g6: Add gpio devices
(From meta-aspeed rev: 3b101c7f2c10b43576e2770bc2eceb860d0f5660)
Change-Id: I56b71ef33fc6c941fedc8823cd1c9a3ea135e82c
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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A typo in the UBOOT_LOADADDRESS line for g6 prevented the FIT image from
properly be loaded by U-Boot. This change makes sure that the FIT image
is properly generated so U-Boot can load it to the right address.
Tested: Build, inspected, and booted the FIT image.
(From meta-aspeed rev: 12cd1d2b96db78ca4a34751c92d63cb6212228be)
Change-Id: Idad7ff047c29699a7cfb80c186e418183ca126f3
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.12, 5.2.13 and 5.2.14
stable releases.
(From meta-aspeed rev: 00d55503b465963ef43b7a52dc05c93ce1cec078)
Change-Id: I03164c88f5fe1da9c4ea2bc0b12a3245f74cdab0
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Eddie James (2):
ARM: dts: aspeed: swift: Change power supplies to version 2
pmbus: (ibm-cffps) Add support for version 2 of the PSU
Ivan Mikhaylov (2):
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
Joel Stanley (2):
ARM: dts: aspeed-g4: Add all flash chips
ARM; dts: aspeed: mihawk: File should not be executable
Oscar A Perez (1):
ARM: dts: aspeed-g5: Fix gpio-ranges upper limit
(From meta-aspeed rev: ad85989273a1e9f934f17433959d04f7f13b354f)
Change-Id: I3759b4fff70cc45f46eaf0c023888ac9bbfe0316
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.9, 5.2.10 and 5.2.11
stable releases.
(From meta-aspeed rev: 796411974f82c42b7af53b15bc99a7c27cf7605c)
Change-Id: Iddbea8fd2def7ccb4fc9bd1520c3b67d63f8b7eb
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Chia-Wei, Wang (1):
aspeed: ast2600: add CPU clock initialization
Dylan Hung (9):
[add] add ECC setting
[update] correct the ecc range
[fix] fix build error when ASPEED_ECC is off
[update] ecc off by default
[update] add ECC enable message
target margin 0 is legal arg.
[fix] fix incorrect DMA base calculation
[update] fix 2600 fpga issue.
[update] update ast2600 fpga config
ryan_chen (8):
add otp strap bspi size info
add pcie support for evb
add for spi aux information
disable h2x pcie at default
add for h2x
add i2c pinctrl
add i2c pinctrl
update enable ast2600 evb i2c
(From meta-aspeed rev: af1e9221445c4932ead0722287873686fe86b399)
Change-Id: I1bfcad52dbd0a27f0e753c8c14d22584156f02b5
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (6):
pinctrl: aspeed: Fix spurious mux failures on the AST2500
mmc: sdhci-of-aspeed: Drop redundant assignment to host->clock
mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()
mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK
ARM: dts: ast2600-evb: eMMC configuration
mmc: sdhci-of-aspeed: Depend on CONFIG_OF_ADDRESS
Joel Stanley (1):
ARM: dts: aspeed: Add Tacoma machine
Wei Yongjun (1):
mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()
(From meta-aspeed rev: 02f7b82e4a48b109d49633358a7d306d9f9efaf8)
Change-Id: I31d6b9b91c8845ffb15fbb43d7503d3ee5ac54da
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The SDK kernel recipe is no longer used. Drop.
(From meta-aspeed rev: ebcb70ef8ca1aaf74dbd13c6c1cba9591e889f39)
Change-Id: I9a41eb3302bfcce9618036d4ed1ebf1525e1afa3
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Switch g6 to the same kernel as the other supported chips (g4 and g5).
(From meta-aspeed rev: f28c73a9f2e0296c1730b88afdc6cf0c836d08fa)
Change-Id: I659e535ccb4642438b9c10c48a4850d67b28982b
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This variable is unused. Drop.
(From meta-aspeed rev: 283c6db2d5b4dfcfa2c1635f7f4180b2ca07bf9a)
Change-Id: I20f37964971717aaa8f79bfb5a7fe381dff5b7e6
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (3):
net: phy: Add mdio-aspeed
net: ftgmac100: Add support for DT phy-handle property
net: ftgmac100: Select ASPEED MDIO driver for the AST2600
(From meta-aspeed rev: d43a9b7ca84706b6b62d287a9bbe1f64f956317a)
Change-Id: Ief9b513bbbadc0e868673c7d3b4595d64120939d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Andrew Jeffery (13):
dt-bindings: mmc: Document Aspeed SD controller
mmc: Add support for the ASPEED SD controller
ARM: dts: aspeed: Describe SD controllers
pinctrl: aspeed-g5: Delay acquisition of regmaps
pinctrl: aspeed: Rename pin declaration macros
pinctrl: aspeed: Add PIN_DECL_3() helper
pinctrl: aspeed: Add multiple pin group support for functions
pinctrl: aspeed: Add SIG_DESC_CLEAR() helper
pinctrl: aspeed: Add AST2600 pinmux support
pinctrl: aspeed-g6: Fix I2C14 function name typo
pinctrl: aspeed-g6: Fix mislabeled PWM groups and functions
pinctrl: aspeed-g6: Add EMMC pin group
ARM: dts: aspeed: Add AST2600 pinmux nodes
Joel Stanley (12):
ARM: dts: aspeed: swift: Add eMMC device
dt-bindings: watchdog: Add ast2600 compatible
clk: aspeed: Move structures to header
clk: Add support for AST2600 SoC
ARM: aspeed: Select timer in each SoC
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Enable SMP boot
ARM: dts: aspeed: Add AST2600 and EVB
ARM: configs: aspeed_g5: Enable AST2600
fsi: Add ast2600 master driver
ARM: dts: aspeed-g6: Describe FSI masters
ARM: dts: aspeed: ast2600evb: Enable FSI master
Ryan Chen (1):
watchdog: aspeed: Add support for AST2600
YueHaibing (1):
pinctrl: aspeed: Make aspeed_pinmux_ips static
(From meta-aspeed rev: 40df7ebc32ddecc28126c3726c79b25fe1b0feb2)
Change-Id: I005c90c8106f3857e45ada4ac93456b3665b20b3
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.9 stable release.
(From meta-aspeed rev: 1c40bb93826342f5cc5548c1138ddd5cceec4082)
Change-Id: If328eb95f450f4932fb21375b44669a77aa7bf73
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes a fix to the bootm limit issue so the patch can be
removed. It also addresses other issues, such as an updated SMP
handshake and booting larger kernels.
(From meta-aspeed rev: 921779183e3d57dbfddc9179f6b8fc413b453553)
Change-Id: I5575ac0a7d0f72fa97b3aa6c580bdacc84ac619d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Eddie James (1):
fsi: scom: Don't abort operations for minor errors
John Wang (1):
ARM: dts: aspeed: fp5280g2: Fix power-supply addr
(From meta-aspeed rev: e2e31bef2b742610e6174d0fe31df3667a6a6a00)
Change-Id: If24b279669c7a57dc2e632fa63df77cbdd0df08d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Pull the latest g6 defconfig from upstream.
(From meta-aspeed rev: 1b35d5ceda48ad13b0ec238777e0833f0e7d538b)
Change-Id: I14d0c3a02c3989b5eddef32a86e07ad447f6ac70
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The u-boot config is a property of the board and not the SOC. Don't set
a default in the g4 and g5 include files. This ensures that BSP users
explicitly select a uboot config capable of booting the board.
(From meta-aspeed rev: 6203fbdba652e2f7943b55b067b2e91247c795e1)
Change-Id: I7b07019eb7428d8c38268e8dbed0ff5d05f3a7a2
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Instead of setting MACHINE_EXTRA_RDEPENDS in each SOC specific include
file, just set it once in aspeed.inc.
Use MACHINE_EXTRA_RRECOMMENDS as the udev rule is definitely not
required and should be removable via BAD_RECOMMENDATIONS.
(From meta-aspeed rev: 672366760cccfe5bf2e734939ec21c90482e298f)
Change-Id: I42091a522b346fe07511e16439438a73d0c9be6c
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Move most settings from the ast2xxx.inc files to aspeed.inc. This seems
to be how other BSPs do it (e.g. meta-freescale) and it keeps everying
in one consolidated location for easy perusal, comparison, etc. bitbake
will take a different path through it's code while parsing but we wind
up with the exact same variable settings in the end.
Remove worthless comments from ast2xxx.inc file headers.
(From meta-aspeed rev: 456a28202671507ca91b35103a13d3a1dac695db)
Change-Id: Id8ed034350761770f5dae4d1a0adecc9bcfea3b5
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Use the correct tune for the g6 arm core: vfpv4d16
(From meta-aspeed rev: 8f80491f1d58fbe94ef1d32aba45789aee549cec)
Change-Id: I06b7b982c9064edd7369e947cc9e41e2e39a50ed
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Provide a default setting for SERIAL_CONSOLES for all Aspeed SOCs.
Set the SERIAL_CONSOLE for the g5 and g6 evb explicitly, in case the
default changes.
(From meta-aspeed rev: b539e873a7731bad9eee83e17838a78f281d7b4b)
Change-Id: I1ee9f44535cd009de25baccacada36cd58ad4f10
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Add a simple image-like recipe that concatenates uboot and the kernel
into a single image file, suitable for flashing and booting Aspeed
boards. There is no root filesystem beyond what is packaged with the
kernel.
(From meta-aspeed rev: 4fa991532b316daab71ba7b96f2ba099487b3f13)
Change-Id: I7a9c26423a0e1db7a4568d00cbabef7b9d22c75a
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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oe-core has these defaults:
KERNEL_IMAGETYPE: "zimage"
KERNEL_CLASSES: "kernel-uimage"
INITRAMFS_IMAGE: ""
INITRAMFS_FSTYPES: "cpio.gz"
Override those defaults with Aspeed specific defaults that are more
appropriate to the current state of typical usage (FIT) of Aspeed chips:
KERNEL_IMAGETYPE: "fitImage"
KERNEL_CLASSES: "kernel-fitimage"
INITRAMFS_IMAGE: "aspeed-image-initramfs"
INITRAMFS_FSTYPES: "cpio.xz"
By default use aspeed-image-initramfs in the FIT image.
aspeed-image-initramfs is just an alias to core-image-minimal. The
alias is required because vanilla core-image-minimal is not an initramfs
image recipe...in oe, in general, the usage of the image recipe
(initramfs or not) is baked into the recipe itself with a line like:
IMAGE_FSTYPES = "${INITRAMFS_FSTYPES}"
The same behavior *could* be obtained with a bbappend but that then
prevents users from using the original image recipe as a real root
filesystem image in their setups.
Perhaps at a later time a replacement image with an Aspeed hardware
evaluation kit theme would be a more suitable default.
(From meta-aspeed rev: 7639df3650f6d91c9b533e0287142fdcfbc0b2ea)
Change-Id: I51def69bcfd786f4c8aad2ae68376da335aad039
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.8 stable release.
(From meta-aspeed rev: ed265fd68672f724273fee1f40fe491dc864a9cb)
Change-Id: Ifdb7f5c68f8175d69bd2c3716a240b0eb70d485d
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Ben Pai (1):
ARM: dts: aspeed: Add Mihawk BMC platform
(From meta-aspeed rev: 5d8277353761c4c371ff2512e5f4bebf0487f35a)
Change-Id: I924f0479d58e544c04fd30bc1cd2da2a472f8ef7
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.2 through to 5.2.7
stable releases.
(From meta-aspeed rev: 69309da3d90ad2adb3daaffe848c3c34b783a760)
Change-Id: I8a74bf7227b6c262973f874f62f1ca387c987b15
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.2.1 stable release.
The i2c fix removes is required to support existing Qemu models, as we
do not yet have buffer mode support in qemu.
Joel Stanley (2):
i2c: aspeed: Update to v3 of buffer and dma support
Revert "ARM: dts: aspeed: add I2C buffer mode support"
Matt Spinler (1):
ARM: dts: aspeed: swift: Fix FSI GPIOs
(From meta-aspeed rev: 514754f760977d44f1131d908e4755c846f61745)
Change-Id: Ie618b11b4cdea5a73d79eaefa0bb5b1adc55a05f
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This patch has been submitted to aspeed.
(From meta-aspeed rev: d537df871b467808a6ff3f08d596f6d9a2f52dde)
Change-Id: I6d4e68e275c24b3f5bbbf9b1b836ac2a04e5cd4f
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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The ast2600 device tree uses the DesignWare 8250 compatible, so we need
this enabled in order to get a console.
(From meta-aspeed rev: 6c75c8c96d409e3419a93c64cac77a766d75fe54)
Change-Id: I800cf13c52f1d297ee541daf8ab0db0633d455be
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Highmem is needed for the kernel to be able to use the full 2GB of RAM
in the EVB. Earlyprintk is there for debugging boot failures.
Enable DETECT_HUNG_TASK for extra debugability.
(From meta-aspeed rev: 4f48b871ef98d27540ea526eef215e52dff4a58f)
Change-Id: I628b47bdca80efa7be1af3f2ac87a70e701c245a
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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(From meta-aspeed rev: d6af3ce42681edb8231e4550073a02cea24621e4)
Change-Id: I32fdc45dc1a885c362467d9e6db5a7a794430676
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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(From meta-aspeed rev: fb54525540953435683dcc3bee915123e25a1a8b)
Change-Id: I3dcce46f6f18ea9cf24a8b53b6f79a9899e7d6c8
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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This patch is required to boot on the ast2600evb which has 2GB of RAM.
It has been submitted to aspeed for inclusion in their tree.
(From meta-aspeed rev: 229a6556b33641bdfc770eb9566b3db3ce01354c)
Change-Id: Ic2605f6634c82bcf8c1f0d5e166fea88ff7722d4
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
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Add base configuration metadata for the Aspeed AST2600 and its
evaluation board.
Initially point at the Aspeed SDK until kernel and u-boot support is
added upstream.
(From meta-aspeed rev: 2f128068bc3b7705071868176624ef19a9000750)
Change-Id: Id8636520815a2cf98f8a801f6a2241387e4a8231
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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The Aspeed SDK is intended to be used as the basis for Aspeed G6 bringup.
(From meta-aspeed rev: c8f6c5e384a9ffc547bb31a25ecb0bfb0a79a61f)
Change-Id: Ieef79c3c76017f33d980d8926291abf41363d987
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Start by copying oe-core recipes-bsp/u-boot/ into the Aspeed BSP. The
uboot recipes in oe-core master currently point to 2019.07 u-boot and
the Aspeed SDK branch being pointed to by this patch is based on uboot
upstream 2019.04. There weren't any changes in oe-core going from
2019.04 to 2019.07 so thats OK.
After copying the oe-core recipes, fix up SRC_URI, HOMEPAGE, and a
couple other variables to point at the Aspeed u-boot fork.
The current aspeed-master-v2019.04 tip and evb-ast2600_defconfig will produce
a uboot binary but make returns non-zero:
CFGCHK u-boot.cfg
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_RAM
Please add these via Kconfig instead. Find a suitable Kconfig
file and add a 'config' or 'menuconfig' option.
make: *** [Makefile:1010: all] Error 1
As such the utility of this recipe is limited until the above issue is
addressed.
The Aspeed SDK is intended to be the basis for Aspeed G6 bringup.
(From meta-aspeed rev: fe03326ee328718a79138062a0db374c0685a9c7)
Change-Id: I266dc10dd8549c024ec7012da5e576a2436d195b
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Leave KMACHINE at the OE-core default. It is only used by the
kernel-yocto bitbake class when dealing with kernel source trees like
the Yocto kernel fork that include KERNEL_FEATURES metadata right in the
source tree. None of the Aspeed trees do that.
Don't set FLASH_SIZE. It isn't an OE-core variable and it isn't used
anywhere.
(From meta-aspeed rev: 798e4360c387b12e6bd190c5e526edc1cd75521d)
Change-Id: I4a68fa98108014b8517d0417357060a8fc4e7aae
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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From the manual on LAYERSERIES_COMPAT:
Lists the versions of the OpenEmbedded-Core for which a layer is
compatible. Using the LAYERSERIES_COMPAT variable allows the layer
maintainer to indicate which combinations of the layer and OE-Core can
be expected to work. The variable gives the system a way to detect when
a layer has not been tested with new releases of OE-Core (e.g. the layer
is not maintained).
Noone is testing OE-core thud + meta-aspeed master, so take the safe
route and don't advertise support. For compatibility with OE-core thud,
use the thud branch of meta-aspeed.
(From meta-aspeed rev: 47d59dc9e3944127b91c89f6745da55eb12bdbfa)
Change-Id: I11dc3c5bd285e2bc9c6b7226b8dda757f3705db7
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Add a minimal sample local.conf and bblayers.conf to enable easy build
setup:
TEMPLATECONF=meta=aspeed/conf . oe-init-build-env
(From meta-aspeed rev: fdcd3979b7a1beaef7b832ddc74648226008317a)
Change-Id: I6d62b6e7b1ef7e874178ce52979f522e103ab332
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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There currently aren't any usable targets provided with meta-aspeed.
Typical OE BSP layers provide reference metadata for evaluation boards.
Provide one for the AST2500 evaluation board.
Typical BSPs also provide an image class that produces images usable on
the target hardware. meta-aspeed doesn't have one (yet), so although
baking an image (e.g. core-image-minimal) will now work, it will not
produce images usable with actual Aspeed hardware.
(From meta-aspeed rev: 720fcee6f9dc78ed46b4641de6f2fb0054a6da44)
Change-Id: I3419d448b05aa7c72b77224e44050ca63ec20f12
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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(From meta-aspeed rev: 89362f7e06b1b3766d359694ee9a907ae769d35d)
Change-Id: Ia83eea11281f387451c3ee17ba62ae15b068dd52
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This is a noop regeneration of the defconfigs. Options have been removed
from the upstream kernel, made defaults (such as the OCC option), and
re-ordered.
(From meta-aspeed rev: f4fa60b9ef4e0d83ac0923162b59f385bd12844f)
Change-Id: I10d637463d5f69de4a58e1f19371286800fc80dc
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This updates OpenBMC to the upstream v5.2 release. There are 100 patches
carried in the openbmc tree, 58 of which are staged for inclusion in
5.3.
Adriana Kobylak (2):
ARM: dts: aspeed: Add Swift BMC machine
ARM: dts: aspeed: swift: Add pca9539 devices
Alexander Amelkin (1):
mtd: spi-nor: fix options for mx66l51235f
Alexander Filippov (1):
ARM: dts: aspeed: Add YADRO VESNIN BMC
Alexander Soldatov (1):
hwmon (occ): Add temp sensor value check
Andrew Jeffery (16):
dt-bindings: pinctrl: aspeed: Split bindings document in two
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
MAINTAINERS: Add entry for ASPEED pinctrl drivers
pinctrl: aspeed: Correct comment that is no longer true
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Add implementation-related documentation
dt-bindings: hwmon: pmbus: Add Maxim MAX31785 documentation
pmbus (max31785): Add support for devicetree configuration
pmbus (core): One-shot retries for failure to set page
pmbus (core): Use driver callbacks in pmbus_get_fan_rate()
pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers
soc: aspeed: Miscellaneous control interfaces
ARM: dts: aspeed: witherspoon: Update max31785 node
ARM: dts: aspeed-g5: Expose VGA and SuperIO scratch registers
Andrew Peng (1):
ARM: dts: aspeed: Adding Lenovo Hr630 BMC
Benjamin Herrenschmidt (1):
ARM: dts: aspeed: Add Power9 and Power9 CFAM description
Christopher Bostic (1):
iio: dps310: Temperature measurement errata
Cédric Le Goater (11):
mtd: spi-nor: aspeed: use command mode for reads
mtd: spi-nor: aspeed: add support for SPI dual IO read mode
mtd: spi-nor: aspeed: link controller with the ahb clock
mtd: spi-nor: aspeed: optimize read mode
mtd: spi-nor: aspeed: limit the maximum SPI frequency
/dev/mem: add a devmem kernel parameter to activate the device
ARM: dts: aspeed: Add "spi-max-frequency" property
mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper
mtd: spi-nor: aspeed: clarify 4BYTE address mode mask
mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer
mtd: spi-nor: aspeed: add support for the 4B opcodes
Eddie James (4):
ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
iio: dps310: Add pressure sensing capability
OCC: FSI and hwmon: Add sequence numbering
fsi: sbefifo: Don't fail operations when in SBE IPL state
Fran Hsu (4):
ARM: dts: nuvoton: Add NPCM730 common device tree
ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrl
ARM: dts: nuvoton: Add Quanta GSJ BMC Device Tree.
ARM: dts: nuvoton: Add GPIOs and LEDs to GSJ device tree
George Hung (2):
dt-binding: edac: add NPCM ECC documentation
edac: npcm: Add Nuvoton NPCM7xx EDAC driver
Hongwei Zhang (1):
ARM: dts: aspeed: Add Microsoft Olympus BMC
Jae Hyun Yoo (22):
media: aspeed: fix a kernel warning on clk control
media: aspeed: refine clock control logic
media: aspeed: change irq to threaded irq
media: aspeed: remove IRQF_SHARED flag
media: aspeed: reduce noisy log printing outs
media: aspeed: remove checking of VE_INTERRUPT_CAPTURE_COMPLETE
media: aspeed: refine interrupt handling logic
media: aspeed: remove source buffer allocation before mode detection
media: aspeed: use different delays for triggering VE H/W reset
media: aspeed: add a workaround to fix a silicon bug
dt-bindings: Add a document of PECI subsystem
Documentation: ioctl: Add ioctl numbers for PECI subsystem
peci: Add support for PECI bus driver core
dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs
peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx
dt-bindings: mfd: Add a document for PECI client MFD
mfd: intel-peci-client: Add PECI client MFD driver
Documentation: hwmon: Add documents for PECI hwmon client drivers
hwmon: Add PECI cputemp driver
hwmon: Add PECI dimmtemp driver
Add maintainers for the PECI subsystem
ARM: dts: aspeed: peci: Add PECI node
Jeremy Kerr (1):
fsi/core: Fix error paths on CFAM init
Joel Stanley (5):
ARM: dts: aspeed: Rename flash-controller nodes
iio: Add driver for Infineon DPS310
soc: aspeed: lpc-ctrl: Fix probe error handling
ARM: dts: aspeed-g4: Expose SuperIO scratch registers
ARM: config: aspeed: Update defconfigs
John Wang (1):
ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
Lei YU (1):
hwmon (occ): Fix division by zero issue
Maxim Sloyko (1):
ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
Oliver O'Halloran (1):
i2c: fsi: Create busses for all ports
Patrick Venture (2):
ARM: dts: aspeed: Add aspeed-p2a-ctrl node
ARM: dts: aspeed: quanta-q71: Enable p2a node
Robert Lippert (2):
ARM: dts: aspeed: zaius: update 12V brick I2C address
ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
Tao Ren (2):
ARM: dts: aspeed: cmm: enable ehci host controllers
ARM: dts: aspeed: Add Facebook YAMP BMC
Tomer Maimon (15):
clk: nuvoton: add npcm750 clock function prototype initialization
dt-binding: mtd: add NPCM FIU controller
mtd: spi-nor: add NPCM FIU controller driver
dt-bindings: i2c: npcm7xx: add binding for i2c controller
i2c: npcm: driver for Poleg i2c controller
dt-binding: bmc: Add NPCM7xx LPC BPC documentation
misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver
dt-binding: bmc: add npcm7xx pci mailbox document
misc: mbox: add npcm7xx pci mailbox driver
dt-binding: net: document NPCM7xx EMC DT bindings
net: npcm: add NPCM7xx Ethernet MAC controller
dt-binding: peci: add NPCM PECI documentation
peci: npcm: add NPCM PECI driver
ARM: configs: add defconfig for Nuvoton NPCM7xx BMC
ARM: dts: npcm7xx: Update device tree
Vijay Khemka (1):
soc: aspeed: lpc-ctrl: make parameter optional
(From meta-aspeed rev: a83505d583b46be0523db03bf5bfdff2a5f6df9f)
Change-Id: I0b5ee194f658657230ab1bf880990157f15dde09
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.1.16 stable release.
(From meta-aspeed rev: 1f6f2db032b5e1d0bae6097bbccd8fd11f2d52c1)
Change-Id: I4714d488a1db5d5f1a4287762b1d4f15402de1de
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Two bug fixes for fsi, and some cleanups for pinctrl.
Andrew Jeffery (8):
dt-bindings: pinctrl: aspeed: Split bindings document in two
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
MAINTAINERS: Add entry for ASPEED pinctrl drivers
pinctrl: aspeed: Correct comment that is no longer true
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Add implementation-related documentation
Eddie James (1):
OCC: FSI and hwmon: Add sequence numbering
Jeremy Kerr (1):
fsi/core: Fix error paths on CFAM init
(From meta-aspeed rev: 5376bea182380b45a1ddacff82fbdd7d738e372a)
Change-Id: I864f55798c4f625594bf0370f2b2827de1c7117e
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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Not all BMCs use USB host features so this commit removes USB host
features from defconfig so that the features can be enabled in each
machine layer when those are actually needed.
(From meta-aspeed rev: 679e60064113e89d18528ed65d75daf97547a5f1)
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Change-Id: I9c24fa9d381c81df51e148aacafad1c4a8af49e9
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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This includes security and bug fixes from the 5.1.13, 5.1.14 and 5.1.15
stable releases.
(From meta-aspeed rev: ca8fb5cd88aeae5a7c3215523638bb31d857e81a)
Change-Id: Ie0a817513543ae6d20106f72ee2c097b37aab123
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
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