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2023-02-10meta-bletchley: add 99-platform-initPotin Lai2-0/+25
Add 99-platform-init to archive following items 1. Disable FMC_WDT2 AST2600 use FMC_WDT2 to archive ABR feature. Disable FMC_WDT2 before systemd start. 2. Detect boot flash source Write boot source into /run/media/slot 0: boot from primary 1: boot from alternate Tested result: - In u-boot, FMC_WDT2 is enabled and timer is counting down ``` U-Boot 2019.04 (Nov 10 2022 - 00:12:58 +0000) SOC: AST2620-A3 RST: WDT1 SOC PCI RST: #2 RST: External FMC 2nd Boot (ABR): Enable, Dual flashes, Source: Primary Set FMC_WDT2 timer reload value to 0x0BB8 eSPI Mode: SIO:Enable : SuperIO-2e Eth: MAC0: RMII/NCSI, MAC1: RMII/NCSI, MAC2: RGMII, MAC3: RMII/NCSI Model: Facebook Bletchley BMC DRAM: already initialized, 2 GiB (capacity:2048 MiB, VGA:0 MiB, ECC:off) MMC: Loading Environment from SPI Flash... SF: Detected w25q01jv with page size 256 Bytes, erase size 4 KiB, total 128 MiB *** Warning - bad CRC, using default environment In: serial@1e784000 Out: serial@1e784000 Err: serial@1e784000 Model: Facebook Bletchley BMC Net: Could not get PHY for eth2: addr 0 Failed to initialize PHY: -19 eth-1: ftgmac@1e670000 Hit any key to stop autoboot: 0 ast# md.l 0x1e620064 2 1e620064: 00000001 0b560bb8 ......V. ``` - After BMC boot into Linux OS, FMC_WDT2 is disabled ``` bletchley login: root Password: root@bletchley:~# devmem 0x1e620064 0x00000000 root@bletchley:~# devmem 0x1e620068 0x0BB80BB8 ``` - check boot source (primary) ``` root@bletchley:~# cat /run/media/slot 0 ``` Signed-off-by: Potin Lai <potin.lai@quantatw.com> Change-Id: If5e41dd9745ba5c4ec45637772136e847954c56e