From 4c19ea120a3e7a73dc8470c86744bc95997f1c90 Mon Sep 17 00:00:00 2001 From: Andrew Geissler Date: Tue, 27 Oct 2020 13:52:24 -0500 Subject: poky: subtree update:ad30a6d470..7231c10430 Akira Shibakawa (3): License-Update: attr: Add a missing file to LIC_FILES_CHKSUM. License-Update: kmod: Add a missing file to LIC_FILES_CHKSUM. License-Update: gdk-pixbuf: Fix LICENSE. Alejandro Hernandez Samaniego (1): baremetal-helloworld: Fix install path since S doesnt have a trailing slash Alexander Kanavin (4): ncurses: only include upstream releases in version check python3: fix upstream version check boost-build-native: fix upstream version check selftest/virgl: drop the custom 30 sec timeout Alistair (1): weston-init: Allow setting idle time to 0 Changqing Li (1): toolchain-shar-extract.sh: don't print useless info Charlie Davies (1): bitbake: bitbake: fetch/git: use shlex.quote() to support spaces in SRC_URI url Chen Qi (2): watchdog: use /run instead of /var/run in systemd service file cups: use /run instead /var/run in systemd's unit file David Reyna (1): bitbake: toaster: Enable Gatesgarth branch in place of Zeus Douglas Royds (1): externalsrc: No single-task lock if S != B Joshua Watt (2): ref-variables: Given example for naming sources ref-manual: Document wic --offset option Khairul Rohaizzat Jamaluddin (1): imagefeatures: New test case, test_empty_image, added Khem Raj (5): autotools.bbclass: Order CONFIG_SHELL before CACHED_CONFIGUREVARS boost: Fix build on 32-bit arches with 64bit time_t only mesa: Fix build on 32bit arches supporting 64bit time_t only packagegroup-core-tools-debug: Disable for rv32/glibc as well packagegroup-core-tools-profile: Remove lttng-tools and perf for rv32/glibc Konrad Weihmann (1): lib/oe/rootfs: introduce IMAGE_LOG_CHECK_EXCLUDES Lee Chee Yang (2): libproxy: fix CVE-2020-25219 grub2: fix CVE-2020-10713 Martin Jansa (11): tune-cortexa76ae.inc: Correct TUNE_FEATURES arch-armv7a.inc: fix typo arch-mips.inc: remove duplicated mips64el-o32 from PACKAGE_EXTRA_ARCHS_tune-mips64el-o32 arch-arm64.inc: don't append _be to ARMPKGARCH for tune-aarch64_be tune-mips64r6.inc: fix typo in mipsisa64r6-nf tune-ep9312.inc: add t suffix for thumb to PACKAGE_EXTRA_ARCHS_tune-ep9312 tune-riscv.inc: use nf suffix also for TUNE_PKGARCH tune-supersparc.inc: remove tune-thunderx.inc: don't append _be to ARMPKGARCH for tune-thunderx_be siteinfo: Recognize 32bit PPC LE siteinfo: Recognize bigendian sh3be and sh4be Max Krummenacher (2): linux-firmware: package marvel sdio 8997 firmware linux-firmware: package nvidia firmware Mingli Yu (1): tcl: adapt to potential pseudo changes Naoki Hayama (1): dev/test/ref-manual: Fix typos Neil Armstrong (1): linux-firmware: add Amlogic VDEC firmware package Nicolas Dechesne (4): sdk-manual: use built-in footnotes dev-manual/dev-manual-common-tasks: fix warning sphinx: add 3.1.3 and 3.0.4 release in the switcher dev-manual/dev-manual-common-tasks: fix typos and use extlinks Paul Eggleton (2): classes/buildhistory: record SRC_URI classes/buildhistory: also save recipe info for native recipes Quentin Schulz (17): docs: poky.yaml: use HTTPS for links docs: ref-manual: indentation, links and highlights fixes docs: remove OE_INIT_FILE variable docs: ref-manual: fix typos docs: ref-manual: migration-2.3: specify 2.3 version instead of DISTRO docs: ref-manual: ref-classes: remove dropped tinderclient class docs: ref-manual: ref-system-requirements: update requirements to build Sphinx docs docs: sphinx: yocto-vars: rebuild files when poky.yaml has changed docs: poky.yaml: fix identation in host packages variables docs: dev-manual-common-tasks: remove paragraph about race when missing DEPENDS docs: dev-manual-common-tasks: update python webserver example to python3 docs: dev-manual: fix typos, highlights, indentation and links docs: ref-manual: ref-terms: add links to terms in glossary docs: bsp-guide: bsp: fix typos, highlights and links docs: kernel-dev: fix typos, highlights and links docs: kernel-dev-common: add .patch file extension to SRC_URI files docs: kernel-dev-faq: update outdated RDEPENDS_kernel-base Reyna, David (1): bitbake: toaster: Update documentation links to new URLs Richard Purdie (10): layer.conf: Switch to gatesgarth only in preparation for release bitbake: ui/toasterui: Fix startup faults from incorrect event sequencing bitbake: bitbake: Bump version to 1.48.0 ready for the new release oeqa: Add sync call to command execution poky.conf: Bump version for 3.2 gatesgarth release build-appliance-image: Update to master head revision bitbake: tests/fetch: Update upstream master->main branchname transition Revert "classes/buildhistory: also save recipe info for native recipes" valgrind: Fix build on musl after drd fixes build-appliance-image: Update to master head revision Robert Yang (1): weston: Fix PACKAGECONFIG for remoting Roland Hieber (1): devtool: make sure .git/info exists before writing to .git/info/excludes Ross Burton (4): waf: don't assume the waf intepretter is good waf: add ${B} to do_configure[cleandirs] scripts/install-buildtools: Update to 3.2 M3 buildtools glib-2.0: fix parsing of slim encoded tzdata Sourabh Banerjee (1): layer.conf: fix sanity error for PATH variable in extensible SDK workflow Stacy Gaikovaia (2): valgrind: drd: fix pthread intercept test failures bitbake: main: Handle cooker daemon startup error Tim Orling (1): bitbake: lib/bb/ui/knotty: fix typo in parseprogress Victor Kamensky (3): Revert "qemumips: use 34Kf-64tlb CPU emulation" Revert "qemu: add 34Kf-64tlb fictitious cpu type" qemu: change TLBs number to 64 in 34Kf mips cpu model Yi Zhao (1): dhcpcd: add PACKAGECONFIG for ntp/chrony/ypbind hooks Zang Ruochen (1): harfbuzz: Refresh patch akuster (2): busybox: add rev and pgrep kea: add init scripts leimaohui (1): docs: Updated the status of spdx module. zangrc (1): classes: Fixed the problem of undefined variables when compiling meta-toolchain. Signed-off-by: Andrew Geissler Change-Id: Ic45bc219b94960751896a0ae3d4923a9f5849e70 --- poky/meta/recipes-devtools/qemu/qemu.inc | 2 +- ...Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch | 118 --------------------- ...-Increase-number-of-TLB-entries-on-the-34.patch | 59 +++++++++++ 3 files changed, 60 insertions(+), 119 deletions(-) delete mode 100644 poky/meta/recipes-devtools/qemu/qemu/0001-mips-add-34Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch create mode 100644 poky/meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch (limited to 'poky/meta/recipes-devtools/qemu') diff --git a/poky/meta/recipes-devtools/qemu/qemu.inc b/poky/meta/recipes-devtools/qemu/qemu.inc index 6c0edcb706..84f600cec0 100644 --- a/poky/meta/recipes-devtools/qemu/qemu.inc +++ b/poky/meta/recipes-devtools/qemu/qemu.inc @@ -31,7 +31,7 @@ SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \ file://0001-qemu-Do-not-include-file-if-not-exists.patch \ file://find_datadir.patch \ file://usb-fix-setup_len-init.patch \ - file://0001-mips-add-34Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch \ + file://0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch \ " UPSTREAM_CHECK_REGEX = "qemu-(?P\d+(\.\d+)+)\.tar" diff --git a/poky/meta/recipes-devtools/qemu/qemu/0001-mips-add-34Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch b/poky/meta/recipes-devtools/qemu/qemu/0001-mips-add-34Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch deleted file mode 100644 index b6312e1543..0000000000 --- a/poky/meta/recipes-devtools/qemu/qemu/0001-mips-add-34Kf-64tlb-fictitious-cpu-type-like-34Kf-bu.patch +++ /dev/null @@ -1,118 +0,0 @@ -From b3fcc7d96523ad8e3ea28c09d495ef08529d01ce Mon Sep 17 00:00:00 2001 -From: Victor Kamensky -Date: Wed, 7 Oct 2020 10:19:42 -0700 -Subject: [PATCH] mips: add 34Kf-64tlb fictitious cpu type like 34Kf but with - 64 TLBs - -In Yocto Project CI runs it was observed that test run -of 32 bit mips image takes almost twice longer than 64 bit -mips image with the same logical load and CI execution -hits timeout. - -See https://bugzilla.yoctoproject.org/show_bug.cgi?id=13992 - -Yocto project uses 34Kf cpu type to run 32 bit mips image, -and MIPS64R2-generic cpu type to run 64 bit mips64 image. - -Upon qemu behavior differences investigation between mips -and mips64 two prominent observations came up: under -logically similar load (same definition and configuration -of user-land image) in case of mips get_physical_address -function is called almost twice more often, meaning -twice more memory accesses involved in this case. Also -number of tlbwr instruction executed (r4k_helper_tlbwr -qemu function) almost 16 time bigger in mips case than in -mips64. - -It turns out that 34Kf cpu has 16 TLBs, but in case of -MIPS64R2-generic it is 64 TLBs. So that explains why -some many more tlbwr had to be execute by kernel TLB refill -handler in case of 32 bit misp. - -The idea of the fix is to come up with new 34Kf-64tlb fictitious -cpu type, that would behave exactly as 34Kf but it would -contain 64 TLBs to reduce TLB trashing. After all, adding -more TLBs to soft mmu is easy. - -Experiment with some significant non-trvial load in Yocto -environment by running do_testimage load shows that 34Kf-64tlb -cpu performs 40% or so better than original 34Kf cpu wrt test -execution real time. - -It is not ideal to have cpu type that does not exist in the -wild but given performance gains it seems to be justified. - -Signed-off-by: Victor Kamensky ---- - target/mips/translate_init.inc.c | 55 ++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 55 insertions(+) - -diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c -index 637caccd89..b73ab48231 100644 ---- a/target/mips/translate_init.inc.c -+++ b/target/mips/translate_init.inc.c -@@ -297,6 +297,61 @@ const mips_def_t mips_defs[] = - .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_MT, - .mmu_type = MMU_TYPE_R4000, - }, -+ /* -+ * Verbatim copy of "34Kf" cpu, only bumped up number of TLB entries -+ * from 16 to 64 (see CP0_Config0 value at CP0C1_MMU bits) to improve -+ * performance by reducing number of TLB refill exceptions and -+ * eliminating need to run all corresponding TLB refill handling -+ * instructions. -+ */ -+ { -+ .name = "34Kf-64tlb", -+ .CP0_PRid = 0x00019500, -+ .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | -+ (MMU_TYPE_R4000 << CP0C0_MT), -+ .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) | -+ (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | -+ (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) | -+ (1 << CP0C1_CA), -+ .CP0_Config2 = MIPS_CONFIG2, -+ .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_VInt) | (1 << CP0C3_MT) | -+ (1 << CP0C3_DSPP), -+ .CP0_LLAddr_rw_bitmask = 0, -+ .CP0_LLAddr_shift = 0, -+ .SYNCI_Step = 32, -+ .CCRes = 2, -+ .CP0_Status_rw_bitmask = 0x3778FF1F, -+ .CP0_TCStatus_rw_bitmask = (0 << CP0TCSt_TCU3) | (0 << CP0TCSt_TCU2) | -+ (1 << CP0TCSt_TCU1) | (1 << CP0TCSt_TCU0) | -+ (0 << CP0TCSt_TMX) | (1 << CP0TCSt_DT) | -+ (1 << CP0TCSt_DA) | (1 << CP0TCSt_A) | -+ (0x3 << CP0TCSt_TKSU) | (1 << CP0TCSt_IXMT) | -+ (0xff << CP0TCSt_TASID), -+ .CP1_fcr0 = (1 << FCR0_F64) | (1 << FCR0_L) | (1 << FCR0_W) | -+ (1 << FCR0_D) | (1 << FCR0_S) | (0x95 << FCR0_PRID), -+ .CP1_fcr31 = 0, -+ .CP1_fcr31_rw_bitmask = 0xFF83FFFF, -+ .CP0_SRSCtl = (0xf << CP0SRSCtl_HSS), -+ .CP0_SRSConf0_rw_bitmask = 0x3fffffff, -+ .CP0_SRSConf0 = (1U << CP0SRSC0_M) | (0x3fe << CP0SRSC0_SRS3) | -+ (0x3fe << CP0SRSC0_SRS2) | (0x3fe << CP0SRSC0_SRS1), -+ .CP0_SRSConf1_rw_bitmask = 0x3fffffff, -+ .CP0_SRSConf1 = (1U << CP0SRSC1_M) | (0x3fe << CP0SRSC1_SRS6) | -+ (0x3fe << CP0SRSC1_SRS5) | (0x3fe << CP0SRSC1_SRS4), -+ .CP0_SRSConf2_rw_bitmask = 0x3fffffff, -+ .CP0_SRSConf2 = (1U << CP0SRSC2_M) | (0x3fe << CP0SRSC2_SRS9) | -+ (0x3fe << CP0SRSC2_SRS8) | (0x3fe << CP0SRSC2_SRS7), -+ .CP0_SRSConf3_rw_bitmask = 0x3fffffff, -+ .CP0_SRSConf3 = (1U << CP0SRSC3_M) | (0x3fe << CP0SRSC3_SRS12) | -+ (0x3fe << CP0SRSC3_SRS11) | (0x3fe << CP0SRSC3_SRS10), -+ .CP0_SRSConf4_rw_bitmask = 0x3fffffff, -+ .CP0_SRSConf4 = (0x3fe << CP0SRSC4_SRS15) | -+ (0x3fe << CP0SRSC4_SRS14) | (0x3fe << CP0SRSC4_SRS13), -+ .SEGBITS = 32, -+ .PABITS = 32, -+ .insn_flags = CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP | ASE_MT, -+ .mmu_type = MMU_TYPE_R4000, -+ }, - { - .name = "74Kf", - .CP0_PRid = 0x00019700, --- -2.14.5 - diff --git a/poky/meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch b/poky/meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch new file mode 100644 index 0000000000..5227b7cbd2 --- /dev/null +++ b/poky/meta/recipes-devtools/qemu/qemu/0001-target-mips-Increase-number-of-TLB-entries-on-the-34.patch @@ -0,0 +1,59 @@ +From 68fa519a6cb455005317bd61f95214b58b2f1e69 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= +Date: Fri, 16 Oct 2020 15:20:37 +0200 +Subject: [PATCH] target/mips: Increase number of TLB entries on the 34Kf core + (16 -> 64) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Per "MIPS32 34K Processor Core Family Software User's Manual, +Revision 01.13" page 8 in "Joint TLB (JTLB)" section: + + "The JTLB is a fully associative TLB cache containing 16, 32, + or 64-dual-entries mapping up to 128 virtual pages to their + corresponding physical addresses." + +There is no particular reason to restrict the 34Kf core model to +16 TLB entries, so raise its config to 64. + +This is helpful for other projects, in particular the Yocto Project: + + Yocto Project uses qemu-system-mips 34Kf cpu model, to run 32bit + MIPS CI loop. It was observed that in this case CI test execution + time was almost twice longer than 64bit MIPS variant that runs + under MIPS64R2-generic model. It was investigated and concluded + that the difference in number of TLBs 16 in 34Kf case vs 64 in + MIPS64R2-generic is responsible for most of CI real time execution + difference. Because with 16 TLBs linux user-land trashes TLB more + and it needs to execute more instructions in TLB refill handler + calls, as result it runs much longer. + +(https://lists.gnu.org/archive/html/qemu-devel/2020-10/msg03428.html) + +Buglink: https://bugzilla.yoctoproject.org/show_bug.cgi?id=13992 +Reported-by: Victor Kamensky +Signed-off-by: Philippe Mathieu-Daudé +Reviewed-by: Richard Henderson +Message-Id: <20201016133317.553068-1-f4bug@amsat.org> + +Upstream-Status: Backport [https://github.com/qemu/qemu/commit/68fa519a6cb455005317bd61f95214b58b2f1e69] +Signed-off-by: Victor Kamensky + +--- + target/mips/translate_init.c.inc | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +Index: qemu-5.1.0/target/mips/translate_init.inc.c +=================================================================== +--- qemu-5.1.0.orig/target/mips/translate_init.inc.c ++++ qemu-5.1.0/target/mips/translate_init.inc.c +@@ -254,7 +254,7 @@ const mips_def_t mips_defs[] = + .CP0_PRid = 0x00019500, + .CP0_Config0 = MIPS_CONFIG0 | (0x1 << CP0C0_AR) | + (MMU_TYPE_R4000 << CP0C0_MT), +- .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (15 << CP0C1_MMU) | ++ .CP0_Config1 = MIPS_CONFIG1 | (1 << CP0C1_FP) | (63 << CP0C1_MMU) | + (0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) | + (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) | + (1 << CP0C1_CA), -- cgit v1.2.3