From adc66d99663f71ec97313c40b0d00a908f292c30 Mon Sep 17 00:00:00 2001 From: Himanshu Sharma Date: Mon, 30 May 2022 10:53:30 +0000 Subject: [PATCH 3/3] Platform/ARM/N1Sdp: Modify the IRQ ID of Debug UART and routing it to IOFPGA UART1 In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the IPI0 trigger method to "level", which prevented SGI0 to be enabled again after a CPU offline/online cycle. This patch fixes the above issue by assigning a reserved IRQ ID for the Debug UART, other than 0 and also routing it to use IOFPGA UART1 by unsharing it from currently using serial terminal. Upstream-Status: Pending Signed-off-by: Adam Johnston Signed-off-by: Xueliang Zhong Signed-off-by: Himanshu Sharma Change-Id: I6640c3c8f77afd233304ce9cb06dcf80a8659c16 --- .../ConfigurationManagerDxe/ConfigurationManager.c | 2 +- Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c index 36b5fc9e..e8873200 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c @@ -320,7 +320,7 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = { // Debug Serial Port { FixedPcdGet64 (PcdSerialDbgRegisterBase), // BaseAddress - 0, // Interrupt -unused + 250, // Interrupt (reserved) FixedPcdGet64 (PcdSerialDbgUartBaudRate), // BaudRate FixedPcdGet32 (PcdSerialDbgUartClkInHz), // Clock EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // Port subtype diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc index 865dd04d..878c8f2f 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -4,7 +4,7 @@ # This provides platform specific component descriptions and libraries that # conform to EFI/Framework standards. # -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -136,9 +136,9 @@ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|95 # PL011 Serial Debug UART (DBG2) - gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase - gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate - gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|50000000 + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1C0A0000 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000 # SBSA Watchdog gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93 -- 2.37.2