From 98c236c535e6cd8cce3d08bb424f5f0d8a99617d Mon Sep 17 00:00:00 2001 From: Benjamin Fair Date: Wed, 20 Nov 2019 14:20:38 -0800 Subject: [PATCH] Set FIU0_DRD_CFG and FIU_Clk_divider for gbmc hoth This is to set the SPI frequency to 20MHz Signed-off-by: Benjamin Fair Signed-off-by: Brandon Kim --- ImageGeneration/references/BootBlockAndHeader_EB.xml | 4 ++-- ImageGeneration/references/UbootHeader_EB.xml | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ImageGeneration/references/BootBlockAndHeader_EB.xml b/ImageGeneration/references/BootBlockAndHeader_EB.xml index 775534f..4d5c053 100644 --- a/ImageGeneration/references/BootBlockAndHeader_EB.xml +++ b/ImageGeneration/references/BootBlockAndHeader_EB.xml @@ -63,7 +63,7 @@ 0x108 0x4 - 0x030011BB + 0x0300100B @@ -73,7 +73,7 @@ 0x10C 0x1 - 4 + 10 diff --git a/ImageGeneration/references/UbootHeader_EB.xml b/ImageGeneration/references/UbootHeader_EB.xml index 1e72e22..4434504 100644 --- a/ImageGeneration/references/UbootHeader_EB.xml +++ b/ImageGeneration/references/UbootHeader_EB.xml @@ -63,7 +63,7 @@ 0x108 0x4 - 0x030111BC + 0x0300100B -- 2.28.0.220.ged08abb693-goog