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authorPortisch <hugo.portisch@yahoo.de>2019-05-15 15:28:47 +0300
committerDongjin Kim <tobetter@gmail.com>2020-02-13 11:13:40 +0300
commit02188034ee1b225d1ea238ac16c2f9bc7af04022 (patch)
treec9db9e91d3919e470be316e843dea1033a3306b4
parentaa89a4b303a2e1eff569354f3cabf461f134d61f (diff)
downloadu-boot-02188034ee1b225d1ea238ac16c2f9bc7af04022.tar.xz
g12a/g12b: scp_remote: tune RC5 bit detection
Change-Id: If55b8c6d4f7415af32e8aa784757b774ef7a3520
-rw-r--r--arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c8
-rw-r--r--arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c8
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c b/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c
index f37d792748..b9e7dc52a3 100644
--- a/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c
+++ b/arch/arm/cpu/armv8/g12a/firmware/scp_task/scp_remote.c
@@ -188,9 +188,9 @@ static const reg_remote RDECODEMODE_RC5[] = {
/*bit[0-3]: RC5; bit[8]: MSB first mode; bit[11]: compare frame method*/
{ AO_MF_IR_DEC_REG2 , ((1 << 13) | (1 << 11) | (1 << 8) | 0x7)},
/*Half bit for RC5 format: 888.89us*/
- { AO_MF_IR_DEC_DURATN2 , ((49 << 16) | (40 << 0)) },
+ { AO_MF_IR_DEC_DURATN2 , ((56 << 16) | (32 << 0)) },
/*RC5 typically 1777.78us for whole bit*/
- { AO_MF_IR_DEC_DURATN3 , ((94 << 16) | (83 << 0)) },
+ { AO_MF_IR_DEC_DURATN3 , ((102 << 16) | (76 << 0)) },
{ AO_MF_IR_DEC_REG3 , 0 },
{CONFIG_END, 0}
};
@@ -230,9 +230,9 @@ static const reg_remote RDECODEMODE_NEC_RC5_2IN1[] = {
/*bit[0-3]: RC5; bit[8]: MSB first mode; bit[11]: compare frame method*/
{ AO_MF_IR_DEC_REG2 , ((1 << 13) | (1 << 11) | (1 << 8) | 0x7)},
/*Half bit for RC5 format: 888.89us*/
- { AO_MF_IR_DEC_DURATN2 , ((49 << 16) | (40 << 0)) },
+ { AO_MF_IR_DEC_DURATN2 , ((56 << 16) | (32 << 0)) },
/*RC5 typically 1777.78us for whole bit*/
- { AO_MF_IR_DEC_DURATN3 , ((94 << 16) | (83 << 0)) },
+ { AO_MF_IR_DEC_DURATN3 , ((102 << 16) | (76 << 0)) },
{ AO_MF_IR_DEC_REG3 , 0 },
{CONFIG_END, 0}
};
diff --git a/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c b/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c
index f37d792748..b9e7dc52a3 100644
--- a/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c
+++ b/arch/arm/cpu/armv8/g12b/firmware/scp_task/scp_remote.c
@@ -188,9 +188,9 @@ static const reg_remote RDECODEMODE_RC5[] = {
/*bit[0-3]: RC5; bit[8]: MSB first mode; bit[11]: compare frame method*/
{ AO_MF_IR_DEC_REG2 , ((1 << 13) | (1 << 11) | (1 << 8) | 0x7)},
/*Half bit for RC5 format: 888.89us*/
- { AO_MF_IR_DEC_DURATN2 , ((49 << 16) | (40 << 0)) },
+ { AO_MF_IR_DEC_DURATN2 , ((56 << 16) | (32 << 0)) },
/*RC5 typically 1777.78us for whole bit*/
- { AO_MF_IR_DEC_DURATN3 , ((94 << 16) | (83 << 0)) },
+ { AO_MF_IR_DEC_DURATN3 , ((102 << 16) | (76 << 0)) },
{ AO_MF_IR_DEC_REG3 , 0 },
{CONFIG_END, 0}
};
@@ -230,9 +230,9 @@ static const reg_remote RDECODEMODE_NEC_RC5_2IN1[] = {
/*bit[0-3]: RC5; bit[8]: MSB first mode; bit[11]: compare frame method*/
{ AO_MF_IR_DEC_REG2 , ((1 << 13) | (1 << 11) | (1 << 8) | 0x7)},
/*Half bit for RC5 format: 888.89us*/
- { AO_MF_IR_DEC_DURATN2 , ((49 << 16) | (40 << 0)) },
+ { AO_MF_IR_DEC_DURATN2 , ((56 << 16) | (32 << 0)) },
/*RC5 typically 1777.78us for whole bit*/
- { AO_MF_IR_DEC_DURATN3 , ((94 << 16) | (83 << 0)) },
+ { AO_MF_IR_DEC_DURATN3 , ((102 << 16) | (76 << 0)) },
{ AO_MF_IR_DEC_REG3 , 0 },
{CONFIG_END, 0}
};