summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorckkim <changkon12@gmail.com>2022-02-15 10:39:52 +0300
committerckkim <changkon12@gmail.com>2022-02-15 10:41:20 +0300
commite6c7ab748e1604178e20fd4e0621b534bcda5907 (patch)
tree278e86bdfc7baa30826a2c822aa96ae398fea484
parent766167bbe787e494e47376b31cd017b897e9594c (diff)
downloadu-boot-e6c7ab748e1604178e20fd4e0621b534bcda5907.tar.xz
ODROID-C4:Add amlogic i2c_bus_2 for odroid-vu7c
Signed-off-by: ckkim <changkon12@gmail.com> Change-Id: I830ecb59a4b51ee02ce2e58845e4b42761cd6309
-rw-r--r--arch/arm/include/asm/arch-g12a/i2c.h6
-rw-r--r--board/hardkernel/odroidc4/odroidc4.c44
-rw-r--r--common/cmd_i2c.c8
3 files changed, 40 insertions, 18 deletions
diff --git a/arch/arm/include/asm/arch-g12a/i2c.h b/arch/arm/include/asm/arch-g12a/i2c.h
index b33594a3a9..e96c2a0344 100644
--- a/arch/arm/include/asm/arch-g12a/i2c.h
+++ b/arch/arm/include/asm/arch-g12a/i2c.h
@@ -147,6 +147,12 @@ struct i2c_msg {
#define MESON_I2C_MASTER_B_GPIOY_13_REG (PERIPHS_PIN_MUX_10)
#define MESON_I2C_MASTER_B_GPIOY_13_BIT (1<<15)
+#define MESON_I2C_MASTER_B_GPIOX_10_REG (PERIPHS_PIN_MUX_4)
+#define MESON_I2C_MASTER_B_GPIOX_10_BIT (5<<8)
+#define MESON_I2C_MASTER_B_GPIOX_11_REG (PERIPHS_PIN_MUX_4)
+#define MESON_I2C_MASTER_B_GPIOX_11_BIT (5<<12)
+
+
/*i2c master c*/
#define MESON_I2C_MASTER_C_GPIOY_7_REG (PERIPHS_PIN_MUX_4)
#define MESON_I2C_MASTER_C_GPIOY_7_BIT (1<<28)
diff --git a/board/hardkernel/odroidc4/odroidc4.c b/board/hardkernel/odroidc4/odroidc4.c
index 7cbc9b509f..53e202e751 100644
--- a/board/hardkernel/odroidc4/odroidc4.c
+++ b/board/hardkernel/odroidc4/odroidc4.c
@@ -15,6 +15,7 @@
#include <asm/cpu_id.h>
#include <asm/arch/secure_apb.h>
#ifdef CONFIG_SYS_I2C_AML
+#include <amlogic/i2c.h>
#include <aml_i2c.h>
#endif
#ifdef CONFIG_AML_VPU
@@ -221,21 +222,32 @@ int board_mmc_init(bd_t *bis)
#endif
#ifdef CONFIG_SYS_I2C_AML
-struct aml_i2c_platform g_aml_i2c_plat = {
- .wait_count = 1000000,
- .wait_ack_interval = 5,
- .wait_read_interval = 5,
- .wait_xfer_interval = 5,
- .master_no = AML_I2C_MASTER_AO,
- .use_pio = 0,
- .master_i2c_speed = AML_I2C_SPPED_400K,
- .master_ao_pinmux = {
- .scl_reg = (unsigned long)MESON_I2C_MASTER_AO_GPIOAO_4_REG,
- .scl_bit = MESON_I2C_MASTER_AO_GPIOAO_4_BIT,
- .sda_reg = (unsigned long)MESON_I2C_MASTER_AO_GPIOAO_5_REG,
- .sda_bit = MESON_I2C_MASTER_AO_GPIOAO_5_BIT,
- }
+struct aml_i2c_platform g_aml_i2c_plat[] = {
+ {
+ .wait_count = 1000000,
+ .wait_ack_interval = 5,
+ .wait_read_interval = 5,
+ .wait_xfer_interval = 5,
+ .master_no = AML_I2C_MASTER_B,
+ .use_pio = 0,
+ .master_i2c_speed = AML_I2C_SPPED_400K,
+ .master_b_pinmux = {
+ .scl_reg = (unsigned long)MESON_I2C_MASTER_B_GPIOX_11_REG,
+ .scl_bit = MESON_I2C_MASTER_B_GPIOX_11_BIT,
+ .sda_reg = (unsigned long)MESON_I2C_MASTER_B_GPIOX_10_REG,
+ .sda_bit = MESON_I2C_MASTER_B_GPIOX_10_BIT,
+ },
+ },
};
+
+static void board_i2c_init(void)
+{
+ //Amlogic I2C controller initialized
+ //note: it must be call before any I2C operation
+ //aml_i2c_init();
+ extern void aml_i2c_set_ports(struct aml_i2c_platform *i2c_plat);
+ aml_i2c_set_ports(g_aml_i2c_plat);
+}
#endif
#if defined(CONFIG_BOARD_EARLY_INIT_F)
@@ -372,6 +384,7 @@ int board_late_init(void)
/* select the default mmc device */
mmc_select_hwpart(mmc_devnum, 0);
#endif
+
#ifdef CONFIG_AML_VPU
vpu_probe();
#endif
@@ -386,6 +399,9 @@ int board_late_init(void)
board_cvbs_probe();
#endif
+#ifdef CONFIG_SYS_I2C_AML
+ board_i2c_init();
+#endif
setenv("variant", board_is_odroidc4() ? "c4" : "hc4");
board_set_dtbfile("meson64_odroid%s.dtb");
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 22db1bb47c..272d654f8b 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -1667,7 +1667,7 @@ static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
* on error.
*/
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
- defined(CONFIG_DM_I2C)
+ defined(CONFIG_DM_I2C) || defined(CONFIG_SYS_I2C_AML)
static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
{
@@ -1809,7 +1809,7 @@ static cmd_tbl_t cmd_i2c_sub[] = {
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_AML) || \
defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */
@@ -1872,11 +1872,11 @@ static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
/***************************************************/
#ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] =
-#if defined(CONFIG_SYS_I2C)
+#if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_AML)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
#endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
-#if defined(CONFIG_SYS_I2C) || \
+#if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_AML) || \
defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */