summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLokesh Vutla <lokeshvutla@ti.com>2019-12-31 13:19:55 +0300
committerTom Rini <trini@konsulko.com>2020-01-03 17:47:11 +0300
commit40109f4d7ed114cd473e5528b7b0a9a04be9207e (patch)
tree239ac52926655007b8932829c4c1ae54efed628c
parent196d3e4017735c82cb5aa4387a9c44174a8391ac (diff)
downloadu-boot-40109f4d7ed114cd473e5528b7b0a9a04be9207e.tar.xz
arm: mach-k3: Enable WA for R5F deadlock
On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
-rw-r--r--arch/arm/mach-k3/am6_init.c1
-rw-r--r--arch/arm/mach-k3/common.c25
-rw-r--r--arch/arm/mach-k3/common.h1
-rw-r--r--arch/arm/mach-k3/j721e_init.c1
4 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 99edcd9a24..a78ffbb674 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -82,6 +82,7 @@ void board_init_f(ulong dummy)
ctrl_mmr_unlock();
#ifdef CONFIG_CPU_V7R
+ disable_linefill_optimization();
setup_k3_mpu_regions();
#endif
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index bf631b74f8..50f5b81dfe 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -244,3 +244,28 @@ void board_prep_linux(bootm_headers_t *images)
CONFIG_SYS_CACHELINE_SIZE));
}
#endif
+
+#ifdef CONFIG_CPU_V7R
+void disable_linefill_optimization(void)
+{
+ u32 actlr;
+
+ /*
+ * On K3 devices there are 2 conditions where R5F can deadlock:
+ * 1.When software is performing series of store operations to
+ * cacheable write back/write allocate memory region and later
+ * on software execute barrier operation (DSB or DMB). R5F may
+ * hang at the barrier instruction.
+ * 2.When software is performing a mix of load and store operations
+ * within a tight loop and store operations are all writing to
+ * cacheable write back/write allocates memory regions, R5F may
+ * hang at one of the load instruction.
+ *
+ * To avoid the above two conditions disable linefill optimization
+ * inside Cortex R5F.
+ */
+ asm("mrc p15, 0, %0, c1, c0, 1" : "=r" (actlr));
+ actlr |= (1 << 13); /* Set DLFO bit */
+ asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
+}
+#endif
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 8f9a023921..35d1609cdc 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -16,3 +16,4 @@
void setup_k3_mpu_regions(void);
int early_console_init(void);
+void disable_linefill_optimization(void);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index d0bf86abeb..4758739266 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -87,6 +87,7 @@ void board_init_f(ulong dummy)
ctrl_mmr_unlock();
#ifdef CONFIG_CPU_V7R
+ disable_linefill_optimization();
setup_k3_mpu_regions();
#endif