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authorDongjin Kim <tobetter@gmail.com>2013-05-15 22:06:45 +0400
committerDongjin Kim <tobetter@gmail.com>2013-05-15 22:19:02 +0400
commita877439fc385a314c1bb001b6f1995def4a96538 (patch)
tree8d3d3f6765514378ada8198117096ea8927f2ada
parentf8318616ee1e165ef7f55d425f4c38a2b9cf7054 (diff)
downloadu-boot-a877439fc385a314c1bb001b6f1995def4a96538.tar.xz
smdk4412: Select FIMD bypass for LCD
The output of FIMD is connected to MIE/MDNIE as default on reset state, therefore LCDBLK_CFG have to be configured to bypass FIMD of LBLK0. It was configured by kernel in setup-fimd0.c, but nowhere to configure this register in v3.10-rc1 since GPIO are configured by device tree and setup-fimd0.c is removed. Signed-off-by: Dongjin Kim <tobetter@gmail.com>
-rw-r--r--board/samsung/smdk4212/smdk4212.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/samsung/smdk4212/smdk4212.c b/board/samsung/smdk4212/smdk4212.c
index 729827463b..0a3f364f7a 100644
--- a/board/samsung/smdk4212/smdk4212.c
+++ b/board/samsung/smdk4212/smdk4212.c
@@ -208,6 +208,17 @@ int board_init(void)
// denis added
writel(0x6666, S5PV310_CLOCK_BASE + 0xC234); // CLK_SRC_LCD0
+ /* LCDBLK_CFG : Display control register
+ * set FIMD to bypass, MIE or MDNIE is the as default in reset
+ * +---+-----------------+--------------------------------+
+ * | 1 | FIMDBYPASS_LBK0 | 0 = MIE/MDNIE, 1 = FIMD Bypass |
+ * | 0 | MIE_LBL0 | 0 = MIE, 1 = MDNIE |
+ * +---+-----------------+--------------------------------+
+ */
+ u32 val;
+ val = readl(S5PV310_SYSREG_BASE + 0x210); // LCDBLK_CFG
+ writel(val | (1 << 1), S5PV310_SYSREG_BASE + 0x210);
+
return 0;
}