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authorDongjin Kim <tobetter@gmail.com>2013-05-15 22:12:21 +0400
committerDongjin Kim <tobetter@gmail.com>2013-05-15 22:23:10 +0400
commitde0d7fed22cefe9d193f027bd004d278bdc60ecb (patch)
tree0b0a070f3e86a16b23349c9b5c05809b05108bbc
parenta877439fc385a314c1bb001b6f1995def4a96538 (diff)
downloadu-boot-de0d7fed22cefe9d193f027bd004d278bdc60ecb.tar.xz
smdk4412: Select the source clock of LCD0
This patch is to select the source clock of LCD0 to SCLKMPLL_USER_T instead XusbXTI default. Signed-off-by: Dongjin Kim <tobetter@gmail.com>
-rw-r--r--board/samsung/smdk4212/smdk4212.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/board/samsung/smdk4212/smdk4212.c b/board/samsung/smdk4212/smdk4212.c
index 0a3f364f7a..0c6de49c05 100644
--- a/board/samsung/smdk4212/smdk4212.c
+++ b/board/samsung/smdk4212/smdk4212.c
@@ -205,8 +205,12 @@ int board_init(void)
} else if (OmPin == BOOT_EMMC_4_4) {
printf(" EMMC4.41\n");
}
- // denis added
- writel(0x6666, S5PV310_CLOCK_BASE + 0xC234); // CLK_SRC_LCD0
+
+ /* CLK_SRC_LCD0: Clock source for LCD_BLK
+ * Select source clock of each device (MIPI0_SEL, MDNIE_PWM0_SEL,
+ * MDNIE0_SEL, FIMD0_SEL) to SCLKMPLL_USER_T
+ */
+ writel(0x6666, S5PV310_CLOCK_BASE + 0xC234); // CLK_SRC_LCD0
/* LCDBLK_CFG : Display control register
* set FIMD to bypass, MIE or MDNIE is the as default in reset