summaryrefslogtreecommitdiff
path: root/board/hardkernel/odroidc2/odroidc2.c
blob: aa6cb46d4d8fee764e6118d85ba133d99d1f4716 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
/*
 * Copyright (C) 2015 Hardkernel Co,. Ltd
 * Dongjin Kim <tobetter@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <malloc.h>
#include <errno.h>
#include <environment.h>
#include <fdt_support.h>
#include <libfdt.h>
#include <asm/arch/secure_apb.h>
#include <asm/arch/eth_setup.h>
#include <asm/arch-gxb/gpio.h>
#include <asm-generic/gpio.h>
#include <usb/fastboot.h>
#include <asm/arch/efuse.h>
#include <linux/kernel.h>

#ifdef CONFIG_AML_VPU
#include <vpu.h>
#endif

#ifdef CONFIG_AML_HDMITX20
#include <amlogic/hdmi.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

extern int board_get_recovery_message(void);
extern unsigned int get_mmc_size(void);

#define GPIO_BLUELED		132
#define GPIO_USB_PWREN		123
#define GPIO_OTG_PWREN		124
#define GPIO_TF3V3		35	/* GPIOY_12 */
#define GPIO_TF1V8		122	/* GPIOAO_3 */
#define GPIO_UPS_POWER_LATCH	37	/* GPIOY_14 */

static const char *c2_hdmimodes[] = {
	"480cvbs",
	"576cvbs",
	"480p60hz",
	"576p50hz",
	"720p60hz",
	"720p50hz",
	"1080p60hz",
	"1080p50hz",
	"1080p30hz",
	"1080p24hz",
	"1080i60hz",
	"1080i50hz",
	"2160p60hz",
	"2160p50hz",
	"2160p30hz",
	"2160p25hz",
	"2160p24hz",
	"2160p60hz420",
	"2160p50hz420",
	"480x320p60hz",
	"640x480p60hz",
	"800x480p60hz",
	"800x600p60hz",
	"1024x600p60hz",
	"1024x768p60hz",
	"1280x800p60hz",
	"1280x1024p60hz",
	"1360x768p60hz",
	"1440x900p60hz",
	"1600x900p60hz",
	"1600x1200p60hz",
	"1680x1050p60hz",
	"1920x1200p60hz",
	"2560x1600p60hz",
	"2560x1440p60hz",
	"2560x1080p60hz",
	"3440x1440p60hz",
	"custombuilt",
};

int is_hdmimode_valid(const char *mode)
{
	int i = 0;

	for (i = 0; i < ARRAY_SIZE(c2_hdmimodes); ++i) {
		if (!strcmp(c2_hdmimodes[i], mode))
			return 1;
	}

	return 0;
}

int serial_set_pin_port(unsigned long port_base)
{
	//UART in "Always On Module"
	//GPIOAO_0==tx,GPIOAO_1==rx
	//setbits_le32(P_AO_RTI_PIN_MUX_REG,3<<11);
	return 0;
}

int dram_init(void)
{
	gd->ram_size = PHYS_SDRAM_1_SIZE;
	return 0;
}

void secondary_boot_func(void)
{
	/*
	 * TODO: should be written in ASM if necessary
	 */
}

/*
 * Discover the boot device within MicroSD or eMMC
 * and return 1 for eMMC, otherwise 0.
 */
#define BOOT_DEVICE_RESERVED	0
#define BOOT_DEVICE_EMMC	1
#define BOOT_DEVICE_NAND	2
#define BOOT_DEVICE_SPI		3
#define BOOT_DEVICE_SD		4
#define BOOT_DEVICE_USB		5

int get_boot_device(void)
{
	return readl(AO_SEC_GP_CFG0) & 0xf;
}

/*
 * Discover the boot reason:
 *   1. check if the board is started with Android Self-Installation.
 *   2. if rebooted by 'reboot' command in previous kernel boot.
 *   3. Otherwise returns normal boot response by power cycle.
 */
int board_reboot_reason(void)
{
	static int __reboot_reason = ODROID_REBOOT_CMD_UNKNOWN;

	if (ODROID_REBOOT_CMD_UNKNOWN == __reboot_reason) {
		__reboot_reason = board_get_recovery_message();
		if (ODROID_REBOOT_CMD_UNKNOWN == __reboot_reason)
			__reboot_reason = (readl(AO_SEC_SD_CFG15) >> 12) & 0xf;
	}

	return __reboot_reason;
}

void board_print_info(void)
{
	int i;
	int offset, length;
	char buf[EFUSE_BYTES];

	printf("-------------------------------------------------\n");
	printf("* Welcome to Hardkernel's ODROID-C2\n");
	printf("-------------------------------------------------\n");

	/* CPU */
	printf("CPU : AMLogic S905\n");

	/* S/N */
	offset = 20;
	length = 16;
	memset(buf, 0, EFUSE_BYTES);
	efuse_read_usr(buf, length, (loff_t *)&offset);
	buf[length] = '\0';
	printf("S/N : ");
	printf("%s\n", buf);

	/* MAC */
	offset = 52;
	length = 6;
	memset(buf, 0, EFUSE_BYTES);
	efuse_read_usr(buf, length, (loff_t *)&offset);
	buf[length] = '\0';
	printf("MAC : ");
	for (i=0;i<(length-1);i++)
		printf("%02x:", buf[i]);
	printf("%02x\n", buf[i]);

	/* BID */
	offset = 70;
	length = 48;
	memset(buf, 0, EFUSE_BYTES);
	efuse_read_usr(buf, length, (loff_t *)&offset);
	buf[0xA] = '\0';
	printf("BID : ");
	printf("%s\n", buf);

	printf("-------------------------------------------------\n");
}

void board_identity(void)
{
	char __serialno[17], *flash_fbt_id;
	int offset, length;

	flash_fbt_id = getenv("fbt_id#");

	/* S/N */
	offset = 20;
	length = 16;

	memset(__serialno, 0, 17);
	efuse_read_usr(__serialno, length, (loff_t *)&offset);

	__serialno[16] = '\0';

	if (flash_fbt_id && !memcmp(flash_fbt_id, __serialno, 17))
		return;

	setenv("fbt_id#", __serialno);
	run_command("saveenv", 0);
}

#if CONFIG_AML_SD_EMMC
#include <mmc.h>
#include <asm/arch/sd_emmc.h>

static int  sd_emmc_init(unsigned port)
{
	switch (port)
	{
	case SDIO_PORT_A:
		break;
	case SDIO_PORT_B:
		//todo add card detect
		//setbits_le32(P_PREG_PAD_GPIO5_EN_N,1<<29);//CARD_6
		break;
	case SDIO_PORT_C:
		//enable pull up
		//clrbits_le32(P_PAD_PULL_UP_REG3, 0xff<<0);
		break;
	default:
		break;
	}

	return cpu_sd_emmc_init(port);
}

extern unsigned sd_debug_board_1bit_flag;
static int  sd_emmc_detect(unsigned port)
{
	int ret;
	switch (port) {

	case SDIO_PORT_A:
		break;
	case SDIO_PORT_B:
		setbits_le32(P_PREG_PAD_GPIO5_EN_N,1<<29);//CARD_6
		ret=readl(P_PREG_PAD_GPIO5_I)&(1<<29)?0:1;
		printf("ret = %d .",ret);
		if ((readl(P_PERIPHS_PIN_MUX_8)&(3<<9))) { //if uart pinmux set, debug board in
			if (!(readl(P_PREG_PAD_GPIO2_I)&(1<<24))) {
				printf("sdio debug board detected, sd card with 1bit mode\n");
				sd_debug_board_1bit_flag = 1;
			}
			else{
				printf("sdio debug board detected, no sd card in\n");
				sd_debug_board_1bit_flag = 0;
				return 1;
			}
		}
		break;
	default:
		break;
	}
	return 0;
}

static void sd_emmc_pwr_prepare(unsigned port)
{
	cpu_sd_emmc_pwr_prepare(port);
}

static void sd_emmc_pwr_on(unsigned port)
{
	switch (port)
	{
	case SDIO_PORT_A:
		break;
	case SDIO_PORT_B:
		//            clrbits_le32(P_PREG_PAD_GPIO5_O,(1<<31)); //CARD_8
		//            clrbits_le32(P_PREG_PAD_GPIO5_EN_N,(1<<31));
		/// @todo NOT FINISH
		break;
	case SDIO_PORT_C:
		break;
	default:
		break;
	}
	return;
}
static void sd_emmc_pwr_off(unsigned port)
{
	/// @todo NOT FINISH
	switch (port)
	{
	case SDIO_PORT_A:
		break;
	case SDIO_PORT_B:
		//            setbits_le32(P_PREG_PAD_GPIO5_O,(1<<31)); //CARD_8
		//            clrbits_le32(P_PREG_PAD_GPIO5_EN_N,(1<<31));
		break;
	case SDIO_PORT_C:
		break;
	default:
		break;
	}
	return;
}

static void board_mmc_register(unsigned port)
{
	struct aml_card_sd_info *aml_priv=cpu_sd_emmc_get(port);

	if (aml_priv == NULL)
		return;

	aml_priv->sd_emmc_init=sd_emmc_init;
	aml_priv->sd_emmc_detect=sd_emmc_detect;
	aml_priv->sd_emmc_pwr_off=sd_emmc_pwr_off;
	aml_priv->sd_emmc_pwr_on=sd_emmc_pwr_on;
	aml_priv->sd_emmc_pwr_prepare=sd_emmc_pwr_prepare;
	aml_priv->desc_buf = malloc(NEWSD_MAX_DESC_MUN*(sizeof(struct sd_emmc_desc_info)));

	if (NULL == aml_priv->desc_buf)
		printf(" desc_buf Dma alloc Fail!\n");
	else
		printf("aml_priv->desc_buf = 0x%p\n",aml_priv->desc_buf);

	sd_emmc_register(aml_priv);
}

int board_mmc_init(bd_t	*bis)
{
#ifdef CONFIG_VLSI_EMULATOR
	//board_mmc_register(SDIO_PORT_A);
#else
	//board_mmc_register(SDIO_PORT_B);
#endif
	switch (get_boot_device())
	{
	case BOOT_DEVICE_EMMC:
		board_mmc_register(SDIO_PORT_C);	// "mmc0"
		board_mmc_register(SDIO_PORT_B);
		break;
	case BOOT_DEVICE_SD:
		board_mmc_register(SDIO_PORT_B);	// "mmc0"
		board_mmc_register(SDIO_PORT_C);
		break;
	default:
		printf("No available mmc device! Check boot device!\n");
		do_reset(NULL, 0, 0, NULL);
		break;
	}
	//	board_mmc_register(SDIO_PORT_B1);
	return 0;
}
#endif

#if defined(CONFIG_SYS_I2C_AML)
#include <aml_i2c.h>

struct aml_i2c_platform g_aml_i2c_plat = {
	.wait_count         = 1000000,
	.wait_ack_interval  = 5,
	.wait_read_interval = 5,
	.wait_xfer_interval = 5,
	.master_no          = AML_I2C_MASTER_AO,
	.use_pio            = 0,
	.master_i2c_speed   = AML_I2C_SPPED_400K,
	.master_ao_pinmux = {
		.scl_reg    = (unsigned long)MESON_I2C_MASTER_AO_GPIOAO_4_REG,
		.scl_bit    = MESON_I2C_MASTER_AO_GPIOAO_4_BIT,
		.sda_reg    = (unsigned long)MESON_I2C_MASTER_AO_GPIOAO_5_REG,
		.sda_bit    = MESON_I2C_MASTER_AO_GPIOAO_5_BIT,
	}
};

static void board_i2c_init(void)
{
	//disable all other pins which share with I2C_SDA_AO & I2C_SCK_AO
	clrbits_le32(P_AO_RTI_PIN_MUX_REG,
			(1 << 2) | (1 << 24) | (1 << 1) | (1 << 23));

	//enable I2C MASTER AO pins
	setbits_le32(P_AO_RTI_PIN_MUX_REG,
			(MESON_I2C_MASTER_AO_GPIOAO_4_BIT
			 | MESON_I2C_MASTER_AO_GPIOAO_5_BIT));

	udelay(10);

	//Amlogic I2C controller initialized
	//note: it must be call before any I2C operation
	aml_i2c_init();

	udelay(10);
}
#endif

#if defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void)
{
	return 0;
}
#endif

static void board_run_fastboot(void)
{
	run_command("fastboot", 0);
}

static void board_run_recovery(void)
{
	/*
	 * In case of recovery mode,
	 * bootargs should be updated with new modeline
	 */
	run_command("usb pwren", 0);
	run_command("hdmitx edid", 0);
	run_command("setenv bootargs ${bootargs} modeline=${modeline}", 0);

	run_command("movi read dtb 0 ${dtb_mem_addr}", 0);
	run_command("movi read recovery 0 ${loadaddr}", 0);
	run_command("bootm ${load_addr}", 0);
}

void board_get_mmc_size(void)
{
	char str[3];
	unsigned int actual_size = get_mmc_size();
	unsigned int card_size, result;
	unsigned char i=0;

	while (1) {
		card_size = (8 << i);
		result = actual_size / card_size;

		if (1 > result)		break;
		else if (10 < i)	break;
		else	i++;
	}

	sprintf(str, "%d", card_size);
	if (card_size < 128) 	str[2] = '\0';

	setenv("mmc_size", str);

	printf("----------------------------------\n");
	printf("MMC Size : %d GB\n", card_size);
	printf("----------------------------------\n");
}

#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
	int reboot_reason;

	board_partition_init();

	board_get_mmc_size();

#ifdef CONFIG_DISPLAY_LOGO
	run_command("showlogo 1080p60hz", 0);
#endif

	board_identity();

	reboot_reason = board_reboot_reason();
	if (ODROID_REBOOT_CMD_FASTBOOT == reboot_reason)
		board_run_fastboot();
	else if (ODROID_REBOOT_CMD_RECOVERY == reboot_reason)
		board_run_recovery();

	/* UPS Power latch */
	gpio_request(GPIO_UPS_POWER_LATCH, "ups power latch");
	gpio_direction_output(GPIO_UPS_POWER_LATCH, 1);

	return 0;
}
#endif

#if defined(CONFIG_USB_DWC_OTG_HCD)
#include <asm/arch/usb.h>

static void callback_otg_power(char power)
{
	gpio_direction_output(GPIO_OTG_PWREN, power);
}

static void callback_host_power(char power)
{
	gpio_direction_output(GPIO_USB_PWREN, power);
}

static struct amlogic_usb_config usb_config0 = {
	.clk_selecter	= USB_PHY_CLK_SEL_XTAL,
	.pll_divider	= 1,
	.base_addr	= CONFIG_M8_USBPORT_BASE_A,
	.id_mode	= USB_ID_MODE_SW_HOST,
	.set_vbus_power	= callback_otg_power,
};

static struct amlogic_usb_config usb_config1= {
	.clk_selecter	= USB_PHY_CLK_SEL_XTAL,
	.pll_divider	= 1,
	.base_addr	= CONFIG_M8_USBPORT_BASE_B,
	.id_mode	= USB_ID_MODE_SW_HOST,
	.set_vbus_power	= callback_host_power,
};

struct amlogic_usb_config *amlogic_usb_config(int port)
{
	if (0 == port)
		return &usb_config0;
	else if (1 == port)
		return &usb_config1;

	return NULL;
}
#endif

int board_init(void)
{
	board_print_info();

	/* T-Flash Init voltage : T-Flash I/O 3.3V, T-Flash mem 3.3V */
	gpio_request(GPIO_TF1V8, "TF_1V8");
	gpio_direction_output(GPIO_TF1V8, 0);
	gpio_request(GPIO_TF3V3, "TF_3V3");
	gpio_direction_output(GPIO_TF3V3, 1);

	/* LED: SYSLED (Blue color) */
	gpio_request(GPIO_BLUELED, "blueled");
	gpio_direction_output(GPIO_BLUELED, 0);

	/*
	 * USB Host: RST_N for GL852
	 * Off by default, On when USB HOST is activated
	 */
	gpio_request(GPIO_USB_PWREN, "usb_pwren");
	gpio_direction_output(GPIO_USB_PWREN, 0);

	/*
	 * USB OTG: Power 
	 * Off by default, On when USB OTG is activated
	 */
	gpio_request(GPIO_OTG_PWREN, "otg_pwren");
	gpio_direction_output(GPIO_OTG_PWREN, 0);

#if defined(CONFIG_USB_DWC_OTG_HCD)
	amlogic_usb_init(&usb_config0, BOARD_USB_MODE_SLAVE);
	amlogic_usb_init(&usb_config1, BOARD_USB_MODE_HOST);
#endif

#ifdef CONFIG_AML_VPU
	vpu_probe();
#endif

#ifdef CONFIG_AML_HDMITX20
	hdmi_tx_init();
#endif

	return 0;
}

phys_size_t get_effective_memsize(void)
{
	phys_size_t phys_size = (readl(AO_SEC_GP_CFG0) & 0xFFFF0000) << 4;

#if defined(CONFIG_SYS_MEM_TOP_HIDE)
	phys_size -= CONFIG_SYS_MEM_TOP_HIDE;
#endif

	return phys_size;
}

#ifdef CONFIG_MULTI_DTB
int checkhw(char * name)
{
	unsigned int ddr_size=0;
	char loc_name[64] = {0};
	int i;

	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
		ddr_size += gd->bd->bi_dram[i].size;
	}

#if defined(CONFIG_SYS_MEM_TOP_HIDE)
	ddr_size += CONFIG_SYS_MEM_TOP_HIDE;
#endif

	switch (ddr_size) {
	case 0x80000000:
		strcpy(loc_name, "odroidc2_2g\0");
		break;
	case 0x40000000:
		strcpy(loc_name, "odroidc2_1g\0");
		break;
	case 0x2000000:
		strcpy(loc_name, "odroidc2_512m\0");
		break;
	default:
		//printf("DDR size: 0x%x, multi-dt doesn't support\n", ddr_size);
		strcpy(loc_name, "odroidc2_unsupport");
		break;
	}

	strcpy(name, loc_name);
	setenv("aml_dt", loc_name);

	return 0;
}
#endif