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2018-11-21mips: Remove default endiannesHEADci20-v2013.10Ezequiel Garcia1-3/+0
Currently, trying to build ci20_mmc fails on little-endian toolchains. The problem seems to be that some targets don't have CONFIG_SYS_LITTLE_ENDIAN properly set, and therefore the default -EB switch is selected. Let's get rid of the default switch entirely, and fix this problem. While this may be a hack, it is a quick solution until U-Boot gets CI20 proper support. make ARCH=mips CROSS_COMPILE=mips-linux-gnu- ci20_mmc Configuring for ci20_mmc - Board: ci20, Options: SPL_MMC_SUPPORT,ENV_IS_IN_MMC make make[1]: Entering directory '/home/zeta/repos/u-boot-ci20' Generating include/ Generating include/ mips-linux-gnu-gcc: error: may not use both -EB and -EL mips-linux-gnu-gcc: error: may not use both -EB and -EL Generating include/ mips-linux-gnu-gcc: error: may not use both -EB and -EL Generating include/ mips-linux-gnu-gcc: error: may not use both -EB and -EL mips-linux-gnu-gcc -DDO_DEPS_ONLY \ -g -Os -ffunction-sections -fdata-sections -D__KERNEL__ -I/home/zeta/repos/u-boot-ci20/include -fno-builtin -ffreestanding -nostdinc -isystem /home/zeta/repos/buildroot/mips/output/host/opt/ext-toolchain/bin/../lib/gcc/mips-linux-gnu/5.3.0/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -EB -msoft-float -fpic -mabicalls -march=mips32 -mabi=32 -DCONFIG_32BIT -mno-branch-likely -Wall -Wstrict-prototypes \ -o lib/asm-offsets.s lib/asm-offsets.c -c -S if [ -f arch/mips/cpu/xburst/jz4780/asm-offsets.c ];then \ mips-linux-gnu-gcc -DDO_DEPS_ONLY \ -g -Os -ffunction-sections -fdata-sections -D__KERNEL__ -I/home/zeta/repos/u-boot-ci20/include -fno-builtin -ffreestanding -nostdinc -isystem /home/zeta/repos/buildroot/mips/output/host/opt/ext-toolchain/bin/../lib/gcc/mips-linux-gnu/5.3.0/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -EB -msoft-float -fpic -mabicalls -march=mips32 -mabi=32 -DCONFIG_32BIT -mno-branch-likely -Wall -Wstrict-prototypes \ -o arch/mips/cpu/xburst/jz4780/asm-offsets.s arch/mips/cpu/xburst/jz4780/asm-offsets.c -c -S; \ else \ touch arch/mips/cpu/xburst/jz4780/asm-offsets.s; \ fi mips-linux-gnu-gcc: error: may not use both -EB and -EL make[1]: *** [Makefile:747: lib/asm-offsets.s] Error 1 make[1]: *** Waiting for unfinished jobs.... make[1]: Leaving directory '/home/zeta/repos/u-boot-ci20' make: *** [.boards.depend:463: ci20_mmc] Error 2 Signed-off-by: Ezequiel Garcia <>
2017-07-24Merge pull request #15 from malaterre/ci20-v2013.10_GCC6Zubair Lutfullah Kakakhel7-196/+546
Ci20 v2013.10 gcc6
2017-07-05compiler*.h: sync include/linux/compiler*.h with Linux 4.5-rc6Tom Rini6-235/+383
Copy these from Linux v4.5-rc6 tag. This is needed so that we can keep up with newer gcc versions. Note that we don't have the uapi/ hierarchy from the kernel so continue to use <linux/types.h> Signed-off-by: Tom Rini <>
2017-07-05compiler_gcc: prevent redefining attributesJeroen Hofstee1-0/+10
The libc headers on FreeBSD and likely related projects as well contain an header file, cdefs.h which provides similiar functionality as linux/compiler.h. It provides compiler independent defines like __weak __packed, to allow compiling with multiple compilers which might have a different syntax for such extension. Since that header file is included in multiple standard headers, like stddef.h and stdarg.h, multiple definitions of those defines will be present if both are included. When compiling u-boot the compiler will warn about it hundreds of times since e.g. common.h will include both files indirectly. commit 7ea50d52849fe8ffa5b5b74c979b60b1045d6fc9 "compiler_gcc: do not redefine __gnu_attributes" prevented such redefinitions, but this was undone by commit fb8ffd7cfc68b3dc44e182356a207d784cb30b34 "compiler*.h: sync include/linux/compiler*.h with Linux 3.16". Add the checks back where necessary to prevent such warnings. As the original patch this checkpatch warning is ignored: "WARNING: Adding new packed members is to be done with care" Cc: Masahiro Yamada <> Cc: Tom Rini <> Signed-off-by: Jeroen Hofstee <> Acked-by: Masahiro Yamada <>
2017-07-05compiler*.h: sync include/linux/compiler*.h with Linux 3.16Masahiro Yamada6-44/+236
Copy them from Linux v3.16 tag. My main motivation of this commit is to add compiler-clang.h. Signed-off-by: Masahiro Yamada <> Cc: Jeroen Hofstee <>
2016-04-04Merge pull request #13 from HarveyHunt/rw-bootargZubair Lutfullah Kakakhel1-2/+2
ci20: Add rw to common bootargs
2016-04-04ci20: Add rw to common bootargsHarvey Hunt1-2/+2
Building UBOOT for use on an SD card results in the kernel mounting the SD card rootfs as read only, due to "rw" not being in the bootargs. Fix this by setting "rw" for both NAND and SD card configs. Signed-off-by: Harvey Hunt <>
2015-09-15Merge pull request #11 from 0intro/ci20-v2013.10Matt Redfearn4-11/+75
Fix build with GCC 5.x
2015-09-11MIPS: change 'extern inline' to 'static inline'Daniel Schwierzeck2-9/+9
The kernel changed it a long time ago. Also this is now broken on gcc-5.x. Reported-by: Andy Kennedy <> Signed-off-by: Daniel Schwierzeck <>
2015-09-11Add linux/compiler-gcc5.h to fix builds with gcc5Hans de Goede1-0/+65
Add linux/compiler-gcc5/h from the kernel sources at: commit 5631b8fba640a4ab2f8a954f63a603fa34eda96b Author: Steven Noonan <> Date: Sat Oct 25 15:09:42 2014 -0700 compiler/gcc4+: Remove inaccurate comment about 'asm goto' miscompiles Signed-off-by: Hans de Goede <>
2015-09-11common: main.c: make show_boot_progress __weakJeroen Hofstee1-2/+1
This not only looks a bit better it also prevents a warning with W=1 (no previous prototype). Signed-off-by: Jeroen Hofstee <> Acked-by: Simon Glass <>
2015-09-01Merge pull request #9 from mpredfearn/ci20-v2013.10-boot-timeZubairLK2-6/+8
Ci20 v2013.10 make boot partition 32mb to boot time and some optimizations
2015-09-01ci20: Reduce boot partition to 64MbMatt Redfearn1-1/+1
Signed-off-by: Matt Redfearn <>
2015-09-01ext4fs: fix "invalid extent block" errorIonut Nicu1-1/+1
For files where we actually have extent indexes following an extent header (ext_block->eh_depth != 0), the do/while loop from ext4fs_get_extent_block() does not select the proper extent index structure. For example, if we have: ext_block->eh_depth = 1 ext_block->eh_entries = 1 fileblock = 0 index[0].ei_block = 0 the do/while loop will exit with i set to 0 and the ext4fs_get_extent_block() function will return 0, even if there was a valid extent index structure following the header. Signed-off-by: Ionut Nicu <> Signed-off-by: Mathias Rulf <>
2015-08-28ci20: Reduce bootwait and quieten kernelMatt Redfearn1-2/+3
Reduce the bootwait time to 1 second Add quiet to the default kernel arguments. This makes the kernel boot much quicker when it isn't writing to the the console Signed-off-by: Matt Redfearn <>
2015-08-28ci20: Add 128Mb boot partitionMatt Redfearn1-3/+4
Improve boot time by making /boot a separate partition This means that uboot only has to scan the small boot partition And it doesn't delete the UBI fastmount volume on the system partition Signed-off-by: Matt Redfearn <>
2015-08-26Add board serial number to kernel command lineChris Dearman1-5/+13
Also use snprintf to avoid possible buffer overruns Change-Id: I7b96364f077a4b2c312eaabdbca2eb2f6a87ff5e
2015-08-26Refactor linux command line parsingChris Dearman1-12/+11
This allows the bootcmd environment to be appended to the command line extracted from the Android boot image. Change-Id: Ieb383d957025fd2f0b493ca3d61c5785fceb9f98
2015-08-26Make boota more functionalChris Dearman2-69/+59
* Use the kernel & ramdisk destinations specified in the header if they look sensible * Use the kernel command line options from the boot image to initialise the kernel arguments Change-Id: I964e9bd9abeaff89b62299772d8d053bbf473258
2015-08-26Add boota (Android boot command) to U-Boot.Chris Larsen6-0/+544
- boota takes the memory address of the image to be loaded (in hex).
2015-08-25Merge branch 'ci20-chromiumos' into ci20-v2013.10Matt Redfearn5-5/+292
Merge ChromiumOS fixes: - Implementation of "reset" commmand - Build SPL with -mno-abicalls and -fomit-frame-pointer Signed-off-by: Matt Redfearn <>
2015-08-20Merge pull request #8 from mpredfearn/ci20-v2013.10-revision-detectZubairLK5-5/+12
jz4780: sdram: Make PHY pullup / pulldown board specific
2015-08-20jz4780: sdram: Make PHY pullup / pulldown board specificMatt Redfearn5-5/+12
v1 boards with the Hynix RAM should have a different pullup impedance set to v2 boards with the Samsung RAM. This patch makes the pullup / pulldown values device specific and removes the constant from the Ci20 config Signed-off-by: Matt Redfearn <>
2015-08-19Merge pull request #7 from mpredfearn/ci20-v2013.10-revision-detectZubairLK6-234/+367
Ci20 v2013.10 revision detect
2015-08-18jz4780: sdram: Fix comment styleMatt Redfearn1-10/+10
Replace C99 comment style. Signed-off-by: Matt Redfearn <>
2015-08-17Remove print support as it no longer fitsMatt Redfearn1-4/+0
Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: Select RAM device and apply settings from structureMatt Redfearn1-226/+62
Replace calculation of DDR parameters from header files with the pre-determined register values in the configuration structure. This is not as portable because the settings must be determined and hard-coded, however, it was necessary to allow selection of different RAM devices at runtime, and free's up some storage for additional device parameters if they become necessary. Signed-off-by: Matt Redfearn <>
2015-08-17Make revision detection a function rather than settingMatt Redfearn1-6/+8
a global flag as global data does not work in the SPL Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: Enable K4B2G0846Q RAM device in configurationMatt Redfearn1-0/+1
Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: Set up RAM device settingsMatt Redfearn2-6/+122
Set up a structure of device settings for each of the in use RAM devices Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: Add common ddr parametersMatt Redfearn1-0/+73
Add a header containing DDR constants that are common to both RAM chips in use on the Ci20, and a structure to define per-RAM device settings Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: add sdram config for samsung partMatt Redfearn2-0/+94
Signed-off-by: Ian Pozella <> Signed-off-by: Matt Redfearn <>
2015-08-17jz4780: apply DQS changes to ddr configMatt Redfearn2-1/+16
The ddr phy used in the soc has a silicon bug which affects DQS gating. This patch enables DQS gate early and DQS gate extension and sets the DQSRES pull-up and pull-down resistors values to 500R to get round the issue. Signed-off-by: Ian Pozella <> Signed-off-by: Matt Redfearn <>
2015-07-24Merge pull request #6 from aejsmith/ci20-v2013.10-bootargsZubairLK3-11/+16
Update default configuration for 3.18
2015-07-16Merge pull request #5 from mpredfearn/ci20-v2013.10-revision-detectZubairLK2-1/+33
Ci20 v2013.10 revision detect
2015-07-15jz4780: Placeholder for refering to ci20 revisionMatt Redfearn1-0/+5
If u-boot is configured for the Ci20 board, access the ci20_revision Ideally I guess, SDRAM initialisation would be board specific, not SoC Signed-off-by: Matt Redfearn <>
2015-07-15ci20: Detect board revisionMatt Redfearn1-1/+28
Read the pull-downs on port C pins 18/19 to determine board revision. Export this in global variable for other things Signed-off-by: Matt Redfearn <>
2015-07-07ci20: Update default configuration for 3.18 kernelAlex Smith1-7/+9
For the 3.18 kernel a number of configuration changes need to be made. These are as follows: * We have added a command line option as a temporary method to pass the Ethernet MAC address to the kernel. Add this to the default command line. Since U-Boot won't substitute variables inside the bootargs string, we change the default boot command to run a command to append the MAC address to the bootargs variable, which will perform variable substitution when executed. * Add rootwait to the kernel command line, which is necessary to avoid a kernel panic at boot if the kernel attempts to mount the root FS before the root device driver has been probed. * Correct UBI system partition index to 3 in default NAND command line. * Change the default kernel path to uImage rather than vmlinux.img, as this is the name the Debian kernel packages install the kernel as. Signed-off-by: Alex Smith <>
2015-07-06HACK: nand: check explicitly for 0x00 as the factory BBM rather than != 0xffAlex Smith2-2/+5
This is a hack to avoid any potential problems with factory bad block marker identification. The NAND chip that we have uses a zero byte in the first OOB location of the first page of a bad block as the BBM (this is also in line with Factory Defect Mapping requirements in the the ONFI specification). However U-Boot will take any byte that is not 0xff to be a bad block. While the chips should be factory erased, Ingenic have been testing on chips that are not erased, and U-Boot mistakenly identifies most of the blocks on the chip as bad. Avoid this by testing explicitly for a zero byte.
2015-07-06ci20: enable JTAG by defaultZubair Lutfullah Kakakhel1-1/+1
JTAG is disabled by default. Trivial fix to enable it by default. Signed-off-by: Zubair Lutfullah Kakakhel <>
2015-07-06ci20: Change kernel bootargs to default to ttyS4Zubair Lutfullah Kakakhel1-1/+1
ttyS4 goes on the dedicated white UART header on the CI20. Linux Kernel cannot handle serial output during boot to multiple ttySx sources. Default to ttyS4. Signed-off-by: Zubair Lutfullah Kakakhel <>
2015-07-06ci20: Update default uart to ttyS4Zubair Lutfullah Kakakhel1-1/+1
ttyS4 is the dedicated uart header on the ci20. CONFIG_CONS_INDEX starts from 1 so 5 points to ttyS4. Signed-off-by: Zubair Lutfullah Kakakhel <>
2015-06-29Merge pull request #4 from aejsmith/ci20-v2013.10-otpZubairLK1-1/+1
ci20: Fix garbage in board_mfr environment string
2015-06-29ci20: Fix garbage in board_mfr environment stringAlex Smith1-1/+1
The manufacturer string was copied out of the OTP into a temporary buffer and null-terminated, but then the board_mfr variable was set from the original, non-terminated string, resulting in garbage data in the variable. Fix this. Signed-off-by: Alex Smith <>
2015-05-21Fix U-Boot shell command "reset" to actually reset the CI20 board.ci20-chromiumosChris Larsen4-2/+289
2015-05-21MIPS: Build SPL with -mno-abicalls and -fomit-frame-pointerJames Cowgill1-3/+3
Without these options on some toolchains, the SPL can become too large to fit in the small amount of memory it has and the link fails. Thanks to Jaret Cantu for the previous version of this patch. Signed-off-by: James Cowgill <>
2014-07-11ci20: enable output on UART4Alex Smith1-5/+6
Enable output on UART4 (the separate UART header on the board). Signed-off-by: Alex Smith <>
2014-07-11mips: jz4780: add pin configuration for UART4Alex Smith1-1/+5
Signed-off-by: Alex Smith <>
2014-07-08ci20: add a writespl commandPaul Burton3-8/+160
2014-07-08ci20: add support for the Imagination CI20Paul Burton6-0/+587
This is a developer board based around the Ingenic XBurst JZ4780 SoC.