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authorAnand Balagopalakrishnan <anandb@ti.com>2016-02-11 11:32:23 +0300
committerAnand Balagopalakrishnan <anandb@ti.com>2016-02-11 11:38:05 +0300
commitcb46ba4d0c900f89f7ec0284f9803d476bfa98de (patch)
treea8265673855fbd7685514676a8aca8de559fee84
parent1450ae2166ad952ef30197e79518b51577a629e6 (diff)
downloadomap5-sgx-ddk-linux-img-sgx.tar.xz
IMG DDK 1.14 ED3699939img-sgx
Signed-off-by: Anand Balagopalakrishnan <anandb@ti.com>
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-rw-r--r--eurasia_km/services4/srvkm/env/linux/private_data.h (renamed from services4/srvkm/env/linux/private_data.h)36
-rw-r--r--eurasia_km/services4/srvkm/env/linux/proc.c (renamed from services4/srvkm/env/linux/proc.c)792
-rw-r--r--eurasia_km/services4/srvkm/env/linux/proc.h (renamed from services4/srvkm/env/linux/proc.h)110
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_bridge_k.c (renamed from services4/srvkm/env/linux/pvr_bridge_k.c)38
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_debug.c (renamed from services4/srvkm/env/linux/pvr_debug.c)232
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_drm.c (renamed from services4/srvkm/env/linux/pvr_drm.c)411
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_drm.h (renamed from services4/srvkm/env/linux/pvr_drm.h)96
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_sync.c1766
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_sync.h78
-rw-r--r--eurasia_km/services4/srvkm/env/linux/pvr_uaccess.h (renamed from services4/srvkm/env/linux/pvr_uaccess.h)0
-rw-r--r--eurasia_km/services4/srvkm/env/linux/systrace.c282
-rw-r--r--eurasia_km/services4/srvkm/env/linux/systrace.h68
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/mnemedefs.h117
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/ocpdefs.h (renamed from services4/srvkm/hwdefs/ocpdefs.h)0
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx520defs.h555
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx530defs.h (renamed from services4/srvkm/hwdefs/sgx530defs.h)0
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx531defs.h601
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx535defs.h739
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx540defs.h (renamed from services4/srvkm/hwdefs/sgx540defs.h)0
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx543_v1.164defs.h1396
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx543defs.h1487
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx544defs.h (renamed from services4/srvkm/hwdefs/sgx544defs.h)0
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgx545defs.h1290
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgxdefs.h (renamed from services4/srvkm/hwdefs/sgxdefs.h)4
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgxerrata.h (renamed from services4/srvkm/hwdefs/sgxerrata.h)125
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgxfeaturedefs.h (renamed from services4/srvkm/hwdefs/sgxfeaturedefs.h)37
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgxmmu.h (renamed from services4/srvkm/hwdefs/sgxmmu.h)0
-rw-r--r--eurasia_km/services4/srvkm/hwdefs/sgxmpdefs.h (renamed from services4/srvkm/hwdefs/sgxmpdefs.h)22
-rw-r--r--eurasia_km/services4/srvkm/include/buffer_manager.h (renamed from services4/srvkm/include/buffer_manager.h)31
-rw-r--r--eurasia_km/services4/srvkm/include/device.h (renamed from services4/srvkm/include/device.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/devicemem.h52
-rw-r--r--eurasia_km/services4/srvkm/include/dmabuf_sync.h73
-rw-r--r--eurasia_km/services4/srvkm/include/handle.h (renamed from services4/srvkm/include/handle.h)26
-rw-r--r--eurasia_km/services4/srvkm/include/hash.h (renamed from services4/srvkm/include/hash.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/ion_sync.h73
-rw-r--r--eurasia_km/services4/srvkm/include/lists.h (renamed from services4/srvkm/include/lists.h)4
-rw-r--r--eurasia_km/services4/srvkm/include/metrics.h (renamed from services4/srvkm/include/metrics.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/osfunc.h (renamed from services4/srvkm/include/osfunc.h)131
-rw-r--r--eurasia_km/services4/srvkm/include/osperproc.h (renamed from services4/srvkm/include/osperproc.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/pdump_int.h (renamed from services4/srvkm/include/pdump_int.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/pdump_km.h (renamed from services4/srvkm/include/pdump_km.h)11
-rw-r--r--eurasia_km/services4/srvkm/include/pdump_osfunc.h (renamed from services4/srvkm/include/pdump_osfunc.h)60
-rw-r--r--eurasia_km/services4/srvkm/include/perfkm.h (renamed from services4/srvkm/include/perfkm.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/perproc.h (renamed from services4/srvkm/include/perproc.h)9
-rw-r--r--eurasia_km/services4/srvkm/include/power.h (renamed from services4/srvkm/include/power.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/queue.h (renamed from services4/srvkm/include/queue.h)21
-rw-r--r--eurasia_km/services4/srvkm/include/ra.h (renamed from services4/srvkm/include/ra.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/refcount.h (renamed from services4/srvkm/include/refcount.h)87
-rw-r--r--eurasia_km/services4/srvkm/include/resman.h (renamed from services4/srvkm/include/resman.h)1
-rw-r--r--eurasia_km/services4/srvkm/include/services_headers.h (renamed from services4/srvkm/include/services_headers.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/srvkm.h273
-rw-r--r--eurasia_km/services4/srvkm/include/ttrace.h (renamed from services4/srvkm/include/ttrace.h)0
-rw-r--r--eurasia_km/services4/srvkm/include/ttrace_common.h (renamed from services4/srvkm/include/ttrace_common.h)5
-rw-r--r--eurasia_km/services4/srvkm/include/ttrace_tokens.h (renamed from services4/srvkm/include/ttrace_tokens.h)66
-rw-r--r--eurasia_km/services4/system/cedarview_linux/oemfuncs.h59
-rw-r--r--eurasia_km/services4/system/cedarview_linux/sysconfig.c1431
-rw-r--r--eurasia_km/services4/system/cedarview_linux/sysconfig.h97
-rw-r--r--eurasia_km/services4/system/cedarview_linux/sysinfo.h94
-rw-r--r--eurasia_km/services4/system/cedarview_linux/sysutils.c241
-rw-r--r--eurasia_km/services4/system/cedarview_linux/sysutils.h168
-rw-r--r--eurasia_km/services4/system/include/syscommon.h (renamed from services4/system/include/syscommon.h)4
-rw-r--r--eurasia_km/services4/system/omap/oemfuncs.h (renamed from services4/system/omap4/oemfuncs.h)0
-rw-r--r--eurasia_km/services4/system/omap/sysconfig.c (renamed from services4/system/omap4/sysconfig.c)77
-rw-r--r--eurasia_km/services4/system/omap/sysconfig.h (renamed from services4/system/omap5/sysconfig.h)57
-rw-r--r--eurasia_km/services4/system/omap/sysinfo.h (renamed from services4/system/omap4/sysinfo.h)6
-rw-r--r--eurasia_km/services4/system/omap/syslocal.h (renamed from services4/system/omap4/syslocal.h)11
-rw-r--r--eurasia_km/services4/system/omap/sysutils.c (renamed from services4/system/omap5/sysutils.c)5
-rw-r--r--eurasia_km/services4/system/omap/sysutils_linux.c (renamed from services4/system/omap4/sysutils_linux.c)83
-rw-r--r--eurasia_km/services4/system/poulsbo/oemfuncs.h97
-rw-r--r--eurasia_km/services4/system/poulsbo/sysconfig.c2005
-rw-r--r--eurasia_km/services4/system/poulsbo/sysconfig.h141
-rw-r--r--eurasia_km/services4/system/poulsbo/sysinfo.h53
-rw-r--r--eurasia_km/services4/system/poulsbo/syslocal.h119
-rw-r--r--eurasia_km/services4/system/poulsbo/sysutils.c104
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/oemfuncs.h97
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/sysconfig.c949
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/sysconfig.h80
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/sysinfo.h54
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/syslocal.h160
-rw-r--r--eurasia_km/services4/system/sgx_jz4780/sysutils.c405
-rw-r--r--eurasia_km/services4/system/sgx_nohw/oemfuncs.h96
-rw-r--r--eurasia_km/services4/system/sgx_nohw/sysconfig.c787
-rw-r--r--eurasia_km/services4/system/sgx_nohw/sysconfig.h77
-rw-r--r--eurasia_km/services4/system/sgx_nohw/sysinfo.h54
-rw-r--r--eurasia_km/services4/system/sgx_nohw/sysutils.c (renamed from services4/system/omap4/sysutils.c)11
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/apollo_tcfdefs.h1650
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/oemfuncs.h97
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/sysconfig.c1668
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/sysconfig.h151
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/sysinfo.h129
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/syslocal.h107
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/sysutils.c648
-rw-r--r--eurasia_km/services4/system/sgx_pc_i686_tc3/tcfdefs.h56
-rw-r--r--eurasia_km/services4/system/sunxi/oemfuncs.h (renamed from services4/system/omap5/oemfuncs.h)2
-rw-r--r--eurasia_km/services4/system/sunxi/sysconfig.c (renamed from services4/system/omap5/sysconfig.c)229
-rw-r--r--eurasia_km/services4/system/sunxi/sysconfig.h (renamed from services4/system/omap4/sysconfig.h)49
-rw-r--r--eurasia_km/services4/system/sunxi/sysinfo.h (renamed from services4/system/omap5/sysinfo.h)8
-rw-r--r--eurasia_km/services4/system/sunxi/syslocal.h (renamed from services4/system/omap5/syslocal.h)89
-rw-r--r--eurasia_km/services4/system/sunxi/sysutils.c45
-rw-r--r--eurasia_km/services4/system/sunxi/sysutils_linux.c509
-rw-r--r--eurasia_km/tools/intern/debug/client/linuxsrv.h (renamed from tools/intern/debug/client/linuxsrv.h)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/Kbuild.mk (renamed from tools/intern/debug/dbgdriv/Kbuild.mk)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/Linux.mk (renamed from tools/intern/debug/dbgdriv/Linux.mk)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/dbgdriv.c (renamed from tools/intern/debug/dbgdriv/common/dbgdriv.c)12
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/dbgdriv.h (renamed from tools/intern/debug/dbgdriv/common/dbgdriv.h)2
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/dbgdriv_ioctl.h (renamed from tools/intern/debug/dbgdriv/common/dbgdriv_ioctl.h)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/handle.c (renamed from tools/intern/debug/dbgdriv/common/handle.c)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/hostfunc.h (renamed from tools/intern/debug/dbgdriv/common/hostfunc.h)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/hotkey.c (renamed from tools/intern/debug/dbgdriv/common/hotkey.c)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/hotkey.h (renamed from tools/intern/debug/dbgdriv/common/hotkey.h)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/common/ioctl.c (renamed from tools/intern/debug/dbgdriv/common/ioctl.c)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/linux/hostfunc.c (renamed from tools/intern/debug/dbgdriv/linux/hostfunc.c)0
-rw-r--r--eurasia_km/tools/intern/debug/dbgdriv/linux/main.c (renamed from tools/intern/debug/dbgdriv/linux/main.c)1
-rwxr-xr-xeurasiacon/build/linux2/common/omap5.mk47
-rwxr-xr-xeurasiacon/build/linux2/omap5430_linux/Makefile219
-rw-r--r--services4/srvkm/include/srvkm.h129
-rw-r--r--services4/system/omap5/sysutils_linux.c886
293 files changed, 49031 insertions, 10683 deletions
diff --git a/GPL-COPYING b/eurasia_km/GPL-COPYING
index 83d1261..83d1261 100644
--- a/GPL-COPYING
+++ b/eurasia_km/GPL-COPYING
diff --git a/INSTALL b/eurasia_km/INSTALL
index aefa6c3..aefa6c3 100644
--- a/INSTALL
+++ b/eurasia_km/INSTALL
diff --git a/MIT-COPYING b/eurasia_km/MIT-COPYING
index 0cbd14e..0cbd14e 100644
--- a/MIT-COPYING
+++ b/eurasia_km/MIT-COPYING
diff --git a/README b/eurasia_km/README
index 2eae109..2eae109 100644
--- a/README
+++ b/eurasia_km/README
diff --git a/eurasiacon/build/linux2/bits.mk b/eurasia_km/eurasiacon/build/linux2/bits.mk
index a1a7eef..d04aa7b 100644
--- a/eurasiacon/build/linux2/bits.mk
+++ b/eurasia_km/eurasiacon/build/linux2/bits.mk
@@ -79,6 +79,7 @@ help:
@echo ' make, make build Build all components of the build'
@echo ' make components Build only the user-mode components'
@echo ' make kbuild Build only the kernel-mode components'
+ @echo ' make docs Build the build's supporting documentation'
@echo ' make MODULE Build the module MODULE and all of its dependencies'
@echo ' make eurasiacon/binary2_.../target/libsomething.so'
@echo ' Build a particular file (including intermediates)'
@@ -104,9 +105,11 @@ ifneq ($(filter help,$(D)),)
empty :=
space := $(empty) $(empty)
$(info Debug options)
-$(info $(space)D=modules dump module info)
-$(info $(space)D=freeze-config prevent config changes)
-$(info $(space)D=config-changes dump diffs when config changes)
-$(info Options may be combined: make D=freeze-config,config-changes)
+$(info $(space)D=modules dump module info)
+$(info $(space)D=config dump all config options + type and origin)
+$(info $(space)D=freeze-config prevent config changes)
+$(info $(space)D=config-changes dump diffs when config changes)
+$(info $(space)D=nobuild stop before running the main build)
+$(info Options can be combined: make D=freeze-config,config-changes)
$(error D=help given)
endif
diff --git a/eurasiacon/build/linux2/buildvars.mk b/eurasia_km/eurasiacon/build/linux2/buildvars.mk
index f3f5acc..bb775e3 100644
--- a/eurasiacon/build/linux2/buildvars.mk
+++ b/eurasia_km/eurasiacon/build/linux2/buildvars.mk
@@ -42,12 +42,32 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
### ###########################################################################
+# NOTE: You must *not* use the cc-option et al macros in COMMON_FLAGS,
+# COMMON_CFLAGS or COMMON_USER_FLAGS. These flags are shared between
+# host and target, which might use compilers with different capabilities.
+
+# These flags are used for kernel, User C and User C++
+#
+COMMON_FLAGS := -W -Wall
+
+# Some GCC warnings are C only, so we must mask them from C++
+#
+COMMON_CFLAGS := $(COMMON_FLAGS) \
+ -Wdeclaration-after-statement -Wno-format-zero-length \
+ -Wmissing-prototypes -Wstrict-prototypes
+
+# User C and User C++ optimization control. Does not affect kernel.
+#
ifeq ($(BUILD),debug)
-COMMON_USER_FLAGS := -Os
+COMMON_USER_FLAGS := -O0
else
OPTIM ?= -O2
+ifeq ($(USE_LTO),1)
+COMMON_USER_FLAGS := $(OPTIM) -flto
+else
COMMON_USER_FLAGS := $(OPTIM)
endif
+endif
# FIXME: We should probably audit the driver for aliasing
#
@@ -58,26 +78,40 @@ COMMON_USER_FLAGS += -fno-strict-aliasing
#
COMMON_USER_FLAGS += -g
-# These flags are used for kernel, User C and User C++
+# User C and User C++ warning flags
#
-COMMON_FLAGS = -W -Wall
-
-# Some GCC warnings are C only, so we must mask them from C++
-#
-COMMON_CFLAGS := $(COMMON_FLAGS) \
- -Wdeclaration-after-statement -Wno-format-zero-length \
- -Wmissing-prototypes -Wstrict-prototypes
+COMMON_USER_FLAGS += \
+ -Wpointer-arith -Wunused-parameter \
+ -Wmissing-format-attribute
# Additional warnings, and optional warnings.
#
-WARNING_CFLAGS := \
- -Wpointer-arith -Wunused-parameter \
- -Wmissing-format-attribute \
+TESTED_TARGET_USER_FLAGS := \
$(call cc-option,-Wno-missing-field-initializers) \
- $(call cc-option,-fdiagnostics-show-option)
+ $(call cc-option,-fdiagnostics-show-option) \
+ $(call cc-option,-Wno-self-assign) \
+ $(call cc-option,-Wno-parentheses-equality)
+TESTED_HOST_USER_FLAGS := \
+ $(call host-cc-option,-Wno-missing-field-initializers) \
+ $(call host-cc-option,-fdiagnostics-show-option) \
+ $(call host-cc-option,-Wno-self-assign) \
+ $(call host-cc-option,-Wno-parentheses-equality)
+
+# These flags are clang-specific.
+# -Wno-unused-command-line-argument works around a buggy interaction
+# with ccache, see https://bugzilla.samba.org/show_bug.cgi?id=8118
+# -fcolor-diagnostics force-enables colored error messages which
+# get disabled when ccache is piped through ccache.
+#
+TESTED_TARGET_USER_FLAGS += \
+ $(call cc-option,-Qunused-arguments) \
+ $(call cc-option,-fcolor-diagnostics)
+TESTED_HOST_USER_FLAGS += \
+ $(call host-cc-option,-Qunused-arguments) \
+ $(call host-cc-option,-fcolor-diagnostics)
ifeq ($(W),1)
-WARNING_CFLAGS += \
+TESTED_TARGET_USER_FLAGS += \
$(call cc-option,-Wbad-function-cast) \
$(call cc-option,-Wcast-qual) \
$(call cc-option,-Wcast-align) \
@@ -97,19 +131,7 @@ WARNING_CFLAGS += \
$(call cc-option,-Wswitch-default) \
$(call cc-option,-Wvla) \
$(call cc-option,-Wwrite-strings)
-endif
-
-WARNING_CFLAGS += \
- $(call cc-optional-warning,-Wunused-but-set-variable)
-
-HOST_WARNING_CFLAGS := \
- -Wpointer-arith -Wunused-parameter \
- -Wmissing-format-attribute \
- $(call host-cc-option,-Wno-missing-field-initializers) \
- $(call host-cc-option,-fdiagnostics-show-option)
-
-ifeq ($(W),1)
-HOST_WARNING_CFLAGS += \
+TESTED_HOST_USER_FLAGS += \
$(call host-cc-option,-Wbad-function-cast) \
$(call host-cc-option,-Wcast-qual) \
$(call host-cc-option,-Wcast-align) \
@@ -131,12 +153,21 @@ HOST_WARNING_CFLAGS += \
$(call host-cc-option,-Wwrite-strings)
endif
-HOST_WARNING_CFLAGS += \
+TESTED_TARGET_USER_FLAGS += \
+ $(call cc-optional-warning,-Wunused-but-set-variable)
+TESTED_HOST_USER_FLAGS += \
$(call host-cc-optional-warning,-Wunused-but-set-variable)
-KBUILD_WARNING_CFLAGS := \
+KBUILD_FLAGS := \
-Wno-unused-parameter -Wno-sign-compare
-KBUILD_WARNING_CFLAGS += \
+
+TESTED_KBUILD_FLAGS := \
+ $(call kernel-cc-option,-Wmissing-include-dirs) \
+ $(call kernel-cc-option,-Wno-type-limits) \
+ $(call kernel-cc-option,-Wno-pointer-arith) \
+ $(call kernel-cc-option,-Wno-aggregate-return) \
+ $(call kernel-cc-option,-Wno-unused-but-set-variable) \
+ $(call kernel-cc-option,-Wno-old-style-declaration) \
$(call kernel-cc-optional-warning,-Wbad-function-cast) \
$(call kernel-cc-optional-warning,-Wcast-qual) \
$(call kernel-cc-optional-warning,-Wcast-align) \
@@ -161,22 +192,31 @@ KBUILD_WARNING_CFLAGS += \
# User C only
#
ALL_CFLAGS := \
- $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) $(WARNING_CFLAGS) \
+ $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) $(TESTED_TARGET_USER_FLAGS) \
$(SYS_CFLAGS)
-
ALL_HOST_CFLAGS := \
- $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) $(HOST_WARNING_CFLAGS)
+ $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) $(TESTED_HOST_USER_FLAGS)
# User C++ only
#
ALL_CXXFLAGS := \
- $(COMMON_USER_FLAGS) $(COMMON_FLAGS) \
-fno-rtti -fno-exceptions \
- -Wpointer-arith -Wunused-parameter \
+ $(COMMON_USER_FLAGS) $(COMMON_FLAGS) $(TESTED_TARGET_USER_FLAGS) \
$(SYS_CXXFLAGS)
-
ALL_HOST_CXXFLAGS := \
- $(COMMON_USER_FLAGS) $(COMMON_CFLAGS) -Wall
+ -fno-rtti -fno-exceptions \
+ $(COMMON_USER_FLAGS) $(COMMON_FLAGS) $(TESTED_HOST_USER_FLAGS)
+
+# Workaround for some target clangs that don't support -O0 w/ PIC.
+#
+ifeq ($(cc-is-clang),true)
+ALL_CFLAGS := $(patsubst -O0,-O1,$(ALL_CFLAGS))
+ALL_CXXFLAGS := $(patsubst -O0,-O1,$(ALL_CXXFLAGS))
+endif
+
+# Kernel C only
+#
+ALL_KBUILD_CFLAGS := $(COMMON_CFLAGS) $(KBUILD_FLAGS) $(TESTED_KBUILD_FLAGS)
# User C and C++
#
@@ -186,27 +226,28 @@ ALL_HOST_CXXFLAGS := \
# We can't use it right now because we want to support non-GNU-compatible
# linkers like the Darwin 'ld' which doesn't support -rpath-link.
#
+# For the same reason (Darwin 'ld') don't bother checking for text
+# relocations in host binaries.
+#
ALL_HOST_LDFLAGS := -L$(HOST_OUT)
-ALL_LDFLAGS := -L$(TARGET_OUT) -Xlinker -rpath-link=$(TARGET_OUT)
+ALL_LDFLAGS := \
+ -Wl,--warn-shared-textrel \
+ -L$(TARGET_OUT) -Xlinker -rpath-link=$(TARGET_OUT)
ifneq ($(strip $(TOOLCHAIN)),)
ALL_LDFLAGS += -L$(TOOLCHAIN)/lib -Xlinker -rpath-link=$(TOOLCHAIN)/lib
endif
+ifneq ($(strip $(TOOLCHAIN2)),)
+ALL_LDFLAGS += -L$(TOOLCHAIN2)/lib -Xlinker -rpath-link=$(TOOLCHAIN2)/lib
+endif
+
ifneq ($(strip $(LINKER_RPATH)),)
ALL_LDFLAGS += $(addprefix -Xlinker -rpath=,$(LINKER_RPATH))
endif
ALL_LDFLAGS += $(SYS_LDFLAGS)
-# Kernel C only
-#
-ALL_KBUILD_CFLAGS := $(COMMON_CFLAGS) $(KBUILD_WARNING_CFLAGS) \
- $(call kernel-cc-option,-Wno-type-limits) \
- $(call kernel-cc-option,-Wno-pointer-arith) \
- $(call kernel-cc-option,-Wno-aggregate-return) \
- $(call kernel-cc-option,-Wno-unused-but-set-variable)
-
# This variable contains a list of all modules built by kbuild
ALL_KBUILD_MODULES :=
diff --git a/eurasiacon/build/linux2/commands.mk b/eurasia_km/eurasiacon/build/linux2/commands.mk
index e92b237..cb92174 100644
--- a/eurasiacon/build/linux2/commands.mk
+++ b/eurasia_km/eurasiacon/build/linux2/commands.mk
@@ -55,22 +55,20 @@ endef
define target-o-from-one-c
$(if $(V),,@echo " CC " $(call relative-to-top,$<))
-$(CC) -MD -c $(MODULE_CFLAGS) $(MODULE_INCLUDE_FLAGS) \
+$(CC) -MD -c $(MODULE_CFLAGS) $(SYS_INCLUDES) $(MODULE_INCLUDE_FLAGS) \
-include $(CONFIG_H) $< -o $@
endef
-# We use $(CC) to compile C++ files, and expect it to detect that it's
-# compiling C++
define host-o-from-one-cxx
-$(if $(V),,@echo " HOST_CC " $(call relative-to-top,$<))
-$(HOST_CC) -MD -c $(MODULE_HOST_CXXFLAGS) $(MODULE_INCLUDE_FLAGS) \
- -include $(CONFIG_H) $< -o $@
+$(if $(V),,@echo " HOST_CXX" $(call relative-to-top,$<))
+$(HOST_CXX) -MD -c $(MODULE_HOST_CXXFLAGS) $(MODULE_INCLUDE_FLAGS) \
+ -include $(CONFIG_H) $< -o $@
endef
define target-o-from-one-cxx
-$(if $(V),,@echo " CC " $(call relative-to-top,$<))
-$(CC) -MD -c $(MODULE_CXXFLAGS) $(MODULE_INCLUDE_FLAGS) \
- -include $(CONFIG_H) $< -o $@
+$(if $(V),,@echo " CXX " $(call relative-to-top,$<))
+$(CXX) -MD -c $(MODULE_CXXFLAGS) $(SYS_INCLUDES) $(MODULE_INCLUDE_FLAGS) \
+ -include $(CONFIG_H) $< -o $@
endef
define host-executable-from-o
@@ -90,7 +88,7 @@ endef
define target-executable-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CC) \
- $(SYS_EXE_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_EXE_LDFLAGS) $(SYS_COMMON_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_EXE_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_EXE_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
@@ -98,7 +96,7 @@ endef
define target-executable-cxx-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CXX) \
- $(SYS_EXE_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_EXE_LDFLAGS_CXX) $(SYS_EXE_LDFLAGS) $(SYS_COMMON_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_EXE_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_EXE_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
@@ -106,7 +104,7 @@ endef
define target-shared-library-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CC) -shared -Wl,-Bsymbolic \
- $(SYS_LIB_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_LIB_LDFLAGS) $(SYS_COMMON_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_LIB_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_LIB_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
@@ -116,11 +114,29 @@ endef
define target-shared-library-cxx-from-o
$(if $(V),,@echo " LD " $(call relative-to-top,$@))
$(CXX) -shared -Wl,-Bsymbolic \
- $(SYS_LIB_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
+ $(SYS_LIB_LDFLAGS_CXX) $(SYS_LIB_LDFLAGS) $(SYS_COMMON_LDFLAGS) $(MODULE_LDFLAGS) -o $@ \
$(SYS_LIB_CRTBEGIN) $(sort $(MODULE_ALL_OBJECTS)) $(SYS_LIB_CRTEND) \
$(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS) $(LIBGCC)
endef
+define host-shared-library-from-o
+$(if $(V),,@echo " HOST_LD " $(call relative-to-top,$@))
+$(HOST_CC) -shared -Wl,-Bsymbolic \
+ $(MODULE_HOST_LDFLAGS) -o $@ \
+ $(sort $(MODULE_ALL_OBJECTS)) \
+ $(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS)
+endef
+
+# If there were any C++ source files in a shared library, we use this recipe,
+# which runs the C++ compiler to link the final library
+define host-shared-library-cxx-from-o
+$(if $(V),,@echo " HOST_LD " $(call relative-to-top,$@))
+$(HOST_CXX) -shared -Wl,-Bsymbolic \
+ $(MODULE_HOST_LDFLAGS) -o $@ \
+ $(sort $(MODULE_ALL_OBJECTS)) \
+ $(MODULE_LIBRARY_DIR_FLAGS) $(MODULE_LIBRARY_FLAGS)
+endef
+
define target-copy-debug-information
$(OBJCOPY) --only-keep-debug $@ $(basename $@).dbg
endef
@@ -167,7 +183,11 @@ define make-directory
$(MKDIR) -p $@
endef
+define check-exports-from-file
+endef
+
define check-exports
+$(call check-exports-from-file,$(if $1,$1,$(notdir $@).txt))
endef
# Programs used in recipes
@@ -182,40 +202,64 @@ JAVA ?= java
JAVAC ?= javac
ZIP ?= zip
-override AR := $(if $(V),,@)$(CROSS_COMPILE)ar
-override BISON := $(if $(V),,@)$(BISON)
-override BZIP2 := $(if $(V),,@)bzip2 -9
-override CC := $(if $(V),,@)$(CROSS_COMPILE)$(CC)
-override CC_CHECK := $(if $(V),,@)$(MAKE_TOP)/tools/cc-check.sh
-override CXX := $(if $(V),,@)$(CROSS_COMPILE)$(CXX)
+ifeq ($(USE_CCACHE),1)
+CCACHE ?= ccache
+endif
+
+# Define CHMOD and CC_CHECK first so we can use cc-is-clang
+#
override CHMOD := $(if $(V),,@)chmod
-override CP := $(if $(V),,@)cp
-override DOS2UNIX := $(if $(V),,@)\
- $(shell if [ -z `which fromdos` ]; then echo dos2unix -f -q; else echo fromdos -f -p; fi)
-override ECHO := $(if $(V),,@)echo
-override FLEX := $(if $(V),,@)flex
-override GAWK := $(if $(V),,@)gawk
-override GREP := $(if $(V),,@)grep
-override HOST_AR := $(if $(V),,@)ar
-override HOST_CC := $(if $(V),,@)$(HOST_CC)
-override HOST_CXX := $(if $(V),,@)$(HOST_CXX)
-override HOST_STRIP := $(if $(V),,@)strip
-override INSTALL := $(if $(V),,@)install
-override JAR := $(if $(V),,@)$(JAR)
-override JAVA := $(if $(V),,@)$(JAVA)
-override JAVAC := $(if $(V),,@)$(JAVAC)
-override M4 := $(if $(V),,@)m4
-override MKDIR := $(if $(V),,@)mkdir
-override MV := $(if $(V),,@)mv
-override OBJCOPY := $(if $(V),,@)$(CROSS_COMPILE)objcopy
-override PDSASM := $(if $(V),,@)$(HOST_OUT)/pdsasm
-override RANLIB := $(if $(V),,@)$(CROSS_COMPILE)ranlib
-override RM := $(if $(V),,@)rm -f
-override SED := $(if $(V),,@)sed
-override STRIP := $(if $(V),,@)$(CROSS_COMPILE)strip
-override TAR := $(if $(V),,@)tar
-override TOUCH := $(if $(V),,@)touch
-override USEASM := $(if $(V),,@)$(HOST_OUT)/useasm
-override USELINK := $(if $(V),,@)$(HOST_OUT)/uselink
-override VHD2INC := $(if $(V),,@)$(HOST_OUT)/vhd2inc
-override ZIP := $(if $(V),,@)$(ZIP)
+override CC_CHECK := $(if $(V),,@)$(MAKE_TOP)/tools/cc-check.sh
+
+# If clang is detected, the compiler name is invariant but CROSS_COMPILE
+# is reflected in the use of -target. For GCC this is always encoded into
+# the binary. If CROSS_COMPILE is not set we can skip this.
+#
+ifneq ($(CROSS_COMPILE),)
+ifeq ($(cc-is-clang),true)
+override CC := $(if $(V),,@)$(CCACHE) $(CC) \
+ -target $(patsubst %-,%,$(CROSS_COMPILE)) \
+ -B$(dir $(shell which $(CROSS_COMPILE)gcc))
+override CXX := $(if $(V),,@)$(CCACHE) $(CXX) \
+ -target $(patsubst %-,%,$(CROSS_COMPILE)) \
+ -B$(dir $(shell which $(CROSS_COMPILE)gcc))
+else
+override CC := $(if $(V),,@)$(CCACHE) $(CROSS_COMPILE)$(CC)
+override CXX := $(if $(V),,@)$(CCACHE) $(CROSS_COMPILE)$(CXX)
+endif
+else
+override CC := $(if $(V),,@)$(CCACHE) $(CC)
+override CXX := $(if $(V),,@)$(CCACHE) $(CXX)
+endif
+
+override AR := $(if $(V),,@)$(CROSS_COMPILE)ar
+override BISON := $(if $(V),,@)$(BISON)
+override BZIP2 := $(if $(V),,@)bzip2 -9
+override CP := $(if $(V),,@)cp
+override ECHO := $(if $(V),,@)echo
+override FLEX := $(if $(V),,@)flex
+override GAWK := $(if $(V),,@)gawk
+override GREP := $(if $(V),,@)grep
+override HOST_AR := $(if $(V),,@)ar
+override HOST_CC := $(if $(V),,@)$(CCACHE) $(HOST_CC)
+override HOST_CXX := $(if $(V),,@)$(CCACHE) $(HOST_CXX)
+override HOST_STRIP := $(if $(V),,@)strip
+override INSTALL := $(if $(V),,@)install
+override JAR := $(if $(V),,@)$(JAR)
+override JAVA := $(if $(V),,@)$(JAVA)
+override JAVAC := $(if $(V),,@)$(JAVAC)
+override M4 := $(if $(V),,@)m4
+override MKDIR := $(if $(V),,@)mkdir
+override MV := $(if $(V),,@)mv
+override OBJCOPY := $(if $(V),,@)$(CROSS_COMPILE)objcopy
+override PDSASM := $(if $(V),,@)$(HOST_OUT)/pdsasm
+override RANLIB := $(if $(V),,@)$(CROSS_COMPILE)ranlib
+override RM := $(if $(V),,@)rm -f
+override SED := $(if $(V),,@)sed
+override STRIP := $(if $(V),,@)$(CROSS_COMPILE)strip
+override TAR := $(if $(V),,@)tar
+override TOUCH := $(if $(V),,@)touch
+override USEASM := $(if $(V),,@)$(HOST_OUT)/useasm
+override USELINK := $(if $(V),,@)$(HOST_OUT)/uselink
+override VHD2INC := $(if $(V),,@)$(HOST_OUT)/vhd2inc
+override ZIP := $(if $(V),,@)$(ZIP)
diff --git a/eurasia_km/eurasiacon/build/linux2/common/android/arch_common.mk b/eurasia_km/eurasiacon/build/linux2/common/android/arch_common.mk
new file mode 100644
index 0000000..ef29a74
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/arch_common.mk
@@ -0,0 +1,107 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+ifeq ($(USE_CLANG),1)
+export CC := $(OUT_DIR)/host/$(HOST_OS)-$(HOST_ARCH)/bin/clang
+export CXX := $(OUT_DIR)/host/$(HOST_OS)-$(HOST_ARCH)/bin/clang++
+endif
+
+# FIXME: We need to run this early because config/core.mk hasn't been
+# included yet. Use the same variable names as in that makefile.
+#
+_CC := $(if $(filter default,$(origin CC)),gcc,$(CC))
+_CLANG := $(shell ../tools/cc-check.sh --clang --cc $(_CC))
+
+SYS_CFLAGS := \
+ -fno-short-enums \
+ -funwind-tables \
+ -D__linux__
+SYS_INCLUDES := \
+ -isystem $(ANDROID_ROOT)/bionic/libc/arch-$(ANDROID_ARCH)/include \
+ -isystem $(ANDROID_ROOT)/bionic/libc/include \
+ -isystem $(ANDROID_ROOT)/bionic/libc/kernel/uapi \
+ -isystem $(ANDROID_ROOT)/bionic/libc/kernel/uapi/asm-$(ANDROID_ARCH) \
+ -isystem $(ANDROID_ROOT)/bionic/libm/include \
+ -isystem $(ANDROID_ROOT)/bionic/libm/include/$(ANDROID_ARCH) \
+ -isystem $(ANDROID_ROOT)/bionic/libthread_db/include \
+ -isystem $(ANDROID_ROOT)/external/libunwind/include \
+ -isystem $(ANDROID_ROOT)/frameworks/base/include \
+ -isystem $(ANDROID_ROOT)/hardware/libhardware/include \
+ -isystem $(ANDROID_ROOT)/hardware/libhardware_legacy/include \
+ -isystem $(ANDROID_ROOT)/system/core/include \
+ -isystem $(ANDROID_ROOT)/system/core/libsync/include \
+ -isystem $(ANDROID_ROOT)/system/media/camera/include
+
+ifneq ($(wildcard $(ANDROID_ROOT)/external/boringssl/src/include),)
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/external/boringssl/src/include
+else
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/external/openssl/include
+endif
+
+# Obsolete libc includes
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/bionic/libc/kernel/common \
+ -isystem $(ANDROID_ROOT)/bionic/libc/kernel/arch-$(ANDROID_ARCH)
+
+# This is comparing PVR_BUILD_DIR to see if it is omap and adding
+# includes required for it's HWC
+ifeq ($(notdir $(abspath .)),omap_android)
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/hardware/ti/omap4xxx/kernel-headers \
+ -isystem $(ANDROID_ROOT)/hardware/ti/omap4xxx/ion
+endif
+
+ifeq ($(_CLANG),true)
+SYS_INCLUDES := \
+ -nostdinc $(SYS_INCLUDES) \
+ -isystem $(ANDROID_ROOT)/external/clang/lib/include
+endif
+
+SYS_EXE_LDFLAGS := \
+ -Bdynamic -nostdlib -Wl,-dynamic-linker,/system/bin/linker \
+ -lc -ldl -lcutils
+
+SYS_LIB_LDFLAGS := $(SYS_EXE_LDFLAGS)
+
+SYS_EXE_LDFLAGS_CXX := -lstdc++
+
+SYS_LIB_LDFLAGS_CXX := $(SYS_EXE_LDFLAGS_CXX)
diff --git a/eurasia_km/eurasiacon/build/linux2/common/android/armv7-a.mk b/eurasia_km/eurasiacon/build/linux2/common/android/armv7-a.mk
new file mode 100644
index 0000000..7718aa9
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/armv7-a.mk
@@ -0,0 +1,75 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+OPTIM := -O2
+
+ANDROID_ARCH := arm
+include ../common/android/arch_common.mk
+
+SYS_CFLAGS += -march=armv7-a
+
+ifneq ($(BUILD),debug)
+SYS_CFLAGS += -mthumb
+endif
+
+SYS_EXE_CRTBEGIN := $(TOOLCHAIN)/lib/crtbegin_dynamic.o
+SYS_EXE_CRTEND := $(TOOLCHAIN)/lib/crtend_android.o
+
+SYS_LIB_CRTBEGIN := $(TOOLCHAIN)/lib/crtbegin_so.o
+SYS_LIB_CRTEND := $(TOOLCHAIN)/lib/crtend_so.o
+
+# Handle the removal of the armelf.x and armelf.xsc linker scripts.
+ifeq ($(strip $(wildcard $(ANDROID_ROOT)/build/core/armelf.x)),)
+# The linker scripts have been removed. We need to use these options
+# instead.
+SYS_EXE_LDFLAGS += -Wl,-z,relro -Wl,-z,now
+SYS_LIB_LDFLAGS += -Wl,-z,relro -Wl,-z,now
+else
+# The linker scripts are still present in the Android tree, so we need to
+# use them.
+SYS_EXE_LDFLAGS += -Wl,-T$(ANDROID_ROOT)/build/core/armelf.x
+SYS_LIB_LDFLAGS += -Wl,-T$(ANDROID_ROOT)/build/core/armelf.xsc
+endif
+
+JNI_CPU_ABI := armeabi
+
+# Android builds are usually GPL
+#
+LDM_PLATFORM ?= 1
diff --git a/eurasia_km/eurasiacon/build/linux2/common/android/extra_config.mk b/eurasia_km/eurasiacon/build/linux2/common/android/extra_config.mk
new file mode 100644
index 0000000..9c624b2
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/extra_config.mk
@@ -0,0 +1,61 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+
+# On versions of Android prior to L, remap the use of libc++ to a combination
+# of stlport and libstdc++. Not every module written in C++ in the DDK needs
+# the STL, but linking it should be harmless (and most modules do need it).
+ifneq ($(is_at_least_lollipop),1)
+endif
+
+
+$(eval $(call BothConfigC,ANDROID,))
+
+
+
+
+$(eval $(call TunableBothConfigC,SUPPORT_PVRSRV_ANDROID_SYSTRACE,))
+
+$(eval $(call TunableBothConfigMake,SUPPORT_PVRSRV_ANDROID_SYSTRACE,))
+
+$(eval $(call TunableBothConfigMake,PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC,))
+$(eval $(call TunableBothConfigC,PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC,))
+
+include ../common/ion.mk
diff --git a/eurasia_km/eurasiacon/build/linux2/common/android/features.mk b/eurasia_km/eurasiacon/build/linux2/common/android/features.mk
new file mode 100644
index 0000000..67f7ac2
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/features.mk
@@ -0,0 +1,332 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+include ../common/android/platform_version.mk
+
+# Basic support option tuning for Android
+#
+SUPPORT_ANDROID_PLATFORM := 1
+SUPPORT_OPENGLES1_V1_ONLY := 1
+
+# Meminfo IDs are required for buffer stamps
+#
+SUPPORT_MEMINFO_IDS := 1
+
+# Enable services ion support by default
+#
+SUPPORT_ION ?= 1
+
+# Need multi-process support in PDUMP
+#
+SUPPORT_PDUMP_MULTI_PROCESS := 1
+
+# Always print debugging after 5 seconds of no activity
+#
+CLIENT_DRIVER_DEFAULT_WAIT_RETRIES := 50
+
+# Android WSEGL is always the same
+#
+OPK_DEFAULT := libpvrANDROID_WSEGL.so
+
+# srvkm is always built, but bufferclass_example is only built
+# before EGL_image_external was generally available.
+#
+KERNEL_COMPONENTS := srvkm
+
+# Kernel modules are always installed here under Android
+#
+PVRSRV_MODULE_BASEDIR := /system/modules/
+
+# Use the new PVR_DPF implementation to allow lower message levels
+# to be stripped from production drivers
+#
+PVRSRV_NEW_PVR_DPF := 1
+
+# Production Android builds don't want PVRSRVGetDCSystemBuffer
+#
+SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER := 0
+
+# Prefer to limit the 3D parameters heap to <16MB and move the
+# extra 48MB to the general heap. This only affects cores with
+# 28bit MMUs (520, 530, 531, 540).
+#
+SUPPORT_LARGE_GENERAL_HEAP := 1
+
+# Enable a page pool for uncached memory allocations. This improves
+# the performance of such allocations because the pages are temporarily
+# not returned to Linux and therefore do not have to be re-invalidated
+# (fewer cache invalidates are needed).
+#
+# Default the cache size to a maximum of 5400 pages (~21MB). If using
+# newer Linux kernels (>=3.0) the cache may be reclaimed and become
+# smaller than this maximum during runtime.
+#
+PVR_LINUX_MEM_AREA_POOL_MAX_PAGES ?= 5400
+
+# Unless overridden by the user, assume the RenderScript Compute API level
+# matches that of the SDK API_LEVEL.
+#
+RSC_API_LEVEL ?= $(API_LEVEL)
+ifneq ($(findstring $(RSC_API_LEVEL),21 22),)
+RSC_API_LEVEL := 20
+endif
+
+##############################################################################
+# Framebuffer target extension is used to find configs compatible with
+# the framebuffer (added in JB MR1).
+#
+EGL_EXTENSION_ANDROID_FRAMEBUFFER_TARGET := 1
+
+##############################################################################
+# Handle various platform includes for unittests
+#
+UNITTEST_INCLUDES := \
+ eurasiacon/android \
+ $(ANDROID_ROOT)/frameworks/base/native/include \
+ $(ANDROID_ROOT)/frameworks/native/include \
+ $(ANDROID_ROOT)/frameworks/native/opengl/include \
+ $(ANDROID_ROOT)/libnativehelper/include/nativehelper
+
+# But it doesn't have OpenVG headers
+#
+UNITTEST_INCLUDES += eurasiacon/unittests/include
+
+##############################################################################
+# Future versions moved proprietary libraries to a vendor directory
+#
+SHLIB_DESTDIR := /system/vendor/lib
+DEMO_DESTDIR := /system/vendor/bin
+
+# EGL libraries go in a special place
+#
+EGL_DESTDIR := $(SHLIB_DESTDIR)/egl
+
+##############################################################################
+# In K and older, augment the libstdc++ includes with stlport includes. Any
+# part of the C++ library not implemented by stlport will be handled by
+# linking in libstdc++ too (see extra_config.mk).
+#
+# On L and newer, don't use stlport OR libstdc++ at all; just use libc++.
+#
+SYS_CXXFLAGS := -fuse-cxa-atexit $(SYS_CFLAGS)
+ifeq ($(is_at_least_lollipop),1)
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/external/libcxx/include
+else
+SYS_INCLUDES += \
+ -isystem $(ANDROID_ROOT)/bionic \
+ -isystem $(ANDROID_ROOT)/external/stlport/stlport
+endif
+
+##############################################################################
+# Support the OES_EGL_image_external extensions in the client drivers.
+#
+GLES1_EXTENSION_EGL_IMAGE_EXTERNAL := 1
+GLES2_EXTENSION_EGL_IMAGE_EXTERNAL := 1
+
+##############################################################################
+# ICS requires that at least one driver EGLConfig advertises the
+# EGL_RECORDABLE_ANDROID attribute. The platform requires that surfaces
+# rendered with this config can be consumed by an OMX video encoder.
+#
+EGL_EXTENSION_ANDROID_RECORDABLE := 1
+
+##############################################################################
+# ICS added the EGL_ANDROID_blob_cache extension. Enable support for this
+# extension in EGL/GLESv2.
+#
+EGL_EXTENSION_ANDROID_BLOB_CACHE := 1
+
+##############################################################################
+# JB added a new corkscrew API for userland backtracing.
+#
+ifeq ($(is_at_least_lollipop),0)
+PVR_ANDROID_HAS_CORKSCREW_API := 1
+endif
+
+##############################################################################
+# JB MR1 makes the framebuffer HAL obsolete.
+#
+# We also need to support IMPLEMENTATION_DEFINED so gralloc allocates
+# framebuffers and GPU buffers in a 'preferred' format.
+#
+ifeq ($(is_at_least_jellybean_mr1),0)
+SUPPORT_ANDROID_FRAMEBUFFER_HAL := 1
+else
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED := 1
+endif
+
+##############################################################################
+# JB MR1 introduces cross-process syncs associated with a fd.
+# This requires a new enough kernel version to have the base/sync driver.
+#
+ifeq ($(is_at_least_jellybean_mr1),1)
+EGL_EXTENSION_ANDROID_NATIVE_FENCE_SYNC := 1
+PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC := 1
+endif
+
+##############################################################################
+# JB MR1 introduces new usage bits for the camera HAL and some new formats.
+#
+ifeq ($(is_at_least_jellybean_mr1),1)
+PVR_ANDROID_HAS_GRALLOC_USAGE_HW_CAMERA := 1
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_RAW_SENSOR := 1
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_BLOB := 1
+endif
+
+##############################################################################
+# JB MR2 adds a new graphics HAL (gralloc) API function, lock_ycbcr(), and
+# a so-called "flexible" YUV format enum.
+#
+ifeq ($(is_at_least_jellybean_mr2),1)
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_YCbCr_420_888 := 1
+PVR_ANDROID_GRALLOC_HAS_0_2_FEATURES := 1
+endif
+
+##############################################################################
+# In JB MR2 we can use a native helper library for the unittest wrapper.
+# In earlier versions, we must use a less ideal approach.
+#
+ifeq ($(is_at_least_jellybean_mr2),0)
+PVR_ANDROID_SURFACE_FIELD_NAME := \"mNativeSurface\"
+endif
+
+##############################################################################
+# JB MR2 introduces two new camera HAL formats (Y8, Y16)
+#
+ifeq ($(is_at_least_jellybean_mr2),1)
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_Y8 := 1
+PVR_ANDROID_HAS_HAL_PIXEL_FORMAT_Y16 := 1
+endif
+
+##############################################################################
+# KK's EGL wrapper remaps EGLConfigs in the BGRA and BGRX formats to RGBA and
+# RGBX respectively, for CpuConsumer compatibility. It does this because the
+# usage bits for the gralloc allocation are not available to EGL.
+#
+# In this newer platform version, gralloc has been redefined to allow the
+# 'format' parameter to gralloc->alloc() to be ignored for non-USAGE_SW
+# allocations, so long as the bits per channel and sRGB-ness are preserved.
+#
+ifeq ($(is_at_least_kitkat),1)
+PVR_ANDROID_REMAP_HW_ONLY_PIXEL_FORMATS := 1
+endif
+
+##############################################################################
+# Support newer HWC features in KK
+#
+ifeq ($(is_at_least_kitkat),1)
+PVR_ANDROID_HWC_HAS_1_3_FEATURES := 1
+endif
+
+##############################################################################
+# KK eliminated egl.cfg. Only create for older versions.
+#
+ifeq ($(is_at_least_kitkat),0)
+PVR_ANDROID_HAS_EGL_CFG := 1
+endif
+
+##############################################################################
+# KK has a bug in its browser that we need to work around.
+#
+ifeq ($(is_at_least_kitkat),1)
+PVR_ANDROID_RELAX_GRALLOC_MODULE_MAP_CHECKS := 1
+endif
+
+##############################################################################
+# KK's Camera HAL requires that ACTIVE_ARRAY_SIZE specify xmin/ymin first
+#
+ifeq ($(is_at_least_kitkat),1)
+PVR_ANDROID_CAMERA_ACTIVE_ARRAY_SIZE_HAS_XMIN_YMIN := 1
+endif
+
+##############################################################################
+# KitKat added a new memory tracking HAL. This enables gralloc support for
+# the GRAPHICS/GL memtrack types.
+#
+ifeq ($(is_at_least_kitkat),1)
+SUPPORT_ANDROID_MEMTRACK_HAL := 1
+endif
+
+##############################################################################
+# Versions of Android between Cupcake and KitKat MR1 required Java 6.
+#
+ifeq ($(is_at_least_lollipop),0)
+LEGACY_USE_JAVA6 ?= 1
+endif
+
+##############################################################################
+# Versions of Android between ICS and KitKat MR1 used ion .heap_mask instead
+# of .heap_id_mask.
+#
+ifeq ($(is_at_least_lollipop),0)
+PVR_ANDROID_HAS_ION_FIELD_HEAP_MASK := 1
+endif
+
+##############################################################################
+# Lollipop supports 64-bit. Configure BCC to emit both 32-bit and 64-bit LLVM
+# bitcode in the renderscript driver.
+#
+ifeq ($(is_at_least_lollipop),1)
+PVR_ANDROID_BCC_MULTIARCH_SUPPORT := 1
+endif
+
+##############################################################################
+# Lollipop annotates the cursor allocation with USAGE_CURSOR to enable it to
+# be accelerated with special cursor hardware (rather than wasting an
+# overlay). This flag stops the DDK from blocking the allocation.
+#
+ifeq ($(is_at_least_lollipop),1)
+PVR_ANDROID_HAS_GRALLOC_USAGE_CURSOR := 1
+endif
+
+##############################################################################
+# Lollipop changed the camera HAL metadata specification to require that
+# CONTROL_MAX_REGIONS specifies 3 integers (instead of 1).
+#
+ifeq ($(is_at_least_lollipop),1)
+PVR_ANDROID_CAMERA_CONTROL_MAX_REGIONS_HAS_THREE := 1
+endif
+
+# Placeholder for future version handling
+#
+ifeq ($(is_future_version),1)
+-include ../common/android/future_version.mk
+endif
diff --git a/eurasiacon/build/linux2/kbuild/external_tarball.mk b/eurasia_km/eurasiacon/build/linux2/common/android/paths.mk
index d3aa147..4309c72 100644
--- a/eurasiacon/build/linux2/kbuild/external_tarball.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/paths.mk
@@ -38,12 +38,20 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
### ###########################################################################
-ifneq ($(EXTERNAL_3PDD_TARBALL),)
-TAR_OPT_STRIP_COMPONENTS ?= --strip-components
-prepare_tree: $(OUT)/target/kbuild/external
-$(OUT)/target/kbuild/external: eurasiacon/external/$(EXTERNAL_3PDD_TARBALL)
- @echo "Extracting $<.."
- @mkdir -p $@
- @tar $(TAR_OPT_STRIP_COMPONENTS) 1 --touch -jxf $< -C $@
- @touch $(OUT)/target/kbuild/external
+TARGET_BUILD_TYPE ?= release
+
+HOST_OS ?= linux
+HOST_ARCH ?= x86
+
+OUT_DIR ?= $(ANDROID_ROOT)/out
+
+ifeq ($(TARGET_BUILD_TYPE),debug)
+TARGET_ROOT := $(OUT_DIR)/debug/target
+else
+TARGET_ROOT := $(OUT_DIR)/target
endif
+
+TOOLCHAIN ?= $(TARGET_ROOT)/product/$(TARGET_DEVICE)/obj
+TOOLCHAIN2 ?= $(TARGET_ROOT)/product/$(TARGET_DEVICE)/system
+
+LIBGCC := $(shell $(CROSS_COMPILE)gcc -m32 -print-libgcc-file-name 2>/dev/null)
diff --git a/eurasia_km/eurasiacon/build/linux2/common/android/platform_version.mk b/eurasia_km/eurasiacon/build/linux2/common/android/platform_version.mk
new file mode 100644
index 0000000..6efb5cc
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/android/platform_version.mk
@@ -0,0 +1,183 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+# If there's no build.prop file in the expected location, bail out. Tell the
+# user which file we were trying to read in case TARGET_DEVICE was not set.
+#
+BUILD_PROP := $(TARGET_ROOT)/product/$(TARGET_DEVICE)/system/build.prop
+ifeq ($(wildcard $(BUILD_PROP)),)
+$(warning *** Could not determine Android version. Did you set ANDROID_ROOT,\
+OUT_DIR and TARGET_DEVICE in your environment correctly?)
+$(error Error reading $(BUILD_PROP))
+endif
+
+# Extract version.release and version.codename from the build.prop file.
+# If either of the values aren't in the build.prop, the Make variables won't
+# be defined, and fallback handling will take place.
+#
+define newline
+
+
+endef
+$(eval $(subst #,$(newline),$(shell cat $(BUILD_PROP) | \
+ grep '^ro.build.version.release=\|^ro.build.version.codename=' | \
+ sed -e 's,ro.build.version.release=,PLATFORM_RELEASE=,' \
+ -e 's,ro.build.version.codename=,PLATFORM_CODENAME=,' | tr '\n' '#')))
+
+define release-starts-with
+$(shell echo $(PLATFORM_RELEASE) | grep -q ^$(1); \
+ [ "$$?" = "0" ] && echo 1 || echo 0)
+endef
+
+# ro.build.version.release contains the version number for release builds, or
+# the version codename otherwise. In this case we need to assume that the
+# version of Android we're building against has the features that are in the
+# final release of that version, so we set PLATFORM_RELEASE to the
+# corresponding release number.
+#
+# NOTE: It's the _string_ ordering that matters here, not the version number
+# ordering. You need to make sure that strings that are sub-strings of other
+# checked strings appear _later_ in this list.
+#
+# e.g. 'KitKatMR' starts with 'KitKat', but it is not KitKat.
+#
+ifeq ($(call release-starts-with,JellyBeanMR1),1)
+PLATFORM_RELEASE := 4.2
+else ifeq ($(call release-starts-with,JellyBeanMR),1)
+PLATFORM_RELEASE := 4.3
+else ifeq ($(call release-starts-with,JellyBean),1)
+PLATFORM_RELEASE := 4.1
+else ifeq ($(call release-starts-with,KeyLimePie),1)
+PLATFORM_RELEASE := 4.4
+else ifeq ($(call release-starts-with,KitKatMR),1)
+PLATFORM_RELEASE := 4.4.1
+else ifeq ($(call release-starts-with,KitKat),1)
+PLATFORM_RELEASE := 4.4
+else ifeq ($(call release-starts-with,LollipopMR1),1)
+PLATFORM_RELEASE := 5.1
+else ifeq ($(call release-starts-with,Lollipop),1)
+PLATFORM_RELEASE := 5.0
+else ifeq ($(PLATFORM_CODENAME),AOSP)
+# AOSP (master) will normally have PLATFORM_CODENAME set to AOSP
+PLATFORM_RELEASE := 5.1.51
+else ifeq ($(shell echo $(PLATFORM_RELEASE) | grep -qE "[A-Za-z]+"; echo $$?),0)
+PLATFORM_RELEASE := 5.2
+endif
+
+# Workaround for master. Sometimes there is an AOSP version ahead of
+# the current master version number, but master still has more features.
+#
+ifeq ($(PLATFORM_RELEASE),5.1.51)
+PLATFORM_RELEASE := 5.2
+is_aosp_master := 1
+endif
+
+PLATFORM_RELEASE_MAJ := $(shell echo $(PLATFORM_RELEASE) | cut -f1 -d'.')
+PLATFORM_RELEASE_MIN := $(shell echo $(PLATFORM_RELEASE) | cut -f2 -d'.')
+PLATFORM_RELEASE_PATCH := $(shell echo $(PLATFORM_RELEASE) | cut -f3 -d'.')
+
+# Not all versions have a patchlevel; fix that up here
+#
+ifeq ($(PLATFORM_RELEASE_PATCH),)
+PLATFORM_RELEASE_PATCH := 0
+endif
+
+# Macros to help categorize support for features and API_LEVEL for tests.
+#
+is_at_least_jellybean_mr1 := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 4 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 4 && \
+ test $(PLATFORM_RELEASE_MIN) -ge 2 ) ) && echo 1 || echo 0)
+is_at_least_jellybean_mr2 := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 4 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 4 && \
+ test $(PLATFORM_RELEASE_MIN) -ge 3 ) ) && echo 1 || echo 0)
+is_at_least_kitkat := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 4 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 4 && \
+ test $(PLATFORM_RELEASE_MIN) -ge 4 ) ) && echo 1 || echo 0)
+is_at_least_kitkat_mr1 := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 4 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 4 && \
+ test $(PLATFORM_RELEASE_MIN) -gt 4 ) || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 4 && \
+ test $(PLATFORM_RELEASE_MIN) -eq 4 && \
+ test $(PLATFORM_RELEASE_PATCH) -ge 1 ) ) && echo 1 || echo 0)
+is_at_least_lollipop := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -ge 5 ) && echo 1 || echo 0)
+is_at_least_lollipop_mr1 := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 5 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 5 && \
+ test $(PLATFORM_RELEASE_MIN) -gt 0 ) ) && echo 1 || echo 0)
+
+# Assume "future versions" are >5.1, but we don't really know
+is_future_version := \
+ $(shell ( test $(PLATFORM_RELEASE_MAJ) -gt 5 || \
+ ( test $(PLATFORM_RELEASE_MAJ) -eq 5 && \
+ test $(PLATFORM_RELEASE_MIN) -gt 1 ) ) && echo 1 || echo 0)
+
+# Picking an exact match of API_LEVEL for the platform we're building
+# against can avoid compatibility theming and affords better integration.
+#
+ifeq ($(is_future_version),1)
+API_LEVEL := 22
+else ifeq ($(is_at_least_lollipop_mr1),1)
+API_LEVEL := 22
+else ifeq ($(is_at_least_lollipop),1)
+API_LEVEL := 21
+#API_LEVEL := 20 was l-preview
+else ifeq ($(is_at_least_kitkat),1)
+API_LEVEL := 19
+else ifeq ($(is_at_least_jellybean_mr2),1)
+API_LEVEL := 18
+else ifeq ($(is_at_least_jellybean_mr1),1)
+API_LEVEL := 17
+else
+$(error Must build against Android >= 4.2)
+endif
+
+# Each DDK is tested against only a single version of the platform.
+# Warn if a different platform version is used.
+#
+ifeq ($(is_future_version),1)
+$(info WARNING: Android version is newer than this DDK supports)
+else ifneq ($(is_at_least_kitkat),1)
+$(info WARNING: Android version is older than this DDK supports)
+endif
diff --git a/eurasiacon/build/linux2/common/apis/xorg.mk b/eurasia_km/eurasiacon/build/linux2/common/apis/xorg.mk
index fc87c2f..c779e9d 100644
--- a/eurasiacon/build/linux2/common/apis/xorg.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/apis/xorg.mk
@@ -40,7 +40,7 @@
### ###########################################################################
ifeq ($(filter xorg,$(EXCLUDED_APIS)),)
- COMPONENTS += xorg pvr_conf pvr_video pvr_video_bin wsegl_dri2_linux
+ COMPONENTS += xorg pvr_conf pvr_video wsegl_dri2_linux
-include ../common/apis/xorg_opengl.mk
ifeq ($(SUPPORT_PVR_REMOTE),1)
COMPONENTS += pvr_input
diff --git a/eurasiacon/build/linux2/common/dridrm.mk b/eurasia_km/eurasiacon/build/linux2/common/dridrm.mk
index 3792682..90c9e74 100644
--- a/eurasiacon/build/linux2/common/dridrm.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/dridrm.mk
@@ -40,11 +40,10 @@
$(eval $(call TunableBothConfigC,SUPPORT_DRI_DRM,))
$(eval $(call TunableBothConfigC,SUPPORT_DRI_DRM_EXT,))
-$(eval $(call TunableBothConfigC,SUPPORT_DRI_DRM_EXTERNAL,))
+$(eval $(call TunableKernelConfigC,SUPPORT_DRI_DRM_PLUGIN,))
$(eval $(call TunableBothConfigMake,SUPPORT_DRI_DRM,))
-$(eval $(call TunableBothConfigMake,SUPPORT_DRI_DRM_EXTERNAL,))
ifeq ($(SUPPORT_DRI_DRM),1)
ifeq ($(SUPPORT_DRI_DRM_NO_LIBDRM),1)
@@ -61,4 +60,5 @@ $(eval $(call TunableBothConfigMake,PVR_DRI_DRM_NOT_PCI))
$(eval $(call TunableKernelConfigC,PVR_DRI_DRM_PLATFORM_DEV,))
-export EXTERNAL_3PDD_TARBALL
+
+
diff --git a/eurasia_km/eurasiacon/build/linux2/common/ion.mk b/eurasia_km/eurasiacon/build/linux2/common/ion.mk
new file mode 100644
index 0000000..f3f3c46
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/ion.mk
@@ -0,0 +1,65 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+ifneq ($(KERNELDIR),)
+ifneq ($(SUPPORT_ION),)
+
+# Support kernels built out-of-tree with O=/other/path
+# In those cases, KERNELDIR will be O, not the source tree.
+ifneq ($(wildcard $(KERNELDIR)/source),)
+KSRCDIR := $(KERNELDIR)/source
+else
+KSRCDIR := $(KERNELDIR)
+endif
+
+ifneq ($(wildcard $(KSRCDIR)/drivers/staging/android/ion/ion.h),)
+# The kernel has a more recent version of ion, located in drivers/staging.
+# Change the default header paths and the behaviour wrt sg_dma_len.
+SUPPORT_ION_HEADER := \"../drivers/staging/android/ion/ion.h\"
+SUPPORT_ION_PRIV_HEADER := \"../drivers/staging/android/ion/ion_priv.h\"
+SUPPORT_ION_USE_SG_LENGTH := 1
+endif
+
+$(eval $(call TunableKernelConfigC,SUPPORT_ION_HEADER,\"linux/ion.h\"))
+$(eval $(call TunableKernelConfigC,SUPPORT_ION_PRIV_HEADER,\"../drivers/gpu/ion/ion_priv.h\"))
+$(eval $(call TunableKernelConfigC,SUPPORT_ION_USE_SG_LENGTH,))
+
+endif
+endif
diff --git a/eurasiacon/build/linux2/common/omap4.mk b/eurasia_km/eurasiacon/build/linux2/common/omap4.mk
index 153159a..9a2cdd5 100644
--- a/eurasiacon/build/linux2/common/omap4.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/omap4.mk
@@ -41,3 +41,4 @@
$(eval $(call TunableKernelConfigC,PVR_NO_OMAP_TIMER,))
$(eval $(call TunableKernelConfigC,PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY,))
$(eval $(call TunableKernelConfigC,PVR_OMAPLFB_DRM_FB,))
+$(eval $(call TunableKernelConfigC,VS_PRODUCT_VERSION,))
diff --git a/eurasiacon/build/linux2/common/opencl.mk b/eurasia_km/eurasiacon/build/linux2/common/opencl.mk
index b5f84d4..b5f84d4 100644
--- a/eurasiacon/build/linux2/common/opencl.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/opencl.mk
diff --git a/eurasia_km/eurasiacon/build/linux2/common/testchip.mk b/eurasia_km/eurasiacon/build/linux2/common/testchip.mk
new file mode 100644
index 0000000..dedfa44
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/testchip.mk
@@ -0,0 +1,49 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+$(eval $(call KernelConfigC,TCF_REV,110))
+$(eval $(call KernelConfigC,ATLAS_REV,2))
+$(eval $(call KernelConfigC,LMA,1))
+$(eval $(call BothConfigC,PVR_LMA,1))
+
+$(eval $(call TunableKernelConfigC,SUPPORT_DYNAMIC_GTF_TIMING,1))
+$(eval $(call TunableKernelConfigMake,SUPPORT_DYNAMIC_GTF_TIMING,1))
+$(eval $(call TunableKernelConfigC,PVRPDP_WIDTH,))
+$(eval $(call TunableKernelConfigC,PVRPDP_HEIGHT,))
diff --git a/eurasia_km/eurasiacon/build/linux2/common/testchip_tc_fpga.mk b/eurasia_km/eurasiacon/build/linux2/common/testchip_tc_fpga.mk
new file mode 100755
index 0000000..fea62ac
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/common/testchip_tc_fpga.mk
@@ -0,0 +1,80 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+# Per Test Chip variant settings
+$(if $(and $(TC),$(FPGA)),$(error TC and FPGA are mutually exclusive))
+
+ifneq ($(TC),)
+ PVR_SYSTEM := sgx_pc_i686_tc3
+ ifeq ($(TC),544)
+ SGX_FEATURE_MP := 1
+ SGX_FEATURE_MP_CORE_COUNT := 2
+ SGX_FEATURE_SYSTEM_CACHE := 1
+ PVR_ANDROID_NO_CACHED_SURFACES := 1
+ SGXCORE := 544
+ SGX_CORE_REV := 104
+ else ifeq ($(TC),545)
+ SGX_FEATURE_SYSTEM_CACHE := 1
+ SUPPORT_SGX_UKERNEL_DCU_BYPASS := 1
+ SGXCORE := 545
+ SGX_CORE_REV := 109
+ else
+ $(error Unknown TC: $(TC))
+ endif
+else ifneq ($(FPGA),)
+ PVR_SYSTEM := sgx_pci_fpga
+ FPGA := 1
+ ifeq ($(FPGA),520)
+ SGXCORE := 520
+ SGX_CORE_REV := 111
+ else ifeq ($(FPGA),531)
+ SGXCORE := 531
+ SGX_CORE_REV := 110
+ SUPPORT_DYNAMIC_GTF_TIMING := 0
+ else ifeq ($(FPGA),5300)
+ SGXCORE := 5300
+ SGX_CORE_REV := 112
+ else
+ $(error Unknown FPGA: $(FPGA))
+ endif
+else # !FPGA && !TC
+ $(error TC= or FPGA= must be set)
+endif
+
diff --git a/eurasiacon/build/linux2/common/xorg.mk b/eurasia_km/eurasiacon/build/linux2/common/xorg.mk
index 27c77a3..a1a2f78 100644
--- a/eurasiacon/build/linux2/common/xorg.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/xorg.mk
@@ -38,7 +38,9 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
### ###########################################################################
+ifeq ($(PVR_DRM_MODESET_DRIVER_NAME),)
PVR_SECURE_DRM_AUTH_EXPORT := 1
+endif
$(eval $(call TunableKernelConfigC,XPROC_WORKAROUND_NUM_SHAREABLES,4095))
diff --git a/eurasiacon/build/linux2/common/xorg_test.mk b/eurasia_km/eurasiacon/build/linux2/common/xorg_test.mk
index a1b4009..fe10742 100644
--- a/eurasiacon/build/linux2/common/xorg_test.mk
+++ b/eurasia_km/eurasiacon/build/linux2/common/xorg_test.mk
@@ -43,6 +43,9 @@
ifeq ($(filter xorg,$(EXCLUDED_APIS)),)
ifneq ($(wildcard ../common/apis/xorg.mk),)
-want_xorg := 1
+SUPPORT_BUILD_XORG := 1
+ifeq ($(PDUMP),1)
+SUPPORT_PDUMP_MULTI_PROCESS := 1
+endif
endif
endif
diff --git a/eurasiacon/build/linux2/config/core.mk b/eurasia_km/eurasiacon/build/linux2/config/core.mk
index aa20e6f..55c58fc 100644
--- a/eurasiacon/build/linux2/config/core.mk
+++ b/eurasia_km/eurasiacon/build/linux2/config/core.mk
@@ -56,6 +56,7 @@
#
define KernelConfigMake
$$(shell echo "override $(1) := $(2)" >>$(CONFIG_KERNEL_MK).new)
+$(if $(filter config,$(D)),$(info KernelConfigMake $(1) := $(2) # $(if $($(1)),$(origin $(1)),default)))
endef
# Write out a GNU make option for both user & kernel
@@ -88,6 +89,7 @@ endef
#
define KernelConfigC
$$(shell echo "#define $(1) $(2)" >>$(CONFIG_KERNEL_H).new)
+$(if $(filter config,$(D)),$(info KernelConfigC #define $(1) $(2) /* $(if $($(1)),$(origin $(1)),default) */),)
endef
# Write out an option for both user & kernel
@@ -126,10 +128,6 @@ endef
############################### END MACROS ##################################
-DOS2UNIX := $(shell \
- if [ -z `which fromdos` ]; then echo dos2unix -f -q; else echo fromdos -f -p; fi \
-)
-
# Check we have a new enough version of GNU make.
#
need := 3.81
@@ -183,14 +181,19 @@ BUILD ?= release
OUT ?= $(TOP)/eurasiacon/binary2_$(PVR_BUILD_DIR)_$(BUILD)
override OUT := $(if $(filter /%,$(OUT)),$(OUT),$(TOP)/$(OUT))
-# Without a build date drm fails to load
-DATE := $(shell date +%Y-%m-%d)
-
CONFIG_MK := $(OUT)/config.mk
CONFIG_H := $(OUT)/config.h
CONFIG_KERNEL_MK := $(OUT)/config_kernel.mk
CONFIG_KERNEL_H := $(OUT)/config_kernel.h
+# Convert commas to spaces in $(D). This is so you can say "make
+# D=config-changes,freeze-config" and have $(filter config-changes,$(D))
+# still work.
+comma := ,
+empty :=
+space := $(empty) $(empty)
+override D := $(subst $(comma),$(space),$(D))
+
# Create the OUT directory and delete any previous intermediary files
#
$(shell mkdir -p $(OUT))
@@ -216,6 +219,19 @@ endif
# require things like SGXCORE to be set
ifneq ($(INTERNAL_CLOBBER_ONLY),true)
+# These are defined by the core build system, but we might need them
+# earlier to feature-check the compilers
+#
+_CC := $(if $(filter default,$(origin CC)),gcc,$(CC))
+_CLANG := \
+ $(shell $(TOP)/eurasiacon/build/linux2/tools/cc-check.sh --clang --cc $(_CC))
+ifeq ($(_CLANG),true)
+_CC := $(_CC) -target $(patsubst %-,%,$(CROSS_COMPILE))
+else
+_CC := $(CROSS_COMPILE)$(_CC)
+endif
+HOST_CC ?= gcc
+
-include ../config/user-defs.mk
# FIXME: Backwards compatibility remaps.
@@ -278,21 +294,10 @@ override SUPPORT_HW_RECOVERY := 0
override SUPPORT_ACTIVE_POWER_MANAGEMENT := 0
endif
-# We're bumping against USSE limits on older cores because the ukernel
-# is too large when building both SGX_DISABLE_VISTEST_SUPPORT=0 and
-# PVRSRV_USSE_EDM_STATUS_DEBUG=1.
-#
-# Automatically disable vistest support if debugging the ukernel to
-# prevent build failures.
-#
-ifneq ($(filter 520 530 531 535 540,$(SGXCORE)),)
-ifneq ($(SGX_DISABLE_VISTEST_SUPPORT),1)
-SGX_DISABLE_VISTEST_SUPPORT ?= not-overridden
-ifeq ($(SGX_DISABLE_VISTEST_SUPPORT),not-overridden)
-$(warning Setting SGX_DISABLE_VISTEST_SUPPORT=1 because PVRSRV_USSE_EDM_STATUS_DEBUG=1)
-SGX_DISABLE_VISTEST_SUPPORT := 1
-endif
-endif
+ifeq ($(SGX_FEATURE_36BIT_MMU),1)
+override IMG_ADDRSPACE_PHYSADDR_BITS := 64
+else
+override IMG_ADDRSPACE_PHYSADDR_BITS := 32
endif
ifeq ($(SGXCORE),535)
@@ -330,7 +335,12 @@ endif
# one not), make PVRSRV_MODNAME a non-tunable and give it an overridable
# default here.
#
-PVRSRV_MODNAME ?= omapdrm
+PVRSRV_MODNAME ?= pvrsrvkm
+
+# Normally builds don't touch this, but we use it to influence the components
+# list. Make sure it is defined early enough to make this possible.
+#
+SUPPORT_PVRSRV_DEVICE_CLASS ?= 1
# The user didn't set CROSS_COMPILE. There's probably nothing wrong
# with that, but we'll let them know anyway.
@@ -350,19 +360,22 @@ $$(warning *** Setting $(1) via $$(origin $(1)) is deprecated)
$$(error If you are trying to disable a component, use e.g. EXCLUDED_APIS="opengles1 opengl")
endif
endef
-$(foreach _o,SYS_CFLAGS SYS_CXXFLAGS SYS_EXE_LDFLAGS SYS_LIB_LDFLAGS SUPPORT_EWS SUPPORT_OPENGLES1 SUPPORT_OPENGLES2 SUPPORT_OPENVG SUPPORT_OPENCL SUPPORT_OPENGL SUPPORT_UNITTESTS SUPPORT_XORG,$(eval $(call sanity-check-support-option-origin,$(_o))))
+$(foreach _o,SYS_CFLAGS SYS_CXXFLAGS SYS_INCLUDES SYS_COMMON_LDFLAGS SYS_EXE_LDFLAGS SYS_LIB_LDFLAGS SYS_EXE_LDFLAGS_CXX SYS_LIB_LDFLAGS_CXX SUPPORT_EWS SUPPORT_OPENGLES1 SUPPORT_OPENGLES2 SUPPORT_OPENCL SUPPORT_RSCOMPUTE SUPPORT_OPENGL SUPPORT_UNITTESTS SUPPORT_XORG,$(eval $(call sanity-check-support-option-origin,$(_o))))
# Check for words in EXCLUDED_APIS that aren't understood by the
# common/apis/*.mk files. This should be kept in sync with all the tests on
# EXCLUDED_APIS in those files
-_excludable_apis := opencl opengl opengles1 opengles2 openvg ews unittests xorg xorg_unittests scripts
-_unrecognised := $(strip $(filter-out $(_excludable_apis),$(EXCLUDED_APIS)))
+_excludable_apis := rscompute opencl opengl opengles1 opengles2 openvg ews unittests xorg xorg_unittests scripts composerhal camerahal memtrackhal
+_excluded_apis := $(subst $(comma),$(space),$(EXCLUDED_APIS))
+_unrecognised := $(strip $(filter-out $(_excludable_apis),$(_excluded_apis)))
ifneq ($(_unrecognised),)
$(warning *** Unrecognised entries in EXCLUDED_APIS: $(_unrecognised))
$(warning *** EXCLUDED_APIS was set via: $(origin EXCLUDED_APIS))
$(error Excludable APIs are: $(_excludable_apis))
endif
+override EXCLUDED_APIS := $(filter $(_excludable_apis), $(_excluded_apis))
+
# Build's selected list of components
#
-include components.mk
@@ -385,8 +398,13 @@ ifneq ($(filter pvr2d,$(COMPONENTS)),)
COMPONENTS += null_pvr2d_remote
endif
COMPONENTS += pvrvncsrv
+COMPONENTS += pvrvncinput
endif
+$(if $(filter config,$(D)),$(info Build configuration:))
+
+################################# CONFIG ####################################
+
# If KERNELDIR is set, write it out to the config.mk, with
# KERNEL_COMPONENTS and KERNEL_ID
#
@@ -407,19 +425,54 @@ KERNEL_CROSS_COMPILE ?= $(CROSS_COMPILE)
$(eval $(call TunableBothConfigMake,KERNEL_CROSS_COMPILE,))
endif
-# Check the KERNELDIR has a kernel built and also check that it is
-# not 64-bit, which we do not support.
+# Check the KERNELDIR has a kernel built.
VMLINUX := $(strip $(wildcard $(KERNELDIR)/vmlinux))
+LINUXCFG := $(strip $(wildcard $(KERNELDIR)/.config))
+
ifneq ($(VMLINUX),)
-VMLINUX_IS_64BIT := $(shell file $(VMLINUX) | grep -q 64-bit || echo false)
+ifneq ($(shell file $(KERNELDIR)/vmlinux | grep 64-bit >/dev/null && echo 1),$(shell $(_CC) -dM -E - </dev/null | grep __x86_64__ >/dev/null && echo 1))
+$(error Attempting to build 64-bit DDK against 32-bit kernel, or 32-bit DDK against 64-bit kernel. This is not allowed.)
+endif
+VMLINUX_IS_64BIT := $(shell file $(VMLINUX) | grep 64-bit >/dev/null || echo false)
+VMLINUX_HAS_PAE36 := $(shell cat $(LINUXCFG) | grep CONFIG_X86_PAE=y >/dev/null || echo false)
+VMLINUX_HAS_PAE40 := $(shell cat $(LINUXCFG) | grep CONFIG_ARM_LPAE=y >/dev/null || echo false)
+VMLINUX_HAS_DMA32 := $(shell cat $(LINUXCFG) | grep CONFIG_ZONE_DMA32=y >/dev/null || echo false)
+
+# $(error 64BIT=$(VMLINUX_IS_64BIT) PAE36=$(VMLINUX_HAS_PAE36) PAE40=$(VMLINUX_HAS_PAE40) DMA32=$(VMLINUX_HAS_DMA32) MMU36=$(SGX_FEATURE_36BIT_MMU))
+
ifneq ($(VMLINUX_IS_64BIT),false)
-$(warning $$(KERNELDIR)/vmlinux is 64-bit, which is not supported. Kbuild may fail.)
+$(warning $$(KERNELDIR)/vmlinux: Note: vmlinux is 64-bit, which is supported but currently experimental.)
endif
else
$(warning $$(KERNELDIR)/vmlinux does not exist. Kbuild may fail.)
endif
endif
+ifneq ($(VMLINUX_HAS_PAE40),false)
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX MMUs are currently supported up to only 36 bits max. Your Kernel is built with 40-bit PAE but does not have CONFIG_ZONE_DMA32.)
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+endif
+
+ifneq ($(SGX_FEATURE_36BIT_MMU),1)
+ifneq ($(VMLINUX_IS_64BIT),false)
+# Kernel is 64-bit
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX is configured with 32-bit MMU. Your Kernel is 64-bit but does not have CONFIG_ZONE_DMA32.)
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+else
+ # Kernel is 32-bit
+ifneq ($(VMLINUX_HAS_PAE36),false)
+ifeq ($(VMLINUX_HAS_DMA32),false)
+$(warning SGX is configured with 32-bit MMU. Your Kernel is 32-bit PAE, but does not have CONFIG_ZONE_DMA32. )
+$(warning This means you must ensure the runtime system has <= 4GB of RAM, or there will be BIG problems...)
+endif
+endif
+endif
+endif
+
# Ideally configured by platform Makefiles, as necessary
#
@@ -429,10 +482,8 @@ endif
$(eval $(call BothConfigC,LINUX,))
$(eval $(call BothConfigC,PVR_BUILD_DIR,"\"$(PVR_BUILD_DIR)\""))
-$(eval $(call BothConfigC,PVR_BUILD_DATE,"\"$(DATE)\""))
$(eval $(call BothConfigC,PVR_BUILD_TYPE,"\"$(BUILD)\""))
$(eval $(call BothConfigC,PVRSRV_MODNAME,"\"$(PVRSRV_MODNAME)\""))
-$(eval $(call BothConfigMake,PVRSRV_MODNAME,$(PVRSRV_MODNAME)))
$(eval $(call TunableBothConfigC,SGXCORE,))
$(eval $(call BothConfigC,SGX$(SGXCORE),))
@@ -445,10 +496,17 @@ $(eval $(call TunableBothConfigC,USE_SGX_CORE_REV_HEAD,))
$(eval $(call BothConfigC,TRANSFER_QUEUE,))
$(eval $(call BothConfigC,PVR_SECURE_HANDLES,))
+# Support syncing LISR & MISR. This is required for OS's where
+# on SPM platforms the LISR and MISR can run at the same time and
+# thus during powerdown we need to drain all pending LISRs before
+# proceeding to do the actual powerdown
+$(eval $(call KernelConfigC,SUPPORT_LISR_MISR_SYNC))
+
ifneq ($(DISPLAY_CONTROLLER),)
$(eval $(call BothConfigC,DISPLAY_CONTROLLER,$(DISPLAY_CONTROLLER)))
endif
+ifneq ($(strip $(KERNELDIR)),)
PVR_LINUX_MEM_AREA_POOL_MAX_PAGES ?= 0
ifneq ($(PVR_LINUX_MEM_AREA_POOL_MAX_PAGES),0)
PVR_LINUX_MEM_AREA_USE_VMAP ?= 1
@@ -460,9 +518,8 @@ endif
$(eval $(call KernelConfigC,PVR_LINUX_MEM_AREA_POOL_MAX_PAGES,$(PVR_LINUX_MEM_AREA_POOL_MAX_PAGES)))
$(eval $(call TunableKernelConfigC,PVR_LINUX_MEM_AREA_USE_VMAP,))
$(eval $(call TunableKernelConfigC,PVR_LINUX_MEM_AREA_POOL_ALLOW_SHRINK,))
+endif
-$(eval $(call TunableKernelConfigC,FLIP_TECHNIQUE_FRAMEBUFFER,))
-$(eval $(call TunableKernelConfigC,FLIP_TECHNIQUE_OVERLAY,))
$(eval $(call BothConfigMake,PVR_SYSTEM,$(PVR_SYSTEM)))
@@ -470,10 +527,6 @@ $(eval $(call BothConfigMake,PVR_SYSTEM,$(PVR_SYSTEM)))
# Build-type dependent options
#
$(eval $(call BothConfigMake,BUILD,$(BUILD)))
-$(eval $(call KernelConfigC,DEBUG_LINUX_MMAP_AREAS,))
-$(eval $(call KernelConfigC,DEBUG_LINUX_MEM_AREAS,))
-$(eval $(call KernelConfigC,DEBUG_LINUX_MEMORY_ALLOCATIONS,))
-$(eval $(call KernelConfigC,PVRSRV_DISABLE_UM_SYNCOBJ_MAPPINGS,1))
ifeq ($(BUILD),debug)
$(eval $(call BothConfigC,DEBUG,))
@@ -481,15 +534,12 @@ $(eval $(call KernelConfigC,DEBUG_LINUX_MEMORY_ALLOCATIONS,))
$(eval $(call KernelConfigC,DEBUG_LINUX_MEM_AREAS,))
$(eval $(call KernelConfigC,DEBUG_LINUX_MMAP_AREAS,))
$(eval $(call KernelConfigC,DEBUG_BRIDGE_KM,))
-$(eval $(call TunableBothConfigC,PVRSRV_USSE_EDM_STATUS_DEBUG,1))
else ifeq ($(BUILD),release)
$(eval $(call BothConfigC,RELEASE,))
$(eval $(call TunableBothConfigMake,DEBUGLINK,1))
-$(eval $(call TunableBothConfigC,PVRSRV_USSE_EDM_STATUS_DEBUG,))
else ifeq ($(BUILD),timing)
$(eval $(call BothConfigC,TIMING,))
$(eval $(call TunableBothConfigMake,DEBUGLINK,1))
-$(eval $(call TunableBothConfigC,PVRSRV_USSE_EDM_STATUS_DEBUG,))
else
$(error BUILD= must be either debug, release or timing)
endif
@@ -502,7 +552,7 @@ $(eval $(call TunableBothConfigC,SUPPORT_HYBRID_PB,))
$(eval $(call TunableBothConfigC,SUPPORT_HW_RECOVERY,1))
$(eval $(call TunableBothConfigC,SUPPORT_ACTIVE_POWER_MANAGEMENT,1))
$(eval $(call TunableBothConfigC,SUPPORT_SGX_HWPERF,1))
-$(eval $(call TunableBothConfigC,SUPPORT_SGX_LOW_LATENCY_SCHEDULING,))
+$(eval $(call TunableBothConfigC,SUPPORT_SGX_LOW_LATENCY_SCHEDULING,1))
$(eval $(call TunableBothConfigC,SUPPORT_MEMINFO_IDS,))
$(eval $(call TunableBothConfigC,SUPPORT_SGX_NEW_STATUS_VALS,1))
$(eval $(call TunableBothConfigC,SUPPORT_PDUMP_MULTI_PROCESS,))
@@ -515,10 +565,10 @@ $(eval $(call TunableBothConfigC,SGX_FEATURE_MP,))
$(eval $(call TunableBothConfigC,SGX_FEATURE_MP_PLUS,))
$(eval $(call TunableBothConfigC,FPGA,))
$(eval $(call TunableBothConfigC,PDUMP,))
+$(eval $(call TunableBothConfigC,MEM_TRACK_INFO_DEBUG,))
$(eval $(call TunableBothConfigC,NO_HARDWARE,))
$(eval $(call TunableBothConfigC,PDUMP_DEBUG_OUTFILES,))
$(eval $(call TunableBothConfigC,PVRSRV_USSE_EDM_STATUS_DEBUG,))
-$(eval $(call TunableBothConfigC,SGX_DISABLE_VISTEST_SUPPORT,))
$(eval $(call TunableBothConfigC,PVRSRV_RESET_ON_HWTIMEOUT,))
$(eval $(call TunableBothConfigC,SYS_USING_INTERRUPTS,1))
$(eval $(call TunableBothConfigC,SUPPORT_EXTERNAL_SYSTEM_CACHE,))
@@ -528,9 +578,15 @@ $(eval $(call TunableBothConfigC,PVRSRV_NEED_PVR_ASSERT,))
$(eval $(call TunableBothConfigC,PVRSRV_NEED_PVR_TRACE,))
$(eval $(call TunableBothConfigC,SUPPORT_SECURE_33657_FIX,))
$(eval $(call TunableBothConfigC,SUPPORT_ION,))
+$(eval $(call TunableBothConfigC,SUPPORT_DMABUF,))
$(eval $(call TunableBothConfigC,SUPPORT_HWRECOVERY_TRACE_LIMIT,))
+$(eval $(call TunableBothConfigC,SUPPORT_PVRSRV_DEVICE_CLASS,))
$(eval $(call TunableBothConfigC,SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER,1))
$(eval $(call TunableBothConfigC,SUPPORT_NV12_FROM_2_HWADDRS,))
+$(eval $(call TunableBothConfigC,SGX_FEATURE_36BIT_MMU,))
+$(eval $(call TunableBothConfigC,IMG_ADDRSPACE_PHYSADDR_BITS,))
+$(eval $(call TunableBothConfigC,PVRSRV_EXTRA_PB_DEBUG,))
+$(eval $(call TunableBothConfigC,PVRSRV_DEBUG_CCB_MAX,))
$(eval $(call TunableKernelConfigC,SUPPORT_LINUX_X86_WRITECOMBINE,1))
$(eval $(call TunableKernelConfigC,SUPPORT_LINUX_X86_PAT,1))
@@ -544,6 +600,7 @@ $(eval $(call TunableKernelConfigC,PVR_LINUX_MISR_USING_PRIVATE_WORKQUEUE,))
$(eval $(call TunableKernelConfigC,PVR_LINUX_TIMERS_USING_WORKQUEUES,))
$(eval $(call TunableKernelConfigC,PVR_LINUX_TIMERS_USING_SHARED_WORKQUEUE,))
$(eval $(call TunableKernelConfigC,LDM_PLATFORM,))
+$(eval $(call TunableKernelConfigC,PVR_LDM_DEVICE_TREE,))
$(eval $(call TunableKernelConfigC,PVR_LDM_PLATFORM_PRE_REGISTERED,))
$(eval $(call TunableKernelConfigC,PVR_LDM_PLATFORM_PRE_REGISTERED_DEV,))
$(eval $(call TunableKernelConfigC,PVR_LDM_DRIVER_REGISTRATION_NAME,"\"$(PVRSRV_MODNAME)\""))
@@ -553,14 +610,20 @@ $(eval $(call TunableKernelConfigC,PVRSRV_DUMP_KERNEL_CCB,))
$(eval $(call TunableKernelConfigC,PVRSRV_REFCOUNT_DEBUG,))
$(eval $(call TunableKernelConfigC,PVRSRV_MMU_MAKE_READWRITE_ON_DEMAND,))
$(eval $(call TunableKernelConfigC,HYBRID_SHARED_PB_SIZE,))
-$(eval $(call TunableKernelConfigC,SUPPORT_LARGE_GENERAL_HEAP,1))
+$(eval $(call TunableKernelConfigC,SUPPORT_LARGE_GENERAL_HEAP,))
+$(eval $(call TunableKernelConfigC,SUPPORT_OLD_ION_API,))
$(eval $(call TunableKernelConfigC,TTRACE,))
+$(eval $(call TunableKernelConfigC,TTRACE_LARGE_BUFFER,))
+$(eval $(call TunableKernelConfigC,SUPPORT_PDUMP_SYNC_DEBUG,))
+$(eval $(call TunableKernelConfigC,SUPPORT_PER_SYNC_DEBUG,))
+$(eval $(call TunableKernelConfigC,SUPPORT_FORCE_SYNC_DUMP,))
-$(eval $(call TunableBothConfigMake,SUPPORT_ION,))
-
$(eval $(call TunableBothConfigMake,OPTIM,))
+$(eval $(call TunableBothConfigMake,SUPPORT_ION,))
+$(eval $(call TunableBothConfigMake,SUPPORT_DMABUF,))
+$(eval $(call TunableBothConfigMake,SUPPORT_PVRSRV_DEVICE_CLASS,))
$(eval $(call TunableKernelConfigMake,TTRACE,))
@@ -589,7 +652,6 @@ endif
autogen:
ifeq ($(INTERNAL_CLOBBER_ONLY),)
@$(MAKE) -s --no-print-directory -C $(EURASIAROOT) \
- DOS2UNIX="$(DOS2UNIX)" \
-f eurasiacon/build/linux2/prepare_tree.mk \
LDM_PCI=$(LDM_PCI) LDM_PLATFORM=$(LDM_PLATFORM)
else
diff --git a/eurasiacon/build/linux2/defs.mk b/eurasia_km/eurasiacon/build/linux2/defs.mk
index af9ddf6..311bbb0 100644
--- a/eurasiacon/build/linux2/defs.mk
+++ b/eurasia_km/eurasiacon/build/linux2/defs.mk
@@ -96,7 +96,6 @@ endef
define cc-check
$(shell \
CC_CHECK=$(patsubst @%,%,$(CC_CHECK)) && \
- $(patsubst @%,%,$(DOS2UNIX)) $$CC_CHECK && \
$(patsubst @%,%,$(CHMOD)) +x $$CC_CHECK && \
$$CC_CHECK --cc "$(1)" --out "$(2)" $(3))
endef
@@ -105,6 +104,10 @@ define cc-is-64bit
$(call cc-check,$(1),$(OUT),--64)
endef
+define cc-is-clang
+$(call cc-check,$(patsubst @%,%,$(CC)),$(OUT),--clang)
+endef
+
define cc-option
$(call cc-check,$(patsubst @%,%,$(CC)),$(OUT),$(1))
endef
@@ -117,6 +120,10 @@ define host-cc-option
$(call cc-check,$(patsubst @%,%,$(HOST_CC)),$(OUT),$(1))
endef
+define host-cxx-option
+$(call cc-check,$(patsubst @%,%,$(HOST_CXX)),$(OUT),$(1))
+endef
+
define kernel-cc-option
$(call cc-check,$(KERNEL_CROSS_COMPILE)gcc,$(OUT),$(1))
endef
@@ -139,3 +146,8 @@ endef
define module-info-line
$(if $(filter modules,$(D)),$(info $(1)),)
endef
+
+# $(call if-exists,A,B) => A if A is a file which exists, otherwise B
+define if-exists
+$(if $(wildcard $(1)),$(1),$(2))
+endef
diff --git a/eurasia_km/eurasiacon/build/linux2/jz4780_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/jz4780_linux/Makefile
new file mode 100644
index 0000000..a726d17
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/jz4780_linux/Makefile
@@ -0,0 +1,94 @@
+########################################################################### ###
+#@Title Makefile for JZ4780 Linux.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+PVR_SYSTEM := sgx_jz4780
+
+include ../kernel_version.mk
+
+SYS_CFLAGS := -EL
+SYS_COMMON_LDFLAGS := -EL
+
+LDM_PLATFORM := 1
+PVR_LDM_DEVICE_TREE := 1
+SUPPORT_DRI_DRM := 1
+SUPPORT_DMABUF := 1
+
+BUFFERCLASS_MODULE ?= bufferclass_example
+KERNEL_COMPONENTS := srvkm $(BUFFERCLASS_MODULE)
+
+OPK_DEFAULT := libpvrDRMWSEGL.so
+
+SGXCORE := 540
+SGX_CORE_REV := 130
+
+SUPPORT_SLC := 1
+SUPPORT_LINUX_USING_WORKQUEUES := 1
+SGX_DYNAMIC_TIMING_INFO := 1
+
+ifneq ($(SGXCORE),520)
+SGX_FAST_DPM_INIT ?= 1
+endif
+
+SUPPORT_SGX_HWPERF ?= 1
+
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+XORG_PVR_VIDEO ?= generic_drm
+else
+DISPLAY_CONTROLLER := dc_jz4780
+EXTRA_PVRSRVKM_COMPONENTS += dc_jz4780
+OPK_FALLBACK := libpvrEWS_WSEGL.so
+endif
+
+PVR_DRI_DRM_PLATFORM_DEV := 1
+PVR_DRM_MODESET_DRIVER_NAME := jz4780
+PVR_DRM_MODESET_MODULE_NAME := dumb
+PVR_DRM_USE_PAGE_FLIP_EVENTS := 0
+PVR_DRM_NEW_SWAP_CHAIN_MODE_SET := 1
+
+LWS_DIST ?= tarballs-debian-8
+
+# Should be last
+include ../config/core.mk
+include ../common/xorg.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
diff --git a/eurasiacon/build/linux2/kbuild/Makefile.template b/eurasia_km/eurasiacon/build/linux2/kbuild/Makefile.template
index cfef1b6..2b49f50 100644
--- a/eurasiacon/build/linux2/kbuild/Makefile.template
+++ b/eurasia_km/eurasiacon/build/linux2/kbuild/Makefile.template
@@ -65,7 +65,6 @@ $(OUT)/target/kbuild/%.c: $(TOP)/%.c
@if [ ! -h $@ ]; then ln -sf $< $@; fi
ccflags-y += -D__linux__ -include $(OUT)/config_kernel.h \
- -DDEBUG_LOG_PATH_TRUNCATE="\"$(OUT)/target/kbuild\"" \
-I$(OUT)/include \
-I$(TOP)/include4 \
-I$(TOP)/services4/include \
@@ -86,7 +85,7 @@ endif
include $(INTERNAL_KBUILD_MAKEFILES)
-$(if $($(PVRSRV_MODNAME)-y),,$(error $(PVRSRV_MODNAME)-y was empty, which could mean that srvkm is missing from $$(KERNEL_COMPONENTS)))
-$(PVRSRV_MODNAME)-y += $(foreach _m,$(INTERNAL_EXTRA_KBUILD_OBJECTS:.o=),$($(_m)-y))
+$(if $(pvrsrvkm-y),,$(error pvrsrvkm-y was empty, which could mean that srvkm is missing from $$(KERNEL_COMPONENTS)))
+pvrsrvkm-y += $(foreach _m,$(INTERNAL_EXTRA_KBUILD_OBJECTS:.o=),$($(_m)-y))
obj-m += $(INTERNAL_KBUILD_OBJECTS)
diff --git a/eurasiacon/build/linux2/kbuild/kbuild.mk b/eurasia_km/eurasiacon/build/linux2/kbuild/kbuild.mk
index eeaa0ee..63542f0 100644
--- a/eurasiacon/build/linux2/kbuild/kbuild.mk
+++ b/eurasia_km/eurasiacon/build/linux2/kbuild/kbuild.mk
@@ -58,7 +58,7 @@ kbuild: $(TARGET_OUT)/kbuild/Makefile
INTERNAL_KBUILD_OBJECTS="$(INTERNAL_KBUILD_OBJECTS)" \
INTERNAL_EXTRA_KBUILD_OBJECTS="$(INTERNAL_EXTRA_KBUILD_OBJECTS)" \
EXTRA_KBUILD_SOURCE="$(EXTRA_KBUILD_SOURCE)" \
- CROSS_COMPILE="$(KERNEL_CROSS_COMPILE)" \
+ CROSS_COMPILE="$(CCACHE) $(KERNEL_CROSS_COMPILE)" \
EXTRA_CFLAGS="$(ALL_KBUILD_CFLAGS)" \
V=$(V) W=$(W) \
TOP=$(TOP)
@@ -72,19 +72,19 @@ kbuild_clean: $(TARGET_OUT)/kbuild/Makefile
INTERNAL_KBUILD_OBJECTS="$(INTERNAL_KBUILD_OBJECTS)" \
INTERNAL_EXTRA_KBUILD_OBJECTS="$(INTERNAL_EXTRA_KBUILD_OBJECTS)" \
EXTRA_KBUILD_SOURCE="$(EXTRA_KBUILD_SOURCE)" \
- CROSS_COMPILE="$(KERNEL_CROSS_COMPILE)" \
+ CROSS_COMPILE="$(CCACHE) $(KERNEL_CROSS_COMPILE)" \
EXTRA_CFLAGS="$(ALL_KBUILD_CFLAGS)" \
V=$(V) W=$(W) \
TOP=$(TOP) clean
-kbuild_install: kbuild $(TARGET_OUT)/kbuild/Makefile
+kbuild_install: $(TARGET_OUT)/kbuild/Makefile
@: $(if $(strip $(DISCIMAGE)),,$(error $$(DISCIMAGE) was empty or unset while trying to use it to set INSTALL_MOD_PATH for modules_install))
@$(MAKE) -Rr --no-print-directory -C $(KERNELDIR) M=$(abspath $(TARGET_OUT)/kbuild) \
INTERNAL_KBUILD_MAKEFILES="$(INTERNAL_KBUILD_MAKEFILES)" \
INTERNAL_KBUILD_OBJECTS="$(INTERNAL_KBUILD_OBJECTS)" \
INTERNAL_EXTRA_KBUILD_OBJECTS="$(INTERNAL_EXTRA_KBUILD_OBJECTS)" \
EXTRA_KBUILD_SOURCE="$(EXTRA_KBUILD_SOURCE)" \
- CROSS_COMPILE="$(KERNEL_CROSS_COMPILE)" \
+ CROSS_COMPILE="$(CCACHE) $(KERNEL_CROSS_COMPILE)" \
EXTRA_CFLAGS="$(ALL_KBUILD_CFLAGS)" \
INSTALL_MOD_PATH="$(DISCIMAGE)" \
V=$(V) W=$(W) \
diff --git a/eurasiacon/build/linux2/kernel_module.mk b/eurasia_km/eurasiacon/build/linux2/kernel_module.mk
index 33c8246..a0a1289 100644
--- a/eurasiacon/build/linux2/kernel_module.mk
+++ b/eurasia_km/eurasiacon/build/linux2/kernel_module.mk
@@ -66,7 +66,7 @@ $(THIS_MODULE):
@echo "kbuild module '$@'"
@echo " MODULE_KBUILD_MAKEFILE := $(MODULE_KBUILD_MAKEFILE)"
@echo " MODULE_KBUILD_OBJECTS := $(MODULE_KBUILD_OBJECTS)"
- @echo ' Being built:' $(if $(filter $@,$(KERNEL_COMPONENTS)),"yes (separate module)",$(if $(filter $@,$(EXTRA_PVRSRVKM_COMPONENTS)),"yes (into omapdrm)","no"))
+ @echo ' Being built:' $(if $(filter $@,$(KERNEL_COMPONENTS)),"yes (separate module)",$(if $(filter $@,$(EXTRA_PVRSRVKM_COMPONENTS)),"yes (into pvrsrvkm)","no"))
@echo "Module $@ is a kbuild module. Run 'make kbuild' to make it"
@false
diff --git a/eurasiacon/build/linux2/kernel_version.mk b/eurasia_km/eurasiacon/build/linux2/kernel_version.mk
index 35ecceb..35ecceb 100644
--- a/eurasiacon/build/linux2/kernel_version.mk
+++ b/eurasia_km/eurasiacon/build/linux2/kernel_version.mk
diff --git a/eurasiacon/build/linux2/moduledefs.mk b/eurasia_km/eurasiacon/build/linux2/moduledefs.mk
index 869026f..155d3bb 100644
--- a/eurasiacon/build/linux2/moduledefs.mk
+++ b/eurasia_km/eurasiacon/build/linux2/moduledefs.mk
@@ -48,20 +48,47 @@ MODULE_HOST_LDFLAGS := $(ALL_HOST_LDFLAGS) $($(THIS_MODULE)_ldflags)
MODULE_BISON_FLAGS := $(ALL_BISON_FLAGS) $($(THIS_MODULE)_bisonflags)
MODULE_FLEX_FLAGS := $(ALL_FLEX_FLAGS) $($(THIS_MODULE)_flexflags)
-# -L flags for library search dirs
+ifneq ($(BUILD),debug)
+ifeq ($(USE_LTO),1)
+MODULE_HOST_LDFLAGS := \
+ $(sort $(filter-out -W% -D%,$(ALL_HOST_CFLAGS) $(ALL_HOST_CXXFLAGS))) \
+ $(MODULE_HOST_LDFLAGS)
+MODULE_LDFLAGS := \
+ $(sort $(filter-out -W% -D%,$(ALL_CFLAGS) $(ALL_CXXFLAGS))) \
+ $(MODULE_LDFLAGS)
+endif
+endif
+
+# Only allow cflags that do not affect code generation. This is to ensure
+# proper binary compatibility when LTO (Link-Time Optimization) is enabled.
+# We make exceptions for the below flags which will all fail linkage in
+# non-LTO mode if incorrectly specified.
+#
+# NOTE: Only used by static_library and objects right now. Other module
+# types should not be affected by complex code generation flags w/ LTO.
+MODULE_ALLOWED_CFLAGS := -W% -D% -std=% -fPIC -fPIE -pie -m32
+
+# -L flags for library search dirs: these are relative to $(TOP), unless
+# they're absolute paths
MODULE_LIBRARY_DIR_FLAGS := $(foreach _path,$($(THIS_MODULE)_libpaths),$(if $(filter /%,$(_path)),-L$(call relative-to-top,$(_path)),-L$(_path)))
-# -I flags for header search dirs
+# -I flags for header search dirs (same rules as for -L)
MODULE_INCLUDE_FLAGS := $(foreach _path,$($(THIS_MODULE)_includes),$(if $(filter /%,$(_path)),-I$(call relative-to-top,$(_path)),-I$(_path)))
# Variables used to differentiate between host/target builds
MODULE_OUT := $(if $(MODULE_HOST_BUILD),$(HOST_OUT),$(TARGET_OUT))
+# For documentation modules, this variable is overridden by the module type
+# makefile to place the intermediates in $(DOCS_OUT)/intermediates.
MODULE_INTERMEDIATES_DIR := $(if $(MODULE_HOST_BUILD),$(HOST_INTERMEDIATES)/$(THIS_MODULE),$(TARGET_INTERMEDIATES)/$(THIS_MODULE))
.SECONDARY: $(MODULE_INTERMEDIATES_DIR)
$(MODULE_INTERMEDIATES_DIR):
$(make-directory)
+# These are used for messages and variable names where we need to say "host"
+# or "target" according to the module build type.
Host_or_target := $(if $(MODULE_HOST_BUILD),Host,Target)
+host_or_target := $(if $(MODULE_HOST_BUILD),host,target)
+HOST_OR_TARGET := $(if $(MODULE_HOST_BUILD),HOST,TARGET)
# These define the rules for finding source files.
# - If a name begins with a slash, we strip $(TOP) off the front if it begins
@@ -77,18 +104,26 @@ _SOURCES_WITHOUT_SLASH := $(strip $(foreach _s,$($(THIS_MODULE)_src),$(if $(find
_SOURCES_WITH_SLASH := $(strip $(foreach _s,$($(THIS_MODULE)_src),$(if $(findstring /,$(_s)),$(_s),)))
MODULE_SOURCES := $(addprefix $(THIS_DIR)/,$(_SOURCES_WITHOUT_SLASH))
MODULE_SOURCES += $(call relative-to-top,$(filter /%,$(_SOURCES_WITH_SLASH)))
+
_RELATIVE_SOURCES_WITH_SLASH := $(filter-out /%,$(_SOURCES_WITH_SLASH))
_OUTDIR_RELATIVE_SOURCES_WITH_SLASH := $(filter $(RELATIVE_OUT)/%,$(_RELATIVE_SOURCES_WITH_SLASH))
_THISDIR_RELATIVE_SOURCES_WITH_SLASH := $(filter-out $(RELATIVE_OUT)/%,$(_RELATIVE_SOURCES_WITH_SLASH))
MODULE_SOURCES += $(_OUTDIR_RELATIVE_SOURCES_WITH_SLASH)
MODULE_SOURCES += $(addprefix $(THIS_DIR)/,$(_THISDIR_RELATIVE_SOURCES_WITH_SLASH))
+
+# Generated sources and headers. We use $(MODULE_OUT) because it encourages
+# correctly marking modules which generate headers as host/target.
MODULE_SOURCES += $(addprefix $(MODULE_OUT)/intermediates/,$($(THIS_MODULE)_gensrc))
MODULE_GENERATED_HEADERS := $(addprefix $(MODULE_OUT)/intermediates/,$($(THIS_MODULE)_genheaders))
-# -l flags for each library
+# -l flags for each library. The rules are:
+# - for all static libs, use -lfoo
+# - for all in-tree or external libs, use $(libfoo_ldflags) if that
+# variable is defined (empty counts as defined). Otherwise use
+# -lfoo.
MODULE_LIBRARY_FLAGS := $(addprefix -l, $($(THIS_MODULE)_staticlibs)) $(addprefix -l,$($(THIS_MODULE)_libs)) $(foreach _lib,$($(THIS_MODULE)_extlibs),$(if $(filter undefined,$(origin lib$(_lib)_ldflags)),-l$(_lib),$(lib$(_lib)_ldflags)))
-# pkg-config integration; primarily used by X.org
+# pkg-config integration; primarily used by X.Org
# FIXME: We don't support arbitrary CFLAGS yet (just includes)
$(foreach _package,$($(THIS_MODULE)_packages),\
$(eval MODULE_INCLUDE_FLAGS += `pkg-config --cflags-only-I $(_package)`)\
diff --git a/eurasiacon/build/linux2/modules.mk b/eurasia_km/eurasiacon/build/linux2/modules.mk
index 1576590..1576590 100644
--- a/eurasiacon/build/linux2/modules.mk
+++ b/eurasia_km/eurasiacon/build/linux2/modules.mk
diff --git a/eurasia_km/eurasiacon/build/linux2/nohw_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/nohw_linux/Makefile
new file mode 100644
index 0000000..dff0861
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/nohw_linux/Makefile
@@ -0,0 +1,109 @@
+########################################################################### ###
+#@Title Root makefile for No HW Linux. Builds everything else.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+PVR_SYSTEM := sgx_nohw
+
+include ../kernel_version.mk
+
+BUFFERCLASS_MODULE ?= bufferclass_example
+KERNEL_COMPONENTS := srvkm $(BUFFERCLASS_MODULE)
+
+DISPLAY_CONTROLLER := dcnohw
+
+OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
+
+PDUMP ?= 1
+NO_HARDWARE := 1
+
+ifneq ($(SGXCORE),520)
+ifneq ($(SGXCORE),5300)
+SGX_FAST_DPM_INIT ?= 1
+endif
+endif
+
+SUPPORT_SGX_HWPERF ?= 0
+
+DC_NOHW_WIDTH ?= 640
+DC_NOHW_HEIGHT ?= 480
+
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+SUPPORT_DRI_DRM := 1
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+else
+OPK_FALLBACK := libpvrEWS_WSEGL.so
+endif
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+EXTRA_PVRSRVKM_COMPONENTS += dc_nohw
+ifeq ($(call kernel-version-at-least,2,6,39),true)
+# For the benefit of DRM, the SGX driver will create a dummy platform
+# device to represent SGX.
+LDM_PCI := 0
+LDM_PLATFORM := 1
+PVR_DRI_DRM_PLATFORM_DEV := 1
+PVR_DRI_DRM_STATIC_BUS_ID := 1
+ifeq ($(call kernel-version-at-least,3,1),true)
+ifeq ($(call kernel-version-at-least,3,4),true)
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:sgxnohw:00\""
+else
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:sgxnohw:-1\""
+endif
+endif
+else
+# Build a DRM module that doesn't require a real SGX device to manage.
+# DRM needs to be removed from the Linux kernel configuration for this to
+# work.
+PVR_DRI_DRM_NOT_PCI := 1
+KERNEL_COMPONENTS += linux_drm
+EXTRA_KBUILD_SOURCE := $(KERNELDIR)
+endif
+else
+KERNEL_COMPONENTS += dc_nohw
+endif
+
+# Should be last
+include ../config/core.mk
+include ../common/xorg.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
+$(eval $(call KernelConfigC,DC_NOHW_BUFFER_WIDTH,$(DC_NOHW_WIDTH)))
+$(eval $(call KernelConfigC,DC_NOHW_BUFFER_HEIGHT,$(DC_NOHW_HEIGHT)))
diff --git a/eurasia_km/eurasiacon/build/linux2/omap_android/Makefile b/eurasia_km/eurasiacon/build/linux2/omap_android/Makefile
new file mode 100644
index 0000000..b97a3c4
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/omap_android/Makefile
@@ -0,0 +1,221 @@
+########################################################################### ###
+#@Title Root makefile for omap4430 Android. Builds everything else.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+# If a TARGET_PRODUCT is specified but not a TARGET_DEVICE, try to
+# derive the TARGET_DEVICE from TARGET_PRODUCT.
+#
+ifeq ($(TARGET_DEVICE),)
+override TARGET_DEVICE := \
+ $(patsubst mini_%,%,$(patsubst full_%,%,$(TARGET_PRODUCT)))
+endif
+
+ifeq ($(TARGET_DEVICE),)
+override TARGET_DEVICE := blaze
+endif
+
+# Customize this build as per the TARGET_DEVICE setting
+#
+ifneq ($(filter blaze blaze_tablet panda tuna maguro toro mysid yakju,$(TARGET_DEVICE)),)
+SGXCORE := 540
+SGX_CORE_REV := 120
+HAL_VARIANT := omap4
+endif
+ifneq ($(filter blaze.4470 blaze_tablet.4470,$(TARGET_DEVICE)),)
+SGXCORE := 544
+SGX_CORE_REV := 112
+HAL_VARIANT := omap4
+endif
+ifneq ($(filter omap5sevm panda5,$(TARGET_DEVICE)),)
+SGXCORE := 544
+SGX_CORE_REV := 105
+SGX_FEATURE_MP := 1
+SGX_FEATURE_SYSTEM_CACHE := 1
+SGX_FEATURE_MP_CORE_COUNT := 2
+HAL_VARIANT := omap5
+
+# OMAP Product Version
+VS_PRODUCT_VERSION := 5
+
+# FIXME: Re-enable this ASAP
+SUPPORT_ACTIVE_POWER_MANAGEMENT := 0
+endif
+
+# Handle any TARGET_DEVICE remapping. Not all DDK TARGET_DEVICEs
+# require new Android TARGET_DEVICE builds.
+#
+ifeq ($(TARGET_DEVICE),blaze.4470)
+override TARGET_DEVICE := blaze
+endif
+ifeq ($(TARGET_DEVICE),blaze_tablet.4470)
+override TARGET_DEVICE := blaze_tablet
+endif
+
+SGX_DYNAMIC_TIMING_INFO := 1
+
+SUPPORT_LINUX_USING_WORKQUEUES := 1
+
+SUPPORT_PVRSRV_ANDROID_SYSTRACE := 1
+
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+DISPLAY_CONTROLLER := omaplfb
+endif
+
+PVR_SYSTEM := omap
+
+KERNEL_CROSS_COMPILE ?= arm-eabi-
+
+# We have more memory on OMAP platforms, so we can spare to make the
+# pool larger, and have higher resolutions which benefit from it.
+#
+PVR_LINUX_MEM_AREA_POOL_MAX_PAGES ?= 10800
+
+include ../common/android/paths.mk
+include ../common/android/armv7-a.mk
+include ../common/android/features.mk
+
+ifneq ($(strip $(KERNELDIR)),)
+ include ../kernel_version.mk
+ ifeq ($(call kernel-version-at-least,2,6,35),true)
+ PVR_NO_OMAP_TIMER := 1
+ endif
+ ifeq ($(call kernel-version-at-least,2,6,39),true)
+ ifeq ($(LDM_PLATFORM),1)
+ PVR_LDM_PLATFORM_PRE_REGISTERED := 1
+ PVR_LDM_PLATFORM_PRE_REGISTERED_DEV := "\"pvrsrvkm\""
+ endif
+ endif
+ ifeq ($(call kernel-version-at-least,3,0),true)
+ SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED := 1
+ SYS_OMAP_HAS_DVFS_FRAMEWORK := 1
+ endif
+else
+ $(warning "KERNELDIR is not set, so can't feature check DVFS or dsscomp.")
+ $(warning "Assuming we want DVFS and dsscomp support.")
+ SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED := 1
+ SYS_OMAP_HAS_DVFS_FRAMEWORK := 1
+endif
+
+ifneq ($(LDM_PLATFORM),1)
+SUPPORT_LINUX_USING_WORKQUEUES := 0
+SUPPORT_LINUX_USING_SHARED_WORKQUEUES := 1
+SUPPORT_ACTIVE_POWER_MANAGEMENT := 0
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+DISPLAY_CONTROLLER := pvrlfb
+DISPLAY_CONTROLLER_COMPONENT := linux_framebuffer
+OMAP_NON_FLIP_DISPLAY := 1
+endif
+else # LDM_PLATFORM != 1
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+DISPLAY_CONTROLLER_COMPONENT := dc_omapfb3_linux
+endif
+endif # LDM_PLATFORM != 1
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+ifeq ($(PVR_LDM_PLATFORM_PRE_REGISTERED),1)
+PVR_DRI_DRM_PLATFORM_DEV := 1
+PVR_DRI_DRM_STATIC_BUS_ID := 1
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:pvrsrvkm"\"
+else
+PVR_DRI_DRM_NOT_PCI := 1
+KERNEL_COMPONENTS += linux_drm
+endif
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
+endif
+EXTRA_KBUILD_SOURCE := $(KERNELDIR)
+# FIXME: Only required for comparison with X's KM
+PVR_SECURE_DRM_AUTH_EXPORT := 1
+ifneq ($(OMAP_NON_FLIP_DISPLAY),1)
+PVR_DISPLAY_CONTROLLER_DRM_IOCTL := 1
+endif
+else # SUPPORT_DRI_DRM == 1
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
+endif
+endif # SUPPORT_DRI_DRM == 1
+
+SUPPORT_ANDROID_OMAP_NV12 := 1
+
+PVR_ANDROID_USE_WINDOW_TRANSFORM_HINT := 1
+
+PVR_ANDROID_PLATFORM_HAS_LINUX_FBDEV := 1
+
+# Handle Google's OMAP-based products
+#
+ifneq ($(filter tuna maguro toro mysid yakju,$(TARGET_DEVICE)),)
+# These default on in tuna_defconfig
+PVRSRV_USSE_EDM_STATUS_DEBUG ?= 1
+PVRSRV_DUMP_MK_TRACE ?= 1
+# Go back to the old compiler for tuna kernel modules
+KERNEL_CROSS_COMPILE := arm-eabi-
+endif
+
+ifeq ($(NO_HARDWARE),1)
+ifeq ($(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED),1)
+$(info WARNING: SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED=1 is incompatible with NO_HARDWARE=1)
+$(info WARNING: Setting SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED=0 and switching to dc_nohw)
+override SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED := 0
+ifneq ($(SUPPORT_PVRSRV_DEVICE_CLASS),0)
+override DISPLAY_CONTROLLER := dcnohw
+KERNEL_COMPONENTS += dc_nohw
+endif
+endif # SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED == 1
+endif # NO_HARDWARE == 1
+
+include ../config/core.mk
+include ../common/android/extra_config.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
+include ../common/omap4.mk
+
+# Not all OMAP kernels have a compatible DVFS framework
+#
+$(eval $(call TunableKernelConfigC,SYS_OMAP_HAS_DVFS_FRAMEWORK,))
+
+# If set, services allows two flips to enter the processing queue,
+# and does not add read dependencies to the set of buffers last
+# flipped to. This is necessary for DSS composition on OMAP.
+#
+$(eval $(call TunableKernelConfigC,SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED,))
+
+# On OMAP a TILER-specific NV12 format is supported.
+#
+$(eval $(call TunableUserConfigMake,SUPPORT_ANDROID_OMAP_NV12,))
diff --git a/eurasiacon/build/linux2/omap4430_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/omap_linux/Makefile
index e77a2bc..2df979f 100644
--- a/eurasiacon/build/linux2/omap4430_linux/Makefile
+++ b/eurasia_km/eurasiacon/build/linux2/omap_linux/Makefile
@@ -39,32 +39,56 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
### ###########################################################################
-PVR_SYSTEM := omap4
-
-KERNEL_COMPONENTS := srvkm
+# If a product wasn't specified, we're an OMAP4430 blaze.
+#
+TARGET_PRODUCT ?= omap5uevm
-# Confirm kernel version with KERNELDIR if supplied, otherwise assume
-# a 2.6.35+ kernel.
-ifneq ($(KERNELDIR),)
-include ../kernel_version.mk
-OMAP_KERNEL_AT_LEAST_2_6_35 := $(shell test $(KERNEL_VERSION) -ge 3 || \
- test $(KERNEL_VERSION) -ge 2 -a \
- $(KERNEL_PATCHLEVEL) -ge 6 -a \
- $(KERNEL_SUBLEVEL) -ge 35 && echo 1 || echo 0)
-else
-OMAP_KERNEL_AT_LEAST_2_6_35 := 1
+# Customize this build as per the TARGET_PRODUCT setting
+#
+ifneq ($(filter blaze blaze_tablet panda,$(TARGET_PRODUCT)),)
+ SGXCORE := 540
+ SGX_CORE_REV := 120
endif
+ifneq ($(filter blaze.4470 blaze_tablet.4470,$(TARGET_PRODUCT)),)
+ SGXCORE := 544
+ SGX_CORE_REV := 112
+endif
+ifneq ($(filter omap5sevm panda5,$(TARGET_PRODUCT)),)
+ SGXCORE := 544
+ SGX_CORE_REV := 105
+ SGX_FEATURE_MP := 1
+ SGX_FEATURE_SYSTEM_CACHE := 1
+ SGX_FEATURE_MP_CORE_COUNT := 2
+ PVR_OMAPLFB_DRM_FB := 0
+ SYS_OMAP_HAS_DVFS_FRAMEWORK := 1
+
+ # OMAP Product Version
+ VS_PRODUCT_VERSION := 5
+
+ # FIXME: Re-enable this ASAP
+ SUPPORT_ACTIVE_POWER_MANAGEMENT := 0
+endif
+ifneq ($(filter omap5uevm,$(TARGET_PRODUCT)),)
+ SGXCORE := 544
+ SGX_CORE_REV := 116
+ SGX_FEATURE_MP := 1
+ SGX_FEATURE_SYSTEM_CACHE := 1
+ SGX_FEATURE_MP_CORE_COUNT := 2
-include ../common/xorg_test.mk
+ SYS_OMAP5_UEVM := 1
-ifeq ($(want_xorg),1)
-SUPPORT_DRI_DRM := 1
-SUPPORT_DRI_DRM_EXTERNAL := 1
-SUPPORT_BC_EXAMPLE ?= 0
-else
-SUPPORT_BC_EXAMPLE ?= 1
+ # OMAP Product Version
+ VS_PRODUCT_VERSION := 5
endif
+PVR_SYSTEM := omap
+
+KERNEL_COMPONENTS := srvkm bufferclass_example
+
+SUPPORT_OLD_ION_API := 1
+
+include ../kernel_version.mk
+
# Only enable active power management if passive power management is
# enabled, as indicated by LDM_PLATFORM being set to 1. On OMAP,
# the system can suspend in the case where active power management is
@@ -75,8 +99,8 @@ LDM_PLATFORM ?= 1
ifeq ($(LDM_PLATFORM),1)
SUPPORT_LINUX_USING_WORKQUEUES := 1
-#DISPLAY_CONTROLLER_COMPONENT += dc_omapdrm_linux
-#DISPLAY_CONTROLLER := omaplfb
+DISPLAY_CONTROLLER_COMPONENT += dc_omapfb3_linux
+DISPLAY_CONTROLLER := omaplfb
else
SUPPORT_LINUX_USING_SHARED_WORKQUEUES := 1
OMAP_NON_FLIP_DISPLAY := 1
@@ -84,13 +108,21 @@ DISPLAY_CONTROLLER_COMPONENT += linux_framebuffer
DISPLAY_CONTROLLER := pvrlfb
endif
-# When flipping is enabled, the Framebuffer API will be used to
-# present the frames to the display in the 3PDD
-FLIP_TECHNIQUE_FRAMEBUFFER := 1
+SYS_CFLAGS := -march=armv7-a
-OPTIM := -Os
+UBUNTU_TOOLCHAIN :=
+ifeq ($(CROSS_COMPILE),)
+UBUNTU_TOOLCHAIN = 1
+endif
+ifeq ($(CROSS_COMPILE),arm-linux-gnueabi-)
+UBUNTU_TOOLCHAIN = 1
+endif
+ifeq ($(CROSS_COMPILE),arm-linux-gnueabihf-)
+UBUNTU_TOOLCHAIN = 1
+endif
-SYS_CFLAGS := -march=armv7-a
+ifeq ($(UBUNTU_TOOLCHAIN),)
+OPTIM := -Os
ifneq ($(CROSS_COMPILE),)
SYS_CFLAGS += -mtls-dialect=arm
@@ -99,20 +131,46 @@ endif
SUPPORT_OMAP4430_NEON ?= 1
ifeq ($(SUPPORT_OMAP4430_NEON),1)
-SYS_CFLAGS += -ftree-vectorize -mfpu=neon -mfloat-abi=hard
+SYS_CFLAGS += -ftree-vectorize -mfpu=neon -mfloat-abi=softfp
endif
-
-PVR_NO_FULL_CACHE_OPS := 1
+endif # UBUNTU_TOOLCHAIN
LIBGCC := $(shell $(CROSS_COMPILE)gcc -print-libgcc-file-name)
-SGXCORE := 540
-SGX_CORE_REV := 120
-
SGX_DYNAMIC_TIMING_INFO := 1
SYS_CUSTOM_POWERLOCK_WRAP := 1
-ifeq ($(OMAP_KERNEL_AT_LEAST_2_6_35),1)
+ifeq ($(OMAP_NON_FLIP_DISPLAY),1)
+OPK_DEFAULT := libpvrPVR2D_BLITWSEGL.so
+else
+OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
+endif
+
+ifeq ($(SYS_OMAP5_UEVM),1)
+XORG_EXPLICIT_PVR_SERVICES_LOAD := 1
+ifeq ($(call kernel-version-at-least,3,8,13),true)
+SUPPORT_DRI_DRM := 1
+LDM_PLATFORM := 1
+PVR_LDM_DEVICE_TREE := 1
+PVR_DRI_DRM_PLATFORM_DEV := 1
+SUPPORT_DMABUF := 1
+PVR_DRM_MODESET_DRIVER_NAME := omapdrm
+PVR_DRM_MODESET_MODULE_NAME := dumb
+# No display class driver.
+DISPLAY_CONTROLLER_COMPONENT :=
+DISPLAY_CONTROLLER :=
+else
+PVR_LDM_PLATFORM_PRE_REGISTERED := 1
+PVR_LDM_PLATFORM_PRE_REGISTERED_DEV := "\"omapdrm_pvr\""
+PVR_OMAPLFB_DRM_FB := 0
+PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY := 1
+endif
+else
+ifeq ($(call kernel-version-at-least,2,6,35),true)
+# Work around flipping problems seen with the Taal LCDs on Blaze.
+# The work around is safe to use with other types of screen on Blaze
+# (e.g. HDMI) and on other platforms (e.g. Panda board).
+PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY := 1
ifeq ($(LDM_PLATFORM),1)
PVR_LDM_PLATFORM_PRE_REGISTERED := 1
ifeq ($(call kernel-version-at-least,2,6,35,7),true)
@@ -135,41 +193,59 @@ endif
endif
endif
endif
-
-BUILD_OPENCL ?= 0
-ifneq ($(BUILD_OPENCL),1)
-EXCLUDED_APIS += opencl
endif
-ifeq ($(want_xorg),1)
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+SUPPORT_DRI_DRM := 1
+endif
+ifeq ($(SUPPORT_DRI_DRM),1)
+ifeq ($(SYS_OMAP5_UEVM),1)
+PVR_DRI_DRM_PLATFORM_DEV := 1
+ifneq ($(call kernel-version-at-least,3,8,13),true)
+PVR_DRI_DRM_STATIC_BUS_ID := 1
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:omapdrm_pvr:00"\"
+endif
+else
ifeq ($(call kernel-version-at-least,2,6,35),true)
PVR_DRI_DRM_PLATFORM_DEV := 1
+PVR_DRI_DRM_STATIC_BUS_ID := 1
+ifeq ($(call kernel-version-at-least,2,6,35,7),true)
+ifeq ($(PVR_OMAPLFB_DRM_FB),1)
+SUPPORT_DRI_DRM_PLUGIN := 1
+endif
+ifeq ($(call kernel-version-at-least,2,6,36),true)
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:pvrsrvkm"\"
else
+PVR_DRI_DRM_DEV_BUS_ID := "\"platform:pvrsrvkm:00"\"
+endif # kernel-version-at-least,2,6,36
+endif # kernel-version-at-least,2,6,35,7
+else # kernel-version-at-least,2,6,35
PVR_DRI_DRM_NOT_PCI := 1
-endif
+endif # kernel-version-at-least,2,6,35
+endif # ($(SYS_OMAP5_UEVM),1)
+endif # SUPPORT_DRI_DRM
-XORG_PREFIX := /usr
-XORG_TOOLCHAIN := extern
-XORG_PVR_CONF := omap4
-XORG_PVR_VIDEO := omap4
-XF86_VIDEO ?= ti-pvr_video
+ifeq ($(PVR_DRM_MODESET_DRIVER_NAME),)
+ifeq ($(SUPPORT_BUILD_XORG),1)
+ifeq ($(call kernel-version-at-least,2,6,35,7),true)
+# A client DRI authorisation failure, whilst switched away from the X Server
+# VT, prevents all other attempts at DRI authorisation, even after
+# switching back to the X server VT, so don't perform a DRM drop master
+# call.
+PVR_XORG_DONT_DROP_MASTER_IN_LEAVE_VT := 1
+endif
+XORG_PVR_VIDEO ?= omap4
-OPK_DEFAULT := libpvrPVR2D_DRIWSEGL.so
OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
ifneq ($(OMAP_NON_FLIP_DISPLAY),1)
-XORG_PVR_VIDEO ?= $(PVR_SYSTEM)
PVR_DISPLAY_CONTROLLER_DRM_IOCTL := 1
endif
else # xorg isn't excluded
-ifeq ($(OMAP_NON_FLIP_DISPLAY),1)
-OPK_DEFAULT := libpvrPVR2D_BLITWSEGL.so
-else
-OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
-endif
OPK_FALLBACK := libpvrPVR2D_BLITWSEGL.so
endif # xorg isn't excluded
@@ -183,27 +259,14 @@ EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
else
KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER_COMPONENT)
endif
-
-SUPPORT_V4L2_GFX ?= 0
-
-SUPPORT_MEMINFO_IDS ?= 1
-
-SUPPORT_MESA_SONAME ?= 1
-
-SUPPORT_MEMINFO_IDS ?= 1
-
-ifeq ($(SUPPORT_V4L2_GFX),1)
-KERNEL_COMPONENTS += v4l2-gfx
+else # ($(PVR_DRM_MODESET_DRIVER_NAME),)
+OPK_DEFAULT := libpvrDRMWSEGL.so
+ifeq ($(SUPPORT_BUILD_XORG),1)
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+XORG_PVR_VIDEO ?= generic_drm
endif
-
-ifeq ($(SUPPORT_BC_EXAMPLE),1)
-KERNEL_COMPONENTS += bufferclass_example
endif
-PVRSRV_MODNAME := omapdrm_pvr
-
-PVRSRV_BUSID := platform:omapdrm:00
-
include ../config/core.mk
include ../common/xorg.mk
include ../common/dridrm.mk
@@ -215,3 +278,7 @@ include ../common/omap4.mk
# now obsolete..
#
$(eval $(call UserConfigMake,DISPLAY_CONTROLLER_DIR,3rdparty/$(DISPLAY_CONTROLLER_COMPONENT)))
+
+$(eval $(call TunableKernelConfigC,SYS_OMAP5_UEVM,))
+
+$(eval $(call TunableKernelConfigC,SYS_OMAP_HAS_DVFS_FRAMEWORK,))
diff --git a/eurasia_km/eurasiacon/build/linux2/pc_i686_cedarview_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/pc_i686_cedarview_linux/Makefile
new file mode 100644
index 0000000..d942b06
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/pc_i686_cedarview_linux/Makefile
@@ -0,0 +1,87 @@
+########################################################################### ###
+#@Title Root makefile for Cedarview Linux. Builds everything else.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+PVR_SYSTEM := cedarview_linux
+KERNEL_COMPONENTS := srvkm bufferclass_example
+
+ifeq ($(SGXCORE),)
+SGXCORE := 545
+SGX_CORE_REV := 10131
+endif
+
+DISPLAY_CONTROLLER := dc_poulsbo
+DISPLAY_CONTROLLER_DIR := dc_poulsbo
+
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+SUPPORT_DRI_DRM := 1
+ifneq ($(DISPLAY_CONTROLLER),)
+SUPPORT_DRM_MODESET := 1
+PVR_DISPLAY_CONTROLLER_DRM_IOCTL := 1
+endif
+
+OPK_DEFAULT := libpvrPVR2D_BLITWSEGL.so
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+else
+OPK_DEFAULT := libpvrEWS_WSEGL.so
+OPK_FALLBACK := libpvrPVR2D_BLITWSEGL.so
+endif
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+LDM_PCI := 1
+EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER_DIR)
+else
+KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER)
+endif
+
+SUPPORT_SGX_UKERNEL_DCU_BYPASS := 1
+
+# Should be last
+include ../config/core.mk
+include ../common/xorg.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+$(eval $(call TunableKernelConfigC,PVRPSB_WIDTH,$(PVRPSB_WIDTH)))
+$(eval $(call TunableKernelConfigC,PVRPSB_HEIGHT,$(PVRPSB_HEIGHT)))
+$(eval $(call TunableKernelConfigC,PVRPSB_VREFRESH,$(PVRPSB_VREFRESH)))
+endif
diff --git a/eurasia_km/eurasiacon/build/linux2/pc_i686_poulsbo_d0_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/pc_i686_poulsbo_d0_linux/Makefile
new file mode 100644
index 0000000..86c0adf
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/pc_i686_poulsbo_d0_linux/Makefile
@@ -0,0 +1,86 @@
+########################################################################### ###
+#@Title Root makefile for embedded Poulsbo.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+#
+# Note: Use intel_linux for kontron reference platform builds.
+
+PVR_SYSTEM := poulsbo
+KERNEL_COMPONENTS := srvkm bufferclass_example
+
+ifeq ($(SGXCORE),)
+SGXCORE := 535
+SGX_CORE_REV := 121
+endif
+
+DISPLAY_CONTROLLER := dc_poulsbo
+
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+SUPPORT_DRI_DRM := 1
+ifneq ($(DISPLAY_CONTROLLER),)
+SUPPORT_DRM_MODESET := 1
+PVR_DISPLAY_CONTROLLER_DRM_IOCTL := 1
+endif
+
+OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+else
+OPK_DEFAULT := libpvrEWS_WSEGL.so
+OPK_FALLBACK := libpvrPVR2D_FLIPWSEGL.so
+endif
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+LDM_PCI := 1
+EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER)
+else
+KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER)
+endif
+
+# Should be last
+include ../config/core.mk
+include ../common/xorg.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+$(eval $(call TunableKernelConfigC,PVRPSB_WIDTH,$(PVRPSB_WIDTH)))
+$(eval $(call TunableKernelConfigC,PVRPSB_HEIGHT,$(PVRPSB_HEIGHT)))
+$(eval $(call TunableKernelConfigC,PVRPSB_VREFRESH,$(PVRPSB_VREFRESH)))
+endif
diff --git a/eurasia_km/eurasiacon/build/linux2/pc_i686_tc_linux/Makefile b/eurasia_km/eurasiacon/build/linux2/pc_i686_tc_linux/Makefile
new file mode 100644
index 0000000..5267dee
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/pc_i686_tc_linux/Makefile
@@ -0,0 +1,77 @@
+########################################################################### ###
+#@Title Root makefile for TestChip Linux. Builds everything else.
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+include ../common/testchip_tc_fpga.mk
+
+ifneq ($(TC),)
+ OUT ?= $(TOP)/eurasiacon/binary2_pc_i686_tc$(TC)_linux_$(BUILD)
+else ifneq ($(FPGA),)
+ OUT ?= $(TOP)/eurasiacon/binary2_pc_i686_$(FPGA)fpga_linux_$(BUILD)
+endif
+
+DISPLAY_CONTROLLER := pvrpdp
+
+OPK_DEFAULT := libpvrPVR2D_FLIPWSEGL.so
+
+include ../common/xorg_test.mk
+ifeq ($(SUPPORT_BUILD_XORG),1)
+SUPPORT_DRI_DRM := 1
+OPK_FALLBACK := libpvrPVR2D_DRIWSEGL.so
+else
+OPK_FALLBACK := libpvrEWS_WSEGL.so
+endif
+
+BUFFERCLASS_MODULE ?= bufferclass_example
+KERNEL_COMPONENTS := srvkm $(BUFFERCLASS_MODULE)
+
+ifeq ($(SUPPORT_DRI_DRM),1)
+LDM_PCI := 1
+EXTRA_PVRSRVKM_COMPONENTS += $(DISPLAY_CONTROLLER)
+else
+KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER)
+endif
+
+# Should be last
+include ../config/core.mk
+include ../common/testchip.mk
+include ../common/xorg.mk
+include ../common/dridrm.mk
+include ../common/opencl.mk
diff --git a/eurasiacon/build/linux2/prepare_tree.mk b/eurasia_km/eurasiacon/build/linux2/prepare_tree.mk
index 05e4fe3..75dcca6 100644
--- a/eurasiacon/build/linux2/prepare_tree.mk
+++ b/eurasia_km/eurasiacon/build/linux2/prepare_tree.mk
@@ -40,10 +40,6 @@
.PHONY: prepare_tree
--include eurasiacon/build/linux2/kbuild/external_tarball.mk
-
-# If there's no external tarball, there's nothing to do
-#
prepare_tree:
INTERNAL_INCLUDED_PREPARE_HEADERS :=
diff --git a/eurasia_km/eurasiacon/build/linux2/sunxi_android/Makefile b/eurasia_km/eurasiacon/build/linux2/sunxi_android/Makefile
new file mode 100644
index 0000000..7518cab
--- /dev/null
+++ b/eurasia_km/eurasiacon/build/linux2/sunxi_android/Makefile
@@ -0,0 +1,123 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+# If a TARGET_PRODUCT is specified but not a TARGET_DEVICE, try to
+# derive the TARGET_DEVICE from TARGET_PRODUCT.
+#
+ifeq ($(TARGET_DEVICE),)
+override TARGET_DEVICE := \
+ $(patsubst mini_%,%,$(patsubst full_%,%,$(TARGET_PRODUCT)))
+ifneq ($(filter fiber_w02 v972v1 v972v2 novo9spark,$(TARGET_DEVICE)),)
+override TARGET_DEVICE := sun6i
+endif
+endif
+
+ifeq ($(TARGET_DEVICE),)
+override TARGET_DEVICE := sun6i
+endif
+
+SGXCORE := 544
+SGX_CORE_REV := 115
+SUPPORT_SLC := 1
+SGX_FEATURE_MP := 1
+SGX_FEATURE_MP_CORE_COUNT := 2
+
+PVR_SYSTEM := sunxi
+HAL_VARIANT := sun6i
+DISPLAY_CONTROLLER := dc_sunxi
+
+LDM_PLATFORM := 1
+
+SUPPORT_LINUX_USING_WORKQUEUES := 1
+SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED := 1
+
+PVR_ANDROID_USE_WINDOW_TRANSFORM_HINT ?= 1
+PVR_ANDROID_PLATFORM_HAS_LINUX_FBDEV := 1
+
+PVRSRV_USSE_EDM_STATUS_DEBUG ?= 1
+PVRSRV_DUMP_MK_TRACE ?= 1
+
+SUPPORT_ANDROID_SUNXI ?= 1
+
+ION_DEFAULT_HEAP_ID_MASK := ION_HEAP_CARVEOUT_MASK
+
+# We have more memory on the sun6i platform, so we can spare to make
+# the pool larger, and have higher resolutions which benefit from it.
+#
+PVR_LINUX_MEM_AREA_POOL_MAX_PAGES ?= 10800
+
+SGX_DYNAMIC_TIMING_INFO := 1
+
+SUPPORT_PVRSRV_ANDROID_SYSTRACE := 1
+
+KERNEL_CROSS_COMPILE ?= arm-eabi-
+
+include ../common/android/paths.mk
+include ../common/android/armv7-a.mk
+include ../common/android/features.mk
+
+ifneq ($(strip $(KERNELDIR)),)
+ include ../kernel_version.mk
+ KERNEL_COMPONENTS += $(DISPLAY_CONTROLLER)
+endif
+
+ifeq ($(NO_HARDWARE),1)
+ifeq ($(SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED),1)
+$(info WARNING: SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED=1 is incompatible with NO_HARDWARE=1)
+$(info WARNING: Setting SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED=0 and switching to dc_nohw)
+override SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED := 0
+override DISPLAY_CONTROLLER := dcnohw
+KERNEL_COMPONENTS += dc_nohw
+endif
+endif
+
+include ../config/core.mk
+include ../common/android/extra_config.mk
+include ../common/opencl.mk
+
+# If set, services allows two flips to enter the processing queue,
+# and does not add read dependencies to the set of buffers last
+# flipped to.
+#
+$(eval $(call TunableKernelConfigC,SUPPORT_DC_CMDCOMPLETE_WHEN_NO_LONGER_DISPLAYED,))
+
+# On sun6i, A31-specific NV12 and NV21 formats are supported.
+#
+$(eval $(call TunableUserConfigMake,SUPPORT_ANDROID_SUNXI,))
diff --git a/eurasiacon/build/linux2/this_makefile.mk b/eurasia_km/eurasiacon/build/linux2/this_makefile.mk
index c312001..c312001 100644
--- a/eurasiacon/build/linux2/this_makefile.mk
+++ b/eurasia_km/eurasiacon/build/linux2/this_makefile.mk
diff --git a/eurasiacon/build/linux2/tools/cc-check.sh b/eurasia_km/eurasiacon/build/linux2/tools/cc-check.sh
index 6cef8fa..9566c73 100755
--- a/eurasiacon/build/linux2/tools/cc-check.sh
+++ b/eurasia_km/eurasiacon/build/linux2/tools/cc-check.sh
@@ -44,24 +44,36 @@ LANG=C
export LANG
usage() {
- echo "usage: $0 [--64] --cc CC --out OUT [cflag]"
+ echo "usage: $0 [--64] [--clang] --cc CC [--out OUT] [cflag]"
exit 1
}
-# NOTE: The program passed to the compiler is deliberately incorrect
-# (`return;' should be `return 0;') but we do this to emit a warning.
-#
-# Emitting a warning is necessary to get GCC to print out additional
-# warnings about any unsupported -Wno options, so we can handle these
-# as unsupported by the build.
-#
+check_clang() {
+ $CC -dM -E - </dev/null | grep __clang__ >/dev/null 2>&1
+ if [ "$?" = "0" ]; then
+ # Clang must be passed a program with a main() that returns 0.
+ # It will produce an error if main() is improperly specified.
+ IS_CLANG=1
+ TEST_PROGRAM="int main(void){return 0;}"
+ else
+ # If we're not clang, assume we're GCC. GCC needs to be passed
+ # a program with a faulty return in main() so that another
+ # warning (unrelated to the flag being tested) is emitted.
+ # This will cause GCC to warn about the unsupported warning flag.
+ IS_CLANG=0
+ TEST_PROGRAM="int main(void){return;}"
+ fi
+}
+
do_cc() {
- echo "int main(void){return;}" | $CC -W -Wall $3 -xc -c - -o $1 >$2 2>&1
+ echo "$TEST_PROGRAM" | $CC -W -Wall $3 -xc -c - -o $1 >$2 2>&1
}
while [ 1 ]; do
if [ "$1" = "--64" ]; then
- BIT_CHECK=1
+ [ -z $CLANG ] && BIT_CHECK=1
+ elif [ "$1" = "--clang" ]; then
+ [ -z $BIT_CHECK ] && CLANG=1
elif [ "$1" = "--cc" ]; then
[ "x$2" = "x" ] && usage
CC="$2" && shift
@@ -77,20 +89,28 @@ while [ 1 ]; do
done
[ "x$CC" = "x" ] && usage
-[ "x$OUT" = "x" ] && usage
+[ "x$CLANG" = "x" -a "x$OUT" = "x" ] && usage
ccof=$OUT/cc-sanity-check
log=${ccof}.log
+check_clang
+
if [ "x$BIT_CHECK" = "x1" ]; then
do_cc $ccof $log ""
file $ccof | grep 64-bit >/dev/null 2>&1
[ "$?" = "0" ] && echo true || echo false
+elif [ "x$CLANG" = "x1" ]; then
+ [ "x$IS_CLANG" = "x1" ] && echo true || echo false
else
[ "x$1" = "x" ] && usage
do_cc $ccof $log $1
if [ "$?" = "0" ]; then
# compile passed, but was the warning unrecognized?
- grep -q "^cc1: warning: unrecognized command line option \"$1\"" $log
+ if [ "x$IS_CLANG" = "x1" ]; then
+ grep "^warning: unknown warning option '$1'" $log >/dev/null 2>&1
+ else
+ grep "^cc1: warning: unrecognized command line option \"$1\"" $log >/dev/null 2>&1
+ fi
[ "$?" = "1" ] && echo $1
fi
fi
diff --git a/eurasiacon/build/linux2/toplevel.mk b/eurasia_km/eurasiacon/build/linux2/toplevel.mk
index 26b1198..81ecb9e 100644
--- a/eurasiacon/build/linux2/toplevel.mk
+++ b/eurasia_km/eurasiacon/build/linux2/toplevel.mk
@@ -60,6 +60,7 @@ $(call directory-must-exist,$(TOP))
RELATIVE_OUT := $(patsubst $(TOP)/%,%,$(OUT))
HOST_OUT := $(RELATIVE_OUT)/host
TARGET_OUT := $(RELATIVE_OUT)/target
+DOCS_OUT := $(RELATIVE_OUT)/docs
CONFIG_MK := $(RELATIVE_OUT)/config.mk
CONFIG_H := $(RELATIVE_OUT)/config.h
CONFIG_KERNEL_MK := $(RELATIVE_OUT)/config_kernel.mk
@@ -82,9 +83,9 @@ ifneq ($(INTERNAL_CLOBBER_ONLY),true)
#
$(shell mkdir -p $(OUT))
-# Provide rules to create $(HOST_OUT) and $(TARGET_OUT)
-.SECONDARY: $(HOST_OUT) $(TARGET_OUT)
-$(HOST_OUT) $(TARGET_OUT):
+# Provide rules to create the directories for binaries and documentation
+.SECONDARY: $(HOST_OUT) $(TARGET_OUT) $(DOCS_OUT)
+$(HOST_OUT) $(TARGET_OUT) $(DOCS_OUT):
$(make-directory)
# If these generated files differ from any pre-existing ones,
@@ -201,13 +202,15 @@ endif
# You can say 'make all_modules' to attempt to make everything, or 'make
# components' to only make the things which are listed (in the per-build
# makefiles) as components of the build.
-.PHONY: all_modules components
+.PHONY: all_modules all_docs components
all_modules: $(ALL_MODULES)
+all_docs: ;
components: $(COMPONENTS)
+docs: $(DOCS)
# Cleaning
.PHONY: clean clobber
-clean: MODULE_DIRS_TO_REMOVE := $(OUT)/host/intermediates $(OUT)/target/intermediates $(OUT)/target/kbuild
+clean: MODULE_DIRS_TO_REMOVE := $(HOST_OUT) $(TARGET_OUT) $(DOCS_OUT)
clean:
$(clean-dirs)
clobber: MODULE_DIRS_TO_REMOVE := $(OUT)
@@ -217,10 +220,14 @@ clobber:
# Saying 'make clean-MODULE' removes the intermediates for MODULE.
# clobber-MODULE deletes the output files as well
clean-%:
- $(if $(V),,@echo " RM " $(call relative-to-top,$(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$*))
- $(RM) -rf $(OUT)/host/intermediates/$*/* $(OUT)/target/intermediates/$*/*
+ $(if $(V),,@echo " RM " $(call relative-to-top,$(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$* $(OUT)/docs/intermediates/$*))
+ $(RM) -rf $(OUT)/host/intermediates/$*/* $(OUT)/target/intermediates/$*/* $(OUT)/docs/intermediates/$*/*
clobber-%:
$(if $(V),,@echo " RM " $(call relative-to-top,$(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$* $(INTERNAL_TARGETS_FOR_$*)))
- $(RM) -rf $(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$* $(INTERNAL_TARGETS_FOR_$*)
+ $(RM) -rf $(OUT)/host/intermediates/$* $(OUT)/target/intermediates/$* $(OUT)/docs/intermediates/$* $(INTERNAL_TARGETS_FOR_$*)
include $(MAKE_TOP)/bits.mk
+
+# D=nobuild stops the build before any recipes are run. This line should
+# come at the end of this makefile.
+$(if $(filter nobuild,$(D)),$(error D=nobuild given),)
diff --git a/include4/dbgdrvif.h b/eurasia_km/include4/dbgdrvif.h
index 753f8f2..753f8f2 100644
--- a/include4/dbgdrvif.h
+++ b/eurasia_km/include4/dbgdrvif.h
diff --git a/include4/img_defs.h b/eurasia_km/include4/img_defs.h
index 375ed99..b7447d7 100644
--- a/include4/img_defs.h
+++ b/eurasia_km/include4/img_defs.h
@@ -147,6 +147,75 @@ typedef char TCHAR, *PTCHAR, *PTSTR;
#define IMG_UNDEF (~0UL)
#endif
+/*
+ Do the right thing when using printf to output cpu addresses,
+ depending on architecture.
+ */
+#if defined (_WIN64)
+ #define UINTPTR_FMT "%016llX"
+#else
+ #if defined (__x86_64__)
+ #define UINTPTR_FMT "%016lX"
+ #else
+ #define UINTPTR_FMT "%08lX"
+ #endif
+#endif
+
+/*
+ Similarly for DEV_ and SYS_ PHYSADDRs, but this is dependent on 32/36-bit MMU
+ capability, in addition to host architecture.
+ */
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ #if defined(IMG_UINT32_IS_ULONG)
+ #define CPUPADDR_FMT "%08lX"
+ #define DEVPADDR_FMT "%08lX"
+ #define SYSPADDR_FMT "%08lX"
+ #else
+ #define CPUPADDR_FMT "%08X"
+ #define DEVPADDR_FMT "%08X"
+ #define SYSPADDR_FMT "%08X"
+ #endif
+#else
+ #if defined(__x86_64__)
+ #define CPUPADDR_FMT "%016lX"
+ #define DEVPADDR_FMT "%016lX"
+ #define SYSPADDR_FMT "%016lX"
+ #else
+
+ #define CPUPADDR_FMT "%016llX"
+ #define DEVPADDR_FMT "%016llX"
+ #define SYSPADDR_FMT "%016llX"
+ #endif
+#endif
+
+/*
+ Define a printf format macro for the length property of the format-specifier
+ for size_t, that allows avoidance of C99 dependency on compilers that don't
+ support this, while still ensuring that whatever the size of size_t (eg 32,
+ 64 bit Linux builds, or Win32/64 builds), a size_t (or IMG_SIZE_T) can be
+ passed to printf-type functions without a cast.
+*/
+#if defined LINUX
+ /* Use C99 format specifier where possible */
+ #define SIZE_T_FMT_LEN "z"
+#elif defined _WIN64
+ #define SIZE_T_FMT_LEN "I"
+#else
+ #define SIZE_T_FMT_LEN "l" /* May need to be updated as required, for other OSs */
+#endif
+
+
+#if defined (__x86_64__)
+ #define IMG_UINT64_FMT "l"
+#else
+ #define IMG_UINT64_FMT "ll" /* May need to be updated as required, for other OSs */
+#endif
+
+/*
+ Some versions of MSVC don't have snprintf, vsnprintf in their CRTs.
+ Remap to the deprecated unix compatibility versions.
+*/
+
#endif /* #if !defined (__IMG_DEFS_H__) */
/*****************************************************************************
End of file (IMG_DEFS.H)
diff --git a/include4/img_types.h b/eurasia_km/include4/img_types.h
index dbd16e8..3e04e4a 100644
--- a/include4/img_types.h
+++ b/eurasia_km/include4/img_types.h
@@ -75,17 +75,16 @@ typedef signed long IMG_INT32, *IMG_PINT32;
#endif
#if defined(USE_CODE)
-
-typedef unsigned __int64 IMG_UINT64, *IMG_PUINT64;
-typedef __int64 IMG_INT64, *IMG_PINT64;
-
+ typedef unsigned __int64 IMG_UINT64, *IMG_PUINT64;
+ typedef __int64 IMG_INT64, *IMG_PINT64;
+#elif defined(LINUX) && defined (__x86_64)
+ typedef unsigned long IMG_UINT64, *IMG_PUINT64;
+ typedef long IMG_INT64, *IMG_PINT64;
+#elif defined(LINUX) || defined(__METAG) || defined (__QNXNTO__)
+ typedef unsigned long long IMG_UINT64, *IMG_PUINT64;
+ typedef long long IMG_INT64, *IMG_PINT64;
#else
- #if defined(LINUX) || defined(__METAG) || defined (__QNXNTO__)
- typedef unsigned long long IMG_UINT64, *IMG_PUINT64;
- typedef long long IMG_INT64, *IMG_PINT64;
- #else
- #error("define an OS")
- #endif
+ #error("define an OS")
#endif
#if !(defined(LINUX) && defined (__KERNEL__))
@@ -107,11 +106,19 @@ typedef IMG_INT32 IMG_RESULT;
#if defined(_WIN64)
typedef unsigned __int64 IMG_UINTPTR_T;
+ typedef signed __int64 IMG_INTPTR_T;
typedef signed __int64 IMG_PTRDIFF_T;
typedef IMG_UINT64 IMG_SIZE_T;
#else
- typedef unsigned int IMG_UINTPTR_T;
- typedef IMG_UINT32 IMG_SIZE_T;
+ #if defined (__x86_64__)
+ typedef IMG_UINT64 IMG_SIZE_T;
+ typedef unsigned long IMG_UINTPTR_T;
+ typedef signed long IMG_INTPTR_T;
+ #else
+ typedef IMG_UINT32 IMG_SIZE_T;
+ typedef unsigned long IMG_UINTPTR_T;
+ typedef signed long IMG_INTPTR_T;
+ #endif
#endif
typedef IMG_PVOID IMG_HANDLE;
@@ -121,9 +128,9 @@ typedef void** IMG_HVOID, * IMG_PHVOID;
#define IMG_NULL 0
/* services/stream ID */
-typedef IMG_UINT32 IMG_SID;
+typedef IMG_UINTPTR_T IMG_SID;
-typedef IMG_UINT32 IMG_EVENTSID;
+typedef IMG_UINTPTR_T IMG_EVENTSID;
/*
* Address types.
@@ -168,7 +175,6 @@ typedef IMG_UINT32 IMG_EVENTSID;
*/
typedef IMG_PVOID IMG_CPU_VIRTADDR;
-#define IMG_INVALID_DEV_VIRTADDR (0x00)
/* device virtual address */
typedef struct _IMG_DEV_VIRTADDR
@@ -185,7 +191,12 @@ typedef IMG_UINT32 IMG_DEVMEM_SIZE_T;
typedef struct _IMG_CPU_PHYADDR
{
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ /* variable sized type (32,64) */
+ IMG_UINT32 uiAddr;
+#else
+ IMG_UINT64 uiAddr;
+#endif
} IMG_CPU_PHYADDR;
/* device physical address */
@@ -193,10 +204,9 @@ typedef struct _IMG_DEV_PHYADDR
{
#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
-#else
IMG_UINT32 uiAddr;
- IMG_UINT32 uiHighAddr;
+#else
+ IMG_UINT64 uiAddr;
#endif
} IMG_DEV_PHYADDR;
@@ -204,7 +214,12 @@ typedef struct _IMG_DEV_PHYADDR
typedef struct _IMG_SYS_PHYADDR
{
/* variable sized type (32,64) */
- IMG_UINTPTR_T uiAddr;
+#if IMG_ADDRSPACE_PHYSADDR_BITS == 32
+ /* variable sized type (32,64) */
+ IMG_UINT32 uiAddr;
+#else
+ IMG_UINT64 uiAddr;
+#endif
} IMG_SYS_PHYADDR;
#include "img_defs.h"
diff --git a/include4/pdumpdefs.h b/eurasia_km/include4/pdumpdefs.h
index 112e9ee..989488b 100644
--- a/include4/pdumpdefs.h
+++ b/eurasia_km/include4/pdumpdefs.h
@@ -115,7 +115,7 @@ typedef enum _PDUMP_POLL_OPERATOR
PDUMP_POLL_OPERATOR_LESSEQUAL = 2,
PDUMP_POLL_OPERATOR_GREATER = 3,
PDUMP_POLL_OPERATOR_GREATEREQUAL = 4,
- PDUMP_POLL_OPERATOR_NOTEQUAL = 5,
+ PDUMP_POLL_OPERATOR_NOTEQUAL = 5
} PDUMP_POLL_OPERATOR;
diff --git a/include4/pvr_debug.h b/eurasia_km/include4/pvr_debug.h
index 7e05666..fcc0275 100644
--- a/include4/pvr_debug.h
+++ b/eurasia_km/include4/pvr_debug.h
@@ -53,16 +53,17 @@ extern "C" {
#define PVR_MAX_DEBUG_MESSAGE_LEN (512)
/* These are privately used by pvr_debug, use the PVR_DBG_ defines instead */
-#define DBGPRIV_FATAL 0x01UL
-#define DBGPRIV_ERROR 0x02UL
-#define DBGPRIV_WARNING 0x04UL
-#define DBGPRIV_MESSAGE 0x08UL
-#define DBGPRIV_VERBOSE 0x10UL
-#define DBGPRIV_CALLTRACE 0x20UL
-#define DBGPRIV_ALLOC 0x40UL
-#define DBGPRIV_DBGDRV_MESSAGE 0x80UL
-
-#define DBGPRIV_DBGLEVEL_COUNT 8
+#define DBGPRIV_FATAL 0x001UL
+#define DBGPRIV_ERROR 0x002UL
+#define DBGPRIV_WARNING 0x004UL
+#define DBGPRIV_MESSAGE 0x008UL
+#define DBGPRIV_VERBOSE 0x010UL
+#define DBGPRIV_CALLTRACE 0x020UL
+#define DBGPRIV_ALLOC 0x040UL
+#define DBGPRIV_BUFFERED 0x080UL
+#define DBGPRIV_DBGDRV_MESSAGE 0x100UL
+
+#define DBGPRIV_DBGLEVEL_COUNT 9
#if !defined(PVRSRV_NEED_PVR_ASSERT) && defined(DEBUG)
#define PVRSRV_NEED_PVR_ASSERT
@@ -143,27 +144,29 @@ IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVDebugAssertFail(const IMG_CHAR *pszFile,
#define PVR_DBG_VERBOSE DBGPRIV_VERBOSE
#define PVR_DBG_CALLTRACE DBGPRIV_CALLTRACE
#define PVR_DBG_ALLOC DBGPRIV_ALLOC
+ #define PVR_DBG_BUFFERED DBGPRIV_BUFFERED
#define PVR_DBGDRIV_MESSAGE DBGPRIV_DBGDRV_MESSAGE
/* These levels are always on with PVRSRV_NEED_PVR_DPF */
- #define __PVR_DPF_0x01UL(x...) PVRSRVDebugPrintf(DBGPRIV_FATAL, x)
- #define __PVR_DPF_0x02UL(x...) PVRSRVDebugPrintf(DBGPRIV_ERROR, x)
+ #define __PVR_DPF_0x001UL(x...) PVRSRVDebugPrintf(DBGPRIV_FATAL, x)
+ #define __PVR_DPF_0x002UL(x...) PVRSRVDebugPrintf(DBGPRIV_ERROR, x)
+ #define __PVR_DPF_0x080UL(x...) PVRSRVDebugPrintf(DBGPRIV_BUFFERED, x)
/* Some are compiled out completely in release builds */
#if defined(DEBUG)
- #define __PVR_DPF_0x04UL(x...) PVRSRVDebugPrintf(DBGPRIV_WARNING, x)
- #define __PVR_DPF_0x08UL(x...) PVRSRVDebugPrintf(DBGPRIV_MESSAGE, x)
- #define __PVR_DPF_0x10UL(x...) PVRSRVDebugPrintf(DBGPRIV_VERBOSE, x)
- #define __PVR_DPF_0x20UL(x...) PVRSRVDebugPrintf(DBGPRIV_CALLTRACE, x)
- #define __PVR_DPF_0x40UL(x...) PVRSRVDebugPrintf(DBGPRIV_ALLOC, x)
- #define __PVR_DPF_0x80UL(x...) PVRSRVDebugPrintf(DBGPRIV_DBGDRV_MESSAGE, x)
+ #define __PVR_DPF_0x004UL(x...) PVRSRVDebugPrintf(DBGPRIV_WARNING, x)
+ #define __PVR_DPF_0x008UL(x...) PVRSRVDebugPrintf(DBGPRIV_MESSAGE, x)
+ #define __PVR_DPF_0x010UL(x...) PVRSRVDebugPrintf(DBGPRIV_VERBOSE, x)
+ #define __PVR_DPF_0x020UL(x...) PVRSRVDebugPrintf(DBGPRIV_CALLTRACE, x)
+ #define __PVR_DPF_0x040UL(x...) PVRSRVDebugPrintf(DBGPRIV_ALLOC, x)
+ #define __PVR_DPF_0x100UL(x...) PVRSRVDebugPrintf(DBGPRIV_DBGDRV_MESSAGE, x)
#else
- #define __PVR_DPF_0x04UL(x...)
- #define __PVR_DPF_0x08UL(x...)
- #define __PVR_DPF_0x10UL(x...)
- #define __PVR_DPF_0x20UL(x...)
- #define __PVR_DPF_0x40UL(x...)
- #define __PVR_DPF_0x80UL(x...)
+ #define __PVR_DPF_0x004UL(x...)
+ #define __PVR_DPF_0x008UL(x...)
+ #define __PVR_DPF_0x010UL(x...)
+ #define __PVR_DPF_0x020UL(x...)
+ #define __PVR_DPF_0x040UL(x...)
+ #define __PVR_DPF_0x100UL(x...)
#endif
/* Translate the different log levels to separate macros
@@ -188,6 +191,7 @@ IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVDebugAssertFail(const IMG_CHAR *pszFile,
#define PVR_DBG_VERBOSE DBGPRIV_VERBOSE,__FILE__, __LINE__
#define PVR_DBG_CALLTRACE DBGPRIV_CALLTRACE,__FILE__, __LINE__
#define PVR_DBG_ALLOC DBGPRIV_ALLOC,__FILE__, __LINE__
+ #define PVR_DBG_BUFFERED DBGPRIV_BUFFERED,__FILE__, __LINE__
#define PVR_DBGDRIV_MESSAGE DBGPRIV_DBGDRV_MESSAGE, "", 0
#define PVR_DPF(X) PVRSRVDebugPrintf X
@@ -200,13 +204,14 @@ IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVDebugPrintf(IMG_UINT32 ui32DebugLevel,
const IMG_CHAR *pszFormat,
...) IMG_FORMAT_PRINTF(4, 5);
+IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVDebugPrintfDumpCCB(void);
+
#else /* defined(PVRSRV_NEED_PVR_DPF) */
#define PVR_DPF(X)
#endif /* defined(PVRSRV_NEED_PVR_DPF) */
-
/* PVR_TRACE() handling */
#if defined(PVRSRV_NEED_PVR_TRACE)
diff --git a/eurasia_km/include4/pvr_sync_user.h b/eurasia_km/include4/pvr_sync_user.h
new file mode 100644
index 0000000..0220098
--- /dev/null
+++ b/eurasia_km/include4/pvr_sync_user.h
@@ -0,0 +1,125 @@
+/*************************************************************************/ /*!
+@File pvr_sync_user.h
+@Title Userspace definitions to use the kernel sync driver
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Version numbers and strings for PVR Consumer services
+ components.
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#ifndef _PVR_SYNC_USER_H_
+#define _PVR_SYNC_USER_H_
+
+#include <linux/ioctl.h>
+
+#ifdef __KERNEL__
+#include "sgxapi_km.h"
+#else
+#include "sgxapi.h"
+#endif
+
+#include "servicesext.h" // PVRSRV_SYNC_DATA
+#include "img_types.h"
+
+/* This matches the sw_sync create ioctl data */
+struct PVR_SYNC_CREATE_IOCTL_DATA
+{
+ /* Input: Name of this sync pt. Passed to base sync driver. */
+ char name[32];
+
+ /* Input: An fd from a previous call to ALLOC ioctl. Cannot be <0. */
+ __s32 allocdSyncInfo;
+
+ /* Output: An fd returned from the CREATE ioctl. */
+ __s32 fence;
+};
+
+struct PVR_SYNC_ALLOC_IOCTL_DATA
+{
+ /* Output: An fd returned from the ALLOC ioctl */
+ __s32 fence;
+
+ /* Output: IMG_TRUE if the timeline looked idle at alloc time */
+ __u32 bTimelineIdle;
+};
+
+#define PVR_SYNC_DEBUG_MAX_POINTS 3
+
+typedef struct
+{
+ /* Output: A globally unique stamp/ID for the sync */
+ IMG_UINT64 ui64Stamp;
+
+ /* Output: The WOP snapshot for the sync */
+ IMG_UINT32 ui32WriteOpsPendingSnapshot;
+}
+PVR_SYNC_DEBUG;
+
+struct PVR_SYNC_DEBUG_IOCTL_DATA
+{
+ /* Input: Fence to acquire debug for */
+ int iFenceFD;
+
+ /* Output: Number of points merged into this fence */
+ IMG_UINT32 ui32NumPoints;
+
+ struct
+ {
+ /* Output: Metadata for sync point */
+ PVR_SYNC_DEBUG sMetaData;
+
+ /* Output: 'Live' sync information. */
+ PVRSRV_SYNC_DATA sSyncData;
+ }
+ sSync[PVR_SYNC_DEBUG_MAX_POINTS];
+};
+
+#define PVR_SYNC_IOC_MAGIC 'W'
+
+#define PVR_SYNC_IOC_CREATE_FENCE \
+ _IOWR(PVR_SYNC_IOC_MAGIC, 0, struct PVR_SYNC_CREATE_IOCTL_DATA)
+
+#define PVR_SYNC_IOC_DEBUG_FENCE \
+ _IOWR(PVR_SYNC_IOC_MAGIC, 1, struct PVR_SYNC_DEBUG_IOCTL_DATA)
+
+#define PVR_SYNC_IOC_ALLOC_FENCE \
+ _IOWR(PVR_SYNC_IOC_MAGIC, 2, struct PVR_SYNC_ALLOC_IOCTL_DATA)
+
+#define PVRSYNC_MODNAME "pvr_sync"
+
+#endif /* _PVR_SYNC_USER_H_ */
diff --git a/include4/pvrmodule.h b/eurasia_km/include4/pvrmodule.h
index 267c7b6..267c7b6 100644
--- a/include4/pvrmodule.h
+++ b/eurasia_km/include4/pvrmodule.h
diff --git a/include4/pvrversion.h b/eurasia_km/include4/pvrversion.h
index ca8bead..4fb45c1 100644
--- a/include4/pvrversion.h
+++ b/eurasia_km/include4/pvrversion.h
@@ -45,29 +45,24 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _PVRVERSION_H_
#define _PVRVERSION_H_
-#define OMAPVERSION_PVR_RLS 6
-#define OMAPVERSION_OMAP_RLS 0
-#define OMAPVERSION_STRING "1.9.6.0"
-
#define PVR_STR(X) #X
#define PVR_STR2(X) PVR_STR(X)
#define PVRVERSION_MAJ 1
-#define PVRVERSION_MIN 9
-#define PVRVERSION_BRANCH 19
+#define PVRVERSION_MIN 14
#define PVRVERSION_FAMILY "sgxddk"
-#define PVRVERSION_BRANCHNAME "1.9"
-#define PVRVERSION_BUILD 2253347
-#define PVRVERSION_BSCONTROL "SGX_DDK_Linux_CustomerTI"
+#define PVRVERSION_BRANCHNAME "MAIN"
+#define PVRVERSION_BUILD 3699939
+#define PVRVERSION_BSCONTROL "SGX_DDK"
-#define PVRVERSION_STRING "SGX_DDK_Linux_CustomerTI sgxddk 19 1.9@" PVR_STR2(PVRVERSION_BUILD)
-#define PVRVERSION_STRING_SHORT "1.9@" PVR_STR2(PVRVERSION_BUILD)
+#define PVRVERSION_STRING "SGX_DDK sgxddk MAIN@" PVR_STR2(PVRVERSION_BUILD)
+#define PVRVERSION_STRING_SHORT "1.14@" PVR_STR2(PVRVERSION_BUILD) " (MAIN)"
#define COPYRIGHT_TXT "Copyright (c) Imagination Technologies Ltd. All Rights Reserved."
-#define PVRVERSION_BUILD_HI 225
-#define PVRVERSION_BUILD_LO 3347
+#define PVRVERSION_BUILD_HI 369
+#define PVRVERSION_BUILD_LO 9939
#define PVRVERSION_STRING_NUMERIC PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO)
#endif /* _PVRVERSION_H_ */
diff --git a/include4/services.h b/eurasia_km/include4/services.h
index 8028441..30b27c5 100644
--- a/include4/services.h
+++ b/eurasia_km/include4/services.h
@@ -106,13 +106,11 @@ extern "C" {
#define PVRSRV_HAP_MULTI_PROCESS (1U<<17)
#define PVRSRV_HAP_FROM_EXISTING_PROCESS (1U<<18)
#define PVRSRV_HAP_NO_CPU_VIRTUAL (1U<<19)
-#define PVRSRV_HAP_GPU_PAGEABLE (1U<<21)
#define PVRSRV_HAP_MAPTYPE_MASK (PVRSRV_HAP_KERNEL_ONLY \
|PVRSRV_HAP_SINGLE_PROCESS \
|PVRSRV_HAP_MULTI_PROCESS \
|PVRSRV_HAP_FROM_EXISTING_PROCESS \
- |PVRSRV_HAP_NO_CPU_VIRTUAL\
- |PVRSRV_HAP_GPU_PAGEABLE)
+ |PVRSRV_HAP_NO_CPU_VIRTUAL)
/*
Allows user allocations to override heap attributes
@@ -134,7 +132,7 @@ extern "C" {
*/
#define PVRSRV_MAP_NOUSERVIRTUAL (1UL<<27)
#define PVRSRV_MEM_XPROC (1U<<28)
-#define PVRSRV_MEM_ION (1U<<29)
+/* Bit 29 is unused */
#define PVRSRV_MEM_ALLOCATENONCACHEDMEM (1UL<<30)
/*
@@ -143,7 +141,6 @@ extern "C" {
*/
#define PVRSRV_MEM_SPARSE (1U<<31)
-#define PVR_FULL_CACHE_OP_THRESHOLD (0x7D000)
/*
* How much context we lose on a (power) mode change
@@ -197,9 +194,11 @@ extern "C" {
Flags for PVRSRVModifySyncOps
WO_INC - Used to increment "WriteOpsPending/complete of sync info"
RO_INC - Used to increment "ReadOpsPending/complete of sync info"
+ RO2_INC - Used to increment "ReadOps2Pending/complete of sync info"
*/
-#define PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC 0x00000001
-#define PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC 0x00000002
+#define PVRSRV_MODIFYSYNCOPS_FLAGS_WO_INC (1U<<0)
+#define PVRSRV_MODIFYSYNCOPS_FLAGS_RO_INC (1U<<1)
+#define PVRSRV_MODIFYSYNCOPS_FLAGS_RO2_INC (1U<<2)
/*
Flags for Services connection.
@@ -213,7 +212,6 @@ extern "C" {
*/
#define PVRSRV_PDUMP_FLAGS_CONTINUOUS 0x1
-#define PVR_FULL_CACHE_OP_THRESHOLD (0x7D000)
/******************************************************************************
* Enums
@@ -280,6 +278,7 @@ typedef enum
IMG_OPENCL = 0x0000000F,
#endif
+ IMG_MODULE_UNDEF = 0xFFFFFFFF
} IMG_MODULE_ID;
@@ -358,11 +357,7 @@ typedef struct _PVRSRV_CONNECTION_
typedef struct _PVRSRV_DEV_DATA_
{
IMG_CONST PVRSRV_CONNECTION *psConnection; /*!< Services connection info */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevCookie; /*!< Dev cookie */
-#else
IMG_HANDLE hDevCookie; /*!< Dev cookie */
-#endif
} PVRSRV_DEV_DATA;
@@ -431,16 +426,6 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
/* ptr to associated client sync info - NULL if no sync */
struct _PVRSRV_CLIENT_SYNC_INFO_ *psClientSyncInfo;
-#if defined (SUPPORT_SID_INTERFACE)
- /* handle to client mapping data (OS specific) */
- IMG_SID hMappingInfo;
-
- /* handle to kernel mem info */
- IMG_SID hKernelMemInfo;
-
- /* resman handle for UM mapping clean-up */
- IMG_SID hResItem;
-#else
/* handle to client mapping data (OS specific) */
IMG_HANDLE hMappingInfo;
@@ -449,7 +434,6 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
/* resman handle for UM mapping clean-up */
IMG_HANDLE hResItem;
-#endif
#if defined(SUPPORT_MEMINFO_IDS)
#if !defined(USE_CODE)
@@ -460,6 +444,12 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
IMG_UINT32 dummy2;
#endif /* !defined(USE_CODE) */
#endif /* defined(SUPPORT_MEMINFO_IDS) */
+#if defined(SUPPORT_ION)
+ IMG_SIZE_T uiIonBufferSize;
+#endif /* defined(SUPPORT_ION) */
+#if defined(SUPPORT_DMABUF)
+ IMG_SIZE_T uiDmaBufSize;
+#endif /* defined(SUPPORT_ION) */
/*
ptr to next mem info
@@ -478,11 +468,7 @@ typedef struct _PVRSRV_CLIENT_MEM_INFO_
typedef struct _PVRSRV_HEAP_INFO_
{
IMG_UINT32 ui32HeapID;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap;
-#else
IMG_HANDLE hDevMemHeap;
-#endif
IMG_DEV_VIRTADDR sDevVAddrBase;
IMG_UINT32 ui32HeapByteSize;
IMG_UINT32 ui32Attribs;
@@ -500,11 +486,7 @@ typedef struct _PVRSRV_EVENTOBJECT_
/* globally unique name of the event object */
IMG_CHAR szName[EVENTOBJNAME_MAXLENGTH];
/* kernel specific handle for the event object */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEventKM;
-#else
IMG_HANDLE hOSEventKM;
-#endif
} PVRSRV_EVENTOBJECT;
@@ -515,11 +497,7 @@ typedef enum
{
PVRSRV_MISC_INFO_CPUCACHEOP_NONE = 0,
PVRSRV_MISC_INFO_CPUCACHEOP_CLEAN,
- PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH,
- PVRSRV_MISC_INFO_CPUCACHEOP_CUSTOM_FLUSH,
- PVRSRV_MISC_INFO_CPUCACHEOP_CUSTOM_INV,
- PVRSRV_MISC_INFO_CPUCACHEOP_CLEAN_REGIONS,
- PVRSRV_MISC_INFO_CPUCACHEOP_INV_REGIONS,
+ PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH
} PVRSRV_MISC_INFO_CPUCACHEOP_TYPE;
/*!
@@ -534,13 +512,8 @@ typedef struct _PVRSRV_MISC_INFO_
/*!< SOC Timer register */
IMG_VOID *pvSOCTimerRegisterKM;
IMG_VOID *pvSOCTimerRegisterUM;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSOCTimerRegisterOSMemHandle;
- IMG_SID hSOCTimerRegisterMappingInfo;
-#else
IMG_HANDLE hSOCTimerRegisterOSMemHandle;
IMG_HANDLE hSOCTimerRegisterMappingInfo;
-#endif
/*!< SOC Clock Gating registers */
IMG_VOID *pvSOCClockGateRegs;
@@ -552,11 +525,7 @@ typedef struct _PVRSRV_MISC_INFO_
/* global event object */
PVRSRV_EVENTOBJECT sGlobalEventObject;//FIXME: should be private to services
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_EVENTSID hOSGlobalEvent;
-#else
IMG_HANDLE hOSGlobalEvent;
-#endif
/* Note: add misc. items as required */
IMG_UINT32 aui32DDKVersion[4];
@@ -574,7 +543,6 @@ typedef struct _PVRSRV_MISC_INFO_
* directly in the srvclient PVRSRVGetMiscInfo code, and then convert it
* to a kernel meminfo if required. Try to not waste space.
*/
-#if !defined (SUPPORT_SID_INTERFACE)
union
{
/*!< Input client meminfo (UM side) */
@@ -583,29 +551,12 @@ typedef struct _PVRSRV_MISC_INFO_
/*!< Output kernel meminfo (Bridge+KM side) */
struct _PVRSRV_KERNEL_MEM_INFO_ *psKernelMemInfo;
} u;
-#endif
/*!< Offset in MemInfo to start cache op */
IMG_VOID *pvBaseVAddr;
/*!< Length of range to perform cache op */
IMG_UINT32 ui32Length;
-
-#define PVRSRV_MISC_INFO_MAX_REGIONS 10
- /* the following three fields are applicable for
- * PVRSRV_MISC_INFO_CPUCACHEOP_{CLEAN,INV}_REGIONS
- */
- IMG_INT32 i32StrideInBytes;
- IMG_UINT32 ui32NumRegions;
- struct
- {
- /* note: coordinates are translated to byte offsets by userspace..
- * ie. if the buffer is 32bit/pixel then the pixel coordinates are
- * multiplied by 4 by the caller
- */
- IMG_UINT16 x, y, w, h;
- } sRegions[PVRSRV_MISC_INFO_MAX_REGIONS];
-
} sCacheOpCtl;
/*!< Meminfo refcount controls: */
@@ -615,7 +566,6 @@ typedef struct _PVRSRV_MISC_INFO_
* directly in the srvclient PVRSRVGetMiscInfo code, and then convert it
* to a kernel meminfo if required. Try to not waste space.
*/
-#if !defined(SUPPORT_SID_INTERFACE)
union
{
/*!< Input client meminfo (UM side) */
@@ -624,7 +574,6 @@ typedef struct _PVRSRV_MISC_INFO_
/*!< Output kernel meminfo (Bridge+KM side) */
struct _PVRSRV_KERNEL_MEM_INFO_ *psKernelMemInfo;
} u;
-#endif
/*!< Resulting refcount */
IMG_UINT32 ui32RefCount;
@@ -644,11 +593,7 @@ typedef struct _PVRSRV_SYNC_TOKEN_
The fields are hidden in sPrivate in order to reinforce this. */
struct
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hKernelSyncInfo;
-#endif
IMG_UINT32 ui32ReadOpsPendingSnapshot;
IMG_UINT32 ui32WriteOpsPendingSnapshot;
IMG_UINT32 ui32ReadOps2PendingSnapshot;
@@ -661,7 +606,7 @@ typedef struct _PVRSRV_SYNC_TOKEN_
*****************************************************************************/
typedef enum _PVRSRV_CLIENT_EVENT_
{
- PVRSRV_CLIENT_EVENT_HWTIMEOUT = 0,
+ PVRSRV_CLIENT_EVENT_HWTIMEOUT = 0
} PVRSRV_CLIENT_EVENT;
typedef IMG_VOID (*PFN_QUEUE_COMMAND_COMPLETE)(IMG_HANDLE hCallbackData);
@@ -697,11 +642,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVReleaseMiscInfo (IMG_CONST PVRSRV_CONNECTION *ps
IMG_IMPORT
PVRSRV_ERROR PVRSRVPollForValue ( const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hOSEvent,
-#else
IMG_HANDLE hOSEvent,
-#endif
volatile IMG_UINT32 *pui32LinMemAddr,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
@@ -711,30 +652,18 @@ PVRSRV_ERROR PVRSRVPollForValue ( const PVRSRV_CONNECTION *psConnection,
/* memory APIs */
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phDevMemContext,
-#else
IMG_HANDLE *phDevMemContext,
-#endif
IMG_UINT32 *pui32SharedHeapCount,
PVRSRV_HEAP_INFO *psHeapInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDeviceMemContext(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext
-#else
IMG_HANDLE hDevMemContext
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfo(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_UINT32 *pui32SharedHeapCount,
PVRSRV_HEAP_INFO *psHeapInfo);
@@ -751,11 +680,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDeviceMemHeapInfo(IMG_CONST PVRSRV_DEV_DATA *
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem2(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
@@ -765,11 +690,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem2(IMG_CONST PVRSRV_DEV_DATA *psDev
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
@@ -780,30 +701,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeDeviceMem(IMG_CONST PVRSRV_DEV_DATA *psDevDa
PVRSRV_CLIENT_MEM_INFO *psMemInfo);
IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVRemapToDev(IMG_CONST PVRSRV_DEV_DATA *psDevData,
- PVRSRV_CLIENT_MEM_INFO *psMemInfo);
-
-IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapFromDev(IMG_CONST PVRSRV_DEV_DATA *psDevData,
- PVRSRV_CLIENT_MEM_INFO *psMemInfo);
-
-IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVExportDeviceMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
PVRSRV_CLIENT_MEM_INFO *psMemInfo,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phMemInfo
-#else
IMG_HANDLE *phMemInfo
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVReserveDeviceVirtualMem(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_DEV_VIRTADDR *psDevVAddr,
IMG_SIZE_T ui32Size,
IMG_SIZE_T ui32Alignment,
@@ -814,13 +719,8 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeDeviceVirtualMem(IMG_CONST PVRSRV_DEV_DATA *
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
- IMG_SID hDstDevMemHeap,
-#else
IMG_HANDLE hKernelMemInfo,
IMG_HANDLE hDstDevMemHeap,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsDstMemInfo);
IMG_IMPORT
@@ -839,11 +739,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapExtMemory (IMG_CONST PVRSRV_DEV_DATA *psDev
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemory(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_SIZE_T ui32ByteSize,
IMG_SIZE_T ui32PageOffset,
IMG_BOOL bPhysContig,
@@ -860,20 +756,6 @@ PVRSRV_ERROR PVRSRVChangeDeviceMemoryAttributes(IMG_CONST PVRSRV_DEV_DATA *psD
IMG_UINT32 ui32Attribs);
IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
- IMG_SID hDeviceClassBuffer,
-#else
- IMG_HANDLE hDevMemContext,
- IMG_HANDLE hDeviceClassBuffer,
-#endif
- PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
-IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
- PVRSRV_CLIENT_MEM_INFO *psMemInfo);
-
-IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapPhysToUserSpace(IMG_CONST PVRSRV_DEV_DATA *psDevData,
IMG_SYS_PHYADDR sSysPhysAddr,
IMG_UINT32 uiSizeInBytes,
@@ -895,23 +777,18 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVExportDeviceMem2(IMG_CONST PVRSRV_DEV_DATA *psDe
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceMemory2(IMG_CONST PVRSRV_DEV_DATA *psDevData,
IMG_INT iFd,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDstDevMemHeap,
-#else
IMG_HANDLE hDstDevMemHeap,
-#endif
PVRSRV_CLIENT_MEM_INFO **ppsDstMemInfo);
#endif /* defined(LINUX) */
#if defined(SUPPORT_ION)
PVRSRV_ERROR PVRSRVMapIonHandle(const PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
- IMG_HANDLE hDevMemContext,
-#endif
- IMG_INT32 uiFD,
- IMG_UINT32 uiSize,
+ IMG_HANDLE hDevMemHeap,
+ IMG_UINT32 ui32NumFDs,
+ IMG_INT *paiBufferFDs,
+ IMG_UINT32 ui32ChunkCount,
+ IMG_SIZE_T *pauiOffset,
+ IMG_SIZE_T *pauiSize,
IMG_UINT32 ui32Attribs,
PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
@@ -919,14 +796,22 @@ PVRSRV_ERROR PVRSRVUnmapIonHandle(const PVRSRV_DEV_DATA *psDevData,
PVRSRV_CLIENT_MEM_INFO *psMemInfo);
#endif /* defined (SUPPORT_ION) */
+#if defined(SUPPORT_DMABUF)
+IMG_IMPORT
+PVRSRV_ERROR PVRSRVMapDmaBuf(const PVRSRV_DEV_DATA *psDevData,
+ IMG_HANDLE hDevMemHeap,
+ IMG_INT iDmaBufFD,
+ IMG_UINT32 ui32Attribs,
+ PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
+
+IMG_IMPORT
+PVRSRV_ERROR PVRSRVUnmapDmaBuf(const PVRSRV_DEV_DATA *psDevData,
+ PVRSRV_CLIENT_MEM_INFO *psMemInfo);
+#endif /* SUPPORT_DMABUF */
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMemSparse(const PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemHeap,
-#else
IMG_HANDLE hDevMemHeap,
-#endif
IMG_UINT32 ui32Attribs,
IMG_SIZE_T uAlignment,
IMG_UINT32 ui32ChunkSize,
@@ -942,7 +827,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocDeviceMemSparse(const PVRSRV_DEV_DATA *psDe
typedef enum _PVRSRV_SYNCVAL_MODE_
{
PVRSRV_SYNCVAL_READ = IMG_TRUE,
- PVRSRV_SYNCVAL_WRITE = IMG_FALSE,
+ PVRSRV_SYNCVAL_WRITE = IMG_FALSE
} PVRSRV_SYNCVAL_MODE, *PPVRSRV_SYNCVAL_MODE;
@@ -969,6 +854,16 @@ IMG_IMPORT IMG_BOOL PVRSRVTestAllOpsNotComplete(PPVRSRV_CLIENT_MEM_INFO psMemInf
IMG_IMPORT PVRSRV_SYNCVAL PVRSRVGetPendingOpSyncVal(PPVRSRV_CLIENT_MEM_INFO psMemInfo,
PVRSRV_SYNCVAL_MODE eMode);
+#if defined(SUPPORT_PVRSRV_DEVICE_CLASS)
+
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVMapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
+ IMG_HANDLE hDevMemContext,
+ IMG_HANDLE hDeviceClassBuffer,
+ PVRSRV_CLIENT_MEM_INFO **ppsMemInfo);
+IMG_IMPORT
+PVRSRV_ERROR IMG_CALLCONV PVRSRVUnmapDeviceClassMemory (IMG_CONST PVRSRV_DEV_DATA *psDevData,
+ PVRSRV_CLIENT_MEM_INFO *psMemInfo);
/******************************************************************************
* Common Device Class Enumeration
@@ -1002,11 +897,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVEnumDCDims (IMG_HANDLE hDevice,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCSystemBuffer(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phBuffer
-#else
IMG_HANDLE *phBuffer
-#endif
);
IMG_IMPORT
@@ -1021,117 +912,69 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateDCSwapChain (IMG_HANDLE hDevice,
IMG_UINT32 ui32BufferCount,
IMG_UINT32 ui32OEMFlags,
IMG_UINT32 *pui32SwapChainID,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phSwapChain
-#else
IMG_HANDLE *phSwapChain
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDCSwapChain (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain
-#else
IMG_HANDLE hSwapChain
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstRect (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_RECT *psDstRect);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcRect (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_RECT *psSrcRect);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCDstColourKey (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_UINT32 ui32CKColour);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSetDCSrcColourKey (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
-#else
IMG_HANDLE hSwapChain,
-#endif
IMG_UINT32 ui32CKColour);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCBuffers(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
- IMG_SID *phBuffer
-#else
IMG_HANDLE hSwapChain,
IMG_HANDLE *phBuffer
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetDCBuffers2(IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain,
- IMG_SID *phBuffer,
-#else
IMG_HANDLE hSwapChain,
IMG_HANDLE *phBuffer,
-#endif
IMG_SYS_PHYADDR *psPhyAddr);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCBuffer (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer,
-#else
IMG_HANDLE hBuffer,
-#endif
IMG_UINT32 ui32ClipRectCount,
IMG_RECT *psClipRect,
IMG_UINT32 ui32SwapInterval,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hPrivateTag
-#else
IMG_HANDLE hPrivateTag
-#endif
);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCBuffer2 (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hBuffer,
-#else
IMG_HANDLE hBuffer,
-#endif
IMG_UINT32 ui32SwapInterval,
PVRSRV_CLIENT_MEM_INFO **ppsMemInfos,
- IMG_UINT32 ui32NumMemInfos,
+ PVRSRV_CLIENT_SYNC_INFO **ppsSyncInfos,
+ IMG_UINT32 ui32NumMemSyncInfos,
IMG_PVOID pvPrivData,
- IMG_UINT32 ui32PrivDataLength);
+ IMG_UINT32 ui32PrivDataLength,
+ IMG_HANDLE *phFence);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSwapToDCSystem (IMG_HANDLE hDevice,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hSwapChain
-#else
IMG_HANDLE hSwapChain
-#endif
);
/******************************************************************************
@@ -1152,13 +995,10 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVGetBCBufferInfo(IMG_HANDLE hDevice,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetBCBuffer(IMG_HANDLE hDevice,
IMG_UINT32 ui32BufferIndex,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phBuffer
-#else
IMG_HANDLE *phBuffer
-#endif
);
+#endif /* #if defined(SUPPORT_PVRSRV_DEVICE_CLASS) */
/******************************************************************************
* PDUMP Function prototypes...
@@ -1174,11 +1014,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpStopInitPhase(IMG_CONST PVRSRV_CONNECTION *
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
-#else
PVRSRV_CLIENT_MEM_INFO *psMemInfo,
-#endif
IMG_UINT32 ui32Offset,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
@@ -1187,22 +1023,14 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPol(IMG_CONST PVRSRV_CONNECTION *psConne
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo,
-#else
PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
-#endif
IMG_BOOL bIsRead,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpSyncPol2(IMG_CONST PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfo,
-#else
PVRSRV_CLIENT_SYNC_INFO *psClientSyncInfo,
-#endif
IMG_BOOL bIsRead);
IMG_IMPORT
@@ -1254,11 +1082,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpPDDevPAddr(IMG_CONST PVRSRV_CONNECTION *psC
#if !defined(USE_CODE)
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpMemPages(IMG_CONST PVRSRV_DEV_DATA *psDevData,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo,
-#else
IMG_HANDLE hKernelMemInfo,
-#endif
IMG_DEV_PHYADDR *pPages,
IMG_UINT32 ui32NumPages,
IMG_DEV_VIRTADDR sDevVAddr,
@@ -1311,11 +1135,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVPDumpBitmap(IMG_CONST PVRSRV_DEV_DATA *psDevData
IMG_UINT32 ui32Height,
IMG_UINT32 ui32StrideInBytes,
IMG_DEV_VIRTADDR sDevBaseAddr,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hDevMemContext,
-#else
IMG_HANDLE hDevMemContext,
-#endif
IMG_UINT32 ui32Size,
PDUMP_PIXEL_FORMAT ePixelFormat,
PDUMP_MEM_FORMAT eMemFormat,
@@ -1370,12 +1190,12 @@ IMG_IMPORT IMG_BOOL IMG_CALLCONV PVRSRVGetAppHint(IMG_VOID *pvHintState,
*****************************************************************************/
/* Exported APIs */
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVAllocUserModeMem (IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVCallocUserModeMem (IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMem (IMG_PVOID pvBase, IMG_SIZE_T uNewSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVAllocUserModeMem (IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVCallocUserModeMem (IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMem (IMG_PVOID pvBase, IMG_SIZE_T uiNewSize);
IMG_IMPORT IMG_VOID IMG_CALLCONV PVRSRVFreeUserModeMem (IMG_PVOID pvMem);
-IMG_IMPORT IMG_VOID PVRSRVMemCopy(IMG_VOID *pvDst, const IMG_VOID *pvSrc, IMG_SIZE_T ui32Size);
-IMG_IMPORT IMG_VOID PVRSRVMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T ui32Size);
+IMG_IMPORT IMG_VOID PVRSRVMemCopy(IMG_VOID *pvDst, const IMG_VOID *pvSrc, IMG_SIZE_T uiSize);
+IMG_IMPORT IMG_VOID PVRSRVMemSet(IMG_VOID *pvDest, IMG_UINT8 ui8Value, IMG_SIZE_T uiSize);
struct _PVRSRV_MUTEX_OPAQUE_STRUCT_;
typedef struct _PVRSRV_MUTEX_OPAQUE_STRUCT_ *PVRSRV_MUTEX_HANDLE;
@@ -1524,11 +1344,7 @@ IMG_IMPORT IMG_PVOID IMG_CALLCONV PVRSRVReallocUserModeMemTracking(IMG_VOID *pvM
*****************************************************************************/
IMG_IMPORT PVRSRV_ERROR PVRSRVEventObjectWait(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_EVENTSID hOSEvent
-#else
IMG_HANDLE hOSEvent
-#endif
);
/*!
@@ -1541,11 +1357,7 @@ IMG_IMPORT PVRSRV_ERROR PVRSRVEventObjectWait(const PVRSRV_CONNECTION *psConnect
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateSyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *phKernelSyncInfoModObj
-#else
IMG_HANDLE *phKernelSyncInfoModObj
-#endif
);
/*!
@@ -1558,11 +1370,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateSyncInfoModObj(const PVRSRV_CONNECTION *ps
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroySyncInfoModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj
-#else
IMG_HANDLE hKernelSyncInfoModObj
-#endif
);
@@ -1597,11 +1405,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroySyncInfoModObj(const PVRSRV_CONNECTION *p
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyPendingSyncOps(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj,
-#else
IMG_HANDLE hKernelSyncInfoModObj,
-#endif
PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
IMG_UINT32 ui32ModifyFlags,
IMG_UINT32 *pui32ReadOpsPending,
@@ -1622,11 +1426,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyPendingSyncOps(const PVRSRV_CONNECTION *ps
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyCompleteSyncOps(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj
-#else
IMG_HANDLE hKernelSyncInfoModObj
-#endif
);
/*!
@@ -1652,11 +1452,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVModifyCompleteSyncOps(const PVRSRV_CONNECTION *p
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsTakeToken(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- const IMG_SID hKernelSyncInfo,
-#else
const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
-#endif
PVRSRV_SYNC_TOKEN *psSyncToken);
/*!
******************************************************************************
@@ -1676,11 +1472,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsTakeToken(const PVRSRV_CONNECTION *psConn
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToToken(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- const IMG_SID hKernelSyncInfo,
-#else
const PVRSRV_CLIENT_SYNC_INFO *psSyncInfo,
-#endif
const PVRSRV_SYNC_TOKEN *psSyncToken,
IMG_BOOL bWait);
/*!
@@ -1703,11 +1495,7 @@ PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToToken(const PVRSRV_CONNECTION *psC
******************************************************************************/
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVSyncOpsFlushToModObj(const PVRSRV_CONNECTION *psConnection,
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelSyncInfoModObj,
-#else
IMG_HANDLE hKernelSyncInfoModObj,
-#endif
IMG_BOOL bWait);
/*!
diff --git a/include4/servicesext.h b/eurasia_km/include4/servicesext.h
index 80df117..ffb89b9 100644
--- a/include4/servicesext.h
+++ b/eurasia_km/include4/servicesext.h
@@ -645,6 +645,9 @@ typedef enum _PVRSRV_PIXEL_FORMAT_ {
PVRSRV_PIXEL_FORMAT_RAW512 = 224,
PVRSRV_PIXEL_FORMAT_RAW1024 = 225,
+ /* Same as NV12 but with interleaved VU rather than interleaved UV */
+ PVRSRV_PIXEL_FORMAT_NV21 = 226,
+
PVRSRV_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff
} PVRSRV_PIXEL_FORMAT;
@@ -657,7 +660,7 @@ typedef enum _PVRSRV_ALPHA_FORMAT_ {
PVRSRV_ALPHA_FORMAT_UNKNOWN = 0x00000000,
PVRSRV_ALPHA_FORMAT_PRE = 0x00000001,
PVRSRV_ALPHA_FORMAT_NONPRE = 0x00000002,
- PVRSRV_ALPHA_FORMAT_MASK = 0x0000000F,
+ PVRSRV_ALPHA_FORMAT_MASK = 0x0000000F
} PVRSRV_ALPHA_FORMAT;
/*!
@@ -668,7 +671,7 @@ typedef enum _PVRSRV_COLOURSPACE_FORMAT_ {
PVRSRV_COLOURSPACE_FORMAT_UNKNOWN = 0x00000000,
PVRSRV_COLOURSPACE_FORMAT_LINEAR = 0x00010000,
PVRSRV_COLOURSPACE_FORMAT_NONLINEAR = 0x00020000,
- PVRSRV_COLOURSPACE_FORMAT_MASK = 0x000F0000,
+ PVRSRV_COLOURSPACE_FORMAT_MASK = 0x000F0000
} PVRSRV_COLOURSPACE_FORMAT;
@@ -744,17 +747,10 @@ typedef struct _PVRSRV_CLIENT_SYNC_INFO_
IMG_DEV_VIRTADDR sReadOps2CompleteDevVAddr;
/* handle to client mapping data (OS specific) */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hMappingInfo;
-
- /* handle to kernel sync info */
- IMG_SID hKernelSyncInfo;
-#else
IMG_HANDLE hMappingInfo;
/* handle to kernel sync info */
IMG_HANDLE hKernelSyncInfo;
-#endif
} PVRSRV_CLIENT_SYNC_INFO, *PPVRSRV_CLIENT_SYNC_INFO;
@@ -766,6 +762,9 @@ typedef struct PVRSRV_RESOURCE_TAG
{
volatile IMG_UINT32 ui32Lock;
IMG_UINT32 ui32ID;
+#if !defined(PVR_LINUX_USING_WORKQUEUES) && defined(__linux__)
+ IMG_VOID *pOSSyncPrimitive;
+#endif /* !defined(PVR_LINUX_USING_WORKQUEUES) && defined(__linux__) */
}PVRSRV_RESOURCE;
typedef PVRSRV_RESOURCE PVRSRV_RES_HANDLE;
@@ -803,7 +802,7 @@ typedef struct _IMG_RECT_16_
typedef PVRSRV_ERROR (*PFN_GET_BUFFER_ADDR)(IMG_HANDLE,
IMG_HANDLE,
IMG_SYS_PHYADDR**,
- IMG_SIZE_T*,
+ IMG_UINT32*,
IMG_VOID**,
IMG_HANDLE*,
IMG_BOOL*,
@@ -929,12 +928,17 @@ typedef struct _PVRSRV_REGISTRY_INFO_
PVRSRV_ERROR IMG_CALLCONV PVRSRVReadRegistryString (PPVRSRV_REGISTRY_INFO psRegInfo);
PVRSRV_ERROR IMG_CALLCONV PVRSRVWriteRegistryString (PPVRSRV_REGISTRY_INFO psRegInfo);
+#define PVRSRV_BC_FLAGS_YUVCSC_RANGE_MASK (0x01)
+#define PVRSRV_BC_FLAGS_YUVCSC_RANGE_SHIFT (0x00)
+#define PVRSRV_BC_FLAGS_YUVCSC_CONFORMANT_RANGE (0 << PVRSRV_BC_FLAGS_YUVCSC_RANGE_SHIFT)
+#define PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE (1 << PVRSRV_BC_FLAGS_YUVCSC_RANGE_SHIFT)
-#define PVRSRV_BC_FLAGS_YUVCSC_CONFORMANT_RANGE (0 << 0)
-#define PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE (1 << 0)
+#define PVRSRV_BC_FLAGS_YUVCSC_CS_MASK (0x02)
+#define PVRSRV_BC_FLAGS_YUVCSC_CS_SHIFT (0x01)
+#define PVRSRV_BC_FLAGS_YUVCSC_BT601 (0 << PVRSRV_BC_FLAGS_YUVCSC_CS_SHIFT)
+#define PVRSRV_BC_FLAGS_YUVCSC_BT709 (1 << PVRSRV_BC_FLAGS_YUVCSC_CS_SHIFT)
-#define PVRSRV_BC_FLAGS_YUVCSC_BT601 (0 << 1)
-#define PVRSRV_BC_FLAGS_YUVCSC_BT709 (1 << 1)
+#define PVRSRV_BC_FLAGS_YUVCSC_MASK (PVRSRV_BC_FLAGS_YUVCSC_RANGE_MASK | PVRSRV_BC_FLAGS_YUVCSC_CS_MASK)
#define MAX_BUFFER_DEVICE_NAME_SIZE (50) /* arbitrary choice! */
diff --git a/include4/sgx_options.h b/eurasia_km/include4/sgx_options.h
index b64cd39..230e8ad 100644
--- a/include4/sgx_options.h
+++ b/eurasia_km/include4/sgx_options.h
@@ -87,17 +87,12 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-#if defined (SUPPORT_SID_INTERFACE)
-#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
-#define OPTIONS_BIT4 (0x1U << 4)
-#else
#if defined(PVR_SECURE_HANDLES) || defined (INTERNAL_TEST)
#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
#define OPTIONS_BIT4 (0x1U << 4)
#else
#define OPTIONS_BIT4 0x0
#endif /* PVR_SECURE_HANDLES */
-#endif
#if defined(SGX_BYPASS_SYSTEM_CACHE) || defined (INTERNAL_TEST)
#define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT5
@@ -206,13 +201,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define OPTIONS_BIT21 0x0
#endif /* SUPPORT_SGX_LOW_LATENCY_SCHEDULING */
-#if defined(USE_SUPPORT_NO_TA3D_OVERLAP) || defined (INTERNAL_TEST)
-#define USE_SUPPORT_NO_TA3D_OVERLAP_SET_OFFSET OPTIONS_BIT22
-#define OPTIONS_BIT22 (0x1U << 22)
-#else
-#define OPTIONS_BIT22 0x0
-#endif /* USE_SUPPORT_NO_TA3D_OVERLAP */
-
#if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
#if defined(SGX_FEATURE_MP_CORE_COUNT)
#define OPTIONS_HIGHBYTE ((SGX_FEATURE_MP_CORE_COUNT-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET)
@@ -253,6 +241,5 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
OPTIONS_BIT19 |\
OPTIONS_BIT20 |\
OPTIONS_BIT21 |\
- OPTIONS_BIT22 |\
OPTIONS_HIGHBYTE
diff --git a/include4/sgxapi_km.h b/eurasia_km/include4/sgxapi_km.h
index bb8776a..81d66ad 100644
--- a/include4/sgxapi_km.h
+++ b/eurasia_km/include4/sgxapi_km.h
@@ -83,11 +83,13 @@ extern "C" {
#if defined(SUPPORT_MEMORY_TILING)
#define SGX_VPB_TILED_HEAP_ID 14
#endif
-#if defined(SUPPORT_ION)
-#define SGX_ION_HEAP_ID 15
-#endif
-#define SGX_MAX_HEAP_ID 16
+#if defined(SGX_FEATURE_ADDRESS_SPACE_EXTENSION)
+ #define SGX_TEXTURE_HEAP_ID 15
+ #define SGX_MAX_HEAP_ID 16
+#else
+ #define SGX_MAX_HEAP_ID 15
+#endif
/*
* Keep SGX_3DPARAMETERS_HEAP_ID as TQ full custom
@@ -119,9 +121,9 @@ extern "C" {
/* sync info structure array size */
#define SGX_MAX_SRC_SYNCS_TA 32
#define SGX_MAX_DST_SYNCS_TA 1
-/* note: there is implicitly 1 3D Dst Sync */
-#define SGX_MAX_SRC_SYNCS_TQ 8
-#define SGX_MAX_DST_SYNCS_TQ 1
+/* note: only one dst sync is supported by the 2D paths */
+#define SGX_MAX_SRC_SYNCS_TQ 6
+#define SGX_MAX_DST_SYNCS_TQ 2
#endif
@@ -142,6 +144,9 @@ extern "C" {
#define PVRSRV_SGX_HWPERF_POWER 0x6
#define PVRSRV_SGX_HWPERF_PERIODIC 0x7
#define PVRSRV_SGX_HWPERF_3DSPM 0x8
+#define PVRSRV_SGX_HWPERF_TA_OCL 0x9
+#define PVRSRV_SGX_HWPERF_3D_OCL 0xA
+#define PVRSRV_SGX_HWPERF_3DSPM_OCL 0xB
#define PVRSRV_SGX_HWPERF_MK_EVENT 0x101
#define PVRSRV_SGX_HWPERF_MK_TA 0x102
@@ -154,6 +159,7 @@ extern "C" {
#define PVRSRV_SGX_HWPERF_MK_TA_LOCKUP 0x109
#define PVRSRV_SGX_HWPERF_MK_3D_LOCKUP 0x10A
#define PVRSRV_SGX_HWPERF_MK_2D_LOCKUP 0x10B
+#define PVRSRV_SGX_HWPERF_MK_HK 0x10C
#define PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT 28
#define PVRSRV_SGX_HWPERF_TYPE_OP_MASK ((1UL << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT) - 1)
@@ -173,6 +179,12 @@ extern "C" {
#define PVRSRV_SGX_HWPERF_TYPE_PERIODIC (PVRSRV_SGX_HWPERF_PERIODIC)
#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_START (PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_START)
#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_END (PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_OCL_START (PVRSRV_SGX_HWPERF_3DSPM_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_OCL_END (PVRSRV_SGX_HWPERF_3DSPM_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_TA_OCL_START (PVRSRV_SGX_HWPERF_TA_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_TA_OCL_END (PVRSRV_SGX_HWPERF_TA_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_3D_OCL_START (PVRSRV_SGX_HWPERF_3D_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_3D_OCL_END (PVRSRV_SGX_HWPERF_3D_OCL | PVRSRV_SGX_HWPERF_TYPE_OP_END)
#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_START (PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_END (PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_DUMMY_START (PVRSRV_SGX_HWPERF_MK_TA_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
@@ -193,6 +205,9 @@ extern "C" {
#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_END (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_START (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_END (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_HK_START (PVRSRV_SGX_HWPERF_MK_HK | PVRSRV_SGX_HWPERF_TYPE_OP_START)
+#define PVRSRV_SGX_HWPERF_TYPE_MK_HK_END (PVRSRV_SGX_HWPERF_MK_HK | PVRSRV_SGX_HWPERF_TYPE_OP_END)
+
#define PVRSRV_SGX_HWPERF_STATUS_OFF (0x0)
#define PVRSRV_SGX_HWPERF_STATUS_RESET_COUNTERS (1UL << 0)
@@ -236,6 +251,7 @@ typedef struct _CTL_STATUS_
typedef enum _SGX_MISC_INFO_REQUEST_
{
SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
+ SGX_MISC_INFO_REQUEST_CLOCKSPEED_SLCSIZE,
SGX_MISC_INFO_REQUEST_SGXREV,
SGX_MISC_INFO_REQUEST_DRIVER_SGXREV,
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
@@ -254,6 +270,9 @@ typedef enum _SGX_MISC_INFO_REQUEST_
SGX_MISC_INFO_REQUEST_SPM,
SGX_MISC_INFO_REQUEST_ACTIVEPOWER,
SGX_MISC_INFO_REQUEST_LOCKUPS,
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+ SGX_MISC_INFO_REQUEST_EDM_STATUS_BUFFER_INFO,
+#endif
SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
} SGX_MISC_INFO_REQUEST;
@@ -275,11 +294,24 @@ typedef struct _PVRSRV_SGX_MISCINFO_FEATURES
#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
IMG_UINT32 ui32DeviceMemValue; /*!< device mem value read from ukernel */
#endif
+} PVRSRV_SGX_MISCINFO_FEATURES;
+
+typedef struct _PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE
+{
+ IMG_UINT32 ui32SGXClockSpeed;
+ IMG_UINT32 ui32SGXSLCSize;
+} PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE;
+
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+/******************************************************************************
+ * Struct for getting access to the EDM Status Buffer
+ ******************************************************************************/
+typedef struct _PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO
+{
IMG_DEV_VIRTADDR sDevVAEDMStatusBuffer; /*!< DevVAddr of the EDM status buffer */
IMG_PVOID pvEDMStatusBuffer; /*!< CPUVAddr of the EDM status buffer */
+} PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO;
#endif
-} PVRSRV_SGX_MISCINFO_FEATURES;
/******************************************************************************
@@ -389,6 +421,7 @@ typedef struct _SGX_MISC_INFO_
IMG_UINT32 reserved; /*!< Unused: ensures valid code in the case everything else is compiled out */
PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
IMG_UINT32 ui32SGXClockSpeed;
+ PVRSRV_SGX_MISCINFO_QUERY_CLOCKSPEED_SLCSIZE sQueryClockSpeedSLCSize;
PVRSRV_SGX_MISCINFO_ACTIVEPOWER sActivePower;
PVRSRV_SGX_MISCINFO_LOCKUPS sLockups;
PVRSRV_SGX_MISCINFO_SPM sSPM;
@@ -396,6 +429,10 @@ typedef struct _SGX_MISC_INFO_
SGX_BREAKPOINT_INFO sSGXBreakpointInfo;
#endif
PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS sSetHWPerfStatus;
+
+#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
+ PVRSRV_SGX_MISCINFO_EDM_STATUS_BUFFER_INFO sEDMStatusBufferInfo;
+#endif
} uData;
} SGX_MISC_INFO;
@@ -439,7 +476,6 @@ typedef struct _PVRSRV_SGX_PDUMP_CONTEXT_
} PVRSRV_SGX_PDUMP_CONTEXT;
-#if !defined (SUPPORT_SID_INTERFACE)
typedef struct _SGX_KICKTA_DUMP_ROFF_
{
IMG_HANDLE hKernelMemInfo; /*< Buffer handle */
@@ -448,13 +484,8 @@ typedef struct _SGX_KICKTA_DUMP_ROFF_
IMG_UINT32 ui32Value; /*< Actual value to dump */
IMG_PCHAR pszName; /*< Name of buffer */
} SGX_KICKTA_DUMP_ROFF, *PSGX_KICKTA_DUMP_ROFF;
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
-typedef struct _SGX_KICKTA_DUMP_BUFFER_KM_
-#else
typedef struct _SGX_KICKTA_DUMP_BUFFER_
-#endif
{
IMG_UINT32 ui32SpaceUsed;
IMG_UINT32 ui32Start; /*< Byte offset of start to dump */
@@ -475,13 +506,8 @@ typedef struct _SGX_KICKTA_DUMP_BUFFER_
#if defined (__QNXNTO__)
IMG_UINT32 ui32NameLength; /*< Number of characters in buffer name */
#endif
-#if defined (SUPPORT_SID_INTERFACE)
-} SGX_KICKTA_DUMP_BUFFER_KM, *PSGX_KICKTA_DUMP_BUFFER_KM;
-#else
} SGX_KICKTA_DUMP_BUFFER, *PSGX_KICKTA_DUMP_BUFFER;
-#endif
-#if !defined (SUPPORT_SID_INTERFACE)
#ifdef PDUMP
/*
PDUMP version of above kick structure
@@ -501,7 +527,6 @@ typedef struct _SGX_KICKTA_PDUMP_
IMG_UINT32 ui32ROffArraySize;
} SGX_KICKTA_PDUMP, *PSGX_KICKTA_PDUMP;
#endif /* PDUMP */
-#endif /* #if !defined (SUPPORT_SID_INTERFACE) */
#if defined(TRANSFER_QUEUE)
#if defined(SGX_FEATURE_2D_HARDWARE)
diff --git a/include4/sgxscript.h b/eurasia_km/include4/sgxscript.h
index 46b89d2..7e663b1 100644
--- a/include4/sgxscript.h
+++ b/eurasia_km/include4/sgxscript.h
@@ -42,11 +42,13 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef __SGXSCRIPT_H__
#define __SGXSCRIPT_H__
+#include "sgxfeaturedefs.h"
#if defined (__cplusplus)
extern "C" {
#endif
#define SGX_MAX_INIT_COMMANDS 64
+#define SGX_MAX_PRINT_COMMANDS 64
#define SGX_MAX_DEINIT_COMMANDS 16
typedef enum _SGX_INIT_OPERATION
@@ -54,6 +56,7 @@ typedef enum _SGX_INIT_OPERATION
SGX_INIT_OP_ILLEGAL = 0,
SGX_INIT_OP_WRITE_HW_REG,
SGX_INIT_OP_READ_HW_REG,
+ SGX_INIT_OP_PRINT_HW_REG,
#if defined(PDUMP)
SGX_INIT_OP_PDUMP_HW_REG,
#endif
@@ -71,6 +74,7 @@ typedef union _SGX_INIT_COMMAND
struct {
SGX_INIT_OPERATION eOp;
IMG_UINT32 ui32Offset;
+ IMG_UINT32 ui32Value;
} sReadHWReg;
#if defined(PDUMP)
struct {
@@ -86,6 +90,10 @@ typedef struct _SGX_INIT_SCRIPTS_
SGX_INIT_COMMAND asInitCommandsPart1[SGX_MAX_INIT_COMMANDS];
SGX_INIT_COMMAND asInitCommandsPart2[SGX_MAX_INIT_COMMANDS];
SGX_INIT_COMMAND asDeinitCommands[SGX_MAX_DEINIT_COMMANDS];
+#if defined(SGX_FEATURE_MP)
+ SGX_INIT_COMMAND asSGXREGDebugCommandsMaster[SGX_MAX_PRINT_COMMANDS];
+#endif
+ SGX_INIT_COMMAND asSGXREGDebugCommandsSlave[SGX_MAX_PRINT_COMMANDS];
} SGX_INIT_SCRIPTS;
#if defined(__cplusplus)
diff --git a/services4/3rdparty/bufferclass_example/Kbuild.mk b/eurasia_km/services4/3rdparty/bufferclass_example/Kbuild.mk
index 8f5720e..8f5720e 100644
--- a/services4/3rdparty/bufferclass_example/Kbuild.mk
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/Kbuild.mk
diff --git a/services4/3rdparty/bufferclass_example/Linux.mk b/eurasia_km/services4/3rdparty/bufferclass_example/Linux.mk
index f2e44a6..f2e44a6 100644
--- a/services4/3rdparty/bufferclass_example/Linux.mk
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/Linux.mk
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example.c b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example.c
index 2669888..2669888 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example.c
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example.c
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example.h b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example.h
index 4cdeb39..4cdeb39 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example.h
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example.h
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c
index 90d25c8..fdb8ce3 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_linux.c
@@ -101,7 +101,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#undef BCE_USE_SET_MEMORY
#endif
-#if defined(__i386__) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && defined(SUPPORT_LINUX_X86_PAT) && defined(SUPPORT_LINUX_X86_WRITECOMBINE)
+#if (defined(__i386__) || defined(__x86_64__)) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && defined(SUPPORT_LINUX_X86_PAT) && defined(SUPPORT_LINUX_X86_WRITECOMBINE)
#include <asm/cacheflush.h>
#define BCE_USE_SET_MEMORY
#endif
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example_linux.h b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_linux.h
index 65d7860..65d7860 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example_linux.h
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_linux.h
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example_private.c b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_private.c
index d9dbfde..d9dbfde 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example_private.c
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_private.c
diff --git a/services4/3rdparty/bufferclass_example/bufferclass_example_private.h b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_private.h
index 8d95e2b..8d95e2b 100644
--- a/services4/3rdparty/bufferclass_example/bufferclass_example_private.h
+++ b/eurasia_km/services4/3rdparty/bufferclass_example/bufferclass_example_private.h
diff --git a/eurasia_km/services4/3rdparty/dc_nohw/Kbuild.mk b/eurasia_km/services4/3rdparty/dc_nohw/Kbuild.mk
new file mode 100644
index 0000000..4bbcfd0
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_nohw/Kbuild.mk
@@ -0,0 +1,47 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+ccflags-y += \
+ -I$(TOP)/services4/3rdparty/dc_nohw \
+ -DDC_NOHW_DISCONTIG_BUFFERS -DDC_NOHW_GET_BUFFER_DIMENSIONS
+
+dcnohw-y += \
+ services4/3rdparty/dc_nohw/dc_nohw_displayclass.o \
+ services4/3rdparty/dc_nohw/dc_nohw_linux.o
diff --git a/eurasia_km/services4/3rdparty/dc_nohw/Linux.mk b/eurasia_km/services4/3rdparty/dc_nohw/Linux.mk
new file mode 100644
index 0000000..9bd3e01
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_nohw/Linux.mk
@@ -0,0 +1,45 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+modules := dc_nohw
+
+dc_nohw_type := kernel_module
+dc_nohw_target := dcnohw.ko
+dc_nohw_makefile := $(THIS_DIR)/Kbuild.mk
diff --git a/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw.h b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw.h
new file mode 100644
index 0000000..403361f
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw.h
@@ -0,0 +1,288 @@
+/*************************************************************************/ /*!
+@Title Dummy 3rd party display driver structures and prototypes
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/**************************************************************************
+ The 3rd party driver is a specification of an API to integrate the
+ IMG PowerVR Services driver with 3rd Party display hardware.
+ It is NOT a specification for a display controller driver, rather a
+ specification to extend the API for a pre-existing driver for the display hardware.
+
+ The 3rd party driver interface provides IMG PowerVR client drivers (e.g. PVR2D)
+ with an API abstraction of the system's underlying display hardware, allowing
+ the client drivers to indirectly control the display hardware and access its
+ associated memory.
+
+ Functions of the API include
+
+ - query primary surface attributes (width, height, stride, pixel format,
+ CPU physical and virtual address)
+ - swap/flip chain creation and subsequent query of surface attributes
+ - asynchronous display surface flipping, taking account of asynchronous
+ read (flip) and write (render) operations to the display surface
+
+ Note: having queried surface attributes the client drivers are able to map
+ the display memory to any IMG PowerVR Services device by calling
+ PVRSRVMapDeviceClassMemory with the display surface handle.
+
+ This code is intended to be an example of how a pre-existing display driver
+ may be extended to support the 3rd Party Display interface to
+ PowerVR Services - IMG is not providing a display driver implementation
+ **************************************************************************/
+
+#ifndef __DC_NOHW_H__
+#define __DC_NOHW_H__
+
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER)
+#if defined (ENABLE_DISPLAY_MODE_TRACKING)
+#error Cannot have both USE_BASE_VIDEO_FRAMEBUFFER and ENABLE_DISPLAY_MODE_TRACKING defined
+#endif
+#endif
+
+#if !defined(DC_NOHW_BUFFER_WIDTH) && !defined(DC_NOHW_BUFFER_HEIGHT)
+/* Default buffer size */
+#define DC_NOHW_BUFFER_WIDTH 320
+#define DC_NOHW_BUFFER_HEIGHT 240
+#endif
+
+#define DC_NOHW_BUFFER_BIT_DEPTH 32
+#define DC_NOHW_BUFFER_PIXEL_FORMAT PVRSRV_PIXEL_FORMAT_ARGB8888
+
+#define DC_NOHW_DEPTH_BITS_PER_BYTE 8
+
+#define dc_nohw_byte_depth_from_bit_depth(bit_depth) (((IMG_UINT32)(bit_depth) + DC_NOHW_DEPTH_BITS_PER_BYTE - 1)/DC_NOHW_DEPTH_BITS_PER_BYTE)
+#define dc_nohw_bit_depth_from_byte_depth(byte_depth) ((IMG_UINT32)(byte_depth) * DC_NOHW_DEPTH_BITS_PER_BYTE)
+#define dc_nohw_roundup_bit_depth(bd) dc_nohw_bit_depth_from_byte_depth(dc_nohw_byte_depth_from_bit_depth(bd))
+
+#define dc_nohw_byte_stride(width, bit_depth) ((IMG_UINT32)(width) * dc_nohw_byte_depth_from_bit_depth(bit_depth))
+
+#if defined(DC_NOHW_GET_BUFFER_DIMENSIONS)
+IMG_BOOL GetBufferDimensions(IMG_UINT32 *pui32Width, IMG_UINT32 *pui32Height, PVRSRV_PIXEL_FORMAT *pePixelFormat, IMG_UINT32 *pui32Stride);
+#else
+#define DC_NOHW_BUFFER_BYTE_STRIDE dc_nohw_byte_stride(DC_NOHW_BUFFER_WIDTH, DC_NOHW_BUFFER_BIT_DEPTH)
+#endif
+
+extern IMG_BOOL IMG_IMPORT PVRGetDisplayClassJTable(PVRSRV_DC_DISP2SRV_KMJTABLE *psJTable);
+
+#define DC_NOHW_MAXFORMATS (1)
+#define DC_NOHW_MAXDIMS (1)
+#define DC_NOHW_MAX_BACKBUFFERS (3)
+
+
+typedef void * DC_HANDLE;
+
+typedef struct DC_NOHW_BUFFER_TAG
+{
+ DC_HANDLE hSwapChain;
+ DC_HANDLE hMemChunk;
+
+ /* member using IMG structures to minimise API function code */
+ /* replace with own structures where necessary */
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ IMG_SYS_PHYADDR *psSysAddr;
+#else
+ IMG_SYS_PHYADDR sSysAddr;
+#endif
+ IMG_DEV_VIRTADDR sDevVAddr;
+ IMG_CPU_VIRTADDR sCPUVAddr;
+ PVRSRV_SYNC_DATA* psSyncData;
+
+ struct DC_NOHW_BUFFER_TAG *psNext;
+} DC_NOHW_BUFFER;
+
+
+/* DC_NOHW buffer structure */
+typedef struct DC_NOHW_SWAPCHAIN_TAG
+{
+ unsigned long ulBufferCount;
+ DC_NOHW_BUFFER *psBuffer;
+} DC_NOHW_SWAPCHAIN;
+
+
+/* kernel device information structure */
+typedef struct DC_NOHW_DEVINFO_TAG
+{
+ unsigned int uiDeviceID;
+
+ /* system surface info */
+ DC_NOHW_BUFFER sSystemBuffer;
+
+ /* number of supported display formats */
+ unsigned long ulNumFormats;
+
+ /* number of supported display dims */
+ unsigned long ulNumDims;
+
+ /* jump table into PVR services */
+ PVRSRV_DC_DISP2SRV_KMJTABLE sPVRJTable;
+
+ /* jump table into DC */
+ PVRSRV_DC_SRV2DISP_KMJTABLE sDCJTable;
+
+ /*
+ handle for connection to kernel services
+ - OS specific - may not be required
+ */
+ DC_HANDLE hPVRServices;
+
+ /* back buffer info */
+ DC_NOHW_BUFFER asBackBuffers[DC_NOHW_MAX_BACKBUFFERS];
+
+ /* ref count */
+ unsigned long ulRefCount;
+
+ DC_NOHW_SWAPCHAIN *psSwapChain;
+
+ /* member using IMG structures to minimise API function code */
+ /* replace with own structures where necessary */
+ DISPLAY_INFO sDisplayInfo;
+
+ /* system surface info */
+ DISPLAY_FORMAT sSysFormat;
+ DISPLAY_DIMS sSysDims;
+ IMG_UINT32 ui32BufferSize;
+
+ /* list of supported display formats */
+ DISPLAY_FORMAT asDisplayFormatList[DC_NOHW_MAXFORMATS];
+
+ /* list of supported display formats */
+ DISPLAY_DIMS asDisplayDimList[DC_NOHW_MAXDIMS];
+
+ /* back buffer info */
+ DISPLAY_FORMAT sBackBufferFormat[DC_NOHW_MAXFORMATS];
+
+} DC_NOHW_DEVINFO;
+
+
+/*!
+ *****************************************************************************
+ * Error values
+ *****************************************************************************/
+typedef enum _DC_ERROR_
+{
+ DC_OK = 0,
+ DC_ERROR_GENERIC = 1,
+ DC_ERROR_OUT_OF_MEMORY = 2,
+ DC_ERROR_TOO_FEW_BUFFERS = 3,
+ DC_ERROR_INVALID_PARAMS = 4,
+ DC_ERROR_INIT_FAILURE = 5,
+ DC_ERROR_CANT_REGISTER_CALLBACK = 6,
+ DC_ERROR_INVALID_DEVICE = 7,
+ DC_ERROR_DEVICE_REGISTER_FAILED = 8
+} DC_ERROR;
+
+
+#ifndef UNREFERENCED_PARAMETER
+#define UNREFERENCED_PARAMETER(param) (param) = (param)
+#endif
+
+DC_ERROR Init(void);
+DC_ERROR Deinit(void);
+
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER) || defined (ENABLE_DISPLAY_MODE_TRACKING)
+DC_ERROR OpenMiniport(void);
+DC_ERROR CloseMiniport(void);
+#endif /* #if defined(USE_BASE_VIDEO_FRAMEBUFFER) || defined (ENABLE_DISPLAY_MODE_TRACKING) */
+
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER)
+PVRSRV_ERROR SetupDevInfo (DC_NOHW_DEVINFO *psDevInfo);
+PVRSRV_ERROR FreeBackBuffers (DC_NOHW_DEVINFO *psDevInfo);
+#endif
+
+#if defined (ENABLE_DISPLAY_MODE_TRACKING)
+DC_ERROR Shadow_Desktop_Resolution(DC_NOHW_DEVINFO *psDevInfo);
+#endif /* #if defined (ENABLE_DISPLAY_MODE_TRACKING) */
+
+#if !defined(DC_NOHW_DISCONTIG_BUFFERS) && !defined(USE_BASE_VIDEO_FRAMEBUFFER)
+IMG_SYS_PHYADDR CpuPAddrToSysPAddr(IMG_CPU_PHYADDR cpu_paddr);
+IMG_CPU_PHYADDR SysPAddrToCpuPAddr(IMG_SYS_PHYADDR sys_paddr);
+#endif
+
+/* OS Specific APIs */
+DC_ERROR OpenPVRServices (DC_HANDLE *phPVRServices);
+DC_ERROR ClosePVRServices (DC_HANDLE hPVRServices);
+
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+DC_ERROR AllocDiscontigMemory(unsigned long ulSize,
+ DC_HANDLE * phMemChunk,
+ IMG_CPU_VIRTADDR *pLinAddr,
+ IMG_SYS_PHYADDR **pPhysAddr);
+
+void FreeDiscontigMemory(unsigned long ulSize,
+ DC_HANDLE hMemChunk,
+ IMG_CPU_VIRTADDR LinAddr,
+ IMG_SYS_PHYADDR *pPhysAddr);
+#else
+
+
+
+DC_ERROR AllocContigMemory(unsigned long ulSize,
+ DC_HANDLE * phMemHandle,
+ IMG_CPU_VIRTADDR *pLinAddr,
+ IMG_CPU_PHYADDR *pPhysAddr);
+
+void FreeContigMemory(unsigned long ulSize,
+ DC_HANDLE hMemChunk,
+ IMG_CPU_VIRTADDR LinAddr,
+ IMG_CPU_PHYADDR PhysAddr);
+
+
+#endif
+
+void *AllocKernelMem(unsigned long ulSize);
+void FreeKernelMem (void *pvMem);
+
+DC_ERROR GetLibFuncAddr (DC_HANDLE hExtDrv, char *szFunctionName, PFN_DC_GET_PVRJTABLE *ppfnFuncTable);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __DC_NOHW_H__ */
+
+/******************************************************************************
+ End of file (dc_nohw.h)
+******************************************************************************/
+
diff --git a/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_displayclass.c b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_displayclass.c
new file mode 100644
index 0000000..9000e96
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_displayclass.c
@@ -0,0 +1,1006 @@
+/*************************************************************************/ /*!
+@Title NOHW display driver display-specific functions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/**************************************************************************
+ The 3rd party driver is a specification of an API to integrate the IMG POWERVR
+ Services driver with 3rd Party display hardware. It is NOT a specification for
+ a display controller driver, rather a specification to extend the API for a
+ pre-existing driver for the display hardware.
+
+ The 3rd party driver interface provides IMG POWERVR client drivers (e.g. PVR2D)
+ with an API abstraction of the system's underlying display hardware, allowing
+ the client drivers to indirectly control the display hardware and access its
+ associated memory.
+
+ Functions of the API include
+ - query primary surface attributes (width, height, stride, pixel format, CPU
+ physical and virtual address)
+ - swap/flip chain creation and subsequent query of surface attributes
+ - asynchronous display surface flipping, taking account of asynchronous read
+ (flip) and write (render) operations to the display surface
+
+ Note: having queried surface attributes the client drivers are able to map the
+ display memory to any IMG POWERVR Services device by calling
+ PVRSRVMapDeviceClassMemory with the display surface handle.
+
+ This code is intended to be an example of how a pre-existing display driver may
+ be extended to support the 3rd Party Display interface to POWERVR Services
+ - IMG is not providing a display driver implementation.
+ **************************************************************************/
+
+#if defined(__linux__)
+#include <linux/string.h>
+#else
+#include <string.h>
+#endif
+
+/* IMG services headers */
+#include "img_defs.h"
+#include "servicesext.h"
+#include "kerneldisplay.h"
+
+#include "dc_nohw.h"
+
+#define DISPLAY_DEVICE_NAME "DC_NOHW"
+
+#define DC_NOHW_COMMAND_COUNT 1
+
+/* top level 'hook ptr' */
+static void *gpvAnchor = 0;
+static PFN_DC_GET_PVRJTABLE pfnGetPVRJTable = 0;
+
+
+
+
+/*
+ Kernel services is a kernel module and must be loaded first.
+ The display controller driver is also a kernel module and must be loaded after the pvr services module.
+ The display controller driver should be able to retrieve the
+ address of the services PVRGetDisplayClassJTable from (the already loaded)
+ kernel services module.
+*/
+
+/* returns anchor pointer */
+static DC_NOHW_DEVINFO * GetAnchorPtr(void)
+{
+ return (DC_NOHW_DEVINFO *)gpvAnchor;
+}
+
+/* sets anchor pointer */
+static void SetAnchorPtr(DC_NOHW_DEVINFO *psDevInfo)
+{
+ gpvAnchor = (void *)psDevInfo;
+}
+
+#if !defined(DC_NOHW_DISCONTIG_BUFFERS) && !defined(USE_BASE_VIDEO_FRAMEBUFFER)
+IMG_SYS_PHYADDR CpuPAddrToSysPAddr(IMG_CPU_PHYADDR cpu_paddr)
+{
+ IMG_SYS_PHYADDR sys_paddr;
+
+ /* This would only be an inequality if the CPU's MMU did not point to sys address 0,
+ ie. multi CPU system */
+ sys_paddr.uiAddr = cpu_paddr.uiAddr;
+ return sys_paddr;
+}
+
+IMG_CPU_PHYADDR SysPAddrToCpuPAddr(IMG_SYS_PHYADDR sys_paddr)
+{
+ IMG_CPU_PHYADDR cpu_paddr;
+
+ /* This would only be an inequality if the CPU's MMU did not point to sys address 0,
+ ie. multi CPU system */
+ cpu_paddr.uiAddr = sys_paddr.uiAddr;
+ return cpu_paddr;
+}
+#endif
+
+
+static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 ui32DeviceID,
+ IMG_HANDLE *phDevice,
+ PVRSRV_SYNC_DATA* psSystemBufferSyncData)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+ PVR_UNREFERENCED_PARAMETER(ui32DeviceID);
+
+ psDevInfo = GetAnchorPtr();
+
+#if defined (ENABLE_DISPLAY_MODE_TRACKING)
+ if (Shadow_Desktop_Resolution(psDevInfo) != DC_OK)
+ {
+ return (PVRSRV_ERROR_NOT_SUPPORTED);
+ }
+#endif
+
+ /* store the system surface sync data */
+ psDevInfo->asBackBuffers[0].psSyncData = psSystemBufferSyncData;
+
+ /* return handle to the devinfo */
+ *phDevice = (IMG_HANDLE)psDevInfo;
+
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER)
+ return (SetupDevInfo(psDevInfo));
+#else
+ return (PVRSRV_OK);
+#endif
+}
+
+
+static PVRSRV_ERROR CloseDCDevice(IMG_HANDLE hDevice)
+{
+ UNREFERENCED_PARAMETER(hDevice);
+
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER)
+ FreeBackBuffers(GetAnchorPtr());
+#endif
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR EnumDCFormats(IMG_HANDLE hDevice,
+ IMG_UINT32 *pui32NumFormats,
+ DISPLAY_FORMAT *psFormat)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+
+ if(!hDevice || !pui32NumFormats)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO *)hDevice;
+
+ *pui32NumFormats = (IMG_UINT32)psDevInfo->ulNumFormats;
+
+ if(psFormat != IMG_NULL)
+ {
+ unsigned long i;
+
+ for(i=0; i<psDevInfo->ulNumFormats; i++)
+ {
+ psFormat[i] = psDevInfo->asDisplayFormatList[i];
+ }
+ }
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR EnumDCDims(IMG_HANDLE hDevice,
+ DISPLAY_FORMAT *psFormat,
+ IMG_UINT32 *pui32NumDims,
+ DISPLAY_DIMS *psDim)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+
+ if(!hDevice || !psFormat || !pui32NumDims)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO *)hDevice;
+
+ *pui32NumDims = (IMG_UINT32)psDevInfo->ulNumDims;
+
+ /* given psFormat return the available Dims */
+
+ if(psDim != IMG_NULL)
+ {
+ unsigned long i;
+
+ for(i=0; i<psDevInfo->ulNumDims; i++)
+ {
+ psDim[i] = psDevInfo->asDisplayDimList[i];
+ }
+ }
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR GetDCSystemBuffer(IMG_HANDLE hDevice, IMG_HANDLE *phBuffer)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+
+ if(!hDevice || !phBuffer)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO *)hDevice;
+
+ *phBuffer = (IMG_HANDLE)&psDevInfo->asBackBuffers[0];
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR GetDCInfo(IMG_HANDLE hDevice, DISPLAY_INFO *psDCInfo)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+
+ if(!hDevice || !psDCInfo)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO *)hDevice;
+
+ *psDCInfo = psDevInfo->sDisplayInfo;
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR GetDCBufferAddr(IMG_HANDLE hDevice,
+ IMG_HANDLE hBuffer,
+ IMG_SYS_PHYADDR **ppsSysAddr,
+ IMG_UINT32 *pui32ByteSize,
+ IMG_VOID **ppvCpuVAddr,
+ IMG_HANDLE *phOSMapInfo,
+ IMG_BOOL *pbIsContiguous,
+ IMG_UINT32 *pui32TilingStride)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+ DC_NOHW_BUFFER *psBuffer;
+
+ if(!hDevice || !hBuffer || !ppsSysAddr || !pui32ByteSize)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO *)hDevice;
+
+ psBuffer = (DC_NOHW_BUFFER*)hBuffer;
+
+ *ppvCpuVAddr = psBuffer->sCPUVAddr;
+
+ *pui32ByteSize = (IMG_UINT32)(psDevInfo->asDisplayDimList[0].ui32Height * psDevInfo->asDisplayDimList[0].ui32ByteStride);
+ *phOSMapInfo = IMG_NULL;
+
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ *ppsSysAddr = psBuffer->psSysAddr;
+ *pbIsContiguous = IMG_FALSE;
+#else
+ *ppsSysAddr = &psBuffer->sSysAddr;
+ *pbIsContiguous = IMG_TRUE;
+#endif
+
+#if defined(SUPPORT_MEMORY_TILING)
+ {
+ IMG_UINT32 ui32Stride = psDevInfo->asDisplayDimList[0].ui32ByteStride;
+ IMG_UINT32 ui32NumBits = 0, ui32StrideTopBit, n;
+
+ // How many bits for x?
+ for(n = 0; n < 32; n++)
+ {
+ if(ui32Stride & (1<<n))
+ {
+ ui32NumBits = n+1;
+ }
+ }
+
+ // clamp to the minimum..
+ if(ui32NumBits < 10)
+ {
+ ui32NumBits = 10;
+ }
+
+ // Subtract one to make this a range limit..
+ ui32StrideTopBit = ui32NumBits - 1;
+
+ // Subtract 9 to prepare it for the HW..
+ ui32StrideTopBit -= 9;
+
+ *pui32TilingStride = ui32StrideTopBit;
+ }
+#else
+ UNREFERENCED_PARAMETER(pui32TilingStride);
+#endif /* defined(SUPPORT_MEMORY_TILING) */
+
+ return (PVRSRV_OK);
+}
+
+static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
+ IMG_UINT32 ui32Flags,
+ DISPLAY_SURF_ATTRIBUTES *psDstSurfAttrib,
+ DISPLAY_SURF_ATTRIBUTES *psSrcSurfAttrib,
+ IMG_UINT32 ui32BufferCount,
+ PVRSRV_SYNC_DATA **ppsSyncData,
+ IMG_UINT32 ui32OEMFlags,
+ IMG_HANDLE *phSwapChain,
+ IMG_UINT32 *pui32SwapChainID)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+ DC_NOHW_SWAPCHAIN *psSwapChain;
+ DC_NOHW_BUFFER *psBuffer;
+ IMG_UINT32 i;
+ PVRSRV_ERROR eError;
+
+ UNREFERENCED_PARAMETER(ui32OEMFlags);
+ UNREFERENCED_PARAMETER(pui32SwapChainID);
+
+ /* check parameters */
+ if(!hDevice
+ || !psDstSurfAttrib
+ || !psSrcSurfAttrib
+ || !ppsSyncData
+ || !phSwapChain)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO*)hDevice;
+
+ /* the dc_nohw only supports a single swapchain */
+ if(psDevInfo->psSwapChain)
+ {
+ return (PVRSRV_ERROR_FLIP_CHAIN_EXISTS);
+ }
+
+ /* create a swapchain structure */
+ psSwapChain = (DC_NOHW_SWAPCHAIN*)AllocKernelMem(sizeof(DC_NOHW_SWAPCHAIN));
+ if(!psSwapChain)
+ {
+ return (PVRSRV_ERROR_OUT_OF_MEMORY);
+ }
+
+ memset(psSwapChain, 0, sizeof(DC_NOHW_SWAPCHAIN));
+
+ if (ui32BufferCount)
+ {
+ /* check the buffer count */
+ if(ui32BufferCount > DC_NOHW_MAX_BACKBUFFERS)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ExitError;
+ }
+
+ /*
+ verify the DST/SRC attributes
+ - SRC/DST must match the current display mode config
+ */
+ if(psDstSurfAttrib->pixelformat != psDevInfo->sSysFormat.pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sSysDims.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sSysDims.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sSysDims.ui32Height)
+ {
+ /* DST doesn't match the current mode */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ExitError;
+ }
+
+ if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
+ {
+ /* DST doesn't match the SRC */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ExitError;
+ }
+
+ /* INTEGRATION_POINT: check the flags */
+ UNREFERENCED_PARAMETER(ui32Flags);
+
+ psBuffer = (DC_NOHW_BUFFER*)AllocKernelMem(sizeof(DC_NOHW_BUFFER) * ui32BufferCount);
+ if(!psBuffer)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ goto ExitError;
+ }
+
+ /* initialise allocations */
+ memset(psBuffer, 0, sizeof(DC_NOHW_BUFFER) * ui32BufferCount);
+
+ psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
+ psSwapChain->psBuffer = psBuffer;
+
+ /* link the buffers */
+ for(i=0; i<ui32BufferCount-1; i++)
+ {
+ psBuffer[i].psNext = &psBuffer[i+1];
+ }
+ /* and link last to first */
+ psBuffer[i].psNext = &psBuffer[0];
+
+ /* populate the buffers */
+ for(i=0; i<ui32BufferCount; i++)
+ {
+ psBuffer[i].psSyncData = ppsSyncData[i];
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ psBuffer[i].psSysAddr = psDevInfo->asBackBuffers[i].psSysAddr;
+#else
+ psBuffer[i].sSysAddr = psDevInfo->asBackBuffers[i].sSysAddr;
+#endif
+ psBuffer[i].sDevVAddr = psDevInfo->asBackBuffers[i].sDevVAddr;
+ psBuffer[i].sCPUVAddr = psDevInfo->asBackBuffers[i].sCPUVAddr;
+ psBuffer[i].hSwapChain = (DC_HANDLE)psSwapChain;
+ }
+ }
+ else
+ {
+ psSwapChain->psBuffer = NULL;
+ }
+
+ /* mark swapchain's existence */
+ psDevInfo->psSwapChain = psSwapChain;
+
+ /* return swapchain handle */
+ *phSwapChain = (IMG_HANDLE)psSwapChain;
+
+ /* INTEGRATION_POINT: enable Vsync ISR */
+
+ return (PVRSRV_OK);
+
+ExitError:
+ FreeKernelMem(psSwapChain);
+ return eError;
+}
+
+
+static PVRSRV_ERROR DestroyDCSwapChain(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+ DC_NOHW_SWAPCHAIN *psSwapChain;
+
+ /* check parameters */
+ if(!hDevice
+ || !hSwapChain)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ psDevInfo = (DC_NOHW_DEVINFO*)hDevice;
+ psSwapChain = (DC_NOHW_SWAPCHAIN*)hSwapChain;
+
+ /* free resources */
+ if (psSwapChain->psBuffer)
+ {
+ FreeKernelMem(psSwapChain->psBuffer);
+ }
+ FreeKernelMem(psSwapChain);
+
+ /* mark swapchain as not existing */
+ psDevInfo->psSwapChain = 0;
+
+ /* INTEGRATION_POINT: disable Vsync ISR */
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR SetDCDstRect(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_RECT *psRect)
+{
+ UNREFERENCED_PARAMETER(hDevice);
+ UNREFERENCED_PARAMETER(hSwapChain);
+ UNREFERENCED_PARAMETER(psRect);
+
+ return (PVRSRV_ERROR_NOT_SUPPORTED);
+}
+
+
+static PVRSRV_ERROR SetDCSrcRect(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_RECT *psRect)
+{
+ UNREFERENCED_PARAMETER(hDevice);
+ UNREFERENCED_PARAMETER(hSwapChain);
+ UNREFERENCED_PARAMETER(psRect);
+
+ return (PVRSRV_ERROR_NOT_SUPPORTED);
+}
+
+
+static PVRSRV_ERROR SetDCDstColourKey(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 ui32CKColour)
+{
+ UNREFERENCED_PARAMETER(hDevice);
+ UNREFERENCED_PARAMETER(hSwapChain);
+ UNREFERENCED_PARAMETER(ui32CKColour);
+
+ return (PVRSRV_ERROR_NOT_SUPPORTED);
+}
+
+
+static PVRSRV_ERROR SetDCSrcColourKey(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 ui32CKColour)
+{
+ UNREFERENCED_PARAMETER(hDevice);
+ UNREFERENCED_PARAMETER(hSwapChain);
+ UNREFERENCED_PARAMETER(ui32CKColour);
+
+ return (PVRSRV_ERROR_NOT_SUPPORTED);
+}
+
+
+static PVRSRV_ERROR GetDCBuffers(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 *pui32BufferCount,
+ IMG_HANDLE *phBuffer)
+{
+/* DC_NOHW_DEVINFO *psDevInfo; */
+ DC_NOHW_SWAPCHAIN *psSwapChain;
+ unsigned long i;
+
+ /* check parameters */
+ if(!hDevice
+ || !hSwapChain
+ || !pui32BufferCount
+ || !phBuffer)
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+/* psDevInfo = (DC_NOHW_DEVINFO*)hDevice; */
+ psSwapChain = (DC_NOHW_SWAPCHAIN*)hSwapChain;
+
+ /* return the buffer count */
+ *pui32BufferCount = (IMG_UINT32)psSwapChain->ulBufferCount;
+
+ /* return the buffers */
+ for(i=0; i<psSwapChain->ulBufferCount; i++)
+ {
+ phBuffer[i] = (IMG_HANDLE)&psSwapChain->psBuffer[i];
+ }
+
+ return (PVRSRV_OK);
+}
+
+
+static PVRSRV_ERROR SwapToDCBuffer(IMG_HANDLE hDevice,
+ IMG_HANDLE hBuffer,
+ IMG_UINT32 ui32SwapInterval,
+ IMG_HANDLE hPrivateTag,
+ IMG_UINT32 ui32ClipRectCount,
+ IMG_RECT *psClipRect)
+{
+ UNREFERENCED_PARAMETER(ui32SwapInterval);
+ UNREFERENCED_PARAMETER(hPrivateTag);
+ UNREFERENCED_PARAMETER(psClipRect);
+
+ if(!hDevice
+ || !hBuffer
+ || (ui32ClipRectCount != 0))
+ {
+ return (PVRSRV_ERROR_INVALID_PARAMS);
+ }
+
+ /* nothing to do for no hw */
+ return (PVRSRV_OK);
+}
+
+
+static DC_ERROR Flip(DC_NOHW_DEVINFO *psDevInfo,
+ DC_NOHW_BUFFER *psBuffer)
+{
+ UNREFERENCED_PARAMETER(psBuffer);
+ /* check parameters */
+ if(!psDevInfo)
+ {
+ return (DC_ERROR_INVALID_PARAMS);
+ }
+ /* to be implemented */
+
+ return (DC_OK);
+}
+
+
+static IMG_BOOL ProcessFlip(IMG_HANDLE hCmdCookie,
+ IMG_UINT32 ui32DataSize,
+ IMG_VOID *pvData)
+{
+ DC_ERROR eError;
+ DISPLAYCLASS_FLIP_COMMAND *psFlipCmd;
+ DC_NOHW_DEVINFO *psDevInfo;
+ DC_NOHW_BUFFER *psBuffer;
+
+ UNREFERENCED_PARAMETER(ui32DataSize);
+
+ /* check parameters */
+ if(!hCmdCookie)
+ {
+ return (IMG_FALSE);
+ }
+
+ /* validate data packet */
+ psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND*)pvData;
+ /* Under android, this may be a DISPLAYCLASS_FLIP_COMMAND2, but the structs
+ * are compatible for everything used by dc_nohw so it makes no difference */
+ if (psFlipCmd == IMG_NULL)
+ {
+ return (IMG_FALSE);
+ }
+
+ /* setup some useful pointers */
+ psDevInfo = (DC_NOHW_DEVINFO*)psFlipCmd->hExtDevice;
+
+ psBuffer = (DC_NOHW_BUFFER*)psFlipCmd->hExtBuffer;
+
+ /* flip the display */
+ eError = Flip(psDevInfo, psBuffer);
+ if(eError != DC_OK)
+ {
+ return (IMG_FALSE);
+ }
+
+ /* call command complete Callback */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_FALSE);
+
+ return (IMG_TRUE);
+}
+
+
+DC_ERROR Init(void)
+{
+ DC_NOHW_DEVINFO *psDevInfo;
+ DC_ERROR eError;
+ unsigned long ulBBuf;
+ unsigned long ulNBBuf;
+ /*
+ - connect to services
+ - register with services
+ - allocate and setup private data structure
+ */
+
+
+ /*
+ in kernel driver, data structures must be anchored to something for subsequent retrieval
+ this may be a single global pointer or TLS or something else - up to you
+ call API to retrieve this ptr
+ */
+
+ /*
+ get the anchor pointer
+ */
+ psDevInfo = GetAnchorPtr();
+
+ if (psDevInfo == 0)
+ {
+ PFN_CMD_PROC pfnCmdProcList[DC_NOHW_COMMAND_COUNT];
+ IMG_UINT32 aui32SyncCountList[DC_NOHW_COMMAND_COUNT][2];
+
+ /* allocate device info. structure */
+ psDevInfo = (DC_NOHW_DEVINFO *)AllocKernelMem(sizeof(*psDevInfo));
+
+ if(!psDevInfo)
+ {
+ eError = DC_ERROR_OUT_OF_MEMORY;/* failure */
+ goto ExitError;
+ }
+
+ /* initialise allocation */
+ memset(psDevInfo, 0, sizeof(*psDevInfo));
+
+ /* set the top-level anchor */
+ SetAnchorPtr((void*)psDevInfo);
+
+ /* set ref count */
+ psDevInfo->ulRefCount = 0UL;
+
+ if(OpenPVRServices(&psDevInfo->hPVRServices) != DC_OK)
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitFreeDevInfo;
+ }
+ if(GetLibFuncAddr (psDevInfo->hPVRServices, "PVRGetDisplayClassJTable", &pfnGetPVRJTable) != DC_OK)
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitCloseServices;
+ }
+
+ /* got the kernel services function table */
+ if((*pfnGetPVRJTable)(&psDevInfo->sPVRJTable) == IMG_FALSE)
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitCloseServices;
+ }
+
+ /*
+ Setup the devinfo
+ */
+ psDevInfo->psSwapChain = 0;
+ psDevInfo->sDisplayInfo.ui32MinSwapInterval = 0UL;
+ psDevInfo->sDisplayInfo.ui32MaxSwapInterval = 1UL;
+ psDevInfo->sDisplayInfo.ui32MaxSwapChains = 1UL;
+ psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = DC_NOHW_MAX_BACKBUFFERS;
+ strncpy(psDevInfo->sDisplayInfo.szDisplayName, DISPLAY_DEVICE_NAME, MAX_DISPLAY_NAME_SIZE);
+
+ psDevInfo->ulNumFormats = 1UL;
+
+ psDevInfo->ulNumDims = 1UL;
+
+#if defined(DC_NOHW_GET_BUFFER_DIMENSIONS)
+ if (!GetBufferDimensions(&psDevInfo->asDisplayDimList[0].ui32Width,
+ &psDevInfo->asDisplayDimList[0].ui32Height,
+ &psDevInfo->asDisplayFormatList[0].pixelformat,
+ &psDevInfo->asDisplayDimList[0].ui32ByteStride))
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitCloseServices;
+ }
+#else /* defined(DC_NOHW_GET_BUFFER_DIMENSIONS) */
+ #if defined (ENABLE_DISPLAY_MODE_TRACKING)
+ // Set sizes to zero to force re-alloc on display mode change.
+ psDevInfo->asDisplayFormatList[0].pixelformat = DC_NOHW_BUFFER_PIXEL_FORMAT;
+ psDevInfo->asDisplayDimList[0].ui32Width = 0;
+ psDevInfo->asDisplayDimList[0].ui32Height = 0;
+ psDevInfo->asDisplayDimList[0].ui32ByteStride = 0;
+ #else
+ psDevInfo->asDisplayFormatList[0].pixelformat = DC_NOHW_BUFFER_PIXEL_FORMAT;
+ psDevInfo->asDisplayDimList[0].ui32Width = DC_NOHW_BUFFER_WIDTH;
+ psDevInfo->asDisplayDimList[0].ui32Height = DC_NOHW_BUFFER_HEIGHT;
+ psDevInfo->asDisplayDimList[0].ui32ByteStride = DC_NOHW_BUFFER_BYTE_STRIDE;
+ #endif
+#endif /* defined(DC_NOHW_GET_BUFFER_DIMENSIONS) */
+
+ psDevInfo->sSysFormat = psDevInfo->asDisplayFormatList[0];
+ psDevInfo->sSysDims.ui32Width = psDevInfo->asDisplayDimList[0].ui32Width;
+ psDevInfo->sSysDims.ui32Height = psDevInfo->asDisplayDimList[0].ui32Height;
+ psDevInfo->sSysDims.ui32ByteStride = psDevInfo->asDisplayDimList[0].ui32ByteStride;
+ psDevInfo->ui32BufferSize = psDevInfo->sSysDims.ui32Height * psDevInfo->sSysDims.ui32ByteStride;
+
+
+ /* setup swapchain details */
+ for(ulBBuf=0; ulBBuf<DC_NOHW_MAX_BACKBUFFERS; ulBBuf++)
+ {
+#if defined(USE_BASE_VIDEO_FRAMEBUFFER) || defined (ENABLE_DISPLAY_MODE_TRACKING)
+ psDevInfo->asBackBuffers[ulBBuf].sSysAddr.uiAddr = IMG_NULL;
+ psDevInfo->asBackBuffers[ulBBuf].sCPUVAddr = IMG_NULL;
+#else
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ if (AllocDiscontigMemory(psDevInfo->ui32BufferSize,
+ &psDevInfo->asBackBuffers[ulBBuf].hMemChunk,
+ &psDevInfo->asBackBuffers[ulBBuf].sCPUVAddr,
+ &psDevInfo->asBackBuffers[ulBBuf].psSysAddr) != DC_OK)
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitFreeMem;
+ }
+#else
+ IMG_CPU_PHYADDR sBufferCPUPAddr;
+
+ if (AllocContigMemory(psDevInfo->ui32BufferSize,
+ &psDevInfo->asBackBuffers[ulBBuf].hMemChunk,
+ &psDevInfo->asBackBuffers[ulBBuf].sCPUVAddr,
+ &sBufferCPUPAddr) != DC_OK)
+ {
+ eError = DC_ERROR_INIT_FAILURE;
+ goto ExitFreeMem;
+ }
+
+ psDevInfo->asBackBuffers[ulBBuf].sSysAddr = CpuPAddrToSysPAddr(sBufferCPUPAddr);
+#endif
+#endif /* #if defined(USE_BASE_VIDEO_FRAMEBUFFER) */
+ /* sDevVAddr not meaningful for nohw */
+ psDevInfo->asBackBuffers[ulBBuf].sDevVAddr.uiAddr = 0UL;
+ psDevInfo->asBackBuffers[ulBBuf].hSwapChain = 0;
+ psDevInfo->asBackBuffers[ulBBuf].psSyncData = 0;
+ psDevInfo->asBackBuffers[ulBBuf].psNext = 0;
+ }
+
+ /*
+ setup the DC Jtable so SRVKM can call into this driver
+ */
+ psDevInfo->sDCJTable.ui32TableSize = sizeof(PVRSRV_DC_SRV2DISP_KMJTABLE);
+ psDevInfo->sDCJTable.pfnOpenDCDevice = OpenDCDevice;
+ psDevInfo->sDCJTable.pfnCloseDCDevice = CloseDCDevice;
+ psDevInfo->sDCJTable.pfnEnumDCFormats = EnumDCFormats;
+ psDevInfo->sDCJTable.pfnEnumDCDims = EnumDCDims;
+ psDevInfo->sDCJTable.pfnGetDCSystemBuffer = GetDCSystemBuffer;
+ psDevInfo->sDCJTable.pfnGetDCInfo = GetDCInfo;
+ psDevInfo->sDCJTable.pfnGetBufferAddr = GetDCBufferAddr;
+ psDevInfo->sDCJTable.pfnCreateDCSwapChain = CreateDCSwapChain;
+ psDevInfo->sDCJTable.pfnDestroyDCSwapChain = DestroyDCSwapChain;
+ psDevInfo->sDCJTable.pfnSetDCDstRect = SetDCDstRect;
+ psDevInfo->sDCJTable.pfnSetDCSrcRect = SetDCSrcRect;
+ psDevInfo->sDCJTable.pfnSetDCDstColourKey = SetDCDstColourKey;
+ psDevInfo->sDCJTable.pfnSetDCSrcColourKey = SetDCSrcColourKey;
+ psDevInfo->sDCJTable.pfnGetDCBuffers = GetDCBuffers;
+ psDevInfo->sDCJTable.pfnSwapToDCBuffer = SwapToDCBuffer;
+ psDevInfo->sDCJTable.pfnSetDCState = IMG_NULL;
+
+ /* register device with services and retrieve device index */
+ if(psDevInfo->sPVRJTable.pfnPVRSRVRegisterDCDevice (&psDevInfo->sDCJTable,
+ &psDevInfo->uiDeviceID ) != PVRSRV_OK)
+ {
+ eError = DC_ERROR_DEVICE_REGISTER_FAILED;
+ goto ExitFreeMem;
+ }
+
+ /*
+ setup private command processing function table
+ */
+ pfnCmdProcList[DC_FLIP_COMMAND] = ProcessFlip;
+
+ /*
+ and associated sync count(s)
+ */
+ aui32SyncCountList[DC_FLIP_COMMAND][0] = 0UL;/* no writes */
+ aui32SyncCountList[DC_FLIP_COMMAND][1] = 2UL;/* 2 reads: To / From */
+
+ /*
+ register private command processing functions with
+ the Command Queue Manager and setup the general
+ command complete function in the devinfo
+ */
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRegisterCmdProcList(psDevInfo->uiDeviceID,
+ &pfnCmdProcList[0],
+ aui32SyncCountList,
+ DC_NOHW_COMMAND_COUNT) != PVRSRV_OK)
+ {
+ eError = DC_ERROR_CANT_REGISTER_CALLBACK;
+ goto ExitRemoveDevice;
+ }
+ }
+
+ /* increment the ref count */
+ psDevInfo->ulRefCount++;
+
+ /* return success */
+ return (DC_OK);
+
+ExitRemoveDevice:
+ (IMG_VOID) psDevInfo->sPVRJTable.pfnPVRSRVRemoveDCDevice(psDevInfo->uiDeviceID);
+
+ExitFreeMem:
+ ulNBBuf = ulBBuf;
+ for(ulBBuf=0; ulBBuf<ulNBBuf; ulBBuf++)
+ {
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ FreeDiscontigMemory(psDevInfo->ui32BufferSize,
+ psDevInfo->asBackBuffers[ulBBuf].hMemChunk,
+ psDevInfo->asBackBuffers[ulBBuf].sCPUVAddr,
+ psDevInfo->asBackBuffers[ulBBuf].psSysAddr);
+#else
+#if !defined(USE_BASE_VIDEO_FRAMEBUFFER)
+
+ FreeContigMemory(psDevInfo->ui32BufferSize,
+ psDevInfo->asBackBuffers[ulBBuf].hMemChunk,
+ psDevInfo->asBackBuffers[ulBBuf].sCPUVAddr,
+ SysPAddrToCpuPAddr(psDevInfo->asBackBuffers[ulBBuf].sSysAddr));
+
+
+#endif /* #if defined(USE_BASE_VIDEO_FRAMEBUFFER) */
+#endif /* #if defined(DC_NOHW_DISCONTIG_BUFFERS) */
+ }
+
+ExitCloseServices:
+ (void)ClosePVRServices(psDevInfo->hPVRServices);
+
+ExitFreeDevInfo:
+ FreeKernelMem(psDevInfo);
+ SetAnchorPtr(0);
+
+ExitError:
+ return eError;
+}
+
+
+
+/*
+ * Deinit
+ */
+DC_ERROR Deinit(void)
+{
+ DC_NOHW_DEVINFO *psDevInfo, *psDevFirst;
+#if !defined(USE_BASE_VIDEO_FRAMEBUFFER)
+ unsigned long i;
+#endif
+
+ psDevFirst = GetAnchorPtr();
+ psDevInfo = psDevFirst;
+
+ /* check DevInfo has been setup */
+ if (psDevInfo == 0)
+ {
+ return (DC_ERROR_GENERIC);/* failure */
+ }
+
+ /* decrement ref count */
+ psDevInfo->ulRefCount--;
+
+ if (psDevInfo->ulRefCount == 0UL)
+ {
+ /* all references gone - de-init device information */
+ PVRSRV_DC_DISP2SRV_KMJTABLE *psJTable = &psDevInfo->sPVRJTable;
+
+ /* Remove display class device from kernel services device register */
+ if (psJTable->pfnPVRSRVRemoveDCDevice((IMG_UINT32)psDevInfo->uiDeviceID) != PVRSRV_OK)
+ {
+ return (DC_ERROR_GENERIC);/* failure */
+ }
+
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRemoveCmdProcList(psDevInfo->uiDeviceID,
+ DC_NOHW_COMMAND_COUNT) != PVRSRV_OK)
+ {
+ return (DC_ERROR_GENERIC);/* failure */
+ }
+
+ if (ClosePVRServices(psDevInfo->hPVRServices) != DC_OK)
+ {
+ psDevInfo->hPVRServices = 0;
+ return (DC_ERROR_GENERIC);/* failure */
+ }
+
+#if !defined(USE_BASE_VIDEO_FRAMEBUFFER)
+ for(i=0; i<DC_NOHW_MAX_BACKBUFFERS; i++)
+ {
+ if (psDevInfo->asBackBuffers[i].sCPUVAddr)
+ {
+ #if defined(DC_NOHW_DISCONTIG_BUFFERS)
+ FreeDiscontigMemory(psDevInfo->ui32BufferSize,
+ psDevInfo->asBackBuffers[i].hMemChunk,
+ psDevInfo->asBackBuffers[i].sCPUVAddr,
+ psDevInfo->asBackBuffers[i].psSysAddr);
+ #else
+
+ FreeContigMemory(psDevInfo->ui32BufferSize,
+ psDevInfo->asBackBuffers[i].hMemChunk,
+ psDevInfo->asBackBuffers[i].sCPUVAddr,
+ SysPAddrToCpuPAddr(psDevInfo->asBackBuffers[i].sSysAddr));
+ #endif
+ }
+ }
+#endif /* #if !defined(USE_BASE_VIDEO_FRAMEBUFFER) */
+
+ /* de-allocate data structure */
+ FreeKernelMem(psDevInfo);
+ }
+
+#if defined (ENABLE_DISPLAY_MODE_TRACKING)
+ CloseMiniport();
+#endif
+ /* clear the top-level anchor */
+ SetAnchorPtr(0);
+
+ /* return success */
+ return (DC_OK);
+}
+
+/******************************************************************************
+ End of file (dc_nohw_displayclass.c)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_linux.c b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_linux.c
new file mode 100644
index 0000000..2f603ea
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_nohw/dc_nohw_linux.c
@@ -0,0 +1,376 @@
+/*************************************************************************/ /*!
+@Title Dummy 3rd party driver linux specific declarations.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/**************************************************************************
+ The 3rd party driver is a specification of an API to integrate the
+ IMG PowerVR Services driver with 3rd Party display hardware.
+ It is NOT a specification for a display controller driver, rather a
+ specification to extend the API for a pre-existing driver for the display hardware.
+
+ The 3rd party driver interface provides IMG PowerVR client drivers (e.g. PVR2D)
+ with an API abstraction of the system's underlying display hardware, allowing
+ the client drivers to indirectly control the display hardware and access its
+ associated memory.
+
+ Functions of the API include
+
+ - query primary surface attributes (width, height, stride, pixel format,
+ CPU physical and virtual address)
+ - swap/flip chain creation and subsequent query of surface attributes
+ - asynchronous display surface flipping, taking account of asynchronous
+ read (flip) and write (render) operations to the display surface
+
+ Note: having queried surface attributes the client drivers are able to map
+ the display memory to any IMG PowerVR Services device by calling
+ PVRSRVMapDeviceClassMemory with the display surface handle.
+
+ This code is intended to be an example of how a pre-existing display driver
+ may be extended to support the 3rd Party Display interface to
+ PowerVR Services - IMG is not providing a display driver implementation
+ **************************************************************************/
+
+#include <linux/version.h>
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
+#ifndef AUTOCONF_INCLUDED
+#include <linux/config.h>
+#endif
+#endif
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+
+#if defined(SUPPORT_DRI_DRM)
+#include <drm/drmP.h>
+#endif
+
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+#include <linux/vmalloc.h>
+#include <asm/page.h>
+#else
+#include <asm/dma-mapping.h>
+#endif
+
+#include "img_defs.h"
+#include "servicesext.h"
+#include "kerneldisplay.h"
+#include "dc_nohw.h"
+#include "pvrmodule.h"
+
+#if defined(SUPPORT_DRI_DRM)
+#include "pvr_drm.h"
+#endif
+
+#if defined(DC_USE_SET_MEMORY)
+ #undef DC_USE_SET_MEMORY
+#endif
+
+#if !defined(DC_NOHW_DISCONTIG_BUFFERS)
+ #if defined(__i386__) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) && defined(SUPPORT_LINUX_X86_PAT) && defined(SUPPORT_LINUX_X86_WRITECOMBINE)
+ #include <asm/cacheflush.h>
+ #define DC_USE_SET_MEMORY
+ #endif
+#endif /* defined(DC_NOHW_DISCONTIG_BUFFERS) */
+
+#define DRVNAME "dcnohw"
+
+#if !defined(SUPPORT_DRI_DRM)
+MODULE_SUPPORTED_DEVICE(DRVNAME);
+#endif
+
+#define unref__ __attribute__ ((unused))
+
+#if defined(DC_NOHW_GET_BUFFER_DIMENSIONS)
+static unsigned long width = DC_NOHW_BUFFER_WIDTH;
+static unsigned long height = DC_NOHW_BUFFER_HEIGHT;
+static unsigned long depth = DC_NOHW_BUFFER_BIT_DEPTH;
+
+module_param(width, ulong, S_IRUGO);
+module_param(height, ulong, S_IRUGO);
+module_param(depth, ulong, S_IRUGO);
+
+IMG_BOOL GetBufferDimensions(IMG_UINT32 *pui32Width, IMG_UINT32 *pui32Height, PVRSRV_PIXEL_FORMAT *pePixelFormat, IMG_UINT32 *pui32Stride)
+{
+ if (width == 0 || height == 0 || depth == 0 ||
+ depth != dc_nohw_roundup_bit_depth(depth))
+ {
+ printk(KERN_WARNING DRVNAME ": Illegal module parameters (width %lu, height %lu, depth %lu)\n", width, height, depth);
+ return IMG_FALSE;
+ }
+
+ *pui32Width = (IMG_UINT32)width;
+ *pui32Height = (IMG_UINT32)height;
+
+ switch(depth)
+ {
+ case 32:
+ *pePixelFormat = PVRSRV_PIXEL_FORMAT_ARGB8888;
+ break;
+ case 16:
+ *pePixelFormat = PVRSRV_PIXEL_FORMAT_RGB565;
+ break;
+ default:
+ printk(KERN_WARNING DRVNAME ": Display depth %lu not supported\n", depth);
+ *pePixelFormat = PVRSRV_PIXEL_FORMAT_UNKNOWN;
+ return IMG_FALSE;
+ }
+
+ *pui32Stride = dc_nohw_byte_stride(width, depth);
+
+#if defined(DEBUG)
+ printk(KERN_INFO DRVNAME " Width: %lu\n", (unsigned long)*pui32Width);
+ printk(KERN_INFO DRVNAME " Height: %lu\n", (unsigned long)*pui32Height);
+ printk(KERN_INFO DRVNAME " Depth: %lu bits\n", depth);
+ printk(KERN_INFO DRVNAME " Stride: %lu bytes\n", (unsigned long)*pui32Stride);
+#endif /* defined(DEBUG) */
+
+ return IMG_TRUE;
+}
+#endif /* defined(DC_NOHW_GET_BUFFER_DIMENSIONS) */
+
+/*****************************************************************************
+ Function Name: DC_NOHW_Init
+ Description : Insert the driver into the kernel.
+
+ __init places the function in a special memory section that
+ the kernel frees once the function has been run. Refer also
+ to module_init() macro call below.
+
+*****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Init)(struct drm_device unref__ *dev)
+#else
+static int __init DC_NOHW_Init(void)
+#endif
+{
+ if(Init() != DC_OK)
+ {
+ return -ENODEV;
+ }
+
+ return 0;
+} /*DC_NOHW_Init*/
+
+/*****************************************************************************
+ Function Name: DC_NOHW_Cleanup
+ Description : Remove the driver from the kernel.
+
+ __exit places the function in a special memory section that
+ the kernel frees once the function has been run. Refer also
+ to module_exit() macro call below.
+
+*****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+void PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Cleanup)(struct drm_device unref__ *dev)
+#else
+static void __exit DC_NOHW_Cleanup(void)
+#endif
+{
+ if(Deinit() != DC_OK)
+ {
+ printk (KERN_INFO DRVNAME ": DC_NOHW_Cleanup: can't deinit device\n");
+ }
+} /*DC_NOHW_Cleanup*/
+
+
+void *AllocKernelMem(unsigned long ulSize)
+{
+ return kmalloc(ulSize, GFP_KERNEL);
+}
+
+void FreeKernelMem(void *pvMem)
+{
+ kfree(pvMem);
+}
+
+#if defined(DC_NOHW_DISCONTIG_BUFFERS)
+
+#define RANGE_TO_PAGES(range) (((range) + (PAGE_SIZE - 1)) >> PAGE_SHIFT)
+#define VMALLOC_TO_PAGE_PHYS(vAddr) page_to_phys(vmalloc_to_page(vAddr))
+
+DC_ERROR AllocDiscontigMemory(unsigned long ulSize,
+ DC_HANDLE unref__ *phMemHandle,
+ IMG_CPU_VIRTADDR *pLinAddr,
+ IMG_SYS_PHYADDR **ppPhysAddr)
+{
+ unsigned long ulPages = RANGE_TO_PAGES(ulSize);
+ IMG_SYS_PHYADDR *pPhysAddr;
+ unsigned long ulPage;
+ IMG_CPU_VIRTADDR LinAddr;
+
+ LinAddr = __vmalloc(ulSize, GFP_KERNEL | __GFP_HIGHMEM, pgprot_noncached(PAGE_KERNEL));
+ if (!LinAddr)
+ {
+ return DC_ERROR_OUT_OF_MEMORY;
+ }
+
+ pPhysAddr = kmalloc(ulPages * sizeof(IMG_SYS_PHYADDR), GFP_KERNEL);
+ if (!pPhysAddr)
+ {
+ vfree(LinAddr);
+ return DC_ERROR_OUT_OF_MEMORY;
+ }
+
+ *pLinAddr = LinAddr;
+
+ for (ulPage = 0; ulPage < ulPages; ulPage++)
+ {
+ pPhysAddr[ulPage].uiAddr = VMALLOC_TO_PAGE_PHYS(LinAddr);
+
+ LinAddr += PAGE_SIZE;
+ }
+
+ *ppPhysAddr = pPhysAddr;
+
+ return DC_OK;
+}
+
+void FreeDiscontigMemory(unsigned long ulSize,
+ DC_HANDLE unref__ hMemHandle,
+ IMG_CPU_VIRTADDR LinAddr,
+ IMG_SYS_PHYADDR *pPhysAddr)
+{
+ kfree(pPhysAddr);
+
+ vfree(LinAddr);
+}
+#else /* defined(DC_NOHW_DISCONTIG_BUFFERS) */
+DC_ERROR AllocContigMemory(unsigned long ulSize,
+ DC_HANDLE unref__ *phMemHandle,
+ IMG_CPU_VIRTADDR *pLinAddr,
+ IMG_CPU_PHYADDR *pPhysAddr)
+{
+#if defined(DC_USE_SET_MEMORY)
+ void *pvLinAddr;
+ unsigned long ulAlignedSize = PAGE_ALIGN(ulSize);
+ int iPages = (int)(ulAlignedSize >> PAGE_SHIFT);
+ int iError;
+
+ pvLinAddr = kmalloc(ulAlignedSize, GFP_KERNEL);
+ iError = set_memory_wc((unsigned long)pvLinAddr, iPages);
+ if (iError != 0)
+ {
+ printk(KERN_ERR DRVNAME ": AllocContigMemory: set_memory_wc failed (%d)\n", iError);
+
+ return DC_ERROR_OUT_OF_MEMORY;
+ }
+
+ pPhysAddr->uiAddr = virt_to_phys(pvLinAddr);
+ *pLinAddr = pvLinAddr;
+
+ return DC_OK;
+#else /* DC_USE_SET_MEMORY */
+ dma_addr_t dma;
+ IMG_VOID *pvLinAddr;
+
+ pvLinAddr = dma_alloc_coherent(NULL, ulSize, &dma, GFP_KERNEL);
+
+ if (pvLinAddr == NULL)
+ {
+ return DC_ERROR_OUT_OF_MEMORY;
+ }
+
+ pPhysAddr->uiAddr = dma;
+ *pLinAddr = pvLinAddr;
+
+ return DC_OK;
+#endif /* DC_USE_SET_MEMORY */
+}
+
+void FreeContigMemory(unsigned long ulSize,
+ DC_HANDLE unref__ hMemHandle,
+ IMG_CPU_VIRTADDR LinAddr,
+ IMG_CPU_PHYADDR PhysAddr)
+{
+#if defined(DC_USE_SET_MEMORY)
+ unsigned long ulAlignedSize = PAGE_ALIGN(ulSize);
+ int iError;
+ int iPages = (int)(ulAlignedSize >> PAGE_SHIFT);
+
+ iError = set_memory_wb((unsigned long)LinAddr, iPages);
+ if (iError != 0)
+ {
+ printk(KERN_ERR DRVNAME ": FreeContigMemory: set_memory_wb failed (%d)\n", iError);
+ }
+ kfree(LinAddr);
+#else /* DC_USE_SET_MEMORY */
+ dma_free_coherent(NULL, ulSize, LinAddr, (dma_addr_t)PhysAddr.uiAddr);
+#endif /* DC_USE_SET_MEMORY */
+}
+#endif /* defined(DC_NOHW_DISCONTIG_BUFFERS) */
+
+DC_ERROR OpenPVRServices (DC_HANDLE *phPVRServices)
+{
+ /* Nothing to do - we have already checked services module insertion */
+ *phPVRServices = 0;
+ return DC_OK;
+}
+
+DC_ERROR ClosePVRServices (DC_HANDLE unref__ hPVRServices)
+{
+ /* Nothing to do */
+ return DC_OK;
+}
+
+DC_ERROR GetLibFuncAddr (DC_HANDLE unref__ hExtDrv, char *szFunctionName, PFN_DC_GET_PVRJTABLE *ppfnFuncTable)
+{
+ if(strcmp("PVRGetDisplayClassJTable", szFunctionName) != 0)
+ {
+ return DC_ERROR_INVALID_PARAMS;
+ }
+
+ /* Nothing to do - should be exported from pvrsrv.ko */
+ *ppfnFuncTable = PVRGetDisplayClassJTable;
+
+ return DC_OK;
+}
+
+#if !defined(SUPPORT_DRI_DRM)
+/*
+ These macro calls define the initialisation and removal functions of the
+ driver. Although they are prefixed `module_', they apply when compiling
+ statically as well; in both cases they define the function the kernel will
+ run to start/stop the driver.
+*/
+module_init(DC_NOHW_Init);
+module_exit(DC_NOHW_Cleanup);
+#endif
diff --git a/services4/3rdparty/dc_omapfb3_linux/3rdparty_dc_drm_shared.h b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/3rdparty_dc_drm_shared.h
index b522c41..dc327e3 100644
--- a/services4/3rdparty/dc_omapfb3_linux/3rdparty_dc_drm_shared.h
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/3rdparty_dc_drm_shared.h
@@ -44,6 +44,12 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define __3RDPARTY_DC_DRM_SHARED_H__
#if defined(SUPPORT_DRI_DRM)
+typedef struct drm_pvr_display_cmd_tag
+{
+ uint32_t cmd;
+ uint32_t dev;
+} drm_pvr_display_cmd;
+
#define PVR_DRM_DISP_CMD_ENTER_VT 1
#define PVR_DRM_DISP_CMD_LEAVE_VT 2
@@ -52,10 +58,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PVR_DRM_DISP_CMD_SUSPEND 5
#define PVR_DRM_DISP_CMD_OFF 6
-#define PVR_DRM_DISP_ARG_CMD 0
-#define PVR_DRM_DISP_ARG_DEV 1
-#define PVR_DRM_DISP_NUM_ARGS 2
-
#endif /* defined(SUPPORT_DRI_DRM) */
#endif /* __3RDPARTY_DC_DRM_SHARED_H__ */
diff --git a/services4/3rdparty/dc_omapfb3_linux/Kbuild.mk b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/Kbuild.mk
index 7f4fd99..d442f79 100644
--- a/services4/3rdparty/dc_omapfb3_linux/Kbuild.mk
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/Kbuild.mk
@@ -40,8 +40,8 @@
ccflags-y += \
-I$(TOP)/services4/3rdparty/dc_omapfb3_linux \
- -I$(KERNELDIR)/drivers/video/omap2 \
- -I$(KERNELDIR)/arch/arm/plat-omap/include
+ -Idrivers/video/omap2 \
+ -Iarch/arm/plat-omap/include
omaplfb-y += \
services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.o \
diff --git a/services4/3rdparty/dc_omapfb3_linux/Linux.mk b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/Linux.mk
index 75d11a9..75d11a9 100644
--- a/services4/3rdparty/dc_omapfb3_linux/Linux.mk
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/Linux.mk
diff --git a/services4/3rdparty/dc_omapfb3_linux/omaplfb.h b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb.h
index 804695b..5ef5215 100644
--- a/services4/3rdparty/dc_omapfb3_linux/omaplfb.h
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb.h
@@ -65,6 +65,11 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define OMAPLFB_CONSOLE_UNLOCK() release_console_sem()
#endif
+#if defined(CONFIG_ION_OMAP)
+#include <linux/ion.h>
+#include <linux/omap_ion.h>
+#endif /* defined(CONFIG_ION_OMAP) */
+
#define unref__ __attribute__ ((unused))
typedef void * OMAPLFB_HANDLE;
@@ -226,6 +231,10 @@ typedef struct OMAPLFB_DEVINFO_TAG
OMAPLFB_ATOMIC_BOOL sLeaveVT;
#endif
+#if defined(CONFIG_ION_OMAP)
+ struct ion_client *psIONClient;
+#endif
+
} OMAPLFB_DEVINFO;
#define OMAPLFB_PAGE_SIZE 4096
@@ -265,7 +274,8 @@ typedef enum _OMAPLFB_UPDATE_MODE_
OMAPLFB_UPDATE_MODE_UNDEFINED = 0,
OMAPLFB_UPDATE_MODE_MANUAL = 1,
OMAPLFB_UPDATE_MODE_AUTO = 2,
- OMAPLFB_UPDATE_MODE_DISABLED = 3
+ OMAPLFB_UPDATE_MODE_DISABLED = 3,
+ OMAPLFB_UPDATE_MODE_VSYNC = 4
} OMAPLFB_UPDATE_MODE;
#ifndef UNREFERENCED_PARAMETER
diff --git a/services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.c b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.c
index ebca814..be168c3 100644
--- a/services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.c
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb_displayclass.c
@@ -87,20 +87,22 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "omaplfb.h"
#if defined(CONFIG_DSSCOMP)
-
-#if !defined(CONFIG_ION_OMAP)
+#if defined(CONFIG_ION_OMAP)
+extern struct ion_device *omap_ion_device;
+#else /* defined(CONFIG_ION_OMAP) */
#error CONFIG_DSSCOMP support requires CONFIG_ION_OMAP
-#endif
-
-#include <linux/ion.h>
-#include <linux/omap_ion.h>
-
-extern struct ion_client *gpsIONClient;
-
+#endif /* defined(CONFIG_ION_OMAP) */
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
-
#endif /* defined(CONFIG_DSSCOMP) */
#define OMAPLFB_COMMAND_COUNT 1
@@ -117,6 +119,7 @@ static OMAPLFB_DEVINFO *gapsDevInfo[OMAPLFB_MAX_NUM_DEVICES];
/* Top level 'hook ptr' */
static PFN_DC_GET_PVRJTABLE gpfnGetPVRJTable = NULL;
+#if !defined(CONFIG_DSSCOMP)
/* Round x up to a multiple of y */
static inline unsigned long RoundUpToMultiple(unsigned long x, unsigned long y)
{
@@ -146,6 +149,7 @@ static unsigned long LCM(unsigned long x, unsigned long y)
return (gcd == 0) ? 0 : ((x / gcd) * y);
}
+#endif
unsigned OMAPLFBMaxFBDevIDPlusOne(void)
{
@@ -210,14 +214,17 @@ static IMG_VOID SetDCState(IMG_HANDLE hDevice, IMG_UINT32 ui32State)
switch (ui32State)
{
case DC_STATE_FLUSH_COMMANDS:
+ /* Flush out any 'real' operation waiting for another flip.
+ * In flush state we won't pass any 'real' operations along
+ * to dsscomp_gralloc_queue(); we'll just CmdComplete them
+ * immediately.
+ */
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
OMAPLFBAtomicBoolSet(&psDevInfo->sFlushCommands, OMAPLFB_TRUE);
break;
case DC_STATE_NO_FLUSH_COMMANDS:
OMAPLFBAtomicBoolSet(&psDevInfo->sFlushCommands, OMAPLFB_FALSE);
break;
- case DC_STATE_FORCE_SWAP_TO_SYSTEM:
- OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
- break;
default:
break;
}
@@ -233,9 +240,16 @@ static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 uiPVRDevID,
{
OMAPLFB_DEVINFO *psDevInfo;
OMAPLFB_ERROR eError;
- unsigned uiMaxFBDevIDPlusOne = OMAPLFBMaxFBDevIDPlusOne();
+ unsigned uiMaxFBDevIDPlusOne;
unsigned i;
+ if (!try_module_get(THIS_MODULE))
+ {
+ return PVRSRV_ERROR_UNABLE_TO_OPEN_DC_DEVICE;
+ }
+
+ uiMaxFBDevIDPlusOne = OMAPLFBMaxFBDevIDPlusOne();
+
for (i = 0; i < uiMaxFBDevIDPlusOne; i++)
{
psDevInfo = OMAPLFBGetDevInfoPtr(i);
@@ -248,7 +262,8 @@ static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 uiPVRDevID,
{
DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX
": %s: PVR Device %u not found\n", __FUNCTION__, uiPVRDevID));
- return PVRSRV_ERROR_INVALID_DEVICE;
+ eError = PVRSRV_ERROR_INVALID_DEVICE;
+ goto ErrorModulePut;
}
/* store the system surface sync data */
@@ -259,13 +274,19 @@ static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 uiPVRDevID,
{
DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX
": %s: Device %u: OMAPLFBUnblankDisplay failed (%d)\n", __FUNCTION__, psDevInfo->uiFBDevID, eError));
- return PVRSRV_ERROR_UNBLANK_DISPLAY_FAILED;
+ eError = PVRSRV_ERROR_UNBLANK_DISPLAY_FAILED;
+ goto ErrorModulePut;
}
/* return handle to the devinfo */
*phDevice = (IMG_HANDLE)psDevInfo;
return PVRSRV_OK;
+
+ErrorModulePut:
+ module_put(THIS_MODULE);
+
+ return eError;
}
/*
@@ -282,6 +303,8 @@ static PVRSRV_ERROR CloseDCDevice(IMG_HANDLE hDevice)
#else
UNREFERENCED_PARAMETER(hDevice);
#endif
+ module_put(THIS_MODULE);
+
return PVRSRV_OK;
}
@@ -477,15 +500,14 @@ static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
IMG_HANDLE *phSwapChain,
IMG_UINT32 *pui32SwapChainID)
{
- OMAPLFB_DEVINFO *psDevInfo;
OMAPLFB_SWAPCHAIN *psSwapChain;
- OMAPLFB_BUFFER *psBuffer;
- IMG_UINT32 i;
+ OMAPLFB_DEVINFO *psDevInfo;
PVRSRV_ERROR eError;
- IMG_UINT32 ui32BuffersToSkip;
+ IMG_UINT32 i;
UNREFERENCED_PARAMETER(ui32OEMFlags);
-
+ UNREFERENCED_PARAMETER(ui32Flags);
+
/* Check parameters */
if(!hDevice
|| !psDstSurfAttrib
@@ -512,60 +534,7 @@ static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
eError = PVRSRV_ERROR_FLIP_CHAIN_EXISTS;
goto ExitUnLock;
}
-
- /* Check the buffer count */
- if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
-
- if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
- {
- eError = PVRSRV_ERROR_TOOMANYBUFFERS;
- goto ExitUnLock;
- }
- /*
- * We will allocate the swap chain buffers at the back of the frame
- * buffer area. This preserves the front portion, which may be being
- * used by other Linux Framebuffer based applications.
- */
- ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
-
- /*
- * Verify the DST/SRC attributes,
- * SRC/DST must match the current display mode config
- */
- if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
- {
- /* DST doesn't match the current mode */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
-
- if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
- || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
- || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
- || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
- {
- /* DST doesn't match the SRC */
- eError = PVRSRV_ERROR_INVALID_PARAMS;
- goto ExitUnLock;
- }
-
- /* check flags if implementation requires them */
- UNREFERENCED_PARAMETER(ui32Flags);
-
-#if defined(PVR_OMAPFB3_UPDATE_MODE)
- if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
- {
- printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
- }
-#endif
/* create a swapchain structure */
psSwapChain = (OMAPLFB_SWAPCHAIN*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_SWAPCHAIN));
if(!psSwapChain)
@@ -574,57 +543,122 @@ static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
goto ExitUnLock;
}
- psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
- if(!psBuffer)
+ /* If services asks for a 0-length swap chain, it's probably Android.
+ *
+ * This will use only non-display memory posting via PVRSRVSwapToDCBuffers2(),
+ * and we can skip some useless sanity checking.
+ */
+ if(ui32BufferCount > 0)
{
- eError = PVRSRV_ERROR_OUT_OF_MEMORY;
- goto ErrorFreeSwapChain;
- }
+ IMG_UINT32 ui32BuffersToSkip;
- psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
- psSwapChain->psBuffer = psBuffer;
- psSwapChain->bNotVSynced = OMAPLFB_TRUE;
- psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
+ /* Check the buffer count */
+ if(ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
+
+ if ((psDevInfo->sFBInfo.ulRoundedBufferSize * (unsigned long)ui32BufferCount) > psDevInfo->sFBInfo.ulFBSize)
+ {
+ eError = PVRSRV_ERROR_TOOMANYBUFFERS;
+ goto ErrorFreeSwapChain;
+ }
- /* Link the buffers */
- for(i=0; i<ui32BufferCount-1; i++)
- {
- psBuffer[i].psNext = &psBuffer[i+1];
- }
- /* and link last to first */
- psBuffer[i].psNext = &psBuffer[0];
+ /*
+ * We will allocate the swap chain buffers at the back of the frame
+ * buffer area. This preserves the front portion, which may be being
+ * used by other Linux Framebuffer based applications.
+ */
+ ui32BuffersToSkip = psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers - ui32BufferCount;
- /* Configure the swapchain buffers */
- for(i=0; i<ui32BufferCount; i++)
- {
- IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
- IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+ /*
+ * Verify the DST/SRC attributes,
+ * SRC/DST must match the current display mode config
+ */
+ if(psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDim.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDim.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDim.ui32Height)
+ {
+ /* DST doesn't match the current mode */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
+ }
-#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
+ if(psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat
+ || psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride
+ || psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width
+ || psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
+ {
+ /* DST doesn't match the SRC */
+ eError = PVRSRV_ERROR_INVALID_PARAMS;
+ goto ErrorFreeSwapChain;
+ }
+
+ psSwapChain->psBuffer = (OMAPLFB_BUFFER*)OMAPLFBAllocKernelMem(sizeof(OMAPLFB_BUFFER) * ui32BufferCount);
+ if(!psSwapChain->psBuffer)
+ {
+ eError = PVRSRV_ERROR_OUT_OF_MEMORY;
+ goto ErrorFreeSwapChain;
+ }
+
+ /* Link the buffers */
+ for(i = 0; i < ui32BufferCount - 1; i++)
{
- ui32BufferOffset = 0;
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[i + 1];
}
+
+ /* and link last to first */
+ psSwapChain->psBuffer[i].psNext = &psSwapChain->psBuffer[0];
+
+ /* Configure the swapchain buffers */
+ for(i = 0; i < ui32BufferCount; i++)
+ {
+ IMG_UINT32 ui32SwapBuffer = i + ui32BuffersToSkip;
+ IMG_UINT32 ui32BufferOffset = ui32SwapBuffer * (IMG_UINT32)psDevInfo->sFBInfo.ulRoundedBufferSize;
+
+#if defined(CONFIG_DSSCOMP)
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ ui32BufferOffset = 0;
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- psBuffer[i].psSyncData = ppsSyncData[i];
+ psSwapChain->psBuffer[i].psSyncData = ppsSyncData[i];
- psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
- psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
- psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
- psBuffer[i].psDevInfo = psDevInfo;
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr = psDevInfo->sFBInfo.sSysAddr.uiAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].sCPUVAddr = psDevInfo->sFBInfo.sCPUVAddr + ui32BufferOffset;
+ psSwapChain->psBuffer[i].ulYOffset = ui32BufferOffset / psDevInfo->sFBInfo.ulByteStride;
+ psSwapChain->psBuffer[i].psDevInfo = psDevInfo;
#if defined(CONFIG_DSSCOMP)
- if (psDevInfo->sFBInfo.bIs2D)
- {
- psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
- ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
- }
+ if (psDevInfo->sFBInfo.bIs2D)
+ {
+ psSwapChain->psBuffer[i].sSysAddr.uiAddr += ui32SwapBuffer *
+ ALIGN((IMG_UINT32)psDevInfo->sFBInfo.ulWidth * psDevInfo->sFBInfo.uiBytesPerPixel, PAGE_SIZE);
+ }
#endif /* defined(CONFIG_DSSCOMP) */
- OMAPLFBInitBufferForSwap(&psBuffer[i]);
+ OMAPLFBInitBufferForSwap(&psSwapChain->psBuffer[i]);
+ }
+ }
+ else
+ {
+ psSwapChain->psBuffer = NULL;
}
+#if defined(PVR_OMAPFB3_UPDATE_MODE)
+ if (!OMAPLFBSetUpdateMode(psDevInfo, PVR_OMAPFB3_UPDATE_MODE))
+ {
+ printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Couldn't set frame buffer update mode %d\n", __FUNCTION__, psDevInfo->uiFBDevID, PVR_OMAPFB3_UPDATE_MODE);
+ }
+#endif /* defined(PVR_OMAPFB3_UPDATE_MODE) */
+
+ psSwapChain->ulBufferCount = (unsigned long)ui32BufferCount;
+ psSwapChain->bNotVSynced = OMAPLFB_TRUE;
+ psSwapChain->uiFBDevID = psDevInfo->uiFBDevID;
+
if (OMAPLFBCreateSwapQueue(psSwapChain) != OMAPLFB_OK)
{
printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Failed to create workqueue\n", __FUNCTION__, psDevInfo->uiFBDevID);
@@ -659,7 +693,10 @@ static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
ErrorDestroySwapQueue:
OMAPLFBDestroySwapQueue(psSwapChain);
ErrorFreeBuffers:
- OMAPLFBFreeKernelMem(psBuffer);
+ if(psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
ErrorFreeSwapChain:
OMAPLFBFreeKernelMem(psSwapChain);
ExitUnLock:
@@ -708,7 +745,10 @@ static PVRSRV_ERROR DestroyDCSwapChain(IMG_HANDLE hDevice,
}
/* Free resources */
- OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ if (psSwapChain->psBuffer)
+ {
+ OMAPLFBFreeKernelMem(psSwapChain->psBuffer);
+ }
OMAPLFBFreeKernelMem(psSwapChain);
psDevInfo->psSwapChain = NULL;
@@ -922,6 +962,7 @@ void OMAPLFBSwapHandler(OMAPLFB_BUFFER *psBuffer)
switch(eMode)
{
case OMAPLFB_UPDATE_MODE_AUTO:
+ case OMAPLFB_UPDATE_MODE_VSYNC:
psSwapChain->bNotVSynced = OMAPLFB_FALSE;
if (bPreviouslyNotVSynced || psSwapChain->iBlankEvents != iBlankEvents)
@@ -972,6 +1013,7 @@ static IMG_BOOL ProcessFlipV1(IMG_HANDLE hCmdCookie,
#if defined(CONFIG_DSSCOMP)
if (is_tiler_addr(psBuffer->sSysAddr.uiAddr))
{
+ int res;
IMG_UINT32 w = psBuffer->psDevInfo->sDisplayDim.ui32Width;
IMG_UINT32 h = psBuffer->psDevInfo->sDisplayDim.ui32Height;
struct dsscomp_setup_dispc_data comp = {
@@ -995,9 +1037,13 @@ static IMG_BOOL ProcessFlipV1(IMG_HANDLE hCmdCookie,
};
struct tiler_pa_info *pas[1] = { NULL };
comp.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
- dsscomp_gralloc_queue(&comp, pas, true,
+ res = dsscomp_gralloc_queue(&comp, pas, true,
(void *) psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *) psBuffer->hCmdComplete);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
else
#endif /* defined(CONFIG_DSSCOMP) */
@@ -1023,6 +1069,55 @@ static IMG_BOOL ProcessFlipV2(IMG_HANDLE hCmdCookie,
{
struct tiler_pa_info *apsTilerPAs[5];
IMG_UINT32 i, k;
+ struct
+ {
+ IMG_UINTPTR_T uiAddr;
+ IMG_UINTPTR_T uiUVAddr;
+ struct tiler_pa_info *psTilerInfo;
+ }
+ asMemInfo[5] = {};
+ int res;
+
+ if(!psDssData)
+ {
+ if(ui32NumMemInfos == 1)
+ {
+ OMAPLFB_BUFFER sBuffer;
+ IMG_CPU_PHYADDR phyAddr;
+
+ psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[0], 0, &phyAddr);
+
+ /* Fake up an OMAPLFB_BUFFER */
+ sBuffer.psNext = NULL;
+ sBuffer.psDevInfo = psDevInfo;
+ sBuffer.ulYOffset = 0;
+ sBuffer.sSysAddr.uiAddr = phyAddr.uiAddr;
+ sBuffer.sCPUVAddr = 0;
+ sBuffer.psSyncData = NULL;
+ sBuffer.hCmdComplete = (OMAPLFB_HANDLE)hCmdCookie;
+ sBuffer.ulSwapInterval = 0;
+
+ /* If we got a meminfo but no private data, assume the 'null' HWC
+ * backend is in use, and emulate a swapchain-less ProcessFlipV1.
+ */
+ OMAPLFBFlip(psDevInfo, &sBuffer);
+
+ /* FIXME: Why do this? Shouldn't we use the hCmdCookie correctly,
+ * like ProcessFlipV1 does?
+ */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_TRUE);
+ }
+ else
+ {
+ printk(KERN_WARNING DRIVER_PREFIX
+ ": %s: Device %u: WARNING: psDispcData was NULL. "
+ "The HWC probably has a bug. Silently ignoring.",
+ __FUNCTION__, psDevInfo->uiFBDevID);
+ }
+
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_TRUE);
+ return IMG_TRUE;
+ }
if(ui32DssDataLength != sizeof(*psDssData))
{
@@ -1037,7 +1132,13 @@ static IMG_BOOL ProcessFlipV2(IMG_HANDLE hCmdCookie,
return IMG_FALSE;
}
- for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(apsTilerPAs); i++, k++)
+ if(DontWaitForVSync(psDevInfo))
+ {
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_TRUE);
+ return IMG_TRUE;
+ }
+
+ for(i = k = 0; i < ui32NumMemInfos && k < ARRAY_SIZE(asMemInfo); i++, k++)
{
struct tiler_pa_info *psTilerInfo;
IMG_CPU_VIRTADDR virtAddr;
@@ -1049,27 +1150,28 @@ static IMG_BOOL ProcessFlipV2(IMG_HANDLE hCmdCookie,
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetByteSize(ppsMemInfos[i], &uByteSize);
ui32NumPages = (uByteSize + PAGE_SIZE - 1) >> PAGE_SHIFT;
- apsTilerPAs[k] = NULL;
-
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], 0, &phyAddr);
- /* NV12 buffers are already mapped to tiler */
- if(psDssData->ovls[k].cfg.color_mode == OMAP_DSS_COLOR_NV12)
- {
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
-
- psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
- psDssData->ovls[k].uv = (u32)phyAddr.uiAddr;
- continue;
- }
-
- /* Other kinds of buffer may also already be mapped to tiler */
+ /* TILER buffers do not need meminfos */
if(is_tiler_addr((u32)phyAddr.uiAddr))
{
- psDssData->ovls[k].ba = (u32)phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ enum tiler_fmt fmt;
+#endif
+ asMemInfo[k].uiAddr = phyAddr.uiAddr;
+#ifdef CONFIG_DRM_OMAP_DMM_TILER
+ if(tiler_get_fmt((u32)phyAddr.uiAddr, &fmt) && fmt == TILFMT_8BIT)
+#else
+ if(tiler_fmt((u32)phyAddr.uiAddr) == TILFMT_8BIT)
+#endif
+ {
+ psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], (uByteSize * 2) / 3, &phyAddr);
+ asMemInfo[k].uiUVAddr = phyAddr.uiAddr;
+ }
continue;
}
+ /* normal gralloc layer */
psTilerInfo = kzalloc(sizeof(*psTilerInfo), GFP_KERNEL);
if(!psTilerInfo)
{
@@ -1085,37 +1187,58 @@ static IMG_BOOL ProcessFlipV2(IMG_HANDLE hCmdCookie,
psTilerInfo->num_pg = ui32NumPages;
psTilerInfo->memtype = TILER_MEM_USING;
-
for(j = 0; j < ui32NumPages; j++)
{
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuPAddr(ppsMemInfos[i], j << PAGE_SHIFT, &phyAddr);
psTilerInfo->mem[j] = (u32)phyAddr.uiAddr;
}
- /* Need base address for in-page offset */
+ /* need base address for in-page offset */
psDevInfo->sPVRJTable.pfnPVRSRVDCMemInfoGetCpuVAddr(ppsMemInfos[i], &virtAddr);
- psDssData->ovls[k].ba = (u32)virtAddr;
- apsTilerPAs[k] = psTilerInfo;
+ asMemInfo[k].uiAddr = (IMG_UINTPTR_T) virtAddr;
+ asMemInfo[k].psTilerInfo = psTilerInfo;
}
- /* Set up cloned layer addresses (but don't duplicate tiler_pas) */
- for(i = k; i < psDssData->num_ovls && i < ARRAY_SIZE(apsTilerPAs); i++)
+ for(i = 0; i < psDssData->num_ovls; i++)
{
- unsigned int ix = psDssData->ovls[i].ba;
- if(ix >= ARRAY_SIZE(apsTilerPAs))
+ unsigned int ix;
+ apsTilerPAs[i] = NULL;
+
+ /* only supporting Post2, cloned and fbmem layers */
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_OVL_IX &&
+ psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_FB)
{
- WARN(1, "Invalid clone layer (%u); skipping all cloned layers", ix);
- psDssData->num_ovls = k;
- break;
+ psDssData->ovls[i].cfg.enabled = false;
+ }
+
+ if (psDssData->ovls[i].addressing != OMAP_DSS_BUFADDR_LAYER_IX)
+ {
+ continue;
+ }
+
+ /* Post2 layers */
+ ix = psDssData->ovls[i].ba;
+ if (ix >= k)
+ {
+ WARN(1, "Invalid Post2 layer (%u)", ix);
+ psDssData->ovls[i].cfg.enabled = false;
+ continue;
}
- apsTilerPAs[i] = apsTilerPAs[ix];
- psDssData->ovls[i].ba = psDssData->ovls[ix].ba;
- psDssData->ovls[i].uv = psDssData->ovls[ix].uv;
+
+ psDssData->ovls[i].addressing = OMAP_DSS_BUFADDR_DIRECT;
+ psDssData->ovls[i].ba = (u32) asMemInfo[ix].uiAddr;
+ psDssData->ovls[i].uv = (u32) asMemInfo[ix].uiUVAddr;
+ apsTilerPAs[i] = asMemInfo[ix].psTilerInfo;
}
- dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
+ res = dsscomp_gralloc_queue(psDssData, apsTilerPAs, false,
(void *)psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete,
(void *)hCmdCookie);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (%d)\n", __FUNCTION__, psDevInfo->uiFBDevID, res));
+ }
for(i = 0; i < k; i++)
{
@@ -1194,8 +1317,6 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
struct module *psLINFBOwner;
OMAPLFB_FBINFO *psPVRFBInfo = &psDevInfo->sFBInfo;
OMAPLFB_ERROR eError = OMAPLFB_ERROR_GENERIC;
- unsigned long FBSize;
- unsigned long ulLCM;
unsigned uiFBDevID = psDevInfo->uiFBDevID;
OMAPLFB_CONSOLE_LOCK();
@@ -1207,20 +1328,6 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
goto ErrorRelSem;
}
- FBSize = (psLINFBInfo->screen_size) != 0 ?
- psLINFBInfo->screen_size :
- psLINFBInfo->fix.smem_len;
-
- /*
- * Try and filter out invalid FB info structures (a problem
- * seen on some OMAP3 systems).
- */
- if (FBSize == 0 || psLINFBInfo->fix.line_length == 0)
- {
- eError = OMAPLFB_ERROR_INVALID_DEVICE;
- goto ErrorRelSem;
- }
-
psLINFBOwner = psLINFBInfo->fbops->owner;
if (!try_module_get(psLINFBOwner))
{
@@ -1246,43 +1353,62 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
psDevInfo->psLINFBInfo = psLINFBInfo;
- ulLCM = LCM(psLINFBInfo->fix.line_length, OMAPLFB_PAGE_SIZE);
+ psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
+ psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
+
+ if (psPVRFBInfo->ulWidth == 0 || psPVRFBInfo->ulHeight == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
+
+#if !defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulFBSize = (psLINFBInfo->screen_size) != 0 ?
+ psLINFBInfo->screen_size :
+ psLINFBInfo->fix.smem_len;
+
+ /*
+ * Try and filter out invalid FB info structures (a problem
+ * seen on some OMAP3 systems).
+ */
+ if (psPVRFBInfo->ulFBSize == 0 || psLINFBInfo->fix.line_length == 0)
+ {
+ eError = OMAPLFB_ERROR_INVALID_DEVICE;
+ goto ErrorFBRel;
+ }
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer physical address: 0x%lx\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.smem_start));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer virtual address: 0x%lx\n",
- psDevInfo->uiFBDevID, (unsigned long)psLINFBInfo->screen_base));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer size: %lu\n",
- psDevInfo->uiFBDevID, FBSize));
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulFBSize));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual width: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.xres_virtual));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
": Device %u: Framebuffer virtual height: %u\n",
psDevInfo->uiFBDevID, psLINFBInfo->var.yres_virtual));
+#endif
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer width: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.xres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer height: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->var.yres));
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: Framebuffer stride: %u\n",
- psDevInfo->uiFBDevID, psLINFBInfo->fix.line_length));
+ ": Device %u: Framebuffer width: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulWidth));
DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
- ": Device %u: LCM of stride and page size: %lu\n",
- psDevInfo->uiFBDevID, ulLCM));
-
- /* Additional implementation specific information */
- OMAPLFBPrintInfo(psDevInfo);
+ ": Device %u: Framebuffer height: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulHeight));
#if defined(CONFIG_DSSCOMP)
{
- /* for some reason we need at least 3 buffers in the swap chain */
- int n = FBSize / RoundUpToMultiple(psLINFBInfo->fix.line_length * psLINFBInfo->var.yres, ulLCM);
+#if defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ /*
+ * Assume we need 3 swap buffers, and a separate system
+ * buffer.
+ */
+ int n = 4;
+#else
+ /*
+ * Assume we need just 3 swap buffers, and no separate
+ * system buffer.
+ */
+ int n = 3;
+#endif
int res;
int i, x, y, w;
ion_phys_addr_t phys;
@@ -1293,8 +1419,8 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
{
/* TILER will align width to 128-bytes */
/* however, SGX must have full page width */
- .w = ALIGN(psLINFBInfo->var.xres, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
- .h = psLINFBInfo->var.yres,
+ .w = ALIGN(psPVRFBInfo->ulWidth, PAGE_SIZE / (psLINFBInfo->var.bits_per_pixel / 8)),
+ .h = psPVRFBInfo->ulHeight,
.fmt = psLINFBInfo->var.bits_per_pixel == 16 ? TILER_PIXEL_FMT_16BIT : TILER_PIXEL_FMT_32BIT,
.flags = 0,
};
@@ -1303,43 +1429,43 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
" %s: Device %u: Requesting %d TILER 2D framebuffers\n",
__FUNCTION__, uiFBDevID, n);
- /* INTEGRATION_POINT: limit to MAX 3 FBs to save TILER container space */
- if (n != 3)
- n = 3;
-
sAllocData.w *= n;
psPVRFBInfo->uiBytesPerPixel = psLINFBInfo->var.bits_per_pixel >> 3;
psPVRFBInfo->bIs2D = OMAPLFB_TRUE;
- res = omap_ion_tiler_alloc(gpsIONClient, &sAllocData);
+ res = omap_ion_tiler_alloc(psDevInfo->psIONClient, &sAllocData);
psPVRFBInfo->psIONHandle = sAllocData.handle;
if (res < 0)
{
printk(KERN_ERR DRIVER_PREFIX
" %s: Device %u: Could not allocate 2D framebuffer(%d)\n",
__FUNCTION__, uiFBDevID, res);
- goto ErrorModPut;
+ goto ErrorFBRel;
}
- psLINFBInfo->fix.smem_start = ion_phys(gpsIONClient, sAllocData.handle, &phys, &size);
+ res = ion_phys(psDevInfo->psIONClient, sAllocData.handle, &phys, &size);
+ if (res < 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ " %s: Device %u: Could not get 2D framebufferphysical address (%d)\n",
+ __FUNCTION__, uiFBDevID, res);
+ goto ErrorFBRel;
+ }
psPVRFBInfo->sSysAddr.uiAddr = phys;
psPVRFBInfo->sCPUVAddr = 0;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = PAGE_ALIGN(psPVRFBInfo->ulWidth * psPVRFBInfo->uiBytesPerPixel);
w = psPVRFBInfo->ulByteStride >> PAGE_SHIFT;
- /* this is an "effective" FB size to get correct number of buffers */
psPVRFBInfo->ulFBSize = sAllocData.h * n * psPVRFBInfo->ulByteStride;
psPVRFBInfo->psPageList = kzalloc(w * n * psPVRFBInfo->ulHeight * sizeof(*psPVRFBInfo->psPageList), GFP_KERNEL);
if (!psPVRFBInfo->psPageList)
{
printk(KERN_WARNING DRIVER_PREFIX ": %s: Device %u: Could not allocate page list\n", __FUNCTION__, psDevInfo->uiFBDevID);
- ion_free(gpsIONClient, sAllocData.handle);
- goto ErrorModPut;
+ ion_free(psDevInfo->psIONClient, sAllocData.handle);
+ goto ErrorFBRel;
}
tilview_create(&view, phys, psDevInfo->sFBInfo.ulWidth, psDevInfo->sFBInfo.ulHeight);
@@ -1360,21 +1486,48 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
psPVRFBInfo->sSysAddr.uiAddr = psLINFBInfo->fix.smem_start;
psPVRFBInfo->sCPUVAddr = psLINFBInfo->screen_base;
- psPVRFBInfo->ulWidth = psLINFBInfo->var.xres;
- psPVRFBInfo->ulHeight = psLINFBInfo->var.yres;
psPVRFBInfo->ulByteStride = psLINFBInfo->fix.line_length;
- psPVRFBInfo->ulFBSize = FBSize;
#endif /* defined(CONFIG_DSSCOMP) */
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer physical address: 0x%x\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sSysAddr.uiAddr));
+
+ if (psPVRFBInfo->sCPUVAddr != NULL)
+ {
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer virtual address: %p\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->sCPUVAddr));
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: Framebuffer stride: %lu\n",
+ psDevInfo->uiFBDevID, psPVRFBInfo->ulByteStride));
+
+ /* Additional implementation specific information */
+ OMAPLFBPrintInfo(psDevInfo);
+
psPVRFBInfo->ulBufferSize = psPVRFBInfo->ulHeight * psPVRFBInfo->ulByteStride;
- /* Round the buffer size up to a multiple of the number of pages
- * and the byte stride.
- * This is used internally, to ensure buffers start on page
- * boundaries, for the benefit of PVR Services.
- */
- psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+#if defined(CONFIG_DSSCOMP)
+ psPVRFBInfo->ulRoundedBufferSize = psPVRFBInfo->ulBufferSize;
+#else
+ {
+ unsigned long ulLCM;
+ ulLCM = LCM(psPVRFBInfo->ulByteStride, OMAPLFB_PAGE_SIZE);
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX
+ ": Device %u: LCM of stride and page size: %lu\n",
+ psDevInfo->uiFBDevID, ulLCM));
+
+ /* Round the buffer size up to a multiple of the number of pages
+ * and the byte stride.
+ * This is used internally, to ensure buffers start on page
+ * boundaries, for the benefit of PVR Services.
+ */
+ psPVRFBInfo->ulRoundedBufferSize = RoundUpToMultiple(psPVRFBInfo->ulBufferSize, ulLCM);
+ }
+#endif
if(psLINFBInfo->var.bits_per_pixel == 16)
{
if((psLINFBInfo->var.red.length == 5) &&
@@ -1427,6 +1580,11 @@ static OMAPLFB_ERROR OMAPLFBInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
eError = OMAPLFB_OK;
goto ErrorRelSem;
+ErrorFBRel:
+ if (psLINFBInfo->fbops->fb_release != NULL)
+ {
+ (void) psLINFBInfo->fbops->fb_release(psLINFBInfo, 0);
+ }
ErrorModPut:
module_put(psLINFBOwner);
ErrorRelSem:
@@ -1448,7 +1606,7 @@ static void OMAPLFBDeInitFBDev(OMAPLFB_DEVINFO *psDevInfo)
kfree(psPVRFBInfo->psPageList);
if (psPVRFBInfo->psIONHandle)
{
- ion_free(gpsIONClient, psPVRFBInfo->psIONHandle);
+ ion_free(psDevInfo->psIONClient, psPVRFBInfo->psIONHandle);
}
}
#endif /* defined(CONFIG_DSSCOMP) */
@@ -1493,6 +1651,23 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID)
goto ErrorFreeDevInfo;
}
+#if defined(CONFIG_ION_OMAP)
+ psDevInfo->psIONClient =
+ ion_client_create(omap_ion_device,
+#if defined(SUPPORT_OLD_ION_API)
+ 1 << ION_HEAP_TYPE_CARVEOUT |
+ 1 << OMAP_ION_HEAP_TYPE_TILER,
+#endif
+ "dc_omapfb3_linux");
+ if (IS_ERR_OR_NULL(psDevInfo->psIONClient))
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ ": %s: Device %u: Failed to create ion client\n", __FUNCTION__, uiFBDevID);
+
+ goto ErrorFreeDevInfo;
+ }
+#endif /* defined(CONFIG_ION_OMAP) */
+
/* Save private fbdev information structure in the dev. info. */
if(OMAPLFBInitFBDev(psDevInfo) != OMAPLFB_OK)
{
@@ -1502,7 +1677,7 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID)
* there is no Linux framebuffer device corresponding
* to the device ID.
*/
- goto ErrorFreeDevInfo;
+ goto ErrorIonClientDestroy;
}
psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = (IMG_UINT32)(psDevInfo->sFBInfo.ulFBSize / psDevInfo->sFBInfo.ulRoundedBufferSize);
@@ -1510,6 +1685,9 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID)
{
psDevInfo->sDisplayInfo.ui32MaxSwapChains = 1;
psDevInfo->sDisplayInfo.ui32MaxSwapInterval = 1;
+#if defined(CONFIG_DSSCOMP)
+ psDevInfo->sDisplayInfo.ui32MinSwapInterval = 1;
+#endif
}
psDevInfo->sDisplayInfo.ui32PhysicalWidthmm = psDevInfo->sFBInfo.ulPhysicalWidthmm;
@@ -1533,6 +1711,10 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID)
OMAPLFBInitBufferForSwap(&psDevInfo->sSystemBuffer);
+#if defined(CONFIG_DSSCOMP) && defined(SUPPORT_PVRSRV_GET_DC_SYSTEM_BUFFER)
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif
+
/*
Setup the DC Jtable so SRVKM can call into this driver
*/
@@ -1601,12 +1783,17 @@ static OMAPLFB_DEVINFO *OMAPLFBInitDev(unsigned uiFBDevID)
#if defined(SUPPORT_DRI_DRM)
OMAPLFBAtomicBoolInit(&psDevInfo->sLeaveVT, OMAPLFB_FALSE);
#endif
+
return psDevInfo;
ErrorUnregisterDevice:
(void)psDevInfo->sPVRJTable.pfnPVRSRVRemoveDCDevice(psDevInfo->uiPVRDevID);
ErrorDeInitFBDev:
OMAPLFBDeInitFBDev(psDevInfo);
+ErrorIonClientDestroy:
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif /* defined(CONFIG_ION_OMAP) */
ErrorFreeDevInfo:
OMAPLFBFreeKernelMem(psDevInfo);
ErrorExit:
@@ -1652,19 +1839,6 @@ static OMAPLFB_BOOL OMAPLFBDeInitDev(OMAPLFB_DEVINFO *psDevInfo)
{
PVRSRV_DC_DISP2SRV_KMJTABLE *psPVRJTable = &psDevInfo->sPVRJTable;
- OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
-
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
- OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
-#if defined(CONFIG_HAS_EARLYSUSPEND)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
-#endif
-#if defined(SUPPORT_DRI_DRM)
- OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
-#endif
- psPVRJTable = &psDevInfo->sPVRJTable;
-
if (psPVRJTable->pfnPVRSRVRemoveCmdProcList (psDevInfo->uiPVRDevID, OMAPLFB_COMMAND_COUNT) != PVRSRV_OK)
{
printk(KERN_ERR DRIVER_PREFIX
@@ -1682,9 +1856,31 @@ static OMAPLFB_BOOL OMAPLFBDeInitDev(OMAPLFB_DEVINFO *psDevInfo)
": %s: Device %u: PVR Device %u: Couldn't remove device from PVR Services\n", __FUNCTION__, psDevInfo->uiFBDevID, psDevInfo->uiPVRDevID);
return OMAPLFB_FALSE;
}
-
+
+#if defined(CONFIG_DSSCOMP)
+ /* Disable the overlay, as we will be freeing the display buffers */
+ psDevInfo->sSystemBuffer.sSysAddr.uiAddr = 0;
+ OMAPLFBFlip(psDevInfo, &psDevInfo->sSystemBuffer);
+#endif /* defined(CONFIG_DSSCOMP) */
+
+ OMAPLFBCreateSwapChainLockDeInit(psDevInfo);
+
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sBlanked);
+ OMAPLFBAtomicIntDeInit(&psDevInfo->sBlankEvents);
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sFlushCommands);
+#if defined(CONFIG_HAS_EARLYSUSPEND)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sEarlySuspendFlag);
+#endif
+#if defined(SUPPORT_DRI_DRM)
+ OMAPLFBAtomicBoolDeInit(&psDevInfo->sLeaveVT);
+#endif
+
OMAPLFBDeInitFBDev(psDevInfo);
+#if defined(CONFIG_ION_OMAP)
+ ion_client_destroy(psDevInfo->psIONClient);
+#endif
+
OMAPLFBSetDevInfoPtr(psDevInfo->uiFBDevID, NULL);
/* De-allocate data structure */
diff --git a/services4/3rdparty/dc_omapfb3_linux/omaplfb_linux.c b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb_linux.c
index 82c7fce..c8072f5 100644
--- a/services4/3rdparty/dc_omapfb3_linux/omaplfb_linux.c
+++ b/eurasia_km/services4/3rdparty/dc_omapfb3_linux/omaplfb_linux.c
@@ -93,7 +93,11 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include <linux/mutex.h>
#if defined(PVR_OMAPLFB_DRM_FB)
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0))
#include <plat/display.h>
+#else
+#include <video/omapdss.h>
+#endif
#include <linux/omap_gpu.h>
#else /* defined(PVR_OMAPLFB_DRM_FB) */
/* OmapZoom.org OMAP3 2.6.29 kernel tree - Needs mach/vrfb.h
@@ -102,10 +106,21 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* OmapZoom.org OMAP4 2.6.34 kernel tree - Needs plat/vrfb.h
* Sholes 2.6.32 kernel tree - Needs plat/vrfb.h
*/
+#if defined(SYS_OMAP5_UEVM)
+#define PVR_OMAPFB3_OMAP5_UEVM
+#endif
+
+#if defined(PVR_OMAPFB3_OMAP5_UEVM)
+#define PVR_OMAPFB3_NEEDS_VIDEO_OMAPVRFB_H
+#else
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#define PVR_OMAPFB3_NEEDS_PLAT_VRFB_H
#endif
+#endif
+#if defined(PVR_OMAPFB3_NEEDS_VIDEO_OMAPVRFB_H)
+#include <video/omapvrfb.h>
+#else
#if defined(PVR_OMAPFB3_NEEDS_PLAT_VRFB_H)
#include <plat/vrfb.h>
#else
@@ -113,12 +128,14 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include <mach/vrfb.h>
#endif
#endif
+#endif
#if defined(DEBUG)
#define PVR_DEBUG DEBUG
#undef DEBUG
#endif
#include <omapfb/omapfb.h>
+#undef DBG
#if defined(DEBUG)
#undef DEBUG
#endif
@@ -129,7 +146,15 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#endif /* defined(PVR_OMAPLFB_DRM_FB) */
#if defined(CONFIG_DSSCOMP)
+#if defined(CONFIG_DRM_OMAP_DMM_TILER)
+#include <../drivers/staging/omapdrm/omap_dmm_tiler.h>
+#include <../drivers/video/omap2/dsscomp/tiler-utils.h>
+#elif defined(CONFIG_TI_TILER)
#include <mach/tiler.h>
+#else /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
+#error CONFIG_DSSCOMP support requires either \
+ CONFIG_DRM_OMAP_DMM_TILER or CONFIG_TI_TILER
+#endif /* defined(CONFIG_DRM_OMAP_DMM_TILER) */
#include <video/dsscomp.h>
#include <plat/dsscomp.h>
#endif /* defined(CONFIG_DSSCOMP) */
@@ -151,15 +176,21 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
MODULE_SUPPORTED_DEVICE(DEVNAME);
#if !defined(PVR_OMAPLFB_DRM_FB)
+#if defined(PVR_OMAPFB3_OMAP5_UEVM)
+#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_driver *drv = (dev)->driver
+#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev)->output->manager
+#define WAIT_FOR_VSYNC(man) ((man)->wait_for_vsync)
+#else /* defined(PVR_OMAPFB3_OMAP5_UEVM) */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34))
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_driver *drv = (dev) != NULL ? (dev)->driver : NULL
#define OMAP_DSS_MANAGER(man, dev) struct omap_overlay_manager *man = (dev) != NULL ? (dev)->manager : NULL
#define WAIT_FOR_VSYNC(man) ((man)->wait_for_vsync)
-#else
+#else /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)) */
#define OMAP_DSS_DRIVER(drv, dev) struct omap_dss_device *drv = (dev)
#define OMAP_DSS_MANAGER(man, dev) struct omap_dss_device *man = (dev)
#define WAIT_FOR_VSYNC(man) ((man)->wait_vsync)
-#endif
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,34)) */
+#endif /* defined(PVR_OMAPFB3_OMAP5_UEVM) */
#endif /* !defined(PVR_OMAPLFB_DRM_FB) */
void *OMAPLFBAllocKernelMem(unsigned long ulSize)
@@ -325,8 +356,13 @@ void OMAPLFBFlip(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_BUFFER *psBuffer)
{
struct fb_var_screeninfo sFBVar;
int res;
- unsigned long ulYResVirtual;
+ if (!lock_fb_info(psDevInfo->psLINFBInfo))
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX
+ ": %s: Device %u: Couldn't lock FB info\n", __FUNCTION__, psDevInfo->uiFBDevID));
+ return;
+ }
OMAPLFB_CONSOLE_LOCK();
sFBVar = psDevInfo->psLINFBInfo->var;
@@ -334,9 +370,26 @@ void OMAPLFBFlip(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_BUFFER *psBuffer)
sFBVar.xoffset = 0;
sFBVar.yoffset = psBuffer->ulYOffset;
- ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
-
#if defined(CONFIG_DSSCOMP)
+ /*
+ * If flipping to a NULL buffer, blank the screen to prevent
+ * warnings/errors from the display subsystem.
+ */
+ if (psBuffer->sSysAddr.uiAddr == 0)
+ {
+ struct omap_dss_device *psDSSDev = fb2display(psDevInfo->psLINFBInfo);
+ OMAP_DSS_MANAGER(psDSSMan, psDSSDev);
+
+ if (psDSSMan != NULL && psDSSMan->blank != NULL)
+ {
+ res = psDSSMan->blank(psDSSMan, false);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: DSS manager blank call failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
+ }
+ }
+
{
/*
* If using DSSCOMP, we need to use dsscomp queuing for normal
@@ -364,7 +417,7 @@ void OMAPLFBFlip(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_BUFFER *psBuffer)
.width = sFBVar.xres_virtual,
.height = sFBVar.yres_virtual,
.stride = sFBFix.line_length,
- .enabled = 1,
+ .enabled = (psBuffer->sSysAddr.uiAddr != 0),
.global_alpha = 255,
},
},
@@ -373,52 +426,71 @@ void OMAPLFBFlip(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_BUFFER *psBuffer)
/* do not map buffer into TILER1D as it is contiguous */
struct tiler_pa_info *pas[] = { NULL };
- d.ovls[0].ba = sFBFix.smem_start;
+ d.ovls[0].ba = (u32) psBuffer->sSysAddr.uiAddr;
+
omapfb_mode_to_dss_mode(&sFBVar, &d.ovls[0].cfg.color_mode);
res = dsscomp_gralloc_queue(&d, pas, true, NULL, NULL);
+ if (res != 0)
+ {
+ DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: Device %u: dsscomp_gralloc_queue failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res));
+ }
}
#else /* defined(CONFIG_DSSCOMP) */
- /*
- * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to work
- * around flipping problems seen with the Taal LCDs on Blaze.
- * The work around is safe to use with other types of screen on Blaze
- * (e.g. HDMI) and on other platforms (e.g. Panda board).
- */
+ {
+ unsigned long ulYResVirtual = psBuffer->ulYOffset + sFBVar.yres;
+
+ /*
+ * PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY should be defined to
+ * work around flipping problems seen with the Taal LCDs on
+ * Blaze.
+ * The work around is safe to use with other types of screen
+ * on Blaze (e.g. HDMI) and on other platforms (e.g. Panda
+ * board).
+ */
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- /*
- * Attempt to change the virtual screen resolution if it is too
- * small. Note that fb_set_var also pans the display.
- */
- if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
+ /*
+ * Attempt to change the virtual screen resolution if it is too
+ * small. Note that fb_set_var also pans the display.
+ */
+ if (sFBVar.xres_virtual != sFBVar.xres || sFBVar.yres_virtual < ulYResVirtual)
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
- {
- sFBVar.xres_virtual = sFBVar.xres;
- sFBVar.yres_virtual = ulYResVirtual;
+ {
+ sFBVar.xres_virtual = sFBVar.xres;
+ sFBVar.yres_virtual = ulYResVirtual;
- sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
+ sFBVar.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
- res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
- {
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_set_var(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_set_var failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#if !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY)
- else
- {
- res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
- if (res != 0)
+ else
{
- printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ res = fb_pan_display(psDevInfo->psLINFBInfo, &sFBVar);
+ if (res != 0)
+ {
+ printk(KERN_ERR DRIVER_PREFIX ": %s: Device %u: fb_pan_display failed (Y Offset: %lu, Error: %d)\n", __FUNCTION__, psDevInfo->uiFBDevID, psBuffer->ulYOffset, res);
+ }
}
- }
#endif /* !defined(PVR_OMAPLFB_DONT_USE_FB_PAN_DISPLAY) */
+ }
#endif /* defined(CONFIG_DSSCOMP) */
OMAPLFB_CONSOLE_UNLOCK();
+ unlock_fb_info(psDevInfo->psLINFBInfo);
}
+/* Newer kernels don't have any update mode capability */
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0))
+#define PVR_OMAPLFB_HAS_UPDATE_MODE
+#endif
+
+#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
#if !defined(PVR_OMAPLFB_DRM_FB) || defined(DEBUG)
static OMAPLFB_BOOL OMAPLFBValidateDSSUpdateMode(enum omap_dss_update_mode eMode)
{
@@ -514,46 +586,7 @@ static const char *OMAPLFBDSSUpdateModeToString(enum omap_dss_update_mode eMode)
return OMAPLFBUpdateModeToString(OMAPLFBFromDSSUpdateMode(eMode));
}
-
-void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
-{
-#if defined(PVR_OMAPLFB_DRM_FB)
- struct drm_connector *psConnector;
- unsigned uConnectors;
- unsigned uConnector;
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
-
- for (psConnector = NULL, uConnectors = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
- {
- uConnectors++;
- }
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
-
- if (uConnectors == 0)
- {
- return;
- }
-
- for (psConnector = NULL, uConnector = 0;
- (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
- {
- enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
-
- }
-#else /* defined(PVR_OMAPLFB_DRM_FB) */
- OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
-
- DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
-#endif /* defined(PVR_OMAPLFB_DRM_FB) */
-}
-#endif /* defined(DEBUG) */
+#endif /* defined(DEBUG) */
/*
* Get display update mode.
@@ -709,6 +742,61 @@ OMAPLFB_BOOL OMAPLFBSetUpdateMode(OMAPLFB_DEVINFO *psDevInfo, OMAPLFB_UPDATE_MOD
return (res == 0);
#endif /* defined(PVR_OMAPLFB_DRM_FB) */
}
+#else /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+OMAPLFB_UPDATE_MODE OMAPLFBGetUpdateMode(OMAPLFB_DEVINFO *psDevInfo)
+{
+#if defined(PVR_OMAPFB3_OMAP5_UEVM)
+ return OMAPLFB_UPDATE_MODE_VSYNC;
+#else
+ return OMAPLFB_UPDATE_MODE_UNDEFINED;
+#endif
+}
+
+#endif /* defined(PVR_OMAPLFB_HAS_UPDATE_MODE) */
+
+#if defined(DEBUG)
+void OMAPLFBPrintInfo(OMAPLFB_DEVINFO *psDevInfo)
+{
+#if defined(PVR_OMAPLFB_DRM_FB)
+ struct drm_connector *psConnector;
+ unsigned uConnectors;
+ unsigned uConnector;
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+ for (psConnector = NULL, uConnectors = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL;)
+ {
+ uConnectors++;
+ }
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Number of screens (DRM connectors): %u\n", psDevInfo->uiFBDevID, uConnectors));
+
+ if (uConnectors == 0)
+ {
+ return;
+ }
+
+ for (psConnector = NULL, uConnector = 0;
+ (psConnector = omap_fbdev_get_next_connector(psDevInfo->psLINFBInfo, psConnector)) != NULL; uConnector++)
+ {
+ enum omap_dss_update_mode eMode = omap_connector_get_update_mode(psConnector);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: Screen %u: %s (%d)\n", psDevInfo->uiFBDevID, uConnector, OMAPLFBDSSUpdateModeToString(eMode), (int)eMode));
+
+ }
+#else /* defined(PVR_OMAPLFB_DRM_FB) */
+#if defined(PVR_OMAPLFB_HAS_UPDATE_MODE)
+ OMAPLFB_UPDATE_MODE eMode = OMAPLFBGetUpdateMode(psDevInfo);
+
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: %s\n", psDevInfo->uiFBDevID, OMAPLFBUpdateModeToString(eMode)));
+#endif
+ DEBUG_PRINTK((KERN_INFO DRIVER_PREFIX ": Device %u: non-DRM framebuffer\n", psDevInfo->uiFBDevID));
+
+#endif /* defined(PVR_OMAPLFB_DRM_FB) */
+}
+#endif /* defined(DEBUG) */
/* Wait for VSync */
OMAPLFB_BOOL OMAPLFBWaitForVSync(OMAPLFB_DEVINFO *psDevInfo)
@@ -845,14 +933,32 @@ static int OMAPLFBFrameBufferEvents(struct notifier_block *psNotif,
return 0;
}
-/* Unblank the screen */
-OMAPLFB_ERROR OMAPLFBUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo)
+/*
+ * Blank or Unblank the screen. To be called where the unblank is being done
+ * in user context.
+ */
+static OMAPLFB_ERROR OMAPLFBBlankOrUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo, IMG_BOOL bBlank)
{
int res;
+ if (!lock_fb_info(psDevInfo->psLINFBInfo))
+ {
+ printk(KERN_ERR DRIVER_PREFIX
+ ": %s: Device %u: Couldn't lock FB info\n", __FUNCTION__, psDevInfo->uiFBDevID);
+ return (OMAPLFB_ERROR_GENERIC);
+ }
+
+ /*
+ * FBINFO_MISC_USEREVENT is set to avoid a deadlock resulting from
+ * fb_blank being called recursively due from within the fb_blank event
+ * notification.
+ */
OMAPLFB_CONSOLE_LOCK();
- res = fb_blank(psDevInfo->psLINFBInfo, 0);
+ psDevInfo->psLINFBInfo->flags |= FBINFO_MISC_USEREVENT;
+ res = fb_blank(psDevInfo->psLINFBInfo, bBlank ? 1 : 0);
+ psDevInfo->psLINFBInfo->flags &= ~FBINFO_MISC_USEREVENT;
OMAPLFB_CONSOLE_UNLOCK();
+ unlock_fb_info(psDevInfo->psLINFBInfo);
if (res != 0 && res != -EINVAL)
{
printk(KERN_ERR DRIVER_PREFIX
@@ -863,10 +969,23 @@ OMAPLFB_ERROR OMAPLFBUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo)
return (OMAPLFB_OK);
}
+/* Unblank the screen */
+OMAPLFB_ERROR OMAPLFBUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo)
+{
+ return OMAPLFBBlankOrUnblankDisplay(psDevInfo, IMG_FALSE);
+}
+
#ifdef CONFIG_HAS_EARLYSUSPEND
/* Blank the screen */
-static void OMAPLFBBlankDisplay(OMAPLFB_DEVINFO *psDevInfo)
+static void OMAPLFBEarlyUnblankDisplay(OMAPLFB_DEVINFO *psDevInfo)
+{
+ OMAPLFB_CONSOLE_LOCK();
+ fb_blank(psDevInfo->psLINFBInfo, 0);
+ OMAPLFB_CONSOLE_UNLOCK();
+}
+
+static void OMAPLFBEarlyBlankDisplay(OMAPLFB_DEVINFO *psDevInfo)
{
OMAPLFB_CONSOLE_LOCK();
fb_blank(psDevInfo->psLINFBInfo, 1);
@@ -885,7 +1004,7 @@ static void OMAPLFBEarlySuspendHandler(struct early_suspend *h)
if (psDevInfo != NULL)
{
OMAPLFBAtomicBoolSet(&psDevInfo->sEarlySuspendFlag, OMAPLFB_TRUE);
- OMAPLFBBlankDisplay(psDevInfo);
+ OMAPLFBEarlyBlankDisplay(psDevInfo);
}
}
}
@@ -901,7 +1020,7 @@ static void OMAPLFBEarlyResumeHandler(struct early_suspend *h)
if (psDevInfo != NULL)
{
- OMAPLFBUnblankDisplay(psDevInfo);
+ OMAPLFBEarlyUnblankDisplay(psDevInfo);
OMAPLFBAtomicBoolSet(&psDevInfo->sEarlySuspendFlag, OMAPLFB_FALSE);
}
}
@@ -997,36 +1116,32 @@ static OMAPLFB_DEVINFO *OMAPLFBPVRDevIDToDevInfo(unsigned uiPVRDevID)
int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(struct drm_device unref__ *dev, void *arg, struct drm_file unref__ *pFile)
{
- uint32_t *puiArgs;
- uint32_t uiCmd;
- unsigned uiPVRDevID;
- int ret = 0;
+ drm_pvr_display_cmd *psArgs;
OMAPLFB_DEVINFO *psDevInfo;
+ int ret = 0;
if (arg == NULL)
{
return -EFAULT;
}
- puiArgs = (uint32_t *)arg;
- uiCmd = puiArgs[PVR_DRM_DISP_ARG_CMD];
- uiPVRDevID = puiArgs[PVR_DRM_DISP_ARG_DEV];
+ psArgs = (drm_pvr_display_cmd *)arg;
- psDevInfo = OMAPLFBPVRDevIDToDevInfo(uiPVRDevID);
+ psDevInfo = OMAPLFBPVRDevIDToDevInfo(psArgs->dev);
if (psDevInfo == NULL)
{
return -EINVAL;
}
- switch (uiCmd)
+ switch (psArgs->cmd)
{
case PVR_DRM_DISP_CMD_LEAVE_VT:
case PVR_DRM_DISP_CMD_ENTER_VT:
{
- OMAPLFB_BOOL bLeaveVT = (uiCmd == PVR_DRM_DISP_CMD_LEAVE_VT);
+ OMAPLFB_BOOL bLeaveVT = (psArgs->cmd == PVR_DRM_DISP_CMD_LEAVE_VT);
DEBUG_PRINTK((KERN_WARNING DRIVER_PREFIX ": %s: PVR Device %u: %s\n",
- __FUNCTION__, uiPVRDevID,
+ __FUNCTION__, psArgs->dev,
bLeaveVT ? "Leave VT" : "Enter VT"));
OMAPLFBCreateSwapChainLock(psDevInfo);
@@ -1056,7 +1171,7 @@ int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(struct drm_device unref__ *dev,
#if defined(DEBUG)
{
const char *pszMode;
- switch(uiCmd)
+ switch(psArgs->cmd)
{
case PVR_DRM_DISP_CMD_ON:
pszMode = "On";
@@ -1075,10 +1190,10 @@ int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(struct drm_device unref__ *dev,
break;
}
printk(KERN_WARNING DRIVER_PREFIX ": %s: PVR Device %u: Display %s\n",
- __FUNCTION__, uiPVRDevID, pszMode);
+ __FUNCTION__, psArgs->dev, pszMode);
}
#endif
- switch(uiCmd)
+ switch(psArgs->cmd)
{
case PVR_DRM_DISP_CMD_ON:
iFBMode = FB_BLANK_UNBLANK;
@@ -1103,9 +1218,19 @@ int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(struct drm_device unref__ *dev,
flush_workqueue(psDevInfo->psSwapChain->psWorkQueue);
}
- OMAPLFB_CONSOLE_LOCK();
- ret = fb_blank(psDevInfo->psLINFBInfo, iFBMode);
- OMAPLFB_CONSOLE_UNLOCK();
+ if (!lock_fb_info(psDevInfo->psLINFBInfo))
+ {
+ ret = -ENODEV;
+ }
+ else
+ {
+ OMAPLFB_CONSOLE_LOCK();
+ psDevInfo->psLINFBInfo->flags |= FBINFO_MISC_USEREVENT;
+ ret = fb_blank(psDevInfo->psLINFBInfo, iFBMode);
+ psDevInfo->psLINFBInfo->flags &= ~FBINFO_MISC_USEREVENT;
+ OMAPLFB_CONSOLE_UNLOCK();
+ unlock_fb_info(psDevInfo->psLINFBInfo);
+ }
OMAPLFBCreateSwapChainUnLock(psDevInfo);
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/3rdparty_dc_drm_shared.h b/eurasia_km/services4/3rdparty/dc_poulsbo/3rdparty_dc_drm_shared.h
new file mode 100644
index 0000000..dfac6ad
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/3rdparty_dc_drm_shared.h
@@ -0,0 +1,75 @@
+/*************************************************************************/ /*!
+@Title Poulsbo Linux display driver shared DRM structures
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Poulsbo Linux display driver DRM structures shared between
+ kernel and user space.
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+#if !defined(__3RDPARTY_DC_DRM_SHARED_H__)
+#define __3RDPARTY_DC_DRM_SHARED_H__
+
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) || defined(PVR_USE_DISPLAY_CONTROLLER_DRM_IOCTL)
+#define PVR_DRM_DISP_CMD_ENTER_VT 1
+#define PVR_DRM_DISP_CMD_LEAVE_VT 2
+#define PVR_DRM_DISP_CMD_CURSOR_LOAD 3
+
+
+struct pvr_drm_cursor_load_data
+{
+ uint32_t ui32ByteSize;
+ uint64_t ui64CursorData;
+};
+
+struct pvr_drm_display_args
+{
+ uint32_t ui32Cmd;
+ uint32_t ui32DevId;
+ union
+ {
+ struct pvr_drm_cursor_load_data sCursorLoad;
+ };
+};
+
+typedef struct pvr_drm_display_args drm_pvr_display_cmd;
+#endif /* defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) || defined(PVR_USE_DISPLAY_CONTROLLER_DRM_IOCTL) */
+
+#endif /* __3RDPARTY_DC_DRM_SHARED_H__ */
+
+/******************************************************************************
+ End of file (3rdparty_dc_drm_shared.h)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/Kbuild.mk b/eurasia_km/services4/3rdparty/dc_poulsbo/Kbuild.mk
new file mode 100644
index 0000000..6343d2f
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/Kbuild.mk
@@ -0,0 +1,73 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+ifdef SUPPORT_DRI_DRM
+KERNEL_VERSION_MIN := 3
+KERNEL_PATCHLEVEL_MIN := 2
+KERNEL_SUBLEVEL_MIN := 0
+
+define kernel-version-at-least
+$(shell set -- $; $(VERSION) $(PATCHLEVEL) $(SUBLEVEL); \
+ Y=true; \
+ for D in $1 $2 $3; \
+ do \
+ [ $$1 ] || break; \
+ [ $$1 -eq $$D ] && { shift; continue; };\
+ [ $$1 -lt $$D ] && Y=; \
+ break; \
+ done; \
+ echo $$Y)
+endef
+
+$(if $(call kernel-version-at-least,$(KERNEL_VERSION_MIN),$(KERNEL_PATCHLEVEL_MIN),$(KERNEL_SUBLEVEL_MIN)),, \
+ $(error Found kernel version $(VERSION).$(PATCHLEVEL).$(SUBLEVEL) but need kernel >= $(KERNEL_VERSION_MIN).$(KERNEL_PATCHLEVEL_MIN).$(KERNEL_SUBLEVEL_MIN). \
+ Please upgrade your kernel and rebuild the driver))
+endif
+
+
+ccflags-y += \
+ -I$(TOP)/services4/3rdparty/dc_poulsbo
+
+dc_poulsbo-y += \
+ services4/3rdparty/dc_poulsbo/poulsbo_displayclass.o \
+ services4/3rdparty/dc_poulsbo/poulsbo_linux.o \
+ services4/3rdparty/dc_poulsbo/poulsbo_linux_sdvo.o \
+ services4/3rdparty/dc_poulsbo/poulsbo_linux_lvds.o \
+ services4/3rdparty/dc_poulsbo/poulsbo_linux_crt.o
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/Linux.mk b/eurasia_km/services4/3rdparty/dc_poulsbo/Linux.mk
new file mode 100644
index 0000000..fc6e4fb
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/Linux.mk
@@ -0,0 +1,45 @@
+########################################################################### ###
+#@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+#@License Dual MIT/GPLv2
+#
+# The contents of this file are subject to the MIT license as set out below.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# Alternatively, the contents of this file may be used under the terms of
+# the GNU General Public License Version 2 ("GPL") in which case the provisions
+# of GPL are applicable instead of those above.
+#
+# If you wish to allow use of your version of this file only under the terms of
+# GPL, and not to allow others to use your version of this file under the terms
+# of the MIT license, indicate your decision by deleting the provisions above
+# and replace them with the notice and other provisions required by GPL as set
+# out in the file called "GPL-COPYING" included in this distribution. If you do
+# not delete the provisions above, a recipient may use your version of this file
+# under the terms of either the MIT license or GPL.
+#
+# This License is also included in this distribution in the file called
+# "MIT-COPYING".
+#
+# EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+# PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+# BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+# PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+### ###########################################################################
+
+modules := dc_poulsbo
+
+dc_poulsbo_type := kernel_module
+dc_poulsbo_target := dc_poulsbo.ko
+dc_poulsbo_makefile := $(THIS_DIR)/Kbuild.mk
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/dc_poulsbo.h b/eurasia_km/services4/3rdparty/dc_poulsbo/dc_poulsbo.h
new file mode 100644
index 0000000..5622dbc
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/dc_poulsbo.h
@@ -0,0 +1,791 @@
+/*************************************************************************/ /*!
+@Title Poulsbo Display kernel driver structures and prototypes
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Poulsbo Display kernel driver structures and prototypes
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+#if !defined(__DC_POULSBO_H__)
+#define __DC_POULSBO_H__
+
+#include "img_defs.h"
+#include "servicesext.h"
+#include "kerneldisplay.h"
+#include "poulsbo_regs.h"
+
+#if defined(SUPPORT_DRI_DRM)
+#include <linux/version.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_fb_helper.h>
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+#include <linux/pci.h>
+
+#define MAKESTRING(x) #x
+#define TOSTRING(x) MAKESTRING(x)
+
+#if !defined(DISPLAY_CONTROLLER)
+#define DISPLAY_CONTROLLER dc_poulsbo
+#endif
+
+#define DRVNAME TOSTRING(DISPLAY_CONTROLLER)
+
+#define DISPLAY_DEVICE_NAME "DC_POULSBO"
+
+#if defined(SUPPORT_DRI_DRM)
+#if defined(PVRPSB_WIDTH) && !defined(PVRPSB_HEIGHT)
+#error ERROR: PVRPSB_HEIGHT not defined
+#elif !defined(PVRPSB_WIDTH) && defined(PVRPSB_HEIGHT)
+#error ERROR: PVRPSB_WIDTH not defined
+#endif
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+
+#if !defined(MAX)
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#endif
+
+#if !defined(MIN)
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+#endif
+
+#if !defined(ABS)
+#define ABS(v) (((v) > 0) ? (v) : -(v))
+#endif
+
+#define PVRPSB_ALIGN(value, align) (((value) + ((align) - 1)) & ~((align) - 1))
+
+
+#define PVRPSB_MAX_FORMATS (1)
+#define PVRPSB_MAX_DIMS (1)
+#define PVRPSB_MAX_SWAPCHAINS (1)
+
+#define PVRPSB_MIN_SWAP_INTERVAL (0)
+#define PVRPSB_MAX_SWAP_INTERVAL (10) /* Arbitary choice */
+
+#if defined(USE_PRIMARY_SURFACE_IN_FLIP_CHAIN)
+#define PVRPSB_MAX_BACKBUFFERS (2)
+#else
+#define PVRPSB_MAX_BACKBUFFERS (3)
+#endif
+
+#define PVRPSB_FB_WIDTH_MIN (0)
+#define PVRPSB_FB_WIDTH_MAX (2048)
+#define PVRPSB_FB_HEIGHT_MIN (0)
+#define PVRPSB_FB_HEIGHT_MAX (2048)
+
+#define PVRPSB_HW_CURSOR_WIDTH (64)
+#define PVRPSB_HW_CURSOR_HEIGHT (64)
+#define PVRPSB_HW_CURSOR_STRIDE (PVRPSB_HW_CURSOR_WIDTH * 4) /* Support ARGB */
+
+#define PVRPSB_PAGE_SHIFT (12)
+#define PVRPSB_PAGE_SIZE (1UL << PVRPSB_PAGE_SHIFT)
+#define PVRPSB_PAGE_MASK (~(PVRPSB_PAGE_SIZE - 1))
+#define PVRPSB_PAGE_ALIGN(addr) PVRPSB_ALIGN((addr), PVRPSB_PAGE_SIZE)
+
+/******************************************************************************
+ * Device information
+ *****************************************************************************/
+
+/* Fixed Bus/DeviceID/Func for accessing GMA500 PCI Config Space within the
+ Intel SCH (which comprises other devices too - not just the GMA500) */
+#define PVRPSB_BUS_ID (0)
+#define PVRPSB_DEV_ID (2)
+#define PVRPSB_FUNC (0)
+
+#define PVRPSB_PCIREG_OFFSET (0)
+
+/* Names of Registers in GMA500's PCI Config Space */
+#define PVRPSB_PCIREG_PCICMD (0x04)
+#define PVRPSB_PCIREG_MEM_BASE (0x10)
+#define PVRPSB_PCIREG_GMEM_BASE (0x18)
+#define PVRPSB_PCIREG_GTT_BASE (0x1C)
+#define PVRPSB_PCIREG_GC (0x52)
+#define PVRPSB_PCIREG_BSM (0x5C)
+#define PVRPSB_PCIREG_MSAC (0x62)
+#define PVRPSB_PCIREG_ASLS (0xFC)
+
+/* PSB GMA Registers (MEM_BASE) */
+#define PVRPSB_PCI_BAR_IDX_MEM_BASE (0)
+
+/* PSB IO Registers (IO_BASE) */
+#define PVRPSB_PCI_BAR_IDX_IO_BASE (1)
+
+/* PSB Graphics Aperture (GMEM_BASE) */
+#define PVRPSB_PCI_BAR_IDX_GMEM_BASE (2)
+
+/* PSB IOMMU (GTT_BASE) */
+#define PVRPSB_PCI_BAR_IDX_GTT_BASE (3)
+
+/******************************************************************************
+ * I2C information
+ *****************************************************************************/
+#define PVRPSB_I2C_ADDR_SDVO_B (0x38)
+
+/* I2C message buffers consist of a byte pair. The
+ first byte should be one of the values below. */
+#define PVRPSB_I2C_ARG7 (0x00)
+#define PVRPSB_I2C_ARG6 (0x01)
+#define PVRPSB_I2C_ARG5 (0x02)
+#define PVRPSB_I2C_ARG4 (0x03)
+#define PVRPSB_I2C_ARG3 (0x04)
+#define PVRPSB_I2C_ARG2 (0x05)
+#define PVRPSB_I2C_ARG1 (0x06)
+#define PVRPSB_I2C_ARG0 (0x07)
+
+#define PVRPSB_I2C_CMD (0x08)
+#define PVRPSB_I2C_STATUS (0x09)
+
+#define PVRPSB_I2C_RETURN0 (0x0A)
+#define PVRPSB_I2C_RETURN1 (0x0B)
+#define PVRPSB_I2C_RETURN2 (0x0C)
+#define PVRPSB_I2C_RETURN3 (0x0D)
+#define PVRPSB_I2C_RETURN4 (0x0E)
+#define PVRPSB_I2C_RETURN5 (0x0F)
+#define PVRPSB_I2C_RETURN6 (0x10)
+#define PVRPSB_I2C_RETURN7 (0x11)
+
+/* If the first I2C message buffer byte is PVRPSB_I2C_CMD
+ then the second byte should be one of the values below. */
+#define PVRPSB_I2C_CMD_RESET (0x01)
+#define PVRPSB_I2C_CMD_GETDEVICECAPS (0x02)
+#define PVRPSB_I2C_CMD_GETTRAINEDINPUTS (0x03)
+#define PVRPSB_I2C_CMD_GETACTIVEENCODERS (0x04)
+#define PVRPSB_I2C_CMD_SETACTIVEENCODERS (0x05)
+#define PVRPSB_I2C_CMD_GETINOUTMAP (0x06)
+#define PVRPSB_I2C_CMD_SETINOUTMAP (0x07)
+#define PVRPSB_I2C_CMD_GETATTACHEDDISPLAYS (0x0B)
+#define PVRPSB_I2C_CMD_SETTARGETINPUT (0x10)
+#define PVRPSB_I2C_CMD_SETTARGETOUTPUT (0x11)
+#define PVRPSB_I2C_CMD_GETINPUTTIMINGS1 (0x12)
+#define PVRPSB_I2C_CMD_GETINPUTTIMINGS2 (0x13)
+#define PVRPSB_I2C_CMD_SETINPUTTIMINGS1 (0x14)
+#define PVRPSB_I2C_CMD_SETINPUTTIMINGS2 (0x15)
+#define PVRPSB_I2C_CMD_GETOUTPUTTIMINGS1 (0x16)
+#define PVRPSB_I2C_CMD_GETOUTPUTTIMINGS2 (0x17)
+#define PVRPSB_I2C_CMD_SETOUTPUTTIMINGS1 (0x18)
+#define PVRPSB_I2C_CMD_SETOUTPUTTIMINGS2 (0x19)
+#define PVRPSB_I2C_CMD_GETCLOCKMULTI (0x20)
+#define PVRPSB_I2C_CMD_SETCLOCKMULTI (0x21)
+#define PVRPSB_I2C_CMD_BUSSWITCH (0x7A)
+
+/* Encoder types */
+#define PVRPSB_ENCODER_NONE (0)
+#define PVRPSB_ENCODER_TMDS0 (1 << 0)
+#define PVRPSB_ENCODER_RGB0 (1 << 1)
+#define PVRPSB_ENCODER_CVBS0 (1 << 2)
+#define PVRPSB_ENCODER_SVID0 (1 << 3)
+#define PVRPSB_ENCODER_YPRPB0 (1 << 4)
+#define PVRPSB_ENCODER_SCART0 (1 << 5)
+#define PVRPSB_ENCODER_LVDS0 (1 << 6)
+#define PVRPSB_ENCODER_TMDS1 (1 << 8)
+#define PVRPSB_ENCODER_RGB1 (1 << 9)
+#define PVRPSB_ENCODER_CVBS1 (1 << 10)
+#define PVRPSB_ENCODER_SVID1 (1 << 11)
+#define PVRPSB_ENCODER_YPRPB1 (1 << 12)
+#define PVRPSB_ENCODER_SCART1 (1 << 13)
+#define PVRPSB_ENCODER_LVDS1 (1 << 14)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/******************************************************************************
+ * Structs and enums
+ *****************************************************************************/
+
+typedef void *PSB_HANDLE;
+
+typedef enum PSB_BOOL_TAG
+{
+ PSB_FALSE = 0,
+ PSB_TRUE = 1,
+} PSB_BOOL, *PSB_PBOOL;
+
+typedef enum PSB_ERROR_TAG
+{
+ PSB_OK = 0,
+ PSB_ERROR_GENERIC = 1,
+ PSB_ERROR_OUT_OF_MEMORY = 2,
+ PSB_ERROR_TOO_FEW_BUFFERS = 3,
+ PSB_ERROR_INVALID_PARAMS = 4,
+ PSB_ERROR_INIT_FAILURE = 5,
+ PSB_ERROR_CANT_REGISTER_CALLBACK = 6,
+ PSB_ERROR_INVALID_DEVICE = 7,
+ PSB_ERROR_DEVICE_REGISTER_FAILED = 8
+} PSB_ERROR;
+
+typedef enum PVRPSB_DEVICE_TAG
+{
+ PSB_UNKNOWN = 0,
+ PSB_POULSBO = 1,
+ PSB_CEDARVIEW = 2
+} PVRPSB_DEVICE;
+
+typedef enum PVRPSB_PORT_TAG
+{
+ PSB_PORT_ANALOG = 0,
+ PSB_PORT_SDVO_B = 1,
+ PSB_PORT_SDVO_C = 2,
+ PSB_PORT_LVDS = 3
+} PVRPSB_PORT;
+
+typedef enum PVRPSB_PIPE_TAG
+{
+ PSB_PIPE_A = 0,
+ PSB_PIPE_B = 1
+} PVRPSB_PIPE;
+
+
+#if defined(SUPPORT_DRI_DRM)
+typedef struct __attribute__ ((__packed__)) PVRPSB_DEVICE_CAPS_TAG
+{
+ IMG_UINT8 ui8VendorID;
+ IMG_UINT8 ui8DeviceID;
+ IMG_UINT8 ui8DeviceRevisionID;
+ IMG_UINT8 ui8VersionMajor;
+ IMG_UINT8 ui8VersionMinor;
+
+ IMG_UINT8 inputMask:2;
+ IMG_UINT8 smoothScaling:1;
+ IMG_UINT8 sharpScaling:1;
+ IMG_UINT8 upScaling:1;
+ IMG_UINT8 downScaling:1;
+ IMG_UINT8 stallSupport:1;
+ IMG_UINT8 padding:1;
+
+ IMG_UINT16 ui16OutputFlags;
+} PVRPSB_DEVICE_CAPS;
+
+typedef struct __attribute__ ((__packed__)) PVRPSB_TIMINGS1_TAG
+{
+ IMG_UINT16 ui16Clock; /* 15-0: Dot clock divided by 10 */
+ IMG_UINT8 ui8WidthLower; /* 7-0: Lower 8 bits of the width (horizontal active) */
+ IMG_UINT8 ui8HBlankLower; /* 7-0: Lower 8 bits of the horizontal blank period/length */
+ IMG_UINT8 ui8WidthHBlankHigh; /* 7-4: Upper 4 bits of the width
+ 3-0: Upper 4 bits of the horizontal blank period/length */
+ IMG_UINT8 ui8HeightLower; /* 7-0: Lower 8 bits of the height (vertical active) */
+ IMG_UINT8 ui8VBlankLower; /* 7-0: Lower 8 bits of the vertical blank period/length */
+ IMG_UINT8 ui8HeightVBlankHigh; /* 7-4: Upper 4 bits of the height
+ 3-0: Upper 4 bits of the vertical blank period/length */
+} PVRPSB_TIMINGS1;
+
+typedef struct __attribute__ ((__packed__)) PVRPSB_TIMINGS2_TAG
+{
+ IMG_UINT8 ui8HFrontPorchLower; /* 7-0: Lower 8 bits of the horizontal front porch period */
+ IMG_UINT8 ui8HSyncLower; /* 7-0: Lower 8 bits of the horizontal sync period */
+ IMG_UINT8 ui8VFrontPorchSync; /* 7-4: Lower 4 bits of the vertical front porch period
+ 3-0: Lower 4 bits of the vertical sync period */
+ IMG_UINT8 ui8FrontPorchSyncHigh; /* 7-6: Upper 2 bits of the horizontal front porch period
+ 5-4: Upper 2 bits of the horizontal sync period
+ 3-2: Next 2 bits of the vertical front porch period
+ 1-0: Upper 2 bits of the vertical sync period */
+ IMG_UINT8 ui8DTDFlags; /* 7-0: Detailed Timing Descriptor flags */
+ IMG_UINT8 ui8SDVOFlags; /* 7-0: SDVO flags */
+ IMG_UINT8 ui8VFrontPorchHigh; /* 7-6: Upper 2 bits of the vertical front porch period
+ 5-0: Should be set to 0 */
+ IMG_UINT8 ui8Padding; /* 7-0: This is used to pad the structure to 2 DWords (it should be set to 0) */
+} PVRPSB_TIMINGS2;
+
+typedef struct __attribute__ ((__packed__)) PVRPSB_TARGET_INTPUT_TAG
+{
+ IMG_UINT8 target:1;
+ IMG_UINT8 padding:7;
+} PVRPSB_TARGET_INPUT;
+
+
+typedef struct PVRPSB_STATE_TAG
+{
+ struct
+ {
+ IMG_UINT16 ui16GraphicsControl;
+ IMG_UINT32 ui32StolenMemBase;
+ IMG_UINT32 ui32ASLStorage;
+ } sPciRegisters;
+
+ struct
+ {
+ IMG_UINT32 ui32PgTblValue;
+ IMG_UINT32 *pui32GTTContents;
+
+ IMG_UINT32 ui32OvAdd;
+ IMG_UINT32 ui32OGamC0;
+ IMG_UINT32 ui32OGamC1;
+ IMG_UINT32 ui32OGamC2;
+ IMG_UINT32 ui32OGamC3;
+ IMG_UINT32 ui32OGamC4;
+ IMG_UINT32 ui32OGamC5;
+
+ IMG_UINT32 ui32DspArb;
+ IMG_UINT32 ui32DspFW1;
+ IMG_UINT32 ui32DspFW2;
+ IMG_UINT32 ui32DspFW3;
+ IMG_UINT32 ui32DspFW4;
+ IMG_UINT32 ui32DspFW5;
+ IMG_UINT32 ui32DspFW6;
+ IMG_UINT32 ui32DspChicken;
+ } sDevRegisters;
+} PVRPSB_STATE;
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+typedef struct PVRPSB_BUFFER_TAG
+{
+ IMG_UINT32 ui32Size;
+ PSB_BOOL bIsContiguous;
+
+ /* If the buffer is contiguous we need only the physical
+ start address. Otherwise we need the physical address
+ of each page that makes up the buffer. */
+ union
+ {
+ IMG_SYS_PHYADDR sCont;
+ IMG_SYS_PHYADDR *psNonCont;
+ } uSysAddr;
+
+ IMG_DEV_VIRTADDR sDevVAddr;
+ IMG_CPU_VIRTADDR pvCPUVAddr;
+
+ PVRSRV_SYNC_DATA *psSyncData;
+} PVRPSB_BUFFER;
+
+typedef struct PVRPSB_CURSOR_INFO_TAG
+{
+ PVRPSB_BUFFER *psBuffer;
+
+ IMG_UINT32 ui32Width;
+ IMG_UINT32 ui32Height;
+
+ IMG_INT32 i32X;
+ IMG_INT32 i32Y;
+
+ IMG_UINT32 ui32Mode;
+ IMG_BOOL bLoaded;
+} PVRPSB_CURSOR_INFO;
+
+/* Flip item structure used for queuing of flips */
+typedef struct PVRPSB_VSYNC_FLIP_ITEM_TAG
+{
+ /* Command complete cookie to be passed to services
+ command complete callback function */
+ PSB_HANDLE hCmdComplete;
+
+ PVRPSB_BUFFER *psBuffer;
+
+ /* Number of frames for which this item should be displayed */
+ IMG_UINT32 ui32SwapInterval;
+
+ PSB_BOOL bValid;
+
+ PSB_BOOL bFlipped;
+
+ PSB_BOOL bCmdCompleted;
+} PVRPSB_VSYNC_FLIP_ITEM;
+
+/* PVRPSB buffer structure */
+typedef struct PVRPSB_SWAPCHAIN_TAG
+{
+ IMG_UINT32 ui32ID;
+
+ IMG_UINT32 ui32BufferCount;
+ PVRPSB_BUFFER *psBuffer;
+
+ /* Set of vsync flip items - enough for 1
+ outstanding flip per buffer */
+ PVRPSB_VSYNC_FLIP_ITEM *psVSyncFlipItems;
+
+ /* Insert index for the internal queue of flip items */
+ IMG_UINT32 ui32InsertIndex;
+
+ /* Remove index for the internal queue of flip items */
+ IMG_UINT32 ui32RemoveIndex;
+} PVRPSB_SWAPCHAIN;
+
+typedef struct PVRPSB_GTT_INFO_TAG
+{
+ IMG_SYS_PHYADDR sGTTSysAddr;
+ IMG_CPU_VIRTADDR pvGTTCPUVAddr;
+ IMG_UINT32 ui32GTTSize;
+ IMG_UINT32 ui32GTTOffset;
+
+ IMG_DEV_VIRTADDR sGMemDevVAddr;
+ IMG_UINT32 ui32GMemSizeInPages;
+
+ IMG_SYS_PHYADDR sStolenSysAddr;
+ IMG_UINT32 ui32StolenSizeInPages;
+ IMG_UINT32 ui32StolenPageOffset;
+} PVRPSB_GTT_INFO;
+
+typedef struct PLL_FREQ_TAG
+{
+ IMG_UINT32 ui32Clock;
+ IMG_UINT32 ui32Vco;
+ IMG_UINT32 ui32M1;
+ IMG_UINT32 ui32M2;
+ IMG_UINT32 ui32N;
+ IMG_UINT32 ui32P1;
+ IMG_UINT32 ui32P2;
+} PLL_FREQ;
+
+/* Kernel device information structure */
+typedef struct PVRPSB_DEVINFO_TAG
+{
+ PVRPSB_DEVICE eDevice;
+
+ /* Device ID assigned by services */
+ IMG_UINT32 ui32ID;
+
+ PVRSRV_DC_DISP2SRV_KMJTABLE sPVRJTable;
+ PVRSRV_DC_SRV2DISP_KMJTABLE sDCJTable;
+
+ PVRPSB_GTT_INFO sGTTInfo;
+
+ IMG_SYS_PHYADDR sRegSysAddr;
+ IMG_CPU_VIRTADDR pvRegCPUVAddr;
+
+ DISPLAY_INFO sDisplayInfo;
+ DISPLAY_FORMAT sDisplayFormat;
+ DISPLAY_DIMS sDisplayDims;
+
+ /* List of supported display formats */
+ IMG_UINT32 ui32NumFormats;
+ DISPLAY_FORMAT asDisplayFormatList[PVRPSB_MAX_FORMATS];
+
+ /* List of supported display dimensions */
+ IMG_UINT32 ui32NumDims;
+ DISPLAY_DIMS asDisplayDimList[PVRPSB_MAX_DIMS];
+
+ PVRPSB_BUFFER *psSystemBuffer;
+ PVRPSB_BUFFER *psCurrentBuffer;
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL)
+ PVRPSB_BUFFER *psSavedBuffer;
+
+ PSB_BOOL bLeaveVT;
+#endif
+
+ PVRPSB_PIPE eActivePipe;
+
+ /* Back buffer info */
+ IMG_UINT32 ui32TotalBackBuffers;
+ PVRPSB_BUFFER *apsBackBuffers[PVRPSB_MAX_BACKBUFFERS];
+
+ /* Only one swapchain supported by this device so hang it here */
+ PVRPSB_SWAPCHAIN *psSwapChain;
+
+ /* True if PVR is flushing its command queues */
+ PSB_BOOL bFlushCommands;
+
+ PVRPSB_CURSOR_INFO sCursorInfo;
+
+#if defined(SUPPORT_DRI_DRM)
+ struct drm_device *psDrmDev;
+ struct drm_fb_helper sDrmFbHelper;
+
+ PVRPSB_STATE sSuspendState;
+
+ PVRPSB_DEVICE_CAPS sSdvoCapabilities;
+#else
+ struct pci_dev *psPciDev;
+#endif
+
+ IMG_UINT32 ui32RefCount;
+} PVRPSB_DEVINFO;
+
+typedef struct PVRPSB_PLL_RANGE_TAG
+{
+ PVRPSB_DEVICE eDevice;
+
+ IMG_UINT32 ui32DotClockMin;
+ IMG_UINT32 ui32DotClockMax;
+
+ IMG_UINT32 ui32RefFreq;
+
+ IMG_UINT32 ui32NMin;
+ IMG_UINT32 ui32NMax;
+
+ IMG_UINT32 ui32MMin;
+ IMG_UINT32 ui32MMax;
+ IMG_UINT32 ui32M1Min;
+ IMG_UINT32 ui32M1Max;
+ IMG_UINT32 ui32M2Min;
+ IMG_UINT32 ui32M2Max;
+
+ IMG_UINT32 ui32PMin;
+ IMG_UINT32 ui32PMax;
+ IMG_UINT32 ui32P1Min;
+ IMG_UINT32 ui32P1Max;
+ IMG_UINT32 ui32P2Divide;
+ IMG_UINT32 ui32P2Lo;
+ IMG_UINT32 ui32P2Hi;
+
+ IMG_UINT32 ui32VcoMin;
+ IMG_UINT32 ui32VcoMax;
+} PVRPSB_PLL_RANGE;
+
+
+/******************************************************************************
+ * Cedarview PLL ranges
+ *****************************************************************************/
+static const PVRPSB_PLL_RANGE sCdvSingleLvdsPllRange =
+{
+ .eDevice = PSB_CEDARVIEW,
+ .ui32DotClockMin = 20000,
+ .ui32DotClockMax = 115500,
+ .ui32RefFreq = 96000,
+ .ui32NMin = 2,
+ .ui32NMax = 6,
+ .ui32MMin = 60,
+ .ui32MMax = 160,
+ .ui32M1Min = 0,
+ .ui32M1Max = 0,
+ .ui32M2Min = 58,
+ .ui32M2Max = 158,
+ .ui32PMin = 28,
+ .ui32PMax = 140,
+ .ui32P1Min = 2,
+ .ui32P1Max = 10,
+ .ui32P2Divide = 200000,
+ .ui32P2Lo = 14,
+ .ui32P2Hi = 14,
+ .ui32VcoMin = 1800000,
+ .ui32VcoMax = 3600000,
+};
+
+static const PVRPSB_PLL_RANGE sCdvNonLvds27PllRange =
+{
+ .eDevice = PSB_CEDARVIEW,
+ .ui32DotClockMin = 20000,
+ .ui32DotClockMax = 400000,
+ .ui32RefFreq = 27000,
+ .ui32NMin = 1,
+ .ui32NMax = 1,
+ .ui32MMin = 67,
+ .ui32MMax = 132,
+ .ui32M1Min = 0,
+ .ui32M1Max = 0,
+ .ui32M2Min = 65,
+ .ui32M2Max = 130,
+ .ui32PMin = 5,
+ .ui32PMax = 90,
+ .ui32P1Min = 1,
+ .ui32P1Max = 9,
+ .ui32P2Divide = 225000,
+ .ui32P2Lo = 5,
+ .ui32P2Hi = 10,
+ .ui32VcoMin = 1809000,
+ .ui32VcoMax = 3564000,
+};
+
+static const PVRPSB_PLL_RANGE sCdvNonLvds96PllRange =
+{
+ .eDevice = PSB_CEDARVIEW,
+ .ui32DotClockMin = 20000,
+ .ui32DotClockMax = 400000,
+ .ui32RefFreq = 96000,
+ .ui32NMin = 2,
+ .ui32NMax = 6,
+ .ui32MMin = 60,
+ .ui32MMax = 160,
+ .ui32M1Min = 0,
+ .ui32M1Max = 0,
+ .ui32M2Min = 58,
+ .ui32M2Max = 158,
+ .ui32PMin = 5,
+ .ui32PMax = 100,
+ .ui32P1Min = 1,
+ .ui32P1Max = 10,
+ .ui32P2Divide = 225000,
+ .ui32P2Lo = 5,
+ .ui32P2Hi = 10,
+ .ui32VcoMin = 1800000,
+ .ui32VcoMax = 3600000,
+};
+
+
+/******************************************************************************
+ * Poulsbo PLL ranges
+ *****************************************************************************/
+static const PVRPSB_PLL_RANGE sPsbSingleLvdsPllRange =
+{
+ .eDevice = PSB_POULSBO,
+ .ui32DotClockMin = 20000,
+ .ui32DotClockMax = 112000,
+ .ui32RefFreq = 96000,
+ .ui32NMin = 2, /* The documentation says this value should be 3 but this can give the wrong vrefresh */
+ .ui32NMax = 8,
+ .ui32MMin = 70,
+ .ui32MMax = 120,
+ .ui32M1Min = 10,
+ .ui32M1Max = 20,
+ .ui32M2Min = 5,
+ .ui32M2Max = 9,
+ .ui32PMin = 7,
+ .ui32PMax = 98,
+ .ui32P1Min = 1,
+ .ui32P1Max = 8,
+ .ui32P2Divide = 112000,
+ .ui32P2Lo = 7,
+ .ui32P2Hi = 14,
+ .ui32VcoMin = 1400000,
+ .ui32VcoMax = 2800000,
+};
+
+static const PVRPSB_PLL_RANGE sPsbNonLvdsPllRange =
+{
+ .eDevice = PSB_POULSBO,
+ .ui32DotClockMin = 100000,
+ .ui32DotClockMax = 270000,
+ .ui32RefFreq = 96000,
+ .ui32NMin = 2, /* The documentation says this value should be 3 but this can give the wrong vrefresh */
+ .ui32NMax = 8,
+ .ui32MMin = 70,
+ .ui32MMax = 120,
+ .ui32M1Min = 10,
+ .ui32M1Max = 20,
+ .ui32M2Min = 5,
+ .ui32M2Max = 9,
+ .ui32PMin = 5,
+ .ui32PMax = 80,
+ .ui32P1Min = 1,
+ .ui32P1Max = 8,
+ .ui32P2Divide = 200000,
+ .ui32P2Lo = 5,
+ .ui32P2Hi = 10,
+ .ui32VcoMin = 1400000,
+ .ui32VcoMax = 2800000,
+};
+
+
+/*******************************************************************************
+ * OS independent functions
+ ******************************************************************************/
+PSB_ERROR PVRPSBInit(PVRPSB_DEVINFO *psDevInfo);
+PSB_ERROR PVRPSBDeinit(PVRPSB_DEVINFO *psDevInfo);
+
+PVRPSB_DEVINFO *PVRPSBGetDevInfo(IMG_VOID);
+IMG_VOID PVRPSBSetDevInfo(PVRPSB_DEVINFO *psDevInfo);
+
+PVRPSB_BUFFER *PVRPSBCreateBuffer(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32BufferSize);
+void PVRPSBDestroyBuffer(PVRPSB_BUFFER *psBuffer);
+
+IMG_UINT32 PVRPSBGetBpp(PVRSRV_PIXEL_FORMAT ePixelFormat);
+
+PSB_BOOL PVRPSBSelectPLLFreq(IMG_UINT32 ui32DotClock, const PVRPSB_PLL_RANGE *psPllRange, PLL_FREQ *psPllFreq);
+
+PSB_ERROR PVRPSBFlip(PVRPSB_DEVINFO *psDevInfo, PVRPSB_BUFFER *psBuffer);
+void PVRPSBFlushInternalVSyncQueue(PVRPSB_DEVINFO *psDevInfo);
+
+#if defined(SYS_USING_INTERRUPTS)
+void PVRPSBEnableVSyncInterrupt(PVRPSB_DEVINFO *psDevInfo);
+void PVRPSBDisableVSyncInterrupt(PVRPSB_DEVINFO *psDevInfo);
+#endif /* #if defined(SYS_USING_INTERRUPTS) */
+
+#if defined(POULSBO_DEVICE_ISR)
+/* VSync ISR Functionality */
+PSB_ERROR PVRPSBInstallVsyncISR(PVRPSB_DEVINFO *psDevInfo);
+PSB_ERROR PVRPSBUninstallVsyncISR(PVRPSB_DEVINFO *psDevInfo);
+#endif /* #if defined(POULSBO_DEVICE_ISR) */
+
+
+/*******************************************************************************
+ * OS specific functions
+ ******************************************************************************/
+PSB_ERROR PVROSModeSetInit(PVRPSB_DEVINFO *psDevInfo);
+IMG_VOID PVROSModeSetDeinit(PVRPSB_DEVINFO *psDevInfo);
+
+void PVROSSaveState(PVRPSB_DEVINFO *psDevInfo);
+void PVROSRestoreState(PVRPSB_DEVINFO *psDevInfo);
+
+void PVROSDelayus(IMG_UINT32 ui32Timeus);
+void PVROSSleepms(IMG_UINT32 ui32Timems);
+
+void *PVROSAllocKernelMem(unsigned long ulSize);
+void *PVROSCallocKernelMem(unsigned long ulSize);
+void PVROSFreeKernelMem(void *pvMem);
+
+IMG_CPU_VIRTADDR PVROSAllocKernelMemForBuffer(unsigned long ulSize, IMG_SYS_PHYADDR *psSysAddr);
+IMG_VOID PVROSFreeKernelMemForBuffer(IMG_CPU_VIRTADDR pvCPUVAddr);
+
+/* Returns a CPU-Virtual address for the Sys-Phys address specified,
+ with the specified range of addresses mapped. */
+void *PVROSMapPhysAddr(IMG_SYS_PHYADDR sSysAddr, IMG_UINT32 ui32Size);
+void *PVROSMapPhysAddrWC(IMG_SYS_PHYADDR sSysAddr, IMG_UINT32 ui32Size);
+
+/* Unmap a virtual address range previously returned by MapPhysAddr */
+void PVROSUnMapPhysAddr(void *pvAddr);
+
+/* Read/Write DWords in GMA500 PCI Configuration Space - see Ch9 of
+ http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf and
+ http://download.intel.com/design/chipsets/embedded/datashts/321422.pdf */
+IMG_UINT32 PVROSPciReadDWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg);
+IMG_VOID PVROSPciWriteDWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT32 ui32Value);
+
+IMG_UINT16 PVROSPciReadWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg);
+IMG_VOID PVROSPciWriteWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT16 ui32Value);
+
+IMG_UINT8 PVROSPciReadByte(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg);
+IMG_VOID PVROSPciWriteByte(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT8 ui32Value);
+
+IMG_UINT32 PVROSReadIOMem(void *pvRegAddr);
+void PVROSWriteIOMem(void *pvRegAddr, IMG_UINT32 ui32Value);
+
+/*Read and Write to Memory-Mapped Display Registers (the set of registers
+ from Ch2 of http://intellinuxgraphics.org/VOL_3_display_registers_updated.pdf)
+ and also in Ch8 of http://intellinuxgraphics.org/VOL_1_graphics_core.pdf) */
+#define PVROSReadMMIOReg(psDevInfo, ui32RegOffset) \
+ PVROSReadIOMem((psDevInfo)->pvRegCPUVAddr + ui32RegOffset)
+
+#define PVROSWriteMMIOReg(psDevInfo, ui32RegOffset, ui32Value) \
+ PVROSWriteIOMem((psDevInfo)->pvRegCPUVAddr + ui32RegOffset, ui32Value)
+
+void PVROSSetIOMem(void *pvAddr, IMG_UINT8 ui8Value, IMG_UINT32 ui32Size);
+
+void PVROSCopyToIOMem(void *pvDstAddr, void *pvSrcAddr, IMG_UINT32 ui32Size);
+void PVROSCopyFromIOMem(void *pvDstAddr, void *pvSrcAddr, IMG_UINT32 ui32Size);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* #if !defined(__DC_POULSBO_H__) */
+
+/******************************************************************************
+ End of file (dc_poulsbo.h)
+******************************************************************************/
+
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_displayclass.c b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_displayclass.c
new file mode 100644
index 0000000..e377bf9
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_displayclass.c
@@ -0,0 +1,1828 @@
+/*************************************************************************/ /*!
+@Title Poulsbo driver display functions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/**************************************************************************
+ The 3rd party driver is a specification of an API to integrate the IMG POWERVR
+ Services driver with 3rd Party display hardware. It is NOT a specification for
+ a display controller driver, rather a specification to extend the API for a
+ pre-existing driver for the display hardware.
+
+ The 3rd party driver interface provides IMG POWERVR client drivers (e.g. PVR2D)
+ with an API abstraction of the system's underlying display hardware, allowing
+ the client drivers to indirectly control the display hardware and access its
+ associated memory.
+
+ Functions of the API include
+ - query primary surface attributes (width, height, stride, pixel format, CPU
+ physical and virtual address)
+ - swap/flip chain creation and subsequent query of surface attributes
+ - asynchronous display surface flipping, taking account of asynchronous read
+ (flip) and write (render) operations to the display surface
+
+ Note: having queried surface attributes the client drivers are able to map the
+ display memory to any IMG POWERVR Services device by calling
+ PVRSRVMapDeviceClassMemory with the display surface handle.
+
+ This code is intended to be an example of how a pre-existing display driver may
+ be extended to support the 3rd Party Display interface to POWERVR Services
+ - IMG is not providing a display driver implementation.
+ **************************************************************************/
+
+#include "dc_poulsbo.h"
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+/* Kernel services is a kernel module and must be loaded first.
+ The display controller driver is also a kernel module and must be loaded
+ after the PVR services module. The display controller driver should be able
+ to retrieve the address of the services PVRGetDisplayClassJTable from
+ (the already loaded) kernel services module. */
+
+/* The number of command types to register with PowerVR Services (1, flip) */
+#define PVRPSB_COMMAND_COUNT (1)
+
+/* Device PCI device IDs */
+static const IMG_UINT16 aui16PciDeviceIdMap[][2] =
+{
+ {0x8108, PSB_POULSBO},
+ {0x0BE0, PSB_CEDARVIEW},
+ {0x0BE1, PSB_CEDARVIEW},
+ {0x0BE2, PSB_CEDARVIEW},
+ { 0x0, PSB_UNKNOWN}
+};
+
+static IMG_VOID *gpvAnchor;
+
+
+/*******************************************************************************
+ * Helper functions
+ ******************************************************************************/
+
+static PVRPSB_DEVICE GetDevice(IMG_UINT16 ui16DevId)
+{
+ IMG_UINT32 ui32I;
+
+ for (ui32I = 0; aui16PciDeviceIdMap[ui32I][0] != 0; ui32I++)
+ {
+ if (aui16PciDeviceIdMap[ui32I][0] == ui16DevId)
+ {
+ return (PVRPSB_DEVICE)aui16PciDeviceIdMap[ui32I][1];
+ }
+ }
+
+ return PSB_UNKNOWN;
+}
+
+static IMG_UINT32 GetMemRegionSize(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg)
+{
+ IMG_UINT32 ui32SavedValue;
+ IMG_UINT32 ui32AddressRange;
+
+ ui32SavedValue = PVROSPciReadDWord(psDevInfo, ui32Reg);
+
+ PVROSPciWriteDWord(psDevInfo, ui32Reg, 0xFFFFFFFF);
+
+ ui32AddressRange = PVROSPciReadDWord(psDevInfo, ui32Reg);
+
+ PVROSPciWriteDWord(psDevInfo, ui32Reg, ui32SavedValue);
+
+ return ~(ui32AddressRange & 0xFFFFFFF0) + 1;
+}
+
+/* Advance an index into the Vsync flip array */
+static void AdvanceFlipIndex(PVRPSB_SWAPCHAIN *psSwapChain, IMG_UINT32 *pui32Index)
+{
+ (*pui32Index)++;
+
+ if (*pui32Index >= psSwapChain->ui32BufferCount)
+ {
+ *pui32Index = 0;
+ }
+}
+
+/* Flip to buffer function */
+PSB_ERROR PVRPSBFlip(PVRPSB_DEVINFO *psDevInfo, PVRPSB_BUFFER *psBuffer)
+{
+ if (psDevInfo != NULL)
+ {
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL)
+ if (psDevInfo->bLeaveVT == PSB_FALSE)
+#endif
+ {
+ IMG_UINT32 ui32Offset = psBuffer->sDevVAddr.uiAddr - psDevInfo->sGTTInfo.sGMemDevVAddr.uiAddr;
+
+ if (psDevInfo->eActivePipe == PSB_PIPE_A)
+ {
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPALINOFF, ui32Offset);
+ }
+ else
+ {
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBLINOFF, ui32Offset);
+ }
+
+ psDevInfo->psCurrentBuffer = psBuffer;
+ }
+
+ return PSB_OK;
+ }
+ else
+ {
+ return PSB_ERROR_INVALID_PARAMS;
+ }
+}
+
+#if defined(SYS_USING_INTERRUPTS)
+void PVRPSBEnableVSyncInterrupt(PVRPSB_DEVINFO *psDevInfo)
+{
+ IMG_UINT32 ui32InterruptEnable;
+ IMG_UINT32 ui32InterruptMask;
+
+ ui32InterruptEnable = PVROSReadMMIOReg(psDevInfo, PVRPSB_IER);
+ ui32InterruptMask = PVROSReadMMIOReg(psDevInfo, PVRPSB_IMR);
+
+ if (psDevInfo->eActivePipe == PSB_PIPE_A)
+ {
+ ui32InterruptEnable = PVRPSB_IER_PIPEA_ENABLE_SET(ui32InterruptEnable, 1);
+ ui32InterruptMask = PVRPSB_IMR_PIPEA_MASK_SET(ui32InterruptMask, 0);
+ }
+ else
+ {
+ ui32InterruptEnable = PVRPSB_IER_PIPEB_ENABLE_SET(ui32InterruptEnable, 1);
+ ui32InterruptMask = PVRPSB_IMR_PIPEB_MASK_SET(ui32InterruptMask, 0);
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_IER, ui32InterruptEnable);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_IMR, ui32InterruptMask);
+}
+
+void PVRPSBDisableVSyncInterrupt(PVRPSB_DEVINFO *psDevInfo)
+{
+ IMG_UINT32 ui32InterruptEnable;
+
+ ui32InterruptEnable = PVROSReadMMIOReg(psDevInfo, PVRPSB_IER);
+
+ if (psDevInfo->eActivePipe == PSB_PIPE_A)
+ {
+ ui32InterruptEnable = PVRPSB_IER_PIPEA_ENABLE_SET(ui32InterruptEnable, 0);
+ }
+ else
+ {
+ ui32InterruptEnable = PVRPSB_IER_PIPEB_ENABLE_SET(ui32InterruptEnable, 0);
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_IER, ui32InterruptEnable);
+}
+#endif /* SYS_USING_INTERRUPTS */
+
+static void ResetVSyncFlipItems(PVRPSB_SWAPCHAIN *psSwapChain)
+{
+ IMG_UINT32 ui32I;
+
+ psSwapChain->ui32InsertIndex = 0;
+ psSwapChain->ui32RemoveIndex = 0;
+
+ for (ui32I = 0; ui32I < psSwapChain->ui32BufferCount; ui32I++)
+ {
+ psSwapChain->psVSyncFlipItems[ui32I].bValid = PSB_FALSE;
+ psSwapChain->psVSyncFlipItems[ui32I].bFlipped = PSB_FALSE;
+ psSwapChain->psVSyncFlipItems[ui32I].bCmdCompleted = PSB_FALSE;
+ }
+}
+
+/* Function to flush all items out of the VSYNC queue.
+ Apply pfFlipAction on each flip item. */
+void PVRPSBFlushInternalVSyncQueue(PVRPSB_DEVINFO *psDevInfo)
+{
+ PVRPSB_SWAPCHAIN *psSwapChain = psDevInfo->psSwapChain;
+ PVRPSB_VSYNC_FLIP_ITEM *psFlipItem;
+
+#if defined(SYS_USING_INTERRUPTS)
+ /* Disable interrupts while we remove the internal vsync flip queue */
+ PVRPSBDisableVSyncInterrupt(psDevInfo);
+#endif
+
+ /* Need to flush any flips now pending in Internal queue */
+ psFlipItem = &psSwapChain->psVSyncFlipItems[psSwapChain->ui32RemoveIndex];
+
+ while (psFlipItem->bValid)
+ {
+ if (psFlipItem->bFlipped == PSB_FALSE)
+ {
+ /* Flip to new surface - flip latches on next interrupt */
+ PVRPSBFlip(psDevInfo, psFlipItem->psBuffer);
+ }
+
+ /* Command complete handler - allows dependencies for outstanding flips
+ to be updated - doesn't matter that vsync interrupts have been disabled. */
+ if (psFlipItem->bCmdCompleted == PSB_FALSE)
+ {
+ /* Don't schedule the MISR, by passing IMG_FALSE, as we're
+ just emptying the internal VsyncQueue */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete((IMG_HANDLE)psFlipItem->hCmdComplete, IMG_FALSE);
+ }
+
+ AdvanceFlipIndex(psSwapChain, &psSwapChain->ui32RemoveIndex);
+
+ /* Clear item state */
+ psFlipItem->bFlipped = PSB_FALSE;
+ psFlipItem->bCmdCompleted = PSB_FALSE;
+ psFlipItem->bValid = PSB_FALSE;
+
+ /* Update to next flip item */
+ psFlipItem = &psSwapChain->psVSyncFlipItems[psSwapChain->ui32RemoveIndex];
+ }
+
+ psSwapChain->ui32InsertIndex = 0;
+ psSwapChain->ui32RemoveIndex = 0;
+
+#if defined(SYS_USING_INTERRUPTS)
+ /* Enable interrupts */
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+#endif
+}
+
+
+/*******************************************************************************
+ * Functions called from services via the 3rd Party display class interface
+ ******************************************************************************/
+
+/* Open device function, called from services */
+static PVRSRV_ERROR OpenDCDevice(IMG_UINT32 ui32DeviceID,
+ IMG_HANDLE *phDevice,
+ PVRSRV_SYNC_DATA *psSystemBufferSyncData)
+{
+ PVRPSB_DEVINFO *psDevInfo = PVRPSBGetDevInfo();
+
+ if (psDevInfo->ui32ID == ui32DeviceID)
+ {
+ psDevInfo->psSystemBuffer->psSyncData = psSystemBufferSyncData;
+
+ *phDevice = (IMG_HANDLE)psDevInfo;
+
+ return PVRSRV_OK;
+ }
+ else
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+}
+
+/* Close device function, called from services */
+static PVRSRV_ERROR CloseDCDevice(IMG_HANDLE hDevice)
+{
+ PVR_UNREFERENCED_PARAMETER(hDevice);
+
+ return PVRSRV_OK;
+}
+
+/* Enumerate formats function, called from services */
+static PVRSRV_ERROR EnumDCFormats(IMG_HANDLE hDevice,
+ IMG_UINT32 *pui32NumFormats,
+ DISPLAY_FORMAT *psFormat)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+
+ if (!hDevice || !pui32NumFormats)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ *pui32NumFormats = (IMG_UINT32)psDevInfo->ui32NumFormats;
+
+ if (psFormat != IMG_NULL)
+ {
+ IMG_UINT32 ui32I;
+
+ for (ui32I = 0; ui32I < psDevInfo->ui32NumFormats; ui32I++)
+ {
+ psFormat[ui32I] = psDevInfo->asDisplayFormatList[ui32I];
+ }
+ }
+
+ return PVRSRV_OK;
+}
+
+
+/* Enumerate dims function, called from services */
+static PVRSRV_ERROR EnumDCDims(IMG_HANDLE hDevice,
+ DISPLAY_FORMAT *psFormat,
+ IMG_UINT32 *pui32NumDims,
+ DISPLAY_DIMS *psDim)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+
+ if (!hDevice || !psFormat || !pui32NumDims)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ *pui32NumDims = (IMG_UINT32)psDevInfo->ui32NumDims;
+
+ /* We have only one format so there's no need to check psFormat */
+ if (psDim != IMG_NULL)
+ {
+ IMG_UINT32 ui32I;
+
+ for (ui32I = 0; ui32I < psDevInfo->ui32NumDims; ui32I++)
+ {
+ psDim[ui32I] = psDevInfo->asDisplayDimList[ui32I];
+ }
+ }
+
+ return PVRSRV_OK;
+}
+
+/* Get the system buffer function, called from services */
+static PVRSRV_ERROR GetDCSystemBuffer(IMG_HANDLE hDevice, IMG_HANDLE *phBuffer)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+
+ if (!hDevice || !phBuffer)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ *phBuffer = (IMG_HANDLE)psDevInfo->psSystemBuffer;
+
+ return PVRSRV_OK;
+}
+
+static PVRSRV_ERROR GetDCInfo(IMG_HANDLE hDevice, DISPLAY_INFO *psDCInfo)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+
+ if (!hDevice || !psDCInfo)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ *psDCInfo = psDevInfo->sDisplayInfo;
+
+ return PVRSRV_OK;
+}
+
+/* get buffer address function, called from services */
+static PVRSRV_ERROR GetDCBufferAddr(IMG_HANDLE hDevice,
+ IMG_HANDLE hBuffer,
+ IMG_SYS_PHYADDR **ppsSysAddr,
+ IMG_UINT32 *pui32ByteSize,
+ IMG_VOID **ppvCpuVAddr,
+ IMG_HANDLE *phOSMapInfo,
+ IMG_BOOL *pbIsContiguous,
+ IMG_UINT32 *pui32TilingStride)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+ PVRPSB_BUFFER *psBuffer;
+
+ PVR_UNREFERENCED_PARAMETER(pui32TilingStride);
+
+ if (!hDevice || !hBuffer || !ppsSysAddr || !pui32ByteSize)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+ psBuffer = (PVRPSB_BUFFER *)hBuffer;
+
+ *pui32ByteSize = psBuffer->ui32Size;
+
+ if (psBuffer->bIsContiguous == PSB_TRUE)
+ {
+ *ppsSysAddr = &psBuffer->uSysAddr.sCont;
+ }
+ else
+ {
+ *ppsSysAddr = psBuffer->uSysAddr.psNonCont;
+ }
+
+ if (ppvCpuVAddr != IMG_NULL)
+ {
+ *ppvCpuVAddr = psBuffer->pvCPUVAddr;
+ }
+
+ if (phOSMapInfo != IMG_NULL)
+ {
+ *phOSMapInfo = (IMG_HANDLE)IMG_NULL;
+ }
+
+ if (pbIsContiguous != IMG_NULL)
+ {
+ *pbIsContiguous = (psBuffer->bIsContiguous == PSB_TRUE) ? IMG_TRUE : IMG_FALSE;
+ }
+
+ return PVRSRV_OK;
+}
+
+/** Create swapchain function, called from services
+ *
+ * @Sets up a swapchain with @p ui32BufferCount number of buffers in the flip chain.
+ * If USE_PRIMARY_SURFACE_IN_FLIP_CHAIN is #define'd, the first buffer is the primary
+ * (aka system) surface and (@p ui32BufferCount -1) back buffers are setup.
+ * If USE_PRIMARY_SURFACE_IN_FLIP_CHAIN is not #define'd, @p ui32BufferCount back buffers
+ * are setup.
+ */
+static PVRSRV_ERROR CreateDCSwapChain(IMG_HANDLE hDevice,
+ IMG_UINT32 ui32Flags,
+ DISPLAY_SURF_ATTRIBUTES *psDstSurfAttrib,
+ DISPLAY_SURF_ATTRIBUTES *psSrcSurfAttrib,
+ IMG_UINT32 ui32BufferCount,
+ PVRSRV_SYNC_DATA **ppsSyncData,
+ IMG_UINT32 ui32OEMFlags,
+ IMG_HANDLE *phSwapChain,
+ IMG_UINT32 *pui32SwapChainID)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+ PVRPSB_SWAPCHAIN *psSwapChain;
+ PVRPSB_BUFFER *psBuffer;
+ IMG_UINT32 ui32BufferNum;
+ IMG_UINT32 ui32BackBufferNum;
+
+ PVR_UNREFERENCED_PARAMETER(ui32Flags);
+ PVR_UNREFERENCED_PARAMETER(ui32OEMFlags);
+
+ if (!hDevice ||
+ !psDstSurfAttrib ||
+ !psSrcSurfAttrib ||
+ !ppsSyncData ||
+ !phSwapChain ||
+ !ui32BufferCount)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ /* This Poulsbo driver only supports a single swapchain */
+ if (psDevInfo->psSwapChain)
+ {
+ return PVRSRV_ERROR_FLIP_CHAIN_EXISTS;
+ }
+
+ if (ui32BufferCount > psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers)
+ {
+ return PVRSRV_ERROR_TOOMANYBUFFERS;
+ }
+
+ /* SRC/DST must match the current display mode config */
+ if (psDstSurfAttrib->pixelformat != psDevInfo->sDisplayFormat.pixelformat ||
+ psDstSurfAttrib->sDims.ui32ByteStride != psDevInfo->sDisplayDims.ui32ByteStride ||
+ psDstSurfAttrib->sDims.ui32Width != psDevInfo->sDisplayDims.ui32Width ||
+ psDstSurfAttrib->sDims.ui32Height != psDevInfo->sDisplayDims.ui32Height)
+ {
+ /* DST doesn't match the current mode */
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ if (psDstSurfAttrib->pixelformat != psSrcSurfAttrib->pixelformat ||
+ psDstSurfAttrib->sDims.ui32ByteStride != psSrcSurfAttrib->sDims.ui32ByteStride ||
+ psDstSurfAttrib->sDims.ui32Width != psSrcSurfAttrib->sDims.ui32Width ||
+ psDstSurfAttrib->sDims.ui32Height != psSrcSurfAttrib->sDims.ui32Height)
+ {
+ /* DST doesn't match the SRC */
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psSwapChain = (PVRPSB_SWAPCHAIN *)PVROSAllocKernelMem(sizeof(PVRPSB_SWAPCHAIN));
+ if (psSwapChain == NULL)
+ {
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ psSwapChain->ui32ID = 1;
+
+ psBuffer = (PVRPSB_BUFFER *)PVROSAllocKernelMem(sizeof(PVRPSB_BUFFER) * ui32BufferCount);
+ if (psBuffer == NULL)
+ {
+ PVROSFreeKernelMem(psSwapChain);
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ psSwapChain->ui32BufferCount = ui32BufferCount;
+ psSwapChain->psBuffer = psBuffer;
+
+#if defined(USE_PRIMARY_SURFACE_IN_FLIP_CHAIN)
+ /* The primary surface becomes psBuffer[0] in the swapchain buffer array. */
+ psBuffer[0].ui32Size = psDevInfo->psSystemBuffer->ui32Size;
+ psBuffer[0].bIsContiguous = psDevInfo->psSystemBuffer->bIsContiguous;
+ psBuffer[0].uSysAddr = psDevInfo->psSystemBuffer->uSysAddr;
+ psBuffer[0].sDevVAddr = psDevInfo->psSystemBuffer->sDevVAddr;
+ psBuffer[0].pvCPUVAddr = psDevInfo->psSystemBuffer->pvCPUVAddr;
+ psBuffer[0].psSyncData = ppsSyncData[0];
+ ui32BufferNum = 1;
+#else
+ ui32BufferNum = 0;
+#endif
+
+ /* Populate the buffers with the preallocated buffers */
+ for (ui32BackBufferNum = 0; ui32BufferNum < ui32BufferCount; ui32BufferNum++, ui32BackBufferNum++)
+ {
+ psBuffer[ui32BufferNum].ui32Size = psDevInfo->apsBackBuffers[ui32BackBufferNum]->ui32Size;
+ psBuffer[ui32BufferNum].bIsContiguous = psDevInfo->apsBackBuffers[ui32BackBufferNum]->bIsContiguous;
+ psBuffer[ui32BufferNum].uSysAddr = psDevInfo->apsBackBuffers[ui32BackBufferNum]->uSysAddr;
+ psBuffer[ui32BufferNum].sDevVAddr = psDevInfo->apsBackBuffers[ui32BackBufferNum]->sDevVAddr;
+ psBuffer[ui32BufferNum].pvCPUVAddr = psDevInfo->apsBackBuffers[ui32BackBufferNum]->pvCPUVAddr;
+ psBuffer[ui32BufferNum].psSyncData = ppsSyncData[ui32BufferNum];
+ }
+
+ psSwapChain->psVSyncFlipItems = (PVRPSB_VSYNC_FLIP_ITEM *)PVROSAllocKernelMem(sizeof(PVRPSB_VSYNC_FLIP_ITEM) * ui32BufferCount);
+ if (psSwapChain->psVSyncFlipItems == NULL)
+ {
+ PVROSFreeKernelMem(psSwapChain->psBuffer);
+ PVROSFreeKernelMem(psSwapChain);
+
+ return PVRSRV_ERROR_OUT_OF_MEMORY;
+ }
+
+ ResetVSyncFlipItems(psSwapChain);
+
+ /* Store the swapchain and return it */
+ psDevInfo->psSwapChain = psSwapChain;
+ *phSwapChain = (IMG_HANDLE)psSwapChain;
+ *pui32SwapChainID = psSwapChain->ui32ID;
+
+#if defined(SYS_USING_INTERRUPTS)
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+#endif
+
+ return PVRSRV_OK;
+}
+
+/* destroy swapchain function, called from services */
+static PVRSRV_ERROR DestroyDCSwapChain(IMG_HANDLE hDevice, IMG_HANDLE hSwapChain)
+{
+ PVRPSB_DEVINFO *psDevInfo;
+ PVRPSB_SWAPCHAIN *psSwapChain;
+ PSB_ERROR eError;
+
+ if (!hDevice || !hSwapChain)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+ psSwapChain = (PVRPSB_SWAPCHAIN *)hSwapChain;
+
+ /* Flush the vsync flip queue */
+ PVRPSBFlushInternalVSyncQueue(psDevInfo);
+
+ /* Swap to primary */
+ eError = PVRPSBFlip(psDevInfo, psDevInfo->psSystemBuffer);
+ if (eError != PSB_OK)
+ {
+ return PVRSRV_ERROR_FLIP_FAILED;
+ }
+
+ PVROSFreeKernelMem(psSwapChain->psVSyncFlipItems);
+ PVROSFreeKernelMem(psSwapChain->psBuffer);
+ PVROSFreeKernelMem(psSwapChain);
+
+ psDevInfo->psSwapChain = IMG_NULL;
+
+#if defined(SYS_USING_INTERRUPTS)
+ /* This should be done at the start of the function but PVRPSBFlushInternalVSyncQueue
+ will reenable the vsync interrupts so disable it here instead */
+ PVRPSBDisableVSyncInterrupt(psDevInfo);
+#endif
+
+ return PVRSRV_OK;
+}
+
+/* Set DST rect function, called from services */
+static PVRSRV_ERROR SetDCDstRect(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_RECT *psRect)
+{
+ PVR_UNREFERENCED_PARAMETER(hDevice);
+ PVR_UNREFERENCED_PARAMETER(hSwapChain);
+ PVR_UNREFERENCED_PARAMETER(psRect);
+
+ /* Only full screen swapchains on this device */
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+}
+
+
+/* Set SRC rect function, called from services */
+static PVRSRV_ERROR SetDCSrcRect(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_RECT *psRect)
+{
+ PVR_UNREFERENCED_PARAMETER(hDevice);
+ PVR_UNREFERENCED_PARAMETER(hSwapChain);
+ PVR_UNREFERENCED_PARAMETER(psRect);
+
+ /* Only full screen swapchains on this device */
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+}
+
+/* Set DST colourkey function, called from services */
+static PVRSRV_ERROR SetDCDstColourKey(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 ui32CKColour)
+{
+ PVR_UNREFERENCED_PARAMETER(hDevice);
+ PVR_UNREFERENCED_PARAMETER(hSwapChain);
+ PVR_UNREFERENCED_PARAMETER(ui32CKColour);
+
+ /* Don't support DST CK on this device */
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+}
+
+/* Set SRC colourkey function, called from services */
+static PVRSRV_ERROR SetDCSrcColourKey(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 ui32CKColour)
+{
+ PVR_UNREFERENCED_PARAMETER(hDevice);
+ PVR_UNREFERENCED_PARAMETER(hSwapChain);
+ PVR_UNREFERENCED_PARAMETER(ui32CKColour);
+
+ /* Don't support SRC CK on this device */
+ return PVRSRV_ERROR_NOT_SUPPORTED;
+}
+
+/* Get swapchain buffers function, called from services */
+static PVRSRV_ERROR GetDCBuffers(IMG_HANDLE hDevice,
+ IMG_HANDLE hSwapChain,
+ IMG_UINT32 *pui32BufferCount,
+ IMG_HANDLE *phBuffer)
+{
+ PVRPSB_SWAPCHAIN *psSwapChain;
+ IMG_UINT32 ui32Buffer;
+
+ if (!hDevice || !hSwapChain || !pui32BufferCount || !phBuffer)
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ psSwapChain = (PVRPSB_SWAPCHAIN *)hSwapChain;
+
+ for (ui32Buffer = 0; ui32Buffer < psSwapChain->ui32BufferCount; ui32Buffer++)
+ {
+ phBuffer[ui32Buffer] = (IMG_HANDLE)&psSwapChain->psBuffer[ui32Buffer];
+ }
+ *pui32BufferCount = psSwapChain->ui32BufferCount;
+
+ return PVRSRV_OK;
+}
+
+/* Swap to buffer function, called from services */
+static PVRSRV_ERROR SwapToDCBuffer(IMG_HANDLE hDevice,
+ IMG_HANDLE hBuffer,
+ IMG_UINT32 ui32SwapInterval,
+ IMG_HANDLE hPrivateTag,
+ IMG_UINT32 ui32ClipRectCount,
+ IMG_RECT *psClipRect)
+{
+ PVR_UNREFERENCED_PARAMETER(ui32SwapInterval);
+ PVR_UNREFERENCED_PARAMETER(hPrivateTag);
+ PVR_UNREFERENCED_PARAMETER(psClipRect);
+
+ if (!hDevice || !hBuffer || (ui32ClipRectCount != 0))
+ {
+ return PVRSRV_ERROR_INVALID_PARAMS;
+ }
+
+ /* Nothing to do since services common code does the work in the general case */
+ return PVRSRV_OK;
+}
+
+/* Set state function, called from services */
+static void PSBSetState(IMG_HANDLE hDevice, IMG_UINT32 ui32State)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)hDevice;
+
+ if (ui32State == DC_STATE_FLUSH_COMMANDS)
+ {
+ if (psDevInfo->psSwapChain != 0)
+ {
+ PVRPSBFlushInternalVSyncQueue(psDevInfo);
+ }
+
+ psDevInfo->bFlushCommands = PSB_TRUE;
+ }
+ else if (ui32State == DC_STATE_NO_FLUSH_COMMANDS)
+ {
+ psDevInfo->bFlushCommands = PSB_FALSE;
+ }
+}
+
+
+/************************************************************
+ Command processing and interrupt specific functions:
+************************************************************/
+#if defined(SYS_USING_INTERRUPTS)
+static IMG_BOOL VSyncISR(IMG_VOID *pvDevInfo)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)pvDevInfo;
+ PVRPSB_SWAPCHAIN *psSwapChain = psDevInfo->psSwapChain;
+ IMG_UINT32 ui32InterruptStatus;
+ IMG_BOOL bStatus;
+
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL)
+ if (psDevInfo->bLeaveVT == PSB_TRUE)
+ {
+ return PSB_TRUE;
+ }
+#endif
+
+ PVRPSBDisableVSyncInterrupt(psDevInfo);
+
+ /* Get the interrupt status */
+ ui32InterruptStatus = PVROSReadMMIOReg(psDevInfo, PVRPSB_IIR);
+
+ if (psDevInfo->eActivePipe == PSB_PIPE_A)
+ {
+ ui32InterruptStatus = PVRPSB_IMR_PIPEA_STATUS_GET(ui32InterruptStatus);
+ }
+ else
+ {
+ ui32InterruptStatus = PVRPSB_IMR_PIPEB_STATUS_GET(ui32InterruptStatus);
+ }
+
+ bStatus = (ui32InterruptStatus != 0) ? IMG_TRUE : IMG_FALSE;
+ if (bStatus == IMG_TRUE)
+ {
+ const IMG_UINT32 ui32PipeStatReg = (psDevInfo->eActivePipe == PSB_PIPE_A) ? PVRPSB_PIPEASTAT : PVRPSB_PIPEBSTAT;
+ PVRPSB_VSYNC_FLIP_ITEM *psFlipItem;
+ IMG_UINT32 ui32PipeStat;
+
+ /* Clear interrupts. The manual says we must clear the corresponding
+ bit in PIPESTAT first, before the bit in IIR. */
+ ui32PipeStat = PVROSReadMMIOReg(psDevInfo, ui32PipeStatReg);
+ ui32PipeStat = PVRPSB_PIPESTAT_VBLANK_EN_SET(ui32PipeStat, 1);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeStatReg, ui32PipeStat);
+
+ /* Now we're allowed to clear the bit in the IIR, too */
+ if (psDevInfo->eActivePipe == PSB_PIPE_A)
+ {
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_IIR, PVRPSB_IMR_PIPEA_STATUS_SET(0, 1));
+ }
+ else
+ {
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_IIR, PVRPSB_IMR_PIPEB_STATUS_SET(0, 1));
+ }
+
+ /* Check if swapchain exists */
+ if (!psDevInfo->psSwapChain)
+ {
+ /* Re-enable interrupts */
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+ return IMG_FALSE;
+ }
+
+ psFlipItem = &psSwapChain->psVSyncFlipItems[psSwapChain->ui32RemoveIndex];
+
+ while (psFlipItem->bValid)
+ {
+ /* Have we already flipped BEFORE this interrupt */
+ if (psFlipItem->bFlipped)
+ {
+ /* Have we already 'Cmd Completed'? */
+ if (!psFlipItem->bCmdCompleted)
+ {
+ IMG_BOOL bScheduleMISR;
+ /* Only schedule the MISR if the display vsync is on its own LISR */
+#if defined(POULSBO_DEVICE_ISR)
+ bScheduleMISR = IMG_TRUE;
+#else
+ bScheduleMISR = IMG_FALSE;
+#endif
+ /* Command complete the flip */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete((IMG_HANDLE)psFlipItem->hCmdComplete, bScheduleMISR);
+
+ /* Signal we've done the cmd complete */
+ psFlipItem->bCmdCompleted = PSB_TRUE;
+ }
+
+ /* We've cmd completed so decrement the swap interval */
+ psFlipItem->ui32SwapInterval--;
+
+ /* Can we remove the flip item? */
+ if (psFlipItem->ui32SwapInterval == 0)
+ {
+ /* Advance remove index */
+ AdvanceFlipIndex(psSwapChain, &psSwapChain->ui32RemoveIndex);
+
+ /* Clear item state */
+ psFlipItem->bCmdCompleted = PSB_FALSE;
+ psFlipItem->bFlipped = PSB_FALSE;
+
+ /* Only mark as invalid once item data is finished with */
+ psFlipItem->bValid = PSB_FALSE;
+ }
+ else
+ {
+ /* We're waiting for the last flip to finish displaying
+ so the remove index hasn't been updated to block any
+ new flips occuring. Nothing more to do on interrupt */
+ break;
+ }
+ }
+ else
+ {
+ /* Flip to new surface - flip latches on next interrupt */
+ PVRPSBFlip(psDevInfo, psFlipItem->psBuffer);
+
+ /* Signal we've issued the flip to the HW */
+ psFlipItem->bFlipped = PSB_TRUE;
+
+ /* Nothing more to do on interrupt */
+ break;
+ }
+
+ /* Update to next flip item */
+ psFlipItem = &psSwapChain->psVSyncFlipItems[psSwapChain->ui32RemoveIndex];
+ }
+ }
+
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+
+ return bStatus;
+}
+
+/* Command processing flip handler function, called from services */
+static IMG_BOOL ProcessFlip(IMG_HANDLE hCmdCookie,
+ IMG_UINT32 ui32DataSize,
+ IMG_VOID *pvData)
+{
+ DISPLAYCLASS_FLIP_COMMAND *psFlipCmd;
+ PVRPSB_VSYNC_FLIP_ITEM *psFlipItem;
+ PVRPSB_DEVINFO *psDevInfo;
+ PVRPSB_BUFFER *psBuffer;
+ PVRPSB_SWAPCHAIN *psSwapChain;
+ PSB_ERROR eError;
+
+ if (!hCmdCookie || !pvData)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Validate data packet */
+ psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND *)pvData;
+ if (sizeof(DISPLAYCLASS_FLIP_COMMAND) != ui32DataSize)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Setup some useful pointers */
+ psDevInfo = (PVRPSB_DEVINFO *)psFlipCmd->hExtDevice;
+ psBuffer = (PVRPSB_BUFFER *)psFlipCmd->hExtBuffer; /* This is the buffer we are flipping to */
+ psSwapChain = psDevInfo->psSwapChain;
+
+ if (psDevInfo->bFlushCommands)
+ {
+ /* PVR is flushing its queues so no need to flip.
+ Also don't schedule the MISR as we're already in the MISR */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_FALSE);
+ return IMG_TRUE;
+ }
+
+ /* Support for vsync "unlocked" flipping - not real support as this is a latched display,
+ we just complete immediately. */
+ if (psFlipCmd->ui32SwapInterval == 0)
+ {
+ /* The 'baseaddr' register can be updated outside the vertical blanking region.
+ The 'baseaddr' update only takes effect on the vfetch event and the baseaddr register
+ update is double-buffered. Hence page flipping is 'latched'. */
+
+ eError = PVRPSBFlip(psDevInfo, psBuffer);
+ if (eError != PSB_OK)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Call command complete callback. Don't schedule the MISR as we're already in the MISR */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_FALSE);
+
+ return IMG_TRUE;
+ }
+
+ psFlipItem = &psSwapChain->psVSyncFlipItems[psSwapChain->ui32InsertIndex];
+
+ /* Try to insert command into list */
+ if (!psFlipItem->bValid)
+ {
+ if (psSwapChain->ui32InsertIndex == psSwapChain->ui32RemoveIndex)
+ {
+ eError = PVRPSBFlip(psDevInfo, psBuffer);
+ if (eError != PSB_OK)
+ {
+ return IMG_FALSE;
+ }
+
+ psFlipItem->bFlipped = PSB_TRUE;
+ }
+ else
+ {
+ psFlipItem->bFlipped = PSB_FALSE;
+ }
+
+ psFlipItem->hCmdComplete = hCmdCookie;
+ psFlipItem->psBuffer = psBuffer;
+ psFlipItem->ui32SwapInterval = psFlipCmd->ui32SwapInterval;
+ psFlipItem->bValid = PSB_TRUE;
+
+ AdvanceFlipIndex(psSwapChain, &psSwapChain->ui32InsertIndex);
+
+ return IMG_TRUE;
+ }
+
+ return IMG_FALSE;
+}
+
+#else /* #if defined(SYS_USING_INTERRUPTS) */
+
+/* Command processing flip handler function, called from services
+ Note: in the case of no interrupts just flip and complete */
+static IMG_BOOL ProcessFlip(IMG_HANDLE hCmdCookie,
+ IMG_UINT32 ui32DataSize,
+ IMG_VOID *pvData)
+{
+ DISPLAYCLASS_FLIP_COMMAND *psFlipCmd;
+ PVRPSB_DEVINFO *psDevInfo;
+ PVRPSB_BUFFER *psBuffer;
+ PSB_ERROR eError;
+
+ if (!hCmdCookie || !pvData)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Validate data packet */
+ psFlipCmd = (DISPLAYCLASS_FLIP_COMMAND *)pvData;
+ if (sizeof(DISPLAYCLASS_FLIP_COMMAND) != ui32DataSize)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Setup some useful pointers */
+ psDevInfo = (PVRPSB_DEVINFO *)psFlipCmd->hExtDevice;
+ psBuffer = (PVRPSB_BUFFER *)psFlipCmd->hExtBuffer;
+
+ eError = PVRPSBFlip(psDevInfo, psBuffer);
+ if (eError != PSB_OK)
+ {
+ return IMG_FALSE;
+ }
+
+ /* Call command complete Callback. Don't schedule the MISR as we're already in the MISR */
+ psDevInfo->sPVRJTable.pfnPVRSRVCmdComplete(hCmdCookie, IMG_FALSE);
+
+ return IMG_TRUE;
+}
+#endif /* #if defined(SYS_USING_INTERRUPTS) */
+
+/************************************************************
+ services controlled power callbacks:
+************************************************************/
+
+#if !defined(POULSBO_DEVICE_POWER)
+static PVRSRV_ERROR PrePower(IMG_HANDLE hDevHandle,
+ PVRSRV_DEV_POWER_STATE eNewPowerState,
+ PVRSRV_DEV_POWER_STATE eCurrentPowerState)
+{
+ if ((eNewPowerState != eCurrentPowerState) &&
+ (eNewPowerState == PVRSRV_DEV_POWER_STATE_OFF))
+ {
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)hDevHandle;
+
+#if !defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) && defined(SYS_USING_INTERRUPTS)
+ if (psDevInfo->psSwapChain != 0)
+ {
+ PVRPSBDisableVSyncInterrupt(psDevInfo);
+ }
+#endif /* #if !defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) && defined(SYS_USING_INTERRUPTS) */
+
+ PVROSSaveState(psDevInfo);
+ }
+
+ return PVRSRV_OK;
+}
+
+static PVRSRV_ERROR PostPower(IMG_HANDLE hDevHandle,
+ PVRSRV_DEV_POWER_STATE eNewPowerState,
+ PVRSRV_DEV_POWER_STATE eCurrentPowerState)
+{
+ if ((eNewPowerState != eCurrentPowerState) &&
+ (eCurrentPowerState == PVRSRV_DEV_POWER_STATE_OFF))
+ {
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)hDevHandle;
+
+ PVROSRestoreState(psDevInfo);
+
+#if !defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) && defined(SYS_USING_INTERRUPTS)
+ if (psDevInfo->psSwapChain != 0)
+ {
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+ }
+#endif /* #if !defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) && defined(SYS_USING_INTERRUPTS) */
+ }
+
+ return PVRSRV_OK;
+}
+#endif /* #if !defined(POULSBO_DEVICE_POWER) */
+
+
+/*******************************************************************************
+ * GTT functions
+ ******************************************************************************/
+
+static PSB_ERROR GTTInit(PVRPSB_DEVINFO *psDevInfo, PVRPSB_GTT_INFO *psGTTInfo)
+{
+ IMG_UINT16 ui16GCValue;
+ IMG_UINT32 ui32PGTBLValue;
+
+ /* Set enable bits so we can use the GTT */
+ ui16GCValue = PVROSPciReadWord(psDevInfo, PVRPSB_PCIREG_GC);
+ PVROSPciWriteWord(psDevInfo, PVRPSB_PCIREG_GC, ui16GCValue | 0x4);
+
+ ui32PGTBLValue = PVROSReadMMIOReg(psDevInfo, PVRPSB_PGTBL_CTL);
+ ui32PGTBLValue = PVRPSB_PGTBL_CTL_ENABLE_SET(ui32PGTBLValue, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PGTBL_CTL, ui32PGTBLValue);
+
+ /* Read it back to make sure it sticks */
+ ui32PGTBLValue = PVROSReadMMIOReg(psDevInfo, PVRPSB_PGTBL_CTL);
+
+ /* Map the GTT so we can insert the stolen and system memory into it */
+ psGTTInfo->sGTTSysAddr.uiAddr = PVRPSB_PGTBL_CTL_BASEADDR_GET(ui32PGTBLValue);
+
+ psGTTInfo->ui32GTTSize = GetMemRegionSize(psDevInfo, PVRPSB_PCIREG_GTT_BASE);
+ if (psGTTInfo->ui32GTTSize == 0)
+ {
+ /* The BAR is uninitialised on Cedarview so set the GTT size manually */
+ psGTTInfo->ui32GTTSize = 64 << PVRPSB_PAGE_SHIFT;
+ }
+
+ psGTTInfo->pvGTTCPUVAddr = PVROSMapPhysAddr(psGTTInfo->sGTTSysAddr, psGTTInfo->ui32GTTSize);
+ psGTTInfo->ui32GTTOffset = 0;
+
+ /* Get graphics memory information */
+ psGTTInfo->sGMemDevVAddr.uiAddr = PVROSPciReadDWord(psDevInfo, PVRPSB_PCIREG_GMEM_BASE);
+ if (psGTTInfo->sGMemDevVAddr.uiAddr == 0)
+ {
+ /* The BAR is uninitialised on Cedarview so set the GMem address manually */
+ psGTTInfo->sGMemDevVAddr.uiAddr = 0x40000000;
+ }
+
+ psGTTInfo->ui32GMemSizeInPages = GetMemRegionSize(psDevInfo, PVRPSB_PCIREG_GMEM_BASE) >> PVRPSB_PAGE_SHIFT;
+ if (psGTTInfo->ui32GMemSizeInPages == 0)
+ {
+ /* The BAR is uninitialised on Cedarview so set the GMem size manually */
+ psGTTInfo->ui32GMemSizeInPages = (128 * 1024 * 1024) >> PVRPSB_PAGE_SHIFT;
+ }
+
+ /* Get the address of the stolen memory so we can use it for our buffers */
+ psGTTInfo->sStolenSysAddr.uiAddr = PVROSPciReadDWord(psDevInfo, PVRPSB_PCIREG_BSM);
+ psGTTInfo->ui32StolenSizeInPages = (psGTTInfo->sGTTSysAddr.uiAddr - psGTTInfo->sStolenSysAddr.uiAddr - PVRPSB_PAGE_SIZE) >> PVRPSB_PAGE_SHIFT;
+ psGTTInfo->ui32StolenPageOffset = 0;
+
+#if defined(SUPPORT_DRI_DRM)
+ /* Alloc memory to save the GTT contents when saving and restoring the chip state */
+ psDevInfo->sSuspendState.sDevRegisters.pui32GTTContents = (IMG_UINT32 *)PVROSAllocKernelMem(psGTTInfo->ui32GTTSize);
+ if (psDevInfo->sSuspendState.sDevRegisters.pui32GTTContents == NULL)
+ {
+ printk(KERN_WARNING DRVNAME ": %s - Failed to allocate memory to store GTT contents\n", __FUNCTION__);
+
+ PVROSUnMapPhysAddr(psGTTInfo->pvGTTCPUVAddr);
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+ return PSB_OK;
+}
+
+static void GTTDeinit(PVRPSB_DEVINFO *psDevInfo, PVRPSB_GTT_INFO *psGTTInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ PVROSFreeKernelMem(psDevInfo->sSuspendState.sDevRegisters.pui32GTTContents);
+ psDevInfo->sSuspendState.sDevRegisters.pui32GTTContents = NULL;
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+ /* Reset the GTT information */
+ psGTTInfo->ui32GMemSizeInPages = 0;
+ psGTTInfo->sGMemDevVAddr.uiAddr = IMG_NULL;
+
+ psGTTInfo->ui32StolenPageOffset = 0;
+ psGTTInfo->ui32StolenSizeInPages = 0;
+ psGTTInfo->sStolenSysAddr.uiAddr = IMG_NULL;
+
+ PVROSUnMapPhysAddr(psGTTInfo->pvGTTCPUVAddr);
+ psGTTInfo->ui32GTTSize = 0;
+ psGTTInfo->sGTTSysAddr.uiAddr = IMG_NULL;
+ psGTTInfo->ui32GTTOffset = 0;
+}
+
+static IMG_VOID GTTAllocStolenPages(PVRPSB_GTT_INFO *psGTTInfo, IMG_UINT32 ui32SizeInPages, IMG_SYS_PHYADDR *psSysPhysAddr)
+{
+ psSysPhysAddr->uiAddr = 0;
+
+ if (psGTTInfo->ui32StolenPageOffset + ui32SizeInPages <= psGTTInfo->ui32StolenSizeInPages)
+ {
+ psSysPhysAddr->uiAddr = psGTTInfo->sStolenSysAddr.uiAddr + (psGTTInfo->ui32StolenPageOffset << PVRPSB_PAGE_SHIFT);
+ psGTTInfo->ui32StolenPageOffset += ui32SizeInPages;
+ }
+}
+
+static IMG_BOOL GTTInsertPages(PVRPSB_DEVINFO *psDevInfo, IMG_SYS_PHYADDR *psSysAddr, IMG_UINT32 ui32NumPages, IMG_BOOL bContiguous, IMG_DEV_VIRTADDR *psDevVAddr)
+{
+ PVRPSB_GTT_INFO *psGTTInfo = &(psDevInfo->sGTTInfo);
+ IMG_UINT32 ui32PageAddr;
+ IMG_UINT32 ui32PageNum;
+
+ /* Check we have enough space in the GTT to insert all the pages */
+ if (psGTTInfo->ui32GTTSize < psGTTInfo->ui32GTTOffset + (ui32NumPages << 2))
+ {
+ return IMG_FALSE;
+ }
+
+ psDevVAddr->uiAddr = psGTTInfo->sGMemDevVAddr.uiAddr + ((psGTTInfo->ui32GTTOffset >> 2) << PVRPSB_PAGE_SHIFT);
+
+ for (ui32PageNum = 0; ui32PageNum < ui32NumPages; ui32PageNum++, psGTTInfo->ui32GTTOffset += 4)
+ {
+ if (bContiguous == IMG_TRUE)
+ {
+ ui32PageAddr = psSysAddr->uiAddr + (ui32PageNum << PVRPSB_PAGE_SHIFT);
+ }
+ else
+ {
+ ui32PageAddr = psSysAddr[ui32PageNum].uiAddr;
+ }
+
+ PVROSWriteIOMem(psGTTInfo->pvGTTCPUVAddr + psGTTInfo->ui32GTTOffset, ui32PageAddr | 0x1);
+ }
+
+ return IMG_TRUE;
+}
+
+
+/*******************************************************************************
+ * Buffer functions
+ ******************************************************************************/
+PVRPSB_BUFFER *PVRPSBCreateBuffer(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32BufferSize)
+{
+ PVRPSB_BUFFER *psBuffer;
+
+ psBuffer = (PVRPSB_BUFFER *)PVROSAllocKernelMem(sizeof(PVRPSB_BUFFER));
+ if (psBuffer != NULL)
+ {
+ PVRPSB_GTT_INFO *psGTTInfo = &(psDevInfo->sGTTInfo);
+ IMG_UINT32 ui32BufferSizeInPages;
+
+ ui32BufferSize = PVRPSB_PAGE_ALIGN(ui32BufferSize);
+ ui32BufferSizeInPages = ui32BufferSize >> PVRPSB_PAGE_SHIFT;
+
+ /* Try to use stolen memory and if this fails fall back to using system memory */
+ GTTAllocStolenPages(psGTTInfo, ui32BufferSizeInPages, &(psBuffer->uSysAddr.sCont));
+
+ if (psBuffer->uSysAddr.sCont.uiAddr != 0)
+ {
+ if (GTTInsertPages(psDevInfo, &(psBuffer->uSysAddr.sCont), ui32BufferSizeInPages, IMG_TRUE, &(psBuffer->sDevVAddr)) == IMG_FALSE)
+ {
+ goto ErrorFreeBuffer;
+ }
+
+ psBuffer->pvCPUVAddr = PVROSMapPhysAddrWC(psBuffer->uSysAddr.sCont, ui32BufferSize);
+ psBuffer->bIsContiguous = PSB_TRUE;
+ }
+ else
+ {
+ psBuffer->uSysAddr.psNonCont = (IMG_SYS_PHYADDR *)PVROSAllocKernelMem(sizeof(IMG_SYS_PHYADDR) * ui32BufferSizeInPages);
+ if (psBuffer->uSysAddr.psNonCont == NULL)
+ {
+ goto ErrorFreeBuffer;
+ }
+
+ psBuffer->pvCPUVAddr = PVROSAllocKernelMemForBuffer(ui32BufferSize, psBuffer->uSysAddr.psNonCont);
+ if (psBuffer->pvCPUVAddr == NULL)
+ {
+ goto ErrorFreePageBuffer;
+ }
+
+ if (GTTInsertPages(psDevInfo, psBuffer->uSysAddr.psNonCont, ui32BufferSizeInPages, IMG_FALSE, &(psBuffer->sDevVAddr)) == IMG_FALSE)
+ {
+ goto ErrorFreeBufferMem;
+ }
+
+ psBuffer->bIsContiguous = PSB_FALSE;
+ }
+ psBuffer->ui32Size = ui32BufferSize;
+ }
+
+ return psBuffer;
+
+ErrorFreeBufferMem:
+ PVROSFreeKernelMemForBuffer(psBuffer->pvCPUVAddr);
+
+ErrorFreePageBuffer:
+ PVROSFreeKernelMem(psBuffer->uSysAddr.psNonCont);
+
+ErrorFreeBuffer:
+ PVROSFreeKernelMem(psBuffer);
+
+ return NULL;
+}
+
+void PVRPSBDestroyBuffer(PVRPSB_BUFFER *psBuffer)
+{
+ if (psBuffer->bIsContiguous == PSB_TRUE)
+ {
+ PVROSUnMapPhysAddr(psBuffer->pvCPUVAddr);
+ }
+ else
+ {
+ PVROSFreeKernelMem(psBuffer->uSysAddr.psNonCont);
+ PVROSFreeKernelMemForBuffer(psBuffer->pvCPUVAddr);
+ }
+
+ PVROSFreeKernelMem(psBuffer);
+}
+
+static PSB_ERROR BuffersInit(PVRPSB_DEVINFO *psDevInfo)
+{
+ IMG_UINT32 ui32BufferSize = psDevInfo->sDisplayDims.ui32ByteStride * psDevInfo->sDisplayDims.ui32Height;
+ IMG_UINT32 ui32BufferNum;
+
+#if !defined(SUPPORT_DRI_DRM)
+ psDevInfo->psSystemBuffer = PVRPSBCreateBuffer(psDevInfo, ui32BufferSize);
+ if (psDevInfo->psSystemBuffer == NULL)
+ {
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ if (psDevInfo->sDisplayFormat.pixelformat == PVRSRV_PIXEL_FORMAT_ARGB8888)
+ {
+ IMG_UINT32 *pui32Buffer = (IMG_UINT32 *)psDevInfo->psSystemBuffer->pvCPUVAddr;
+ IMG_UINT32 ui32NumPixels = psDevInfo->psSystemBuffer->ui32Size >> 2;
+ int i;
+
+ /* Clear the system buffer to green */
+ for (i = 0; i < ui32NumPixels; i++)
+ {
+ pui32Buffer[i] = 0xFF00FF00;
+ }
+ }
+ else
+ {
+ /* Clear the system buffer to black */
+ PVROSSetIOMem(psDevInfo->psSystemBuffer->pvCPUVAddr, 0, psDevInfo->psSystemBuffer->ui32Size);
+ }
+#endif /* #if !defined(SUPPORT_DRI_DRM) */
+
+ for (ui32BufferNum = 0; ui32BufferNum < PVRPSB_MAX_BACKBUFFERS; ui32BufferNum++)
+ {
+ psDevInfo->apsBackBuffers[ui32BufferNum] = PVRPSBCreateBuffer(psDevInfo, ui32BufferSize);
+ if (psDevInfo->apsBackBuffers[ui32BufferNum] == IMG_NULL)
+ {
+ break;
+ }
+ }
+ psDevInfo->ui32TotalBackBuffers = ui32BufferNum;
+
+ return PSB_OK;
+}
+
+static void BufferDeinit(PVRPSB_DEVINFO *psDevInfo)
+{
+ IMG_UINT32 ui32BufferNum;
+
+ for (ui32BufferNum = 0; ui32BufferNum < psDevInfo->ui32TotalBackBuffers; ui32BufferNum++)
+ {
+ PVRPSBDestroyBuffer(psDevInfo->apsBackBuffers[ui32BufferNum]);
+ psDevInfo->apsBackBuffers[ui32BufferNum] = IMG_NULL;
+ }
+ psDevInfo->ui32TotalBackBuffers = 0;
+
+#if !defined(SUPPORT_DRI_DRM)
+ /* Clear the system buffer to black so we know the driver has unloaded */
+ PVROSSetIOMem(psDevInfo->psSystemBuffer->pvCPUVAddr, 0, psDevInfo->psSystemBuffer->ui32Size);
+
+ PVRPSBDestroyBuffer(psDevInfo->psSystemBuffer);
+ psDevInfo->psSystemBuffer = IMG_NULL;
+#endif
+}
+
+
+/*******************************************************************************
+ * HW Cursor functions
+ ******************************************************************************/
+static PSB_ERROR CursorInit(PVRPSB_DEVINFO *psDevInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ IMG_UINT32 ui32MaxBufferSize = PVRPSB_HW_CURSOR_STRIDE * PVRPSB_HW_CURSOR_HEIGHT;
+
+ psDevInfo->sCursorInfo.psBuffer = PVRPSBCreateBuffer(psDevInfo, ui32MaxBufferSize);
+ if (psDevInfo->sCursorInfo.psBuffer == IMG_NULL)
+ {
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ /* For some reason using system memory results in a corrupt cursor. If
+ we get a non-contiguous buffer we know it's not stolen memory. So,
+ in this case fail to avoid showing a corrupt cursor. */
+ if (psDevInfo->sCursorInfo.psBuffer->bIsContiguous == PSB_FALSE)
+ {
+ PVRPSBDestroyBuffer(psDevInfo->sCursorInfo.psBuffer);
+ psDevInfo->sCursorInfo.psBuffer = IMG_NULL;
+
+ return PSB_ERROR_GENERIC;
+ }
+
+ psDevInfo->sCursorInfo.ui32Width = PVRPSB_HW_CURSOR_WIDTH;
+ psDevInfo->sCursorInfo.ui32Height = PVRPSB_HW_CURSOR_HEIGHT;
+
+ psDevInfo->sCursorInfo.i32X = 0;
+ psDevInfo->sCursorInfo.i32Y = 0;
+
+ return PSB_OK;
+#else
+ return PSB_OK;
+#endif
+}
+
+static void CursorDeinit(PVRPSB_DEVINFO *psDevInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ psDevInfo->sCursorInfo.ui32Width = 0;
+ psDevInfo->sCursorInfo.ui32Height = 0;
+
+ psDevInfo->sCursorInfo.i32X = 0;
+ psDevInfo->sCursorInfo.i32Y = 0;
+
+ PVRPSBDestroyBuffer(psDevInfo->sCursorInfo.psBuffer);
+ psDevInfo->sCursorInfo.psBuffer = IMG_NULL;
+#endif
+}
+
+
+/*******************************************************************************
+ * OS independent functions
+ ******************************************************************************/
+
+PVRPSB_DEVINFO *PVRPSBGetDevInfo(void)
+{
+ return (PVRPSB_DEVINFO *)gpvAnchor;
+}
+
+void PVRPSBSetDevInfo(PVRPSB_DEVINFO *psDevInfo)
+{
+ gpvAnchor = (IMG_VOID *)psDevInfo;
+}
+
+IMG_UINT32 PVRPSBGetBpp(PVRSRV_PIXEL_FORMAT ePixelFormat)
+{
+ switch (ePixelFormat)
+ {
+ case PVRSRV_PIXEL_FORMAT_ARGB8888:
+ {
+ return 4;
+ }
+ case PVRSRV_PIXEL_FORMAT_RGB565:
+ {
+ return 2;
+ }
+ case PVRSRV_PIXEL_FORMAT_PAL8:
+ {
+ return 1;
+ }
+ default:
+ {
+ return 0;
+ }
+ }
+}
+
+/*****************************************************************************
+ Function Name : PVRPSBSelectPLLFreq
+ Inputs : ui32TargetClock - desired dot clock.
+ Outputs : psPllFreq
+ Returns : PSB_TRUE - success; PSB_FALSE - failure.
+ Description : Get the best set of values of M1, M2, N, P1, P2 to satify
+ the requested dot clock and reference frequency.
+
+ PLL frequency calculation formula (see page 49 of
+ VOL_3_display_registers_updated.pdf):
+
+ dot_clock = ref_freq * (5 * (M1 + 2) + (M2 + 2))
+ dot_clock = dot_clock / (N + 2) / (P1 * P2)
+
+ N, M1 and M2 are used to setup FPA0/FPB0 registers;
+ P1, P2 are used to setup PLLA_CTRL/PLLB_CTRL registers.
+*****************************************************************************/
+PSB_BOOL PVRPSBSelectPLLFreq(IMG_UINT32 ui32TargetClock, const PVRPSB_PLL_RANGE *psPllRange, PLL_FREQ *psPllFreq)
+{
+ IMG_UINT32 ui32ClockDiffBest = 0xFFFFFFFF;
+ IMG_UINT32 ui32Clock;
+ IMG_UINT32 ui32P1;
+ IMG_UINT32 ui32P2;
+ IMG_UINT32 ui32M1;
+ IMG_UINT32 ui32M2;
+ IMG_UINT32 ui32N;
+
+ ui32P2 = (ui32TargetClock <= psPllRange->ui32P2Divide) ? psPllRange->ui32P2Hi : psPllRange->ui32P2Lo;
+
+ for (ui32P1 = psPllRange->ui32P1Min; ui32P1 <= psPllRange->ui32P1Max; ui32P1++)
+ {
+ for (ui32N = psPllRange->ui32NMin; ui32N <= psPllRange->ui32NMax; ui32N++)
+ {
+ for (ui32M1 = psPllRange->ui32M1Min; ui32M1 <= psPllRange->ui32M1Max; ui32M1++)
+ {
+ for (ui32M2 = psPllRange->ui32M2Min; (ui32M2 <= psPllRange->ui32M2Max); ui32M2++)
+ {
+ IMG_UINT32 ui32Vco = 0;
+ IMG_UINT32 ui32M = 0;
+ IMG_UINT32 ui32ClockDiff;
+
+ switch (psPllRange->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ ui32M = (ui32M2 + 2);
+ break;
+ case PSB_POULSBO:
+ ui32M = (5 * (ui32M1 + 2)) + (ui32M2 + 2);
+ break;
+ case PSB_UNKNOWN:
+ return PSB_FALSE;
+ }
+
+ /* Check the value is in range */
+ if ((ui32M < psPllRange->ui32MMin) || (ui32M > psPllRange->ui32MMax))
+ {
+ continue;
+ }
+
+ switch (psPllRange->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ ui32Vco = (psPllRange->ui32RefFreq * ui32M) / ui32N;
+ break;
+ case PSB_POULSBO:
+ ui32Vco = (psPllRange->ui32RefFreq * ui32M) / (ui32N + 2);
+ break;
+ case PSB_UNKNOWN:
+ return PSB_FALSE;
+ }
+
+ /* Check the value is in range */
+ if ((ui32Vco < psPllRange->ui32VcoMin) || (ui32Vco > psPllRange->ui32VcoMax))
+ {
+ continue;
+ }
+
+ ui32Clock = (ui32Vco / (ui32P1 * ui32P2));
+
+ ui32ClockDiff = MAX(ui32TargetClock, ui32Clock) - MIN(ui32TargetClock, ui32Clock);
+ if (ui32ClockDiff < ui32ClockDiffBest)
+ {
+ ui32ClockDiffBest = ui32ClockDiff;
+ psPllFreq->ui32Clock = ui32Clock;
+ psPllFreq->ui32Vco = ui32Vco;
+ psPllFreq->ui32M1 = ui32M1;
+ psPllFreq->ui32M2 = ui32M2;
+ psPllFreq->ui32N = ui32N;
+ psPllFreq->ui32P1 = ui32P1;
+ psPllFreq->ui32P2 = ui32P2;
+
+ /* We have already got the best values, quit now. */
+ if (ui32ClockDiff == 0)
+ {
+ return PSB_TRUE;
+ }
+ }
+ }
+ }
+ }
+ }
+
+ return (ui32ClockDiffBest == 0xFFFFFFFF) ? PSB_FALSE : PSB_TRUE;
+}
+
+/* The common Poulsbo driver initialisation function. Here we do the following:
+ - connect to services
+ - register with services
+ - allocate and setup private data structure */
+PSB_ERROR PVRPSBInit(PVRPSB_DEVINFO *psDevInfo)
+{
+ PFN_CMD_PROC apfnCmdProcList[PVRPSB_COMMAND_COUNT];
+ IMG_UINT32 aui32SyncCountList[PVRPSB_COMMAND_COUNT][2];
+ IMG_UINT32 ui32RegBaseAddr;
+ IMG_UINT32 ui32RegSize;
+ struct pci_dev *psPciDev;
+ PSB_ERROR eReturn;
+
+#if defined(SUPPORT_DRI_DRM)
+ psPciDev = psDevInfo->psDrmDev->pdev;
+#else
+ psPciDev = psDevInfo->psPciDev;
+#endif
+
+ psDevInfo->eDevice = GetDevice(psPciDev->device);
+ if (psDevInfo->eDevice == PSB_UNKNOWN)
+ {
+ printk(KERN_ERR DRVNAME ": %s - Device has unsupported PCI id 0x%04X\n", __FUNCTION__, psPciDev->device);
+ return PSB_ERROR_INVALID_DEVICE;
+ }
+
+ strncpy(psDevInfo->sDisplayInfo.szDisplayName, DISPLAY_DEVICE_NAME, MAX_DISPLAY_NAME_SIZE);
+ psDevInfo->bFlushCommands = PSB_FALSE;
+ psDevInfo->psSwapChain = IMG_NULL;
+
+ /* We need to map in the device registers before we can proceed */
+ ui32RegBaseAddr = PVROSPciReadDWord(psDevInfo, PVRPSB_PCIREG_MEM_BASE);
+ ui32RegSize = GetMemRegionSize(psDevInfo, PVRPSB_PCIREG_MEM_BASE);
+
+ psDevInfo->sRegSysAddr.uiAddr = ui32RegBaseAddr + PVRPSB_PCIREG_OFFSET;
+ psDevInfo->pvRegCPUVAddr = PVROSMapPhysAddr(psDevInfo->sRegSysAddr, ui32RegSize);
+
+ /* This must be done before we can allocate any buffers */
+ eReturn = GTTInit(psDevInfo, &psDevInfo->sGTTInfo);
+ if (eReturn != PSB_OK)
+ {
+ goto ErrorUnmapRegisters;
+ }
+
+ /* If the cursor is allocated from system memory we end up with a corrupt cursor
+ (maybe we're doing something wrong?). To work around this make sure the cursor
+ buffer is allocated first so we can use stolen memory (if there is some). */
+ if (CursorInit(psDevInfo) != PSB_OK)
+ {
+ /* This is non-fatal so just print a warning */
+ printk(KERN_WARNING DRVNAME ": %s - Hardware cursor initialisation failed\n", __FUNCTION__);
+ }
+
+ eReturn = PVROSModeSetInit(psDevInfo);
+ if (eReturn != PSB_OK)
+ {
+ goto ErrorCursorDeinit;
+ }
+
+ eReturn = BuffersInit(psDevInfo);
+ if (eReturn != PSB_OK)
+ {
+ goto ErrorModeSetDeinit;
+ }
+
+#if !defined(SUPPORT_DRI_DRM)
+ PVRPSBFlip(psDevInfo, psDevInfo->psSystemBuffer);
+#endif
+
+ /* Now we've done most of the important setup fill in some device information */
+ psDevInfo->sDisplayInfo.ui32MinSwapInterval = PVRPSB_MIN_SWAP_INTERVAL;
+ psDevInfo->sDisplayInfo.ui32MaxSwapInterval = PVRPSB_MAX_SWAP_INTERVAL;
+ psDevInfo->sDisplayInfo.ui32MaxSwapChains = PVRPSB_MAX_SWAPCHAINS;
+
+#if defined(USE_PRIMARY_SURFACE_IN_FLIP_CHAIN)
+ psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = psDevInfo->ui32TotalBackBuffers + 1;
+#else
+ psDevInfo->sDisplayInfo.ui32MaxSwapChainBuffers = psDevInfo->ui32TotalBackBuffers;
+#endif
+
+ psDevInfo->ui32NumFormats = PVRPSB_MAX_FORMATS;
+ psDevInfo->asDisplayFormatList[0].pixelformat = psDevInfo->sDisplayFormat.pixelformat;
+
+ psDevInfo->ui32NumDims = PVRPSB_MAX_DIMS;
+ psDevInfo->asDisplayDimList[0].ui32ByteStride = psDevInfo->sDisplayDims.ui32ByteStride;
+ psDevInfo->asDisplayDimList[0].ui32Width = psDevInfo->sDisplayDims.ui32Width;
+ psDevInfo->asDisplayDimList[0].ui32Height = psDevInfo->sDisplayDims.ui32Height;
+
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL)
+ psDevInfo->bLeaveVT = PSB_FALSE;
+#endif
+
+ if (PVRGetDisplayClassJTable(&psDevInfo->sPVRJTable) == IMG_FALSE)
+ {
+ eReturn = PSB_ERROR_INIT_FAILURE;
+ goto ErrorBuffersDeinit;
+ }
+
+ /* Setup the DC Jtable so SRVKM can call into this driver */
+ psDevInfo->sDCJTable.ui32TableSize = sizeof(PVRSRV_DC_SRV2DISP_KMJTABLE);
+ psDevInfo->sDCJTable.pfnOpenDCDevice = OpenDCDevice;
+ psDevInfo->sDCJTable.pfnCloseDCDevice = CloseDCDevice;
+ psDevInfo->sDCJTable.pfnEnumDCFormats = EnumDCFormats;
+ psDevInfo->sDCJTable.pfnEnumDCDims = EnumDCDims;
+ psDevInfo->sDCJTable.pfnGetDCSystemBuffer = GetDCSystemBuffer;
+ psDevInfo->sDCJTable.pfnGetDCInfo = GetDCInfo;
+ psDevInfo->sDCJTable.pfnGetBufferAddr = GetDCBufferAddr;
+ psDevInfo->sDCJTable.pfnCreateDCSwapChain = CreateDCSwapChain;
+ psDevInfo->sDCJTable.pfnDestroyDCSwapChain = DestroyDCSwapChain;
+ psDevInfo->sDCJTable.pfnSetDCDstRect = SetDCDstRect;
+ psDevInfo->sDCJTable.pfnSetDCSrcRect = SetDCSrcRect;
+ psDevInfo->sDCJTable.pfnSetDCDstColourKey = SetDCDstColourKey;
+ psDevInfo->sDCJTable.pfnSetDCSrcColourKey = SetDCSrcColourKey;
+ psDevInfo->sDCJTable.pfnGetDCBuffers = GetDCBuffers;
+ psDevInfo->sDCJTable.pfnSwapToDCBuffer = SwapToDCBuffer;
+ psDevInfo->sDCJTable.pfnSetDCState = PSBSetState;
+
+ /* Register device with services and retrieve device index */
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRegisterDCDevice(&psDevInfo->sDCJTable,
+ &psDevInfo->ui32ID) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_DEVICE_REGISTER_FAILED;
+ goto ErrorBuffersDeinit;
+ }
+
+ /* Setup private command processing function table */
+ apfnCmdProcList[DC_FLIP_COMMAND] = ProcessFlip;
+
+ /* Associated sync count(s) */
+ aui32SyncCountList[DC_FLIP_COMMAND][0] = 0; /* No writes */
+ aui32SyncCountList[DC_FLIP_COMMAND][1] = 2; /* 2 reads: To / From */
+
+ /* Register private command processing functions with the Command Queue
+ Manager and setup the general command complete function in the devinfo. */
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRegisterCmdProcList(psDevInfo->ui32ID,
+ &apfnCmdProcList[0],
+ aui32SyncCountList,
+ PVRPSB_COMMAND_COUNT) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_CANT_REGISTER_CALLBACK;
+ goto ErrorRemoveDCDevice;
+ }
+
+#if defined(SYS_USING_INTERRUPTS)
+#if defined(POULSBO_DEVICE_ISR)
+ /* Install a device specific ISR handler for PSB */
+ if (InstallVsyncISR(psDevInfo) != PSB_OK)
+ {
+ eReturn = PSB_ERROR_INIT_FAILURE;
+ goto ErrorRemoveCmdProcList;
+ }
+#else
+ /* Register external ISR to be called off the back of the services system ISR */
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRegisterSystemISRHandler(VSyncISR,
+ psDevInfo,
+ 0,
+ psDevInfo->ui32ID) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_INIT_FAILURE;
+ goto ErrorRemoveCmdProcList;
+ }
+#endif /* defined(POULSBO_DEVICE_ISR) */
+#endif /* defined(SYS_USING_INTERRUPTS) */
+
+#if defined(POULSBO_DEVICE_POWER)
+ /* Note: In this case the Device should be registered with the OS power manager directly */
+#else
+ /* Register PSB with services to get power events from services.
+ Note: Generally this is not the recommended method for
+ 3rd party display drivers power management. */
+ if (psDevInfo->sPVRJTable.pfnPVRSRVRegisterPowerDevice(psDevInfo->ui32ID,
+ PrePower, PostPower,
+ IMG_NULL, IMG_NULL,
+ psDevInfo,
+ PVRSRV_DEV_POWER_STATE_ON,
+ PVRSRV_DEV_POWER_STATE_ON) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_INIT_FAILURE;
+ goto ErrorUninstallVSyncISR;
+ }
+#endif /* defined(POULSBO_DEVICE_POWER) */
+
+ return PSB_OK;
+
+ErrorUninstallVSyncISR:
+#if defined(SYS_USING_INTERRUPTS)
+#if defined(POULSBO_DEVICE_ISR)
+ UninstallVsyncISR(psDevInfo);
+#else
+ psDevInfo->sPVRJTable.pfnPVRSRVRegisterSystemISRHandler(IMG_NULL, IMG_NULL, 0, psDevInfo->ui32ID);
+#endif /* defined(PSB_DEVICE_ISR) */
+#endif /* defined(SYS_USING_INTERRUPTS) */
+
+ErrorRemoveCmdProcList:
+ psDevInfo->sPVRJTable.pfnPVRSRVRemoveCmdProcList(psDevInfo->ui32ID, PVRPSB_COMMAND_COUNT);
+
+ErrorRemoveDCDevice:
+ psDevInfo->sPVRJTable.pfnPVRSRVRemoveDCDevice(psDevInfo->ui32ID);
+
+ErrorBuffersDeinit:
+ BufferDeinit(psDevInfo);
+
+ErrorModeSetDeinit:
+ PVROSModeSetDeinit(psDevInfo);
+
+ErrorCursorDeinit:
+ CursorDeinit(psDevInfo);
+ GTTDeinit(psDevInfo, &psDevInfo->sGTTInfo);
+
+ErrorUnmapRegisters:
+ PVROSUnMapPhysAddr(psDevInfo->pvRegCPUVAddr);
+
+ return eReturn;
+}
+
+/* The common PSB driver de-initialisation function */
+PSB_ERROR PVRPSBDeinit(PVRPSB_DEVINFO *psDevInfo)
+{
+ PVRSRV_DC_DISP2SRV_KMJTABLE *psPVRJTable = &psDevInfo->sPVRJTable;
+ PSB_ERROR eReturn = PSB_OK;
+
+#if !defined(POULSBO_DEVICE_POWER)
+ /* Unregister with services power manager */
+ if (psPVRJTable->pfnPVRSRVRegisterPowerDevice(psDevInfo->ui32ID,
+ IMG_NULL, IMG_NULL,
+ IMG_NULL, IMG_NULL, IMG_NULL,
+ PVRSRV_DEV_POWER_STATE_ON,
+ PVRSRV_DEV_POWER_STATE_ON) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+#endif /* defined(POULSBO_DEVICE_POWER) */
+
+#if defined(SYS_USING_INTERRUPTS)
+#if defined(POULSBO_DEVICE_ISR)
+ /* Uninstall device specific ISR handler for PSB */
+ if (UninstallVsyncISR(psDevInfo) != PSB_OK)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+#else
+ /* Remove registration with external system ISR */
+ if (psPVRJTable->pfnPVRSRVRegisterSystemISRHandler(IMG_NULL, IMG_NULL, 0,
+ psDevInfo->ui32ID) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+#endif /* defined(PSB_DEVICE_ISR) */
+#endif /* defined(SYS_USING_INTERRUPTS) */
+
+ /* Remove cmd handler registration */
+ if (psPVRJTable->pfnPVRSRVRemoveCmdProcList(psDevInfo->ui32ID,
+ PVRPSB_COMMAND_COUNT) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+
+ /* Remove display class device from kernel services device register */
+ if (psPVRJTable->pfnPVRSRVRemoveDCDevice(psDevInfo->ui32ID) != PVRSRV_OK)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+
+ BufferDeinit(psDevInfo);
+ PVROSModeSetDeinit(psDevInfo);
+ CursorDeinit(psDevInfo);
+ GTTDeinit(psDevInfo, &psDevInfo->sGTTInfo);
+
+ PVROSUnMapPhysAddr(psDevInfo->pvRegCPUVAddr);
+ psDevInfo->pvRegCPUVAddr = NULL;
+
+ if (psDevInfo->psSwapChain != NULL)
+ {
+ eReturn = PSB_ERROR_GENERIC;
+ }
+
+ return eReturn;
+}
+
+
+/******************************************************************************
+ End of file (poulsbo_displayclass.c)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.c b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.c
new file mode 100644
index 0000000..99f7a91
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.c
@@ -0,0 +1,2344 @@
+/*************************************************************************/ /*!
+@Title Poulsbo linux-specific functions
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+/******************************************************************************
+ The 3rd party driver is a specification of an API to integrate the IMG POWERVR
+ Services driver with 3rd Party display hardware. It is NOT a specification for
+ a display controller driver, rather a specification to extend the API for a
+ pre-existing driver for the display hardware.
+
+ The 3rd party driver interface provides IMG POWERVR client drivers (e.g. PVR2D)
+ with an API abstraction of the system's underlying display hardware, allowing
+ the client drivers to indirectly control the display hardware and access its
+ associated memory.
+
+ Functions of the API include
+ - query primary surface attributes (width, height, stride, pixel format, CPU
+ physical and virtual address)
+ - swap/flip chain creation and subsequent query of surface attributes
+ - asynchronous display surface flipping, taking account of asynchronous read
+ (flip) and write (render) operations to the display surface
+
+ Note: having queried surface attributes the client drivers are able to map the
+ display memory to any IMG POWERVR Services device by calling
+ PVRSRVMapDeviceClassMemory with the display surface handle.
+
+ This code is intended to be an example of how a pre-existing display driver may
+ be extended to support the 3rd Party Display interface to POWERVR Services
+ - IMG is not providing a display driver implementation.
+******************************************************************************/
+
+#include <linux/version.h>
+
+#include "poulsbo_linux.h"
+
+#include <linux/module.h>
+
+#if defined(SUPPORT_DRI_DRM)
+#include "pvr_drm.h"
+#include "3rdparty_dc_drm_shared.h"
+#include <drm/drm_mode.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0))
+#include <drm/drm_plane_helper.h>
+#endif
+#else
+#include "pvrmodule.h"
+#include <linux/fb.h>
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+#include <linux/delay.h>
+
+#if !defined(SUPPORT_DRI_DRM)
+struct GTF_TIMINGS_DEF
+{
+ IMG_UINT32 ui32Width;
+ IMG_UINT32 ui32Height;
+ IMG_UINT32 ui32RefreshRate;
+ IMG_UINT32 ui32Doc;
+
+ IMG_UINT32 ui32Hfront;
+ IMG_UINT32 ui32Hsync;
+ IMG_UINT32 ui32Hblanking;
+
+ IMG_UINT32 ui32Vfront;
+ IMG_UINT32 ui32Vsync;
+ IMG_UINT32 ui32Vblanking;
+};
+
+/* Definition of GTF timings */
+static const struct GTF_TIMINGS_DEF gsGtfTimings[] =
+{
+ /* 0: 640 x 480 @ 75HZ */
+ { 640, 480, 75, 31500, 16, 64, 200, 1, 3, 20, },
+ /* 1: 800 x 600 @ 56HZ */
+ { 800, 600, 56, 36000, 24, 72, 224, 1, 2, 25, },
+ /* 2: 800 x 600 @ 72HZ */
+ { 800, 600, 72, 50000, 56, 120, 240, 37, 6, 66, },
+ /* 3: 1024 x 768 @ 75HZ */
+ { 1024, 768, 75, 78800, 16, 96, 288, 1, 3, 32, },
+ /* 4: 1024 x 768 @ 70HZ */
+ { 1024, 768, 70, 75000, 24, 136, 304, 3, 6, 38, },
+ /* 5: 1024 x 768 @ 60HZ */
+ { 1024, 768, 60, 65000, 24, 136, 320, 3, 6, 38, },
+ /* 6: 1024 x 768 @ 100HZ */
+ { 1024, 768, 100, 113310, 72, 112, 368, 1, 3, 46, },
+ /* 7: 1152 x 864 @ 75HZ */
+ { 1152, 864, 75, 108000, 64, 128, 448, 1, 3, 36, },
+ /* 8: 1280 x 1024 @ 75HZ */
+ { 1280, 1024, 75, 135000, 16, 144, 408, 1, 3, 42, },
+ /* 9: 1280 x 1024 @ 60HZ */
+ { 1280, 1024, 60, 108000, 48, 112, 408, 1, 3, 42, },
+ /* 10: 1440 x 900 @ 60HZ */
+ { 1440, 900, 60, 106470, 80, 152, 464, 1, 3, 32, },
+};
+#endif
+
+#define VMALLOC_TO_PAGE_PHYS(addr) page_to_phys(vmalloc_to_page(addr))
+
+#if !defined(SUPPORT_DRI_DRM)
+MODULE_SUPPORTED_DEVICE(DRVNAME);
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0))
+#define _PAGE_CACHE_WC cachemode2protval(_PAGE_CACHE_MODE_WC)
+#endif
+
+/*******************************************************************************
+ * I2C interface
+ ******************************************************************************/
+
+/*****************************************************************************
+ Function Name: I2CGetSda - Get SDA line status. 1 means low; 0 means high.
+ I2CGetScl - Get SCL line status. 1 means low; 0 means high.
+ I2CSetSda - Set SDA line. 1 to set high; 0 to set low.
+ I2CSetScl - Set SCL line. 1 to set high; 0 to set low.
+ Description : Four helper funtions allowing access to the GPIO pins.
+ These helper functions will be called by the registered
+ "bit banging" i2c algorithm implemented in Linux Kernel.
+*****************************************************************************/
+static IMG_INT32 I2CGetSda(IMG_VOID *pvData)
+{
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)pvData;
+ IMG_UINT32 ui32In;
+
+ ui32In = PVROSReadMMIOReg(psI2CInfo->psDevInfo, psI2CInfo->ui32Offset);
+
+ return PVRPSB_GPIO_DATA_IN_GET(ui32In);
+}
+
+static IMG_INT32 I2CGetScl(IMG_VOID *pvData)
+{
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)pvData;
+ IMG_UINT32 ui32In;
+
+ ui32In = PVROSReadMMIOReg(psI2CInfo->psDevInfo, psI2CInfo->ui32Offset);
+
+ return PVRPSB_GPIO_CLOCK_IN_GET(ui32In);
+}
+
+static IMG_VOID I2CSetSda(IMG_VOID *pvData, IMG_INT32 ui32State)
+{
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)pvData;
+ IMG_UINT32 ui32RegValue = 0;
+
+ ui32RegValue = PVRPSB_GPIO_DATA_DIR_MASK_SET(ui32RegValue, PVRPSB_GPIO_DATA_DIR_MASK_WRITE_VALUE);
+
+ if (ui32State != 0)
+ {
+ ui32RegValue = PVRPSB_GPIO_DATA_DIR_VALUE_SET(ui32RegValue, PVRPSB_GPIO_DATA_DIR_VALUE_IN);
+ ui32RegValue = PVRPSB_GPIO_DATA_MASK_SET(ui32RegValue, PVRPSB_GPIO_DATA_MASK_NOWRITE_VALUE);
+ }
+ else
+ {
+ ui32RegValue = PVRPSB_GPIO_DATA_DIR_VALUE_SET(ui32RegValue, PVRPSB_GPIO_DATA_DIR_VALUE_OUT);
+ ui32RegValue = PVRPSB_GPIO_DATA_MASK_SET(ui32RegValue, PVRPSB_GPIO_DATA_MASK_WRITE_VALUE);
+ }
+
+ PVROSWriteMMIOReg(psI2CInfo->psDevInfo, psI2CInfo->ui32Offset, ui32RegValue);
+}
+
+static IMG_VOID I2CSetScl(IMG_VOID *pvData, IMG_INT32 ui32State)
+{
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)pvData;
+ IMG_UINT32 ui32RegValue = 0;
+
+ ui32RegValue = PVRPSB_GPIO_CLOCK_DIR_MASK_SET(ui32RegValue, PVRPSB_GPIO_CLOCK_DIR_MASK_WRITE_VALUE);
+
+ if (ui32State != 0)
+ {
+ ui32RegValue = PVRPSB_GPIO_CLOCK_DIR_VALUE_SET(ui32RegValue, PVRPSB_GPIO_CLOCK_DIR_VALUE_IN);
+ ui32RegValue = PVRPSB_GPIO_CLOCK_MASK_SET(ui32RegValue, PVRPSB_GPIO_CLOCK_MASK_NOWRITE_VALUE);
+ }
+ else
+ {
+ ui32RegValue = PVRPSB_GPIO_CLOCK_DIR_VALUE_SET(ui32RegValue, PVRPSB_GPIO_CLOCK_DIR_VALUE_OUT);
+ ui32RegValue = PVRPSB_GPIO_CLOCK_MASK_SET(ui32RegValue, PVRPSB_GPIO_CLOCK_MASK_WRITE_VALUE);
+ }
+
+ PVROSWriteMMIOReg(psI2CInfo->psDevInfo, psI2CInfo->ui32Offset, ui32RegValue);
+}
+
+static int I2CMasterXfer(struct i2c_adapter *psAdapter, struct i2c_msg aMessages[], int iNumMessages)
+{
+ struct i2c_algo_bit_data *psAlgoData = (struct i2c_algo_bit_data *)psAdapter->algo_data;
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)psAlgoData->data;
+
+ if (aMessages[0].addr != psI2CInfo->ui32Addr)
+ {
+ IMG_UINT8 aui8Buf[4] = {PVRPSB_I2C_ARG0, 0x02, PVRPSB_I2C_CMD, PVRPSB_I2C_CMD_BUSSWITCH};
+ struct i2c_msg aConfigMsg[2];
+ int iReturn;
+
+ aConfigMsg[0].addr = psI2CInfo->ui32Addr;
+ aConfigMsg[0].flags = 0;
+ aConfigMsg[0].len = 2;
+ aConfigMsg[0].buf = &aui8Buf[0];
+
+ aConfigMsg[1].addr = psI2CInfo->ui32Addr;
+ aConfigMsg[1].flags = 0;
+ aConfigMsg[1].len = 2;
+ aConfigMsg[1].buf = &aui8Buf[2];
+
+ iReturn = psI2CInfo->sAlgorithms.master_xfer(psAdapter, aConfigMsg, 2);
+ if (iReturn != 2)
+ {
+ return iReturn;
+ }
+ }
+
+ return psI2CInfo->sAlgorithms.master_xfer(psAdapter, aMessages, iNumMessages);
+}
+
+static u32 I2CFunctionality(struct i2c_adapter *psAdapter)
+{
+ struct i2c_algo_bit_data *psAlgoData = (struct i2c_algo_bit_data *)psAdapter->algo_data;
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)psAlgoData->data;
+
+ return psI2CInfo->sAlgorithms.functionality(psAdapter);
+}
+
+static const struct i2c_algorithm sPSBI2CAlgorithm =
+{
+ .master_xfer = I2CMasterXfer,
+ .functionality = I2CFunctionality,
+};
+
+struct i2c_adapter *PVRI2CAdapterCreate(PVRPSB_DEVINFO *psDevInfo, const char *pszName, IMG_UINT32 ui32GPIOPort, IMG_UINT32 ui32Addr)
+{
+ struct i2c_adapter *psAdapter;
+ struct i2c_algo_bit_data *psAlgoData;
+ PVRI2C_INFO *psI2CInfo;
+ int iError;
+
+ psAdapter = (struct i2c_adapter *)kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
+ if (psAdapter == NULL)
+ {
+ return NULL;
+ }
+
+ /* Allocate and setup the i2c information. This will be passed to our SDA and SCL functions */
+ psI2CInfo = (PVRI2C_INFO *)PVROSAllocKernelMem(sizeof(PVRI2C_INFO));
+ if (psI2CInfo == NULL)
+ {
+ goto ExitAdapter;
+ }
+
+ psI2CInfo->psDevInfo = psDevInfo;
+ psI2CInfo->ui32Offset = ui32GPIOPort;
+ psI2CInfo->ui32Addr = ui32Addr;
+
+ /* Allocate and setup the I2C algorithm bit data */
+ psAlgoData = (struct i2c_algo_bit_data *)PVROSCallocKernelMem(sizeof(struct i2c_algo_bit_data));
+ if (psAlgoData == NULL)
+ {
+ goto ExitInfo;
+ }
+
+ /* Data to be passed in the I2C algorithm */
+ psAlgoData->data = psI2CInfo;
+
+ /* Holding time for the SDA/SCL line. Min holding time in the spec is 5ms */
+ psAlgoData->udelay = 20;
+
+ /* I2C slave device may hold SCL line low when it has to deal with its interrupts, etc.
+ Master must stop during this time. The 'timeout' specifies the expire time in
+ jiffies that the I2C master has to wait for the SCL line to go back to high. */
+ psAlgoData->timeout = 5;
+
+ psAlgoData->setsda = I2CSetSda;
+ psAlgoData->setscl = I2CSetScl;
+ psAlgoData->getsda = I2CGetSda;
+ psAlgoData->getscl = I2CGetScl;
+
+ /* Finally setup the adapter */
+ psAdapter->owner = THIS_MODULE;
+ psAdapter->algo_data = psAlgoData;
+
+ if (ui32GPIOPort == PVRPSB_GPIO_E)
+ {
+ struct i2c_adapter sTempAdapter = {0};
+
+ /* For SDVO there are cases were we need to do a bus switch (e.g. obtaining EDID info).
+ Instead of doing this explicitly we setup our own I2C master transfer function.
+ Within this function we make use of the generic master transfer function which
+ we extract by setting up a temporary I2C adapter. */
+ sTempAdapter.owner = THIS_MODULE;
+ sTempAdapter.algo_data = psAlgoData;
+ strlcpy(sTempAdapter.name, "PSB Temp I2C Adapter (SDVO)", sizeof(sTempAdapter.name));
+
+ if (i2c_bit_add_bus(&sTempAdapter))
+ {
+ goto ExitInfo;
+ }
+
+ /* Extract functions from temporary adapter. */
+ psI2CInfo->sAlgorithms.master_xfer = sTempAdapter.algo->master_xfer;
+ psI2CInfo->sAlgorithms.functionality = sTempAdapter.algo->functionality;
+
+ /* We have no more use for the temporary adapter so delete it */
+ i2c_del_adapter(&sTempAdapter);
+
+ psAdapter->algo = &sPSBI2CAlgorithm;
+ strlcpy(psAdapter->name, pszName ? pszName : "PSB I2C Adapter", sizeof(psAdapter->name));
+
+ iError = i2c_add_adapter(psAdapter);
+ }
+ else
+ {
+ strlcpy(psAdapter->name, pszName ? pszName : "PSB I2C Adapter", sizeof(psAdapter->name));
+
+ iError = i2c_bit_add_bus(psAdapter);
+ }
+
+ if (iError == 0)
+ {
+ return psAdapter;
+ }
+
+ PVROSFreeKernelMem(psAlgoData);
+
+ExitInfo:
+ PVROSFreeKernelMem(psI2CInfo);
+
+ExitAdapter:
+ PVROSFreeKernelMem(psAdapter);
+
+ return NULL;
+}
+
+IMG_VOID PVRI2CAdapterDestroy(struct i2c_adapter *psAdapter)
+{
+ struct i2c_algo_bit_data *psAlgoData = (struct i2c_algo_bit_data *)psAdapter->algo_data;
+ PVRI2C_INFO *psPortData = (PVRI2C_INFO *)psAlgoData->data;
+
+ i2c_del_adapter(psAdapter);
+
+ PVROSFreeKernelMem(psPortData);
+ PVROSFreeKernelMem(psAlgoData);
+ PVROSFreeKernelMem(psAdapter);
+}
+
+#if defined(SUPPORT_DRI_DRM)
+struct drm_connector *PVRGetConnectorForEncoder(struct drm_encoder *psEncoder)
+{
+ struct drm_connector *psConnector;
+ struct drm_connector *psConnectorTemp;
+ int i;
+
+ list_for_each_entry_safe(psConnector, psConnectorTemp, &psEncoder->dev->mode_config.connector_list, head)
+ {
+ for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
+ {
+ if (psConnector->encoder_ids[i] == psEncoder->base.id)
+ {
+ return psConnector;
+ }
+ }
+ }
+
+ return NULL;
+}
+
+/*******************************************************************************
+ * DRM mode config functions
+ ******************************************************************************/
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+static struct drm_framebuffer *ModeConfigUserFbCreate(struct drm_device *psDrmDev, struct drm_file *psFile, struct drm_mode_fb_cmd *psModeCommand)
+#else
+static struct drm_framebuffer *ModeConfigUserFbCreate(struct drm_device *psDrmDev, struct drm_file *psFile, struct drm_mode_fb_cmd2 *psModeCommand)
+#endif
+{
+ PVR_UNREFERENCED_PARAMETER(psDrmDev);
+ PVR_UNREFERENCED_PARAMETER(psFile);
+ PVR_UNREFERENCED_PARAMETER(psModeCommand);
+
+ /* Not supported */
+ return NULL;
+}
+
+static const struct drm_mode_config_funcs sModeConfigFuncs =
+{
+ .fb_create = ModeConfigUserFbCreate,
+};
+
+/******************************************************************************
+ * CRTC functions
+ ******************************************************************************/
+
+/* Control power levels on the CRTC. If the mode passed in is
+ unsupported, the provider must use the next lowest power level. */
+static void CrtcHelperDpms(struct drm_crtc *psCrtc, int iMode)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ const IMG_UINT32 ui32PipeConfReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_PIPEACONF : PVRPSB_PIPEBCONF;
+ const IMG_UINT32 ui32DspCntrReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPACNTR : PVRPSB_DSPBCNTR;
+ IMG_UINT32 ui32RegVal;
+
+ switch (iMode)
+ {
+ case DRM_MODE_DPMS_ON:
+ {
+ /* Enable the Pipe */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32PipeConfReg);
+ ui32RegVal = PVRPSB_PIPECONF_ENABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeConfReg, ui32RegVal);
+
+ PVROSSleepms(20);
+
+ /* Enable the display plane plane (we assume plane A is assigned to pipe A) */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32DspCntrReg);
+ ui32RegVal = PVRPSB_DSPCNTR_ENABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, ui32DspCntrReg, ui32RegVal);
+
+ break;
+ }
+ case DRM_MODE_DPMS_STANDBY:
+ case DRM_MODE_DPMS_SUSPEND:
+ case DRM_MODE_DPMS_OFF:
+ {
+ /* Don't disable the port because then we have no way of getting EDID data from the monitor */
+
+ /* Disable cursor plane plane (we always use plane A) */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ ui32RegVal = PVRPSB_CURACNTR_MODE_SET(ui32RegVal, PVRPSB_CURACNTR_MODE_OFF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURACNTR, ui32RegVal);
+
+ /* Disable the display plane (we assume plane A is assigned to pipe A) */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32DspCntrReg);
+ ui32RegVal = PVRPSB_DSPCNTR_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32DspCntrReg, ui32RegVal);
+
+ /* Disable the VGA display plane */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_VGA_CTL);
+ ui32RegVal = PVRPSB_VGA_CTL_DISABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VGA_CTL, ui32RegVal);
+
+ PVROSSleepms(20);
+
+ /* Disable pipe */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32PipeConfReg);
+ ui32RegVal = PVRPSB_PIPECONF_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeConfReg, ui32RegVal);
+
+ /* Wait for planes and pipe to be disabled */
+ PVROSSleepms(20);
+ break;
+ }
+ }
+}
+
+static void CrtcHelperPrepare(struct drm_crtc *psCrtc)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ const IMG_UINT32 ui32PipeConfReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_PIPEACONF : PVRPSB_PIPEBCONF;
+ const IMG_UINT32 ui32DspCntrReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPACNTR : PVRPSB_DSPBCNTR;
+ IMG_UINT32 ui32RegVal;
+
+ /* Disable cursor plane (we always use plane A) */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ ui32RegVal = PVRPSB_CURACNTR_MODE_SET(ui32RegVal, PVRPSB_CURACNTR_MODE_OFF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURACNTR, ui32RegVal);
+
+ /* Disable the display plane */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32DspCntrReg);
+ ui32RegVal = PVRPSB_DSPCNTR_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32DspCntrReg, ui32RegVal);
+
+ /* Disable the VGA display plane */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_VGA_CTL);
+ ui32RegVal = PVRPSB_VGA_CTL_DISABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VGA_CTL, ui32RegVal);
+
+ PVROSSleepms(20);
+
+ /* Disable pipe */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32PipeConfReg);
+ ui32RegVal = PVRPSB_PIPECONF_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeConfReg, ui32RegVal);
+
+ /* Wait for planes and pipe to be disabled */
+ PVROSSleepms(20);
+}
+
+static void CrtcHelperCommit(struct drm_crtc *psCrtc)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ const IMG_UINT32 ui32PipeConfReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_PIPEACONF : PVRPSB_PIPEBCONF;
+ const IMG_UINT32 ui32DspCntrReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPACNTR : PVRPSB_DSPBCNTR;
+ IMG_UINT32 ui32RegVal;
+
+ /* Enable pipe */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32PipeConfReg);
+ ui32RegVal = PVRPSB_PIPECONF_ENABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeConfReg, ui32RegVal);
+
+ /* Wait for the pipe to be enabled */
+ PVROSSleepms(20);
+
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32PipeConfReg);
+ ui32RegVal = PVRPSB_PIPECONF_PLANES_OFF_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_PIPECONF_CURSOR_OFF_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeConfReg, ui32RegVal);
+
+ /* Enable the display plane. Use this opportunity to also enforce some defaults
+ since we don't know what the BIOS might have done. */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32DspCntrReg);
+ ui32RegVal = PVRPSB_DSPCNTR_ENABLE_SET(ui32RegVal, 1);
+ ui32RegVal = PVRPSB_DSPCNTR_GAMMA_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_DSPCNTR_FORMAT_SET(ui32RegVal, PVRPSB_DSPCNTR_FORMAT_B8G8R8X8);
+ ui32RegVal = PVRPSB_DSPCNTR_PIXELMULTI_SET(ui32RegVal, PVRPSB_DSPCNTR_PIXELMULTI_NONE);
+ ui32RegVal = PVRPSB_DSPCNTR_180_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_DSPCNTR_TILED_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32DspCntrReg, ui32RegVal);
+
+ /* Set the cursor mode and base address. This will re-enable it if it was enabled before the modeset */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ ui32RegVal = PVRPSB_CURACNTR_MODE_SET(ui32RegVal, psDevInfo->sCursorInfo.ui32Mode);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURACNTR, ui32RegVal);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURABASE, PVROSReadMMIOReg(psDevInfo, PVRPSB_CURABASE));
+}
+
+static bool CrtcHelperModeFixup(struct drm_crtc *psCrtc, const struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode)
+{
+ /* Nothing to do here */
+ PVR_UNREFERENCED_PARAMETER(psCrtc);
+ PVR_UNREFERENCED_PARAMETER(psMode);
+ PVR_UNREFERENCED_PARAMETER(psAdjustedMode);
+
+ return true;
+}
+
+static int CrtcHelperModeSet(struct drm_crtc *psCrtc, struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode, int iX, int iY, struct drm_framebuffer *psOldFB)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ const IMG_UINT32 ui32HTotalReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_HTOTALA : PVRPSB_HTOTALB;
+ const IMG_UINT32 ui32HBlankReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_HBLANKA : PVRPSB_HBLANKB;
+ const IMG_UINT32 ui32HSyncReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_HSYNCA : PVRPSB_HSYNCB;
+ const IMG_UINT32 ui32VTotalReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_VTOTALA : PVRPSB_VTOTALB;
+ const IMG_UINT32 ui32VBlankReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_VBLANKA : PVRPSB_VBLANKB;
+ const IMG_UINT32 ui32VSyncReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_VSYNCA : PVRPSB_VSYNCB;
+ const IMG_UINT32 ui32BClrPatReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_BCLRPATA : PVRPSB_BCLRPATB;
+ const IMG_UINT32 ui32DspSize = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPASIZE : PVRPSB_DSPBSIZE;
+ const IMG_UINT32 ui32DspPos = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPAPOS : PVRPSB_DSPBPOS;
+ const IMG_UINT32 ui32PipeSrc = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_PIPEASRC : PVRPSB_PIPEBSRC;
+ const IMG_UINT32 ui32DspStride = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPASTRIDE : PVRPSB_DSPBSTRIDE;
+ const IMG_UINT32 ui32DspLinOff = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPALINOFF : PVRPSB_DSPBLINOFF;
+ const IMG_UINT32 ui32DspTileOff = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DSPATILEOFF : PVRPSB_DSPBTILEOFF;
+ IMG_UINT32 ui32FbOffset = 0;
+ IMG_UINT32 ui32RegVal;
+
+ PVR_UNREFERENCED_PARAMETER(iX);
+ PVR_UNREFERENCED_PARAMETER(iY);
+ PVR_UNREFERENCED_PARAMETER(psOldFB);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HTOTAL_TOTAL_SET(ui32RegVal, psAdjustedMode->htotal);
+ ui32RegVal = PVRPSB_HTOTAL_ACTIVE_SET(ui32RegVal, drm_mode_width(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32HTotalReg, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HBLANK_END_SET(ui32RegVal, psAdjustedMode->htotal);
+ ui32RegVal = PVRPSB_HBLANK_START_SET(ui32RegVal, drm_mode_width(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32HBlankReg, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HSYNC_END_SET(ui32RegVal, psAdjustedMode->hsync_end);
+ ui32RegVal = PVRPSB_HSYNC_START_SET(ui32RegVal, psAdjustedMode->hsync_start);
+ PVROSWriteMMIOReg(psDevInfo, ui32HSyncReg, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VTOTAL_TOTAL_SET(ui32RegVal, psAdjustedMode->vtotal);
+ ui32RegVal = PVRPSB_VTOTAL_ACTIVE_SET(ui32RegVal, drm_mode_height(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32VTotalReg, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VBLANK_END_SET(ui32RegVal, psAdjustedMode->vtotal);
+ ui32RegVal = PVRPSB_VBLANK_START_SET(ui32RegVal, drm_mode_height(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32VBlankReg, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VSYNC_END_SET(ui32RegVal, psAdjustedMode->vsync_end);
+ ui32RegVal = PVRPSB_VSYNC_START_SET(ui32RegVal, psAdjustedMode->vsync_start);
+ PVROSWriteMMIOReg(psDevInfo, ui32VSyncReg, ui32RegVal);
+
+ /* Set the border clear pattern to black */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_BCLRPAT_RED_SET(ui32RegVal, 0x00);
+ ui32RegVal = PVRPSB_BCLRPAT_GREEN_SET(ui32RegVal, 0x00);
+ ui32RegVal = PVRPSB_BCLRPAT_BLUE_SET(ui32RegVal, 0x00);
+ PVROSWriteMMIOReg(psDevInfo, ui32BClrPatReg, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_PIPESRC_HSIZE_SET(ui32RegVal, drm_mode_width(psAdjustedMode));
+ ui32RegVal = PVRPSB_PIPESRC_VSIZE_SET(ui32RegVal, drm_mode_height(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32PipeSrc, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSIZE_WIDTH_SET(ui32RegVal, drm_mode_width(psAdjustedMode));
+ ui32RegVal = PVRPSB_DSPSIZE_HEIGHT_SET(ui32RegVal, drm_mode_height(psAdjustedMode));
+ PVROSWriteMMIOReg(psDevInfo, ui32DspSize, ui32RegVal);
+
+ /* Really we should be taking into acount iX and iY and setting this register up accordingly. */
+ PVROSWriteMMIOReg(psDevInfo, ui32DspPos, 0);
+
+ ui32RegVal = 0;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+ ui32RegVal = PVRPSB_DSPSTRIDE_STRIDE_SET(ui32RegVal, crtc_to_fb(psCrtc)->pitch);
+#else
+ ui32RegVal = PVRPSB_DSPSTRIDE_STRIDE_SET(ui32RegVal, crtc_to_fb(psCrtc)->pitches[0]);
+#endif
+ PVROSWriteMMIOReg(psDevInfo, ui32DspStride, ui32RegVal);
+
+
+ if (crtc_to_fb(psCrtc))
+ {
+ PVRPSB_FRAMEBUFFER *psPVRFramebuffer = to_pvr_framebuffer(crtc_to_fb(psCrtc));
+
+ ui32FbOffset = psPVRFramebuffer->psBuffer->sDevVAddr.uiAddr - psDevInfo->sGTTInfo.sGMemDevVAddr.uiAddr;
+ }
+ PVROSWriteMMIOReg(psDevInfo, ui32DspLinOff, ui32FbOffset);
+ PVROSWriteMMIOReg(psDevInfo, ui32DspTileOff, 0);
+
+ printk(KERN_INFO DRVNAME " - changed mode to %dx%d@%dHz\n", drm_mode_width(psMode), drm_mode_height(psMode), drm_mode_vrefresh(psMode));
+
+ return 0;
+}
+
+static void CrtcHelperLoadLut(struct drm_crtc *psCrtc)
+{
+ PVR_UNREFERENCED_PARAMETER(psCrtc);
+}
+
+static const struct drm_crtc_helper_funcs sCrtcHelperFuncs =
+{
+ .dpms = CrtcHelperDpms,
+ .prepare = CrtcHelperPrepare,
+ .commit = CrtcHelperCommit,
+ .mode_fixup = CrtcHelperModeFixup,
+ .mode_set = CrtcHelperModeSet,
+ .mode_set_base = NULL,
+ .load_lut = CrtcHelperLoadLut,
+};
+
+static void CrtcSave(struct drm_crtc *psCrtc)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ PVRPSB_CRTC_STATE *psState = &psPVRCrtc->sSuspendState;
+ const IMG_UINT32 ui32DPallete = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DPALETTEA : PVRPSB_DPALETTEB;
+ IMG_UINT32 ui32I;
+
+ for (ui32I = 0; ui32I < PVRPSB_DPALETTE_LEN; ui32I++)
+ {
+ psState->aui32DPalette[ui32I] = PVROSReadMMIOReg(psDevInfo, ui32DPallete + (sizeof(IMG_UINT32) * ui32I));
+ }
+
+ /* Save HW cursor related registers (we always use cursor plane A) */
+ psState->ui32CurCntr = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ psState->ui32CurBase = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURABASE);
+ psState->ui32CurPos = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURAPOS);
+ psState->ui32CurPalet0 = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURAPALET0);
+ psState->ui32CurPalet1 = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURAPALET1);
+ psState->ui32CurPalet2 = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURAPALET2);
+ psState->ui32CurPalet3 = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURAPALET3);
+}
+
+static void CrtcRestore(struct drm_crtc *psCrtc)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ PVRPSB_CRTC_STATE *psState = &psPVRCrtc->sSuspendState;
+ const IMG_UINT32 ui32DPallete = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DPALETTEA : PVRPSB_DPALETTEB;
+ IMG_UINT32 ui32I;
+
+ for (ui32I = 0; ui32I < PVRPSB_DPALETTE_LEN; ui32I++)
+ {
+ PVROSWriteMMIOReg(psDevInfo, ui32DPallete + (sizeof(IMG_UINT32) * ui32I), psState->aui32DPalette[ui32I]);
+ }
+
+ /* Restore HW cursor related registers (we always use cursor plane A) */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPALET0, psState->ui32CurPalet0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPALET1, psState->ui32CurPalet1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPALET2, psState->ui32CurPalet2);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPALET3, psState->ui32CurPalet3);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPOS, psState->ui32CurPos);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURACNTR, psState->ui32CurCntr);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURABASE, psState->ui32CurBase);
+
+ /* We support a single output so we can assume the output was enabled. Restore its mode. */
+ drm_crtc_helper_set_mode(psCrtc, &psCrtc->mode, psCrtc->x, psCrtc->y, NULL);
+}
+
+static int CrtcCursorSet(struct drm_crtc *psCrtc, struct drm_file *psFile, uint32_t ui32Handle, uint32_t ui32Width, uint32_t ui32Height)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+ IMG_UINT32 ui32CursorMode;
+ IMG_UINT32 ui32CursorAddr;
+
+ if ((ui32Width == 0) || (ui32Height == 0))
+ {
+ /* Disable the cursor */
+ ui32CursorMode = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ ui32CursorMode = PVRPSB_CURACNTR_MODE_SET(ui32CursorMode, PVRPSB_CURACNTR_MODE_OFF);
+
+ ui32CursorAddr = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURABASE);
+
+ psDevInfo->sCursorInfo.ui32Mode = PVRPSB_CURACNTR_MODE_OFF;
+ }
+ else
+ {
+ if (psDevInfo->sCursorInfo.bLoaded == 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Cursor data hasn't been loaded\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ if (ui32Width > PVRPSB_HW_CURSOR_WIDTH || ui32Height > PVRPSB_HW_CURSOR_HEIGHT)
+ {
+ printk(KERN_ERR DRVNAME " - %s: specified cursor dimensions are too large\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ if (psDevInfo->sCursorInfo.psBuffer == NULL)
+ {
+ /* We were unable to preallocate memory for the cursor image */
+ printk(KERN_ERR DRVNAME " - %s: no space to store cursor\n", __FUNCTION__);
+
+ return -ENOMEM;
+ }
+
+ psDevInfo->sCursorInfo.ui32Width = ui32Width;
+ psDevInfo->sCursorInfo.ui32Height = ui32Height;
+
+ /* Enable the cursor */
+ ui32CursorMode = PVROSReadMMIOReg(psDevInfo, PVRPSB_CURACNTR);
+ ui32CursorMode = PVRPSB_CURACNTR_PIPE_SET(ui32CursorMode, psPVRCrtc->ePipe == PSB_PIPE_A ? PVRPSB_CURACNTR_PIPEA : PVRPSB_CURACNTR_PIPEB);
+
+ if (psDevInfo->sCursorInfo.psBuffer->bIsContiguous == PSB_TRUE)
+ {
+ ui32CursorMode = PVRPSB_CURACNTR_POPUP_SET(ui32CursorMode, 1);
+ ui32CursorAddr = psDevInfo->sCursorInfo.psBuffer->uSysAddr.sCont.uiAddr;
+ }
+ else
+ {
+ /* We have non-contiguous memory so we have to set the cursor base
+ address to the device virtual (graphics) address. Additionally we
+ must disable popup mode (i.e. use hi-res mode) so the base address
+ is treated as a graphics address. Unfortunately this results
+ in a corrupt cursor image being displayed. Maybe we are doing something
+ wrong? */
+ return -ENOMEM;
+
+ ui32CursorMode = PVRPSB_CURACNTR_POPUP_SET(ui32CursorMode, 0);
+ ui32CursorAddr = psDevInfo->sCursorInfo.psBuffer->sDevVAddr.uiAddr;
+ }
+
+ ui32CursorMode = PVRPSB_CURACNTR_GAMMA_SET(ui32CursorMode, 0);
+ ui32CursorMode = PVRPSB_CURACNTR_180_SET(ui32CursorMode, 0);
+ ui32CursorMode = PVRPSB_CURACNTR_MODE_SET(ui32CursorMode, PVRPSB_CURACNTR_MODE_64_32_ARGB);
+
+ psDevInfo->sCursorInfo.ui32Mode = PVRPSB_CURACNTR_MODE_64_32_ARGB;
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURACNTR, ui32CursorMode);
+
+ /* This triggers the cursor registers to be updated (they are double buffered) so needs to be done last. */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURABASE, ui32CursorAddr);
+
+ return 0;
+}
+
+static int CrtcCursorMove(struct drm_crtc *psCrtc, int iX, int iY)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psCrtc->dev->dev_private;
+ IMG_UINT32 ui32Position = 0;
+
+ psDevInfo->sCursorInfo.i32X = iX;
+ psDevInfo->sCursorInfo.i32Y = iY;
+
+ if (iX < 0)
+ {
+ ui32Position = PVRPSB_CURAPOS_XSIGN_SET(ui32Position, 1);
+ }
+
+ if (iY < 0)
+ {
+ ui32Position = PVRPSB_CURAPOS_YSIGN_SET(ui32Position, 1);
+ }
+
+ ui32Position = PVRPSB_CURAPOS_XMAG_SET(ui32Position, ABS(iX));
+ ui32Position = PVRPSB_CURAPOS_YMAG_SET(ui32Position, ABS(iY));
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURAPOS, ui32Position);
+
+ /* This triggers the cursor registers to be updated (they are double buffered). */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_CURABASE, PVROSReadMMIOReg(psDevInfo, PVRPSB_CURABASE));
+
+ return 0;
+}
+
+static void CrtcGammaSet(struct drm_crtc *psCrtc, u16 *pu16R, u16 *pu16G, u16 *pu16B, uint32_t ui32Start, uint32_t ui32Size)
+{
+ PVR_UNREFERENCED_PARAMETER(psCrtc);
+ PVR_UNREFERENCED_PARAMETER(pu16R);
+ PVR_UNREFERENCED_PARAMETER(pu16G);
+ PVR_UNREFERENCED_PARAMETER(pu16B);
+ PVR_UNREFERENCED_PARAMETER(ui32Start);
+ PVR_UNREFERENCED_PARAMETER(ui32Size);
+}
+
+static void CrtcDestroy(struct drm_crtc *psCrtc)
+{
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psCrtc);
+
+ drm_crtc_cleanup(psCrtc);
+ PVROSFreeKernelMem(psPVRCrtc);
+}
+
+static int CrtcSetConfig(struct drm_mode_set *psModeSet)
+{
+ return drm_crtc_helper_set_config(psModeSet);
+}
+
+static int CursorLoad(PVRPSB_DEVINFO *psDevInfo, char __user *pvCursorData, uint32_t ui32ByteSize)
+{
+ if (pvCursorData == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Invalid cursor data pointer.\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ if (psDevInfo == NULL ||
+ psDevInfo->sCursorInfo.psBuffer->pvCPUVAddr == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: No memory allocated for cursor\n", __FUNCTION__);
+ return -EFAULT;
+ }
+
+ /* Copy the cursor data into our cursor buffer */
+ if (copy_from_user(psDevInfo->sCursorInfo.psBuffer->pvCPUVAddr, pvCursorData, ui32ByteSize) != 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: unable to copy cursor data\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ /* Mark cursor data as loaded */
+ psDevInfo->sCursorInfo.bLoaded = 1;
+ return 0;
+}
+
+static const struct drm_crtc_funcs sCrtcFuncs =
+{
+ .save = CrtcSave,
+ .restore = CrtcRestore,
+ .cursor_set = CrtcCursorSet,
+ .cursor_move = CrtcCursorMove,
+ .gamma_set = CrtcGammaSet,
+ .destroy = CrtcDestroy,
+ .set_config = CrtcSetConfig,
+};
+
+static PVRPSB_CRTC *CrtcCreate(PVRPSB_DEVINFO *psDevInfo, PVRPSB_PIPE ePipe)
+{
+ PVRPSB_CRTC *psPVRCrtc;
+
+ psPVRCrtc = (PVRPSB_CRTC *)kzalloc(sizeof(PVRPSB_CRTC), GFP_KERNEL);
+ if (psPVRCrtc)
+ {
+ drm_crtc_init(psDevInfo->psDrmDev, &psPVRCrtc->sCrtc, &sCrtcFuncs);
+ drm_crtc_helper_add(&psPVRCrtc->sCrtc, &sCrtcHelperFuncs);
+
+ psPVRCrtc->ePipe = ePipe;
+ }
+
+ return psPVRCrtc;
+}
+
+
+/******************************************************************************
+ * Framebuffer functions
+ ******************************************************************************/
+static struct fb_ops sFbOps =
+{
+ .owner = THIS_MODULE,
+ .fb_check_var = drm_fb_helper_check_var,
+ .fb_set_par = drm_fb_helper_set_par,
+ .fb_fillrect = cfb_fillrect,
+ .fb_copyarea = cfb_copyarea,
+ .fb_imageblit = cfb_imageblit,
+ .fb_pan_display = drm_fb_helper_pan_display,
+ .fb_blank = drm_fb_helper_blank,
+ .fb_setcmap = drm_fb_helper_setcmap,
+ .fb_debug_enter = drm_fb_helper_debug_enter,
+ .fb_debug_leave = drm_fb_helper_debug_leave,
+};
+
+static void FramebufferDestroy(struct drm_framebuffer *psFramebuffer)
+{
+ PVRPSB_FRAMEBUFFER *psPVRFramebuffer = to_pvr_framebuffer(psFramebuffer);
+
+ drm_framebuffer_cleanup(psFramebuffer);
+ kfree(psPVRFramebuffer);
+}
+
+static int FramebufferCreateHandle(struct drm_framebuffer *psFramebuffer, struct drm_file *psFile, unsigned int *puiHandle)
+{
+ PVR_UNREFERENCED_PARAMETER(psFramebuffer);
+ PVR_UNREFERENCED_PARAMETER(psFile);
+ PVR_UNREFERENCED_PARAMETER(puiHandle);
+
+ return -ENOSYS;
+}
+
+static const struct drm_framebuffer_funcs sFramebufferFuncs =
+{
+ .destroy = FramebufferDestroy,
+ .create_handle = FramebufferCreateHandle,
+};
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+static PVRPSB_FRAMEBUFFER *FramebufferCreate(struct drm_device *psDrmDev, struct drm_mode_fb_cmd *psFbCommand, PVRPSB_BUFFER *psBuffer)
+#else
+static PVRPSB_FRAMEBUFFER *FramebufferCreate(struct drm_device *psDrmDev, struct drm_mode_fb_cmd2 *psFbCommand, PVRPSB_BUFFER *psBuffer)
+#endif
+{
+ PVRPSB_FRAMEBUFFER *psPVRFramebuffer;
+
+ psPVRFramebuffer = (PVRPSB_FRAMEBUFFER *)kzalloc(sizeof(PVRPSB_FRAMEBUFFER), GFP_KERNEL);
+ if (psPVRFramebuffer != NULL)
+ {
+ drm_framebuffer_init(psDrmDev, &psPVRFramebuffer->sFramebuffer, &sFramebufferFuncs);
+
+ drm_helper_mode_fill_fb_struct(&psPVRFramebuffer->sFramebuffer, psFbCommand);
+
+ psPVRFramebuffer->psBuffer = psBuffer;
+ }
+
+ return psPVRFramebuffer;
+}
+
+static int FbHelperProbe(struct drm_fb_helper *psFbHelper, struct drm_fb_helper_surface_size *psSizes)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psFbHelper->dev->dev_private;
+ PVRPSB_FRAMEBUFFER *psPVRFramebuffer;
+ struct fb_info *psFbInfo;
+ IMG_UINT32 ui32BufferSize;
+ int iResult;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+ struct drm_mode_fb_cmd sFbCommand;
+#else
+ struct drm_mode_fb_cmd2 sFbCommand;
+#endif
+
+ if (psFbHelper->fb != NULL)
+ {
+ return 0;
+ }
+
+ mutex_lock(&psFbHelper->dev->struct_mutex);
+
+ /* Create a Linux framebuffer */
+ psFbInfo = framebuffer_alloc(0, &psFbHelper->dev->pdev->dev);
+ if (psFbInfo == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to alloc a linux framebuffer.\n", __FUNCTION__);
+
+ iResult = -ENOMEM;
+ goto ExitDeviceMutexUnlock;
+ }
+
+ /* Create a PVR framebuffer */
+ sFbCommand.width = psSizes->surface_width;
+ sFbCommand.height = psSizes->surface_height;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+ sFbCommand.bpp = psSizes->surface_bpp;
+ sFbCommand.depth = psSizes->surface_depth;
+ sFbCommand.pitch = PVRPSB_ALIGN(psSizes->surface_width * (sFbCommand.bpp >> 3), PVRPSB_DSPSTRIDE_LINEAR_MEM);
+
+ ui32BufferSize = sFbCommand.height * sFbCommand.pitch;
+#else
+ sFbCommand.pixel_format = DRM_FORMAT_BGRX8888;
+ sFbCommand.pitches[0] = PVRPSB_ALIGN(psSizes->surface_width * 4, PVRPSB_DSPSTRIDE_LINEAR_MEM);
+
+ ui32BufferSize = sFbCommand.height * sFbCommand.pitches[0];
+#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)) */
+
+ psDevInfo->psSystemBuffer = PVRPSBCreateBuffer(psDevInfo, ui32BufferSize);
+ if (psDevInfo->psSystemBuffer == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a system buffer.\n", __FUNCTION__);
+
+ iResult = -ENOMEM;
+ goto ExitFramebufferRelease;
+ }
+
+ /* Clear the system buffer to black */
+ PVROSSetIOMem(psDevInfo->psSystemBuffer->pvCPUVAddr, 0, psDevInfo->psSystemBuffer->ui32Size);
+
+ psPVRFramebuffer = FramebufferCreate(psFbHelper->dev, &sFbCommand, psDevInfo->psSystemBuffer);
+ if (psPVRFramebuffer == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a framebuffer.\n", __FUNCTION__);
+
+ iResult = -ENOMEM;
+ goto ExitDestroyBuffer;
+ }
+
+
+ /* Store values to pass back to Services */
+ psDevInfo->sDisplayDims.ui32Width = psPVRFramebuffer->sFramebuffer.width;
+ psDevInfo->sDisplayDims.ui32Height = psPVRFramebuffer->sFramebuffer.height;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+ psDevInfo->sDisplayDims.ui32ByteStride = psPVRFramebuffer->sFramebuffer.pitch;
+#else
+ psDevInfo->sDisplayDims.ui32ByteStride = psPVRFramebuffer->sFramebuffer.pitches[0];
+#endif
+ psDevInfo->sDisplayFormat.pixelformat = PVRSRV_PIXEL_FORMAT_ARGB8888;
+
+ /* Fill out the Linux framebuffer info */
+ psFbHelper->fb = &psPVRFramebuffer->sFramebuffer;
+ psFbHelper->fbdev = psFbInfo;
+
+ psFbInfo->par = psFbHelper;
+ psFbInfo->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_DISABLED | FBINFO_CAN_FORCE_OUTPUT;
+ psFbInfo->fbops = &sFbOps;
+
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0))
+ drm_fb_helper_fill_fix(psFbInfo, psFbHelper->fb->pitch, psFbHelper->fb->depth);
+#else
+ drm_fb_helper_fill_fix(psFbInfo, psFbHelper->fb->pitches[0], psFbHelper->fb->depth);
+#endif
+ drm_fb_helper_fill_var(psFbInfo, psFbHelper, psFbHelper->fb->width, psFbHelper->fb->height);
+
+ strlcpy(psFbInfo->fix.id, DRVNAME, sizeof(psFbInfo->fix.id));
+ psFbInfo->fix.smem_start = psDevInfo->psSystemBuffer->sDevVAddr.uiAddr;
+ psFbInfo->fix.smem_len = ui32BufferSize;
+
+ psFbInfo->screen_base = psDevInfo->psSystemBuffer->pvCPUVAddr;
+ psFbInfo->screen_size = ui32BufferSize;
+
+ iResult = fb_alloc_cmap(&psFbInfo->cmap, 256, 0);
+ if (iResult != 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to allocate framebuffer cmap with error %d.\n", __FUNCTION__, iResult);
+
+ goto ExitFramebufferDestroy;
+ }
+
+ psFbInfo->apertures = alloc_apertures(1);
+ if (psFbInfo->apertures == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to allocate aperture.\n", __FUNCTION__);
+
+ iResult = -ENOMEM;
+ goto ExitDeallocCmap;
+ }
+ psFbInfo->apertures->ranges[0].base = psDevInfo->sGTTInfo.sGMemDevVAddr.uiAddr;
+ psFbInfo->apertures->ranges[0].size = psDevInfo->sGTTInfo.ui32GMemSizeInPages << PVRPSB_PAGE_SHIFT;
+
+ mutex_unlock(&psFbHelper->dev->struct_mutex);
+
+ return 1;
+
+ExitDeallocCmap:
+ fb_dealloc_cmap(&psFbInfo->cmap);
+
+ExitFramebufferDestroy:
+ FramebufferDestroy(&psPVRFramebuffer->sFramebuffer);
+
+ExitDestroyBuffer:
+ PVRPSBDestroyBuffer(psDevInfo->psSystemBuffer);
+ psDevInfo->psSystemBuffer = NULL;
+
+ExitFramebufferRelease:
+ framebuffer_release(psFbInfo);
+
+ExitDeviceMutexUnlock:
+ mutex_unlock(&psFbHelper->dev->struct_mutex);
+
+ return iResult;
+}
+
+static struct drm_fb_helper_funcs sFbHelperFuncs =
+{
+ .fb_probe = FbHelperProbe,
+};
+
+/*******************************************************************************
+ * OS Specific functions
+ ******************************************************************************/
+
+PSB_ERROR PVROSModeSetInit(PVRPSB_DEVINFO *psDevInfo)
+{
+ struct drm_device *psDrmDev = psDevInfo->psDrmDev;
+ PVRPSB_CRTC *psPVRCrtc;
+ PSB_ERROR eReturn;
+ int iResult;
+
+ drm_mode_config_init(psDrmDev);
+
+ psDrmDev->mode_config.funcs = (void *)&sModeConfigFuncs;
+ psDrmDev->mode_config.min_width = PVRPSB_FB_WIDTH_MIN;
+ psDrmDev->mode_config.max_width = PVRPSB_FB_WIDTH_MAX;
+ psDrmDev->mode_config.min_height = PVRPSB_FB_HEIGHT_MIN;
+ psDrmDev->mode_config.max_height = PVRPSB_FB_HEIGHT_MAX;
+
+ /* In theory we can drive two outputs at the same time (there are two pipes).
+ However, we support only one pipe so create a single CRTC. */
+ if (PVRPSB_ADPA_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL)) != 0)
+ {
+ psDevInfo->eActivePipe = PSB_PIPE_A;
+
+ psPVRCrtc = CrtcCreate(psDevInfo, psDevInfo->eActivePipe);
+ if (psPVRCrtc == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a CRTC.\n", __FUNCTION__);
+
+ eReturn = PSB_ERROR_OUT_OF_MEMORY;
+ goto ExitConfigCleanup;
+ }
+
+ eReturn = CRTSetup(psDevInfo);
+ }
+ else if (PVRPSB_LVDS_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_LVDS_CTL)) != 0)
+ {
+ psDevInfo->eActivePipe = PSB_PIPE_B;
+
+ psPVRCrtc = CrtcCreate(psDevInfo, psDevInfo->eActivePipe);
+ if (psPVRCrtc == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a CRTC.\n", __FUNCTION__);
+
+ eReturn = PSB_ERROR_OUT_OF_MEMORY;
+ goto ExitConfigCleanup;
+ }
+
+ eReturn = LVDSSetup(psDevInfo);
+ }
+ else
+ {
+ psDevInfo->eActivePipe = PSB_PIPE_A;
+
+ psPVRCrtc = CrtcCreate(psDevInfo, psDevInfo->eActivePipe);
+ if (psPVRCrtc == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a CRTC.\n", __FUNCTION__);
+
+ eReturn = PSB_ERROR_OUT_OF_MEMORY;
+ goto ExitConfigCleanup;
+ }
+
+ eReturn = SDVOSetup(psDevInfo);
+ }
+
+ if (eReturn != PSB_OK)
+ {
+ goto ExitConfigCleanup;
+ }
+
+ mutex_lock(&psDrmDev->mode_config.mutex);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0))
+ drm_fb_helper_prepare(psDrmDev, &psDevInfo->sDrmFbHelper, &sFbHelperFuncs);
+#else
+ psDevInfo->sDrmFbHelper.funcs = &sFbHelperFuncs;
+#endif
+ iResult = drm_fb_helper_init(psDrmDev, &psDevInfo->sDrmFbHelper, psDrmDev->mode_config.num_crtc, psDrmDev->mode_config.num_connector);
+ if (iResult < 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: FB helper initialisation failed (%d)\n", __FUNCTION__, iResult);
+
+ eReturn = PSB_ERROR_GENERIC;
+ goto ExitModeConfigMutexUnlock;
+ }
+
+ iResult = drm_fb_helper_single_add_all_connectors(&psDevInfo->sDrmFbHelper);
+ if (iResult < 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: FB helper connector initialisation failed (%d)\n", __FUNCTION__, iResult);
+
+ eReturn = PSB_ERROR_GENERIC;
+ goto ExitFbHelperFini;
+ }
+
+ mutex_unlock(&psDrmDev->mode_config.mutex);
+
+ /* The return type is bool but it actually returns 0 for success and a
+ negative value for failure. This has been checked up to Linux 3.3. */
+ if (drm_fb_helper_initial_config(&psDevInfo->sDrmFbHelper, PVRPSB_PREFERRED_BPP) != 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: initial configuration failed\n", __FUNCTION__);
+
+ eReturn = PSB_ERROR_GENERIC;
+ mutex_lock(&psDrmDev->mode_config.mutex);
+ goto ExitFbHelperFini;
+ }
+
+ /* During initialisation, the X server schedules, in the kernel, the activation of a new VT and
+ the setting of its mode to KD_GRAPHICS. At some point later it will load this kernel module
+ which will try and take control of the console as part of drm_fb_helper_initial_config(). If
+ the new VT is activated and has its mode changed to KD_GRAPHICS before we can take control of
+ the console then fbcon won't call the fb_set_par function that we provided. We call this
+ function here to get around the problem. This isn't a problem in the none X case. */
+ drm_fb_helper_set_par(psDevInfo->sDrmFbHelper.fbdev);
+
+ return PSB_OK;
+
+ExitFbHelperFini:
+ if (psDevInfo->sDrmFbHelper.fbdev)
+ {
+ framebuffer_release(psDevInfo->sDrmFbHelper.fbdev);
+ psDevInfo->sDrmFbHelper.fbdev = NULL;
+ }
+
+ drm_fb_helper_fini(&psDevInfo->sDrmFbHelper);
+
+ExitModeConfigMutexUnlock:
+ mutex_unlock(&psDrmDev->mode_config.mutex);
+
+ExitConfigCleanup:
+ drm_mode_config_cleanup(psDevInfo->psDrmDev);
+
+ return eReturn;
+}
+
+#else /* defined(SUPPORT_DRI_DRM) */
+
+static PSB_BOOL ReadLvdsEdid(PVRPSB_DEVINFO *psDevInfo, IMG_UINT8 *pui8Buffer, IMG_UINT32 ui32BufferLength)
+{
+ struct i2c_adapter *psAdapter;
+ struct i2c_msg asMessage[2];
+ IMG_UINT8 ui8OutBuffer = 0;
+ IMG_UINT8 aui8Header[8] = {0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00};
+ PSB_BOOL bResult = PSB_FALSE;
+
+ /* Create an I2C adapter */
+ psAdapter = PVRI2CAdapterCreate(psDevInfo, "PSB I2C Adapter (SDVO)", PVRPSB_GPIO_C, 0);
+ if (psAdapter == NULL)
+ {
+ return PSB_FALSE;
+ }
+
+ /* Setup the I2C messages to get the EDID data block */
+ asMessage[0].addr = 0x50;
+ asMessage[0].flags = 0;
+ asMessage[0].len = 1;
+ asMessage[0].buf = &ui8OutBuffer;
+
+ asMessage[1].addr = 0x50;
+ asMessage[1].flags = I2C_M_RD;
+ asMessage[1].len = ui32BufferLength;
+ asMessage[1].buf = pui8Buffer;
+
+ /* Send the messages */
+ if (i2c_transfer(psAdapter, asMessage, 2) == 2)
+ {
+ /* Verify if we have got a valid EDID block. */
+ if (!memcmp(pui8Buffer, aui8Header, sizeof(aui8Header)))
+ {
+ IMG_UINT8 ui8Checksum = 0;
+
+ while (ui32BufferLength--)
+ {
+ ui8Checksum += pui8Buffer[ui32BufferLength];
+ }
+
+ if (ui8Checksum == 0)
+ {
+ bResult = PSB_TRUE;
+ }
+ }
+ }
+
+ /* Destroy the adapter now that we're finished */
+ PVRI2CAdapterDestroy(psAdapter);
+
+ return bResult;
+}
+
+static IMG_UINT32 SDVOGetDotClockMultiplier(IMG_UINT32 ui32DotClock)
+{
+ if (ui32DotClock >= 20000 && ui32DotClock <= 25000)
+ {
+ return 5;
+ }
+ else if (ui32DotClock > 25000 && ui32DotClock <= 50000)
+ {
+ return 4;
+ }
+ else if (ui32DotClock > 50000 && ui32DotClock < 100000)
+ {
+ return 2;
+ }
+ else
+ {
+ return 1;
+ }
+}
+
+PSB_ERROR PVROSModeSetInit(PVRPSB_DEVINFO *psDevInfo)
+{
+ IMG_UINT32 ui32Width;
+ IMG_UINT32 ui32Height;
+ IMG_UINT32 ui32RegVal;
+
+ if (PVRPSB_ADPA_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL)) != 0)
+ {
+ struct GTF_TIMINGS_DEF *psTiming = (struct GTF_TIMINGS_DEF *)&gsGtfTimings[2];
+ const PVRPSB_PLL_RANGE *psPllRange = NULL;
+ PLL_FREQ sPllFreqInfo;
+ IMG_UINT32 ui32PllCtrl;
+ IMG_UINT32 ui32HSyncStart;
+ IMG_UINT32 ui32VSyncStart;
+ IMG_UINT32 ui32HSyncEnd;
+ IMG_UINT32 ui32VSyncEnd;
+ IMG_UINT32 ui32HTotal;
+ IMG_UINT32 ui32VTotal;
+
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ psPllRange = &sCdvNonLvds27PllRange;
+ break;
+ case PSB_POULSBO:
+ psPllRange = &sPsbNonLvdsPllRange;
+ break;
+ case PSB_UNKNOWN:
+ printk(KERN_ERR DRVNAME " - %s: Unknown device\n", __FUNCTION__);
+ return PSB_ERROR_GENERIC;
+ }
+
+ if (PVRPSBSelectPLLFreq(psTiming->ui32Doc, psPllRange, &sPllFreqInfo) == PSB_FALSE)
+ {
+ return PSB_ERROR_GENERIC;
+ }
+
+ /* Disable port */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_ENABLE_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_OFF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+
+ /* Disable the display plane (we assume plane A is assigned to pipe A) */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPACNTR);
+ ui32RegVal = PVRPSB_DSPCNTR_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPACNTR, ui32RegVal);
+
+ /* Disable the VGA display plane */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_VGA_CTL);
+ ui32RegVal = PVRPSB_VGA_CTL_DISABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VGA_CTL, ui32RegVal);
+
+ /* Disable pipe */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_PIPEACONF);
+ ui32RegVal = PVRPSB_PIPECONF_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEACONF, ui32RegVal);
+
+ /* Wait for VBLANK */
+ PVROSSleepms(20);
+
+ /* Program PLL related registers */
+ ui32PllCtrl = 0;
+ ui32PllCtrl = PVRPSB_DPLL_ENABLE_SET(ui32PllCtrl, 0);
+ ui32PllCtrl = PVRPSB_DPLL_HIGHSPEED_ENABLE_SET(ui32PllCtrl, 0);
+ ui32PllCtrl = PVRPSB_DPLL_VGA_DISABLE_SET(ui32PllCtrl, 1);
+ ui32PllCtrl = PVRPSB_DPLL_MODE_SET(ui32PllCtrl, PVRPSB_DPLL_MODE_SDVO);
+ ui32PllCtrl = PVRPSB_DPLL_REF_CLOCK_SET(ui32PllCtrl, PVRPSB_DPLL_REF_CLOCK_DEFAULT);
+ ui32PllCtrl = PVRPSB_DPLL_CLOCK_MULTI_SET(ui32PllCtrl, 1);
+ ui32PllCtrl = PVRPSB_DPLL_P2_SET(ui32PllCtrl, ((10 - sPllFreqInfo.ui32P2) / 5));
+
+ if (sPllFreqInfo.ui32P2 == sCdvNonLvds27PllRange.ui32P2Hi)
+ {
+ ui32PllCtrl = PVRPSB_DPLL_P2_DIVIDE_SET(ui32PllCtrl, PVRPSB_DPLL_P2_DIVIDE_SDVO_10);
+ }
+ else
+ {
+ ui32PllCtrl = PVRPSB_DPLL_P2_DIVIDE_SET(ui32PllCtrl, PVRPSB_DPLL_P2_DIVIDE_SDVO_5);
+ }
+
+ /* Device specific setup of the DPLL register */
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ ui32PllCtrl = PVRPSB_DPLL_SYNC_CLOCK_ENABLE_SET(ui32PllCtrl, 1);
+ break;
+ case PSB_POULSBO:
+ ui32PllCtrl = PVRPSB_DPLL_P1_POSTDIVIDE_SET(ui32PllCtrl, (1 << (sPllFreqInfo.ui32P1 - 1)));
+ break;
+ case PSB_UNKNOWN:
+ break;
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL, ui32PllCtrl);
+ PVROSDelayus(150);
+
+ CRTProgramPLL(psDevInfo, &sPllFreqInfo, PSB_PIPE_A);
+ PVROSDelayus(150);
+
+ ui32PllCtrl = PVRPSB_DPLL_ENABLE_SET(ui32PllCtrl, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL, ui32PllCtrl);
+ ui32PllCtrl = PVROSReadMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL);
+
+ PVROSDelayus(150);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL, ui32PllCtrl);
+ PVROSReadMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL);
+ PVROSDelayus(150);
+
+
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_DPLLAMD);
+ ui32RegVal = PVRPSB_DPLLMD_DIV_HIRES_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_DPLLMD_MUL_HIRES_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLAMD, ui32RegVal);
+
+ /* Setup the polarity */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_POLARITY_SEL_SET(ui32RegVal, PVRPSB_ADPA_CTL_POLARITY_SEL_ADPA);
+ ui32RegVal = PVRPSB_ADPA_CTL_HPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_HI);
+ ui32RegVal = PVRPSB_ADPA_CTL_VPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_HI);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+
+
+ /*============== Pipe A Timing Setting (with pipe disabled) ============ */
+ ui32Width = psTiming->ui32Width;
+ ui32Height = psTiming->ui32Height;
+ ui32HSyncStart = psTiming->ui32Width + psTiming->ui32Hfront;
+ ui32VSyncStart = psTiming->ui32Height + psTiming->ui32Vfront;
+ ui32HSyncEnd = ui32HSyncStart + psTiming->ui32Hsync;
+ ui32VSyncEnd = ui32VSyncStart + psTiming->ui32Vsync;
+ ui32HTotal = psTiming->ui32Width + psTiming->ui32Hblanking;
+ ui32VTotal = psTiming->ui32Height + psTiming->ui32Vblanking;
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HTOTAL_TOTAL_SET(ui32RegVal, ui32HTotal);
+ ui32RegVal = PVRPSB_HTOTAL_ACTIVE_SET(ui32RegVal, ui32Width);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HTOTALA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HBLANK_END_SET(ui32RegVal, ui32HTotal);
+ ui32RegVal = PVRPSB_HBLANK_START_SET(ui32RegVal, ui32Width);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HBLANKA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HSYNC_END_SET(ui32RegVal, ui32HSyncEnd);
+ ui32RegVal = PVRPSB_HSYNC_START_SET(ui32RegVal, ui32HSyncStart);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HSYNCA, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VTOTAL_TOTAL_SET(ui32RegVal, ui32VTotal);
+ ui32RegVal = PVRPSB_VTOTAL_ACTIVE_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VTOTALA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VBLANK_END_SET(ui32RegVal, ui32VTotal);
+ ui32RegVal = PVRPSB_VBLANK_START_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VBLANKA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VSYNC_END_SET(ui32RegVal, ui32VSyncEnd);
+ ui32RegVal = PVRPSB_VSYNC_START_SET(ui32RegVal, ui32VSyncStart);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VSYNCA, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSIZE_WIDTH_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_DSPSIZE_HEIGHT_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPASIZE, ui32RegVal);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPAPOS, 0);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_PIPESRC_HSIZE_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_PIPESRC_VSIZE_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEASRC, ui32RegVal);
+
+ /* Enable Pipe A */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEACONF, 0x80000000);
+
+ /*==================== Display A Plane Setting =================== */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSTRIDE_STRIDE_SET(ui32RegVal, PVRPSB_ALIGN(ui32Width * 4, PVRPSB_DSPSTRIDE_LINEAR_MEM));
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPASTRIDE, ui32RegVal);
+ psDevInfo->sDisplayDims.ui32ByteStride = ui32RegVal;
+
+ /* Setup the display format */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPACNTR, 0x98000000);
+ psDevInfo->sDisplayFormat.pixelformat = PVRSRV_PIXEL_FORMAT_ARGB8888;
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPALINOFF, 0);
+
+ /* ========================= Port Control ====================== */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_ENABLE_SET(ui32RegVal, 1);
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_ON);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+
+ psDevInfo->eActivePipe = PSB_PIPE_A;
+ psDevInfo->sDisplayDims.ui32Width = psTiming->ui32Width;
+ psDevInfo->sDisplayDims.ui32Height = psTiming->ui32Height;
+
+ }
+ else if (PVRPSB_LVDS_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_LVDS_CTL)) != 0)
+ {
+ /* We determine if the 'vga' kernel parameter (this is actually a boot
+ loader option) has been used by checking if any framebuffers have been
+ registered. If there are no registered framebuffers then we get the
+ mode using EDID. Otherwise we simply stick with the vga mode. */
+ if (num_registered_fb == 0)
+ {
+
+ IMG_UINT8 *pui8EdidData;
+
+ pui8EdidData = PVROSAllocKernelMem(128);
+ if (pui8EdidData == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Failed to allocate EDID data block\n", __FUNCTION__);
+
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ if (ReadLvdsEdid(psDevInfo, pui8EdidData, 128))
+ {
+ /* Byte #56,#58,#59 and #61 define the native resolution.
+ * Reference to the EDID format definition. */
+ ui32Width = (((pui8EdidData[58] >> 4) << 8) | pui8EdidData[56]);
+ ui32Height = (((pui8EdidData[61] >> 4) << 8) | pui8EdidData[59]);
+ }
+ else
+ {
+ printk(KERN_WARNING DRVNAME " - %s: Failed to get EDID data block. Reverting to BIOS set mode.\n", __FUNCTION__);
+
+ ui32Width = PVRPSB_PIPESRC_HSIZE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_PIPEBSRC));
+ ui32Height = PVRPSB_PIPESRC_VSIZE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_PIPEBSRC));
+ }
+
+ /* We've got all the information we need from the EDID block so free the memory */
+ PVROSFreeKernelMem(pui8EdidData);
+ }
+ else
+ {
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_PIPEBSRC);
+ ui32Width = PVRPSB_PIPESRC_HSIZE_GET(ui32RegVal);
+ ui32Height = PVRPSB_PIPESRC_VSIZE_GET(ui32RegVal);
+ }
+
+ /* Turn off port, display plane, pipe */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_LVDS_CTL, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBCNTR, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEBCONF, 0);
+
+ /* VGA Display Disable */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VGA_CTL, 0x80000000);
+
+ /* Wait for VBLANK */
+ PVROSSleepms(20);
+
+ /*
+ * By default the timing registers for Pipe B are write protected when the
+ * system boots up. If we ever want to get this working then copy the SDVO
+ * case (as seen later in this function) but do the setup for Pipe B instead.
+ */
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSIZE_WIDTH_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_DSPSIZE_HEIGHT_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBSIZE, ui32RegVal);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBPOS, 0);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_PIPESRC_HSIZE_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_PIPESRC_VSIZE_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEBSRC, ui32RegVal);
+
+ /* Enable Pipe B */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEBCONF, 0x80000000);
+
+ /*==================== Display B Plane Setting =================== */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSTRIDE_STRIDE_SET(ui32RegVal, PVRPSB_ALIGN(ui32Width * 4, PVRPSB_DSPSTRIDE_LINEAR_MEM));
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBSTRIDE, ui32RegVal);
+ psDevInfo->sDisplayDims.ui32ByteStride = ui32RegVal;
+
+ /* Setup the display format */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBCNTR, 0x99000000);
+ psDevInfo->sDisplayFormat.pixelformat = PVRSRV_PIXEL_FORMAT_ARGB8888;
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPBLINOFF, 0);
+
+ /* ========================= Port Control ====================== */
+
+ /* LVDS Digital Display Port Control
+ * Border to the LVDS transmitter is disabled. (the border data would not be
+ * included in the active display data sent to the panel.
+ * Border should be used when in VGA centered (un-scaled) mode or when
+ * scaling a 4:3 source image to a wide screen panel (typical 16:9).
+ */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_LVDS_CTL, 0xC0200300);
+
+ psDevInfo->eActivePipe = PSB_PIPE_B;
+ psDevInfo->sDisplayDims.ui32Width = ui32Width;
+ psDevInfo->sDisplayDims.ui32Height = ui32Height;
+ }
+ else
+ {
+ struct GTF_TIMINGS_DEF *psTiming = (struct GTF_TIMINGS_DEF *)&gsGtfTimings[2];
+ PLL_FREQ sPllFreqInfo;
+ IMG_UINT32 ui32PllCtrl;
+ IMG_UINT32 ui32Fp0;
+ IMG_UINT32 ui32HSyncStart;
+ IMG_UINT32 ui32VSyncStart;
+ IMG_UINT32 ui32HSyncEnd;
+ IMG_UINT32 ui32VSyncEnd;
+ IMG_UINT32 ui32HTotal;
+ IMG_UINT32 ui32VTotal;
+
+ if (PVRPSB_SDVO_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_SDVOB_CTL)) == 0)
+ {
+ printk(KERN_WARNING DRVNAME " - %s: No monitor attached (SDVO B)\n", __FUNCTION__);
+ }
+
+ if (PVRPSBSelectPLLFreq(psTiming->ui32Doc * SDVOGetDotClockMultiplier(psTiming->ui32Doc), &sPsbNonLvdsPllRange, &sPllFreqInfo) == PSB_FALSE)
+ {
+ return PSB_ERROR_GENERIC;
+ }
+
+ ui32Fp0 = (sPllFreqInfo.ui32N << 16) | (sPllFreqInfo.ui32M1 << 8) | sPllFreqInfo.ui32M2;
+ ui32PllCtrl = 0x54000000 | ((10 - sPllFreqInfo.ui32P2) / 5) |
+ ((1 << (sPllFreqInfo.ui32P1 - 1)) << 16) | 0x030;
+
+ /* Turn off port, display plane and pipe */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_SDVOB_CTL, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VGA_CTL, 0x80000000);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEACONF, 0);
+ /* Wait for VBLANK */
+ PVROSSleepms(20);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL,
+ PVROSReadMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL) & 0x7FFFFFFF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL, ui32PllCtrl);
+
+ /* Enable PLL */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_FPA0, ui32Fp0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPLLA_CTL, ui32PllCtrl | 0x80000000);
+ PVROSDelayus(150);
+
+ /*============== Pipe A Timing Setting (with pipe disabled) ============ */
+ ui32Width = psTiming->ui32Width;
+ ui32Height = psTiming->ui32Height;
+ ui32HSyncStart = psTiming->ui32Width + psTiming->ui32Hfront;
+ ui32VSyncStart = psTiming->ui32Height + psTiming->ui32Vfront;
+ ui32HSyncEnd = ui32HSyncStart + psTiming->ui32Hsync;
+ ui32VSyncEnd = ui32VSyncStart + psTiming->ui32Vsync;
+ ui32HTotal = psTiming->ui32Width + psTiming->ui32Hblanking;
+ ui32VTotal = psTiming->ui32Height + psTiming->ui32Vblanking;
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HTOTAL_TOTAL_SET(ui32RegVal, ui32HTotal);
+ ui32RegVal = PVRPSB_HTOTAL_ACTIVE_SET(ui32RegVal, ui32Width);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HTOTALA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HBLANK_END_SET(ui32RegVal, ui32HTotal);
+ ui32RegVal = PVRPSB_HBLANK_START_SET(ui32RegVal, ui32Width);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HBLANKA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_HSYNC_END_SET(ui32RegVal, ui32HSyncEnd);
+ ui32RegVal = PVRPSB_HSYNC_START_SET(ui32RegVal, ui32HSyncStart);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HSYNCA, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VTOTAL_TOTAL_SET(ui32RegVal, ui32VTotal);
+ ui32RegVal = PVRPSB_VTOTAL_ACTIVE_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VTOTALA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VBLANK_END_SET(ui32RegVal, ui32VTotal);
+ ui32RegVal = PVRPSB_VBLANK_START_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VBLANKA, ui32RegVal);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_VSYNC_END_SET(ui32RegVal, ui32VSyncEnd);
+ ui32RegVal = PVRPSB_VSYNC_START_SET(ui32RegVal, ui32VSyncStart);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_VSYNCA, ui32RegVal);
+
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSIZE_WIDTH_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_DSPSIZE_HEIGHT_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPASIZE, ui32RegVal);
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPAPOS, 0);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_PIPESRC_HSIZE_SET(ui32RegVal, ui32Width);
+ ui32RegVal = PVRPSB_PIPESRC_VSIZE_SET(ui32RegVal, ui32Height);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEASRC, ui32RegVal);
+
+ /* Enable Pipe A */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PIPEACONF, 0x80000000);
+
+ /*==================== Display A Plane Setting =================== */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DSPSTRIDE_STRIDE_SET(ui32RegVal, PVRPSB_ALIGN(ui32Width * 4, PVRPSB_DSPSTRIDE_LINEAR_MEM));
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPASTRIDE, ui32RegVal);
+ psDevInfo->sDisplayDims.ui32ByteStride = ui32RegVal;
+
+ /* Setup the display format */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPACNTR, 0x98000000);
+ psDevInfo->sDisplayFormat.pixelformat = PVRSRV_PIXEL_FORMAT_ARGB8888;
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPALINOFF, 0);
+
+ /* ========================= Port Control ====================== */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_SDVOB_CTL, 0x80000000);
+
+ psDevInfo->eActivePipe = PSB_PIPE_A;
+ psDevInfo->sDisplayDims.ui32Width = psTiming->ui32Width;
+ psDevInfo->sDisplayDims.ui32Height = psTiming->ui32Height;
+ }
+
+ return PSB_OK;
+}
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+IMG_VOID PVROSModeSetDeinit(PVRPSB_DEVINFO *psDevInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ if (psDevInfo->sDrmFbHelper.fbdev)
+ {
+ struct fb_info *psFbInfo = psDevInfo->sDrmFbHelper.fbdev;
+
+ unregister_framebuffer(psFbInfo);
+
+ fb_dealloc_cmap(&psFbInfo->cmap);
+
+ framebuffer_release(psFbInfo);
+ }
+
+ drm_fb_helper_fini(&psDevInfo->sDrmFbHelper);
+ drm_framebuffer_cleanup(psDevInfo->sDrmFbHelper.fb);
+
+ PVRPSBDestroyBuffer(psDevInfo->psSystemBuffer);
+ psDevInfo->psSystemBuffer = NULL;
+
+ /* There's no point in detaching encoders from connectors since
+ we're destroying them all anyway */
+ drm_mode_config_cleanup(psDevInfo->psDrmDev);
+#endif /* defined(SUPPORT_DRI_DRM) */
+}
+
+void PVROSSaveState(PVRPSB_DEVINFO *psDevInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ PVRPSB_STATE *psState = &psDevInfo->sSuspendState;
+ struct drm_crtc *psCrtc;
+ struct drm_crtc *psCrtcTemp;
+ struct drm_connector *psConnector;
+ struct drm_connector *psConnectorTemp;
+
+ /* Save some non-standard PCI config state. Services will save off the standard PCI config state */
+ psState->sPciRegisters.ui16GraphicsControl = PVROSPciReadWord(psDevInfo, PVRPSB_PCIREG_GC);
+ psState->sPciRegisters.ui32StolenMemBase = PVROSPciReadDWord(psDevInfo, PVRPSB_PCIREG_BSM);
+ psState->sPciRegisters.ui32ASLStorage = PVROSPciReadDWord(psDevInfo, PVRPSB_PCIREG_ASLS);
+
+ /* Save GTT related registers */
+ psState->sDevRegisters.ui32PgTblValue = PVROSReadMMIOReg(psDevInfo, PVRPSB_PGTBL_CTL);
+
+ /* Save the contents of the GTT memory if it's in use */
+ if (psState->sDevRegisters.pui32GTTContents != NULL && psDevInfo->sGTTInfo.pvGTTCPUVAddr != NULL)
+ {
+ PVROSCopyFromIOMem(psState->sDevRegisters.pui32GTTContents, psDevInfo->sGTTInfo.pvGTTCPUVAddr, psDevInfo->sGTTInfo.ui32GTTSize);
+ }
+
+ /* Save some display related registers */
+ psState->sDevRegisters.ui32DspArb = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPARB);
+ psState->sDevRegisters.ui32DspFW1 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW1);
+ psState->sDevRegisters.ui32DspFW2 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW2);
+ psState->sDevRegisters.ui32DspFW3 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW3);
+ psState->sDevRegisters.ui32DspFW4 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW4);
+ psState->sDevRegisters.ui32DspFW5 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW5);
+ psState->sDevRegisters.ui32DspFW6 = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPFW6);
+ psState->sDevRegisters.ui32DspChicken = PVROSReadMMIOReg(psDevInfo, PVRPSB_DSPCHICKEN);
+
+ /* Save HW overlay related registers */
+ psState->sDevRegisters.ui32OvAdd = PVROSReadMMIOReg(psDevInfo, PVRPSB_OVADD);
+ psState->sDevRegisters.ui32OGamC5 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC5);
+ psState->sDevRegisters.ui32OGamC4 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC4);
+ psState->sDevRegisters.ui32OGamC3 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC3);
+ psState->sDevRegisters.ui32OGamC2 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC2);
+ psState->sDevRegisters.ui32OGamC1 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC1);
+ psState->sDevRegisters.ui32OGamC0 = PVROSReadMMIOReg(psDevInfo, PVRPSB_OGAMC0);
+
+ list_for_each_entry_safe(psConnector, psConnectorTemp, &psDevInfo->psDrmDev->mode_config.connector_list, head)
+ {
+ psConnector->funcs->save(psConnector);
+ }
+
+ list_for_each_entry_safe(psCrtc, psCrtcTemp, &psDevInfo->psDrmDev->mode_config.crtc_list, head)
+ {
+ psCrtc->funcs->restore(psCrtc);
+ }
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+}
+
+void PVROSRestoreState(PVRPSB_DEVINFO *psDevInfo)
+{
+#if defined(SUPPORT_DRI_DRM)
+ PVRPSB_STATE *psState = &psDevInfo->sSuspendState;
+ struct drm_crtc *psCrtc;
+ struct drm_crtc *psCrtcTemp;
+ struct drm_connector *psConnector;
+ struct drm_connector *psConnectorTemp;
+
+ /* Restore some PCI config state */
+ PVROSPciWriteWord(psDevInfo, PVRPSB_PCIREG_GC, psState->sPciRegisters.ui16GraphicsControl);
+ PVROSPciWriteDWord(psDevInfo, PVRPSB_PCIREG_BSM, psState->sPciRegisters.ui32StolenMemBase);
+ PVROSPciWriteDWord(psDevInfo, PVRPSB_PCIREG_ASLS, psState->sPciRegisters.ui32ASLStorage);
+
+ /* Restore GTT related registers */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_PGTBL_CTL, psState->sDevRegisters.ui32PgTblValue);
+
+ /* Restore the contents of the GTT memory */
+ if (psState->sDevRegisters.pui32GTTContents != NULL && psDevInfo->sGTTInfo.pvGTTCPUVAddr != NULL)
+ {
+ PVROSCopyToIOMem(psDevInfo->sGTTInfo.pvGTTCPUVAddr, psState->sDevRegisters.pui32GTTContents, psDevInfo->sGTTInfo.ui32GTTSize);
+ }
+
+ /* Restore some display related registers */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPARB, psState->sDevRegisters.ui32DspArb);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW1, psState->sDevRegisters.ui32DspFW1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW2, psState->sDevRegisters.ui32DspFW2);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW3, psState->sDevRegisters.ui32DspFW3);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW4, psState->sDevRegisters.ui32DspFW4);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW5, psState->sDevRegisters.ui32DspFW5);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPFW6, psState->sDevRegisters.ui32DspFW6);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DSPCHICKEN, psState->sDevRegisters.ui32DspChicken);
+
+ /* Restore HW overlay related registers */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC5, psState->sDevRegisters.ui32OGamC5);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC4, psState->sDevRegisters.ui32OGamC4);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC3, psState->sDevRegisters.ui32OGamC3);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC2, psState->sDevRegisters.ui32OGamC2);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC1, psState->sDevRegisters.ui32OGamC1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OGAMC0, psState->sDevRegisters.ui32OGamC0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_OVADD, psState->sDevRegisters.ui32OvAdd);
+
+
+ list_for_each_entry_safe(psCrtc, psCrtcTemp, &psDevInfo->psDrmDev->mode_config.crtc_list, head)
+ {
+ psCrtc->funcs->restore(psCrtc);
+ }
+
+ list_for_each_entry_safe(psConnector, psConnectorTemp, &psDevInfo->psDrmDev->mode_config.connector_list, head)
+ {
+ psConnector->funcs->restore(psConnector);
+ }
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+}
+
+void PVROSDelayus(IMG_UINT32 ui32Timeus)
+{
+ udelay(ui32Timeus);
+}
+
+void PVROSSleepms(IMG_UINT32 ui32Timems)
+{
+ msleep(ui32Timems);
+}
+
+void *PVROSAllocKernelMem(unsigned long ulSize)
+{
+ return kmalloc(ulSize, GFP_KERNEL);
+}
+
+void *PVROSCallocKernelMem(unsigned long ulSize)
+{
+ return kzalloc(ulSize, GFP_KERNEL);
+}
+
+void PVROSFreeKernelMem(void *pvMem)
+{
+ kfree(pvMem);
+}
+
+IMG_CPU_VIRTADDR PVROSAllocKernelMemForBuffer(unsigned long ulSize, IMG_SYS_PHYADDR *psSysAddr)
+{
+ IMG_UINT32 ui32SizeInPages = ulSize >> PVRPSB_PAGE_SHIFT;
+ IMG_CPU_VIRTADDR pvCPUVAddr;
+ IMG_UINT32 ui32PageNum;
+
+ pvCPUVAddr = __vmalloc(ulSize,
+ GFP_KERNEL | __GFP_HIGHMEM,
+ __pgprot((pgprot_val(PAGE_KERNEL) & ~_PAGE_CACHE_MASK) | _PAGE_CACHE_WC));
+
+ if (pvCPUVAddr != NULL && psSysAddr != NULL)
+ {
+ for (ui32PageNum = 0; ui32PageNum < ui32SizeInPages; ui32PageNum++)
+ {
+ psSysAddr[ui32PageNum].uiAddr = VMALLOC_TO_PAGE_PHYS(pvCPUVAddr + (ui32PageNum * PVRPSB_PAGE_SIZE));
+ }
+ }
+
+ return pvCPUVAddr;
+}
+
+IMG_VOID PVROSFreeKernelMemForBuffer(IMG_CPU_VIRTADDR pvCPUVAddr)
+{
+ vfree(pvCPUVAddr);
+}
+
+void *PVROSMapPhysAddr(IMG_SYS_PHYADDR sSysAddr, IMG_UINT32 ui32Size)
+{
+ void *pvAddr = ioremap(sSysAddr.uiAddr, ui32Size);
+ return pvAddr;
+}
+
+void *PVROSMapPhysAddrWC(IMG_SYS_PHYADDR sSysAddr, IMG_UINT32 ui32Size)
+{
+ void *pvAddr = ioremap_wc(sSysAddr.uiAddr, ui32Size);
+ return pvAddr;
+}
+
+void PVROSUnMapPhysAddr(void *pvAddr)
+{
+ iounmap(pvAddr);
+}
+
+IMG_UINT32 PVROSPciReadDWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg)
+{
+ IMG_UINT32 ui32RetVal = 0;
+
+#if defined(SUPPORT_DRI_DRM)
+ pci_read_config_dword(psDevInfo->psDrmDev->pdev, ui32Reg, &ui32RetVal);
+#else
+ pci_read_config_dword(psDevInfo->psPciDev, ui32Reg, &ui32RetVal);
+#endif
+
+ return ui32RetVal;
+}
+
+IMG_VOID PVROSPciWriteDWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT32 ui32Value)
+{
+#if defined(SUPPORT_DRI_DRM)
+ pci_write_config_dword(psDevInfo->psDrmDev->pdev, ui32Reg, ui32Value);
+#else
+ pci_write_config_dword(psDevInfo->psPciDev, ui32Reg, ui32Value);
+#endif
+}
+
+IMG_UINT16 PVROSPciReadWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg)
+{
+ IMG_UINT16 ui16RetVal = 0;
+
+#if defined(SUPPORT_DRI_DRM)
+ pci_read_config_word(psDevInfo->psDrmDev->pdev, ui32Reg, &ui16RetVal);
+#else
+ pci_read_config_word(psDevInfo->psPciDev, ui32Reg, &ui16RetVal);
+#endif
+
+ return ui16RetVal;
+}
+
+IMG_VOID PVROSPciWriteWord(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT16 ui16Value)
+{
+#if defined(SUPPORT_DRI_DRM)
+ pci_write_config_word(psDevInfo->psDrmDev->pdev, ui32Reg, ui16Value);
+#else
+ pci_write_config_word(psDevInfo->psPciDev, ui32Reg, ui16Value);
+#endif
+}
+
+IMG_UINT8 PVROSPciReadByte(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg)
+{
+ IMG_UINT8 ui8RetVal = 0;
+
+#if defined(SUPPORT_DRI_DRM)
+ pci_read_config_byte(psDevInfo->psDrmDev->pdev, ui32Reg, &ui8RetVal);
+#else
+ pci_read_config_byte(psDevInfo->psPciDev, ui32Reg, &ui8RetVal);
+#endif
+
+ return ui8RetVal;
+}
+
+IMG_VOID PVROSPciWriteByte(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT8 ui8Value)
+{
+#if defined(SUPPORT_DRI_DRM)
+ pci_write_config_byte(psDevInfo->psDrmDev->pdev, ui32Reg, ui8Value);
+#else
+ pci_write_config_byte(psDevInfo->psPciDev, ui32Reg, ui8Value);
+#endif
+}
+
+IMG_UINT32 PVROSReadIOMem(void *pvRegAddr)
+{
+ return ioread32(pvRegAddr);
+}
+
+void PVROSWriteIOMem(void *pvRegAddr, IMG_UINT32 ui32Value)
+{
+ iowrite32(ui32Value, pvRegAddr);
+}
+
+void PVROSSetIOMem(void *pvAddr, IMG_UINT8 ui8Value, IMG_UINT32 ui32Size)
+{
+ memset_io(pvAddr, ui8Value, ui32Size);
+}
+
+void PVROSCopyToIOMem(void *pvDstAddr, void *pvSrcAddr, IMG_UINT32 ui32Size)
+{
+ memcpy_toio(pvDstAddr, pvSrcAddr, ui32Size);
+}
+
+void PVROSCopyFromIOMem(void *pvDstAddr, void *pvSrcAddr, IMG_UINT32 ui32Size)
+{
+ memcpy_fromio(pvDstAddr, pvSrcAddr, ui32Size);
+}
+
+#if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL)
+int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Ioctl)(struct drm_device *psDrmDev, void *pvArg, struct drm_file *psFile)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psDrmDev->dev_private;
+ struct pvr_drm_display_args sDrmData;
+ uint32_t ui32Cmd;
+ IMG_UINT32 ui32PVRDevID;
+
+ if (pvArg == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Missing arguments\n", __FUNCTION__);
+ return -EINVAL;
+ }
+
+ sDrmData = *((struct pvr_drm_display_args *) pvArg);
+ ui32Cmd = sDrmData.ui32Cmd;
+ ui32PVRDevID = sDrmData.ui32DevId;
+
+ if (psDevInfo == NULL || psDevInfo->ui32ID != ui32PVRDevID)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Invalid device ID (%d)\n", __FUNCTION__, ui32PVRDevID);
+ return -EINVAL;
+ }
+
+ switch (ui32Cmd)
+ {
+ case PVR_DRM_DISP_CMD_LEAVE_VT:
+ {
+ if (psDevInfo->bLeaveVT == PSB_FALSE)
+ {
+ if (psDevInfo->psSwapChain != NULL)
+ {
+ PVRPSBFlushInternalVSyncQueue(psDevInfo);
+#if defined(SYS_USING_INTERRUPTS)
+ /* Do this after PVRPSBFlushInternalVSyncQueue since this will
+ disable and re-enable VSync interrupts */
+ PVRPSBDisableVSyncInterrupt(psDevInfo);
+#endif
+ /* Save the current buffer before flipping to the system buffer
+ so that we can restore it when we re-enter the VT */
+ psDevInfo->psSavedBuffer = psDevInfo->psCurrentBuffer;
+
+ PVRPSBFlip(psDevInfo, psDevInfo->psSystemBuffer);
+ }
+
+ psDevInfo->bLeaveVT = PSB_TRUE;
+ }
+ break;
+ }
+ case PVR_DRM_DISP_CMD_ENTER_VT:
+ {
+ if (psDevInfo->bLeaveVT == PSB_TRUE)
+ {
+ psDevInfo->bLeaveVT = PSB_FALSE;
+
+ if (psDevInfo->psSwapChain != NULL)
+ {
+ if (psDevInfo->psSavedBuffer != NULL)
+ {
+ PVRPSBFlip(psDevInfo, psDevInfo->psSavedBuffer);
+ psDevInfo->psSavedBuffer = NULL;
+ }
+ else
+ {
+ printk(KERN_ERR DRVNAME " - %s: Missing saved buffer\n", __FUNCTION__);
+ }
+#if defined(SYS_USING_INTERRUPTS)
+ PVRPSBEnableVSyncInterrupt(psDevInfo);
+#endif
+ }
+ }
+ break;
+ }
+ case PVR_DRM_DISP_CMD_CURSOR_LOAD:
+ {
+ struct pvr_drm_cursor_load_data sCursorLoad;
+ sCursorLoad = sDrmData.sCursorLoad;
+
+ CursorLoad(psDevInfo, (char __user *) (uintptr_t) sCursorLoad.ui64CursorData, sCursorLoad.ui32ByteSize);
+ break;
+ }
+ default:
+ {
+ printk(KERN_ERR DRVNAME " - %s: Invalid command\n", __FUNCTION__);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+#endif /* #if defined(PVR_DISPLAY_CONTROLLER_DRM_IOCTL) */
+
+/*****************************************************************************
+ Function Name: PVRPSB_Init
+ Description : Insert the driver into the kernel.
+
+ The device major number is allocated by the kernel dynamically
+ if AssignedMajorNumber is zero on entry. This means that the
+ device node (nominally /dev/pvrpdp) may need to be re-made if
+ the kernel varies the major number it assigns. The number
+ does seem to stay constant between runs, but I don't think
+ this is guaranteed. The node is made as root on the shell
+ with:
+ mknod /dev/pvrpdp c ? 0
+
+ where ? is the major number reported by the printk() - look
+ at the boot log using `dmesg' to see this).
+
+ __init places the function in a special memory section that
+ the kernel frees once the function has been run. Refer also
+ to module_init() macro call below.
+*****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+int PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Init)(struct drm_device *psDrmDev)
+#else
+static int __init PVRPSB_Init(void)
+#endif
+{
+ PVRPSB_DEVINFO *psDevInfo;
+
+#if defined(SUPPORT_DRI_DRM)
+ if (psDrmDev == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: No DRM device present\n", __FUNCTION__);
+
+ return -ENODEV;
+ }
+#endif
+
+ psDevInfo = PVRPSBGetDevInfo();
+ if (psDevInfo == NULL)
+ {
+#if defined(SUPPORT_DRI_DRM)
+ struct drm_connector *psConnector;
+ struct drm_connector *psConnectorTemp;
+#endif
+ struct pci_dev *psPciDev;
+ PSB_ERROR eReturn;
+ int iReturn;
+
+ /* Get and enable the PCI device so that we can poke registers */
+ psPciDev = pci_get_bus_and_slot(PVRPSB_BUS_ID, PCI_DEVFN(PVRPSB_DEV_ID, PVRPSB_FUNC));
+ if (psPciDev == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: pci_get_device failed\n", __FUNCTION__);
+
+ return -ENODEV;
+ }
+
+ iReturn = pci_enable_device(psPciDev);
+ if (iReturn != 0)
+ {
+ printk(KERN_ERR DRVNAME " - %s: pci_enable_device failed (%d)\n", __FUNCTION__, iReturn);
+
+ return iReturn;
+ }
+
+ /* Allocate the device info and fill in some information */
+ psDevInfo = (PVRPSB_DEVINFO *)PVROSCallocKernelMem(sizeof(PVRPSB_DEVINFO));
+ if (psDevInfo == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to allocate device info\n", __FUNCTION__);
+
+ pci_disable_device(psPciDev);
+ return -ENOMEM;
+ }
+ psDevInfo->ui32RefCount = 0;
+
+#if defined(SUPPORT_DRI_DRM)
+ psDevInfo->psDrmDev = psDrmDev;
+ psDevInfo->psDrmDev->dev_private = psDevInfo;
+#else
+ psDevInfo->psPciDev = psPciDev;
+#endif
+
+ /* Do the generic part of the device initialisation */
+ eReturn = PVRPSBInit(psDevInfo);
+
+#if !defined(SUPPORT_DRI_DRM)
+ psDevInfo->psPciDev = NULL;
+#endif
+
+ /* To prevent possible problems with system suspend/resume, we don't
+ keep the device enabled, but rely on the fact that the SGX driver
+ will have done a pci_enable_device. */
+ pci_disable_device(psPciDev);
+
+ if (eReturn != PSB_OK)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Can't init device (%d)\n", __FUNCTION__, eReturn);
+
+ PVROSFreeKernelMem(psDevInfo);
+ return -ENODEV;
+ }
+
+ /* We successfully initialised the device so store a pointer the device info for later retrieval. */
+ PVRPSBSetDevInfo(psDevInfo);
+
+#if defined(SUPPORT_DRI_DRM)
+ /* Initialisation is complete so now we need to make sure the monitor(s) is/are on */
+ list_for_each_entry_safe(psConnector, psConnectorTemp, &psDevInfo->psDrmDev->mode_config.connector_list, head)
+ {
+ drm_helper_connector_dpms(psConnector, DRM_MODE_DPMS_ON);
+ }
+#endif
+ }
+ psDevInfo->ui32RefCount++;
+
+ return 0;
+}
+
+/*****************************************************************************
+ Function Name: PVRPSB_Cleanup
+ Description : Remove the driver from the kernel.
+
+ __exit places the function in a special memory section that
+ the kernel frees once the function has been run. Refer also
+ to module_exit() macro call below.
+
+*****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+void PVR_DRM_MAKENAME(DISPLAY_CONTROLLER, _Cleanup)(struct drm_device *psDrmDev)
+#else
+static void __exit PVRPSB_Cleanup(void)
+#endif
+{
+#if defined(SUPPORT_DRI_DRM)
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psDrmDev->dev_private;
+#else
+ PVRPSB_DEVINFO *psDevInfo = PVRPSBGetDevInfo();
+#endif
+
+ if (psDevInfo == NULL)
+ {
+ return;
+ }
+
+ psDevInfo->ui32RefCount--;
+ if (psDevInfo->ui32RefCount == 0)
+ {
+ PSB_ERROR eReturn;
+#if defined(SUPPORT_DRI_DRM)
+ struct drm_connector *psConnector;
+ struct drm_connector *psConnectorTemp;
+
+ /* Turn monitors back on in case they are off */
+ list_for_each_entry_safe(psConnector, psConnectorTemp, &psDevInfo->psDrmDev->mode_config.connector_list, head)
+ {
+ drm_helper_connector_dpms(psConnector, DRM_MODE_DPMS_ON);
+ }
+#endif
+
+ eReturn = PVRPSBDeinit(psDevInfo);
+ if (eReturn != PSB_OK)
+ {
+ printk(KERN_ERR DRVNAME " - %s: Can't deinit device (%d)\n", __FUNCTION__, eReturn);
+ }
+
+ PVRPSBSetDevInfo(NULL);
+ PVROSFreeKernelMem(psDevInfo);
+ }
+}
+
+/* These macro calls define the initialisation and removal functions of the
+ driver. Although they are prefixed `module_', they apply when compiling
+ statically as well; in both cases they define the function the kernel will
+ run to start/stop the driver. */
+#if !defined(SUPPORT_DRI_DRM)
+module_init(PVRPSB_Init);
+module_exit(PVRPSB_Cleanup);
+#endif
+
+
+/******************************************************************************
+ End of file (poulsbo_linux.c)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.h b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.h
new file mode 100644
index 0000000..b59dfe2
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux.h
@@ -0,0 +1,197 @@
+/*************************************************************************/ /*!
+@Title Poulsbo Linux Display driver interface.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@Description Poulsbo Linux Display kernel driver structures and prototypes.
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#if !defined(__POULSBO_LINUX_H__)
+#define __POULSBO_LINUX_H__
+
+#include "dc_poulsbo.h"
+
+#if defined(SUPPORT_DRI_DRM)
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <drm/drmP.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_fb_helper.h>
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0))
+#include <drm/drm_modes.h>
+#endif
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#if defined(SUPPORT_DRI_DRM)
+#define PVRPSB_PREFERRED_BPP (32)
+
+#define to_pvr_crtc(crtc) container_of(crtc, PVRPSB_CRTC, sCrtc)
+#define to_pvr_connector(connector) container_of(connector, PVRPSB_CONNECTOR, sConnector)
+#define to_pvr_encoder(encoder) container_of(encoder, PVRPSB_ENCODER, sEncoder)
+#define to_pvr_framebuffer(framebuffer) container_of(framebuffer, PVRPSB_FRAMEBUFFER, sFramebuffer)
+
+typedef struct PVRPSB_CRTC_STATE_TAG
+{
+ IMG_UINT32 aui32DPalette[PVRPSB_DPALETTE_LEN];
+
+ IMG_UINT32 ui32CurCntr;
+ IMG_UINT32 ui32CurBase;
+ IMG_UINT32 ui32CurPos;
+ IMG_UINT32 ui32CurPalet0;
+ IMG_UINT32 ui32CurPalet1;
+ IMG_UINT32 ui32CurPalet2;
+ IMG_UINT32 ui32CurPalet3;
+} PVRPSB_CRTC_STATE;
+
+typedef struct PVRPSB_CRTC_TAG
+{
+ struct drm_crtc sCrtc;
+
+ PVRPSB_PIPE ePipe;
+
+ PVRPSB_CRTC_STATE sSuspendState;
+} PVRPSB_CRTC;
+
+typedef struct PVRPSB_CONNECTOR_TAG
+{
+ struct drm_connector sConnector;
+ struct i2c_adapter *psAdapter;
+
+ PVRPSB_PORT ePort;
+ IMG_UINT16 ui16ActiveEncoders;
+} PVRPSB_CONNECTOR;
+
+typedef struct PVRPSB_ENCODER_TAG
+{
+ struct drm_encoder sEncoder;
+
+ IMG_UINT16 ui16OutputType;
+} PVRPSB_ENCODER;
+
+typedef struct PVRPSB_FRAMEBUFFER_TAG
+{
+ struct drm_framebuffer sFramebuffer;
+
+ PVRPSB_BUFFER *psBuffer;
+} PVRPSB_FRAMEBUFFER;
+
+
+struct drm_connector *PVRGetConnectorForEncoder(struct drm_encoder *psEncoder);
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+/******************************************************************************
+ * CRT interface
+ *****************************************************************************/
+#if !defined(SUPPORT_DRI_DRM)
+void CRTProgramPLL(PVRPSB_DEVINFO *psDevInfo, PLL_FREQ *psPllFreqInfo, PVRPSB_PIPE ePipe);
+#else
+PSB_ERROR CRTSetup(PVRPSB_DEVINFO *psDevInfo);
+#endif /* !defined(SUPPORT_DRI_DRM) */
+
+/******************************************************************************
+ * LVDS interface
+ *****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+PSB_ERROR LVDSSetup(PVRPSB_DEVINFO *psDevInfo);
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+
+/******************************************************************************
+ * SDVO interface
+ *****************************************************************************/
+#if defined(SUPPORT_DRI_DRM)
+PSB_ERROR SDVOSetup(PVRPSB_DEVINFO *psDevInfo);
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+
+/******************************************************************************
+ * I2C interface
+ *****************************************************************************/
+/* Information about the port address, which will be used by the I2C bus. */
+typedef struct I2C_INFO_TAG
+{
+ PVRPSB_DEVINFO *psDevInfo;
+ IMG_UINT32 ui32Offset;
+ IMG_UINT32 ui32Addr;
+
+ struct i2c_algorithm sAlgorithms;
+} PVRI2C_INFO;
+
+struct i2c_adapter *PVRI2CAdapterCreate(PVRPSB_DEVINFO *psDevInfo, const char *pszName, IMG_UINT32 ui32GPIOPort, IMG_UINT32 ui32Addr);
+IMG_VOID PVRI2CAdapterDestroy(struct i2c_adapter *psAdapter);
+
+#if defined(SUPPORT_DRI_DRM)
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0))
+static inline int drm_mode_width(const struct drm_display_mode *mode)
+{
+ return mode->hdisplay;
+}
+
+static inline int drm_mode_height(const struct drm_display_mode *mode)
+{
+ return mode->vdisplay;
+}
+
+static inline struct drm_framebuffer *crtc_to_fb(struct drm_crtc *crtc)
+{
+ return crtc->primary->fb;
+}
+#else
+static inline struct drm_framebuffer *crtc_to_fb(struct drm_crtc *crtc)
+{
+ return crtc->fb;
+}
+#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)) */
+#endif /* defined(SUPPORT_DRI_DRM) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* !defined(__POULSBO_LINUX_H__) */
+
+/******************************************************************************
+ End of file (poulsbo_linux.h)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_crt.c b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_crt.c
new file mode 100644
index 0000000..1cd50e4
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_crt.c
@@ -0,0 +1,703 @@
+/*************************************************************************/ /*!
+@Title Poulsbo linux-specific CRT functions.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#include "poulsbo_linux.h"
+#include <linux/delay.h>
+
+#if defined(SUPPORT_DRI_DRM)
+#define PVRPSB_HOTPLUG_RETRIES (100)
+#endif
+
+#define WAIT_DPIO_RDY_RETURN(devInfo, retryCount, returnVal) \
+ do \
+ { \
+ IMG_UINT32 ui32Retries = retryCount; \
+ while (PVRPSB_DPIO_CMD_BUSY_GET(PVROSReadMMIOReg(devInfo, PVRPSB_DPIO_CMD))) \
+ { \
+ msleep(1); \
+ if (--ui32Retries == 0) \
+ { \
+ return returnVal; \
+ } \
+ } \
+ } while(0)
+
+static PSB_BOOL ReadDPIOReg(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT32 *pui32Value)
+{
+ IMG_UINT32 ui32RegVal;
+
+ /* Make sure there is no DPIO operation already in progress */
+ WAIT_DPIO_RDY_RETURN(psDevInfo, 1000, PSB_FALSE);
+
+ /* Set the address of the register we want to read */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_ADDR, ui32Reg);
+
+ /* Issue the read command */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DPIO_CMD_OP_SET(ui32RegVal, PVRPSB_DPIO_CMD_OP_READ);
+ ui32RegVal = PVRPSB_DPIO_CMD_TARGET_SET(ui32RegVal, PVRPSB_DPIO_CMD_TARGET_DPLL);
+ ui32RegVal = PVRPSB_DPIO_CMD_ENABLE_SET(ui32RegVal, 0xF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_CMD, ui32RegVal);
+
+ /* Wait for the read to complete */
+ WAIT_DPIO_RDY_RETURN(psDevInfo, 1000, PSB_FALSE);
+
+ /* Get the value that was read from the register */
+ *pui32Value = PVROSReadMMIOReg(psDevInfo, PVRPSB_DPIO_DATA);
+
+ return PSB_TRUE;
+}
+
+static PSB_BOOL WriteDPIOReg(PVRPSB_DEVINFO *psDevInfo, IMG_UINT32 ui32Reg, IMG_UINT32 ui32Value)
+{
+ IMG_UINT32 ui32RegVal;
+
+ /* Make sure there is no DPIO operation already in progress */
+ WAIT_DPIO_RDY_RETURN(psDevInfo, 1000, PSB_FALSE);
+
+ /* Set the address of the register to which we want to write and the data that should be written */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_ADDR, ui32Reg);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_DATA, ui32Value);
+
+ /* Issue the write command */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DPIO_CMD_OP_SET(ui32RegVal, PVRPSB_DPIO_CMD_OP_WRITE);
+ ui32RegVal = PVRPSB_DPIO_CMD_TARGET_SET(ui32RegVal, PVRPSB_DPIO_CMD_TARGET_DPLL);
+ ui32RegVal = PVRPSB_DPIO_CMD_ENABLE_SET(ui32RegVal, 0xF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_CMD, ui32RegVal);
+
+ /* Wait for the write to complete */
+ WAIT_DPIO_RDY_RETURN(psDevInfo, 1000, PSB_FALSE);
+
+ return PSB_TRUE;
+}
+
+#define RETURN_ON_FALSE(returnVal) if (returnVal == PSB_FALSE) return
+
+#if defined(SUPPORT_DRI_DRM)
+static void CRTProgramPLL(PVRPSB_DEVINFO *psDevInfo, PLL_FREQ *psPllFreqInfo, PVRPSB_PIPE ePipe)
+#else
+void CRTProgramPLL(PVRPSB_DEVINFO *psDevInfo, PLL_FREQ *psPllFreqInfo, PVRPSB_PIPE ePipe)
+#endif
+{
+ const IMG_UINT32 ui32DpioRefReg = (ePipe == PSB_PIPE_A) ? PVRPSB_DPIO_ADDR_REF_A : PVRPSB_DPIO_ADDR_REF_B;
+ const IMG_UINT32 ui32DpioMReg = (ePipe == PSB_PIPE_A) ? PVRPSB_DPIO_ADDR_M_A : PVRPSB_DPIO_ADDR_M_B;
+ const IMG_UINT32 ui32DpioNVcoReg = (ePipe == PSB_PIPE_A) ? PVRPSB_DPIO_ADDR_N_VCO_A : PVRPSB_DPIO_ADDR_N_VCO_B;
+ const IMG_UINT32 ui32DpioPReg = (ePipe == PSB_PIPE_A) ? PVRPSB_DPIO_ADDR_P_A : PVRPSB_DPIO_ADDR_P_B;
+ IMG_UINT32 ui32RegVal;
+ IMG_UINT32 ui32NVco;
+ IMG_UINT32 ui32M;
+ IMG_UINT32 ui32P;
+ IMG_UINT32 ui32Lane;
+
+ /* Reset the DPIO */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_CFG, 0);
+ PVROSReadMMIOReg(psDevInfo, PVRPSB_DPIO_CFG);
+
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_DPIO_CFG_MODE_SET(ui32RegVal, PVRPSB_DPIO_CFG_MODE_SELECT0);
+ ui32RegVal = PVRPSB_DPIO_CFG_RESET_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_DPIO_CFG, ui32RegVal);
+
+ /* Program the PLL registers */
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, ui32DpioRefReg, 0x0068A701)); /* Some magic */
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, ui32DpioMReg, &ui32M));
+ ui32M = PVRPSB_DPIO_DATA_M_M2_SET(ui32M, psPllFreqInfo->ui32M2);
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, ui32DpioMReg, ui32M));
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, ui32DpioNVcoReg, &ui32NVco));
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_N_SET(ui32NVco, psPllFreqInfo->ui32N);
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_MAGIC_SET(ui32NVco, 0x0107); /* Some more magic for good measure */
+
+ if (psPllFreqInfo->ui32Vco < 2250000)
+ {
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_SEL_SET(ui32NVco, 0);
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_CB_TUNE_SET(ui32NVco, 2);
+ }
+ else if (psPllFreqInfo->ui32Vco < 2750000)
+ {
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_SEL_SET(ui32NVco, 1);
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_CB_TUNE_SET(ui32NVco, 1);
+ }
+ else if (psPllFreqInfo->ui32Vco < 3300000)
+ {
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_SEL_SET(ui32NVco, 2);
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_CB_TUNE_SET(ui32NVco, 0);
+ }
+ else
+ {
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_SEL_SET(ui32NVco, 3);
+ ui32NVco = PVRPSB_DPIO_DATA_N_VCO_CB_TUNE_SET(ui32NVco, 0);
+ }
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, ui32DpioNVcoReg, ui32NVco));
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, ui32DpioPReg, &ui32P));
+ ui32P = PVRPSB_DPIO_DATA_P_P1_SET(ui32P, psPllFreqInfo->ui32P1);
+
+ if (psPllFreqInfo->ui32P2 == 10)
+ {
+ ui32P = PVRPSB_DPIO_DATA_P_P2_DIVIDE_SET(ui32P, PVRPSB_DPIO_DATA_P_P2_DIVIDE_10);
+ }
+ else if (psPllFreqInfo->ui32P2 == 5)
+ {
+ ui32P = PVRPSB_DPIO_DATA_P_P2_DIVIDE_SET(ui32P, PVRPSB_DPIO_DATA_P_P2_DIVIDE_5);
+ }
+ else
+ {
+ printk(KERN_WARNING DRVNAME " - %s: Unrecognised P2 value\n", __FUNCTION__);
+ }
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, ui32DpioPReg, ui32P));
+
+ if (ePipe == PSB_PIPE_A)
+ {
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE0, &ui32Lane));
+ ui32Lane = PVRPSB_DPIO_DATA_LANE_ENABLE_SET(ui32Lane, 3);
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE0, ui32Lane));
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE1, &ui32Lane));
+ ui32Lane = PVRPSB_DPIO_DATA_LANE_ENABLE_SET(ui32Lane, 3);
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE1, ui32Lane));
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE2, &ui32Lane));
+ ui32Lane = PVRPSB_DPIO_DATA_LANE_ENABLE_SET(ui32Lane, 3);
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE2, ui32Lane));
+
+ RETURN_ON_FALSE(ReadDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE3, &ui32Lane));
+ ui32Lane = PVRPSB_DPIO_DATA_LANE_ENABLE_SET(ui32Lane, 3);
+ RETURN_ON_FALSE(WriteDPIOReg(psDevInfo, PVRPSB_DPIO_ADDR_LANE3, ui32Lane));
+ }
+}
+
+#if defined(SUPPORT_DRI_DRM)
+/******************************************************************************
+ * Connector functions
+ ******************************************************************************/
+
+static int CRTConnectorHelperGetModes(struct drm_connector *psConnector)
+{
+ PVRPSB_CONNECTOR *psPVRConnector = to_pvr_connector(psConnector);
+ struct i2c_adapter *psAdapter = psPVRConnector->psAdapter;
+ struct edid *psEdid;
+
+ psEdid = drm_get_edid(psConnector, psAdapter);
+ if (psEdid == NULL)
+ {
+ return 0;
+ }
+
+ drm_mode_connector_update_edid_property(psConnector, psEdid);
+
+ return drm_add_edid_modes(psConnector, psEdid);
+}
+
+static int CRTConnectorHelperModeValid(struct drm_connector *psConnector, struct drm_display_mode *psMode)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psConnector->dev->dev_private;
+ const PVRPSB_PLL_RANGE *psPllRange = NULL;
+ int iModeStatus = MODE_BAD;
+
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ psPllRange = &sCdvNonLvds27PllRange;
+ break;
+ case PSB_POULSBO:
+ psPllRange = &sPsbNonLvdsPllRange;
+ break;
+ case PSB_UNKNOWN:
+ return iModeStatus;
+ }
+
+ if (psMode->flags & DRM_MODE_FLAG_INTERLACE)
+ {
+ iModeStatus = MODE_NO_INTERLACE;
+ }
+ else if (psMode->flags & DRM_MODE_FLAG_DBLSCAN)
+ {
+ iModeStatus = MODE_NO_DBLESCAN;
+ }
+ else if (psMode->clock < psPllRange->ui32DotClockMin)
+ {
+ iModeStatus = MODE_CLOCK_LOW;
+ }
+ else if (psMode->clock > psPllRange->ui32DotClockMax)
+ {
+ iModeStatus = MODE_CLOCK_HIGH;
+ }
+#if defined(PVRPSB_WIDTH) && defined(PVRPSB_HEIGHT)
+ else if (drm_mode_width(psMode) != PVRPSB_WIDTH || drm_mode_height(psMode) != PVRPSB_HEIGHT)
+ {
+ iModeStatus = MODE_ONE_SIZE;
+ }
+#endif
+#if defined(PVRPSB_VREFRESH)
+ else if (drm_mode_vrefresh(psMode) != PVRPSB_VREFRESH)
+ {
+ iModeStatus = MODE_VSYNC;
+ }
+#endif
+ else
+ {
+ iModeStatus = MODE_OK;
+ }
+
+ return iModeStatus;
+}
+
+static struct drm_encoder *CRTConnectorHelperBestEncoder(struct drm_connector *psConnector)
+{
+ struct drm_mode_object *psObject;
+
+ /* Pick the first encoder we find */
+ if (psConnector->encoder_ids[0] != 0)
+ {
+ psObject = drm_mode_object_find(psConnector->dev, psConnector->encoder_ids[0], DRM_MODE_OBJECT_ENCODER);
+ if (psObject != NULL)
+ {
+ return obj_to_encoder(psObject);
+ }
+ }
+
+ return NULL;
+}
+
+static struct drm_connector_helper_funcs sCRTConnectorHelperFuncs =
+{
+ .get_modes = CRTConnectorHelperGetModes,
+ .mode_valid = CRTConnectorHelperModeValid,
+ .best_encoder = CRTConnectorHelperBestEncoder,
+};
+
+static void CRTConnectorSave(struct drm_connector *psConnector)
+{
+}
+
+static void CRTConnectorRestore(struct drm_connector *psConnector)
+{
+}
+
+static enum drm_connector_status CRTConnectorDetect(struct drm_connector *psConnector, bool force)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psConnector->dev->dev_private;
+ enum drm_connector_status eStatus = connector_status_disconnected;
+ IMG_UINT32 ui32Retries;
+ IMG_UINT32 ui32AdpaCtlVal;
+ IMG_UINT32 ui32HotPlugVal;
+
+ /* Store out the ADPA control register value and turn off the ADPA output before using the hotplug registers */
+ ui32AdpaCtlVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ if (PVRPSB_ADPA_CTL_ENABLE_GET(ui32AdpaCtlVal) != 0)
+ {
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, 0);
+ }
+
+ /* Clear the hot plug status register */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HOTPLUG_STAT, 0);
+
+ /* Force a hotplug/unplug detection cycle */
+ ui32HotPlugVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_HOTPLUG);
+ ui32HotPlugVal = PVRPSB_HOTPLUG_CRT_EN_SET(ui32HotPlugVal, 1);
+ ui32HotPlugVal = PVRPSB_HOTPLUG_CRT_PERIOD_SET(ui32HotPlugVal, PVRPSB_HOTPLUG_CRT_PERIOD_64);
+ ui32HotPlugVal = PVRPSB_HOTPLUG_CRT_VOLT_SET(ui32HotPlugVal, PVRPSB_HOTPLUG_CRT_VOLT_50);
+ ui32HotPlugVal = PVRPSB_HOTPLUG_CRT_TRIGGER_SET(ui32HotPlugVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HOTPLUG, ui32HotPlugVal);
+
+ /* It seems that the hot plug status register doesn't report that an interrupt has
+ occurred so check the CRT hot plug trigger bit has been unset instead. */
+ for (ui32Retries = PVRPSB_HOTPLUG_RETRIES; PVRPSB_HOTPLUG_CRT_TRIGGER_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_HOTPLUG)) && ui32Retries != 0; ui32Retries--)
+ {
+ msleep(1);
+ }
+
+ if (psDevInfo->eDevice == PSB_CEDARVIEW)
+ {
+ /* Do it again for luck */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HOTPLUG, ui32HotPlugVal);
+ for (ui32Retries = PVRPSB_HOTPLUG_RETRIES; PVRPSB_HOTPLUG_CRT_EN_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_HOTPLUG)) && ui32Retries != 0; ui32Retries--)
+ {
+ msleep(1);
+ }
+ }
+
+ if (PVRPSB_HOTPLUG_CRT_DET_STAT_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_HOTPLUG_STAT)) != PVRPSB_HOTPLUG_CRT_DET_STAT_NONE)
+ {
+ eStatus = connector_status_connected;
+ }
+
+ /* Disable CRT hot plug */
+ ui32HotPlugVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_HOTPLUG);
+ ui32HotPlugVal = PVRPSB_HOTPLUG_CRT_EN_SET(ui32HotPlugVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_HOTPLUG, ui32HotPlugVal);
+
+ /* Write back the original ADPA_CTL value */
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32AdpaCtlVal);
+
+ return eStatus;
+}
+
+static int CRTConnectorSetProperty(struct drm_connector *psConnector, struct drm_property *psProperty, uint64_t ui64Val)
+{
+ return -ENOSYS;
+}
+
+static void CRTConnectorDestroy(struct drm_connector *psConnector)
+{
+ PVRPSB_CONNECTOR *psPVRConnector = to_pvr_connector(psConnector);
+
+ drm_mode_connector_update_edid_property(psConnector, NULL);
+ drm_connector_cleanup(psConnector);
+
+ PVRI2CAdapterDestroy(psPVRConnector->psAdapter);
+
+ PVROSFreeKernelMem(psPVRConnector);
+}
+
+static void CRTConnectorForce(struct drm_connector *psConnector)
+{
+ /* Not supported */
+}
+
+static const struct drm_connector_funcs sCRTConnectorFuncs =
+{
+ .dpms = drm_helper_connector_dpms,
+ .save = CRTConnectorSave,
+ .restore = CRTConnectorRestore,
+ .detect = CRTConnectorDetect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .set_property = CRTConnectorSetProperty,
+ .destroy = CRTConnectorDestroy,
+ .force = CRTConnectorForce,
+};
+
+static PVRPSB_CONNECTOR *CRTConnectorCreate(PVRPSB_DEVINFO *psDevInfo, struct i2c_adapter *psAdapter)
+{
+ PVRPSB_CONNECTOR *psPVRConnector;
+
+ psPVRConnector = (PVRPSB_CONNECTOR *)kzalloc(sizeof(PVRPSB_CONNECTOR), GFP_KERNEL);
+ if (psPVRConnector)
+ {
+ drm_connector_init(psDevInfo->psDrmDev, &psPVRConnector->sConnector, &sCRTConnectorFuncs, DRM_MODE_CONNECTOR_VGA);
+ drm_connector_helper_add(&psPVRConnector->sConnector, &sCRTConnectorHelperFuncs);
+
+ psPVRConnector->psAdapter = psAdapter;
+ psPVRConnector->ePort = PSB_PORT_ANALOG;
+ }
+
+ return psPVRConnector;
+}
+
+/******************************************************************************
+ * Encoder functions
+ ******************************************************************************/
+
+static void CRTEncoderHelperDpms(struct drm_encoder *psEncoder, int iMode)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ IMG_UINT32 ui32RegVal;
+
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+
+ switch (iMode)
+ {
+ case DRM_MODE_DPMS_ON:
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_ON);
+ break;
+ }
+ case DRM_MODE_DPMS_STANDBY:
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_STANDBY);
+ break;
+ }
+ case DRM_MODE_DPMS_SUSPEND:
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_SUSPEND);
+ break;
+ }
+ case DRM_MODE_DPMS_OFF:
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_OFF);
+ break;
+ }
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+}
+
+static bool CRTEncoderHelperModeFixup(struct drm_encoder *psEncoder, const struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode)
+{
+ /* Nothing to do */
+ return true;
+}
+
+static void CRTEncoderHelperPrepare(struct drm_encoder *psEncoder)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psEncoder->crtc);
+ IMG_UINT32 ui32RegVal;
+
+ /* Disable port stall */
+ ui32RegVal = 0;
+ ui32RegVal = PVRPSB_ADPA_CTL_ENABLE_SET(ui32RegVal, 1);
+ ui32RegVal = PVRPSB_ADPA_CTL_PIPE_SET(ui32RegVal, psPVRCrtc->ePipe);
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_OFF);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+
+ /* Disable port */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+}
+
+static void CRTEncoderHelperCommit(struct drm_encoder *psEncoder)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ IMG_UINT32 ui32RegVal;
+
+ /* Enable port */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_ENABLE_SET(ui32RegVal, 1);
+ ui32RegVal = PVRPSB_ADPA_CTL_DPMS_SET(ui32RegVal, PVRPSB_ADPA_CTL_DPMS_ON);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+}
+
+static void CRTEncoderHelperModeSet(struct drm_encoder *psEncoder, struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ PVRPSB_CRTC *psPVRCrtc = to_pvr_crtc(psEncoder->crtc);
+ const IMG_UINT32 ui32DpllCtlReg = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DPLLA_CTL : PVRPSB_DPLLB_CTL;
+ const IMG_UINT32 ui32DpllMd = (psPVRCrtc->ePipe == PSB_PIPE_A) ? PVRPSB_DPLLAMD : PVRPSB_DPLLBMD;
+ const PVRPSB_PLL_RANGE *psPllRange = NULL;
+ PLL_FREQ sPllFreqInfo;
+ IMG_UINT32 ui32PllCtl;
+ IMG_UINT32 ui32RegVal;
+
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ psPllRange = &sCdvNonLvds27PllRange;
+ break;
+ case PSB_POULSBO:
+ psPllRange = &sPsbNonLvdsPllRange;
+ break;
+ case PSB_UNKNOWN:
+ printk(KERN_ERR DRVNAME " - %s: Unknown device\n", __FUNCTION__);
+ return;
+ }
+
+ /* Determine PLL data for the given clock */
+ if (PVRPSBSelectPLLFreq(psMode->clock, psPllRange, &sPllFreqInfo) == PSB_FALSE)
+ {
+ printk(KERN_ERR DRVNAME " - %s: PVRPSBSelectPLLFreq failed\n", __FUNCTION__);
+ return;
+ }
+
+ /* Program PLL related registers */
+ ui32PllCtl = 0;
+ ui32PllCtl = PVRPSB_DPLL_ENABLE_SET(ui32PllCtl, 0);
+ ui32PllCtl = PVRPSB_DPLL_HIGHSPEED_ENABLE_SET(ui32PllCtl, 0);
+ ui32PllCtl = PVRPSB_DPLL_VGA_DISABLE_SET(ui32PllCtl, 1);
+ ui32PllCtl = PVRPSB_DPLL_MODE_SET(ui32PllCtl, PVRPSB_DPLL_MODE_SDVO);
+ ui32PllCtl = PVRPSB_DPLL_REF_CLOCK_SET(ui32PllCtl, PVRPSB_DPLL_REF_CLOCK_DEFAULT);
+ ui32PllCtl = PVRPSB_DPLL_CLOCK_MULTI_SET(ui32PllCtl, 1);
+ ui32PllCtl = PVRPSB_DPLL_P2_SET(ui32PllCtl, ((10 - sPllFreqInfo.ui32P2) / 5));
+
+ if (sPllFreqInfo.ui32P2 == sCdvNonLvds27PllRange.ui32P2Hi)
+ {
+ ui32PllCtl = PVRPSB_DPLL_P2_DIVIDE_SET(ui32PllCtl, PVRPSB_DPLL_P2_DIVIDE_SDVO_10);
+ }
+ else
+ {
+ ui32PllCtl = PVRPSB_DPLL_P2_DIVIDE_SET(ui32PllCtl, PVRPSB_DPLL_P2_DIVIDE_SDVO_5);
+ }
+
+ /* Device specific setup of the DPLL register */
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ ui32PllCtl = PVRPSB_DPLL_SYNC_CLOCK_ENABLE_SET(ui32PllCtl, 1);
+ break;
+ case PSB_POULSBO:
+ ui32PllCtl = PVRPSB_DPLL_P1_POSTDIVIDE_SET(ui32PllCtl, (1 << (sPllFreqInfo.ui32P1 - 1)));
+ break;
+ case PSB_UNKNOWN:
+ break;
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, ui32DpllCtlReg, ui32PllCtl);
+ PVROSDelayus(150);
+
+ CRTProgramPLL(psDevInfo, &sPllFreqInfo, psPVRCrtc->ePipe);
+ PVROSDelayus(150);
+
+ ui32PllCtl = PVRPSB_DPLL_ENABLE_SET(ui32PllCtl, 1);
+ PVROSWriteMMIOReg(psDevInfo, ui32DpllCtlReg, ui32PllCtl);
+ ui32PllCtl = PVROSReadMMIOReg(psDevInfo, ui32DpllCtlReg);
+
+ PVROSDelayus(150);
+
+ PVROSWriteMMIOReg(psDevInfo, ui32DpllCtlReg, ui32PllCtl);
+ PVROSReadMMIOReg(psDevInfo, ui32DpllCtlReg);
+ PVROSDelayus(150);
+
+
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, ui32DpllMd);
+ ui32RegVal = PVRPSB_DPLLMD_DIV_HIRES_SET(ui32RegVal, 0);
+ ui32RegVal = PVRPSB_DPLLMD_MUL_HIRES_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, ui32DpllMd, ui32RegVal);
+
+
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_ADPA_CTL);
+ ui32RegVal = PVRPSB_ADPA_CTL_POLARITY_SEL_SET(ui32RegVal, PVRPSB_ADPA_CTL_POLARITY_SEL_ADPA);
+
+ if (psAdjustedMode->flags & DRM_MODE_FLAG_PHSYNC)
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_HPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_HI);
+ }
+ else
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_HPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_LO);
+ }
+
+ if (psAdjustedMode->flags & DRM_MODE_FLAG_PVSYNC)
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_VPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_HI);
+ }
+ else
+ {
+ ui32RegVal = PVRPSB_ADPA_CTL_VPOLARITY_CTL_SET(ui32RegVal, PVRPSB_ADPA_CTL_VPOLARITY_CTL_ACTIVE_LO);
+ }
+
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_ADPA_CTL, ui32RegVal);
+}
+
+static const struct drm_encoder_helper_funcs sCRTEncoderHelperFuncs =
+{
+ .dpms = CRTEncoderHelperDpms,
+ .save = NULL,
+ .restore = NULL,
+ .mode_fixup = CRTEncoderHelperModeFixup,
+ .prepare = CRTEncoderHelperPrepare,
+ .commit = CRTEncoderHelperCommit,
+ .mode_set = CRTEncoderHelperModeSet,
+ .get_crtc = NULL,
+ .detect = NULL,
+ .disable = NULL,
+};
+
+static void CRTEncoderDestroy(struct drm_encoder *psEncoder)
+{
+ PVRPSB_ENCODER *psPVREncoder = to_pvr_encoder(psEncoder);
+
+ drm_encoder_cleanup(psEncoder);
+ PVROSFreeKernelMem(psPVREncoder);
+}
+
+static const struct drm_encoder_funcs sCRTEncoderFuncs =
+{
+ .destroy = CRTEncoderDestroy,
+};
+
+static PVRPSB_ENCODER *CRTEncoderCreate(PVRPSB_DEVINFO *psDevInfo)
+{
+ PVRPSB_ENCODER *psPVREncoder;
+
+ psPVREncoder = (PVRPSB_ENCODER *)kzalloc(sizeof(PVRPSB_ENCODER), GFP_KERNEL);
+ if (psPVREncoder)
+ {
+ drm_encoder_init(psDevInfo->psDrmDev, &psPVREncoder->sEncoder, &sCRTEncoderFuncs, DRM_MODE_ENCODER_DAC);
+ drm_encoder_helper_add(&psPVREncoder->sEncoder, &sCRTEncoderHelperFuncs);
+
+ /* This is a bit field that's used to determine by which CRTCs the encoder can be driven.
+ We have only one CRTC so always set to 0x1 */
+ psPVREncoder->sEncoder.possible_crtcs = 0x1;
+ }
+
+ return psPVREncoder;
+}
+
+/******************************************************************************
+ * Non-static functions
+ ******************************************************************************/
+PSB_ERROR CRTSetup(PVRPSB_DEVINFO *psDevInfo)
+{
+ struct i2c_adapter *psAdapter;
+ PVRPSB_CONNECTOR *psPVRConnector;
+ PVRPSB_ENCODER *psPVREncoder;
+
+ psAdapter = PVRI2CAdapterCreate(psDevInfo, "PSB I2C Adapter (CRT)", PVRPSB_GPIO_A, 0);
+ if (psAdapter == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create an I2C adapter.\n", __FUNCTION__);
+
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ psPVRConnector = CRTConnectorCreate(psDevInfo, psAdapter);
+ if (psPVRConnector == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create an CRT connector.\n", __FUNCTION__);
+
+ PVRI2CAdapterDestroy(psAdapter);
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ psPVREncoder = CRTEncoderCreate(psDevInfo);
+ if (psPVREncoder == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a CRT encoder.\n", __FUNCTION__);
+
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+ drm_mode_connector_attach_encoder(&psPVRConnector->sConnector, &psPVREncoder->sEncoder);
+
+ psDevInfo->sDisplayInfo.ui32PhysicalWidthmm = psPVRConnector->sConnector.display_info.width_mm;
+ psDevInfo->sDisplayInfo.ui32PhysicalHeightmm = psPVRConnector->sConnector.display_info.height_mm;
+
+ return PSB_OK;
+}
+
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+/******************************************************************************
+ End of file (poulsbo_linux_crt.c)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_lvds.c b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_lvds.c
new file mode 100644
index 0000000..95208f5
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_lvds.c
@@ -0,0 +1,351 @@
+/*************************************************************************/ /*!
+@Title Poulsbo linux-specific LVDS functions.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#include "poulsbo_linux.h"
+
+#if defined(SUPPORT_DRI_DRM)
+
+/******************************************************************************
+ * Connector functions
+ ******************************************************************************/
+
+static int LVDSConnectorHelperGetModes(struct drm_connector *psConnector)
+{
+ PVRPSB_CONNECTOR *psPVRConnector = to_pvr_connector(psConnector);
+ struct i2c_adapter *psAdapter = psPVRConnector->psAdapter;
+ struct edid *psEdid;
+
+ psEdid = drm_get_edid(psConnector, psAdapter);
+ if (psEdid == NULL)
+ {
+ return 0;
+ }
+
+ drm_mode_connector_update_edid_property(psConnector, psEdid);
+
+ return drm_add_edid_modes(psConnector, psEdid);
+}
+
+static int LVDSConnectorHelperModeValid(struct drm_connector *psConnector, struct drm_display_mode *psMode)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psConnector->dev->dev_private;
+ const PVRPSB_PLL_RANGE *psPllRange = NULL;
+ int iModeStatus = MODE_BAD;
+
+ switch (psDevInfo->eDevice)
+ {
+ case PSB_CEDARVIEW:
+ psPllRange = &sCdvSingleLvdsPllRange;
+ break;
+ case PSB_POULSBO:
+ psPllRange = &sPsbSingleLvdsPllRange;
+ break;
+ case PSB_UNKNOWN:
+ return iModeStatus;
+ }
+
+ if (psMode->flags & DRM_MODE_FLAG_INTERLACE)
+ {
+ iModeStatus = MODE_NO_INTERLACE;
+ }
+ else if (psMode->flags & DRM_MODE_FLAG_DBLSCAN)
+ {
+ iModeStatus = MODE_NO_DBLESCAN;
+ }
+ else if (psMode->clock < psPllRange->ui32DotClockMin)
+ {
+ iModeStatus = MODE_CLOCK_LOW;
+ }
+ else if (psMode->clock > psPllRange->ui32DotClockMax)
+ {
+ iModeStatus = MODE_CLOCK_HIGH;
+ }
+#if defined(PVRPSB_WIDTH) && defined(PVRPSB_HEIGHT)
+ else if (drm_mode_width(psMode) != PVRPSB_WIDTH || drm_mode_height(psMode) != PVRPSB_HEIGHT)
+ {
+ iModeStatus = MODE_ONE_SIZE;
+ }
+#endif
+#if defined(PVRPSB_VREFRESH)
+ else if (drm_mode_vrefresh(psMode) != PVRPSB_VREFRESH)
+ {
+ iModeStatus = MODE_VSYNC;
+ }
+#endif
+ else
+ {
+ iModeStatus = MODE_OK;
+ }
+
+ return iModeStatus;
+}
+
+static struct drm_encoder *LVDSConnectorHelperBestEncoder(struct drm_connector *psConnector)
+{
+ struct drm_mode_object *psObject;
+
+ /* Pick the first encoder we find */
+ if (psConnector->encoder_ids[0] != 0)
+ {
+ psObject = drm_mode_object_find(psConnector->dev, psConnector->encoder_ids[0], DRM_MODE_OBJECT_ENCODER);
+ if (psObject != NULL)
+ {
+ return obj_to_encoder(psObject);
+ }
+ }
+
+ return NULL;
+}
+
+static struct drm_connector_helper_funcs sLVDSConnectorHelperFuncs =
+{
+ .get_modes = LVDSConnectorHelperGetModes,
+ .mode_valid = LVDSConnectorHelperModeValid,
+ .best_encoder = LVDSConnectorHelperBestEncoder,
+};
+
+static void LVDSConnectorSave(struct drm_connector *psConnector)
+{
+}
+
+static void LVDSConnectorRestore(struct drm_connector *psConnector)
+{
+}
+
+static enum drm_connector_status LVDSConnectorDetect(struct drm_connector *psConnector, bool force)
+{
+ return connector_status_connected;
+}
+
+static int LVDSConnectorSetProperty(struct drm_connector *psConnector, struct drm_property *psProperty, uint64_t ui64Val)
+{
+ return -ENOSYS;
+}
+
+static void LVDSConnectorDestroy(struct drm_connector *psConnector)
+{
+ PVRPSB_CONNECTOR *psPVRConnector = to_pvr_connector(psConnector);
+
+ drm_mode_connector_update_edid_property(psConnector, NULL);
+ drm_connector_cleanup(psConnector);
+
+ PVRI2CAdapterDestroy(psPVRConnector->psAdapter);
+
+ PVROSFreeKernelMem(psPVRConnector);
+}
+
+static void LVDSConnectorForce(struct drm_connector *psConnector)
+{
+ /* Not supported */
+}
+
+static const struct drm_connector_funcs sLVDSConnectorFuncs =
+{
+ .dpms = drm_helper_connector_dpms,
+ .save = LVDSConnectorSave,
+ .restore = LVDSConnectorRestore,
+ .detect = LVDSConnectorDetect,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .set_property = LVDSConnectorSetProperty,
+ .destroy = LVDSConnectorDestroy,
+ .force = LVDSConnectorForce,
+};
+
+static PVRPSB_CONNECTOR *LVDSConnectorCreate(PVRPSB_DEVINFO *psDevInfo, struct i2c_adapter *psAdapter)
+{
+ PVRPSB_CONNECTOR *psPVRConnector;
+
+ psPVRConnector = (PVRPSB_CONNECTOR *)kzalloc(sizeof(PVRPSB_CONNECTOR), GFP_KERNEL);
+ if (psPVRConnector)
+ {
+ drm_connector_init(psDevInfo->psDrmDev, &psPVRConnector->sConnector, &sLVDSConnectorFuncs, DRM_MODE_CONNECTOR_LVDS);
+ drm_connector_helper_add(&psPVRConnector->sConnector, &sLVDSConnectorHelperFuncs);
+
+ psPVRConnector->psAdapter = psAdapter;
+ psPVRConnector->ePort = PSB_PORT_LVDS;
+ }
+
+ return psPVRConnector;
+}
+
+/******************************************************************************
+ * Encoder functions
+ ******************************************************************************/
+
+static void LVDSEncoderHelperDpms(struct drm_encoder *psEncoder, int iMode)
+{
+ /* Nothing to do */
+
+}
+
+static bool LVDSEncoderHelperModeFixup(struct drm_encoder *psEncoder, const struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode)
+{
+ /* Nothing to do */
+ return true;
+}
+
+static void LVDSEncoderHelperPrepare(struct drm_encoder *psEncoder)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ IMG_UINT32 ui32RegVal;
+
+ /* Disable port */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_LVDS_CTL);
+ ui32RegVal = PVRPSB_LVDS_CTL_ENABLE_SET(ui32RegVal, 0);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_LVDS_CTL, ui32RegVal);
+}
+
+static void LVDSEncoderHelperCommit(struct drm_encoder *psEncoder)
+{
+ PVRPSB_DEVINFO *psDevInfo = (PVRPSB_DEVINFO *)psEncoder->dev->dev_private;
+ IMG_UINT32 ui32RegVal;
+
+ /* Enable port */
+ ui32RegVal = PVROSReadMMIOReg(psDevInfo, PVRPSB_LVDS_CTL);
+ ui32RegVal = PVRPSB_LVDS_CTL_ENABLE_SET(ui32RegVal, 1);
+ PVROSWriteMMIOReg(psDevInfo, PVRPSB_LVDS_CTL, ui32RegVal);
+}
+
+static void LVDSEncoderHelperModeSet(struct drm_encoder *psEncoder, struct drm_display_mode *psMode, struct drm_display_mode *psAdjustedMode)
+{
+ /* Nothing to do */
+}
+
+static const struct drm_encoder_helper_funcs sLVDSEncoderHelperFuncs =
+{
+ .dpms = LVDSEncoderHelperDpms,
+ .save = NULL,
+ .restore = NULL,
+ .mode_fixup = LVDSEncoderHelperModeFixup,
+ .prepare = LVDSEncoderHelperPrepare,
+ .commit = LVDSEncoderHelperCommit,
+ .mode_set = LVDSEncoderHelperModeSet,
+ .get_crtc = NULL,
+ .detect = NULL,
+ .disable = NULL,
+};
+
+static void LVDSEncoderDestroy(struct drm_encoder *psEncoder)
+{
+ PVRPSB_ENCODER *psPVREncoder = to_pvr_encoder(psEncoder);
+
+ drm_encoder_cleanup(psEncoder);
+ PVROSFreeKernelMem(psPVREncoder);
+}
+
+static const struct drm_encoder_funcs sLVDSEncoderFuncs =
+{
+ .destroy = LVDSEncoderDestroy,
+};
+
+static PVRPSB_ENCODER *LVDSEncoderCreate(PVRPSB_DEVINFO *psDevInfo)
+{
+ PVRPSB_ENCODER *psPVREncoder;
+
+ psPVREncoder = (PVRPSB_ENCODER *)kzalloc(sizeof(PVRPSB_ENCODER), GFP_KERNEL);
+ if (psPVREncoder)
+ {
+ drm_encoder_init(psDevInfo->psDrmDev, &psPVREncoder->sEncoder, &sLVDSEncoderFuncs, DRM_MODE_ENCODER_LVDS);
+ drm_encoder_helper_add(&psPVREncoder->sEncoder, &sLVDSEncoderHelperFuncs);
+
+ /* This is a bit field that's used to determine by which CRTCs the encoder can be driven.
+ We have only one CRTC so always set to 0x1 */
+ psPVREncoder->sEncoder.possible_crtcs = 0x1;
+ }
+
+ return psPVREncoder;
+}
+
+/******************************************************************************
+ * Non-static functions
+ ******************************************************************************/
+PSB_ERROR LVDSSetup(PVRPSB_DEVINFO *psDevInfo)
+{
+ if (PVRPSB_LVDS_CTL_ENABLE_GET(PVROSReadMMIOReg(psDevInfo, PVRPSB_LVDS_CTL)) != 0)
+ {
+ struct i2c_adapter *psAdapter;
+ PVRPSB_CONNECTOR *psPVRConnector;
+ PVRPSB_ENCODER *psPVREncoder;
+
+ psAdapter = PVRI2CAdapterCreate(psDevInfo, "PSB I2C Adapter (LVDS)", PVRPSB_GPIO_C, 0);
+ if (psAdapter == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create an I2C adapter.\n", __FUNCTION__);
+
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ psPVRConnector = LVDSConnectorCreate(psDevInfo, psAdapter);
+ if (psPVRConnector == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create an LVDS connector.\n", __FUNCTION__);
+
+ PVRI2CAdapterDestroy(psAdapter);
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+
+ psPVREncoder = LVDSEncoderCreate(psDevInfo);
+ if (psPVREncoder == NULL)
+ {
+ printk(KERN_ERR DRVNAME " - %s: failed to create a LVDS encoder.\n", __FUNCTION__);
+
+ return PSB_ERROR_OUT_OF_MEMORY;
+ }
+ drm_mode_connector_attach_encoder(&psPVRConnector->sConnector, &psPVREncoder->sEncoder);
+
+ psDevInfo->sDisplayInfo.ui32PhysicalWidthmm = psPVRConnector->sConnector.display_info.width_mm;
+ psDevInfo->sDisplayInfo.ui32PhysicalHeightmm = psPVRConnector->sConnector.display_info.height_mm;
+ }
+ else
+ {
+ printk(KERN_ERR DRVNAME " - %s: no supported output ports found.\n", __FUNCTION__);
+
+ return PSB_ERROR_INIT_FAILURE;
+ }
+
+ return PSB_OK;
+}
+
+#endif /* #if defined(SUPPORT_DRI_DRM) */
+
+/******************************************************************************
+ End of file (poulsbo_linux_lvds.c)
+******************************************************************************/
diff --git a/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_sdvo.c b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_sdvo.c
new file mode 100644
index 0000000..e7b0301
--- /dev/null
+++ b/eurasia_km/services4/3rdparty/dc_poulsbo/poulsbo_linux_sdvo.c
@@ -0,0 +1,1011 @@
+/*************************************************************************/ /*!
+@Title Poulsbo linux-specific SDVO functions.
+@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
+@License Dual MIT/GPLv2
+
+The contents of this file are subject to the MIT license as set out below.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+Alternatively, the contents of this file may be used under the terms of
+the GNU General Public License Version 2 ("GPL") in which case the provisions
+of GPL are applicable instead of those above.
+
+If you wish to allow use of your version of this file only under the terms of
+GPL, and not to allow others to use your version of this file under the terms
+of the MIT license, indicate your decision by deleting the provisions above
+and replace them with the notice and other provisions required by GPL as set
+out in the file called "GPL-COPYING" included in this distribution. If you do
+not delete the provisions above, a recipient may use your version of this file
+under the terms of either the MIT license or GPL.
+
+This License is also included in this distribution in the file called
+"MIT-COPYING".
+
+EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
+PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
+BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
+PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+*/ /**************************************************************************/
+
+#include "poulsbo_linux.h"
+
+#if defined(SUPPORT_DRI_DRM)
+
+static IMG_UINT32 SDVOGetDotClockMultiplier(IMG_UINT32 ui32DotClock)
+{
+ if (ui32DotClock >= 100000)
+ {
+ return 1;
+ }
+ else if (ui32DotClock >= 50000)
+ {
+ return 2;
+ }
+ else if (ui32DotClock >= 25000)
+ {
+ return 4;
+ }
+ else /* ui32DotClock >= 20000 */
+ {
+ return 5;
+ }
+}
+
+static PSB_BOOL I2CReadByte(struct i2c_adapter *psAdapter, IMG_UINT8 ui8Op, IMG_UINT8 *pui8Byte)
+{
+ struct i2c_algo_bit_data *psAlgoData = (struct i2c_algo_bit_data *)psAdapter->algo_data;
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)psAlgoData->data;
+ struct i2c_msg sMessage[2];
+ IMG_UINT8 ui8OutBuffer;
+ IMG_UINT8 ui8InBuffer;
+
+ ui8OutBuffer = ui8Op;
+
+ sMessage[0].addr = psI2CInfo->ui32Addr;
+ sMessage[0].flags = 0;
+ sMessage[0].len = 1;
+ sMessage[0].buf = &ui8OutBuffer;
+
+ sMessage[1].addr = psI2CInfo->ui32Addr;
+ sMessage[1].flags = I2C_M_RD;
+ sMessage[1].len = 1;
+ sMessage[1].buf = &ui8InBuffer;
+
+ if (i2c_transfer(psAdapter, &sMessage[0], 2) == 2)
+ {
+ *pui8Byte = ui8InBuffer;
+
+ return PSB_TRUE;
+ }
+ else
+ {
+ return PSB_FALSE;
+ }
+}
+
+static PSB_BOOL I2CWriteByte(struct i2c_adapter *psAdapter, IMG_UINT8 ui8Op, IMG_UINT8 ui8Byte)
+{
+ struct i2c_algo_bit_data *psAlgoData = (struct i2c_algo_bit_data *)psAdapter->algo_data;
+ PVRI2C_INFO *psI2CInfo = (PVRI2C_INFO *)psAlgoData->data;
+ struct i2c_msg sMessage;
+ IMG_UINT8 aui8Buffer[2];
+
+ aui8Buffer[0] = ui8Op;
+ aui8Buffer[1] = ui8Byte;
+
+ sMessage.addr = psI2CInfo->ui32Addr;
+ sMessage.flags = 0;
+ sMessage.len = 2;
+ sMessage.buf = &aui8Buffer[0];
+
+ return (i2c_transfer(psAdapter, &sMessage, 1) == 1) ? PSB_TRUE : PSB_FALSE;
+}
+
+static PSB_BOOL I2CCheckDeviceStatus(struct i2c_adapter *psAdapter)
+{
+ IMG_UINT8 ui8Status = 0;
+
+ /* Read back the status */
+ if (I2CReadByte(psAdapter, PVRPSB_I2C_STATUS, &ui8Status) == PSB_FALSE)
+ {
+ return PSB_FALSE;
+ }
+
+ return (ui8Status == 1) ? PSB_TRUE : PSB_FALSE;
+}
+
+static PSB_BOOL I2CCommandRead(struct i2c_adapter *psAdapter, IMG_UINT8 ui8Command, IMG_UINT8 *pui8Buffer, IMG_UINT32 ui32BufferLength)
+{
+ IMG_UINT8 *pui8TempBuffer;
+ IMG_UINT32 ui32I;
+ PSB_BOOL bReturn = PSB_FALSE;
+
+ /* Allocate temp buffer to read data into */
+ pui8TempBuffer = (IMG_UINT8 *)PVROSAllocKernelMem(ui32BufferLength);
+ if (pui8TempBuffer == NULL)
+ {
+ return PSB_FALSE;
+ }
+
+ /* Tell the device what data we want */
+ if (I2CWriteByte(psAdapter, PVRPSB_I2C_CMD, ui8Command) == PSB_FALSE)
+ {
+ goto ExitFreeTempBuffer;
+ }
+
+ /* Read the data back into a temporary buffer */
+ for (ui32I = 0; ui32I < ui32BufferLength; ui32I++)
+ {
+ if (I2CReadByte(psAdapter, PVRPSB_I2C_RETURN0 + ui32I, &pui8TempBuffer[ui32I]) == PSB_FALSE)
+ {
+ goto ExitFreeTempBuffer;
+ }
+ }
+
+ /* If all went well copy the data */
+ if (I2CCheckDeviceStatus(psAdapter) == PSB_TRUE)
+ {
+ memcpy(pui8Buffer, pui8TempBuffer, ui32BufferLength);
+
+ bReturn = PSB_TRUE;
+ }
+
+ExitFreeTempBuffer:
+ PVROSFreeKernelMem(pui8TempBuffer);
+
+ return bReturn;
+}
+
+static PSB_BOOL I2CCommandWrite(struct i2c_adapter *psAdapter, IMG_UINT8 ui8Command, IMG_UINT8 *pui8Buffer, IMG_UINT32 ui32BufferLength)
+{
+ IMG_UINT32 ui32I;
+
+ /* Send the data to the device */
+ for (ui32I = 0; ui32I < ui32BufferLength; ui32I++)
+ {
+ if (I2CWriteByte(psAdapter, PVRPSB_I2C_ARG0 - ui32I, pui8Buffer[ui32I]) == PSB_FALSE)
+ {
+ return PSB_FALSE;
+ }
+ }
+
+ /* Tell the device what the data was that we just sent */
+ if (I2CWriteByte(psAdapter, PVRPSB_I2C_CMD, ui8Command) == PSB_FALSE)
+ {
+ return PSB_FALSE;
+ }
+
+ return I2CCheckDeviceStatus(psAdapter);
+}
+
+static PSB_BOOL I2CGetActiveEncoders(struct i2c_adapter *psAdapter, IMG_UINT16 *pui16Outputs)
+{
+ IMG_UINT16 ui16ActiveEncoders;
+
+ if (I2CCommandRead(psAdapter, PVRPSB_I2C_CMD_GETACTIVEENCODERS, (IMG_UINT8 *)&ui16ActiveEncoders, sizeof(ui16ActiveEncoders)) == PSB_TRUE)
+ {
+ *pui16Outputs = ui16ActiveEncoders;
+ return PSB_TRUE;
+ }
+
+ return PSB_FALSE;
+}
+
+static PSB_BOOL I2CSetActiveEncoders(struct i2c_adapter *psAdapter, IMG_UINT16 ui16Outputs)
+{
+ return I2CCommandWrite(psAdapter, PVRPSB_I2C_CMD_SETACTIVEENCODERS, (IMG_UINT8 *)&ui16Outputs, sizeof(ui16Outputs));
+}
+
+static PSB_BOOL I2CSetInOutMap(struct i2c_adapter *psAdapter, IMG_UINT16 ui16Input0Output, IMG_UINT16 ui16Input1Output)
+{
+ IMG_UINT8 aui8InOutMap[4];
+
+ aui8InOutMap[0] = ui16Input0Output & 0xFF;
+ aui8InOutMap[1] = (ui16Input0Output & 0xFF00) >> 8;
+ aui8InOutMap[2] = ui16Input1Output & 0xFF;
+ aui8InOutMap[3] = (ui16Input1Output & 0xFF00) >> 8;
+
+ return I2CCommandWrite(psAdapter, PVRPSB_I2C_CMD_SETINOUTMAP, &aui8InOutMap[0], sizeof(aui8InOutMap));
+}
+
+static PSB_BOOL I2CGetAttachedDisplays(struct i2c_adapter *psAdapter, IMG_UINT8 *pui8Output0, IMG_UINT8 *pui8Output1)
+{
+ IMG_UINT8 aui8Output[2];
+
+ if (I2CCommandRead(psAdapter, PVRPSB_I2C_CMD_GETATTACHEDDISPLAYS, &aui8Output[0], sizeof(aui8Output)) == PSB_TRUE)
+ {
+ *pui8Output0 = aui8Output[0];
+ *pui8Output1 = aui8Output[1];
+
+ return PSB_TRUE;
+ }