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author | Peter Ujfalusi <peter.ujfalusi@linux.intel.com> | 2024-04-03 13:52:05 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-06-12 12:11:59 +0300 |
commit | 8aeb3dc8b3cd4a485d19dd2d719d47a7f4ed4e7f (patch) | |
tree | c8f82f3c05aee504dfea9edca5e6ce399e9ed230 /.cocciconfig | |
parent | 368017b1bff7dfe4724a0bbf3b87dacd1adc940e (diff) | |
download | linux-8aeb3dc8b3cd4a485d19dd2d719d47a7f4ed4e7f.tar.xz |
ASoC: SOF: Intel: mtl: Correct rom_status_reg
[ Upstream commit 1f1b820dc3c65b6883da3130ba3b8624dcbf87db ]
ACE1 architecture changed the place where the ROM updates the status code
from the shared SRAM window to HFFLGP1QW0 register for the status and
HFFLGP1QW0 + 4 for the error code.
The rom_status_reg is not used on MTL because it was wrongly assigned based
on older platform convention (SRAM window) and it was giving inconsistent
readings.
Fixes: 064520e8aeaa ("ASoC: SOF: Intel: Add support for MeteorLake (MTL)")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Liam Girdwood <liam.r.girdwood@intel.com>
Link: https://msgid.link/r/20240403105210.17949-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to '.cocciconfig')
0 files changed, 0 insertions, 0 deletions