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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-07-05 12:56:35 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-31 08:27:05 +0300 |
commit | 4613f46ef47211d2979b23a0801cb05a34f2c98a (patch) | |
tree | 35786ff2a4c238f574a47c8fc2abb1a500165288 | |
parent | 51308ec525cc1d2bf0552b9d4c2ad6abe0000d80 (diff) | |
download | linux-4613f46ef47211d2979b23a0801cb05a34f2c98a.tar.xz |
PCI: mobiveil: Fix the Class Code field
[ Upstream commit 0122af0a08243f344a438f924e5c2486486555b3 ]
Fix up the Class Code field in PCI configuration space and set it to
PCI_CLASS_BRIDGE_PCI.
Move the Class Code fixup to function mobiveil_host_init() where
it belongs.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r-- | drivers/pci/controller/pcie-mobiveil.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index d9f2d0f2d602..3e81e68b5ce0 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -565,6 +565,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) } } + /* fixup for PCIe class register */ + value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS); + value &= 0xff; + value |= (PCI_CLASS_BRIDGE_PCI << 16); + csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); + /* setup MSI hardware registers */ mobiveil_pcie_enable_msi(pcie); @@ -805,9 +811,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) goto error; } - /* fixup for PCIe class register */ - csr_writel(pcie, 0x060402ab, PAB_INTP_AXI_PIO_CLASS); - /* initialize the IRQ domains */ ret = mobiveil_pcie_init_irq_domain(pcie); if (ret) { |