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author | Ahmad Fatoum <a.fatoum@pengutronix.de> | 2020-03-27 01:02:06 +0300 |
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committer | Alexandre Torgue <alexandre.torgue@st.com> | 2020-04-20 13:15:23 +0300 |
commit | 9c32f980d999b4f441044f94005b3e649d036694 (patch) | |
tree | 0dce31a63cae11be5c80bee03555286989d52c19 | |
parent | 88fcb8a340e5221fdb0317a26f16d1df1776f0a9 (diff) | |
download | linux-9c32f980d999b4f441044f94005b3e649d036694.tar.xz |
ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells
The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
-rw-r--r-- | arch/arm/boot/dts/stm32mp151.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/stm32mp157.dtsi | 7 |
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 5260818543e5..d70fc774e0a4 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1423,6 +1423,11 @@ clock-names = "lcd"; resets = <&rcc LTDC_R>; status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + }; }; iwdg2: watchdog@5a002000 { diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi index 5e733cd16ff9..54e73ccea446 100644 --- a/arch/arm/boot/dts/stm32mp157.dtsi +++ b/arch/arm/boot/dts/stm32mp157.dtsi @@ -24,7 +24,14 @@ clock-names = "pclk", "ref", "px_clk"; resets = <&rcc DSI_R>; reset-names = "apb"; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; }; }; }; |