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authorChris Brandt <chris.brandt@renesas.com>2020-02-10 15:31:53 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-02-10 15:53:20 +0300
commitb214f94e0f5f00c11308d8b9ef4d396252edd91b (patch)
treefdbfb13bdf6c87bf89ebe2c8ce8ee1643cd7acaa
parent4e28626dbc2cac7d27f91a3171f6fd34626280b3 (diff)
downloadlinux-b214f94e0f5f00c11308d8b9ef4d396252edd91b.tar.xz
ARM: dts: r7s72100: Add SPIBSC clocks
Add clocks for SPIBSC blocks. Also modify the flash node for the GR-PEACH board at the same time because now that the SPIBSC clock is identified, if it is not used by any driver, it will be turned off at the end of kernel boot. That would not work out so well for an XIP system such as GR-PEACH. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Link: https://lore.kernel.org/r/20200210123153.8257-1-chris.brandt@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--arch/arm/boot/dts/r7s72100-gr-peach.dts3
-rw-r--r--arch/arm/boot/dts/r7s72100.dtsi5
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r7s72100-gr-peach.dts b/arch/arm/boot/dts/r7s72100-gr-peach.dts
index fe1a4aa4d7cb..2562cc9b5356 100644
--- a/arch/arm/boot/dts/r7s72100-gr-peach.dts
+++ b/arch/arm/boot/dts/r7s72100-gr-peach.dts
@@ -41,6 +41,9 @@
bank-width = <4>;
device-width = <1>;
+ clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>;
+ power-domains = <&cpg_clocks>;
+
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 75b2796ebfca..0a567d8ebc66 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -467,11 +467,12 @@
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0438 4>;
- clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
+ clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>, <&b_clk>, <&b_clk>;
clock-indices = <
R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
+ R7S72100_CLK_SPIBSC0 R7S72100_CLK_SPIBSC1
>;
- clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+ clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3", "spibsc0", "spibsc1";
};
mstp10_clks: mstp10_clks@fcfe043c {