diff options
| author | Luo Jiaxing <luojiaxing@huawei.com> | 2020-12-14 11:24:14 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2020-12-16 23:57:27 +0300 |
| commit | 80e493d2b74af7442eac968c060b26adbfaa96f9 (patch) | |
| tree | dd84c8ac31e3152499cfc103a8479e7ddff53da8 | |
| parent | 356b01a986a5550ee16dd0b85306c6741f2d02d5 (diff) | |
| download | linux-80e493d2b74af7442eac968c060b26adbfaa96f9.tar.xz | |
MAINTAINERS: Add maintainer for HiSilicon GPIO driver
Here add maintainer information for HiSilicon GPIO driver.
Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-3-git-send-email-luojiaxing@huawei.com
[Dropped some dead code when applying]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | MAINTAINERS | 7 | ||||
| -rw-r--r-- | drivers/gpio/gpio-hisi.c | 5 |
2 files changed, 7 insertions, 5 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 8f18a5b33a60..42ef0200c962 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7908,6 +7908,13 @@ L: dmaengine@vger.kernel.org S: Maintained F: drivers/dma/hisi_dma.c +HISILICON GPIO DRIVER +M: Luo Jiaxing <luojiaxing@huawei.com> +L: linux-gpio@vger.kernel.org +S: Maintained +F: drivers/gpio/gpio-hisi.c +F: include/linux/platform_data/gpio-hisi.h + HISILICON HIGH PERFORMANCE RSA ENGINE DRIVER (HPRE) M: Zaibo Xu <xuzaibo@huawei.com> L: linux-crypto@vger.kernel.org diff --git a/drivers/gpio/gpio-hisi.c b/drivers/gpio/gpio-hisi.c index a3897800f811..ad3d4da25160 100644 --- a/drivers/gpio/gpio-hisi.c +++ b/drivers/gpio/gpio-hisi.c @@ -254,7 +254,6 @@ static void hisi_gpio_get_pdata(struct device *dev, static int hisi_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - void __iomem *dat, *set, *clr; struct hisi_gpio *hisi_gpio; int port_num; int ret; @@ -279,10 +278,6 @@ static int hisi_gpio_probe(struct platform_device *pdev) hisi_gpio->dev = dev; - dat = hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX; - set = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX; - clr = hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_CLR_WX; - ret = bgpio_init(&hisi_gpio->chip, hisi_gpio->dev, 0x4, hisi_gpio->reg_base + HISI_GPIO_EXT_PORT_WX, hisi_gpio->reg_base + HISI_GPIO_SWPORT_DR_SET_WX, |