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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-16 03:09:02 +0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-12-04 22:55:46 +0400 |
commit | 853e96428c8e8f2ac95e1b6a144114340694a244 (patch) | |
tree | ca71b98b31d7c308fdb5470bdb3447c2c346defe | |
parent | 6ca235a5703b6d30df5d4c8d47d6f8d6695d46fd (diff) | |
download | linux-853e96428c8e8f2ac95e1b6a144114340694a244.tar.xz |
ARM: sa11x0/assabet: ensure CS2 is configured appropriately
commit f3964fe1c9d9a887d65faf594669852e4dec46e0 upstream.
The CS2 region contains the Assabet board configuration and status
registers, which are 32-bit. Unfortunately, some boot loaders do not
configure this region correctly, leaving it setup as a 16-bit region.
Fix this.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | arch/arm/mach-sa1100/assabet.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index e838ba27e443..c9808c684152 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -512,6 +512,9 @@ static void __init assabet_map_io(void) * Its called GPCLKR0 in my SA1110 manual. */ Ser1SDCR0 |= SDCR0_SUS; + MSC1 = (MSC1 & ~0xffff) | + MSC_NonBrst | MSC_32BitStMem | + MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0); if (!machine_has_neponset()) sa1100_register_uart_fns(&assabet_port_fns); |