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authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>2019-05-22 22:47:23 +0300
committerVinod Koul <vkoul@kernel.org>2019-05-27 08:23:00 +0300
commit53d2e9c3773478d00d1851cc048d7ef9e60c7b6d (patch)
tree6da82c548ad8a1d1ff8c5ae2d731f76f281152b8
parent3424305b8be456a8e23c951b8c9aebad0c765ff7 (diff)
downloadlinux-53d2e9c3773478d00d1851cc048d7ef9e60c7b6d.tar.xz
soundwire: mipi-disco: fix clock stop modes
Fix support for clock_stop_mode0 and 1. The existing code uses a bitmask between enums, one of which being zero. Or-ing with zero is not very useful in general...Fix by or-ing with a BIT dependent on the enum value. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r--drivers/soundwire/mipi_disco.c4
-rw-r--r--include/linux/soundwire/sdw.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/soundwire/mipi_disco.c b/drivers/soundwire/mipi_disco.c
index b1770af43fa8..efb87ee0e7fc 100644
--- a/drivers/soundwire/mipi_disco.c
+++ b/drivers/soundwire/mipi_disco.c
@@ -50,11 +50,11 @@ int sdw_master_read_prop(struct sdw_bus *bus)
if (fwnode_property_read_bool(link,
"mipi-sdw-clock-stop-mode0-supported"))
- prop->clk_stop_mode = SDW_CLK_STOP_MODE0;
+ prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE0);
if (fwnode_property_read_bool(link,
"mipi-sdw-clock-stop-mode1-supported"))
- prop->clk_stop_mode |= SDW_CLK_STOP_MODE1;
+ prop->clk_stop_modes |= BIT(SDW_CLK_STOP_MODE1);
fwnode_property_read_u32(link,
"mipi-sdw-max-clock-frequency",
diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h
index c6ded0d7a9f2..0e3fdd03e589 100644
--- a/include/linux/soundwire/sdw.h
+++ b/include/linux/soundwire/sdw.h
@@ -364,7 +364,7 @@ struct sdw_slave_prop {
/**
* struct sdw_master_prop - Master properties
* @revision: MIPI spec version of the implementation
- * @clk_stop_mode: Bitmap for Clock Stop modes supported
+ * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
* @max_clk_freq: Maximum Bus clock frequency, in Hz
* @num_clk_gears: Number of clock gears supported
* @clk_gears: Clock gears supported
@@ -379,7 +379,7 @@ struct sdw_slave_prop {
*/
struct sdw_master_prop {
u32 revision;
- enum sdw_clk_stop_mode clk_stop_mode;
+ u32 clk_stop_modes;
u32 max_clk_freq;
u32 num_clk_gears;
u32 *clk_gears;