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authorAxel Lin <axel.lin@ingics.com>2015-07-19 07:32:52 +0300
committerMark Brown <broonie@kernel.org>2015-07-24 20:31:03 +0300
commit80deaf09cb3fb3939c1d2b84610ae411cd7c6001 (patch)
tree3492dd59a7ad68b370cd3a5b4f2f97c0a1fc16a4
parentbc0195aad0daa2ad5b0d76cce22b167bc3435590 (diff)
downloadlinux-80deaf09cb3fb3939c1d2b84610ae411cd7c6001.tar.xz
ASoC: cs4265: CS4265_INT_STATUS is readable register
CS4265_INT_STATUS was missed in cs4265_readable_register, fix it. The register 0x01 ~ 0x12 are readable, use CS4265_CHIP_ID ... CS4265_SPDIF_CTL2 syntax for better readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/cs4265.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/sound/soc/codecs/cs4265.c b/sound/soc/codecs/cs4265.c
index d7ec4756e45b..688c5007d157 100644
--- a/sound/soc/codecs/cs4265.c
+++ b/sound/soc/codecs/cs4265.c
@@ -60,23 +60,7 @@ static const struct reg_default cs4265_reg_defaults[] = {
static bool cs4265_readable_register(struct device *dev, unsigned int reg)
{
switch (reg) {
- case CS4265_PWRCTL:
- case CS4265_DAC_CTL:
- case CS4265_ADC_CTL:
- case CS4265_MCLK_FREQ:
- case CS4265_SIG_SEL:
- case CS4265_CHB_PGA_CTL:
- case CS4265_CHA_PGA_CTL:
- case CS4265_ADC_CTL2:
- case CS4265_DAC_CHA_VOL:
- case CS4265_DAC_CHB_VOL:
- case CS4265_DAC_CTL2:
- case CS4265_SPDIF_CTL1:
- case CS4265_SPDIF_CTL2:
- case CS4265_INT_MASK:
- case CS4265_STATUS_MODE_MSB:
- case CS4265_STATUS_MODE_LSB:
- case CS4265_CHIP_ID:
+ case CS4265_CHIP_ID ... CS4265_SPDIF_CTL2:
return true;
default:
return false;