diff options
| author | Joshua Aberback <joshua.aberback@amd.com> | 2020-11-17 19:27:33 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-12-02 00:03:27 +0300 |
| commit | 079204508ec0cd32a66c5ca8b9f977383355b181 (patch) | |
| tree | dd804e750b74960c83311b55e20d5492c9edc7c4 | |
| parent | 901c1ec05ef277ce9d43cb806a225b28b3efe89a (diff) | |
| download | linux-079204508ec0cd32a66c5ca8b9f977383355b181.tar.xz | |
drm/amd/display: Check link_active instead of lane_settings != unknown
[Why]
enable_link_dp_mst checks that cur_link_settings != unknown to determine
that the link is already enabled, to skip redundant enablement calls for
multiple streams on the same link. During dc_reinitialize_hardware,
cur_link_settings on previously-active links is not cleared, which blocks
MST links from being re-enabled after a reinitialization.
[How]
- check for link_status->link_active instead, as it's the real intent
- clear cur_link_settings when we clear link_active
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 4a897c326aab..a9c52657eb4b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -1738,7 +1738,7 @@ static enum dc_status enable_link_dp_mst( /* sink signal type after MST branch is MST. Multiple MST sinks * share one link. Link DP PHY is enable or training only once. */ - if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) + if (link->link_status.link_active) return DC_OK; /* clear payload table */ diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 90c85b3e859b..4c230f1de9a3 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1530,6 +1530,8 @@ static void power_down_encoders(struct dc *dc) dc->links[i]->link_enc, signal); dc->links[i]->link_status.link_active = false; + memset(&dc->links[i]->cur_link_settings, 0, + sizeof(dc->links[i]->cur_link_settings)); } } |